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venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/__init__.py

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+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from .ds_kernel import DSKernelBase

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ds_kernel.py

@@ -0,0 +1,32 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from abc import ABC, abstractmethod
+
+
+class DSKernelBase(ABC):
+
+    @abstractmethod
+    def __init__(self, *args, **kwargs):
+        """
+        If necessary trigger compilation and warmup
+        Autotuning of the kernel would happen at this stage to
+        eliminate any potential hangs that might occur mid-deployment
+        Validate that the desired run configuration is compatible.
+
+        It is not necessary to call super on this method.
+        """
+        raise NotImplementedError()
+
+    @abstractmethod
+    def __call__(self, *args, **kwargs):
+        """
+        However the kernel needs to be called, it can be called here. Auto-tuning
+        should never be performed here.
+
+        All inputs/outputs should be passed as arguments to this function. No allocations
+        should be performed here.
+        """
+        raise NotImplementedError()

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/__init__.py

@@ -0,0 +1,13 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from .atom_builder import *
+from .blocked_flash import *
+from .embed import *
+from .linear_blocked_kv_rotary import *
+from .logits_gather import *
+from .moe_gather import *
+from .moe_scatter import *
+from .top_k_gating import *

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/linear_blocked_kv_rotary/__init__.py

@@ -0,0 +1,8 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from .blocked_kv_rotary import *
+from .blocked_trained_kv_rotary import *
+from .linear_blocked_kv_copy import *

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/linear_blocked_kv_rotary/blocked_kv_rotary.cpp

@@ -0,0 +1,195 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include "blocked_kv_rotary.h"
+#include "ragged_kernel_helpers.h"
+
+#define DISPATCH_KV_ROTARY(T_TYPE, C_TYPE)                                 \
+    if (q.options().dtype() == torch::T_TYPE) {                            \
+        launch_kv_rotary_kernel<C_TYPE>((C_TYPE*)kv_cache.data_ptr(),      \
+                                        (C_TYPE*)q.data_ptr(),             \
+                                        (C_TYPE*)k.data_ptr(),             \
+                                        (C_TYPE*)v.data_ptr(),             \
+                                        (C_TYPE*)inv_freq_ptr,             \
+                                        rotary_dim,                        \
+                                        theta_base,                        \
+                                        batch_wrapper,                     \
+                                        qkv_stride,                        \
+                                        kv_cache_stride,                   \
+                                        v_offset,                          \
+                                        inv_freq_stride,                   \
+                                        q_ratio,                           \
+                                        head_size,                         \
+                                        n_tokens,                          \
+                                        n_q_heads,                         \
+                                        at::cuda::getCurrentCUDAStream()); \
+    }
+
+/*
+Rotary position embeddings + copy into KV cache. This implementation assumes
+that the inverse frequencies should be ready from global memory rather than
+synthesized in the kernel.
+
+Arguments:
+    kv_cache: [n_blocks, block_size, 2, n_kv_heads, head_size]
+    q: [n_tokens, n_q_heads * head_size]
+    k: [n_tokens, n_kv_heads * head_size]
+    v: [n_tokens, n_kv_heads * head_size]
+    inv_freq: [max_seq_len, head_size // 2]
+*/
+void kv_trained_rotary_embeddings(torch::Tensor& kv_cache,
+                                  torch::Tensor& q,
+                                  torch::Tensor& k,
+                                  torch::Tensor& v,
+                                  torch::Tensor& inv_freq,
+                                  torch::Tensor& batch_metadata,
+                                  torch::Tensor& seq_metadata,
+                                  torch::Tensor& tokens_to_seq,
+                                  torch::Tensor& kv_ptrs)
+{
+    const int32_t n_tokens = q.size(0);
+    TORCH_CHECK(n_tokens == k.size(0));
+    TORCH_CHECK(n_tokens == v.size(0));
+
+    const float theta_base = 0.f;
+    const int32_t rotary_dim = inv_freq.size(0) * 2;
+
+    // Dimensions
+    const int32_t block_size = kv_cache.size(1);
+    const int32_t n_kv_heads = kv_cache.size(3);
+    const int32_t head_size = kv_cache.size(4);
+
+    // Strides
+    const int32_t qkv_stride = q.stride(0);              // Per token
+    const int32_t kv_cache_stride = kv_cache.stride(1);  // Per token
+    const int32_t v_offset = kv_cache.stride(2);         // From k_cache to v_cache
+    const int32_t inv_freq_stride = inv_freq.stride(0);  // Per token idx
+
+    const int n_q_heads = q.size(1) / head_size;
+    const int q_ratio = n_q_heads / n_kv_heads;
+
+    void* inv_freq_ptr = (void*)inv_freq.data_ptr();
+
+    BatchWrapperCPP batch_wrapper = make_cpp_batch_wrapper(
+        batch_metadata, seq_metadata, tokens_to_seq, kv_ptrs, block_size, kv_cache.size(0));
+
+    DISPATCH_KV_ROTARY(kHalf, __half);
+
+#ifdef BF16_AVAILABLE
+    DISPATCH_KV_ROTARY(kBFloat16, __nv_bfloat16);
+#endif
+}
+
+/*
+Rotary position embeddings + copy into KV cache. This implementation assumes
+that the inverse frequencies should be synthesized in the kernel.
+
+Arguments:
+    kv_cache: [n_blocks, block_size, 2, n_kv_heads, head_size]
+    q: [n_tokens, n_q_heads * head_size]
+    k: [n_tokens, n_kv_heads * head_size]
+    v: [n_tokens, n_kv_heads * head_size]
+*/
+void kv_rotary_embeddings(torch::Tensor& kv_cache,
+                          torch::Tensor& q,
+                          torch::Tensor& k,
+                          torch::Tensor& v,
+                          const int32_t rotary_dim,
+                          const float theta_base,
+                          torch::Tensor& batch_metadata,
+                          torch::Tensor& seq_metadata,
+                          torch::Tensor& tokens_to_seq,
+                          torch::Tensor& kv_ptrs)
+{
+    const int32_t n_tokens = q.size(0);
+    TORCH_CHECK(n_tokens == k.size(0));
+    TORCH_CHECK(n_tokens == v.size(0));
+
+    // Dimensions
+    const int32_t block_size = kv_cache.size(1);
+    const int32_t n_kv_heads = kv_cache.size(3);
+    const int32_t head_size = kv_cache.size(4);
+
+    // Strides
+    const int32_t qkv_stride = q.stride(0);              // Per token
+    const int32_t kv_cache_stride = kv_cache.stride(1);  // Per token
+    const int32_t v_offset = kv_cache.stride(2);         // From k_cache to v_cache
+    const int32_t inv_freq_stride = 0;                   // Per token idx
+
+    const int n_q_heads = q.size(1) / head_size;
+    const int q_ratio = n_q_heads / n_kv_heads;
+
+    void* inv_freq_ptr = nullptr;
+
+    BatchWrapperCPP batch_wrapper = make_cpp_batch_wrapper(
+        batch_metadata, seq_metadata, tokens_to_seq, kv_ptrs, block_size, kv_cache.size(0));
+
+    DISPATCH_KV_ROTARY(kHalf, __half);
+
+#ifdef BF16_AVAILABLE
+    DISPATCH_KV_ROTARY(kBFloat16, __nv_bfloat16);
+#endif
+}
+
+#define DISPATCH_KV_COPY(T_TYPE, C_TYPE)                                 \
+    if (q.options().dtype() == torch::T_TYPE) {                          \
+        launch_kv_copy_kernel<C_TYPE>((C_TYPE*)kv_cache.data_ptr(),      \
+                                      (C_TYPE*)q.data_ptr(),             \
+                                      (C_TYPE*)k.data_ptr(),             \
+                                      (C_TYPE*)v.data_ptr(),             \
+                                      batch_wrapper,                     \
+                                      qkv_stride,                        \
+                                      kv_cache_stride,                   \
+                                      v_offset,                          \
+                                      q_ratio,                           \
+                                      head_size,                         \
+                                      n_tokens,                          \
+                                      n_q_heads,                         \
+                                      at::cuda::getCurrentCUDAStream()); \
+    }
+
+/*
+Copy into linear KV cache.
+*/
+void linear_kv_copy(torch::Tensor& kv_cache,
+                    torch::Tensor& q,
+                    torch::Tensor& k,
+                    torch::Tensor& v,
+                    torch::Tensor& batch_metadata,
+                    torch::Tensor& seq_metadata,
+                    torch::Tensor& tokens_to_seq,
+                    torch::Tensor& kv_ptrs)
+{
+    const int32_t n_tokens = q.size(0);
+    TORCH_CHECK(n_tokens == k.size(0));
+    TORCH_CHECK(n_tokens == v.size(0));
+
+    // Dimensions
+    const int32_t block_size = kv_cache.size(1);
+    const int32_t n_kv_heads = kv_cache.size(3);
+    const int32_t head_size = kv_cache.size(4);
+
+    // Strides
+    const int32_t qkv_stride = q.stride(0);  // Per token
+    TORCH_CHECK(qkv_stride == k.stride(0));
+    TORCH_CHECK(qkv_stride == v.stride(0));
+
+    const int32_t kv_cache_stride = kv_cache.stride(1);  // Per token
+    const int32_t v_offset = kv_cache.stride(2);         // From k_cache to v_cache
+
+    const int n_q_heads = q.size(1) / head_size;
+
+    TORCH_CHECK(n_q_heads % n_kv_heads == 0);
+    const int q_ratio = n_q_heads / n_kv_heads;
+
+    BatchWrapperCPP batch_wrapper = make_cpp_batch_wrapper(
+        batch_metadata, seq_metadata, tokens_to_seq, kv_ptrs, block_size, kv_cache.size(0));
+
+    DISPATCH_KV_COPY(kHalf, __half);
+
+#ifdef BF16_AVAILABLE
+    DISPATCH_KV_COPY(kBFloat16, __nv_bfloat16);
+#endif
+}

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/linear_blocked_kv_rotary/blocked_kv_rotary.cuh

@@ -0,0 +1,47 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+#include "ds_kernel_utils.h"
+#include "ragged_dtypes.h"
+
+#ifdef BF16_AVAILABLE
+#include <cuda_bf16.h>
+#endif
+
+template <typename T>
+void launch_kv_rotary_kernel(T* kv_cache,
+                             T* q,
+                             T* k,
+                             T* v,
+                             T* inv_freq,
+                             const int32_t rotary_dim,
+                             const float theta_base,
+                             const BatchWrapperCPP batch_desc,
+                             const int qkv_stride,
+                             const int kv_cache_stride,
+                             const int v_offset,
+                             const int inv_freq_stride,
+                             const int q_ratio,
+                             const int head_size,
+                             const int n_tokens,
+                             const int n_q_heads,
+                             cudaStream_t stream);
+
+template <typename T>
+void launch_kv_copy_kernel(T* kv_cache,
+                           T* q,
+                           T* k,
+                           T* v,
+                           const BatchWrapperCPP batch_desc,
+                           const int qkv_stride,
+                           const int kv_cache_stride,
+                           const int v_offset,
+                           const int q_ratio,
+                           const int head_size,
+                           const int n_tokens,
+                           const int n_q_heads,
+                           cudaStream_t stream);

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/linear_blocked_kv_rotary/blocked_kv_rotary.h

@@ -0,0 +1,65 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+#include <c10/cuda/CUDAStream.h>
+#include <torch/extension.h>
+#include "blocked_kv_rotary.cuh"
+
+/*
+Rotary position embeddings + copy into KV cache. This implementation assumes
+that the inverse frequencies should be ready from global memory rather than
+synthesized in the kernel.
+
+Arguments:
+    kv_cache: [n_blocks, block_size, 2, n_kv_heads, head_size]
+    q: [n_tokens, n_q_heads * head_size]
+    k: [n_tokens, n_kv_heads * head_size]
+    v: [n_tokens, n_kv_heads * head_size]
+    inv_freq: [max_seq_len, head_size // 2]
+*/
+void kv_trained_rotary_embeddings(torch::Tensor& kv_cache,
+                                  torch::Tensor& q,
+                                  torch::Tensor& k,
+                                  torch::Tensor& v,
+                                  torch::Tensor& inv_freq,
+                                  torch::Tensor& batch_metadata,
+                                  torch::Tensor& seq_metadata,
+                                  torch::Tensor& tokens_to_seq,
+                                  torch::Tensor& kv_ptrs);
+
+/*
+Rotary position embeddings + copy into KV cache. This implementation assumes
+that the inverse frequencies should be synthesized in the kernel.
+
+Arguments:
+    kv_cache: [n_blocks, block_size, 2, n_kv_heads, head_size]
+    q: [n_tokens, n_q_heads * head_size]
+    k: [n_tokens, n_kv_heads * head_size]
+    v: [n_tokens, n_kv_heads * head_size]
+*/
+void kv_rotary_embeddings(torch::Tensor& kv_cache,
+                          torch::Tensor& q,
+                          torch::Tensor& k,
+                          torch::Tensor& v,
+                          const int32_t rotary_dim,
+                          const float theta_base,
+                          torch::Tensor& batch_metadata,
+                          torch::Tensor& seq_metadata,
+                          torch::Tensor& tokens_to_seq,
+                          torch::Tensor& kv_ptrs);
+
+/*
+Copy into linear KV cache.
+*/
+void linear_kv_copy(torch::Tensor& kv_cache,
+                    torch::Tensor& q,
+                    torch::Tensor& k,
+                    torch::Tensor& v,
+                    torch::Tensor& batch_metadata,
+                    torch::Tensor& seq_metadata,
+                    torch::Tensor& tokens_to_seq,
+                    torch::Tensor& kv_ptrs);

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/linear_blocked_kv_rotary/blocked_kv_rotary.py

@@ -0,0 +1,73 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+import torch
+
+from ....inference_utils import DtypeEnum
+from deepspeed.ops.op_builder import RaggedOpsBuilder
+from ....ragged import RaggedBatchWrapper
+from ... import DSKernelBase
+
+
+class BlockedRotaryEmbeddings(DSKernelBase):
+    """
+    CUDA Kernel implementation that will perform rotary position embeddings on the queries and keys
+    before copying into a blocked KV cache.
+    """
+
+    supported_dtypes = [DtypeEnum.fp16, DtypeEnum.bf16]
+    supported_head_sizes = [64, 80, 128]
+    supported_q_ratios = [1, 2, 4, 5, 8, 16, 29, 35, 36, 71]
+
+    def __init__(self, head_size: int, n_q_heads: int, n_kv_heads: int, dtype: torch.dtype, rotary_dim: int,
+                 theta_base: float) -> None:
+        """
+        Args:
+            head_size: The size of the attention head.
+            q_ratio: Ratio of q heads to kv heads (for GQA)
+            dtype: Data type for the input/output. Supported values are torch.float16 and torch.bfloat16.
+        """
+
+        q_ratio = n_q_heads // n_kv_heads
+
+        if head_size not in BlockedRotaryEmbeddings.supported_head_sizes:
+            raise ValueError("Unsupported head size: {}, supported_head_sizes are {}".format(
+                head_size, BlockedRotaryEmbeddings.supported_head_sizes))
+
+        if q_ratio not in BlockedRotaryEmbeddings.supported_q_ratios:
+            raise ValueError("Unsupported q_ratio: {}, supported_q_ratios are {}".format(
+                q_ratio, BlockedRotaryEmbeddings.supported_q_ratios))
+
+        if not isinstance(dtype, DtypeEnum):
+            dtype = DtypeEnum(dtype)
+
+        if dtype not in BlockedRotaryEmbeddings.supported_dtypes:
+            raise ValueError("Unsupported data type: {}, supported_dtypes are {}".format(
+                dtype, BlockedRotaryEmbeddings.supported_dtypes))
+
+        inf_module = RaggedOpsBuilder().load()
+        self.kernel = inf_module.kv_rotary_embeddings
+        self.head_size = head_size
+        self.n_q_heads = n_q_heads
+        self.n_kv_heads = n_kv_heads
+        self.rotary_dim = rotary_dim
+        self.theta_base = theta_base
+
+    def __call__(self, kv_cache: torch.Tensor, qkv: torch.Tensor, ragged_batch: RaggedBatchWrapper) -> None:
+        """
+        Perform rotary embeddings on the queries and keys before copying into a blocked KV cache.
+
+        Args:
+            kv_cache (torch.Tensor): Pre-allocated KV cache of [num_blocks, block_size, 2, n_kv_heads, head_size]
+            qkv: Input tensor of shape [num_tokens, head_size * (n_q_heads + 2 * n_kv_heads)]
+            ragged_batch: Wrapper for the ragged batch.
+        """
+
+        q = qkv[:, :self.head_size * self.n_q_heads]
+        k = qkv[:, self.head_size * self.n_q_heads:self.head_size * (self.n_q_heads + self.n_kv_heads)]
+        v = qkv[:, self.head_size * (self.n_q_heads + self.n_kv_heads):]
+
+        self.kernel(kv_cache, q, k, v, self.rotary_dim, self.theta_base, ragged_batch.batch_metadata_buffer(),
+                    ragged_batch.inflight_seq_descriptors(), ragged_batch.tokens_to_seq(), ragged_batch.kv_ptrs())

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/linear_blocked_kv_rotary/blocked_kv_rotary_cuda.cu

@@ -0,0 +1,385 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include <cassert>
+#include "blocked_kv_rotary.cuh"
+#include "conversion_utils.h"
+#include "ds_kernel_utils.h"
+#include "memory_access_utils.h"
+
+namespace cg = cooperative_groups;
+
+namespace kv_rot {
+
+constexpr int granularity = 16;
+constexpr int threads = 256;
+
+}  // namespace kv_rot
+
+/*
+Supports head size 32, 64, 128, 256
+*/
+
+template <typename T, int qRatio, int headSize, bool doRotary, int paddedHeadSize>
+__global__ void kv_rotary_pos_kernel(T* kv_cache,
+                                     T* q,
+                                     T* k,
+                                     T* v,
+                                     const T* inv_freq,
+                                     const int32_t rotary_dim,
+                                     const float theta_base,
+                                     const BatchWrapperCPP batch_desc,
+                                     const int qkv_stride,
+                                     const int kv_cache_stride,
+                                     const int v_offset,
+                                     const int inv_freq_stride)
+{
+    // Derived constexpr
+    constexpr int vector_T = kv_rot::granularity / sizeof(T);
+    constexpr int real_threads_per_head = headSize / vector_T;
+    constexpr int threads_per_head = paddedHeadSize / vector_T;
+
+    constexpr int tokens_per_block = kv_rot::threads / threads_per_head;
+
+    // CG helpers
+    cg::thread_block tb = cg::this_thread_block();
+    cg::thread_block_tile<hw_warp_size> warp = cg::tiled_partition<hw_warp_size>(tb);
+    cg::thread_block_tile<threads_per_head> head_group = cg::tiled_partition<threads_per_head>(tb);
+
+    // Parallelize on the head dimension for X blocks
+    const int head_idx = blockIdx.x;
+
+    const int block_seq_idx = threadIdx.x / threads_per_head;
+    const int base_neuron_idx = head_group.thread_rank() * vector_T;
+    const int half_rotary_size = rotary_dim / 2;
+    const int half_dim_lanes = half_rotary_size / vector_T;
+    const int half_idx = base_neuron_idx % half_rotary_size;
+
+    // Multiple tokens processed by the same threadblock
+    const int token_idx = blockIdx.y * tokens_per_block + block_seq_idx;
+    const bool valid_token = token_idx < batch_desc.batch_metadata->n_tokens;
+
+    const bool valid_thread = valid_token && (head_group.thread_rank() < real_threads_per_head);
+    const bool load_inv_freq = (inv_freq != nullptr) && valid_thread;
+
+    // If we have GQA, then only one of the Q heads needs to do rotary + copy
+    // for each of the heads in the group.
+    bool need_kv = head_idx % qRatio == 0;
+    // Make sure the following code is warp uniform
+    need_kv = warp.shfl(need_kv, 0);
+
+    const int kv_head_idx = head_idx / qRatio;
+
+    // Ensure we don't access invalid portions of the seq_metadata
+    const int32_t seq_id = (valid_thread) ? batch_desc.tokens_to_seq[token_idx] : 0;
+    const InflightSeqDescriptor seq_desc = batch_desc.seq_metadata[seq_id];
+    // This will give an invalid index if valid_thread is false, but should never affect memory.
+    const int32_t global_token_idx = seq_desc.seen_tokens + (token_idx - seq_desc.start_idx);
+
+    T* q_row = q + token_idx * qkv_stride + head_idx * headSize;
+    T q_reg[vector_T];
+
+    if (need_kv) {
+        // The following logic assumes a linearly blocked KV cache. This means that no sparsity has
+        // been introduced into cache history.
+        const KVCacheDescriptor kv_desc = batch_desc.kv_desc;
+        const int32_t seq_kv_block_idx = global_token_idx / kv_desc.block_size;
+        const int32_t mapped_kv_block_idx =
+            (valid_thread) ? kv_desc.block_lists[seq_id][seq_kv_block_idx] : 0;
+
+        const int32_t kv_block_offset = global_token_idx % kv_desc.block_size;
+        const int32_t kv_offset =
+            (mapped_kv_block_idx * kv_desc.block_size + kv_block_offset) * kv_cache_stride +
+            kv_head_idx * headSize;
+
+        // Load indices from QKV output
+        T* k_row = k + token_idx * qkv_stride + kv_head_idx * headSize;
+        T* v_row = v + token_idx * qkv_stride + kv_head_idx * headSize;
+
+        T k_reg[vector_T], v_reg[vector_T], inv_freq_reg[vector_T];
+
+        mem_access::load_global<kv_rot::granularity>(q_reg, q_row + base_neuron_idx, valid_thread);
+        mem_access::load_global<kv_rot::granularity>(k_reg, k_row + base_neuron_idx, valid_thread);
+        mem_access::load_global<kv_rot::granularity>(v_reg, v_row + base_neuron_idx, valid_thread);
+        mem_access::load_global<kv_rot::granularity>(
+            inv_freq_reg, inv_freq + half_idx, load_inv_freq);
+        if constexpr (doRotary) {
+#pragma unroll
+            for (int i = 0; i < vector_T; i++) {
+                const int head_neuron_idx = base_neuron_idx + i;
+
+                float inv_freq_flt;
+                if (inv_freq != nullptr) {
+                    inv_freq_flt = conversion::to<float>(inv_freq_reg[i]) * (float)global_token_idx;
+                } else {
+                    inv_freq_flt =
+                        (float)((head_neuron_idx % half_rotary_size) * 2) / (float)rotary_dim;
+                    // Conversion to T and back means that both branches of this if statement
+                    // will produce the same results if using the same algo for producing the
+                    // freqs.
+                    T trunc_freq = conversion::to<T>(1.0 / powf(theta_base, inv_freq_flt));
+                    inv_freq_flt = conversion::to<float>(trunc_freq) * (float)global_token_idx;
+                }
+
+                float rotary_sign = (head_neuron_idx >= half_rotary_size) ? -1.0f : 1.0f;
+                float q_f = conversion::to<float>(q_reg[i]);
+                float k_f = conversion::to<float>(k_reg[i]);
+                float q_rot = q_f * rotary_sign;
+                float k_rot = k_f * rotary_sign;
+
+                const int target_lane = (head_neuron_idx < half_rotary_size)
+                                            ? head_group.thread_rank() + half_dim_lanes
+                                            : head_group.thread_rank() - half_dim_lanes;
+
+                const float q_rot_temp = head_group.shfl(q_rot, target_lane);
+                const float k_rot_temp = head_group.shfl(k_rot, target_lane);
+
+                if (base_neuron_idx < rotary_dim) {
+                    q_reg[i] = conversion::to<T>(q_f * cosf(inv_freq_flt) +
+                                                 q_rot_temp * sinf(inv_freq_flt));
+                    k_reg[i] = conversion::to<T>(k_f * cosf(inv_freq_flt) +
+                                                 k_rot_temp * sinf(inv_freq_flt));
+                }
+            }
+        }
+
+        if (valid_thread) {
+            mem_access::store_global<kv_rot::granularity>(kv_cache + kv_offset + base_neuron_idx,
+                                                          k_reg);
+            mem_access::store_global<kv_rot::granularity>(
+                kv_cache + kv_offset + base_neuron_idx + v_offset, v_reg);
+        }
+    } else {
+        T inv_freq_reg[vector_T];
+
+        mem_access::load_global<kv_rot::granularity>(q_reg, q_row + base_neuron_idx, valid_thread);
+        mem_access::load_global<kv_rot::granularity>(
+            inv_freq_reg, inv_freq + half_idx, load_inv_freq);
+
+        if constexpr (doRotary) {
+#pragma unroll
+            for (int i = 0; i < vector_T; i++) {
+                const int head_neuron_idx = base_neuron_idx + i;
+
+                float inv_freq_flt;
+                if (inv_freq != nullptr) {
+                    inv_freq_flt = conversion::to<float>(inv_freq_reg[i]) * (float)global_token_idx;
+                } else {
+                    inv_freq_flt =
+                        (float)((head_neuron_idx % half_rotary_size) * 2) / (float)rotary_dim;
+                    inv_freq_flt = 1.0 / powf(theta_base, inv_freq_flt) * (float)global_token_idx;
+                }
+
+                float rotary_sign = (head_neuron_idx >= half_rotary_size) ? -1.0f : 1.0f;
+                float q_f = conversion::to<float>(q_reg[i]);
+                float q_rot = q_f * rotary_sign;
+
+                const int target_lane = (head_neuron_idx < half_rotary_size)
+                                            ? head_group.thread_rank() + half_dim_lanes
+                                            : head_group.thread_rank() - half_dim_lanes;
+
+                const float q_rot_temp = head_group.shfl(q_rot, target_lane);
+                if (base_neuron_idx < rotary_dim)
+                    q_reg[i] = conversion::to<T>(q_f * cosf(inv_freq_flt) +
+                                                 q_rot_temp * sinf(inv_freq_flt));
+            }
+        }
+    }
+
+    if (valid_thread && doRotary) {
+        mem_access::store_global<kv_rot::granularity>(q_row + base_neuron_idx, q_reg);
+    }
+}
+
+#define DISPATCH_KV_ROTARY_IMPL(Q_RATIO, HEAD_SIZE, PADDED_HEAD_SIZE)       \
+    if (q_ratio == Q_RATIO && head_size == HEAD_SIZE)                       \
+        kv_rotary_pos_kernel<T, Q_RATIO, HEAD_SIZE, true, PADDED_HEAD_SIZE> \
+            <<<grid, block, 0, stream>>>(kv_cache,                          \
+                                         q,                                 \
+                                         k,                                 \
+                                         v,                                 \
+                                         inv_freq,                          \
+                                         rotary_dim,                        \
+                                         theta_base,                        \
+                                         batch_desc,                        \
+                                         qkv_stride,                        \
+                                         kv_cache_stride,                   \
+                                         v_offset,                          \
+                                         inv_freq_stride);
+
+#define LAUNCH_KV_ROTARY_FOR_Q_RATIO_HEAD_SIZE(Q_RATIO, HEAD_SIZE) \
+    if (padded_head_size == 64) {                                  \
+        DISPATCH_KV_ROTARY_IMPL(Q_RATIO, HEAD_SIZE, 64);           \
+    } else if (padded_head_size == 128) {                          \
+        DISPATCH_KV_ROTARY_IMPL(Q_RATIO, HEAD_SIZE, 128);          \
+    } else {                                                       \
+        assert(false);                                             \
+    }
+
+#define LAUNCH_KV_ROTARY_FOR_Q_RATIO(Q_RATIO)                 \
+    if (head_size == 64) {                                    \
+        LAUNCH_KV_ROTARY_FOR_Q_RATIO_HEAD_SIZE(Q_RATIO, 64);  \
+    } else if (head_size == 80) {                             \
+        LAUNCH_KV_ROTARY_FOR_Q_RATIO_HEAD_SIZE(Q_RATIO, 80);  \
+    } else if (head_size == 128) {                            \
+        LAUNCH_KV_ROTARY_FOR_Q_RATIO_HEAD_SIZE(Q_RATIO, 128); \
+    } else {                                                  \
+        assert(false);                                        \
+    }
+
+template <typename T>
+void launch_kv_rotary_kernel(T* kv_cache,
+                             T* q,
+                             T* k,
+                             T* v,
+                             T* inv_freq,
+                             const int32_t rotary_dim,
+                             const float theta_base,
+                             const BatchWrapperCPP batch_desc,
+                             const int qkv_stride,
+                             const int kv_cache_stride,
+                             const int v_offset,
+                             const int inv_freq_stride,
+                             const int q_ratio,
+                             const int head_size,
+                             const int n_tokens,
+                             const int n_q_heads,
+                             cudaStream_t stream)
+{
+    constexpr int vector_T = kv_rot::granularity / sizeof(T);
+
+    const int padded_head_size = next_pow2(head_size);
+    const int threads_per_head = padded_head_size / vector_T;
+
+    const int tokens_per_block = kv_rot::threads / threads_per_head;
+
+    const dim3 block(kv_rot::threads);
+    const int token_blocks = (n_tokens + tokens_per_block - 1) / tokens_per_block;
+    const dim3 grid(n_q_heads, token_blocks);
+
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(1)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(2)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(4)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(5)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(8)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(16)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(29)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(35)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(36)
+    LAUNCH_KV_ROTARY_FOR_Q_RATIO(71)
+}
+
+#define INSTANTIATE_KV_ROTARY_KERNEL(TYPE)                                        \
+    template void launch_kv_rotary_kernel<TYPE>(TYPE * kv_cache,                  \
+                                                TYPE * q,                         \
+                                                TYPE * k,                         \
+                                                TYPE * v,                         \
+                                                TYPE * inv_freq,                  \
+                                                const int32_t rotary_dim,         \
+                                                const float theta_base,           \
+                                                const BatchWrapperCPP batch_desc, \
+                                                const int qkv_stride,             \
+                                                const int kv_cache_stride,        \
+                                                const int v_offset,               \
+                                                const int inv_freq_stride,        \
+                                                const int q_ratio,                \
+                                                const int head_size,              \
+                                                const int n_tokens,               \
+                                                const int n_q_heads,              \
+                                                cudaStream_t stream);
+
+INSTANTIATE_KV_ROTARY_KERNEL(__half)
+
+#ifdef BF16_AVAILABLE
+INSTANTIATE_KV_ROTARY_KERNEL(__nv_bfloat16)
+#endif
+
+#define DISPATCH_KV_COPY_IMPL(Q_RATIO, HEAD_SIZE, PADDED_HEAD_SIZE)          \
+    if (q_ratio == Q_RATIO && head_size == HEAD_SIZE)                        \
+        kv_rotary_pos_kernel<T, Q_RATIO, HEAD_SIZE, false, PADDED_HEAD_SIZE> \
+            <<<grid, block, 0, stream>>>(kv_cache,                           \
+                                         q,                                  \
+                                         k,                                  \
+                                         v,                                  \
+                                         nullptr,                            \
+                                         -1,                                 \
+                                         0.f,                                \
+                                         batch_desc,                         \
+                                         qkv_stride,                         \
+                                         kv_cache_stride,                    \
+                                         v_offset,                           \
+                                         0);
+
+#define LAUNCH_KV_COPY_FOR_Q_RATIO_HEAD_SIZE(Q_RATIO, HEAD_SIZE) \
+    if (padded_head_size == 64) {                                \
+        DISPATCH_KV_COPY_IMPL(Q_RATIO, HEAD_SIZE, 64);           \
+    } else if (padded_head_size == 128) {                        \
+        DISPATCH_KV_COPY_IMPL(Q_RATIO, HEAD_SIZE, 128);          \
+    } else {                                                     \
+        assert(false);                                           \
+    }
+
+#define LAUNCH_KV_COPY_FOR_Q_RATIO(Q_RATIO)                 \
+    if (head_size == 64) {                                  \
+        LAUNCH_KV_COPY_FOR_Q_RATIO_HEAD_SIZE(Q_RATIO, 64);  \
+    } else if (head_size == 80) {                           \
+        LAUNCH_KV_COPY_FOR_Q_RATIO_HEAD_SIZE(Q_RATIO, 80);  \
+    } else if (head_size == 128) {                          \
+        LAUNCH_KV_COPY_FOR_Q_RATIO_HEAD_SIZE(Q_RATIO, 128); \
+    } else {                                                \
+        assert(false);                                      \
+    }
+
+template <typename T>
+void launch_kv_copy_kernel(T* kv_cache,
+                           T* q,
+                           T* k,
+                           T* v,
+                           const BatchWrapperCPP batch_desc,
+                           const int qkv_stride,
+                           const int kv_cache_stride,
+                           const int v_offset,
+                           const int q_ratio,
+                           const int head_size,
+                           const int n_tokens,
+                           const int n_q_heads,
+                           cudaStream_t stream)
+{
+    constexpr int vector_T = kv_rot::granularity / sizeof(T);
+    const int padded_head_size = next_pow2(head_size);
+    const int threads_per_head = padded_head_size / vector_T;
+    const int tokens_per_block = kv_rot::threads / threads_per_head;
+
+    const dim3 block(kv_rot::threads);
+    const int token_blocks = (n_tokens + tokens_per_block - 1) / tokens_per_block;
+    const dim3 grid(n_q_heads, token_blocks);
+
+    LAUNCH_KV_COPY_FOR_Q_RATIO(1)
+    LAUNCH_KV_COPY_FOR_Q_RATIO(2)
+    LAUNCH_KV_COPY_FOR_Q_RATIO(4)
+    LAUNCH_KV_COPY_FOR_Q_RATIO(5)
+    LAUNCH_KV_COPY_FOR_Q_RATIO(8)
+}
+
+#define INSTANTIATE_KV_COPY_KERNEL(TYPE)                                        \
+    template void launch_kv_copy_kernel<TYPE>(TYPE * kv_cache,                  \
+                                              TYPE * q,                         \
+                                              TYPE * k,                         \
+                                              TYPE * v,                         \
+                                              const BatchWrapperCPP batch_desc, \
+                                              const int qkv_stride,             \
+                                              const int kv_cache_stride,        \
+                                              const int v_offset,               \
+                                              const int q_ratio,                \
+                                              const int head_size,              \
+                                              const int n_tokens,               \
+                                              const int n_q_heads,              \
+                                              cudaStream_t stream);
+
+INSTANTIATE_KV_COPY_KERNEL(__half)
+
+#ifdef BF16_AVAILABLE
+INSTANTIATE_KV_COPY_KERNEL(__nv_bfloat16)
+#endif

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/linear_blocked_kv_rotary/blocked_trained_kv_rotary.py

@@ -0,0 +1,76 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+import torch
+
+from ....inference_utils import DtypeEnum
+from deepspeed.ops.op_builder import RaggedOpsBuilder
+from ....ragged import RaggedBatchWrapper
+from ... import DSKernelBase
+
+
+class BlockedTrainedRotaryEmbeddings(DSKernelBase):
+    """
+    CUDA Kernel implementation that will perform rotary position embeddings on the queries and keys
+    before copying into a blocked KV cache.
+    """
+
+    supported_dtypes = [DtypeEnum.fp16, DtypeEnum.bf16]
+    supported_head_sizes = [64, 80, 128]
+    supported_q_ratios = [1, 2, 4, 5, 8]
+
+    def __init__(self, head_size: int, n_q_heads: int, n_kv_heads: int, dtype: torch.dtype) -> None:
+        """
+        Args:
+            head_size: The size of the attention head.
+            dtype: Data type for the input/output. Supported values are torch.float16 and torch.bfloat16.
+        """
+
+        q_ratio = n_q_heads // n_kv_heads
+
+        if head_size not in BlockedTrainedRotaryEmbeddings.supported_head_sizes:
+            raise ValueError("Unsupported head size: {}, supported_head_sizes are {}".format(
+                head_size, BlockedTrainedRotaryEmbeddings.supported_head_sizes))
+
+        if q_ratio not in BlockedTrainedRotaryEmbeddings.supported_q_ratios:
+            raise ValueError("Unsupported q_ratio: {}, supported_q_ratios are {}".format(
+                q_ratio, BlockedTrainedRotaryEmbeddings.supported_q_ratios))
+
+        if not isinstance(dtype, DtypeEnum):
+            dtype = DtypeEnum(dtype)
+
+        if dtype not in BlockedTrainedRotaryEmbeddings.supported_dtypes:
+            raise ValueError("Unsupported data type: {}, supported_dtypes are {}".format(
+                dtype, BlockedTrainedRotaryEmbeddings.supported_dtypes))
+
+        inf_module = RaggedOpsBuilder().load()
+        self.kernel = inf_module.kv_trained_rotary_embeddings
+        self.head_size = head_size
+        self.n_q_heads = n_q_heads
+        self.n_kv_heads = n_kv_heads
+
+    def __call__(self, kv_cache: torch.Tensor, qkv: torch.Tensor, ragged_batch: RaggedBatchWrapper,
+                 inverse_freqs: torch.Tensor) -> None:
+        """
+        Perform rotary embeddings on the queries and keys before copying into a blocked KV cache.
+
+        Args:
+            kv_cache (torch.Tensor): Pre-allocated KV cache of [num_blocks, block_size, 2, n_kv_heads, head_size]
+            qkv: Input tensor of shape [num_tokens, head_size * (n_q_heads + 2 * n_kv_heads)]
+            ragged_batch: Wrapper for the ragged batch.
+            inverse_freqs: Inverse frequencies for the rotary embeddings. Shape [max_seq_len, rotary_dim // 2]
+        """
+
+        q = qkv[:, :self.head_size * self.n_q_heads]
+        k = qkv[:, self.head_size * self.n_q_heads:self.head_size * (self.n_q_heads + self.n_kv_heads)]
+        v = qkv[:, self.head_size * (self.n_q_heads + self.n_kv_heads):]
+
+        self.kernel(kv_cache, q, k, v, inverse_freqs, ragged_batch.batch_metadata_buffer(),
+                    ragged_batch.inflight_seq_descriptors(), ragged_batch.tokens_to_seq(), ragged_batch.kv_ptrs())

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/linear_blocked_kv_rotary/linear_blocked_kv_copy.py

@@ -0,0 +1,74 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+import torch
+
+from ....inference_utils import DtypeEnum
+from ....ragged import RaggedBatchWrapper
+from deepspeed.ops.op_builder import RaggedOpsBuilder
+from ... import DSKernelBase
+
+
+class LinearBlockedKVCopy(DSKernelBase):
+    """
+    CUDA Kernel implementation that will perform rotary position embeddings on the queries and keys
+    before copying into a blocked KV cache.
+    """
+
+    supported_dtypes = [DtypeEnum.fp16, DtypeEnum.bf16]
+    supported_head_sizes = [64, 80, 128]
+    supported_q_ratios = [1, 2, 4, 5, 8]
+
+    def __init__(self, head_size: int, n_q_heads: int, n_kv_heads: int, dtype: torch.dtype) -> None:
+        """
+        Args:
+            head_size: The size of the attention head.
+            dtype: Data type for the input/output. Supported values are torch.float16 and torch.bfloat16.
+        """
+
+        q_ratio = n_q_heads // n_kv_heads
+
+        if head_size not in LinearBlockedKVCopy.supported_head_sizes:
+            raise ValueError("Unsupported head size: {}, supported_head_sizes are {}".format(
+                head_size, LinearBlockedKVCopy.supported_head_sizes))
+
+        if q_ratio not in LinearBlockedKVCopy.supported_q_ratios:
+            raise ValueError("Unsupported q_ratio: {}, supported_q_ratios are {}".format(
+                q_ratio, LinearBlockedKVCopy.supported_q_ratios))
+
+        if not isinstance(dtype, DtypeEnum):
+            dtype = DtypeEnum(dtype)
+
+        if dtype not in LinearBlockedKVCopy.supported_dtypes:
+            raise ValueError("Unsupported data type: {}, supported_dtypes are {}".format(
+                dtype, LinearBlockedKVCopy.supported_dtypes))
+
+        inf_module = RaggedOpsBuilder().load()
+        self.kernel = inf_module.linear_kv_copy
+        self.head_size = head_size
+        self.n_q_heads = n_q_heads
+        self.n_kv_heads = n_kv_heads
+
+    def __call__(self, kv_cache: torch.Tensor, qkv: torch.Tensor, ragged_batch: RaggedBatchWrapper) -> None:
+        """
+        Perform rotary embeddings on the queries and keys before copying into a blocked KV cache.
+
+        Args:
+            kv_cache (torch.Tensor): Pre-allocated KV cache of [num_blocks, block_size, 2, n_kv_heads, head_size]
+            qkv: Input tensor of shape [num_tokens, head_size * (n_q_heads + 2 * n_kv_heads)]
+            ragged_batch: Wrapper for the ragged batch.
+        """
+
+        q = qkv[:, :self.head_size * self.n_q_heads]
+        k = qkv[:, self.head_size * self.n_q_heads:self.head_size * (self.n_q_heads + self.n_kv_heads)]
+        v = qkv[:, self.head_size * (self.n_q_heads + self.n_kv_heads):]
+
+        self.kernel(kv_cache, q, k, v, ragged_batch.batch_metadata_buffer(), ragged_batch.inflight_seq_descriptors(),
+                    ragged_batch.tokens_to_seq(), ragged_batch.kv_ptrs())

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/ragged_ops.cpp

@@ -0,0 +1,48 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include <torch/extension.h>
+
+#include "atom_builder.h"
+#include "blocked_flash.h"
+#include "blocked_kv_rotary.h"
+#include "embed.h"
+#include "logits_gather.h"
+#include "moe_gather.h"
+#include "moe_scatter.h"
+#include "top_k_gating.h"
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    // atom_builder.h
+    m.def("build_atoms", &build_atoms, "Host kernel for building the atoms.");
+
+    // blocked_flash.h
+    m.def("flash_attn_by_atoms",
+          &flash_attn_by_atoms,
+          "Blocked flash attention scheduled with atoms");
+
+    // blocked_kv_rotary.h
+    m.def("kv_rotary_embeddings", &kv_rotary_embeddings, "KV rotary embedding for blocked KV");
+    m.def("kv_trained_rotary_embeddings",
+          &kv_trained_rotary_embeddings,
+          "KV rotary embeddings for blocked KV");
+    m.def("linear_kv_copy", &linear_kv_copy, "Linear copy for blocked KV");
+
+    // embed.h
+    m.def("ragged_embed", &ragged_embed, "Embedding lookup for ragged batch");
+
+    // logits_gather.h
+    m.def("gather_for_logits", &gather_for_logits, "Sparse gather from ragged batch");
+
+    // moe_gather.h
+    m.def("moe_gather", &moe_gather, "MoE gather for top-1-gating.");
+
+    // moe_scatter.h
+    m.def("moe_scatter", &moe_scatter, "MoE scatter for top-1-gating.");
+
+    // top_k_gating.h
+    m.def("top_k_gating", &top_k_gating, "Top-1 gating for MoE with ragged batch awareness.");
+}

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/top_k_gating/__init__.py

@@ -0,0 +1,6 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from .top_k_gating import RaggedTopKGating

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/top_k_gating/top_k_gating.cpp

@@ -0,0 +1,61 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include "top_k_gating.h"
+#include <c10/cuda/CUDAStream.h>
+
+#define DISPATCH_TOP_K_GATING(T_TYPE, C_TYPE)                   \
+    if (logits.options().dtype() == torch::T_TYPE) {            \
+        launch_top_k_gating((int32_t*)expert_counts.data_ptr(), \
+                            (float*)scores.data_ptr(),          \
+                            (int32_t*)assignments.data_ptr(),   \
+                            (int32_t*)offsets.data_ptr(),       \
+                            (const C_TYPE*)logits.data_ptr(),   \
+                            batch_metadata_ptr,                 \
+                            n_tokens,                           \
+                            n_experts,                          \
+                            n_top_k,                            \
+                            at::cuda::getCurrentCUDAStream());  \
+        return;                                                 \
+    }
+
+/*
+Perform softmax plus atomics in order to do first pass of top_k_gating.
+*/
+void top_k_gating(torch::Tensor& expert_counts,
+                  torch::Tensor& scores,
+                  torch::Tensor& assignments,
+                  torch::Tensor& offsets,
+                  torch::Tensor& logits,
+                  torch::Tensor& batch_metadata)
+{
+    const int32_t n_tokens = scores.size(0);
+    const int32_t n_top_k = scores.size(1);
+
+    // Should have the same buffer size for scores, offsets, and assignments
+    TORCH_CHECK(n_tokens == offsets.size(0));
+    TORCH_CHECK(n_tokens == logits.size(0));
+    TORCH_CHECK(n_tokens == assignments.size(0));
+
+    TORCH_CHECK(n_top_k == offsets.size(1));
+    TORCH_CHECK(n_top_k == assignments.size(1));
+
+    TORCH_CHECK(expert_counts.scalar_type() == torch::kInt32);
+    TORCH_CHECK(scores.scalar_type() == torch::kFloat);
+    TORCH_CHECK(assignments.scalar_type() == torch::kInt32);
+    TORCH_CHECK(offsets.scalar_type() == torch::kInt32);
+
+    const int32_t n_experts = logits.size(1);
+    const RaggedBatchDescriptor* batch_metadata_ptr =
+        reinterpret_cast<const RaggedBatchDescriptor*>(batch_metadata.data_ptr());
+
+    DISPATCH_TOP_K_GATING(kFloat, float)
+    DISPATCH_TOP_K_GATING(kHalf, __half)
+#ifdef BF16_AVAILABLE
+    DISPATCH_TOP_K_GATING(kBFloat16, __nv_bfloat16)
+#endif
+
+    TORCH_CHECK(false, "Unsupported dtype for logits in top_k_gating");
+}

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/top_k_gating/top_k_gating.cuh

@@ -0,0 +1,25 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+#include "ds_kernel_utils.h"
+#include "ragged_dtypes.h"
+
+namespace gating {
+constexpr int unassigned = -1;
+}  // namespace gating
+
+template <typename T>
+void launch_top_k_gating(int32_t* expert_counts,
+                         float* scores,
+                         int32_t* assignments,
+                         int32_t* offsets,
+                         const T* logits,
+                         const RaggedBatchDescriptor* batch_metadata,
+                         const int32_t n_tokens,
+                         const int32_t n_experts,
+                         const int32_t n_top_k,
+                         cudaStream_t stream);

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/top_k_gating/top_k_gating.h

@@ -0,0 +1,21 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+#include <c10/cuda/CUDAStream.h>
+#include <torch/extension.h>
+#include "ragged_dtypes.h"
+#include "top_k_gating.cuh"
+
+/*
+Perform softmax plus atomics to get token mapping.
+*/
+void top_k_gating(torch::Tensor& expert_counts,
+                  torch::Tensor& scores,
+                  torch::Tensor& assignments,
+                  torch::Tensor& offsets,
+                  torch::Tensor& logits,
+                  torch::Tensor& batch_metadata);

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/top_k_gating/top_k_gating.py

@@ -0,0 +1,59 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+import torch
+
+from typing import Tuple
+
+from ... import DSKernelBase
+from ....inference_utils import DtypeEnum
+from ....ragged import RaggedBatchWrapper
+from deepspeed.ops.op_builder import RaggedOpsBuilder
+
+
+class RaggedTopKGating(DSKernelBase):
+    """
+    CUDA implementation of top-1 gating. This will perform a softmax on the logits,
+    and return the scale as well as its idx within that expert's allocation.
+    """
+
+    supported_logit_dtypes = [DtypeEnum.fp16, DtypeEnum.bf16, DtypeEnum.fp32]
+
+    def __init__(self, logit_dtype: DtypeEnum) -> None:
+
+        if not isinstance(logit_dtype, DtypeEnum):
+            logit_dtype = DtypeEnum(logit_dtype)
+
+        if logit_dtype not in RaggedTopKGating.supported_logit_dtypes:
+            raise RuntimeError(f"Unsupported logit dtype {logit_dtype}")
+
+        inf_module = RaggedOpsBuilder().load()
+        self.kernel = inf_module.top_k_gating
+
+    def __call__(self, expert_counts: torch.Tensor, scores: torch.Tensor, assignments: torch.Tensor,
+                 offsets: torch.Tensor, logits: torch.Tensor,
+                 batch: RaggedBatchWrapper) -> Tuple[torch.Tensor, torch.Tensor, torch.Tensor, torch.Tensor]:
+        """
+        Perform the ragged top_k_gating.
+
+        Arguments:
+            expert_counts (torch.Tensor): Tensor of 0s of shape [n_experts] to be filled with
+                number of tokens assigned to each expert. This must be filled with 0s else
+                the copy kernel will buffer overflow. In order to minimize the zero-fill cost,
+                it is recommended to write to 0 during the MoE output remapping.
+            scores (torch.Tensor): Preallocated output of shape [n_tokens, n_top_k] to place expert scaling
+                value.
+            expert_assignment (torch.Tensor): Preallocated output of shape [n_tokens, n_top_k] to place
+                which expert a token has been assigned to.
+            expert_offset (torch.Tensor): Preallocated output of shape [n_tokens, n_top_k] to place which
+                offset within an experts group a token is.
+            logits (torch.Tensor): Raw logits of gating function.
+            batch (RaggedBatchWrapper): Batch information for ragged tensor.
+
+        Returns:
+            tuple of (expert_counts, scores, expert_assignment, expert_offset)
+        """
+        self.kernel(expert_counts, scores, assignments, offsets, logits, batch.batch_metadata_buffer())
+        return expert_counts, scores, assignments, offsets

venv/lib/python3.10/site-packages/deepspeed/inference/v2/kernels/ragged_ops/top_k_gating/top_k_gating_cuda.cu

@@ -0,0 +1,125 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include "conversion_utils.h"
+#include "memory_access_utils.h"
+#include "reduction_utils.h"
+#include "top_k_gating.cuh"
+#include "top_k_utils.h"
+
+using ROp = reduce::ROpType;
+
+template <typename T, int TOP_K>
+__global__ void top_k_gating_kernel(int32_t* expert_counts,
+                                    float* scores,
+                                    int32_t* assignments,
+                                    int32_t* offsets,
+                                    const T* logits,
+                                    const RaggedBatchDescriptor* batch_metadata,
+                                    const int32_t n_experts)
+{
+    const int32_t token_idx = blockIdx.x;
+    const int32_t expert_idx = threadIdx.x;
+    const int32_t max_warps = 1024 / hw_warp_size;
+
+    // CG helpers
+    cg::thread_block tb = cg::this_thread_block();
+    cg::thread_block_tile<hw_warp_size> warp = cg::tiled_partition<hw_warp_size>(tb);
+
+    // Padding tokens do not require
+    if (token_idx >= batch_metadata->n_tokens) {
+        if (threadIdx.x == 0) {
+#pragma unroll
+            for (int i = 0; i < TOP_K; i++) {
+                assignments[token_idx * TOP_K + i] = gating::unassigned;
+                offsets[token_idx * TOP_K + i] = gating::unassigned;
+            }
+        }
+        return;
+    }
+
+    const T* token_logits = logits + token_idx * n_experts;
+
+    float logit_val;
+    if (expert_idx < n_experts) {
+        logit_val = conversion::to<float>(token_logits[expert_idx]);
+    } else {
+        reduce::init<ROp::Max>(&logit_val);
+    }
+    float reduce_val = logit_val;
+
+    int32_t local_assigned_experts[TOP_K];
+    float local_assigned_logits[TOP_K];
+
+    // Training code tends to use ``torch.argmax`` to select the expert, which
+    // which has ties broken by the lower index. Since our fused comparison algorithm
+    // breaks ties by the higher index (since it's the lower 32-bits of the 64-bit
+    // comparison), we invert the expert index to break ties by the lower index.
+    int32_t inverted_expert = n_experts - expert_idx - 1;
+
+    // Find the top k logits
+    for (int i = 0; i < TOP_K; ++i) {
+        const reduce::IdxReduceResult res =
+            reduce::idx_reduce<ROp::Max, max_warps>(tb, warp, reduce_val, inverted_expert);
+        local_assigned_experts[i] = n_experts - res.idx - 1;
+        local_assigned_logits[i] = res.val;
+
+        // Set the max logit to -inf so that it is not selected again
+        if (threadIdx.x == n_experts - res.idx - 1) { reduce::init<ROp::Max>(&reduce_val); }
+    }
+
+    const float max_logit = local_assigned_logits[0];
+    float softmax_sum = __expf(logit_val - max_logit);
+    reduce::block<ROp::Add>(tb, warp, softmax_sum);
+
+    for (int i = 0; i < TOP_K; ++i) {
+        const float softmax = __expf(local_assigned_logits[i] - max_logit) / softmax_sum;
+
+        if (threadIdx.x == 0) {
+            scores[token_idx * TOP_K + i] = softmax;
+            assignments[token_idx * TOP_K + i] = local_assigned_experts[i];
+            offsets[token_idx * TOP_K + i] =
+                atomicAdd(expert_counts + local_assigned_experts[i], 1);
+        }
+    }
+}
+
+template <typename T>
+void launch_top_k_gating(int32_t* expert_counts,
+                         float* scores,
+                         int32_t* assignments,
+                         int32_t* offsets,
+                         const T* logits,
+                         const RaggedBatchDescriptor* batch_metadata,
+                         const int32_t n_tokens,
+                         const int32_t n_experts,
+                         const int32_t n_top_k,
+                         cudaStream_t stream)
+{
+    const dim3 grid(n_tokens);
+    const dim3 block(((n_experts + hw_warp_size - 1) / hw_warp_size) * hw_warp_size);
+
+    TOP_K_SWITCH(n_top_k, [&] {
+        top_k_gating_kernel<T, CONST_TOP_K><<<grid, block, 0, stream>>>(
+            expert_counts, scores, assignments, offsets, logits, batch_metadata, n_experts);
+    });
+}
+
+#define INSTANTIATE_top_k_KERNEL(T)                                                   \
+    template void launch_top_k_gating<T>(int32_t * expert_counts,                     \
+                                         float* scores,                               \
+                                         int32_t* assignments,                        \
+                                         int32_t* offsets,                            \
+                                         const T* logits,                             \
+                                         const RaggedBatchDescriptor* batch_metadata, \
+                                         const int32_t n_tokens,                      \
+                                         const int32_t n_experts,                     \
+                                         const int32_t n_top_k,                       \
+                                         cudaStream_t stream);
+
+INSTANTIATE_top_k_KERNEL(float) INSTANTIATE_top_k_KERNEL(__half)
+#ifdef BF16_AVAILABLE
+    INSTANTIATE_top_k_KERNEL(__nv_bfloat16)
+#endif

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/llama_v2/__init__.py

@@ -0,0 +1,6 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from .policy import Llama2Policy

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/llama_v2/container.py

@@ -0,0 +1,78 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+# Create a container object to save model-specific tensors using the policy file above.
+
+from ..common_parameters import *
+from ..layer_container_base import LayerContainer
+'''
+ # HF Llama model looks like this:
+
+LlamaForCausalLM(
+  (model): LlamaModel(
+    (embed_tokens): Embedding(32000, 4096, padding_idx=0)
+    (layers): ModuleList(
+      (0-31): 32 x LlamaDecoderLayer(
+        (self_attn): LlamaAttention(
+          (q_proj): Linear(in_features=4096, out_features=4096, bias=False)
+          (k_proj): Linear(in_features=4096, out_features=4096, bias=False)
+          (v_proj): Linear(in_features=4096, out_features=4096, bias=False)
+          (o_proj): Linear(in_features=4096, out_features=4096, bias=False)
+          (rotary_emb): LlamaRotaryEmbedding()
+        )
+        (mlp): LlamaMLP(
+          (gate_proj): Linear(in_features=4096, out_features=11008, bias=False)
+          (up_proj): Linear(in_features=4096, out_features=11008, bias=False)
+          (down_proj): Linear(in_features=11008, out_features=4096, bias=False)
+          (act_fn): SiLUActivation()
+        )
+        (input_layernorm): LlamaRMSNorm()
+        (post_attention_layernorm): LlamaRMSNorm()
+      )
+    )
+    (norm): LlamaRMSNorm()
+  )
+  (lm_head): Linear(in_features=4096, out_features=32000, bias=False)
+)
+'''
+
+
+class Llama2TransformerContainer(LayerContainer):
+    """
+        Transformer layer container for the Llama-2 model.
+    """
+    qkv_w: UnfusedQKVParameter
+    attn_out_w: AttentionOutputParameter
+    mlp_1_w: GatedMLPParameter
+    mlp_2_w: MLP2Parameter
+    attn_norm_gamma: NormParameter
+    mlp_norm_gamma: NormParameter
+
+    PARAM_MAPPING = {
+        "self_attn.q_proj.weight": "qkv_w.q_params",
+        "self_attn.k_proj.weight": "qkv_w.k_params",
+        "self_attn.v_proj.weight": "qkv_w.v_params",
+        "self_attn.o_proj.weight": "attn_out_w.params",
+        "mlp.gate_proj.weight": "mlp_1_w.gate_params",
+        "mlp.up_proj.weight": "mlp_1_w.up_params",
+        "mlp.down_proj.weight": "mlp_2_w.params",
+        "input_layernorm.weight": "attn_norm_gamma.params",
+        "post_attention_layernorm.weight": "mlp_norm_gamma.params",
+    }
+
+
+class Llama2NonTransformerContainer(LayerContainer):
+    """
+        Non-Transformer layer container for the Llama-2 model.
+    """
+    word_emb: EmbeddingParameter
+    word_unembed: UnembedParameter
+    final_norm: NormParameter
+
+    PARAM_MAPPING = {
+        "model.embed_tokens.weight": "word_emb.params",
+        "model.norm.weight": "final_norm.params",
+        "lm_head.weight": "word_unembed.params",
+    }

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/llama_v2/model.py

@@ -0,0 +1,209 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from typing import Iterable, Optional, Tuple
+
+import torch
+
+import deepspeed.comm as dist
+
+from ...allocator import empty_from
+from ...inference_utils import ActivationType, DtypeEnum
+from .. import *
+from ...modules.configs import *
+from ...modules.interfaces import *
+from ...ragged import RaggedBatchWrapper
+
+from .container import Llama2NonTransformerContainer, Llama2TransformerContainer
+
+
+class Llama2InferenceModel(DSTransformerModelBase):
+    """
+    Inference model implementation for ragged batching for Llama-2 models.
+    """
+
+    _non_transformer: Optional[Llama2NonTransformerContainer]
+    """
+    Embed + unembed container. Specializing the type annotation.
+    """
+
+    _transformer: Optional[Iterable[Llama2TransformerContainer]]
+    """
+    Per-layer transformer container. Specializing the type annotation.
+    """
+    """
+    Properties ineherited from `DSInferenceModelBase`
+    """
+
+    @property
+    def max_sequence_length(self) -> int:
+        return self._config.max_seq_length
+
+    """
+    Properties ineherited from `DSTransformerModelBase`
+    """
+
+    @property
+    def num_layers(self) -> int:
+        return self._config.num_hidden_layers
+
+    @property
+    def model_dim(self) -> int:
+        return self._config.hidden_size
+
+    @property
+    def vocab_size(self) -> int:
+        return self._config.vocab_size
+
+    @property
+    def head_size(self) -> int:
+        return self.model_dim // self.n_heads
+
+    @property
+    def n_heads(self) -> int:
+        return self._config.num_attention_heads
+
+    @property
+    def intermediate_dim(self) -> int:
+        return self._config.intermediate_size
+
+    @property
+    def n_heads_kv(self) -> int:
+        return self._config.num_key_value_heads
+
+    @property
+    def activation_dtype(self) -> DtypeEnum:
+        if self._config.torch_dtype == torch.float16:
+            return DtypeEnum.fp16
+        elif self._config.torch_dtype == torch.bfloat16:
+            return DtypeEnum.bf16
+        else:
+            raise NotImplementedError("Only fp16 and bf16 are supported")
+
+    @property
+    def mlp_activation_fn(self) -> ActivationType:
+        activation = self._config.hidden_act.lower()
+        # llama model family is special and is always gated so force gated versions of relu, gelu, silu
+        if activation == "gelu":
+            return ActivationType.GEGLU
+        elif activation == "relu":
+            return ActivationType.ReGLU
+        elif activation == "gegelu":
+            return ActivationType.GEGLU
+        elif activation == "silu":
+            return ActivationType.SiGLU
+        else:
+            raise NotImplementedError(f"Activation {activation} not supported")
+
+    @property
+    def norm_type(self) -> NormTypeEnum:
+        return NormTypeEnum.RMSNorm
+
+    @property
+    def positional_embedding_type(self) -> PositionalEmbeddingType:
+        return PositionalEmbeddingType.rotate_half
+
+    @property
+    def positional_embedding_config(self) -> Optional[RotateHalfConfig]:
+        return RotateHalfConfig(theta_base=self._config.rope_theta)
+
+    """
+    Forward implementations
+    """
+
+    def _forward_embed(self, ragged_batch: RaggedBatchWrapper) -> torch.Tensor:
+        """
+        Performs the embedding lookup prior to running the transformer of the model.
+
+        Arguments:
+            ragged_batch (RaggedBatchWrapper): The batch to embed.
+
+        Returns:
+            torch.Tensor: The embedded batch.
+        """
+        embed = self.embed(ragged_batch, self._non_transformer.word_emb)
+
+        if embed.shape[-1] != self.model_dim:
+            raise ValueError(f"Embedding output shape {embed.shape} does not match model_dim {self.model_dim}")
+
+        return embed
+
+    def _forward_transformer_layer(self, layer_idx: int, residual: torch.Tensor, hidden_states: torch.Tensor,
+                                   ragged_batch_info: RaggedBatchWrapper) -> Tuple[torch.Tensor, torch.Tensor]:
+        """
+        Executes one (slightly offset) layer of the transformer. This implementation does a peak-ahead
+        optimization to fuse the layer norm of the next layer into the current layer.
+
+        Arguments:
+            layer_idx (int): The index of the layer to execute.
+            residual (torch.Tensor): The residual tensor from the previous layer.
+            hidden_states (torch.Tensor): The hidden states from the previous layer. This is the
+                hidden states after pre normalization.
+            ragged_batch_info (RaggedBatchWrapper): The batch metadata.
+        """
+        # TODO(cmikeh2): Distribute ragged_batch_info to all modules
+
+        cur_params = self._transformer[layer_idx]
+        kv_cache = self.state_manager.get_cache(layer_idx)
+
+        hidden_states = self.qkv(hidden_states, cur_params.qkv_w, b=None)
+        hidden_states = self.attn(hidden_states, kv_cache, ragged_batch_info)
+        hidden_states = self.attn_out(hidden_states, cur_params.attn_out_w, b=None)
+
+        if self.tp_size > 1:
+            dist.all_reduce(hidden_states, group=self._base_mp_group)
+
+        residual, hidden_states = self.norm(residual, hidden_states, cur_params.mlp_norm_gamma, beta=None)
+
+        # Should be configurable in the future
+        hidden_states = self.mlp_1(hidden_states, cur_params.mlp_1_w, b=None)
+        hidden_states = self.mlp_2(hidden_states, cur_params.mlp_2_w, b=None)
+
+        if self.tp_size > 1:
+            dist.all_reduce(hidden_states, group=self._base_mp_group)
+
+        if layer_idx != self.num_layers - 1:
+            next_params = self._transformer[layer_idx + 1]
+            residual, hidden_states = self.norm(residual, hidden_states, next_params.attn_norm_gamma, beta=None)
+        else:
+            # On last layer, we just need to perform the residual add. Adding into the residual
+            # here is safe.
+            residual.add_(hidden_states)
+
+        return residual, hidden_states
+
+    def _forward_unembed(self, hidden_states: torch.Tensor, ragged_batch_info: RaggedBatchWrapper) -> torch.Tensor:
+        """
+        Performs unembedding of the hidden states to logits. This will only sample the final
+        token of each sequence.
+        """
+        logits = self.unembed(hidden_states,
+                              self._non_transformer.word_unembed,
+                              ragged_batch_info,
+                              gamma=self._non_transformer.final_norm)
+
+        if self.tp_size > 1:
+            comm_buffer = empty_from(self._comm_logits, (self.tp_size, logits.shape[0], logits.shape[1]))
+            full_logits = empty_from(self._return_logits, (logits.shape[0], self.vocab_size))
+
+            dist.all_gather_into_tensor(comm_buffer, logits, group=self._base_mp_group)
+
+            full_logits.copy_(comm_buffer.permute(1, 0, 2).reshape(logits.shape[0], self.vocab_size))
+
+            return full_logits
+        else:
+            return logits
+
+    def forward(self, wrapped_batch: RaggedBatchWrapper) -> torch.Tensor:
+
+        residual = self._forward_embed(wrapped_batch)
+
+        residual, hidden_states = self.norm(residual, None, self._transformer[0].attn_norm_gamma, beta=None)
+
+        for layer_idx in range(self.num_layers):
+            residual, hidden_states = self._forward_transformer_layer(layer_idx, residual, hidden_states,
+                                                                      wrapped_batch)
+
+        return self._forward_unembed(residual, wrapped_batch)

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/llama_v2/policy.py

@@ -0,0 +1,31 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from typing import Any
+
+from ...config_v2 import RaggedInferenceEngineConfig
+from ..inference_policy_base import ContainerMap, InferenceV2Policy
+from .container import Llama2NonTransformerContainer, Llama2TransformerContainer
+from .model import Llama2InferenceModel
+
+
+class Llama2Policy(InferenceV2Policy):
+
+    def instantiate_model(self, engine_config: RaggedInferenceEngineConfig, mp_group: Any) -> Llama2InferenceModel:
+        return Llama2InferenceModel(config=self._model_config, engine_config=engine_config, base_mp_group=mp_group)
+
+    def build_container_map(self) -> ContainerMap:
+        map = ContainerMap()
+
+        transformer_containers = [Llama2TransformerContainer(self.model) for _ in range(self.model.num_layers)]
+
+        map.set_transformer_params(['model.layers'], transformer_containers)
+
+        map.set_non_transformer_params(Llama2NonTransformerContainer(self.model))
+
+        map.set_unmapped_params(
+            [f'model.layers.{i}.self_attn.rotary_emb.inv_freq' for i in range(self.model.num_layers)])
+
+        return map

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/mistral/__init__.py

@@ -0,0 +1,6 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from .policy import MistralPolicy

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/mistral/container.py

@@ -0,0 +1,77 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+# Create a container object to save model-specific tensors using the policy file above.
+
+from deepspeed.inference.v2.model_implementations.common_parameters import *
+from deepspeed.inference.v2.model_implementations.layer_container_base import LayerContainer
+'''
+ # HF Mistral model (mistralai/Mistral-7B-v0.1) looks like this:
+MistralForCausalLM(
+  (model): MistralModel(
+    (embed_tokens): Embedding(32000, 4096)
+    (layers): ModuleList(
+      (0-31): 32 x MistralDecoderLayer(
+        (self_attn): MistralAttention(
+          (q_proj): Linear(in_features=4096, out_features=4096, bias=False)
+          (k_proj): Linear(in_features=4096, out_features=1024, bias=False)
+          (v_proj): Linear(in_features=4096, out_features=1024, bias=False)
+          (o_proj): Linear(in_features=4096, out_features=4096, bias=False)
+          (rotary_emb): MistralRotaryEmbedding()
+        )
+        (mlp): MistralMLP(
+          (gate_proj): Linear(in_features=4096, out_features=14336, bias=False)
+          (up_proj): Linear(in_features=4096, out_features=14336, bias=False)
+          (down_proj): Linear(in_features=14336, out_features=4096, bias=False)
+          (act_fn): SiLUActivation()
+        )
+        (input_layernorm): MistralRMSNorm()
+        (post_attention_layernorm): MistralRMSNorm()
+      )
+    )
+    (norm): MistralRMSNorm()
+  )
+  (lm_head): Linear(in_features=4096, out_features=32000, bias=False)
+)
+'''
+
+
+class MistralTransformerContainer(LayerContainer):
+    """
+        Transformer layer container for the Mistral model.
+    """
+    qkv_w: UnfusedQKVParameter
+    attn_out_w: AttentionOutputParameter
+    mlp_1_w: GatedMLPParameter
+    mlp_2_w: MLP2Parameter
+    attn_norm_gamma: NormParameter
+    mlp_norm_gamma: NormParameter
+
+    PARAM_MAPPING = {
+        "self_attn.q_proj.weight": "qkv_w.q_params",
+        "self_attn.k_proj.weight": "qkv_w.k_params",
+        "self_attn.v_proj.weight": "qkv_w.v_params",
+        "self_attn.o_proj.weight": "attn_out_w.params",
+        "mlp.gate_proj.weight": "mlp_1_w.gate_params",
+        "mlp.up_proj.weight": "mlp_1_w.up_params",
+        "mlp.down_proj.weight": "mlp_2_w.params",
+        "input_layernorm.weight": "attn_norm_gamma.params",
+        "post_attention_layernorm.weight": "mlp_norm_gamma.params",
+    }
+
+
+class MistralNonTransformerContainer(LayerContainer):
+    """
+        Non-Transformer layer container for the Mistral model.
+    """
+    word_emb: EmbeddingParameter
+    word_unembed: UnembedParameter
+    final_norm: NormParameter
+
+    PARAM_MAPPING = {
+        "model.embed_tokens.weight": "word_emb.params",
+        "model.norm.weight": "final_norm.params",
+        "lm_head.weight": "word_unembed.params",
+    }

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/mistral/model.py

@@ -0,0 +1,207 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from typing import Iterable, Optional, Tuple
+
+import torch
+
+import deepspeed.comm as dist
+
+from ...allocator import empty_from
+from ...inference_utils import ActivationType, DtypeEnum
+from ...model_implementations import *
+from ...modules.configs import *
+from ...modules.interfaces import *
+from ...ragged import RaggedBatchWrapper
+
+from .container import MistralNonTransformerContainer, MistralTransformerContainer
+
+
+class MistralInferenceModel(DSTransformerModelBase):
+    """
+    Inference model implementation for ragged batching for Mistral models.
+    """
+
+    _non_transformer: Optional[MistralNonTransformerContainer]
+    """
+    Embed + unembed container. Specializing the type annotation.
+    """
+
+    _transformer: Optional[Iterable[MistralTransformerContainer]]
+    """
+    Per-layer transformer container. Specializing the type annotation.
+    """
+    """
+    Properties ineherited from `DSInferenceModelBase`
+    """
+
+    @property
+    def max_sequence_length(self) -> int:
+        return self._config.max_seq_length
+
+    """
+    Properties ineherited from `DSTransformerModelBase`
+    """
+
+    @property
+    def num_layers(self) -> int:
+        return self._config.num_hidden_layers
+
+    @property
+    def model_dim(self) -> int:
+        return self._config.hidden_size
+
+    @property
+    def vocab_size(self) -> int:
+        return self._config.vocab_size
+
+    @property
+    def head_size(self) -> int:
+        return self.model_dim // self.n_heads
+
+    @property
+    def n_heads(self) -> int:
+        return self._config.num_attention_heads
+
+    @property
+    def intermediate_dim(self) -> int:
+        return self._config.intermediate_size
+
+    @property
+    def n_heads_kv(self) -> int:
+        return self._config.num_key_value_heads
+
+    @property
+    def activation_dtype(self) -> DtypeEnum:
+        if self._config.torch_dtype == torch.float16:
+            return DtypeEnum.fp16
+        elif self._config.torch_dtype == torch.bfloat16:
+            return DtypeEnum.bf16
+        else:
+            raise NotImplementedError("Only fp16 and bf16 are supported")
+
+    @property
+    def mlp_activation_fn(self) -> ActivationType:
+        activation = self._config.hidden_act.lower()
+        if activation == "gelu":
+            return ActivationType.GEGLU
+        elif activation == "relu":
+            return ActivationType.ReGLU
+        elif activation == "gegelu":
+            return ActivationType.GEGLU
+        elif activation == "silu":
+            return ActivationType.SiGLU
+        else:
+            raise NotImplementedError(f"Activation {activation} not supported")
+
+    @property
+    def norm_type(self) -> NormTypeEnum:
+        return NormTypeEnum.RMSNorm
+
+    @property
+    def positional_embedding_type(self) -> PositionalEmbeddingType:
+        return PositionalEmbeddingType.rotate_half
+
+    @property
+    def positional_embedding_config(self) -> Optional[RotateHalfConfig]:
+        return RotateHalfConfig(theta_base=self._config.rope_theta)
+
+    """
+    Forward implementations
+    """
+
+    def _forward_embed(self, ragged_batch: RaggedBatchWrapper) -> torch.Tensor:
+        """
+        Performs the embedding lookup prior to running the transformer of the model.
+
+        Arguments:
+            ragged_batch (RaggedBatchWrapper): The batch to embed.
+
+        Returns:
+            torch.Tensor: The embedded batch.
+        """
+        embed = self.embed(ragged_batch, self._non_transformer.word_emb)
+
+        if embed.shape[-1] != self.model_dim:
+            raise ValueError(f"Embedding output shape {embed.shape} does not match model_dim {self.model_dim}")
+
+        return embed
+
+    def _forward_transformer(self, layer_idx: int, residual: torch.Tensor, hidden_states: torch.Tensor,
+                             ragged_batch_info: RaggedBatchWrapper) -> Tuple[torch.Tensor, torch.Tensor]:
+        """
+        Executes one (slightly offset) layer of the transformer. This implementation does a peak-ahead
+        optimization to fuse the layer norm of the next layer into the current layer.
+
+        Arguments:
+            layer_idx (int): The index of the layer to execute.
+            residual (torch.Tensor): The residual tensor from the previous layer.
+            hidden_states (torch.Tensor): The hidden states from the previous layer. This is the
+                hidden states after pre normalization.
+            ragged_batch_info (RaggedBatchWrapper): The batch metadata.
+        """
+        # TODO(cmikeh2): Distribute ragged_batch_info to all modules
+
+        cur_params = self._transformer[layer_idx]
+        kv_cache = self.state_manager.get_cache(layer_idx)
+
+        hidden_states = self.qkv(hidden_states, cur_params.qkv_w, b=None)
+        hidden_states = self.attn(hidden_states, kv_cache, ragged_batch_info)
+        hidden_states = self.attn_out(hidden_states, cur_params.attn_out_w, b=None)
+
+        if self.tp_size > 1:
+            dist.all_reduce(hidden_states, group=self._base_mp_group)
+
+        residual, hidden_states = self.norm(residual, hidden_states, cur_params.mlp_norm_gamma, beta=None)
+
+        # Should be configurable in the future
+        hidden_states = self.mlp_1(hidden_states, cur_params.mlp_1_w, b=None)
+        hidden_states = self.mlp_2(hidden_states, cur_params.mlp_2_w, b=None)
+
+        if self.tp_size > 1:
+            dist.all_reduce(hidden_states, group=self._base_mp_group)
+
+        if layer_idx != self.num_layers - 1:
+            next_params = self._transformer[layer_idx + 1]
+            residual, hidden_states = self.norm(residual, hidden_states, next_params.attn_norm_gamma, beta=None)
+        else:
+            # On last layer, we just need to perform the residual add. Adding into the residual
+            # here is safe.
+            residual.add_(hidden_states)
+
+        return residual, hidden_states
+
+    def _forward_unembed(self, hidden_states: torch.Tensor, ragged_batch_info: RaggedBatchWrapper) -> torch.Tensor:
+        """
+        Performs unembedding of the hidden states to logits. This will only sample the final
+        token of each sequence.
+        """
+        logits = self.unembed(hidden_states,
+                              self._non_transformer.word_unembed,
+                              ragged_batch_info,
+                              gamma=self._non_transformer.final_norm)
+
+        if self.tp_size > 1:
+            comm_buffer = empty_from(self._comm_logits, (self.tp_size, logits.shape[0], logits.shape[1]))
+            full_logits = empty_from(self._return_logits, (logits.shape[0], self.vocab_size))
+
+            dist.all_gather_into_tensor(comm_buffer, logits, group=self._base_mp_group)
+
+            full_logits.copy_(comm_buffer.permute(1, 0, 2).reshape(logits.shape[0], self.vocab_size))
+
+            return full_logits
+        else:
+            return logits
+
+    def forward(self, wrapped_batch: RaggedBatchWrapper) -> torch.Tensor:
+
+        residual = self._forward_embed(wrapped_batch)
+
+        residual, hidden_states = self.norm(residual, None, self._transformer[0].attn_norm_gamma, beta=None)
+
+        for layer_idx in range(self.num_layers):
+            residual, hidden_states = self._forward_transformer(layer_idx, residual, hidden_states, wrapped_batch)
+
+        return self._forward_unembed(residual, wrapped_batch)

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/mistral/policy.py

@@ -0,0 +1,30 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+from typing import Any
+
+from ...config_v2 import RaggedInferenceEngineConfig
+from ..inference_policy_base import ContainerMap, InferenceV2Policy
+from .container import MistralNonTransformerContainer, MistralTransformerContainer
+from .model import MistralInferenceModel
+
+
+class MistralPolicy(InferenceV2Policy):
+
+    def instantiate_model(self, engine_config: RaggedInferenceEngineConfig, mp_group: Any) -> MistralInferenceModel:
+        return MistralInferenceModel(config=self._model_config, engine_config=engine_config, base_mp_group=mp_group)
+
+    def build_container_map(self) -> ContainerMap:
+        map = ContainerMap()
+
+        transformer_containers = [MistralTransformerContainer(self.model) for _ in range(self.model.num_layers)]
+
+        map.set_transformer_params(['model.layers'], transformer_containers)
+
+        map.set_non_transformer_params(MistralNonTransformerContainer(self.model))
+
+        map.set_unmapped_params([])
+
+        return map

venv/lib/python3.10/site-packages/deepspeed/inference/v2/model_implementations/sharding/embedding.py

@@ -0,0 +1,34 @@
+# Copyright (c) Microsoft Corporation.
+# SPDX-License-Identifier: Apache-2.0
+
+# DeepSpeed Team
+
+import torch
+
+from .types import ShardingType
+from .utils import shard_param, get_shard_endpoints
+
+
+def shard_embedding_param(param: torch.Tensor, shard_rank: int, num_shards: int) -> torch.Tensor:
+    """
+    Utility method for sharding an embedding parameter.
+
+    Args:
+        param (torch.Tensor): The parameter to shard. Should be of shape [vocab_size, model_dim]
+        shard_rank (int): Which shard of the partitioned tensor to return.
+        num_shards (int): The total number of shards the parameter is distributed across.
+    """
+    return shard_param(param, ShardingType.INNER_DIMENSION, shard_rank, num_shards)
+
+
+def sharded_embedding_dim(embedding_size: int, shard_rank: int, num_shards: int) -> int:
+    """
+    Utility method for getting the size of the embedding dimension of a sharded embedding.
+
+    Args:
+        embedding_size (int): The size of the embedding.
+        shard_rank (int): Which shard of the partitioned tensor to return.
+        num_shards (int): The total number of shards the parameter is distributed across.
+    """
+    start_idx, end_idx = get_shard_endpoints(embedding_size, shard_rank, num_shards)
+    return end_idx - start_idx