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venv/lib/python3.10/site-packages/deepspeed/ops/csrc/adagrad/cpu_adagrad.cpp

@@ -0,0 +1,256 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include "cpu_adagrad.h"
+#include <torch/extension.h>
+#include <iostream>
+#include <memory>
+#include <type_traits>
+#include <unordered_map>
+#if defined(__ENABLE_CUDA__)
+#include <cuda_runtime_api.h>
+#include "cublas_v2.h"
+#include "cuda.h"
+#include "curand.h"
+#include "custom_cuda_layers.h"
+#endif
+
+static std::unordered_map<int, std::shared_ptr<void>> s_optimizers;
+
+// C++ interface
+
+void Adagrad_Optimizer::Step_1(float* _params,
+                               float* grads,
+                               float* _exp_avg_sq,
+                               size_t _param_size,
+                               ds_half_precision_t* dev_params,
+                               bool half_precision)
+{
+    size_t rounded_size = 0;
+#if defined(__AVX512__) or defined(__AVX256__)
+    Step_AVX<1>(
+        &rounded_size, _params, grads, _exp_avg_sq, _param_size, dev_params, half_precision);
+#endif
+    if (_param_size > rounded_size) {
+        float step_size = -1 * _alpha;
+        ds_half_precision_t* grads_cast_h;
+        ds_half_precision_t* params_cast_h;
+        if (half_precision) {
+            grads_cast_h = reinterpret_cast<ds_half_precision_t*>(grads);
+            params_cast_h = reinterpret_cast<ds_half_precision_t*>(_params);
+        }
+        for (size_t t = rounded_size; t < _param_size; t += TILE) {
+            size_t copy_size = TILE;
+            if ((t + TILE) > _param_size) copy_size = _param_size - t;
+            size_t offset = copy_size + t;
+#if defined(__ENABLE_CUDA__)
+            if ((t / TILE) >= 2) { cudaStreamSynchronize(_streams[_buf_index]); }
+#elif defined(__ENABLE_CANN__)
+            if ((t / TILE) >= 2) { aclrtSynchronizeStream(_streams[_buf_index].stream()); }
+#endif
+#pragma omp parallel for
+            for (size_t k = t; k < offset; k++) {
+                float grad = half_precision ? (float)grads_cast_h[k] : grads[k];
+                float param = half_precision ? (float)params_cast_h[k] : _params[k];
+                float momentum = grads[k];
+                float variance = _exp_avg_sq[k];
+                if (_weight_decay > 0) { grad = param * _weight_decay + grad; }
+
+                variance += grad * grad;
+
+                grad = sqrt(variance);
+                grad += _eps;
+                grad = momentum / grad;
+                param = grad * step_size + param;
+#if defined(__ENABLE_CUDA__) or defined(__ENABLE_CANN__)
+                if (dev_params) _doubled_buffer[_buf_index][k - t] = param;
+#endif
+                if (half_precision)
+                    params_cast_h[k] = (ds_half_precision_t)param;
+                else
+                    _params[k] = param;
+                // STORE UPDATE TERM TO GRAD'S MEMORY
+                grads[k] = grad * step_size;
+                _exp_avg_sq[k] = variance;
+            }
+#if defined(__ENABLE_CUDA__)
+            if (dev_params) {
+                launch_param_update(
+                    _doubled_buffer[_buf_index], dev_params + t, (copy_size), _streams[_buf_index]);
+                _buf_index = !_buf_index;
+            }
+#elif defined(__ENABLE_CANN__)
+            if (dev_params) {
+                size_t memcpy_size = copy_size * sizeof(_doubled_buffer[_buf_index][0]);
+                aclrtMemcpy(dev_params + t,
+                            memcpy_size,
+                            _doubled_buffer[_buf_index],
+                            memcpy_size,
+                            aclrtMemcpyKind::ACL_MEMCPY_HOST_TO_DEVICE);
+
+                _buf_index = !_buf_index;
+            }
+#endif
+        }
+    }
+}
+
+void Adagrad_Optimizer::Step_4(float* _params,
+                               float* grads,
+                               float* _exp_avg_sq,
+                               size_t _param_size,
+                               ds_half_precision_t* dev_params,
+                               bool half_precision)
+{
+    size_t rounded_size = 0;
+#if defined(__AVX512__) or defined(__AVX256__)
+    Step_AVX<4>(
+        &rounded_size, _params, grads, _exp_avg_sq, _param_size, dev_params, half_precision);
+#endif
+    if (_param_size > rounded_size)
+        Step_1((_params + rounded_size),
+               (grads + rounded_size),
+               (_exp_avg_sq + rounded_size),
+               (_param_size - rounded_size),
+               (dev_params != nullptr ? (dev_params + rounded_size) : dev_params),
+               half_precision);
+}
+
+int create_adagrad_optimizer(int optimizer_id,
+                             float alpha = 1e-2,
+                             float eps = 1e-8,
+                             float weight_decay = 0,
+                             bool should_log = false)
+{
+    auto opt = std::make_shared<Adagrad_Optimizer>(alpha, eps, weight_decay);
+
+    s_optimizers[optimizer_id] = opt;
+
+    if (should_log) {
+        std::string avx_type = "";
+#if defined(__AVX512__)
+        avx_type = "AVX512";
+#else
+#if defined(__AVX256__)
+        avx_type = "AVX2";
+#else
+        avx_type = "scalar";
+#endif
+#endif
+
+        printf("Adagrad Optimizer #%d is created with %s arithmetic capability.\n",
+               optimizer_id,
+               avx_type.c_str());
+        printf("Config: alpha=%f, weight_decay=%f\n", alpha, weight_decay);
+    }
+
+    return 0;
+}
+
+void Adagrad_Optimizer::Step_8(float* _params,
+                               float* grads,
+                               float* _exp_avg_sq,
+                               size_t _param_size,
+                               ds_half_precision_t* dev_params,
+                               bool half_precision)
+{
+    size_t rounded_size = 0;
+#if defined(__AVX512__) or defined(__AVX256__)
+    Step_AVX<8>(
+        &rounded_size, _params, grads, _exp_avg_sq, _param_size, dev_params, half_precision);
+#endif
+    if (_param_size > rounded_size)
+        Step_4((_params + rounded_size),
+               (grads + rounded_size),
+               (_exp_avg_sq + rounded_size),
+               (_param_size - rounded_size),
+               (dev_params != nullptr ? (dev_params + rounded_size) : dev_params),
+               half_precision);
+}
+
+int ds_adagrad_step(int optimizer_id,
+                    size_t step,
+                    float lr,
+                    float epsilon,
+                    float weight_decay,
+                    torch::Tensor& params,
+                    torch::Tensor& grads,
+                    torch::Tensor& exp_avg_sq)
+{
+    auto params_c = params.contiguous();
+    auto grads_c = grads.contiguous();
+    auto exp_avg_sq_c = exp_avg_sq.contiguous();
+
+    float* params_ptr = (float*)params_c.data_ptr();
+    float* grads_ptr = (float*)grads_c.data_ptr();
+    float* exp_avg_sq_ptr = (float*)exp_avg_sq_c.data_ptr();
+
+    std::shared_ptr<Adagrad_Optimizer> opt =
+        std::static_pointer_cast<Adagrad_Optimizer>(s_optimizers[optimizer_id]);
+    opt->IncrementStep(step);
+    opt->update_state(lr, epsilon, weight_decay);
+    opt->Step_8(params_ptr, grads_ptr, exp_avg_sq_ptr, params_c.numel());
+
+#if defined(__ENABLE_CUDA__) or defined(__ENABLE_CANN__)
+    opt->SynchronizeStreams();
+#endif
+    return 0;
+}
+
+int ds_adagrad_step_plus_copy(int optimizer_id,
+                              size_t step,
+                              float lr,
+                              float epsilon,
+                              float weight_decay,
+                              torch::Tensor& params,
+                              torch::Tensor& grads,
+                              torch::Tensor& exp_avg_sq,
+                              torch::Tensor& gpu_params)
+{
+#if defined(__ENABLE_CUDA__) or defined(__ENABLE_CANN__)
+    auto params_c = params.contiguous();
+    auto gpu_params_c = gpu_params.contiguous();
+    auto exp_avg_sq_c = exp_avg_sq.contiguous();
+    auto grads_c = grads.contiguous();
+
+    float* params_ptr = (float*)params_c.data_ptr();
+    float* grads_ptr = (float*)grads_c.data_ptr();
+    ds_half_precision_t* gpu_params_ptr = (ds_half_precision_t*)gpu_params_c.data_ptr();
+    float* exp_avg_sq_ptr = (float*)exp_avg_sq_c.data_ptr();
+
+    std::shared_ptr<Adagrad_Optimizer> opt =
+        std::static_pointer_cast<Adagrad_Optimizer>(s_optimizers[optimizer_id]);
+    opt->IncrementStep(step);
+    opt->update_state(lr, epsilon, weight_decay);
+    opt->Step_8(params_ptr,
+                grads_ptr,
+                exp_avg_sq_ptr,
+                params_c.numel(),
+                gpu_params_ptr,
+                (params.options().dtype() == at::kHalf));
+
+    opt->SynchronizeStreams();
+#else
+    assert(false);
+#endif
+    return 0;
+}
+
+int destroy_adagrad_optimizer(int optimizer_id)
+{
+    s_optimizers.erase(optimizer_id);
+
+    return 0;
+}
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    m.def("adagrad_update", &ds_adagrad_step, "DeepSpeed CPU Adagrad update (C++)");
+    m.def("adagrad_update_copy",
+          &ds_adagrad_step_plus_copy,
+          "DeepSpeed CPU Adagrad update and param copy (C++)");
+    m.def("create_adagrad", &create_adagrad_optimizer, "DeepSpeed CPU Adagrad (C++)");
+    m.def("destroy_adagrad", &destroy_adagrad_optimizer, "DeepSpeed CPU Adagrad destroy (C++)");
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/adam/cpu_adam.cpp

@@ -0,0 +1,16 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include "cpu_adam.h"
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    m.def("adam_update", &ds_adam_step, "DeepSpeed CPU Adam update (C++)");
+    m.def("adam_update_copy",
+          &ds_adam_step_plus_copy,
+          "DeepSpeed CPU Adam update and param copy (C++)");
+    m.def("create_adam", &create_adam_optimizer, "DeepSpeed CPU Adam (C++)");
+    m.def("destroy_adam", &destroy_adam_optimizer, "DeepSpeed CPU Adam destroy (C++)");
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/adam/cpu_adam_impl.cpp

@@ -0,0 +1,312 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include <torch/extension.h>
+#include <cassert>
+#include <iostream>
+#include <memory>
+#include <type_traits>
+#include <unordered_map>
+#include "cpu_adam.h"
+
+#if defined(__ENABLE_CUDA__)
+#include <cuda_runtime_api.h>
+#include "cublas_v2.h"
+#include "cuda.h"
+#include "curand.h"
+#include "custom_cuda_layers.h"
+#endif
+
+static std::unordered_map<int, std::shared_ptr<void>> s_optimizers;
+
+// C++ interface
+
+void Adam_Optimizer::Step_1(float* _params,
+                            float* grads,
+                            float* _exp_avg,
+                            float* _exp_avg_sq,
+                            size_t _param_size,
+                            ds_half_precision_t* dev_params,
+                            bool half_precision)
+{
+    size_t rounded_size = 0;
+#if defined(__AVX512__) or defined(__AVX256__)
+    Step_AVX<1>(&rounded_size,
+                _params,
+                grads,
+                _exp_avg,
+                _exp_avg_sq,
+                _param_size,
+                dev_params,
+                half_precision);
+#endif
+    if (_param_size > rounded_size) {
+        float betta1_minus1 = 1 - _betta1;
+        float betta2_minus1 = 1 - _betta2;
+
+        float step_size = -1 * _alpha / _bias_correction1;
+        float w_decay = -1 * _alpha * _weight_decay;
+        ds_half_precision_t* grads_cast_h;
+        ds_half_precision_t* params_cast_h;
+        if (half_precision) {
+            grads_cast_h = reinterpret_cast<ds_half_precision_t*>(grads);
+            params_cast_h = reinterpret_cast<ds_half_precision_t*>(_params);
+        }
+
+        for (size_t t = rounded_size; t < _param_size; t += TILE) {
+            size_t copy_size = TILE;
+            if ((t + TILE) > _param_size) copy_size = _param_size - t;
+            size_t offset = copy_size + t;
+#if defined(__ENABLE_CUDA__)
+            if ((t / TILE) >= 2) { cudaStreamSynchronize(_streams[_buf_index]); }
+#elif defined(__ENABLE_CANN__)
+            if ((t / TILE) >= 2) { aclrtSynchronizeStream(_streams[_buf_index].stream()); }
+#endif
+#pragma omp parallel for
+            for (size_t k = t; k < offset; k++) {
+                float grad = half_precision ? (float)grads_cast_h[k] : grads[k];
+                float param = half_precision ? (float)params_cast_h[k] : _params[k];
+                float momentum = _exp_avg[k];
+                float variance = _exp_avg_sq[k];
+                if (_weight_decay > 0 && !_adamw_mode) { grad = param * _weight_decay + grad; }
+                momentum = momentum * _betta1;
+                momentum = grad * betta1_minus1 + momentum;
+
+                variance = variance * _betta2;
+                grad = grad * grad;
+                variance = grad * betta2_minus1 + variance;
+
+                grad = sqrt(variance);
+                grad = grad * _bias_correction2 + _eps;
+                grad = momentum / grad;
+                if (_weight_decay > 0 && _adamw_mode) { param += w_decay * param; }
+                param = grad * step_size + param;
+#if defined(__ENABLE_CUDA__) or defined(__ENABLE_CANN__)
+                if (dev_params) _doubled_buffer[_buf_index][k - t] = param;
+#endif
+                if (half_precision)
+                    params_cast_h[k] = (ds_half_precision_t)param;
+                else
+                    _params[k] = param;
+                _exp_avg[k] = momentum;
+                _exp_avg_sq[k] = variance;
+            }
+#if defined(__ENABLE_CUDA__)
+            if (dev_params) {
+                launch_param_update(
+                    _doubled_buffer[_buf_index], dev_params + t, (copy_size), _streams[_buf_index]);
+
+                _buf_index = !_buf_index;
+            }
+#elif defined(__ENABLE_CANN__)
+            if (dev_params) {
+                size_t memcpy_size = copy_size * sizeof(_doubled_buffer[_buf_index][0]);
+                aclrtMemcpy(dev_params + t,
+                            memcpy_size,
+                            _doubled_buffer[_buf_index],
+                            memcpy_size,
+                            aclrtMemcpyKind::ACL_MEMCPY_HOST_TO_DEVICE);
+
+                _buf_index = !_buf_index;
+            }
+#endif
+        }
+    }
+}
+
+void Adam_Optimizer::Step_4(float* _params,
+                            float* grads,
+                            float* _exp_avg,
+                            float* _exp_avg_sq,
+                            size_t _param_size,
+                            ds_half_precision_t* dev_params,
+                            bool half_precision)
+{
+    size_t rounded_size = 0;
+#if defined(__AVX512__) or defined(__AVX256__)
+    Step_AVX<4>(&rounded_size,
+                _params,
+                grads,
+                _exp_avg,
+                _exp_avg_sq,
+                _param_size,
+                dev_params,
+                half_precision);
+#endif
+    if (_param_size > rounded_size)
+        Step_1((_params + rounded_size),
+               (grads + rounded_size),
+               (_exp_avg + rounded_size),
+               (_exp_avg_sq + rounded_size),
+               (_param_size - rounded_size),
+               (dev_params != nullptr ? (dev_params + rounded_size) : dev_params),
+               half_precision);
+}
+
+int create_adam_optimizer(int optimizer_id,
+                          float alpha,
+                          float betta1,
+                          float betta2,
+                          float eps,
+                          float weight_decay,
+                          bool adamw_mode,
+                          bool should_log)
+{
+    auto opt =
+        std::make_shared<Adam_Optimizer>(alpha, betta1, betta2, eps, weight_decay, adamw_mode);
+
+    s_optimizers[optimizer_id] = opt;
+
+    if (should_log) {
+        std::string avx_type = "";
+#if defined(__AVX512__)
+        avx_type = "AVX512";
+#else
+#if defined(__AVX256__)
+        avx_type = "AVX2";
+#else
+        avx_type = "scalar";
+#endif
+#endif
+
+        printf("Adam Optimizer #%d is created with %s arithmetic capability.\n",
+               optimizer_id,
+               avx_type.c_str());
+        printf("Config: alpha=%f, betas=(%f, %f), weight_decay=%f, adam_w=%d\n",
+               alpha,
+               betta1,
+               betta2,
+               weight_decay,
+               (int)adamw_mode);
+    }
+
+    return 0;
+}
+
+void Adam_Optimizer::Step_8(float* _params,
+                            float* grads,
+                            float* _exp_avg,
+                            float* _exp_avg_sq,
+                            size_t _param_size,
+                            ds_half_precision_t* dev_params,
+                            bool half_precision)
+{
+    size_t rounded_size = 0;
+#if defined(__AVX512__) or defined(__AVX256__)
+    Step_AVX<8>(&rounded_size,
+                _params,
+                grads,
+                _exp_avg,
+                _exp_avg_sq,
+                _param_size,
+                dev_params,
+                half_precision);
+#endif
+    if (_param_size > rounded_size)
+        Step_4((_params + rounded_size),
+               (grads + rounded_size),
+               (_exp_avg + rounded_size),
+               (_exp_avg_sq + rounded_size),
+               (_param_size - rounded_size),
+               (dev_params != nullptr ? (dev_params + rounded_size) : dev_params),
+               half_precision);
+}
+
+int ds_adam_step(int optimizer_id,
+                 size_t step,
+                 float lr,
+                 float beta1,
+                 float beta2,
+                 float epsilon,
+                 float weight_decay,
+                 bool bias_correction,
+                 torch::Tensor& params,
+                 torch::Tensor& grads,
+                 torch::Tensor& exp_avg,
+                 torch::Tensor& exp_avg_sq)
+{
+    auto params_c = params.contiguous();
+    auto grads_c = grads.contiguous();
+    auto exp_avg_c = exp_avg.contiguous();
+    auto exp_avg_sq_c = exp_avg_sq.contiguous();
+
+    // assert(params.options().dtype() == grads.options().dtype());
+
+    float* params_ptr = (float*)params_c.data_ptr();
+    float* grads_ptr = (float*)grads_c.data_ptr();
+    float* exp_avg_ptr = (float*)exp_avg_c.data_ptr();
+    float* exp_avg_sq_ptr = (float*)exp_avg_sq_c.data_ptr();
+
+    std::shared_ptr<Adam_Optimizer> opt =
+        std::static_pointer_cast<Adam_Optimizer>(s_optimizers[optimizer_id]);
+    opt->IncrementStep(step, beta1, beta2);
+    opt->update_state(lr, epsilon, weight_decay, bias_correction);
+
+    opt->Step_8(params_ptr,
+                grads_ptr,
+                exp_avg_ptr,
+                exp_avg_sq_ptr,
+                params_c.numel(),
+                nullptr,
+                (params.options().dtype() == at::kHalf));
+
+#if defined(__ENABLE_CUDA__) or defined(__ENABLE_CANN__)
+    opt->SynchronizeStreams();
+#endif
+    return 0;
+}
+
+int ds_adam_step_plus_copy(int optimizer_id,
+                           size_t step,
+                           float lr,
+                           float beta1,
+                           float beta2,
+                           float epsilon,
+                           float weight_decay,
+                           bool bias_correction,
+                           torch::Tensor& params,
+                           torch::Tensor& grads,
+                           torch::Tensor& exp_avg,
+                           torch::Tensor& exp_avg_sq,
+                           torch::Tensor& device_params)
+{
+#if defined(__ENABLE_CUDA__) or defined(__ENABLE_CANN__)
+    auto params_c = params.contiguous();
+    auto device_params_c = device_params.contiguous();
+    auto exp_avg_c = exp_avg.contiguous();
+    auto exp_avg_sq_c = exp_avg_sq.contiguous();
+    auto grads_c = grads.contiguous();
+
+    float* params_ptr = (float*)params_c.data_ptr();
+    float* grads_ptr = (float*)grads_c.data_ptr();
+    ds_half_precision_t* device_params_ptr = (ds_half_precision_t*)device_params_c.data_ptr();
+    float* exp_avg_ptr = (float*)exp_avg_c.data_ptr();
+    float* exp_avg_sq_ptr = (float*)exp_avg_sq_c.data_ptr();
+
+    std::shared_ptr<Adam_Optimizer> opt =
+        std::static_pointer_cast<Adam_Optimizer>(s_optimizers[optimizer_id]);
+    opt->IncrementStep(step, beta1, beta2);
+    opt->update_state(lr, epsilon, weight_decay, bias_correction);
+    opt->Step_8(params_ptr,
+                grads_ptr,
+                exp_avg_ptr,
+                exp_avg_sq_ptr,
+                params_c.numel(),
+                device_params_ptr,
+                (params.options().dtype() == at::kHalf));
+
+    opt->SynchronizeStreams();
+#else
+    assert(false);
+#endif
+    return 0;
+}
+
+int destroy_adam_optimizer(int optimizer_id)
+{
+    s_optimizers.erase(optimizer_id);
+
+    return 0;
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/adam/fused_adam_frontend.cpp

@@ -0,0 +1,25 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include <torch/extension.h>
+
+void multi_tensor_adam_cuda(int chunk_size,
+                            at::Tensor noop_flag,
+                            std::vector<std::vector<at::Tensor>> tensor_lists,
+                            const float lr,
+                            const float beta1,
+                            const float beta2,
+                            const float epsilon,
+                            const int step,
+                            const int mode,
+                            const int bias_correction,
+                            const float weight_decay);
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    m.def("multi_tensor_adam",
+          &multi_tensor_adam_cuda,
+          "Compute and apply gradient update to parameters for Adam optimizer");
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/adam/multi_tensor_adam.cu

@@ -0,0 +1,203 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Copyright NVIDIA/apex
+This file is adapted from fused adam in NVIDIA/apex, commit a109f85
+*/
+
+#include <ATen/ATen.h>
+#include <ATen/AccumulateType.h>
+#include <ATen/cuda/CUDAContext.h>
+#include <ATen/cuda/Exceptions.h>
+// Another possibility:
+// #include <torch/all.h>
+
+#include <assert.h>
+
+#include "multi_tensor_apply.cuh"
+#include "type_shim.h"
+
+#define BLOCK_SIZE 512
+#define ILP 4
+
+typedef enum : int {
+    ADAM_MODE_0 = 0,  // L2 regularization mode
+    ADAM_MODE_1 = 1   // Decoupled weight decay mode(AdamW)
+} adamMode_t;
+
+using MATH_T = float;
+
+template <typename T, typename index_t>
+struct AdamFunctor {
+    __device__ __forceinline__ void operator()(int chunk_size,
+                                               volatile int* noop_gmem,
+                                               TensorListMetadata<4>& tl,
+                                               const float beta1,
+                                               const float beta2,
+                                               const float beta1_correction,
+                                               const float beta2_correction,
+                                               const float epsilon,
+                                               const float lr,
+                                               adamMode_t mode,
+                                               const float decay)
+    {
+        // I'd like this kernel to propagate infs/nans.
+        // if(*noop_gmem == 1)
+        //   return;
+
+        index_t tensor_loc = tl.block_to_tensor[blockIdx.x];
+
+        // potentially use to pass in list of scalar
+        // int tensor_num = tl.start_tensor_this_launch + tensor_loc;
+
+        index_t chunk_idx = tl.block_to_chunk[blockIdx.x];
+        index_t n = tl.sizes[tensor_loc];
+
+        T* g = (T*)tl.addresses[0][tensor_loc];
+        g += chunk_idx * chunk_size;
+
+        T* p = (T*)tl.addresses[1][tensor_loc];
+        p += chunk_idx * chunk_size;
+
+        T* m = (T*)tl.addresses[2][tensor_loc];
+        m += chunk_idx * chunk_size;
+
+        T* v = (T*)tl.addresses[3][tensor_loc];
+        v += chunk_idx * chunk_size;
+
+        n -= chunk_idx * chunk_size;
+
+        // see note in multi_tensor_scale_kernel.cu
+        for (index_t i_start = 0; i_start < n && i_start < chunk_size;
+             i_start += blockDim.x * ILP) {
+            MATH_T r_g[ILP];
+            MATH_T r_p[ILP];
+            MATH_T r_m[ILP];
+            MATH_T r_v[ILP];
+#pragma unroll
+            for (int ii = 0; ii < ILP; ii++) {
+                int i = i_start + threadIdx.x + ii * blockDim.x;
+                if (i < n && i < chunk_size) {
+                    r_g[ii] = g[i];
+                    r_p[ii] = p[i];
+                    r_m[ii] = m[i];
+                    r_v[ii] = v[i];
+                } else {
+                    r_g[ii] = MATH_T(0);
+                    r_p[ii] = MATH_T(0);
+                    r_m[ii] = MATH_T(0);
+                    r_v[ii] = MATH_T(0);
+                }
+            }
+#pragma unroll
+            for (int ii = 0; ii < ILP; ii++) {
+                if (mode == ADAM_MODE_0) {  // L2
+                    r_g[ii] = r_g[ii] + (decay * r_p[ii]);
+                    r_m[ii] = beta1 * r_m[ii] + (1 - beta1) * r_g[ii];
+                    r_v[ii] = beta2 * r_v[ii] + (1 - beta2) * r_g[ii] * r_g[ii];
+                    MATH_T next_m_unbiased = r_m[ii] / beta1_correction;
+                    MATH_T next_v_unbiased = r_v[ii] / beta2_correction;
+                    MATH_T denom = sqrtf(next_v_unbiased) + epsilon;
+                    MATH_T update = next_m_unbiased / denom;
+                    r_p[ii] = r_p[ii] - (lr * update);
+                } else {  // weight decay
+                    r_m[ii] = beta1 * r_m[ii] + (1 - beta1) * r_g[ii];
+                    r_v[ii] = beta2 * r_v[ii] + (1 - beta2) * r_g[ii] * r_g[ii];
+                    MATH_T next_m_unbiased = r_m[ii] / beta1_correction;
+                    MATH_T next_v_unbiased = r_v[ii] / beta2_correction;
+                    MATH_T denom = sqrtf(next_v_unbiased) + epsilon;
+                    MATH_T update = (next_m_unbiased / denom) + (decay * r_p[ii]);
+                    r_p[ii] = r_p[ii] - (lr * update);
+                }
+            }
+#pragma unroll
+            for (int ii = 0; ii < ILP; ii++) {
+                int i = i_start + threadIdx.x + ii * blockDim.x;
+                if (i < n && i < chunk_size) {
+                    p[i] = r_p[ii];
+                    m[i] = r_m[ii];
+                    v[i] = r_v[ii];
+                }
+            }
+        }
+    }
+};
+
+void multi_tensor_adam_cuda(int chunk_size,
+                            at::Tensor noop_flag,
+                            std::vector<std::vector<at::Tensor>> tensor_lists,
+                            const float lr,
+                            const float beta1,
+                            const float beta2,
+                            const float epsilon,
+                            const int step,
+                            const int mode,
+                            const int bias_correction,
+                            const float weight_decay)
+{
+    using namespace at;
+
+    // Handle bias correction mode
+    float bias_correction1 = 1.0f, bias_correction2 = 1.0f;
+    if (bias_correction == 1) {
+        bias_correction1 = 1 - std::pow(beta1, step);
+        bias_correction2 = 1 - std::pow(beta2, step);
+    }
+
+    size_t max_size = 0;
+    bool requires_64bit_indexing = false;
+    for (auto it = tensor_lists.begin(); it != tensor_lists.end(); it++) {
+        for (auto it2 = it->begin(); it2 != it->end(); it2++) {
+            if (it2->numel() > max_size) {
+                max_size = it2->numel();
+                if (max_size >= INT_MAX) {
+                    requires_64bit_indexing = true;
+                    break;
+                }
+            }
+        }
+        if (requires_64bit_indexing) { break; }
+    }
+
+    // Assume single type across p,g,m1,m2 now
+    if (requires_64bit_indexing) {
+        DISPATCH_DOUBLE_FLOAT_AND_HALF(tensor_lists[0][0].scalar_type(),
+                                       0,
+                                       "adam",
+                                       multi_tensor_apply<4>((int64_t)BLOCK_SIZE,
+                                                             (int64_t)chunk_size,
+                                                             noop_flag,
+                                                             tensor_lists,
+                                                             AdamFunctor<scalar_t_0, int64_t>(),
+                                                             beta1,
+                                                             beta2,
+                                                             bias_correction1,
+                                                             bias_correction2,
+                                                             epsilon,
+                                                             lr,
+                                                             (adamMode_t)mode,
+                                                             weight_decay);)
+    } else {
+        DISPATCH_DOUBLE_FLOAT_AND_HALF(tensor_lists[0][0].scalar_type(),
+                                       0,
+                                       "adam",
+                                       multi_tensor_apply<4>(BLOCK_SIZE,
+                                                             chunk_size,
+                                                             noop_flag,
+                                                             tensor_lists,
+                                                             AdamFunctor<scalar_t_0, int32_t>(),
+                                                             beta1,
+                                                             beta2,
+                                                             bias_correction1,
+                                                             bias_correction2,
+                                                             epsilon,
+                                                             lr,
+                                                             (adamMode_t)mode,
+                                                             weight_decay);)
+    }
+
+    AT_CUDA_CHECK(cudaGetLastError());
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/adam/multi_tensor_apply.cuh

@@ -0,0 +1,132 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Copyright NVIDIA/apex
+This file is adapted from fused adam in NVIDIA/apex, commit a109f85
+*/
+
+#include <ATen/ATen.h>
+#include <ATen/AccumulateType.h>
+#include <ATen/cuda/CUDAContext.h>
+#include <ATen/cuda/Exceptions.h>
+#include <c10/cuda/CUDAGuard.h>
+#include "compat.h"
+
+#include <assert.h>
+
+// #include <iostream>
+
+// This header is the one-stop shop for all your multi-tensor apply needs.
+
+// TODO:  Kernel arg size limit may be <4KB for some other cards (ie Jetson)
+constexpr int depth_to_max_tensors[5] = {110, 64, 48, 36, 30};
+constexpr int depth_to_max_blocks[5] = {320, 320, 320, 320, 320};
+
+template <int n>
+struct TensorListMetadata {
+    void* addresses[n][depth_to_max_tensors[n - 1]];
+    int sizes[depth_to_max_tensors[n - 1]];
+    unsigned char block_to_tensor[depth_to_max_blocks[n - 1]];
+    int block_to_chunk[depth_to_max_blocks[n - 1]];  // I fear this needs to be a full int.
+    int start_tensor_this_launch;
+};
+
+template <typename T, typename U, typename... ArgTypes>
+__global__ void multi_tensor_apply_kernel(int64_t chunk_size,
+                                          volatile int* noop_flag,
+                                          T tl,
+                                          U callable,
+                                          ArgTypes... args)
+{
+    // Hand the chunk information to the user-supplied functor to process however it likes.
+    callable(chunk_size, noop_flag, tl, args...);
+}
+
+template <int depth, typename T, typename... ArgTypes>
+void multi_tensor_apply(int64_t block_size,
+                        int64_t chunk_size,
+                        const at::Tensor& noop_flag,
+                        const std::vector<std::vector<at::Tensor>>& tensor_lists,
+                        T callable,
+                        ArgTypes... args)
+{
+    TORCH_CHECK(tensor_lists.size() == depth, "tensor_lists.size() != depth");
+    int len0 = tensor_lists[0].size();
+    TORCH_CHECK(len0 > 0, "tensor_lists[0].size() is not > 0");
+    auto ref_device = tensor_lists[0][0].device();
+    TORCH_CHECK(ref_device.type() == at::kCUDA, "expected input to be on cuda");
+    for (int l = 0; l < tensor_lists.size(); l++)  // No range-based for because I need indices
+    {
+        TORCH_CHECK(tensor_lists[l].size() == len0, "Size mismatch among tensor lists");
+        for (int t = 0; t < tensor_lists[l].size(); t++) {
+            // TODO:  Print which tensor fails.
+            bool contiguous_memory = tensor_lists[l][t].is_contiguous();
+#ifdef VERSION_GE_1_5
+            contiguous_memory = (contiguous_memory ||
+                                 tensor_lists[l][t].is_contiguous(at::MemoryFormat::ChannelsLast));
+#endif
+            TORCH_CHECK(contiguous_memory, "A tensor was not contiguous.");
+            TORCH_CHECK(tensor_lists[l][t].device() == ref_device,
+                        "A tensor was not on the same device as the first tensor");
+            TORCH_CHECK(tensor_lists[l][t].numel() == tensor_lists[0][t].numel(), "Size mismatch");
+        }
+    }
+
+    int ntensors = tensor_lists[0].size();
+
+    TensorListMetadata<depth> tl;
+
+    const at::cuda::OptionalCUDAGuard device_guard(device_of(tensor_lists[0][0]));
+    auto stream = at::cuda::getCurrentCUDAStream();
+
+    tl.start_tensor_this_launch = 0;
+    int loc_block_info = 0;
+    int loc_tensor_info = 0;
+    for (int t = 0; t < ntensors; t++) {
+        tl.sizes[loc_tensor_info] = tensor_lists[0][t].numel();
+        for (int d = 0; d < depth; d++)
+            tl.addresses[d][loc_tensor_info] = tensor_lists[d][t].data_ptr();
+        loc_tensor_info++;
+
+        auto chunks_this_tensor = (tensor_lists[0][t].numel() + chunk_size - 1) / chunk_size;
+
+        for (auto chunk = 0; chunk < chunks_this_tensor; chunk++) {
+            // std::cout << chunks_this_tensor << std::endl;
+            tl.block_to_tensor[loc_block_info] = loc_tensor_info - 1;
+            tl.block_to_chunk[loc_block_info] = chunk;
+            loc_block_info++;
+
+            bool tensors_full = (loc_tensor_info == depth_to_max_tensors[depth - 1] &&
+                                 chunk == chunks_this_tensor - 1);
+            bool blocks_full = (loc_block_info == depth_to_max_blocks[depth - 1]);
+            bool last_chunk = (t == ntensors - 1 && chunk == chunks_this_tensor - 1);
+            if (tensors_full || blocks_full || last_chunk) {
+                // using accscalar_t = acc_type<scalar_t, true>;
+                multi_tensor_apply_kernel<<<loc_block_info, block_size, 0, stream>>>(
+                    chunk_size, noop_flag.DATA_PTR<int>(), tl, callable, args...);
+
+                AT_CUDA_CHECK(cudaGetLastError());
+
+                // Reset.  The control flow possibilities here make my brain hurt.
+                loc_block_info = 0;
+                if (chunk == chunks_this_tensor - 1) {
+                    // std::cout << "Hit case 1 " << cond1 << " " << cond2 << " " << cond3 <<
+                    // std::endl;
+                    loc_tensor_info = 0;
+                    tl.start_tensor_this_launch = t + 1;
+                } else {
+                    // std::cout << "Hit case 2 " << cond1 << " " << cond2 << " " << cond3 <<
+                    // std::endl;
+                    tl.sizes[0] = tl.sizes[loc_tensor_info - 1];
+                    for (int d = 0; d < depth; d++)
+                        tl.addresses[d][0] = tl.addresses[d][loc_tensor_info - 1];
+                    loc_tensor_info = 1;
+                    tl.start_tensor_this_launch = t;
+                }
+            }
+        }
+    }
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/common/deepspeed_aio_common.cpp

@@ -0,0 +1,342 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <assert.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <fcntl.h>
+#include <libaio.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <time.h>
+#include <unistd.h>
+
+#include <algorithm>
+#include <chrono>
+#include <cmath>
+#include <cstring>
+#include <fstream>
+#include <iostream>
+#include <limits>
+#include <numeric>
+#include <string>
+#include <vector>
+
+#include "deepspeed_aio_common.h"
+
+using namespace std;
+using namespace std::chrono;
+
+#define DEBUG_DS_AIO_PERF 0
+#define DEBUG_DS_AIO_SUBMIT_PERF 0
+
+static const std::string c_library_name = "deepspeed_aio";
+
+static void _report_aio_statistics(const char* tag,
+                                   const std::vector<std::chrono::duration<double>>& latencies)
+    __attribute__((unused));
+
+static void _report_aio_statistics(const char* tag,
+                                   const std::vector<std::chrono::duration<double>>& latencies)
+{
+    std::vector<double> lat_usec;
+    for (auto& lat : latencies) { lat_usec.push_back(lat.count() * 1e6); }
+    const auto min_lat = *(std::min_element(lat_usec.begin(), lat_usec.end()));
+    const auto max_lat = *(std::max_element(lat_usec.begin(), lat_usec.end()));
+    const auto avg_lat = std::accumulate(lat_usec.begin(), lat_usec.end(), 0) / lat_usec.size();
+
+    std::cout << c_library_name << ": latency statistics(usec) " << tag
+              << " min/max/avg = " << min_lat << " " << max_lat << " " << avg_lat << std::endl;
+}
+
+static void _get_aio_latencies(std::vector<std::chrono::duration<double>>& raw_latencies,
+                               struct deepspeed_aio_latency_t& summary_latencies)
+{
+    std::vector<double> lat_usec;
+    for (auto& lat : raw_latencies) { lat_usec.push_back(lat.count() * 1e6); }
+    summary_latencies._min_usec = *(std::min_element(lat_usec.begin(), lat_usec.end()));
+    summary_latencies._max_usec = *(std::max_element(lat_usec.begin(), lat_usec.end()));
+    summary_latencies._avg_usec =
+        std::accumulate(lat_usec.begin(), lat_usec.end(), 0) / lat_usec.size();
+}
+
+static void _do_io_submit_singles(const long long int n_iocbs,
+                                  const long long int iocb_index,
+                                  std::unique_ptr<aio_context>& aio_ctxt,
+                                  std::vector<std::chrono::duration<double>>& submit_times)
+{
+    for (auto i = 0; i < n_iocbs; ++i) {
+        const auto st = std::chrono::high_resolution_clock::now();
+        const auto submit_ret = io_submit(aio_ctxt->_io_ctxt, 1, aio_ctxt->_iocbs.data() + i);
+        submit_times.push_back(std::chrono::high_resolution_clock::now() - st);
+#if DEBUG_DS_AIO_SUBMIT_PERF
+        printf("submit(usec) %f io_index=%lld buf=%p len=%lu off=%llu \n",
+               submit_times.back().count() * 1e6,
+               iocb_index,
+               aio_ctxt->_iocbs[i]->u.c.buf,
+               aio_ctxt->_iocbs[i]->u.c.nbytes,
+               aio_ctxt->_iocbs[i]->u.c.offset);
+#endif
+        assert(submit_ret > 0);
+    }
+}
+
+static void _do_io_submit_block(const long long int n_iocbs,
+                                const long long int iocb_index,
+                                std::unique_ptr<aio_context>& aio_ctxt,
+                                std::vector<std::chrono::duration<double>>& submit_times)
+{
+    const auto st = std::chrono::high_resolution_clock::now();
+    const auto submit_ret = io_submit(aio_ctxt->_io_ctxt, n_iocbs, aio_ctxt->_iocbs.data());
+    submit_times.push_back(std::chrono::high_resolution_clock::now() - st);
+#if DEBUG_DS_AIO_SUBMIT_PERF
+    printf("submit(usec) %f io_index=%lld nr=%lld buf=%p len=%lu off=%llu \n",
+           submit_times.back().count() * 1e6,
+           iocb_index,
+           n_iocbs,
+           aio_ctxt->_iocbs[0]->u.c.buf,
+           aio_ctxt->_iocbs[0]->u.c.nbytes,
+           aio_ctxt->_iocbs[0]->u.c.offset);
+#endif
+    assert(submit_ret > 0);
+}
+
+static int _do_io_complete(const long long int min_completes,
+                           const long long int max_completes,
+                           std::unique_ptr<aio_context>& aio_ctxt,
+                           std::vector<std::chrono::duration<double>>& reap_times)
+{
+    const auto start_time = std::chrono::high_resolution_clock::now();
+    long long int n_completes = io_pgetevents(aio_ctxt->_io_ctxt,
+                                              min_completes,
+                                              max_completes,
+                                              aio_ctxt->_io_events.data(),
+                                              nullptr,
+                                              nullptr);
+    reap_times.push_back(std::chrono::high_resolution_clock::now() - start_time);
+    assert(n_completes >= min_completes);
+    return n_completes;
+}
+
+void do_aio_operation_sequential(const bool read_op,
+                                 std::unique_ptr<aio_context>& aio_ctxt,
+                                 std::unique_ptr<io_xfer_ctxt>& xfer_ctxt,
+                                 deepspeed_aio_config_t* config,
+                                 deepspeed_aio_perf_t* perf)
+{
+    struct io_prep_context prep_ctxt(read_op, xfer_ctxt, aio_ctxt->_block_size, &aio_ctxt->_iocbs);
+
+    const auto num_io_blocks = static_cast<long long int>(
+        ceil(static_cast<double>(xfer_ctxt->_num_bytes) / aio_ctxt->_block_size));
+#if DEBUG_DS_AIO_PERF
+    const auto io_op_name = std::string(read_op ? "read" : "write");
+    std::cout << c_library_name << ": start " << io_op_name << " " << xfer_ctxt->_num_bytes
+              << " bytes with " << num_io_blocks << " io blocks" << std::endl;
+#endif
+
+    std::vector<std::chrono::duration<double>> submit_times;
+    std::vector<std::chrono::duration<double>> reap_times;
+    const auto max_queue_bytes =
+        static_cast<long long int>(aio_ctxt->_queue_depth * aio_ctxt->_block_size);
+
+    auto start = std::chrono::high_resolution_clock::now();
+    for (long long iocb_index = 0; iocb_index < num_io_blocks;
+         iocb_index += aio_ctxt->_queue_depth) {
+        const auto start_offset = iocb_index * aio_ctxt->_block_size;
+        const auto start_buffer = (char*)xfer_ctxt->_mem_buffer + start_offset;
+        const auto n_iocbs =
+            min(static_cast<long long>(aio_ctxt->_queue_depth), (num_io_blocks - iocb_index));
+        const auto num_bytes = min(max_queue_bytes, (xfer_ctxt->_num_bytes - start_offset));
+        prep_ctxt.prep_iocbs(n_iocbs, num_bytes, start_buffer, start_offset);
+
+        if (config->_single_submit) {
+            _do_io_submit_singles(n_iocbs, iocb_index, aio_ctxt, submit_times);
+        } else {
+            _do_io_submit_block(n_iocbs, iocb_index, aio_ctxt, submit_times);
+        }
+
+        _do_io_complete(n_iocbs, n_iocbs, aio_ctxt, reap_times);
+    }
+    const std::chrono::duration<double> elapsed = std::chrono::high_resolution_clock::now() - start;
+
+    if (perf) {
+        _get_aio_latencies(submit_times, perf->_submit);
+        _get_aio_latencies(reap_times, perf->_complete);
+        perf->_e2e_usec = elapsed.count() * 1e6;
+        perf->_e2e_rate_GB = (xfer_ctxt->_num_bytes / elapsed.count() / 1e9);
+    }
+
+#if DEBUG_DS_AIO_PERF
+    _report_aio_statistics("submit", submit_times);
+    _report_aio_statistics("complete", reap_times);
+#endif
+
+#if DEBUG_DS_AIO_PERF
+    std::cout << c_library_name << ": runtime(usec) " << elapsed.count() * 1e6
+              << " rate(GB/sec) = " << (xfer_ctxt->_num_bytes / elapsed.count() / 1e9) << std::endl;
+#endif
+
+#if DEBUG_DS_AIO_PERF
+    std::cout << c_library_name << ": finish " << io_op_name << " " << xfer_ctxt->_num_bytes
+              << " bytes " << std::endl;
+#endif
+}
+
+void do_aio_operation_overlap(const bool read_op,
+                              std::unique_ptr<aio_context>& aio_ctxt,
+                              std::unique_ptr<io_xfer_ctxt>& xfer_ctxt,
+                              deepspeed_aio_config_t* config,
+                              deepspeed_aio_perf_t* perf)
+{
+    struct io_prep_generator io_gen(read_op, xfer_ctxt, aio_ctxt->_block_size);
+
+#if DEBUG_DS_AIO_PERF
+    const auto io_op_name = std::string(read_op ? "read" : "write");
+    std::cout << c_library_name << ": start " << io_op_name << " " << xfer_ctxt->_num_bytes
+              << " bytes with " << io_gen._num_io_blocks << " io blocks" << std::endl;
+#endif
+
+    std::vector<std::chrono::duration<double>> submit_times;
+    std::vector<std::chrono::duration<double>> reap_times;
+
+    auto request_iocbs = aio_ctxt->_queue_depth;
+    auto n_pending_iocbs = 0;
+    const auto min_completes = 1;
+    auto start = std::chrono::high_resolution_clock::now();
+    while (true) {
+        const auto n_iocbs = io_gen.prep_iocbs(request_iocbs - n_pending_iocbs, &aio_ctxt->_iocbs);
+        if (n_iocbs > 0) {
+            if (config->_single_submit) {
+                _do_io_submit_singles(
+                    n_iocbs, (io_gen._next_iocb_index - n_iocbs), aio_ctxt, submit_times);
+            } else {
+                _do_io_submit_block(
+                    n_iocbs, (io_gen._next_iocb_index - n_iocbs), aio_ctxt, submit_times);
+            }
+        }
+
+        n_pending_iocbs += n_iocbs;
+        assert(n_pending_iocbs <= aio_ctxt->_queue_depth);
+
+        if (n_pending_iocbs == 0) { break; }
+
+        const auto n_complete =
+            _do_io_complete(min_completes, n_pending_iocbs, aio_ctxt, reap_times);
+        n_pending_iocbs -= n_complete;
+    }
+
+    const std::chrono::duration<double> elapsed = std::chrono::high_resolution_clock::now() - start;
+
+    if (perf) {
+        _get_aio_latencies(submit_times, perf->_submit);
+        _get_aio_latencies(reap_times, perf->_complete);
+        perf->_e2e_usec = elapsed.count() * 1e6;
+        perf->_e2e_rate_GB = (xfer_ctxt->_num_bytes / elapsed.count() / 1e9);
+    }
+
+#if DEBUG_DS_AIO_PERF
+    _report_aio_statistics("submit", submit_times);
+    _report_aio_statistics("complete", reap_times);
+#endif
+
+#if DEBUG_DS_AIO_PERF
+    std::cout << c_library_name << ": runtime(usec) " << elapsed.count() * 1e6
+              << " rate(GB/sec) = " << (xfer_ctxt->_num_bytes / elapsed.count() / 1e9) << std::endl;
+#endif
+
+#if DEBUG_DS_AIO_PERF
+    std::cout << c_library_name << ": finish " << io_op_name << " " << xfer_ctxt->_num_bytes
+              << " bytes " << std::endl;
+#endif
+}
+
+void report_file_error(const char* filename, const std::string file_op, const int error_code)
+{
+    std::string err_msg = file_op + std::string(" failed on ") + std::string(filename) +
+                          " error = " + std::to_string(error_code);
+    std::cerr << c_library_name << ":  " << err_msg << std::endl;
+}
+
+int open_file(const char* filename, const bool read_op)
+{
+    const int flags = read_op ? (O_RDONLY | O_DIRECT) : (O_WRONLY | O_CREAT | O_DIRECT);
+#if defined(__ENABLE_CANN__)
+    int* flags_ptr = (int*)&flags;
+    *flags_ptr = read_op ? (O_RDONLY) : (O_WRONLY | O_CREAT);
+#endif
+    const int mode = 0600;
+    const auto fd = open(filename, flags, mode);
+    if (fd == -1) {
+        const auto error_code = errno;
+        const auto error_msg = read_op ? " open for read " : " open for write ";
+        report_file_error(filename, error_msg, error_code);
+        return -1;
+    }
+    return fd;
+}
+
+int regular_read(const char* filename, std::vector<char>& buffer)
+{
+    long long int num_bytes;
+    const auto f_size = get_file_size(filename, num_bytes);
+    assert(f_size != -1);
+    buffer.resize(num_bytes);
+    const auto fd = open(filename, O_RDONLY, 0600);
+    assert(fd != -1);
+    long long int read_bytes = 0;
+    auto r = 0;
+    do {
+        const auto buffer_ptr = buffer.data() + read_bytes;
+        const auto bytes_to_read = num_bytes - read_bytes;
+        r = read(fd, buffer_ptr, bytes_to_read);
+        read_bytes += r;
+    } while (r > 0);
+
+    if (read_bytes != num_bytes) {
+        std::cerr << "read error "
+                  << " read_bytes (read) = " << read_bytes << " num_bytes (fstat) = " << num_bytes
+                  << std::endl;
+    }
+    assert(read_bytes == num_bytes);
+    close(fd);
+    return 0;
+}
+
+static bool _validate_buffer(const char* filename, void* aio_buffer, const long long int num_bytes)
+{
+    std::vector<char> regular_buffer;
+    const auto reg_ret = regular_read(filename, regular_buffer);
+    assert(0 == reg_ret);
+    std::cout << "regular read of " << filename << " returned " << regular_buffer.size() << " bytes"
+              << std::endl;
+
+    if (static_cast<long long int>(regular_buffer.size()) != num_bytes) { return false; }
+
+    return (0 == memcmp(aio_buffer, regular_buffer.data(), regular_buffer.size()));
+}
+
+bool validate_aio_operation(const bool read_op,
+                            const char* filename,
+                            void* aio_buffer,
+                            const long long int num_bytes)
+{
+    const auto msg_suffix = std::string("deepspeed_aio_") +
+                            std::string(read_op ? "read()" : "write()") +
+                            std::string("using read()");
+
+    if (false == _validate_buffer(filename, aio_buffer, num_bytes)) {
+        std::cout << "Fail: correctness of " << msg_suffix << std::endl;
+        return false;
+    }
+
+    std::cout << "Pass: correctness of  " << msg_suffix << std::endl;
+    return true;
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/common/deepspeed_aio_common.h

@@ -0,0 +1,38 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <deepspeed_aio_utils.h>
+#include <stdlib.h>
+#include <memory>
+#include <string>
+
+using namespace std;
+
+void do_aio_operation_sequential(const bool read_op,
+                                 std::unique_ptr<aio_context>& aio_ctxt,
+                                 std::unique_ptr<io_xfer_ctxt>& xfer_ctxt,
+                                 deepspeed_aio_config_t* config,
+                                 deepspeed_aio_perf_t* perf);
+
+void do_aio_operation_overlap(const bool read_op,
+                              std::unique_ptr<aio_context>& aio_ctxt,
+                              std::unique_ptr<io_xfer_ctxt>& xfer_ctxt,
+                              deepspeed_aio_config_t* config,
+                              deepspeed_aio_perf_t* perf);
+
+int open_file(const char* filename, const bool read_op);
+
+void report_file_error(const char* filename, const std::string file_op, const int error_code);
+
+int regular_read(const char* filename, std::vector<char>& buffer);
+
+bool validate_aio_operation(const bool read_op,
+                            const char* filename,
+                            void* aio_buffer,
+                            const long long int num_bytes);

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/common/deepspeed_aio_types.cpp

@@ -0,0 +1,76 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <cmath>
+
+#include "deepspeed_aio_utils.h"
+
+using namespace std;
+
+const int c_block_size = 128 * 1024;
+const int c_io_queue_depth = 8;
+
+deepspeed_aio_config_t::deepspeed_aio_config_t()
+    : _block_size(c_block_size),
+      _queue_depth(c_io_queue_depth),
+      _single_submit(false),
+      _overlap_events(false),
+      _lock_memory(false)
+{
+}
+
+deepspeed_aio_config_t::deepspeed_aio_config_t(const int block_size,
+                                               const int queue_depth,
+                                               const bool single_submit,
+                                               const bool overlap_events,
+                                               const bool lock_memory)
+    : _block_size(block_size),
+      _queue_depth(queue_depth),
+      _single_submit(single_submit),
+      _overlap_events(overlap_events),
+      _lock_memory(lock_memory)
+{
+}
+
+void deepspeed_aio_latency_t::dump(const std::string tag)
+{
+    std::cout << tag << _min_usec << " " << _max_usec << " " << _avg_usec << " " << std::endl;
+}
+
+void deepspeed_aio_latency_t::accumulate(const struct deepspeed_aio_latency_t& other)
+{
+    _min_usec += other._min_usec;
+    _max_usec += other._max_usec;
+    _avg_usec += other._avg_usec;
+}
+
+void deepspeed_aio_latency_t::scale(const float scaler)
+{
+    _min_usec *= scaler;
+    _max_usec *= scaler;
+    _avg_usec *= scaler;
+}
+
+aio_context::aio_context(const int block_size, const int queue_depth)
+{
+    _block_size = block_size;
+    _queue_depth = queue_depth;
+    for (auto i = 0; i < queue_depth; ++i) {
+        _iocbs.push_back((struct iocb*)calloc(1, sizeof(struct iocb)));
+    }
+    _io_events.resize(queue_depth);
+    io_queue_init(queue_depth, &_io_ctxt);
+}
+
+aio_context::~aio_context()
+{
+    for (auto& iocb : _iocbs) { free(iocb); }
+    _io_events.resize(0);
+    io_queue_release(_io_ctxt);
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/common/deepspeed_aio_types.h

@@ -0,0 +1,59 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <libaio.h>
+#include <stdlib.h>
+
+#include <string>
+#include <vector>
+
+using namespace std;
+
+struct deepspeed_aio_latency_t {
+    double _min_usec;
+    double _max_usec;
+    double _avg_usec;
+
+    void dump(const std::string tag);
+    void accumulate(const deepspeed_aio_latency_t&);
+    void scale(const float value);
+};
+
+struct deepspeed_aio_perf_t {
+    deepspeed_aio_latency_t _submit;
+    deepspeed_aio_latency_t _complete;
+    double _e2e_usec;
+    double _e2e_rate_GB;
+};
+
+struct deepspeed_aio_config_t {
+    const int _block_size;
+    const int _queue_depth;
+    const bool _single_submit;
+    const bool _overlap_events;
+    const bool _lock_memory;
+
+    deepspeed_aio_config_t();
+    deepspeed_aio_config_t(const int block_size,
+                           const int queue_depth,
+                           const bool single_submit,
+                           const bool overlap_events,
+                           const bool lock_memory);
+};
+
+struct aio_context {
+    io_context_t _io_ctxt;
+    std::vector<struct io_event> _io_events;
+    std::vector<struct iocb*> _iocbs;
+    int _block_size;
+    int _queue_depth;
+
+    aio_context(const int block_size, const int queue_depth);
+    ~aio_context();
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/common/deepspeed_aio_utils.cpp

@@ -0,0 +1,126 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <cmath>
+#include <iostream>
+
+#include "deepspeed_aio_utils.h"
+
+using namespace std;
+
+const int c_block_size = 128 * 1024;
+const int c_io_queue_depth = 8;
+
+io_xfer_ctxt::io_xfer_ctxt(const int fd,
+                           const long long int file_offset,
+                           const long long int num_bytes,
+                           const void* buffer)
+    : _fd(fd), _base_offset(file_offset), _mem_buffer(buffer), _num_bytes(num_bytes)
+{
+}
+
+io_prep_context::io_prep_context(const bool read_op,
+                                 const std::unique_ptr<io_xfer_ctxt>& xfer_ctxt,
+                                 const size_t block_size,
+                                 const std::vector<struct iocb*>* iocbs)
+    : _read_op(read_op), _xfer_ctxt(xfer_ctxt), _block_size(block_size), _iocbs(iocbs)
+{
+}
+
+void io_prep_context::prep_iocbs(const int n_iocbs,
+                                 const size_t num_bytes,
+                                 const void* start_buffer,
+                                 const long long int start_offset)
+{
+    assert(static_cast<size_t>(n_iocbs) <= _iocbs->size());
+    for (auto i = 0; i < n_iocbs; ++i) {
+        const auto shift = i * _block_size;
+        const auto xfer_buffer = (char*)start_buffer + _xfer_ctxt->_base_offset + shift;
+        const auto xfer_offset = _xfer_ctxt->_base_offset + start_offset + shift;
+        auto byte_count = _block_size;
+        if ((shift + _block_size) > num_bytes) { byte_count = num_bytes - shift; }
+
+        if (_read_op) {
+            io_prep_pread(_iocbs->at(i), _xfer_ctxt->_fd, xfer_buffer, byte_count, xfer_offset);
+        } else {
+            io_prep_pwrite(_iocbs->at(i), _xfer_ctxt->_fd, xfer_buffer, byte_count, xfer_offset);
+        }
+    }
+}
+
+io_prep_generator::io_prep_generator(const bool read_op,
+                                     const std::unique_ptr<io_xfer_ctxt>& xfer_ctxt,
+                                     const size_t block_size)
+    : _read_op(read_op),
+      _xfer_ctxt(xfer_ctxt),
+      _block_size(block_size),
+      _remaining_bytes(xfer_ctxt->_num_bytes),
+      _next_iocb_index(0)
+{
+    _num_io_blocks =
+        static_cast<long long int>(ceil(static_cast<double>(xfer_ctxt->_num_bytes) / block_size));
+    _remaining_io_blocks = _num_io_blocks;
+}
+
+int io_prep_generator::prep_iocbs(const int n_iocbs, std::vector<struct iocb*>* iocbs)
+{
+    if ((_remaining_bytes) == 0 || (_remaining_io_blocks == 0)) {
+        assert(static_cast<long long int>(_remaining_bytes) == _remaining_io_blocks);
+        return 0;
+    }
+
+    assert(static_cast<size_t>(n_iocbs) <= iocbs->size());
+
+    auto actual_n_iocbs = min(static_cast<long long int>(n_iocbs), _remaining_io_blocks);
+    for (auto i = 0; i < actual_n_iocbs; ++i, ++_next_iocb_index) {
+        const auto xfer_offset = _xfer_ctxt->_base_offset + (_next_iocb_index * _block_size);
+        const auto xfer_buffer = (char*)_xfer_ctxt->_mem_buffer + xfer_offset;
+        const auto num_bytes = min(static_cast<long long int>(_block_size), _remaining_bytes);
+
+        if (_read_op) {
+            io_prep_pread(iocbs->at(i), _xfer_ctxt->_fd, xfer_buffer, num_bytes, xfer_offset);
+        } else {
+            io_prep_pwrite(iocbs->at(i), _xfer_ctxt->_fd, xfer_buffer, num_bytes, xfer_offset);
+        }
+        _remaining_bytes -= num_bytes;
+    }
+    _remaining_io_blocks -= actual_n_iocbs;
+
+    return actual_n_iocbs;
+}
+
+int get_file_size(const char* filename, long long int& size)
+{
+    struct stat st;
+    if (stat(filename, &st) == -1) { return -1; }
+    size = st.st_size;
+    return 0;
+}
+
+void* ds_page_aligned_alloc(const size_t size, const bool lock)
+{
+    void* ptr;
+    int retval;
+
+    retval = posix_memalign(&ptr, (size_t)sysconf(_SC_PAGESIZE), size);
+    if (retval) { return nullptr; }
+
+    if (lock == false) { return ptr; }
+
+    auto mlock_ret = mlock(ptr, size);
+    if (mlock_ret != 0) {
+        auto mlock_error = errno;
+        std::cerr << "mlock failed to allocate " << size << " bytes with error no " << mlock_error
+                  << " msg " << strerror(mlock_error) << std::endl;
+        free(ptr);
+        return nullptr;
+    }
+
+    return ptr;
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/common/deepspeed_aio_utils.h

@@ -0,0 +1,79 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#pragma once
+
+#include <assert.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <fcntl.h>
+#include <libaio.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include <deepspeed_aio_types.h>
+#include <cstring>
+#include <fstream>
+#include <iostream>
+#include <memory>
+#include <string>
+#include <vector>
+
+struct io_xfer_ctxt {
+    const int _fd;
+    const long long int _base_offset;
+    const void* _mem_buffer;
+    const long long int _num_bytes;
+
+    io_xfer_ctxt(const int fd,
+                 const long long int file_offset,
+                 const long long int num_bytes,
+                 const void* buffer);
+};
+
+struct io_prep_context {
+    const bool _read_op;
+    const std::unique_ptr<io_xfer_ctxt>& _xfer_ctxt;
+    const size_t _block_size;
+    const std::vector<struct iocb*>* _iocbs;
+
+    io_prep_context(const bool read_op,
+                    const std::unique_ptr<io_xfer_ctxt>& xfer_ctxt,
+                    const size_t block_size,
+                    const std::vector<struct iocb*>* iocbs);
+
+    void prep_iocbs(const int n_iocbs,
+                    const size_t num_bytes,
+                    const void* start_buffer,
+                    const long long int start_offset);
+};
+
+struct io_prep_generator {
+    const bool _read_op;
+    const std::unique_ptr<io_xfer_ctxt>& _xfer_ctxt;
+    const size_t _block_size;
+
+    long long int _remaining_bytes;
+    long long int _num_io_blocks;
+    long long int _remaining_io_blocks;
+    long long int _next_iocb_index;
+
+    io_prep_generator(const bool read_op,
+                      const std::unique_ptr<io_xfer_ctxt>& xfer_ctxt,
+                      const size_t block_size);
+
+    int prep_iocbs(const int n_iocbs, std::vector<struct iocb*>* iocbs);
+};
+
+void* ds_page_aligned_alloc(const size_t size, const bool lock = false);
+
+int get_file_size(const char* filename, long long int& size);

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_aio_thread.cpp

@@ -0,0 +1,104 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include "deepspeed_aio_thread.h"
+
+#if defined(__ENABLE_CANN__)
+#include "torch_npu/csrc/framework/utils/OpAdapter.h"
+#include "torch_npu/csrc/framework/utils/UtilForOpAdapter.h"
+#endif
+
+using namespace std;
+
+io_op_desc_t::io_op_desc_t(const bool read_op,
+                           const torch::Tensor& buffer,
+                           const int fd,
+                           const char* filename,
+                           const long long int num_bytes,
+                           const bool validate)
+    : _read_op(read_op),
+      _buffer(buffer),
+      _fd(fd),
+      _filename(filename),
+      _num_bytes(num_bytes),
+      _validate(validate)
+{
+    _cpu_buffer = (_buffer.is_cuda() || _buffer.is_xpu()
+#if defined(__ENABLE_CANN__)
+                   || torch_npu::utils::is_npu(_buffer)
+#endif
+                       )
+                      ? _buffer.to(torch::kCPU).pin_memory()
+                      : _buffer;
+    _contiguous_buffer = _cpu_buffer.contiguous();
+}
+
+char* io_op_desc_t::data_ptr() const { return (char*)_contiguous_buffer.data_ptr(); }
+
+void io_op_desc_t::fini()
+{
+    if (_read_op && _buffer.is_cuda()) { _buffer.copy_(_cpu_buffer.to(torch::kCUDA)); }
+    if (_read_op && _buffer.is_xpu()) { _buffer.copy_(_cpu_buffer.to(torch::kXPU)); }
+#if defined(__ENABLE_CANN__)
+    if (_read_op && torch_npu::utils::is_npu(_buffer)) {
+        auto device = at::Device("npu:0");
+        _buffer.copy_(_cpu_buffer.to(device));
+    }
+#endif
+}
+
+deepspeed_aio_thread_t::deepspeed_aio_thread_t(const int tid, deepspeed_aio_config_t& aio_config)
+    : _tid(tid),
+      _aio_config(aio_config),
+      _aio_ctxt(new aio_context(aio_config._block_size, aio_config._queue_depth)),
+      _time_to_exit(false)
+{
+}
+
+deepspeed_aio_thread_t::~deepspeed_aio_thread_t() {}
+
+void deepspeed_aio_thread_t::run()
+{
+    while (true) {
+        std::shared_ptr<struct io_op_desc_t> next_io_op = nullptr;
+
+        {
+            std::unique_lock<std::mutex> lock(_work_sync._mutex);
+            _work_sync._cond_var.wait(lock,
+                                      [this] { return (!_work_queue.empty() || _time_to_exit); });
+            if (!_work_queue.empty()) {
+                next_io_op = _work_queue.front();
+                _work_queue.pop();
+            }
+        }
+
+        if (next_io_op) {
+            const auto base_offset = next_io_op->_num_bytes * _tid;
+
+            std::unique_ptr<io_xfer_ctxt> xfer_ctxt(new io_xfer_ctxt(
+                next_io_op->_fd, base_offset, next_io_op->_num_bytes, next_io_op->data_ptr()));
+
+            if (_aio_config._overlap_events) {
+                do_aio_operation_overlap(
+                    next_io_op->_read_op, _aio_ctxt, xfer_ctxt, &_aio_config, nullptr);
+            } else {
+                do_aio_operation_sequential(
+                    next_io_op->_read_op, _aio_ctxt, xfer_ctxt, &_aio_config, nullptr);
+            }
+
+            {
+                std::lock_guard<std::mutex> lock(_complete_sync._mutex);
+                _complete_queue.push(next_io_op);
+            }
+            _complete_sync._cond_var.notify_one();
+        }
+
+        if (_time_to_exit) { break; }
+    }
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_aio_thread.h

@@ -0,0 +1,59 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <condition_variable>
+#include <memory>
+#include <queue>
+#include "deepspeed_py_aio.h"
+
+struct io_op_desc_t {
+    const bool _read_op;
+    torch::Tensor _buffer;
+    int _fd;
+    const std::string _filename;
+    const long long int _num_bytes;
+    torch::Tensor _cpu_buffer;
+    torch::Tensor _contiguous_buffer;
+    const bool _validate;
+
+    io_op_desc_t(const bool read_op,
+                 const torch::Tensor& buffer,
+                 const int fd,
+                 const char* filename,
+                 const long long int num_bytes,
+                 const bool validate);
+
+    char* data_ptr() const;
+    void fini();
+};
+
+struct thread_sync_t {
+    std::mutex _mutex;
+    std::condition_variable _cond_var;
+};
+
+struct deepspeed_aio_thread_t {
+    const int _tid;
+    deepspeed_aio_config_t& _aio_config;
+
+    std::unique_ptr<struct aio_context> _aio_ctxt;
+    std::queue<std::shared_ptr<struct io_op_desc_t>> _work_queue;
+    std::queue<std::shared_ptr<struct io_op_desc_t>> _complete_queue;
+
+    bool _time_to_exit;
+
+    struct thread_sync_t _work_sync;
+    struct thread_sync_t _complete_sync;
+
+    deepspeed_aio_thread_t(const int tid, deepspeed_aio_config_t& aio_config);
+
+    ~deepspeed_aio_thread_t();
+
+    void run();
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_pin_tensor.cpp

@@ -0,0 +1,45 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for managing CPU tensors occupying page-locked memory.
+*/
+
+#include "deepspeed_pin_tensor.h"
+
+using namespace std;
+
+deepspeed_pin_tensor_t::~deepspeed_pin_tensor_t()
+{
+    for (auto iter = _locked_tensors.begin(); iter != _locked_tensors.end(); ++iter) {
+        munlock(iter->first, iter->second);
+    }
+    _locked_tensors.clear();
+}
+
+torch::Tensor deepspeed_pin_tensor_t::alloc(const size_t num_elem, const at::ScalarType& elem_type)
+{
+    const auto num_bytes = num_elem * elementSize(elem_type);
+    auto pinned_buffer = ds_page_aligned_alloc(num_bytes, true);
+    assert(nullptr != pinned_buffer);
+
+    _locked_tensors[pinned_buffer] = num_bytes;
+
+    auto options = torch::TensorOptions().dtype(elem_type).device(torch::kCPU);
+
+    return at::from_blob(pinned_buffer, static_cast<long int>(num_bytes), options);
+}
+
+bool deepspeed_pin_tensor_t::free(torch::Tensor& locked_tensor)
+{
+    auto addr = locked_tensor.data_ptr();
+    if (_locked_tensors.find(addr) != _locked_tensors.end()) {
+        munlock(addr, _locked_tensors[addr]);
+        _locked_tensors.erase(addr);
+        return true;
+    }
+
+    return false;
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_pin_tensor.h

@@ -0,0 +1,27 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for managing CPU tensors occupying page-locked memory.
+TODO: Implement a full-featured manager that
+1. Avoid page-locked memory leaks
+2. Minimize page-locked memory usage by reducing internal fragmentation
+Functionality for managing CPU tensors occupying page-locked memory.
+*/
+
+#include <map>
+#include "deepspeed_py_aio.h"
+
+struct deepspeed_pin_tensor_t {
+    std::map<void*, size_t> _locked_tensors;
+
+    deepspeed_pin_tensor_t() = default;
+
+    ~deepspeed_pin_tensor_t();
+
+    torch::Tensor alloc(const size_t num_elem, const at::ScalarType& elem_type);
+
+    bool free(torch::Tensor& locked_tensor);
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_py_aio.cpp

@@ -0,0 +1,125 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Copyright 2020 The Microsoft DeepSpeed Team
+Licensed under the MIT license.
+
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <assert.h>
+#include <stdlib.h>
+#include <string.h>
+
+#include <fcntl.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+#include <cassert>
+#include <chrono>
+#include <cstring>
+#include <fstream>
+#include <iostream>
+#include <memory>
+#include <string>
+#include <vector>
+
+#include "deepspeed_py_aio.h"
+
+using namespace std;
+using namespace std::chrono;
+
+#define DEBUG_DS_AIO_READ 0
+#define DEBUG_DS_AIO_WRITE 0
+
+static const std::string c_library_name = "deepspeed_aio";
+
+int deepspeed_py_aio_write(const torch::Tensor& buffer,
+                           const char* filename,
+                           const int block_size,
+                           const int queue_depth,
+                           const bool single_submit,
+                           const bool overlap_events,
+                           const bool validate)
+{
+    const auto start_time = std::chrono::high_resolution_clock::now();
+    deepspeed_aio_config_t config(block_size, queue_depth, single_submit, overlap_events, false);
+
+    const auto fd = open_file(filename, false);
+    if (fd == -1) { return -1; }
+
+    auto write_buffer = (char*)buffer.data_ptr();
+    const auto num_write_bytes = static_cast<long long int>(buffer.nbytes());
+    std::unique_ptr<io_xfer_ctxt> xfer_ctxt(new io_xfer_ctxt(fd, 0, num_write_bytes, write_buffer));
+    std::unique_ptr<aio_context> aio_ctxt(new aio_context(config._block_size, config._queue_depth));
+
+    if (config._overlap_events) {
+        do_aio_operation_overlap(false, aio_ctxt, xfer_ctxt, &config, nullptr);
+    } else {
+        do_aio_operation_sequential(false, aio_ctxt, xfer_ctxt, &config, nullptr);
+    }
+    const std::chrono::duration<double> aio_time =
+        std::chrono::high_resolution_clock::now() - start_time;
+
+    close(fd);
+
+    if (validate) { validate_aio_operation(false, filename, write_buffer, num_write_bytes); }
+
+    const std::chrono::duration<double> fn_time =
+        std::chrono::high_resolution_clock::now() - start_time;
+    std::cout << "Elapsed time(usec): "
+              << "aio = " << aio_time.count() * 1e6 << " call = " << fn_time.count() * 1e6
+              << std::endl;
+    return 0;
+}
+
+int deepspeed_py_aio_read(torch::Tensor& buffer,
+                          const char* filename,
+                          const int block_size,
+                          const int queue_depth,
+                          const bool single_submit,
+                          const bool overlap_events,
+                          const bool validate)
+{
+    const auto start_time = std::chrono::high_resolution_clock::now();
+    long long num_file_bytes;
+    if (-1 == get_file_size(filename, num_file_bytes)) {
+        const auto error_code = errno;
+        report_file_error(filename, " fstat for read", error_code);
+        return -1;
+    }
+
+    deepspeed_aio_config_t config(block_size, queue_depth, single_submit, overlap_events, false);
+    const auto fd = open_file(filename, true);
+    if (fd == -1) { return -1; }
+
+    auto read_buffer = (char*)buffer.data_ptr();
+    assert(static_cast<long long int>(buffer.nbytes()) == num_file_bytes);
+
+    std::unique_ptr<io_xfer_ctxt> xfer_ctxt(new io_xfer_ctxt(fd, 0, num_file_bytes, read_buffer));
+    std::unique_ptr<aio_context> aio_ctxt(new aio_context(config._block_size, config._queue_depth));
+
+    if (config._overlap_events) {
+        do_aio_operation_overlap(true, aio_ctxt, xfer_ctxt, &config, nullptr);
+    } else {
+        do_aio_operation_sequential(true, aio_ctxt, xfer_ctxt, &config, nullptr);
+    }
+    const std::chrono::duration<double> aio_time =
+        std::chrono::high_resolution_clock::now() - start_time;
+
+    close(fd);
+
+    if (validate) { validate_aio_operation(true, filename, read_buffer, num_file_bytes); }
+
+    const std::chrono::duration<double> fn_time =
+        std::chrono::high_resolution_clock::now() - start_time;
+    std::cout << "Elapsed time(usec): "
+              << "aio = " << aio_time.count() * 1e6 << " call = " << fn_time.count() * 1e6
+              << std::endl;
+    return 0;
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_py_aio.h

@@ -0,0 +1,31 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Copyright 2020 The Microsoft DeepSpeed Team
+Licensed under the MIT license.
+
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <deepspeed_aio_common.h>
+#include <stdlib.h>
+#include <torch/extension.h>
+
+int deepspeed_py_aio_write(const torch::Tensor& buffer,
+                           const char* filename,
+                           const int block_size,
+                           const int queue_depth,
+                           const bool single_submit,
+                           const bool overlap_events,
+                           const bool validate);
+
+int deepspeed_py_aio_read(torch::Tensor& buffer,
+                          const char* filename,
+                          const int block_size,
+                          const int queue_depth,
+                          const bool single_submit,
+                          const bool overlap_events,
+                          const bool validate);

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_py_aio_handle.cpp

@@ -0,0 +1,298 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Copyright 2020 The Microsoft DeepSpeed Team
+Licensed under the MIT license.
+
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include "deepspeed_py_aio_handle.h"
+
+using namespace std;
+
+static void _start_aio_thread(std::shared_ptr<struct deepspeed_aio_thread_t> ctxt) { ctxt->run(); }
+
+deepspeed_aio_handle_t::deepspeed_aio_handle_t(const int block_size,
+                                               const int queue_depth,
+                                               const bool single_submit,
+                                               const bool overlap_events,
+                                               const int num_threads)
+    : _aio_ctxt(new aio_context(block_size, queue_depth)),
+      _single_submit(single_submit),
+      _overlap_events(overlap_events),
+      _num_threads(num_threads),
+      _aio_config(block_size, queue_depth, single_submit, overlap_events, false),
+      _num_pending_ops(0),
+      _pinned_tensor_mgr(new deepspeed_pin_tensor_t())
+{
+    for (auto i = 0; i < num_threads; ++i) {
+        _thread_contexts.push_back(std::make_shared<deepspeed_aio_thread_t>(i, _aio_config));
+    }
+
+    for (auto& ctxt : _thread_contexts) {
+        _threads.push_back(std::thread(_start_aio_thread, ctxt));
+    }
+}
+
+deepspeed_aio_handle_t::~deepspeed_aio_handle_t()
+{
+    _stop_threads();
+    for (auto& thr : _threads) { thr.join(); }
+}
+
+const int deepspeed_aio_handle_t::get_block_size() const
+{
+    return _aio_ctxt ? _aio_ctxt->_block_size : -1;
+}
+
+const int deepspeed_aio_handle_t::get_queue_depth() const
+{
+    return _aio_ctxt ? _aio_ctxt->_queue_depth : -1;
+}
+
+const bool deepspeed_aio_handle_t::get_single_submit() const { return _single_submit; }
+
+const bool deepspeed_aio_handle_t::get_overlap_events() const { return _overlap_events; }
+
+const int deepspeed_aio_handle_t::get_thread_count() const { return _num_threads; }
+
+int deepspeed_aio_handle_t::read(torch::Tensor& buffer, const char* filename, const bool validate)
+{
+    const auto start_time = std::chrono::high_resolution_clock::now();
+
+    assert(_aio_ctxt);
+
+    long long num_file_bytes;
+    if (-1 == get_file_size(filename, num_file_bytes)) {
+        const auto error_code = errno;
+        report_file_error(filename, " fstat for read", error_code);
+        return -1;
+    }
+    assert(static_cast<long long int>(buffer.nbytes()) == num_file_bytes);
+
+    const auto fd = open_file(filename, true);
+    if (fd == -1) { return -1; }
+
+    auto read_buffer = (char*)buffer.data_ptr();
+    std::unique_ptr<io_xfer_ctxt> xfer_ctxt(new io_xfer_ctxt(fd, 0, num_file_bytes, read_buffer));
+
+    if (_aio_config._overlap_events) {
+        do_aio_operation_overlap(true, _aio_ctxt, xfer_ctxt, &_aio_config, nullptr);
+    } else {
+        do_aio_operation_sequential(true, _aio_ctxt, xfer_ctxt, &_aio_config, nullptr);
+    }
+
+    close(fd);
+    const std::chrono::duration<double> aio_time =
+        std::chrono::high_resolution_clock::now() - start_time;
+
+    if (validate) { validate_aio_operation(true, filename, read_buffer, num_file_bytes); }
+    const std::chrono::duration<double> fn_time =
+        std::chrono::high_resolution_clock::now() - start_time;
+    std::cout << "Elapsed time(usec): "
+              << "aio = " << aio_time.count() * 1e6 << " call = " << fn_time.count() * 1e6
+              << std::endl;
+    return 0;
+}
+
+int deepspeed_aio_handle_t::write(const torch::Tensor& buffer,
+                                  const char* filename,
+                                  const bool validate)
+{
+    assert(_aio_ctxt);
+
+    const auto start_time = std::chrono::high_resolution_clock::now();
+
+    const auto fd = open_file(filename, false);
+    if (fd == -1) { return -1; }
+
+    auto write_buffer = (char*)buffer.data_ptr();
+    const auto num_write_bytes = static_cast<long long int>(buffer.nbytes());
+    std::unique_ptr<io_xfer_ctxt> xfer_ctxt(new io_xfer_ctxt(fd, 0, num_write_bytes, write_buffer));
+
+    if (_aio_config._overlap_events) {
+        do_aio_operation_overlap(false, _aio_ctxt, xfer_ctxt, &_aio_config, nullptr);
+    } else {
+        do_aio_operation_sequential(false, _aio_ctxt, xfer_ctxt, &_aio_config, nullptr);
+    }
+    const std::chrono::duration<double> aio_time =
+        std::chrono::high_resolution_clock::now() - start_time;
+
+    close(fd);
+
+    if (validate) { validate_aio_operation(false, filename, write_buffer, num_write_bytes); }
+
+    const std::chrono::duration<double> fn_time =
+        std::chrono::high_resolution_clock::now() - start_time;
+    std::cout << "Elapsed time(usec): "
+              << "aio = " << aio_time.count() * 1e6 << " call = " << fn_time.count() * 1e6
+              << std::endl;
+    return 0;
+}
+
+void deepspeed_aio_handle_t::_schedule_aio_work(std::shared_ptr<struct io_op_desc_t> scheduled_op)
+{
+    for (auto& ctxt : _thread_contexts) {
+        {
+            std::lock_guard<std::mutex> lock(ctxt->_work_sync._mutex);
+            ctxt->_work_queue.push(scheduled_op);
+        }
+        ctxt->_work_sync._cond_var.notify_one();
+    }
+    _num_pending_ops++;
+}
+
+std::shared_ptr<struct io_op_desc_t> deepspeed_aio_handle_t::_wait_for_aio_work()
+{
+    std::shared_ptr<struct io_op_desc_t> completed_op = nullptr;
+    for (auto& ctxt : _thread_contexts) {
+        std::unique_lock<std::mutex> lock(ctxt->_complete_sync._mutex);
+        ctxt->_complete_sync._cond_var.wait(lock,
+                                            [ctxt] { return !ctxt->_complete_queue.empty(); });
+        completed_op = ctxt->_complete_queue.front();
+        ctxt->_complete_queue.pop();
+    }
+    return completed_op;
+}
+
+void deepspeed_aio_handle_t::_stop_threads()
+{
+    assert(0 == _num_pending_ops);
+    for (auto& ctxt : _thread_contexts) {
+        {
+            std::lock_guard<std::mutex> lock(ctxt->_work_sync._mutex);
+            ctxt->_time_to_exit = true;
+        }
+        ctxt->_work_sync._cond_var.notify_one();
+    }
+}
+
+int deepspeed_aio_handle_t::wait()
+{
+    assert(_num_pending_ops > 0);
+    auto num_completed_ops = 0;
+
+    while (_num_pending_ops > 0) {
+        auto completed_op = _wait_for_aio_work();
+
+        completed_op->fini();
+
+        close(completed_op->_fd);
+
+        if (completed_op->_validate) {
+            validate_aio_operation(completed_op->_read_op,
+                                   completed_op->_filename.c_str(),
+                                   completed_op->data_ptr(),
+                                   _num_threads * completed_op->_num_bytes);
+        }
+        --_num_pending_ops;
+        ++num_completed_ops;
+    }
+
+    return num_completed_ops;
+}
+
+bool deepspeed_aio_handle_t::_is_valid_parallel_aio_op(const bool read_op,
+                                                       const long long int num_bytes)
+{
+    const auto op_string = read_op ? "Read" : "Write";
+    if (num_bytes % get_thread_count()) {
+        std::cout << "deepspeed_aio failure: parallel " << op_string << " num_bytes = " << num_bytes
+                  << " not divisible by thread count = " << get_thread_count() << std::endl;
+        return false;
+    }
+
+    return true;
+}
+
+int deepspeed_aio_handle_t::pread(const torch::Tensor& buffer,
+                                  const char* filename,
+                                  const bool validate,
+                                  const bool async)
+{
+    long long num_file_bytes;
+    if (-1 == get_file_size(filename, num_file_bytes)) {
+        const auto error_code = errno;
+        report_file_error(filename, " fstat for read", error_code);
+        return -1;
+    }
+    const auto buffer_bytes = static_cast<long long int>(buffer.nbytes());
+    if (buffer_bytes != num_file_bytes) {
+        std::cout << filename << ": buffer nbytes != file bytes " << buffer_bytes
+                  << " != " << num_file_bytes << std::endl;
+    }
+    assert(static_cast<long long int>(buffer.nbytes()) == num_file_bytes);
+    assert((num_file_bytes % _num_threads) == 0);
+
+    if (!_is_valid_parallel_aio_op(true, num_file_bytes)) { return -1; }
+
+    const auto fd = open_file(filename, true);
+    if (fd == -1) { return -1; }
+
+    auto scheduled_op = std::make_shared<io_op_desc_t>(
+        true, buffer, fd, filename, (num_file_bytes / _num_threads), validate);
+
+    _schedule_aio_work(scheduled_op);
+
+    if (async) { return 0; }
+
+    return wait();
+}
+
+int deepspeed_aio_handle_t::pwrite(const torch::Tensor& buffer,
+                                   const char* filename,
+                                   const bool validate,
+                                   const bool async)
+{
+    const auto num_write_bytes = static_cast<long long int>(buffer.nbytes());
+    assert((num_write_bytes % _num_threads) == 0);
+
+    if (!_is_valid_parallel_aio_op(false, num_write_bytes)) { return -1; }
+
+    const auto fd = open_file(filename, false);
+    if (fd == -1) { return -1; }
+
+    auto scheduled_op = std::make_shared<io_op_desc_t>(
+        false, buffer, fd, filename, (num_write_bytes / _num_threads), validate);
+
+    _schedule_aio_work(scheduled_op);
+
+    if (async) { return 0; }
+
+    return wait();
+}
+
+int deepspeed_aio_handle_t::sync_pread(torch::Tensor& buffer, const char* filename)
+{
+    return pread(buffer, filename, false, false);
+}
+
+int deepspeed_aio_handle_t::sync_pwrite(const torch::Tensor& buffer, const char* filename)
+{
+    return pwrite(buffer, filename, false, false);
+}
+
+int deepspeed_aio_handle_t::async_pread(torch::Tensor& buffer, const char* filename)
+{
+    return pread(buffer, filename, false, true);
+}
+
+int deepspeed_aio_handle_t::async_pwrite(const torch::Tensor& buffer, const char* filename)
+{
+    return pwrite(buffer, filename, false, true);
+}
+
+at::Tensor deepspeed_aio_handle_t::new_cpu_locked_tensor(const size_t num_elem,
+                                                         const torch::Tensor& example_tensor)
+{
+    return _pinned_tensor_mgr->alloc(num_elem, example_tensor.scalar_type());
+}
+
+bool deepspeed_aio_handle_t::free_cpu_locked_tensor(torch::Tensor& locked_tensor)
+{
+    return _pinned_tensor_mgr->free(locked_tensor);
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_py_aio_handle.h

@@ -0,0 +1,77 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <condition_variable>
+#include <memory>
+#include "deepspeed_aio_thread.h"
+#include "deepspeed_pin_tensor.h"
+
+struct deepspeed_aio_handle_t {
+    std::unique_ptr<struct aio_context> _aio_ctxt;
+    const bool _single_submit;
+    const bool _overlap_events;
+    const int _num_threads;
+    deepspeed_aio_config_t _aio_config;
+
+    std::vector<std::shared_ptr<struct deepspeed_aio_thread_t>> _thread_contexts;
+    std::vector<std::thread> _threads;
+    int _num_pending_ops;
+    std::unique_ptr<struct deepspeed_pin_tensor_t> _pinned_tensor_mgr;
+
+    deepspeed_aio_handle_t(const int block_size,
+                           const int queue_depth,
+                           const bool single_submit,
+                           const bool overlap_events,
+                           const int num_threads);
+
+    ~deepspeed_aio_handle_t();
+
+    const int get_block_size() const;
+    const int get_queue_depth() const;
+    const bool get_single_submit() const;
+    const bool get_overlap_events() const;
+    const int get_thread_count() const;
+
+    int read(torch::Tensor& buffer, const char* filename, const bool validate);
+
+    int write(const torch::Tensor& buffer, const char* filename, const bool validate);
+
+    int pread(const torch::Tensor& buffer,
+              const char* filename,
+              const bool validate,
+              const bool async);
+
+    int pwrite(const torch::Tensor& buffer,
+               const char* filename,
+               const bool validate,
+               const bool async);
+
+    int sync_pread(torch::Tensor& buffer, const char* filename);
+
+    int sync_pwrite(const torch::Tensor& buffer, const char* filename);
+
+    int async_pread(torch::Tensor& buffer, const char* filename);
+
+    int async_pwrite(const torch::Tensor& buffer, const char* filename);
+
+    // TODO: Make API's args to be shape and dtype.
+    torch::Tensor new_cpu_locked_tensor(const size_t num_elem, const torch::Tensor& example_tensor);
+
+    bool free_cpu_locked_tensor(torch::Tensor&);
+
+    int wait();
+
+    void _stop_threads();
+
+    void _schedule_aio_work(std::shared_ptr<struct io_op_desc_t> scheduled_op);
+
+    std::shared_ptr<struct io_op_desc_t> _wait_for_aio_work();
+
+    bool _is_valid_parallel_aio_op(const bool read_op, const long long int num_bytes);
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_py_copy.cpp

@@ -0,0 +1,135 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include "deepspeed_py_copy.h"
+#include <omp.h>
+
+#define ROUND_DOWN(size, step) ((size) & ~((step)-1))
+
+#if defined(__AVX512__) or defined(__AVX256__)
+union AVX_Data {
+#if defined(__AVX512__)
+    __m512 data;
+#else
+    __m256 data;
+#endif
+};
+#endif
+
+static void helper_memcpy_1(float* dest, float* src, size_t param_size)
+{
+    size_t rounded_size = 0;
+
+#if defined(__AVX512__) or defined(__AVX256__)
+
+    rounded_size = ROUND_DOWN(param_size, SIMD_WIDTH);
+
+    for (size_t t = 0; t < rounded_size; t += TILE) {
+        size_t copy_size = TILE;
+        if ((t + TILE) > rounded_size) copy_size = rounded_size - t;
+        size_t offset = copy_size + t;
+#pragma omp parallel for
+        for (size_t i = t; i < offset; i += SIMD_WIDTH) {
+            AVX_Data src_4;
+            src_4.data = SIMD_LOAD(src + i);
+
+            SIMD_STORE(dest + i, src_4.data);
+        }
+    }
+
+#endif
+
+    if (param_size > rounded_size) {
+#pragma omp parallel for
+        for (size_t k = rounded_size; k < param_size; k++) { dest[k] = src[k]; }
+    }
+}
+
+static void helper_memcpy_4(float* dest, float* src, size_t param_size)
+{
+    size_t rounded_size = 0;
+
+#if defined(__AVX512__) or defined(__AVX256__)
+
+    rounded_size = ROUND_DOWN(param_size, (SIMD_WIDTH << 2));
+
+    for (size_t t = 0; t < rounded_size; t += TILE) {
+        size_t copy_size = TILE;
+        if ((t + TILE) > rounded_size) copy_size = rounded_size - t;
+        size_t offset = copy_size + t;
+#pragma omp parallel for
+        for (size_t i = t; i < offset; i += (SIMD_WIDTH << 2)) {
+            AVX_Data src_4[4];
+            src_4[0].data = SIMD_LOAD(src + i);
+            src_4[1].data = SIMD_LOAD(src + i + SIMD_WIDTH);
+            src_4[2].data = SIMD_LOAD(src + i + (SIMD_WIDTH << 1));
+            src_4[3].data = SIMD_LOAD(src + i + SIMD_WIDTH * 3);
+
+            SIMD_STORE(dest + i, src_4[0].data);
+            SIMD_STORE(dest + i + SIMD_WIDTH, src_4[1].data);
+            SIMD_STORE(dest + i + (SIMD_WIDTH << 1), src_4[2].data);
+            SIMD_STORE(dest + i + SIMD_WIDTH * 3, src_4[3].data);
+        }
+    }
+#endif
+    if (param_size > rounded_size)
+        helper_memcpy_1((dest + rounded_size), (src + rounded_size), (param_size - rounded_size));
+}
+
+static void helper_mempcy_8(float* dest, float* src, size_t param_size)
+{
+    size_t rounded_size = 0;
+
+#if defined(__AVX512__) or defined(__AVX256__)
+
+    rounded_size = ROUND_DOWN(param_size, (SIMD_WIDTH << 2));
+
+    for (size_t t = 0; t < rounded_size; t += TILE) {
+        size_t copy_size = TILE;
+        if ((t + TILE) > rounded_size) copy_size = rounded_size - t;
+        size_t offset = copy_size + t;
+#pragma omp parallel for
+        for (size_t i = t; i < offset; i += (SIMD_WIDTH << 3)) {
+            AVX_Data src_4[8];
+            src_4[0].data = SIMD_LOAD(src + i);
+            src_4[1].data = SIMD_LOAD(src + i + SIMD_WIDTH);
+            src_4[2].data = SIMD_LOAD(src + i + (SIMD_WIDTH << 1));
+            src_4[3].data = SIMD_LOAD(src + i + SIMD_WIDTH * 3);
+            src_4[4].data = SIMD_LOAD(src + i + (SIMD_WIDTH << 2));
+            src_4[5].data = SIMD_LOAD(src + i + SIMD_WIDTH * 5);
+            src_4[6].data = SIMD_LOAD(src + i + SIMD_WIDTH * 6);
+            src_4[7].data = SIMD_LOAD(src + i + SIMD_WIDTH * 7);
+
+            SIMD_STORE(dest + i, src_4[0].data);
+            SIMD_STORE(dest + i + SIMD_WIDTH, src_4[1].data);
+            SIMD_STORE(dest + i + (SIMD_WIDTH << 1), src_4[2].data);
+            SIMD_STORE(dest + i + SIMD_WIDTH * 3, src_4[3].data);
+            SIMD_STORE(dest + i + (SIMD_WIDTH << 2), src_4[4].data);
+            SIMD_STORE(dest + i + SIMD_WIDTH * 5, src_4[5].data);
+            SIMD_STORE(dest + i + SIMD_WIDTH * 6, src_4[6].data);
+            SIMD_STORE(dest + i + SIMD_WIDTH * 7, src_4[7].data);
+        }
+    }
+#endif
+    if (param_size > rounded_size)
+        helper_memcpy_4((dest + rounded_size), (src + rounded_size), (param_size - rounded_size));
+}
+
+int deepspeed_py_memcpy(torch::Tensor& dest, const torch::Tensor& src)
+{
+    auto dest_c = dest.contiguous();
+    auto src_c = src.contiguous();
+
+    float* dest_ptr = (float*)dest_c.data_ptr();
+    float* src_ptr = (float*)src_c.data_ptr();
+
+    helper_mempcy_8(dest_ptr, src_ptr, dest_c.size(0));
+
+    return 0;
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/deepspeed_py_copy.h

@@ -0,0 +1,46 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Copyright 2020 The Microsoft DeepSpeed Team
+Licensed under the MIT license.
+
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#if (__x86_64__ || __i386__)
+#include <cpuid.h>
+#include <x86intrin.h>
+#endif
+
+#include <deepspeed_aio_common.h>
+#include <stdlib.h>
+#include <torch/extension.h>
+
+#define TILE (1024 * 1024 * 1024)
+
+#if defined(__AVX512__)
+#define SIMD_STORE(a, d) _mm512_storeu_ps(a, d)
+#define SIMD_LOAD(x) _mm512_loadu_ps(x)
+#define SIMD_SET(x) _mm512_set1_ps(x)
+#define SIMD_MUL(x, y) _mm512_mul_ps(x, y)
+#define SIMD_FMA(x, y, c) _mm512_fmadd_ps(x, y, c)
+#define SIMD_SQRT(x) _mm512_sqrt_ps(x)
+#define SIMD_DIV(x, y) _mm512_div_ps(x, y)
+#define SIMD_WIDTH 16
+#else
+#if defined(__AVX256__)
+#define SIMD_STORE(a, d) _mm256_storeu_ps(a, d)
+#define SIMD_LOAD(x) _mm256_loadu_ps(x)
+#define SIMD_SET(x) _mm256_set1_ps(x)
+#define SIMD_MUL(x, y) _mm256_mul_ps(x, y)
+#define SIMD_FMA(x, y, c) _mm256_fmadd_ps(x, y, c)
+#define SIMD_SQRT(x) _mm256_sqrt_ps(x)
+#define SIMD_DIV(x, y) _mm256_div_ps(x, y)
+#define SIMD_WIDTH 8
+#endif
+#endif
+
+int deepspeed_py_memcpy(torch::Tensor& dest, const torch::Tensor& src);

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_lib/py_ds_aio.cpp

@@ -0,0 +1,46 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*
+Functionality for swapping optimizer tensors to/from (NVMe) storage devices.
+*/
+
+#include <torch/extension.h>
+#include "deepspeed_py_aio_handle.h"
+#include "deepspeed_py_copy.h"
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    m.def("aio_read", &deepspeed_py_aio_read, "DeepSpeed Asynchronous I/O Read");
+
+    m.def("aio_write", &deepspeed_py_aio_write, "DeepSpeed Asynchronous I/O Write");
+
+    m.def("deepspeed_memcpy", &deepspeed_py_memcpy, "DeepSpeed Memory Copy");
+
+    py::class_<deepspeed_aio_handle_t>(m, "aio_handle")
+        .def(py::init<const int, const int, const bool, const bool, const int>())
+
+        .def("get_block_size", &deepspeed_aio_handle_t::get_block_size)
+        .def("get_queue_depth", &deepspeed_aio_handle_t::get_queue_depth)
+        .def("get_single_submit", &deepspeed_aio_handle_t::get_single_submit)
+        .def("get_overlap_events", &deepspeed_aio_handle_t::get_overlap_events)
+        .def("get_thread_count", &deepspeed_aio_handle_t::get_thread_count)
+
+        .def("read", &deepspeed_aio_handle_t::read)
+        .def("write", &deepspeed_aio_handle_t::write)
+
+        .def("pread", &deepspeed_aio_handle_t::pread)
+        .def("pwrite", &deepspeed_aio_handle_t::pwrite)
+
+        .def("sync_pread", &deepspeed_aio_handle_t::sync_pread)
+        .def("sync_pwrite", &deepspeed_aio_handle_t::sync_pwrite)
+        .def("async_pread", &deepspeed_aio_handle_t::async_pread)
+        .def("async_pwrite", &deepspeed_aio_handle_t::async_pwrite)
+
+        .def("new_cpu_locked_tensor", &deepspeed_aio_handle_t::new_cpu_locked_tensor)
+        .def("free_cpu_locked_tensor", &deepspeed_aio_handle_t::free_cpu_locked_tensor)
+
+        .def("wait", &deepspeed_aio_handle_t::wait);
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/aio/py_test/single_process_config.json

@@ -0,0 +1,29 @@
+{
+    "block_size": [
+        "128K",
+        "256K",
+        "1M"
+    ],
+    "queue_depth": [
+        4,
+        16,
+        32
+    ],
+    "io_parallel": [
+        1,
+        2,
+        4,
+        8
+    ],
+    "single_submit": [
+        true,
+        false
+    ],
+    "overlap_events": [
+        true,
+        false
+    ],
+    "threads": [
+        1
+    ]
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/cpu/adam/fused_adam.cpp

@@ -0,0 +1,48 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include "cpu_adam.h"
+
+// C++ interface
+
+void multi_tensor_adam(int chunk_size,
+                       at::Tensor noop_flag,
+                       std::vector<std::vector<at::Tensor>> tensor_lists, /*gpmv*/
+                       const float lr,
+                       const float beta1,
+                       const float beta2,
+                       const float epsilon,
+                       const int step,
+                       const int mode,
+                       const int bias_correction,
+                       const float weight_decay)
+{
+    static bool initialized = false;
+    if (!initialized) {
+        create_adam_optimizer(0);
+        initialized = true;
+    }
+    for (int i = 0; i < tensor_lists[0].size(); i++) {
+        ds_adam_step(0,
+                     step,
+                     lr,
+                     beta1,
+                     beta2,
+                     epsilon,
+                     weight_decay,
+                     bias_correction,
+                     tensor_lists[1][i],
+                     tensor_lists[0][i],
+                     tensor_lists[2][i],
+                     tensor_lists[3][i]);
+    }
+}
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    m.def("multi_tensor_adam",
+          &multi_tensor_adam,
+          "Compute and apply gradient update to parameters for Adam optimizer");
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/cpu/comm/ccl.cpp

@@ -0,0 +1,344 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include <torch/extension.h>
+
+#include <oneapi/ccl.hpp>
+#include "shm.h"
+
+// #define DO_PROFILE
+#ifdef DO_PROFILE
+#include <cfloat>
+#include <chrono>
+#endif
+
+// Communication settings
+static int world_rank = -1;
+static int world_size = -1;
+
+static std::set<int> _comm_ids;
+static std::set<int> _colors;
+static std::vector<ccl::communicator> _ccl_comms;
+static ccl::shared_ptr_class<ccl::kvs> sub_kvs;
+static std::map<std::vector<int>, int> group_to_comm_id;
+
+ccl::communicator& _get_comm_from_group() { return _ccl_comms[0]; }
+ccl::communicator& _get_comm_from_group(py::object group) { return _ccl_comms[0]; }
+ccl::communicator& _get_comm_from_group(std::vector<int> ranks)
+{
+    if (group_to_comm_id.find(ranks) != group_to_comm_id.end()) {
+        auto id = group_to_comm_id.find(ranks);
+        return _ccl_comms[id->second];
+    }
+    return _ccl_comms[0];
+}
+
+#define CCLCHECK(cmd) \
+    do {              \
+        cmd;          \
+    } while (0)
+
+#define KVS_CREATE_SUCCESS 0
+#define KVS_CREATE_FAILURE -1
+
+static bool is_initialized = 0;
+
+static ccl::shared_ptr_class<ccl::kvs> kvs;
+
+static bool all_ranks_local_p = false;
+
+void initialize(int size, int rank, torch::Tensor& kvs_data)
+{
+    if (is_initialized) return;
+
+    // Check whether all ranks is on the same physical machine.
+    // If true, we will use an SHM based low latency allreduce
+
+    auto ls_string = std::getenv("LOCAL_SIZE");
+    int ls = 0;
+    if (ls_string != NULL) { ls = std::stoi(std::getenv("LOCAL_SIZE")); }
+
+    if (size >= 1 && size == ls) { all_ranks_local_p = true; }
+
+    world_size = size;
+    world_rank = rank;
+    is_initialized = 1;
+
+    ccl::kvs::address_type main_addr;
+
+    if (rank != 0) {
+        memcpy(main_addr.data(), kvs_data.data_ptr(), main_addr.size());
+        kvs = ccl::create_kvs(main_addr);
+    }
+
+    _ccl_comms.emplace_back(ccl::create_communicator(size, rank, kvs));
+
+    auto addr_string = std::getenv("MASTER_ADDR");
+    if (addr_string == NULL) { addr_string = ""; }
+    auto port_string = std::getenv("MASTER_PORT");
+    if (port_string == NULL) { port_string = ""; }
+
+    if (all_ranks_local_p) { shm_initialize(size, rank, addr_string, port_string); }
+}
+
+/*
+    rank == 0: create main kvs and return its address
+    rank == else: return an empty address
+*/
+std::vector<uint8_t> get_kvs_addr(int rank)
+{
+    if (rank == 0) {
+        kvs = ccl::create_main_kvs();
+        ccl::kvs::address_type main_addr = kvs->get_address();
+        auto ccl_kvs_addr = std::vector<uint8_t>(main_addr.begin(), main_addr.end());
+        return ccl_kvs_addr;
+    } else {
+        ccl::kvs::address_type main_addr;
+        auto ccl_kvs_addr = std::vector<uint8_t>(main_addr.begin(), main_addr.end());
+        return ccl_kvs_addr;
+    }
+}
+
+int get_rank(int group = 0) { return world_rank; }
+
+int get_world_size(int group = 0) { return world_size; }
+
+// Find the next ordered, unique value to a set. E.g. <0,1,2,7> --> 3
+int next_unique_val(std::set<int> s)
+{
+    std::set<int>::iterator itr;
+    // Base case. Add 0 to start of set.
+    if (s.empty() || *s.begin() != 0) {
+        return 0;
+        // second base case where s = {0} (the case of s = {n != 0} is caught above)
+    } else if (s.size() == 1) {
+        return 1;
+    } else {
+        int prev_val = *s.begin();
+        for (itr = std::next(s.begin()); itr != s.end(); itr++) {
+            if (*itr != prev_val + 1) { return prev_val + 1; }
+            prev_val = *itr;
+        }
+        return *(s.end()) + 1;
+    }
+}
+
+std::vector<uint8_t> get_sub_kvs_addr(bool first)
+{
+    if (first) {
+        sub_kvs = ccl::create_main_kvs();
+        ccl::kvs::address_type main_addr = sub_kvs->get_address();
+        auto ccl_kvs_addr = std::vector<uint8_t>(main_addr.begin(), main_addr.end());
+        return ccl_kvs_addr;
+    } else {
+        ccl::kvs::address_type main_addr;
+        auto ccl_kvs_addr = std::vector<uint8_t>(main_addr.begin(), main_addr.end());
+        return ccl_kvs_addr;
+    }
+}
+
+void initialize_sub_comm(int size, int rank, torch::Tensor& kvs_data, std::vector<int> ranks)
+{
+    ccl::kvs::address_type main_addr;
+    if (rank != 0) {
+        memcpy(main_addr.data(), kvs_data.data_ptr(), main_addr.size());
+        sub_kvs = ccl::create_kvs(main_addr);
+    }
+    _ccl_comms.push_back(ccl::create_communicator(size, rank, sub_kvs));
+    group_to_comm_id[ranks] = _ccl_comms.size() - 1;
+}
+
+ccl::datatype get_ccl_datatype(c10::ScalarType type)
+{
+    ccl::datatype ccl_type;
+    switch (type) {
+        case c10::ScalarType::Int: ccl_type = ccl::datatype::int32; break;
+        case c10::ScalarType::Long: ccl_type = ccl::datatype::int64; break;
+        case c10::ScalarType::Float: ccl_type = ccl::datatype::float32; break;
+        case c10::ScalarType::Double: ccl_type = ccl::datatype::float64; break;
+        case c10::ScalarType::BFloat16: ccl_type = ccl::datatype::bfloat16; break;
+        case c10::ScalarType::Half: ccl_type = ccl::datatype::float16; break;
+        default: ccl_type = ccl::datatype::int8;
+    }
+    return ccl_type;
+}
+
+ccl::reduction get_ccl_reduce_op(py::object op, at::Tensor& input)
+{
+    py::object ReduceOp = py::module_::import("deepspeed.comm").attr("ReduceOp");
+    if (!py::isinstance(op, ReduceOp)) {
+        throw std::runtime_error("Error: Op must be of type ReduceOp");
+    }
+
+    int op_val = py::int_(op.attr("value"));
+    ccl::reduction ccl_op;
+
+    if (input.scalar_type() == at::kBool) {
+        if (op_val == (int)py::int_(ReduceOp.attr("SUM").attr("value"))) {
+            // For bool tensors, map sum to max, which both represent a bitwise or.
+            // This is to prevent overflow issues with sum, since we use uint8 to
+            // represent a bool (see cclDataType mapping).
+            ccl_op = ccl::reduction::max;
+        } else if (op_val == (int)py::int_(ReduceOp.attr("AVG").attr("value"))) {
+            throw std::runtime_error("Error: For bool tensors, op must be of type ReduceOp");
+        }
+    }
+
+    if (op_val == (int)py::int_(ReduceOp.attr("SUM").attr("value"))) {
+        ccl_op = ccl::reduction::sum;
+    } else if (op_val == (int)py::int_(ReduceOp.attr("MIN").attr("value"))) {
+        ccl_op = ccl::reduction::min;
+    } else if (op_val == (int)py::int_(ReduceOp.attr("MAX").attr("value"))) {
+        ccl_op = ccl::reduction::max;
+    } else if (op_val == (int)py::int_(ReduceOp.attr("PRODUCT").attr("value"))) {
+        ccl_op = ccl::reduction::prod;
+    } else {
+        throw std::runtime_error("Error: Unrecognized ReduceOp type");
+    }
+    return ccl_op;
+}
+
+void broadcast(torch::Tensor& data, int src, std::vector<int> group, bool async_op)
+{
+    CCLCHECK(ccl::broadcast(data.data_ptr(),
+                            data.numel(),
+                            get_ccl_datatype(data.scalar_type()),
+                            src,
+                            _get_comm_from_group(group))
+                 .wait());
+}
+
+// TODO: implement torch's async_op behavior, document it.
+void all_reduce(torch::Tensor& data, py::object op, std::vector<int> group, bool async_op)
+{
+    CCLCHECK(ccl::allreduce(data.data_ptr(),
+                            data.data_ptr(),
+                            data.numel(),
+                            get_ccl_datatype(data.scalar_type()),
+                            get_ccl_reduce_op(op, data),
+                            _get_comm_from_group(group))
+                 .wait());
+}
+
+void all_reduce_caching(torch::Tensor& data,
+                        py::object op,
+                        std::string match_id,
+                        std::vector<int> group,
+                        bool async_op)
+{
+    ccl::allreduce_attr attr = ccl::default_allreduce_attr;
+    auto match_str = ccl::v1::string(match_id);
+    attr.template set<ccl::operation_attr_id::to_cache>(true);
+    attr.template set<ccl::operation_attr_id::match_id>(match_str);
+    // To control this, use operation attribute and set true value for to_cache field and unique
+    // string (for example, tensor name) for match_id field. Note that:
+    //   match_id should be the same for a specific communication operation across all ranks.
+    //   If the same tensor is a part of different communication operations, match_id should have
+    //   different values for each of these operations.
+    CCLCHECK(ccl::allreduce(data.data_ptr(),
+                            data.data_ptr(),
+                            data.numel(),
+                            get_ccl_datatype(data.scalar_type()),
+                            get_ccl_reduce_op(op, data),
+                            _get_comm_from_group(group),
+                            attr)
+                 .wait());
+}
+
+void inference_all_reduce(torch::Tensor& data, py::object op)
+{
+#ifdef DO_PROFILE
+    static double total_time = 0.0;
+    static double total_time_sq = 0.0;
+    static int count = -16;  // warmup
+    static double max_time = 0.0;
+    static double min_time = DBL_MAX;
+    // make sure all rank reach this point before measuring time
+    // turn on this if you suspect each rank didn't reach here at the same time (stragger)
+    // if (all_ranks_local_p) {
+    // barrier_wait(0, world_size);
+    //}
+    auto start = std::chrono::system_clock::now();
+#endif
+
+    static py::object ReduceOp = py::module_::import("deepspeed.comm").attr("ReduceOp");
+    static auto ReduceOpSum = (int)py::int_(ReduceOp.attr("SUM").attr("value"));
+
+    assert(py::int_(op.attr("value")) == ReduceOpSum);
+
+    auto numel = data.numel();
+
+    int data_size = 0;
+    bool data_type_fallback = false;
+
+    switch (data.scalar_type()) {
+        case c10::ScalarType::BFloat16: data_size = numel * 2; break;
+        case c10::ScalarType::Float: data_size = numel * 4; break;
+        default: data_type_fallback = true;
+    }
+
+    if (data_type_fallback || !all_ranks_local_p) {
+        // fallback to oneccl allreduce
+        CCLCHECK(ccl::allreduce(data.data_ptr(),
+                                data.data_ptr(),
+                                data.numel(),
+                                get_ccl_datatype(data.scalar_type()),
+                                get_ccl_reduce_op(op, data),
+                                _get_comm_from_group())
+                     .wait());
+    } else {
+        all_reduce_outer_loop(data, numel, data_size);
+    }
+
+#ifdef DO_PROFILE
+    auto end = std::chrono::system_clock::now();
+    count++;
+    if (count > 0) {
+        double elapsed = std::chrono::duration_cast<std::chrono::microseconds>(end - start).count();
+        if (elapsed > max_time) { max_time = elapsed; }
+        if (elapsed < min_time) { min_time = elapsed; }
+        total_time += elapsed;
+        total_time_sq += elapsed * elapsed;
+        if (world_rank == 0 && count == 1000) {
+            auto avg = total_time / count;
+            auto sd =
+                sqrt(total_time_sq / count - total_time * total_time / (count * count)) / avg * 100;
+            printf("      C++ kernel\t\t    %.2f\t  %.2f\t%.2f\t      %.2f\n",
+                   min_time,
+                   max_time,
+                   total_time / count,
+                   sd);
+        }
+    }
+#endif
+}
+
+void barrier(std::vector<int> group, bool async_op)
+{
+    CCLCHECK(ccl::barrier(_get_comm_from_group(group)).wait());
+}
+
+std::vector<std::string> get_available_coll()
+{
+    std::vector<std::string> colls{
+        "broadcast", "all_reduce", "inference_all_reduce", "all_reduce_caching", "barrier"};
+    return colls;
+}
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    m.def("get_kvs_addr", &get_kvs_addr, "create and get main kvs addr");
+    m.def("initialize", &initialize, "ccl initialize");
+    m.def("get_rank", &get_rank, "get rank");
+    m.def("get_world_size", &get_world_size, "get world size");
+    m.def("broadcast", &broadcast, "ccl broadcast");
+    m.def("all_reduce", &all_reduce, "ccl all_reduce");
+    m.def("inference_all_reduce", &inference_all_reduce, "low latency all_reduce implementation");
+    m.def("all_reduce_caching", &all_reduce_caching, "ccl all_reduce with caching");
+    m.def("barrier", &barrier, "barrier");
+    m.def("initialize_sub_comm", &initialize_sub_comm, "initialize_sub_comm");
+    m.def("get_sub_kvs_addr", &get_sub_kvs_addr, "get_sub_kvs_addr");
+    m.def("get_available_coll", &get_available_coll, "get_available_coll");
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/cpu/comm/shm.cpp

@@ -0,0 +1,686 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include <torch/extension.h>
+
+#include <ATen/ATen.h>
+#include <fcntl.h>
+#include <immintrin.h>
+#include <semaphore.h>
+#include <sys/mman.h>
+#include "shm.h"
+
+// #define DO_PROFILE
+#ifdef DO_PROFILE
+#include <cfloat>
+#include <chrono>
+#endif
+
+// states for collectives
+enum coll_state {
+    coll_begin = 0,
+    coll_allreduce_naive__copy_in_done,   // this state is for rank != 0
+    coll_allreduce_naive__reduce_done,    // this state is for rank == 0
+    coll_allreduce_naive__copy_out_done,  // this state is for rank != 0
+};
+
+// SHM building blocks
+struct SharedData {
+    const char* name;
+    int descriptor;
+    void* bytes;
+    size_t nbytes;
+};
+
+void shared_open(SharedData* data, const char* name, size_t nbytes)
+{
+    int d = shm_open(name, O_RDWR, S_IRUSR | S_IWUSR);
+    if (d != -1) {
+        void* bytes = mmap(NULL, nbytes, PROT_READ | PROT_WRITE, MAP_SHARED, d, 0);
+        data->name = name;
+        data->descriptor = d;
+        data->bytes = bytes;
+        data->nbytes = nbytes;
+    } else {
+        if (errno != ENOENT) {
+            // don't print if shm can not be found because we want to loop over from
+            // caller again until the other ranks created the shm
+            printf("shared_open %s failed, errno=%d\n", name, errno);
+        }
+        data->descriptor = -1;
+    }
+}
+
+void shared_create(SharedData* data, const char* name, void* bytes, size_t nbytes)
+{
+    int d = shm_open(name, O_CREAT | O_RDWR, S_IRUSR | S_IWUSR);
+    if (d != -1) {
+        if (nbytes = write(d, bytes, nbytes)) { shared_open(data, name, nbytes); }
+    } else {
+        printf("shared_create %s failed\n", name);
+    }
+}
+
+void shared_close(SharedData* data)
+{
+    if (data->descriptor != -1) {
+        munmap(data->bytes, data->nbytes);
+        shm_unlink(data->name);
+    }
+}
+
+// SHM based allreduce helper functions
+// buffer that holds shm name
+#define NAME_BUF_SIZE 1000
+#define MAX_BUF_SIZE 1048576 * 32
+#define NAIVE_ALLREDUCE_THRESHOLD 1048576
+#define SHM_BUFFER_NAME "deepspeed_allreduce_buffer"
+struct allreduce_workspace {
+    enum coll_state state;
+    sem_t mutex;
+    sem_t turnstile1;
+    sem_t turnstile2;
+    int counter;
+    char buffer[MAX_BUF_SIZE];
+};
+struct allreduce_workspace** workspace;
+
+void wait_buffer_state_until(int index, enum coll_state state)
+{
+    volatile enum coll_state* state_ptr = &(workspace[index]->state);
+
+    while (*state_ptr != state)
+        ;
+}
+
+void wait_buffer_state_until_range(int index, enum coll_state start, int size)
+{
+    volatile enum coll_state* state_ptr = &(workspace[index]->state);
+    enum coll_state end = (enum coll_state)(start + size);
+
+    while (1) {
+        volatile enum coll_state cur_state = *state_ptr;
+        if (cur_state >= start and cur_state < end) break;
+    }
+}
+
+void wait_buffer_state_until_not(int index, enum coll_state state)
+{
+    volatile enum coll_state* state_ptr = &(workspace[index]->state);
+
+    while (*state_ptr == state)
+        ;
+}
+
+void barrier_wait(int root_idx, int num_ranks)
+{
+    // Phase 1: Wait for all threads to enter the barrier
+    auto shared = workspace[root_idx];
+    sem_wait(&shared->mutex);
+    shared->counter++;
+    if (shared->counter == num_ranks) {
+        for (int i = 0; i < num_ranks; ++i) { sem_post(&shared->turnstile1); }
+    }
+    sem_post(&shared->mutex);
+    sem_wait(&shared->turnstile1);
+
+    // Phase 2: Wait for all threads to exit the barrier
+    sem_wait(&shared->mutex);
+    shared->counter--;
+    if (shared->counter == 0) {
+        for (int i = 0; i < num_ranks; ++i) { sem_post(&shared->turnstile2); }
+    }
+    sem_post(&shared->mutex);
+    sem_wait(&shared->turnstile2);
+}
+
+__m512 cvt_bf16_to_fp32(const __m256i src) __attribute__((target("avx512bw")));
+inline __m512 cvt_bf16_to_fp32(const __m256i src)
+{
+    auto y = _mm512_cvtepu16_epi32(src);
+    return _mm512_castsi512_ps(_mm512_bslli_epi128(y, 2));
+}
+
+inline __m256i cvt_fp32_to_bf16(const __m512 src) __attribute__((target("avx512bw")));
+inline __m256i cvt_fp32_to_bf16(const __m512 src)
+{
+    __m512i value = _mm512_castps_si512(src);
+    __m512i nan = _mm512_set1_epi32(0xffff);
+    auto mask_value = _mm512_cmp_ps_mask(src, src, _CMP_ORD_Q);
+    __m512i ones = _mm512_set1_epi32(0x1);
+    __m512i vec_bias = _mm512_set1_epi32(0x7fff);
+    // uint32_t lsb = (input >> 16) & 1;
+    auto t_value = _mm512_and_si512(_mm512_srli_epi32(value, 16), ones);
+    // uint32_t rounding_bias = 0x7fff + lsb;
+    t_value = _mm512_add_epi32(t_value, vec_bias);
+    // input += rounding_bias;
+    t_value = _mm512_add_epi32(t_value, value);
+    // input = input >> 16;
+    t_value = _mm512_srli_epi32(t_value, 16);
+    // Check NaN before converting back to bf16
+    t_value = _mm512_mask_blend_epi32(mask_value, nan, t_value);
+    return _mm512_cvtusepi32_epi16(t_value);
+}
+
+void reduce_2_bf16_buffers_iio(int num_elements, void* in0, void* in1, void* out)
+    __attribute__((target("avx512bw")));
+
+void reduce_bf16_buffers(int start_elements,
+                         int num_elements,
+                         int num_buffers,
+                         int to_buffer_idx,
+                         struct allreduce_workspace** workspace)
+    __attribute__((target("avx512bw")));
+
+void reduce_2_fp32_buffers_iio(int num_elements, void* in0, void* in1, void* out)
+    __attribute__((target("avx512bw")));
+
+void reduce_fp32_buffers(int start_elements,
+                         int num_elements,
+                         int num_buffers,
+                         int to_buffer_idx,
+                         struct allreduce_workspace** workspace)
+    __attribute__((target("avx512bw")));
+
+// N_REDUCE_LIMIT is the number of buffers that can be reduced together in one shot.
+// Compared with do N-1 2-reduces which needs 2*(N-1) read and N-1 write,
+// N-reduce only needs N read and 1 write, this saves 2/3 memory bandwidth.
+// When increase N_REDUCE_LIMIT to a bigger number, do the following steps
+// 1. Extend REPEAT_<X> macros list down below
+// 2. Extend switch cases which call "REPEAT(X, ...)" down below
+#define N_REDUCE_LIMIT 16
+
+void reduce_all_buffers(struct allreduce_workspace** workspace,
+                        int start_elements,
+                        int num_elements,
+                        c10::ScalarType scalar_type,
+                        int num_buffers,
+                        int to_buffer_idx)
+{
+    switch (scalar_type) {
+        case c10::ScalarType::BFloat16:
+            if (num_buffers > 2 && num_buffers <= N_REDUCE_LIMIT) {
+                reduce_bf16_buffers(
+                    start_elements, num_elements, num_buffers, to_buffer_idx, workspace);
+            } else {
+                for (int i = 0; i < num_buffers; i++) {
+                    if (i == to_buffer_idx) continue;
+                    reduce_2_bf16_buffers_iio(
+                        num_elements,
+                        workspace[i]->buffer + start_elements * 2,
+                        workspace[to_buffer_idx]->buffer + start_elements * 2,
+                        workspace[to_buffer_idx]->buffer + start_elements * 2);
+                }
+            }
+            break;
+        case c10::ScalarType::Float:
+            if (num_buffers > 2 && num_buffers <= N_REDUCE_LIMIT) {
+                reduce_fp32_buffers(
+                    start_elements, num_elements, num_buffers, to_buffer_idx, workspace);
+            } else {
+                for (int i = 0; i < num_buffers; i++) {
+                    if (i == to_buffer_idx) continue;
+                    reduce_2_fp32_buffers_iio(
+                        num_elements,
+                        workspace[i]->buffer + start_elements * 4,
+                        workspace[to_buffer_idx]->buffer + start_elements * 4,
+                        workspace[to_buffer_idx]->buffer + start_elements * 4);
+                }
+            }
+            break;
+        default: assert(!"Should not get here");
+    }
+}
+
+#define REPEAT(N, x) REPEAT_##N(x)
+#define REPEAT_1(x) x(1)
+#define REPEAT_2(x) \
+    REPEAT_1(x);    \
+    x(2)
+#define REPEAT_3(x) \
+    REPEAT_2(x);    \
+    x(3)
+#define REPEAT_4(x) \
+    REPEAT_3(x);    \
+    x(4)
+#define REPEAT_5(x) \
+    REPEAT_4(x);    \
+    x(5)
+#define REPEAT_6(x) \
+    REPEAT_5(x);    \
+    x(6)
+#define REPEAT_7(x) \
+    REPEAT_6(x);    \
+    x(7)
+#define REPEAT_8(x) \
+    REPEAT_7(x);    \
+    x(8)
+#define REPEAT_9(x) \
+    REPEAT_8(x);    \
+    x(9)
+#define REPEAT_10(x) \
+    REPEAT_9(x);     \
+    x(10)
+#define REPEAT_11(x) \
+    REPEAT_10(x);    \
+    x(11)
+#define REPEAT_12(x) \
+    REPEAT_11(x);    \
+    x(12)
+#define REPEAT_13(x) \
+    REPEAT_12(x);    \
+    x(13)
+#define REPEAT_14(x) \
+    REPEAT_13(x);    \
+    x(14)
+#define REPEAT_15(x) \
+    REPEAT_14(x);    \
+    x(15)
+
+#define CVT_ADD_BF16(x)                                                                 \
+    do {                                                                                \
+        auto in##x##_val =                                                              \
+            cvt_bf16_to_fp32(_mm256_loadu_si256((__m256i*)(workspace[x]->buffer + i))); \
+        inout_val = _mm512_add_ps(inout_val, in##x##_val);                              \
+    } while (0)
+
+// Reduce functions down below use vectorized algorithm, the number of bytes processed each
+// iteration depends on vector length.  256bit vector ==> 32 bytes, 512bit vector ==> 64 bytes
+// If you change implementation of reduce_2_bf16_buffers_iio or reduce_2_fp32_buffers_iio, check
+// whether this number needs to be changed
+#define VECTOR_LENGTH_IN_BYTES 32
+
+void reduce_bf16_buffers(int start_elements,
+                         int num_elements,
+                         int num_buffers,
+                         int to_buffer_idx,
+                         struct allreduce_workspace** workspace)
+{
+    const int element_size = 2;
+    const int vector_length = VECTOR_LENGTH_IN_BYTES / element_size;
+    int main_elements = num_elements - (num_elements % vector_length);
+    int remain_elements = num_elements % vector_length;
+
+    // process aligned part
+#pragma omp parallel for
+    for (int i = start_elements * element_size; i < (start_elements + main_elements) * element_size;
+         i += VECTOR_LENGTH_IN_BYTES) {
+        auto inout_val = cvt_bf16_to_fp32(_mm256_loadu_si256((__m256i*)(workspace[0]->buffer + i)));
+        switch (num_buffers) {
+            case 16: REPEAT(15, CVT_ADD_BF16); break;
+            case 15: REPEAT(14, CVT_ADD_BF16); break;
+            case 14: REPEAT(13, CVT_ADD_BF16); break;
+            case 13: REPEAT(12, CVT_ADD_BF16); break;
+            case 12: REPEAT(11, CVT_ADD_BF16); break;
+            case 11: REPEAT(10, CVT_ADD_BF16); break;
+            case 10: REPEAT(9, CVT_ADD_BF16); break;
+            case 9: REPEAT(8, CVT_ADD_BF16); break;
+            case 8: REPEAT(7, CVT_ADD_BF16); break;
+            case 7: REPEAT(6, CVT_ADD_BF16); break;
+            case 6: REPEAT(5, CVT_ADD_BF16); break;
+            case 5: REPEAT(4, CVT_ADD_BF16); break;
+            case 4: REPEAT(3, CVT_ADD_BF16); break;
+            case 3: REPEAT(2, CVT_ADD_BF16); break;
+            default: assert(!"Should not get here.");
+        }
+        _mm256_storeu_si256((__m256i*)(workspace[to_buffer_idx]->buffer + i),
+                            cvt_fp32_to_bf16(inout_val));
+    }
+
+    // process remaining part
+    int i = (start_elements + main_elements) * element_size;
+    while (remain_elements > 0) {
+        float val = 0.0f;
+        for (int j = 0; j < num_buffers; j++) { val += *(at::BFloat16*)(workspace[j]->buffer + i); }
+        *(at::BFloat16*)(workspace[to_buffer_idx]->buffer + i) = val;
+        remain_elements--;
+        i += element_size;
+    }
+}
+
+void reduce_2_bf16_buffers_iio(int num_elements, void* in0, void* in1, void* out)
+{
+    const int element_size = 2;
+    const int vector_length = VECTOR_LENGTH_IN_BYTES / element_size;
+    int main_elements = num_elements - (num_elements % vector_length);
+    int remain_elements = num_elements % vector_length;
+
+    // process aligned part
+#pragma omp parallel for
+    for (int i = 0; i < main_elements * element_size; i += VECTOR_LENGTH_IN_BYTES) {
+        auto in0_val = cvt_bf16_to_fp32(_mm256_loadu_si256((__m256i*)((char*)in0 + i)));
+        auto in1_val = cvt_bf16_to_fp32(_mm256_loadu_si256((__m256i*)((char*)in1 + i)));
+        auto out_val = _mm512_add_ps(in0_val, in1_val);
+        _mm256_storeu_si256((__m256i*)((char*)out + i), cvt_fp32_to_bf16(out_val));
+    }
+
+    // process remaining part
+    int i = main_elements * element_size;
+    while (remain_elements > 0) {
+        float in0_val = *((at::BFloat16*)((char*)in0 + i));
+        float in1_val = *((at::BFloat16*)((char*)in1 + i));
+        *((at::BFloat16*)((char*)out + i)) = in0_val + in1_val;
+        remain_elements--;
+        i += element_size;
+    }
+}
+
+#define CVT_ADD_F32(x)                                                          \
+    do {                                                                        \
+        auto in##x##_val = _mm256_loadu_ps((float*)(workspace[x]->buffer + i)); \
+        inout_val = _mm256_add_ps(inout_val, in##x##_val);                      \
+    } while (0)
+
+void reduce_fp32_buffers(int start_elements,
+                         int num_elements,
+                         int num_buffers,
+                         int to_buffer_idx,
+                         struct allreduce_workspace** workspace)
+{
+    const int element_size = 4;
+    const int vector_length = VECTOR_LENGTH_IN_BYTES / element_size;
+    int main_elements = num_elements - (num_elements % vector_length);
+    int remain_elements = num_elements % vector_length;
+
+    // process aligned part
+#pragma omp parallel for
+    for (int i = start_elements * element_size; i < (start_elements + main_elements) * element_size;
+         i += VECTOR_LENGTH_IN_BYTES) {
+        auto inout_val = _mm256_loadu_ps((float*)(workspace[0]->buffer + i));
+        switch (num_buffers) {
+            case 16: REPEAT(15, CVT_ADD_F32); break;
+            case 15: REPEAT(14, CVT_ADD_F32); break;
+            case 14: REPEAT(13, CVT_ADD_F32); break;
+            case 13: REPEAT(12, CVT_ADD_F32); break;
+            case 12: REPEAT(11, CVT_ADD_F32); break;
+            case 11: REPEAT(10, CVT_ADD_F32); break;
+            case 10: REPEAT(9, CVT_ADD_F32); break;
+            case 9: REPEAT(8, CVT_ADD_F32); break;
+            case 8: REPEAT(7, CVT_ADD_F32); break;
+            case 7: REPEAT(6, CVT_ADD_F32); break;
+            case 6: REPEAT(5, CVT_ADD_F32); break;
+            case 5: REPEAT(4, CVT_ADD_F32); break;
+            case 4: REPEAT(3, CVT_ADD_F32); break;
+            case 3: REPEAT(2, CVT_ADD_F32); break;
+            default: assert(!"Should not get here.");
+        }
+        _mm256_storeu_ps((float*)(workspace[to_buffer_idx]->buffer + i), inout_val);
+    }
+
+    // process remaining part
+    int i = (start_elements + main_elements) * element_size;
+    while (remain_elements > 0) {
+        float val = 0.0f;
+        for (int j = 0; j < num_buffers; j++) { val += *(float*)(workspace[j]->buffer + i); }
+        *(float*)(workspace[to_buffer_idx]->buffer + i) = val;
+        remain_elements--;
+        i += element_size;
+    }
+}
+
+void reduce_2_fp32_buffers_iio(int num_elements, void* in0, void* in1, void* out)
+{
+    const int element_size = 4;
+    const int vector_length = VECTOR_LENGTH_IN_BYTES / element_size;
+    int main_elements = num_elements - (num_elements % vector_length);
+    int remain_elements = num_elements % vector_length;
+
+    // process aligned part
+#pragma omp parallel for
+    for (int i = 0; i < main_elements * element_size; i += VECTOR_LENGTH_IN_BYTES) {
+        auto in0_val = _mm256_loadu_ps((float*)((char*)in0 + i));
+        auto in1_val = _mm256_loadu_ps((float*)((char*)in1 + i));
+        auto out_val = _mm256_add_ps(in0_val, in1_val);
+        _mm256_storeu_ps((float*)((char*)out + i), out_val);
+    }
+
+    // process remaining part
+    int i = main_elements * element_size;
+    while (remain_elements > 0) {
+        float in0_val = *((float*)((char*)in0 + i));
+        float in1_val = *((float*)((char*)in1 + i));
+        *((float*)((char*)out + i)) = in0_val + in1_val;
+        remain_elements--;
+        i += element_size;
+    }
+}
+
+static bool is_initialized = 0;
+static int world_size;
+static int world_rank;
+
+void shm_initialize(int size, int rank, char* addr_string, char* port_string)
+{
+    if (is_initialized) return;
+    is_initialized = 1;
+
+    world_size = size;
+    world_rank = rank;
+
+    char shm_name_prefix[NAME_BUF_SIZE];
+    char shm_name[NAME_BUF_SIZE];
+    snprintf(shm_name_prefix,
+             NAME_BUF_SIZE,
+             "%s_%d_%s_%s",
+             SHM_BUFFER_NAME,
+             getuid(),
+             addr_string,
+             port_string);
+    // create shared workspace for SHM based allreduce
+    SharedData allreduce_buffer;
+    // allocate workspace_buf for current rank
+    struct allreduce_workspace* workspace_buf;
+    struct allreduce_workspace* workspace_buf_other;
+    workspace_buf = (struct allreduce_workspace*)malloc(sizeof(struct allreduce_workspace));
+    snprintf(shm_name, NAME_BUF_SIZE, "%s_%d", shm_name_prefix, rank);
+    shared_create(&allreduce_buffer, shm_name, workspace_buf, sizeof(struct allreduce_workspace));
+    workspace_buf = (struct allreduce_workspace*)allreduce_buffer.bytes;
+    workspace_buf->state = coll_begin;
+
+    // create the workspace pointer list
+    workspace = (struct allreduce_workspace**)malloc(size * sizeof(struct allreduce_workspace*));
+
+    // map shm of all ranks
+    for (int i = 0; i < size; i++) {
+        if (i != rank) {
+            snprintf(shm_name, NAME_BUF_SIZE, "%s_%d", shm_name_prefix, i);
+            // printf("open %s, %d\n", shm_name, rank);
+            do {
+                shared_open(&allreduce_buffer, shm_name, sizeof(struct allreduce_workspace));
+            } while (allreduce_buffer.descriptor == -1 && errno == ENOENT);
+            workspace_buf_other = (struct allreduce_workspace*)allreduce_buffer.bytes;
+            workspace[i] = workspace_buf_other;
+        } else {
+            workspace[i] = workspace_buf;
+            workspace_buf->counter = 0;
+            sem_init(&workspace_buf->mutex, 1, 1);
+            sem_init(&workspace_buf->turnstile1, 1, 0);
+            sem_init(&workspace_buf->turnstile2, 1, 0);
+        }
+    }
+}
+
+static void parallel_memcpy(void* to, void* from, size_t n_bytes)
+    __attribute__((target("avx512bw")));
+static void parallel_memcpy(void* to, void* from, size_t n_bytes)
+{
+    auto aligned_bytes = n_bytes - (n_bytes % VECTOR_LENGTH_IN_BYTES);
+    // process aligned part
+#pragma omp parallel for
+    for (int i = 0; i < aligned_bytes; i += VECTOR_LENGTH_IN_BYTES) {
+        auto val = _mm256_loadu_si256((__m256i*)((char*)from + i));
+        _mm256_storeu_si256((__m256i*)((char*)to + i), val);
+    }
+
+    // process remaining part
+    for (int i = aligned_bytes; i < n_bytes; i++) { *((char*)to + i) = *((char*)from + i); }
+}
+
+#define positive_mod(num, mod) ((((num) % (mod)) + (mod)) % (mod))
+#define rank_mod(rank) positive_mod(rank, world_size)
+size_t slice_size(size_t chunk_el, int slice_idx)
+{
+    size_t slice_size = chunk_el / world_size;
+    return slice_idx == world_size - 1 ? slice_size + (chunk_el % world_size) : slice_size;
+}
+
+char* slice_data(char* data_ptr, size_t chunk_el, int el_size, int slice_idx)
+{
+    size_t slice_size = chunk_el / world_size;
+    size_t el_offset = slice_size * slice_idx;
+    return data_ptr + el_offset * el_size;
+}
+
+size_t slice_el_start(size_t chunk_el, int slice_idx)
+{
+    size_t slice_size = chunk_el / world_size;
+    return slice_size * slice_idx;
+}
+
+void naive_all_reduce(char* data_ptr,
+                      c10::ScalarType scalar_type,
+                      size_t chunk_size,
+                      size_t chunk_el)
+{
+    parallel_memcpy(workspace[world_rank]->buffer, data_ptr, chunk_size);
+    std::atomic_thread_fence(std::memory_order_release);
+    workspace[world_rank]->state = coll_allreduce_naive__copy_in_done;
+
+    if (world_rank == 0) {
+        // compute allreduce result on rank 0
+        for (int i = 1; i < world_size; i++) {
+            // wait until the other rank copy the buffer
+            wait_buffer_state_until(i, coll_allreduce_naive__copy_in_done);
+        }
+        reduce_all_buffers(workspace, 0, chunk_el, scalar_type, world_size, 0);
+        std::atomic_thread_fence(std::memory_order_release);
+        workspace[world_rank]->state = coll_allreduce_naive__reduce_done;
+        parallel_memcpy(data_ptr, workspace[0]->buffer, chunk_size);
+    }
+    if (world_rank != 0) {
+        wait_buffer_state_until(0, coll_allreduce_naive__reduce_done);
+        parallel_memcpy(data_ptr, workspace[0]->buffer, chunk_size);
+        std::atomic_thread_fence(std::memory_order_release);
+        workspace[world_rank]->state = coll_allreduce_naive__copy_out_done;
+    }
+    if (world_rank == 0) {
+        for (int i = 1; i < world_size; i++) {
+            wait_buffer_state_until(i, coll_allreduce_naive__copy_out_done);
+        }
+        std::atomic_thread_fence(std::memory_order_release);
+        workspace[world_rank]->state = coll_begin;
+    }
+    if (world_rank != 0) {
+        // if rank 0 spin too fast it could be in state 1 of next allreduce
+        // in this case wait_buffer_state_until(0, 0) may cause deadlock
+        // what we are certain is when rank 0 finishes the state won't be 2
+        wait_buffer_state_until_not(0, coll_allreduce_naive__reduce_done);
+        workspace[world_rank]->state = coll_begin;
+    }
+}
+
+// naive allreduce distributed, each rank do naive reduce on its slice
+void distributed_naive_reduce(char* data_ptr,
+                              c10::ScalarType scalar_type,
+                              size_t chunk_size,
+                              size_t chunk_el)
+{
+#ifdef DO_PROFILE
+    static double total_t1_t0 = 0.0;
+    static double total_t2_t1 = 0.0;
+    static double total_t3_t2 = 0.0;
+    static double total_t4_t3 = 0.0;
+    static double total_t5_t4 = 0.0;
+    static int count = -16;  // warmup
+    auto t0 = std::chrono::system_clock::now();
+#endif
+
+    int data_size = chunk_size / chunk_el;
+    parallel_memcpy(workspace[world_rank]->buffer, data_ptr, chunk_size);
+    std::atomic_thread_fence(std::memory_order_release);
+    workspace[world_rank]->state = coll_allreduce_naive__copy_in_done;
+
+#ifdef DO_PROFILE
+    auto t1 = std::chrono::system_clock::now();
+#endif
+
+    for (int i = 0; i < world_size; i++) {
+        // wait until all the other ranks copy the buffer
+        wait_buffer_state_until_range(i, coll_allreduce_naive__copy_in_done, 2);
+    }
+
+#ifdef DO_PROFILE
+    auto t2 = std::chrono::system_clock::now();
+#endif
+
+    // reduce scatter
+    reduce_all_buffers(workspace,
+                       slice_el_start(chunk_el, world_rank),
+                       slice_size(chunk_el, world_rank),
+                       scalar_type,
+                       world_size,
+                       world_rank);
+    std::atomic_thread_fence(std::memory_order_release);
+    workspace[world_rank]->state = coll_allreduce_naive__reduce_done;
+
+#ifdef DO_PROFILE
+    auto t3 = std::chrono::system_clock::now();
+#endif
+
+    for (int i = 0; i < world_size; i++) {
+        int rank = (i + world_rank) % world_size;
+        // wait until the other rank reduce the buffer
+        wait_buffer_state_until_range(rank, coll_allreduce_naive__reduce_done, 2);
+        parallel_memcpy(slice_data(data_ptr, chunk_el, data_size, rank),
+                        slice_data(workspace[rank]->buffer, chunk_el, chunk_size / chunk_el, rank),
+                        slice_size(chunk_el, rank) * data_size);
+    }
+    std::atomic_thread_fence(std::memory_order_release);
+    workspace[world_rank]->state = coll_allreduce_naive__copy_out_done;
+
+#ifdef DO_PROFILE
+    auto t4 = std::chrono::system_clock::now();
+#endif
+
+    for (int i = 0; i < world_size; i++) {
+        wait_buffer_state_until_not(i, coll_allreduce_naive__reduce_done);
+    }
+
+    std::atomic_thread_fence(std::memory_order_release);
+    workspace[world_rank]->state = coll_begin;
+
+#ifdef DO_PROFILE
+    auto t5 = std::chrono::system_clock::now();
+    count++;
+    if (count > 0) {
+        total_t1_t0 += std::chrono::duration_cast<std::chrono::microseconds>(t1 - t0).count();
+        total_t2_t1 += std::chrono::duration_cast<std::chrono::microseconds>(t2 - t1).count();
+        total_t3_t2 += std::chrono::duration_cast<std::chrono::microseconds>(t3 - t2).count();
+        total_t4_t3 += std::chrono::duration_cast<std::chrono::microseconds>(t4 - t3).count();
+        total_t5_t4 += std::chrono::duration_cast<std::chrono::microseconds>(t5 - t4).count();
+        if (world_rank == 0 && count == 1000) {
+            printf("distributed_naive_reduce time breakdown:\n");
+            printf("\tcopy input buffer: %.2f\n", total_t1_t0 / count);
+            printf("\twait for copy: %.2f\n", total_t2_t1 / count);
+            printf("\treduce: %.2f\n", total_t3_t2 / count);
+            printf("\tcopy buffer to output: %.2f\n", total_t4_t3 / count);
+            printf("\twait finish: %.2f\n", total_t5_t4 / count);
+        }
+    }
+#endif
+}
+
+void all_reduce_outer_loop(torch::Tensor& data, size_t numel, int data_size)
+{
+    for (int offset = 0; offset < data_size; offset += MAX_BUF_SIZE) {
+        auto data_ptr = ((char*)(data.data_ptr()) + offset);
+        size_t chunk_size = data_size - offset > MAX_BUF_SIZE ? MAX_BUF_SIZE : data_size - offset;
+        size_t chunk_el = chunk_size / (data_size / numel);
+        if (chunk_size < NAIVE_ALLREDUCE_THRESHOLD)
+            naive_all_reduce(data_ptr, data.scalar_type(), chunk_size, chunk_el);
+        else
+            distributed_naive_reduce(data_ptr, data.scalar_type(), chunk_size, chunk_el);
+    }
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/cpu/comm/shm.h

@@ -0,0 +1,12 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#ifndef __SHM_COLLECTIVES__
+#define __SHM_COLLECTIVES__
+#define VECTOR_LENGTH_IN_BYTES 32
+void shm_initialize(int size, int rank, char* addr_string, char* port_string);
+void all_reduce_outer_loop(torch::Tensor& data, size_t numel, int data_size);
+void barrier_wait(int root_idx, int num_ranks);
+#endif

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/cpu/comm/shm_interface.cpp

@@ -0,0 +1,120 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include <torch/extension.h>
+
+#include "shm.h"
+
+// #define DO_PROFILE
+#ifdef DO_PROFILE
+#include <cfloat>
+#include <chrono>
+#endif
+
+// Communication settings
+static int world_rank = -1;
+static int world_size = -1;
+
+static bool is_initialized = 0;
+
+static bool all_ranks_local_p = false;
+
+void initialize(int size, int rank)
+{
+    if (is_initialized) return;
+
+    // Check whether all ranks is on the same physical machine.
+    // If true, we will use an SHM based low latency allreduce
+
+    auto ls_string = std::getenv("LOCAL_SIZE");
+    int ls = 0;
+    if (ls_string != NULL) { ls = std::stoi(std::getenv("LOCAL_SIZE")); }
+
+    if (size >= 1 && size == ls) { all_ranks_local_p = true; }
+
+    world_size = size;
+    world_rank = rank;
+    is_initialized = 1;
+
+    auto addr_string = std::getenv("MASTER_ADDR");
+    if (addr_string == NULL) { addr_string = ""; }
+    auto port_string = std::getenv("MASTER_PORT");
+    if (port_string == NULL) { port_string = ""; }
+
+    if (all_ranks_local_p) { shm_initialize(size, rank, addr_string, port_string); }
+}
+
+int get_rank(int group = 0) { return world_rank; }
+
+int get_world_size(int group = 0) { return world_size; }
+
+// Success - return 0
+// Fail (cannot hornor the request and need to fall back) - return -1
+int inference_all_reduce(torch::Tensor& data, py::object op)
+{
+    if (!all_ranks_local_p) return -1;
+#ifdef DO_PROFILE
+    static double total_time = 0.0;
+    static double total_time_sq = 0.0;
+    static int count = -16;  // warmup
+    static double max_time = 0.0;
+    static double min_time = DBL_MAX;
+    // make sure all rank reach this point before measuring time
+    // turn on this if you suspect each rank didn't reach here at the same time (stragger)
+    // if (all_ranks_local_p) { barrier_wait(0, world_size); }
+    auto start = std::chrono::system_clock::now();
+#endif
+
+    static py::object ReduceOp = py::module_::import("deepspeed.comm").attr("ReduceOp");
+    static auto ReduceOpSum = (int)py::int_(ReduceOp.attr("SUM").attr("value"));
+
+    assert(py::int_(op.attr("value")) == ReduceOpSum);
+
+    auto numel = data.numel();
+
+    int data_size = 0;
+    bool data_type_fallback = false;
+
+    switch (data.scalar_type()) {
+        case c10::ScalarType::BFloat16: data_size = numel * 2; break;
+        case c10::ScalarType::Float: data_size = numel * 4; break;
+        default: data_type_fallback = true;
+    }
+
+    if (data_type_fallback) return -1;
+
+    all_reduce_outer_loop(data, numel, data_size);
+
+#ifdef DO_PROFILE
+    auto end = std::chrono::system_clock::now();
+    count++;
+    if (count > 0) {
+        double elapsed = std::chrono::duration_cast<std::chrono::microseconds>(end - start).count();
+        if (elapsed > max_time) { max_time = elapsed; }
+        if (elapsed < min_time) { min_time = elapsed; }
+        total_time += elapsed;
+        total_time_sq += elapsed * elapsed;
+        if (world_rank == 0 && count == 1000) {
+            auto avg = total_time / count;
+            auto sd =
+                sqrt(total_time_sq / count - total_time * total_time / (count * count)) / avg * 100;
+            printf("      C++ kernel\t\t    %.2f\t  %.2f\t%.2f\t      %.2f\n",
+                   min_time,
+                   max_time,
+                   total_time / count,
+                   sd);
+        }
+    }
+#endif
+    return 0;
+}
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    m.def("initialize", &initialize, "shm initialize");
+    m.def("get_rank", &get_rank, "get rank");
+    m.def("get_world_size", &get_world_size, "get world size");
+    m.def("inference_all_reduce", &inference_all_reduce, "low latency all_reduce implementation");
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/cpu/lion/fused_lion.cpp

@@ -0,0 +1,43 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#include "cpu_lion.h"
+
+// C++ interface
+
+void multi_tensor_lion(int chunk_size,
+                       at::Tensor noop_flag,
+                       std::vector<std::vector<at::Tensor>> tensor_lists, /*gpmv*/
+                       const float lr,
+                       const float beta1,
+                       const float beta2,
+                       const int step,
+                       const int mode,
+                       const float weight_decay)
+{
+    static bool initialized = false;
+    if (!initialized) {
+        create_lion_optimizer(0);
+        initialized = true;
+    }
+    for (int i = 0; i < tensor_lists[0].size(); i++) {
+        ds_lion_step(0,
+                     step,
+                     lr,
+                     beta1,
+                     beta2,
+                     weight_decay,
+                     tensor_lists[1][i],
+                     tensor_lists[0][i],
+                     tensor_lists[2][i]);
+    }
+}
+
+PYBIND11_MODULE(TORCH_EXTENSION_NAME, m)
+{
+    m.def("multi_tensor_lion",
+          &multi_tensor_lion,
+          "Compute and apply gradient update to parameters for Lion optimizer");
+}

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/epilogue/epilogue_grad_bias.h

@@ -0,0 +1,250 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+#include <cutlass/epilogue/threadblock/default_epilogue_tensor_op.h>
+#include <cutlass/epilogue/threadblock/default_epilogue_volta_tensor_op.h>
+#include "../iterators/predicated_tile_iterator_atomic.h"
+#include "cutlass/epilogue/threadblock/epilogue.h"
+
+namespace cutlass {
+namespace epilogue {
+namespace threadblock {
+template <int Rank,
+          typename Shape_,
+          typename WarpMmaTensorOp_,
+          int PartitionsK,
+          typename OutputOp_,
+          int ElementsPerAccess>
+struct EpilogueTensorOpAffineRankN : public DefaultEpilogueTensorOpAffineRankN<Rank,
+                                                                               Shape_,
+                                                                               WarpMmaTensorOp_,
+                                                                               PartitionsK,
+                                                                               OutputOp_,
+                                                                               ElementsPerAccess> {
+    using Base = DefaultEpilogueTensorOpAffineRankN<Rank,
+                                                    Shape_,
+                                                    WarpMmaTensorOp_,
+                                                    PartitionsK,
+                                                    OutputOp_,
+                                                    ElementsPerAccess>;
+    using OutputTileIterator =
+        cutlass::epilogue::threadblock::PredicatedTileIteratorAffineRankNAtomic<
+            typename Base::OutputTileThreadMap,
+            typename Base::ElementOutput,
+            Rank>;
+
+    using Epilogue =
+        cutlass::epilogue::threadblock::Epilogue<typename Base::Shape,
+                                                 typename Base::WarpMmaTensorOp,
+                                                 Base::kPartitionsK,
+                                                 OutputTileIterator,
+                                                 typename Base::AccumulatorFragmentIterator,
+                                                 typename Base::WarpTileIterator,
+                                                 typename Base::SharedLoadIterator,
+                                                 typename Base::OutputOp,
+                                                 typename Base::Padding,
+                                                 Base::kFragmentsPerIteration>;
+};
+
+template <int Rank,
+          typename Shape_,
+          typename WarpMmaTensorOp_,
+          int PartitionsK,
+          typename OutputOp_,
+          int ElementsPerAccess>
+struct EpilogueVoltaTensorOpAffineRankN
+    : public DefaultEpilogueVoltaTensorOpAffineRankN<Rank,
+                                                     Shape_,
+                                                     WarpMmaTensorOp_,
+                                                     PartitionsK,
+                                                     OutputOp_,
+                                                     ElementsPerAccess> {
+    using Base = DefaultEpilogueVoltaTensorOpAffineRankN<Rank,
+                                                         Shape_,
+                                                         WarpMmaTensorOp_,
+                                                         PartitionsK,
+                                                         OutputOp_,
+                                                         ElementsPerAccess>;
+    using OutputTileIterator =
+        cutlass::epilogue::threadblock::PredicatedTileIteratorAffineRankNAtomic<
+            typename Base::OutputTileThreadMap,
+            typename Base::ElementOutput,
+            Rank>;
+
+    using Epilogue =
+        cutlass::epilogue::threadblock::Epilogue<typename Base::Shape,
+                                                 typename Base::WarpMmaTensorOp,
+                                                 Base::kPartitionsK,
+                                                 OutputTileIterator,
+                                                 typename Base::AccumulatorFragmentIterator,
+                                                 typename Base::WarpTileIterator,
+                                                 typename Base::SharedLoadIterator,
+                                                 typename Base::OutputOp,
+                                                 typename Base::Padding>;
+};
+
+template <typename Shape_,
+          typename WarpMmaTensorOp_,
+          int PartitionsK,
+          typename OutputOp_,
+          int ElementsPerAccess,
+          bool ScatterD = false,
+          typename PermuteDLayout = layout::NoPermute>
+struct EpilogueTensorOp : public DefaultEpilogueTensorOp<Shape_,
+                                                         WarpMmaTensorOp_,
+                                                         PartitionsK,
+                                                         OutputOp_,
+                                                         ElementsPerAccess,
+                                                         ScatterD,
+                                                         PermuteDLayout> {
+    using Base = DefaultEpilogueTensorOp<Shape_,
+                                         WarpMmaTensorOp_,
+                                         PartitionsK,
+                                         OutputOp_,
+                                         ElementsPerAccess,
+                                         ScatterD,
+                                         PermuteDLayout>;
+    using OutputTileIterator = cutlass::epilogue::threadblock::PredicatedTileIteratorAtomic<
+        typename Base::OutputTileThreadMap,
+        typename Base::ElementOutput,
+        ScatterD,
+        PermuteDLayout>;
+    using Epilogue =
+        cutlass::epilogue::threadblock::Epilogue<typename Base::Shape,
+                                                 typename Base::WarpMmaTensorOp,
+                                                 Base::kPartitionsK,
+                                                 OutputTileIterator,
+                                                 typename Base::AccumulatorFragmentIterator,
+                                                 typename Base::WarpTileIterator,
+                                                 typename Base::SharedLoadIterator,
+                                                 typename Base::OutputOp,
+                                                 typename Base::Padding,
+                                                 Base::kFragmentsPerIteration>;
+};
+
+template <typename Shape_,
+          typename WarpMmaTensorOp_,
+          int PartitionsK,
+          typename OutputOp_,
+          int ElementsPerAccess,
+          bool ScatterD = false,
+          typename PermuteDLayout = layout::NoPermute>
+struct EpilogueVoltaTensorOp : public DefaultEpilogueVoltaTensorOp<Shape_,
+                                                                   WarpMmaTensorOp_,
+                                                                   PartitionsK,
+                                                                   OutputOp_,
+                                                                   ElementsPerAccess,
+                                                                   ScatterD,
+                                                                   PermuteDLayout> {
+    using Base = DefaultEpilogueVoltaTensorOp<Shape_,
+                                              WarpMmaTensorOp_,
+                                              PartitionsK,
+                                              OutputOp_,
+                                              ElementsPerAccess,
+                                              ScatterD,
+                                              PermuteDLayout>;
+    using OutputTileIterator = cutlass::epilogue::threadblock::PredicatedTileIteratorAtomic<
+        typename Base::OutputTileThreadMap,
+        typename Base::ElementOutput,
+        ScatterD,
+        PermuteDLayout>;
+    using Epilogue =
+        cutlass::epilogue::threadblock::Epilogue<typename Base::Shape,
+                                                 typename Base::WarpMmaTensorOp,
+                                                 Base::kPartitionsK,
+                                                 OutputTileIterator,
+                                                 typename Base::AccumulatorFragmentIterator,
+                                                 typename Base::WarpTileIterator,
+                                                 typename Base::SharedLoadIterator,
+                                                 typename Base::OutputOp,
+                                                 typename Base::Padding>;
+};
+}  // namespace threadblock
+}  // namespace epilogue
+}  // namespace cutlass
+
+template <typename Arch_,
+          typename Shape_,
+          typename WarpMmaTensorOp_,
+          int PartitionsK,
+          typename OutputOp_,
+          int ElementsPerAccess,
+          bool ScatterD = false,
+          typename PermuteDLayout = cutlass::layout::NoPermute>
+struct BiasGradEpilogue {
+    using Epilogue =
+        typename cutlass::epilogue::threadblock::EpilogueTensorOp<Shape_,
+                                                                  WarpMmaTensorOp_,
+                                                                  PartitionsK,
+                                                                  OutputOp_,
+                                                                  ElementsPerAccess,
+                                                                  ScatterD,
+                                                                  PermuteDLayout>::Epilogue;
+};
+
+template <typename Shape_,
+          typename WarpMmaTensorOp_,
+          int PartitionsK,
+          typename OutputOp_,
+          int ElementsPerAccess,
+          bool ScatterD,
+          typename PermuteDLayout>
+struct BiasGradEpilogue<cutlass::arch::Sm70,
+                        Shape_,
+                        WarpMmaTensorOp_,
+                        PartitionsK,
+                        OutputOp_,
+                        ElementsPerAccess,
+                        ScatterD,
+                        PermuteDLayout> {
+    using Epilogue =
+        typename cutlass::epilogue::threadblock::EpilogueVoltaTensorOp<Shape_,
+                                                                       WarpMmaTensorOp_,
+                                                                       PartitionsK,
+                                                                       OutputOp_,
+                                                                       ElementsPerAccess,
+                                                                       ScatterD,
+                                                                       PermuteDLayout>::Epilogue;
+};
+
+template <typename Arch_,
+          int Rank,
+          typename Shape_,
+          typename WarpMmaTensorOp_,
+          int PartitionsK,
+          typename OutputOp_,
+          int ElementsPerAccess>
+struct BiasGradEpilogueAffineRankN {
+    using Epilogue = typename cutlass::epilogue::threadblock::EpilogueTensorOpAffineRankN<
+        Rank,
+        Shape_,
+        WarpMmaTensorOp_,
+        PartitionsK,
+        OutputOp_,
+        ElementsPerAccess>::Epilogue;
+};
+
+template <int Rank,
+          typename Shape_,
+          typename WarpMmaTensorOp_,
+          int PartitionsK,
+          typename OutputOp_,
+          int ElementsPerAccess>
+struct BiasGradEpilogueAffineRankN<cutlass::arch::Sm70,
+                                   Rank,
+                                   Shape_,
+                                   WarpMmaTensorOp_,
+                                   PartitionsK,
+                                   OutputOp_,
+                                   ElementsPerAccess> {
+    using Epilogue = typename cutlass::epilogue::threadblock::EpilogueVoltaTensorOpAffineRankN<
+        Rank,
+        Shape_,
+        WarpMmaTensorOp_,
+        PartitionsK,
+        OutputOp_,
+        ElementsPerAccess>::Epilogue;
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/epilogue/epilogue_pipelined.h

@@ -0,0 +1,592 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holdvr nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+  \brief Epilogue for threadblock scoped GEMMs using Tensor Ops.
+
+  File copied from "cutlass/epilogue/threadblock/epilogue.h"
+  then modified to:
+  (1) load 2 source fragments at the same time (pipelining)
+  (2) support reading from a different dtype
+  (3) pass the row id to the OutputOp if it takes it
+    (see MemoryEfficientAttentionNormalize)
+  Note that in general the fragment passed to the OutputOp could
+  span multiple rows but it does not happen with the configurations we have
+*/
+
+#pragma once
+
+#if defined(__CUDACC_RTC__)
+#include <cuda/std/cassert>
+#else
+#include <assert.h>
+#endif
+
+#include "cutlass/aligned_buffer.h"
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/functional.h"
+#include "cutlass/layout/tensor.h"
+#include "cutlass/layout/vector.h"
+#include "cutlass/numeric_types.h"
+#include "cutlass/tensor_coord.h"
+
+#include "cutlass/gemm/gemm.h"
+
+#include "cutlass/transform/pitch_linear_thread_map.h"
+#include "cutlass/transform/threadblock/regular_tile_iterator.h"
+
+#include "cutlass/epilogue/threadblock/epilogue_base.h"
+#include "cutlass/epilogue/threadblock/predicated_tile_iterator.h"
+#include "cutlass/numeric_types.h"
+
+////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+namespace epilogue {
+namespace threadblock {
+
+template <typename Op>
+struct ApplyEpilogueOp {
+    static CUTLASS_DEVICE typename Op::FragmentOutput apply(
+        Op const& output_op,
+        int row_id,
+        typename Op::FragmentAccumulator const& accum,
+        typename Op::FragmentOutput const& source)
+    {
+        return output_op(accum, source);
+    }
+    static CUTLASS_DEVICE typename Op::FragmentOutput
+    apply(Op const& output_op, int row_id, typename Op::FragmentAccumulator const& accum)
+    {
+        return output_op(accum);
+    }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Epilogue operator
+template <typename Shape_,               ///< Shape of threadblock tile (concept: GemmShape)
+          typename WarpMmaOperator_,     ///< Warp-level MMA operator (concept:
+                                         ///< gemm::warp::MmaTensorOp)
+          int PartitionsK,               ///< Number of partitions of the K dimension
+          typename OutputTileIterator_,  ///< Tile iterator writing output tensors
+          typename AccumulatorFragmentIterator_,  ///< Fragment iterator selecting
+                                                  ///< accumulators
+          typename WarpTileIterator_,             ///< Warp-scoped tile iterator writing
+                                                  ///< accumulators to SMEM
+          typename SharedLoadIterator_,           ///< Threadblock-scoped tile iterator loading
+                                                  ///< from SMEM
+          typename OutputOp_,                     ///< Output operator
+          typename Padding_,              ///< Padding added to SMEM allocation to avoid bank
+                                          ///< conflicts (concept: MatrixShape)
+          int FragmentsPerPartition = 1,  ///< Used to coarsten the epilogue granularity
+          int IterationsUnroll =          ///< Used to reduce binary size when epilogue op is
+                                          ///< large
+          (!IsEpilogueFunctorHeavy<OutputOp_>::value),
+          typename OutputTileSourceIterator_ =
+              OutputTileIterator_  ///< Tile iterator reading tensors
+          >
+class EpiloguePipelined : public EpilogueBase<Shape_,
+                                              typename WarpMmaOperator_::Shape,
+                                              PartitionsK,
+                                              AccumulatorFragmentIterator_,
+                                              WarpTileIterator_,
+                                              Padding_,
+                                              FragmentsPerPartition> {
+public:
+    using Base = EpilogueBase<Shape_,
+                              typename WarpMmaOperator_::Shape,
+                              PartitionsK,
+                              AccumulatorFragmentIterator_,
+                              WarpTileIterator_,
+                              Padding_,
+                              FragmentsPerPartition>;
+
+    using Shape = Shape_;
+    using WarpMmaOperator = WarpMmaOperator_;
+    static int const kPartitionsK = PartitionsK;
+    using OutputTileIterator = OutputTileIterator_;
+    using OutputTileSourceIterator = OutputTileSourceIterator_;
+    using AccumulatorFragmentIterator = AccumulatorFragmentIterator_;
+    using WarpTileIterator = WarpTileIterator_;
+    using SharedLoadIterator = SharedLoadIterator_;
+    using OutputOp = OutputOp_;
+    using Padding = Padding_;
+
+    using Layout = layout::RowMajor;
+    using LongIndex = typename Layout::LongIndex;
+
+    /// The complete warp-level accumulator tile
+    using AccumulatorTile = typename Base::AccumulatorTile;
+
+    /// Accumulator element
+    using ElementAccumulator = typename WarpTileIterator::Element;
+
+    /// Output element
+    using ElementOutput = typename OutputTileIterator::Element;
+    using ElementSource = typename OutputTileSourceIterator::Element;
+
+    /// Output access size
+    static int const kElementsPerAccess = OutputTileIterator::kElementsPerAccess;
+
+    /// Tensor reference to destination tensor
+    using TensorRef = typename OutputTileIterator::TensorRef;
+
+    /// Tensor reference to sync tensor
+    using SyncTensorRef = typename cutlass::TensorRef<int, cutlass::layout::PackedVectorLayout>;
+
+    /// Const tensor reference to source tensor
+    using ConstTensorRef = typename OutputTileIterator::ConstTensorRef;
+
+    /// Array type used to output
+    using OutputAccessType =
+        Array<typename OutputTileIterator::Element, OutputTileIterator::kElementsPerAccess>;
+    using SourceAccessType = Array<typename OutputTileSourceIterator::Element,
+                                   OutputTileSourceIterator::kElementsPerAccess>;
+
+    /// Array type used by output functor
+    using AccumulatorAccessType =
+        Array<typename WarpTileIterator::Element, OutputTileIterator::kElementsPerAccess>;
+
+    /// Number of warps
+    using WarpCount = typename Base::WarpCount;
+
+    static int constexpr kSmemTiles =
+        Base::kFragmentsPerIteration > 1 ? Base::kFragmentsPerIteration : kPartitionsK;
+    static int constexpr kSmemPointerOffset =
+        Base::SharedStorage::StorageShape::kCount / kSmemTiles;
+
+public:
+    static_assert(OutputTileSourceIterator::Fragment::kElements ==
+                      OutputTileIterator::Fragment::kElements,
+                  "Mismatch between input tile and output tile iterator (kElements)");
+    static_assert(OutputTileSourceIterator::kIterations == OutputTileIterator::kIterations,
+                  "Mismatch between input tile and output tile iterator (kIterations)");
+    static_assert(SharedLoadIterator::Fragment::kElements ==
+                      OutputTileIterator::Fragment::kElements,
+                  "Mismatch between shared load iterator and output tile iterator.");
+
+    static_assert(OutputTileIterator::kElementsPerAccess,
+                  "OutputTileIterator::kElementsPerAccess must not be zero.");
+
+    static_assert(!(OutputTileIterator::Fragment::kElements %
+                    OutputTileIterator::kElementsPerAccess),
+                  "Divisibility");
+
+private:
+    /// Loads fragment from shared memory aligned with output tensor
+    SharedLoadIterator shared_load_iterator_;
+
+public:
+    /// Constructor
+    CUTLASS_DEVICE
+    EpiloguePipelined(typename Base::SharedStorage& shared_storage,  ///< Shared storage object
+                      int thread_idx,  ///< ID of a thread within the threadblock
+                      int warp_idx,    ///< ID of warp within threadblock
+                      int lane_idx     ///< Id of thread within warp
+                      )
+        : Base(shared_storage, thread_idx, warp_idx, lane_idx),
+          shared_load_iterator_(shared_storage.reference(), thread_idx)
+    {
+    }
+
+    /// Streams the result to global memory
+    CUTLASS_DEVICE
+    void operator()(OutputOp const& output_op,                ///< Output operator
+                    OutputTileIterator destination_iterator,  ///< Tile iterator for destination
+                    AccumulatorTile const& accumulators,  ///< Complete warp-level accumulator tile
+                    OutputTileSourceIterator source_iterator)
+    {  ///< Threadblock tile coordinate in GEMM (in units
+       ///< of threadblock tiles)
+
+        if (!output_op.is_source_needed()) {
+            compute_source_not_needed_(output_op, destination_iterator, accumulators);
+        } else {
+            compute_source_needed_(output_op, destination_iterator, accumulators, source_iterator);
+        }
+    }
+    CUTLASS_DEVICE
+    void operator()(OutputOp const& output_op,                ///< Output operator
+                    OutputTileIterator destination_iterator,  ///< Tile iterator for destination
+                    AccumulatorTile const& accumulators)
+    {  ///< Complete warp-level accumulator tile
+        compute_source_not_needed_(output_op, destination_iterator, accumulators);
+    }
+
+private:
+    template <class Seq>
+    struct acc2smem_source_not_needed;
+
+    template <size_t... Seq>
+    struct acc2smem_source_not_needed<cutlass::index_sequence<Seq...>> {
+        template <int Advance>
+        CUTLASS_DEVICE static void helper(AccumulatorFragmentIterator accum_fragment_iterator,
+                                          WarpTileIterator& warp_tile_iterator)
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < Advance; i++) { ++accum_fragment_iterator; }
+
+            CUTLASS_PRAGMA_UNROLL
+            for (int p = 0; p < Base::kFragmentsPerIteration; ++p) {
+                typename AccumulatorFragmentIterator::Fragment accum_fragment;
+
+                accum_fragment_iterator.load(accum_fragment);
+                ++accum_fragment_iterator;
+
+                warp_tile_iterator.store(accum_fragment);
+                if (p < Base::kFragmentsPerIteration - 1) {
+                    warp_tile_iterator.add_pointer_offset(kSmemPointerOffset);
+                }
+            }
+
+            if (Base::kFragmentsPerIteration > 1) {
+                warp_tile_iterator.add_pointer_offset(kSmemPointerOffset *
+                                                      (1 - Base::kFragmentsPerIteration));
+            }
+        }
+
+        CUTLASS_DEVICE
+        static void push(size_t pos,
+                         AccumulatorFragmentIterator const& iterator_begin,
+                         WarpTileIterator& warp_tile_iterator)
+        {
+            int dummy[] = {
+                (pos == (Seq * Base::kFragmentsPerIteration)) &&
+                (helper<Seq * Base::kFragmentsPerIteration>(iterator_begin, warp_tile_iterator),
+                 0)...};
+
+            CUTLASS_UNUSED(dummy[0]);
+        }
+    };
+
+    static_assert(kPartitionsK == 1 || Base::kFragmentsPerIteration == 1,
+                  "One of these must be exactly 1.");
+
+    /// Streams the result to global memory
+    CUTLASS_DEVICE
+    void compute_source_not_needed_(
+        OutputOp const& output_op,                ///< Output operator
+        OutputTileIterator destination_iterator,  ///< Tile iterator for destination
+        AccumulatorTile const& accumulators       ///< Complete warp-level accumulator tile
+    )
+    {
+        //
+        // Iterator over warp-level accumulator fragment
+        //
+
+        AccumulatorFragmentIterator accum_fragment_iterator(accumulators);
+
+        //
+        // Iterate over accumulator tile
+        //
+
+#pragma unroll(IterationsUnroll ? OutputTileIterator::kIterations / Base::kFragmentsPerIteration \
+                                : 1)
+        for (int iter = 0; iter < OutputTileIterator::kIterations;
+             iter += Base::kFragmentsPerIteration) {
+            //
+            // Convert and store fragment
+            //
+
+            __syncthreads();
+
+            acc2smem_source_not_needed<cutlass::make_index_sequence<
+                OutputTileIterator::kIterations / Base::kFragmentsPerIteration>>::
+                push(iter, accum_fragment_iterator, this->warp_tile_iterator_);
+
+            __syncthreads();
+
+            //
+            // Load fragments from shared memory
+            //
+
+            CUTLASS_PRAGMA_UNROLL
+            for (int p = 0; p < Base::kFragmentsPerIteration; ++p) {
+                typename SharedLoadIterator::Fragment aligned_accum_fragment[kPartitionsK];
+
+                shared_load_iterator_.load(aligned_accum_fragment[0]);
+
+                if (p < Base::kFragmentsPerIteration - 1) {
+                    shared_load_iterator_.add_pointer_offset(kSmemPointerOffset);
+                } else if (kPartitionsK > 1) {
+                    plus<typename SharedLoadIterator::Fragment> add_fragments;
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int i = 1; i < kPartitionsK; ++i) {
+                        shared_load_iterator_.add_pointer_offset(kSmemPointerOffset);
+                        shared_load_iterator_.load(aligned_accum_fragment[i]);
+                        aligned_accum_fragment[0] =
+                            add_fragments(aligned_accum_fragment[0], aligned_accum_fragment[i]);
+                    }
+
+                    shared_load_iterator_.add_pointer_offset((1 - kPartitionsK) *
+                                                             kSmemPointerOffset);
+                }
+
+                //
+                // Compute the output result
+                //
+
+                typename OutputTileIterator::Fragment output_fragment;
+
+                apply_output_operator_source_not_needed_(destination_iterator.thread_start_row(),
+                                                         output_fragment,
+                                                         output_op,
+                                                         aligned_accum_fragment[0]);
+
+                //
+                // Store the final result
+                //
+
+                destination_iterator.store(output_fragment);
+                ++destination_iterator;
+            }
+
+            if (Base::kFragmentsPerIteration > 1) {
+                shared_load_iterator_.add_pointer_offset(kSmemPointerOffset *
+                                                         (1 - Base::kFragmentsPerIteration));
+            }
+        }
+    }
+
+    template <class Seq>
+    struct acc2smem_source_needed;
+
+    template <size_t... Seq>
+    struct acc2smem_source_needed<cutlass::index_sequence<Seq...>> {
+        template <int Advance>
+        CUTLASS_DEVICE static void helper(AccumulatorFragmentIterator accum_fragment_iterator,
+                                          WarpTileIterator& warp_tile_iterator)
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < Advance; i++) { ++accum_fragment_iterator; }
+
+            typename AccumulatorFragmentIterator::Fragment accum_fragment;
+            accum_fragment_iterator.load(accum_fragment);
+            warp_tile_iterator.store(accum_fragment);
+        }
+
+        CUTLASS_DEVICE
+        static void push(size_t pos,
+                         AccumulatorFragmentIterator const& iterator_begin,
+                         WarpTileIterator& warp_tile_iterator)
+        {
+            int dummy[] = {(pos == Seq) && (helper<Seq>(iterator_begin, warp_tile_iterator), 0)...};
+        }
+    };
+
+    /// Streams the result to global memory
+    CUTLASS_DEVICE
+    void compute_source_needed_(
+        OutputOp const& output_op,                ///< Output operator
+        OutputTileIterator destination_iterator,  ///< Tile iterator for destination
+        AccumulatorTile const& accumulators,      ///< Complete warp-level accumulator tile
+        OutputTileSourceIterator source_iterator  ///< Threadblock tile coordinate in GEMM (in units
+                                                  ///< of threadblock tiles)
+    )
+    {
+        typename OutputTileSourceIterator::Fragment source_fragment[2];
+
+        source_fragment[0].clear();
+        source_iterator.load(source_fragment[0]);
+        ++source_iterator;
+        source_fragment[1].clear();
+
+        //
+        // Iterator over warp-level accumulator fragment
+        //
+
+        AccumulatorFragmentIterator accum_fragment_iterator(accumulators);
+
+        //
+        // Iterate over accumulator tile
+        //
+
+#pragma unroll(IterationsUnroll ? OutputTileIterator::kIterations : 1)
+        for (int iter = 0; iter < OutputTileIterator::kIterations; ++iter) {
+            if (iter > 0) { __syncthreads(); }
+            //
+            // Load the source for next iteration (pipelining)
+            //
+
+            if (iter + 1 < OutputTileIterator::kIterations) {
+                source_iterator.load(source_fragment[(iter + 1) % 2]);
+            }
+            ++source_iterator;
+            acc2smem_source_needed<cutlass::make_index_sequence<OutputTileIterator::kIterations>>::
+                push(iter, accum_fragment_iterator, this->warp_tile_iterator_);
+
+            __syncthreads();
+
+            //
+            // Load fragments from shared memory
+            //
+
+            typename SharedLoadIterator::Fragment aligned_accum_fragment[kPartitionsK];
+
+            shared_load_iterator_.load(aligned_accum_fragment[0]);
+
+            // If the number of k-slices is > 1 - perform a reduction amongst the
+            // k-slices
+            if (kPartitionsK > 1) {
+                plus<typename SharedLoadIterator::Fragment> add_fragments;
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int i = 1; i < kPartitionsK; ++i) {
+                    shared_load_iterator_.add_pointer_offset(kSmemPointerOffset);
+                    shared_load_iterator_.load(aligned_accum_fragment[i]);
+                    aligned_accum_fragment[0] =
+                        add_fragments(aligned_accum_fragment[0], aligned_accum_fragment[i]);
+                }
+
+                shared_load_iterator_.add_pointer_offset((1 - kPartitionsK) * kSmemPointerOffset);
+            }
+
+            //
+            // Compute the output result
+            //
+
+            typename OutputTileIterator::Fragment output_fragment;
+
+            apply_output_operator_(destination_iterator.thread_start_row(),
+                                   output_fragment,
+                                   output_op,
+                                   aligned_accum_fragment[0],
+                                   source_fragment[iter % 2]);
+
+            //
+            // Store the final result
+            //
+
+            destination_iterator.store(output_fragment);
+            ++destination_iterator;
+        }
+    }
+
+    /// Helper to invoke the output functor over each vector of output
+    CUTLASS_DEVICE
+    void apply_output_operator_(int begin_row,
+                                typename OutputTileIterator::Fragment& output_fragment,
+                                OutputOp const& output_op,  ///< Output operator
+                                typename SharedLoadIterator::Fragment const& aligned_accum_fragment,
+                                typename OutputTileSourceIterator::Fragment const& source_fragment)
+    {
+        OutputAccessType* output_frag_ptr = reinterpret_cast<OutputAccessType*>(&output_fragment);
+
+        AccumulatorAccessType const* compute_frag_ptr =
+            reinterpret_cast<AccumulatorAccessType const*>(&aligned_accum_fragment);
+
+        SourceAccessType const* source_frag_ptr =
+            reinterpret_cast<SourceAccessType const*>(&source_fragment);
+
+        int const kOutputOpIterations =
+            OutputTileIterator::Fragment::kElements / OutputTileIterator::kElementsPerAccess;
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int i = 0; i < kOutputOpIterations; ++i) {
+            // Call the output operator
+            output_frag_ptr[i] = ApplyEpilogueOp<OutputOp>::apply(
+                output_op,
+                begin_row + getRowOffset(i * OutputTileIterator::kElementsPerAccess),
+                compute_frag_ptr[i],
+                source_frag_ptr[i]);
+        }
+    }
+
+    /// Helper to invoke the output functor over each vector of output
+    CUTLASS_DEVICE
+    void apply_output_operator_source_not_needed_(
+        int begin_row,
+        typename OutputTileIterator::Fragment& output_fragment,
+        OutputOp const& output_op,  ///< Output operator
+        typename SharedLoadIterator::Fragment const& aligned_accum_fragment)
+    {
+        OutputAccessType* output_frag_ptr = reinterpret_cast<OutputAccessType*>(&output_fragment);
+
+        AccumulatorAccessType const* compute_frag_ptr =
+            reinterpret_cast<AccumulatorAccessType const*>(&aligned_accum_fragment);
+
+        int const kOutputOpIterations =
+            OutputTileIterator::Fragment::kElements / OutputTileIterator::kElementsPerAccess;
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int i = 0; i < kOutputOpIterations; ++i) {
+            // Call the output operator
+            output_frag_ptr[i] = ApplyEpilogueOp<OutputOp>::apply(
+                output_op,
+                begin_row + getRowOffset(i * OutputTileIterator::kElementsPerAccess),
+                compute_frag_ptr[i]);
+        }
+    }
+
+    // This should be constexpr, but it's only supported on c++14
+    static int CUTLASS_HOST_DEVICE getRowOffset(int i)
+    {
+        using ThreadMap = typename OutputTileIterator::ThreadMap;
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
+                    int row_offset = row * ThreadMap::Delta::kRow +
+                                     group * ThreadMap::Delta::kGroup +
+                                     cluster * ThreadMap::Delta::kCluster;
+                    int frag_row_idx =
+                        (row + ThreadMap::Iterations::kRow *
+                                   (group + ThreadMap::Iterations::kGroup * cluster));
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
+                        int frag_idx = ThreadMap::kElementsPerAccess *
+                                       (frag_row_idx * ThreadMap::Iterations::kColumn + column);
+                        if (i < frag_idx + ThreadMap::kElementsPerAccess) { return row_offset; }
+                    }
+                }
+            }
+        }
+        return -1;
+    }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace threadblock
+}  // namespace epilogue
+}  // namespace cutlass
+
+////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/epilogue/epilogue_rescale_output.h

@@ -0,0 +1,251 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holdvr nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+  \brief Epilogue for threadblock scoped GEMMs using Tensor Ops.
+
+  The epilogue rearranges the result of a matrix product through shared memory
+  to match canonical tensor layouts in global memory. Epilogues support
+  conversion and reduction operations.
+
+  This is a copy of cutlass/epilogue/threadblock/epilogue.h that can
+  handle "row_id" as a first argument, as uses it to get the corresponding
+  `m_prime` / `s_prime` to rescale the output.
+*/
+
+#pragma once
+
+#if defined(__CUDACC_RTC__)
+#include <cuda/std/cassert>
+#else
+#include <assert.h>
+#endif
+
+#include "cutlass/aligned_buffer.h"
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/functional.h"
+#include "cutlass/layout/tensor.h"
+#include "cutlass/layout/vector.h"
+#include "cutlass/numeric_types.h"
+#include "cutlass/tensor_coord.h"
+
+#include "cutlass/gemm/gemm.h"
+
+#include "cutlass/transform/pitch_linear_thread_map.h"
+#include "cutlass/transform/threadblock/regular_tile_iterator.h"
+
+#include "cutlass/epilogue/threadblock/epilogue_base.h"
+#include "cutlass/epilogue/threadblock/predicated_tile_iterator.h"
+#include "cutlass/numeric_types.h"
+
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/epilogue/thread/scale_type.h"
+#include "cutlass/functional.h"
+#include "cutlass/numeric_conversion.h"
+#include "cutlass/numeric_types.h"
+#include "epilogue_pipelined.h"
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+namespace epilogue {
+namespace thread {
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+/// Applies a linear combination operator to an array of elements.
+// output <- alpha * accumulator + beta * source
+//   with:
+//     alpha = 1 / s_prime (to normalize when isLast=True, 1 otherwise)
+//     beta = alpha / m_prime (renormalize the output when the max changes)
+//     source is the current output
+template <typename ElementOutput_,  ///< Data type used to store tensors
+          typename ElementSource_,  //< Data type for source (usually matches
+                                    //`ElementOutput`)
+          int Count,                ///< Number of elements computed per operation.
+                                    ///< Usually it is 128/sizeof_bits<ElementOutput_>,
+          ///< but we use 64 or 32 sometimes when there are not enough data
+          ///< to store
+          typename ElementAccumulator_,  ///< Accumulator data type
+          typename ElementCompute_,      ///< Data type used to compute linear combination
+          bool isFirst,
+          bool isLast,
+          typename FragmentAlphaBeta_,
+          FloatRoundStyle Round = FloatRoundStyle::round_to_nearest>
+class MemoryEfficientAttentionNormalize {
+public:
+    using ElementOutput = ElementOutput_;
+    using ElementSource = ElementSource_;
+    using ElementAccumulator = ElementAccumulator_;
+    using ElementCompute = ElementCompute_;
+
+    static int const kCount = Count;
+
+    using FragmentOutput = Array<ElementOutput, kCount>;
+    using FragmentSource = Array<ElementSource, kCount>;
+    using FragmentAccumulator = Array<ElementAccumulator, kCount>;
+    using ComputeFragment = Array<ElementCompute, kCount>;
+    using FragmentAlphaBeta = FragmentAlphaBeta_;
+
+    static FloatRoundStyle const kRound = Round;
+
+private:
+    //
+    // Data members
+    //
+
+    FragmentAlphaBeta const& s_prime_;
+    FragmentAlphaBeta const& m_prime_;
+
+public:
+    /// Constructs the function object, possibly loading from pointers in host
+    /// memory
+    CUTLASS_HOST_DEVICE
+    MemoryEfficientAttentionNormalize(FragmentAlphaBeta const& s_prime,
+                                      FragmentAlphaBeta const& m_prime)
+        : s_prime_(s_prime), m_prime_(m_prime)
+    {
+    }
+
+    /// Returns true if source is needed
+    CUTLASS_HOST_DEVICE
+    bool is_source_needed() const { return !isFirst; }
+
+    /// Functionally required for serial reduction in the epilogue
+    CUTLASS_HOST_DEVICE
+    void set_k_partition(int k_partition, int k_partition_count) {}
+
+    /// Computes linear scaling: D = alpha * accumulator + beta * source
+    CUTLASS_HOST_DEVICE
+    FragmentOutput operator()(int row,
+                              FragmentAccumulator const& accumulator,
+                              FragmentSource const& source) const
+    {
+        assert(!isFirst);
+
+        // Convert source to internal compute numeric type
+        NumericArrayConverter<ElementCompute, ElementSource, kCount, Round> source_converter;
+        NumericArrayConverter<ElementCompute, ElementAccumulator, kCount, Round>
+            accumulator_converter;
+
+        // Convert to destination numeric type
+        NumericArrayConverter<ElementOutput, ElementCompute, kCount, Round> destination_converter;
+
+        ComputeFragment converted_source = source_converter(source);
+        ComputeFragment converted_accumulator = accumulator_converter(accumulator);
+
+        // Perform binary operations
+        ComputeFragment intermediate;
+
+        multiplies<ComputeFragment> mul_add_source;
+        multiply_add<ComputeFragment> mul_add_accumulator;
+
+        ElementCompute alpha = isLast ? (1 / s_prime_[row]) : 1;
+        ElementCompute beta = alpha * m_prime_[row];
+
+        intermediate = mul_add_source(beta, converted_source);  // X =  beta * C
+
+        intermediate = mul_add_accumulator(
+            alpha, converted_accumulator, intermediate);  // D = alpha * Accum + X
+
+        return destination_converter(intermediate);
+    }
+
+    /// Computes linear scaling: D = alpha * accumulator
+    CUTLASS_HOST_DEVICE
+    FragmentOutput operator()(int row, FragmentAccumulator const& accumulator) const
+    {
+        assert(isFirst);
+
+        // Convert source to internal compute numeric type
+        NumericArrayConverter<ElementCompute, ElementAccumulator, kCount, Round>
+            accumulator_converter;
+
+        // Convert to destination numeric type
+        NumericArrayConverter<ElementOutput, ElementCompute, kCount, Round> destination_converter;
+
+        ComputeFragment converted_accumulator = accumulator_converter(accumulator);
+
+        ComputeFragment intermediate;
+        multiplies<ComputeFragment> mul_accumulator;
+
+        ElementCompute alpha = isLast ? (1 / s_prime_[row]) : 1;
+
+        intermediate = mul_accumulator(alpha, converted_accumulator);  // X =  alpha * C + uniform
+
+        return destination_converter(intermediate);
+    }
+};
+
+}  // namespace thread
+
+namespace threadblock {
+template <typename EO,
+          typename ES,
+          int Count,
+          typename EA,
+          typename EC,
+          bool F,
+          bool L,
+          typename FAB,
+          FloatRoundStyle R>
+struct ApplyEpilogueOp<
+    thread::MemoryEfficientAttentionNormalize<EO, ES, Count, EA, EC, F, L, FAB, R>> {
+    using Op = thread::MemoryEfficientAttentionNormalize<EO, ES, Count, EA, EC, F, L, FAB, R>;
+    static CUTLASS_DEVICE typename Op::FragmentOutput apply(
+        Op const& output_op,
+        int row_id,
+        typename Op::FragmentAccumulator const& accum,
+        typename Op::FragmentSource const& source)
+    {
+        return output_op(row_id, accum, source);
+    }
+    static CUTLASS_DEVICE typename Op::FragmentOutput
+    apply(Op const& output_op, int row_id, typename Op::FragmentAccumulator const& accum)
+    {
+        return output_op(row_id, accum);
+    }
+};
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace threadblock
+}  // namespace epilogue
+}  // namespace cutlass
+
+/////////////////////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/epilogue/epilogue_thread_apply_logsumexp.h

@@ -0,0 +1,168 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+  \brief Functor performing linear combination operations used by epilogues.
+*/
+
+#pragma once
+
+#include <cuda_fp16.h>
+
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/epilogue/thread/activation.h"
+#include "cutlass/functional.h"
+#include "cutlass/numeric_conversion.h"
+#include "cutlass/numeric_types.h"
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+namespace epilogue {
+namespace thread {
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+namespace detail {
+
+template <typename Element, int ElementsPerAccess>
+struct ArrayExponential {
+    CUTLASS_HOST_DEVICE
+    Array<Element, ElementsPerAccess> operator()(
+        Array<Element, ElementsPerAccess> const& input) const
+    {
+        Array<Element, ElementsPerAccess> result;
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int i = 0; i < ElementsPerAccess; ++i) { result[i] = expf(input[i]); }
+
+        return result;
+    }
+};
+
+template <int ElementsPerAccess>
+struct ArrayExponential<half_t, ElementsPerAccess> {
+    CUTLASS_DEVICE
+    Array<half_t, ElementsPerAccess> operator()(Array<half_t, ElementsPerAccess> const& input) const
+    {
+        Array<half_t, ElementsPerAccess> result;
+
+        int const kVectorCount = ElementsPerAccess / 2;
+
+        __half2 const* input_ptr = reinterpret_cast<__half2 const*>(input.raw_data());
+        __half2* res_ptr = reinterpret_cast<__half2*>(result.raw_data());
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int i = 0; i < kVectorCount; ++i) { res_ptr[i] = h2exp(input_ptr[i]); }
+
+        return result;
+    }
+};
+}  // namespace detail
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+/// Applies:
+/// output <- (input - lse).exp()
+template <typename ElementOutput_,       // output
+          typename ElementLSE_,          // accumulator from LSE
+          typename ElementAccumulator_,  // accumulator from matmul
+          typename ElementCompute_,      // intermediate compute (and exp calculation)
+          int ElementsPerAccess>
+class ApplyLogSumExp {
+public:
+    using ElementOutput = ElementOutput_;
+    using ElementAccumulator = ElementAccumulator_;
+    using ElementCompute = ElementCompute_;
+    using ElementLSE = ElementLSE_;
+
+    static int const kElementsPerAccess = ElementsPerAccess;
+    static int const kCount = kElementsPerAccess;
+    static const ScaleType::Kind kScale = cutlass::epilogue::thread::ScaleType::NoBetaScaling;
+
+    using FragmentOutput = Array<ElementOutput, kCount>;
+    using FragmentAccumulator = Array<ElementAccumulator, kElementsPerAccess>;
+    using FragmentCompute = Array<ElementCompute, kElementsPerAccess>;
+    using FragmentLSE = Array<ElementLSE, kElementsPerAccess>;
+    using FragmentScaleBias = FragmentLSE;  // Used by epilogue_smem_accumulator.h
+
+public:
+    //
+    // Methods
+    //
+
+    CUTLASS_HOST_DEVICE
+    ApplyLogSumExp() {}
+
+    /// Returns true if source is needed
+    CUTLASS_HOST_DEVICE
+    bool is_source_needed() const { return true; }
+
+    /// Functionally required for serial reduction in the epilogue
+    CUTLASS_HOST_DEVICE
+    void set_k_partition(int k_partition, int k_partition_count) {}
+
+    CUTLASS_HOST_DEVICE
+    FragmentOutput operator()(FragmentAccumulator const& AB,
+                              FragmentLSE const& scale_unused,
+                              // bias used as LSE
+                              FragmentLSE const& bias) const
+    {
+        FragmentCompute frag_AB =
+            NumericArrayConverter<ElementCompute, ElementAccumulator, kElementsPerAccess>()(AB);
+        FragmentCompute frag_lse_compute =
+            NumericArrayConverter<ElementCompute, ElementLSE, kElementsPerAccess>()(bias);
+        FragmentCompute frag_compute;
+
+        minus<FragmentCompute> minus_lse;
+        detail::ArrayExponential<ElementCompute, kElementsPerAccess> apply_exp;
+        frag_compute = minus_lse(frag_AB, frag_lse_compute);
+        frag_compute = apply_exp(frag_compute);
+
+        return NumericArrayConverter<ElementOutput, ElementCompute, kElementsPerAccess>()(
+            frag_compute);
+    }
+};
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace thread
+}  // namespace epilogue
+}  // namespace cutlass
+
+/////////////////////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/gemm/custom_mma.h

@@ -0,0 +1,119 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holdvr nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+#include "custom_mma_multistage.h"
+#include "custom_mma_pipelined.h"
+#include "cutlass/gemm/threadblock/mma_multistage.h"
+#include "cutlass/gemm/threadblock/mma_pipelined.h"
+
+template <typename Mma, int kMaxK>
+struct MakeCustomMma;
+
+template <typename Shape,
+          typename IteratorA,
+          typename SmemIteratorA,
+          cutlass::arch::CacheOperation::Kind CacheOpA,
+          typename IteratorB,
+          typename SmemIteratorB,
+          cutlass::arch::CacheOperation::Kind CacheOpB,
+          typename ElementC,
+          typename LayoutC,
+          typename Policy,
+          int Stages,
+          cutlass::gemm::SharedMemoryClearOption SharedMemoryClear,
+          int kMaxK>
+struct MakeCustomMma<cutlass::gemm::threadblock::MmaMultistage<Shape,
+                                                               IteratorA,
+                                                               SmemIteratorA,
+                                                               CacheOpA,
+                                                               IteratorB,
+                                                               SmemIteratorB,
+                                                               CacheOpB,
+                                                               ElementC,
+                                                               LayoutC,
+                                                               Policy,
+                                                               Stages,
+                                                               SharedMemoryClear>,
+                     kMaxK> {
+    // Reduce the number of stages if we don't need that many
+    static int constexpr kStages =
+        kMaxK == cutlass::platform::numeric_limits<int>::max()
+            ? Stages
+            : cutlass::const_min(Stages, (kMaxK + int(Shape::kK) - 1) / int(Shape::kK));
+    using Mma = cutlass::gemm::threadblock::CustomMmaMultistage<Shape,
+                                                                IteratorA,
+                                                                SmemIteratorA,
+                                                                CacheOpA,
+                                                                IteratorB,
+                                                                SmemIteratorB,
+                                                                CacheOpB,
+                                                                ElementC,
+                                                                LayoutC,
+                                                                Policy,
+                                                                kStages,
+                                                                SharedMemoryClear,
+                                                                kMaxK>;
+};
+
+template <typename Shape,
+          typename IteratorA,
+          typename SmemIteratorA,
+          typename IteratorB,
+          typename SmemIteratorB,
+          typename ElementC,
+          typename LayoutC,
+          typename Policy,
+          int kMaxK>
+struct MakeCustomMma<cutlass::gemm::threadblock::MmaPipelined<Shape,
+                                                              IteratorA,
+                                                              SmemIteratorA,
+                                                              IteratorB,
+                                                              SmemIteratorB,
+                                                              ElementC,
+                                                              LayoutC,
+                                                              Policy>,
+                     kMaxK> {
+    using Mma = cutlass::gemm::threadblock::CustomMmaPipelined<Shape,
+                                                               IteratorA,
+                                                               SmemIteratorA,
+                                                               IteratorB,
+                                                               SmemIteratorB,
+                                                               ElementC,
+                                                               LayoutC,
+                                                               Policy>;
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/gemm/custom_mma_base.h

@@ -0,0 +1,181 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+    \brief Template for a double-buffered threadblock-scoped GEMM kernel.
+*/
+
+#pragma once
+
+#include "cutlass/aligned_buffer.h"
+#include "cutlass/arch/memory.h"
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/gemm/gemm.h"
+#include "cutlass/gemm/threadblock/mma_base.h"
+#include "cutlass/matrix_shape.h"
+#include "cutlass/numeric_types.h"
+
+////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+namespace gemm {
+namespace threadblock {
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Structure to compute the matrix product targeting CUDA cores and SIMT math
+/// instructions.
+template <
+    /// Size of the Gemm problem - concept: gemm::GemmShape<>
+    typename Shape_,
+    /// Policy describing tuning details (concept: MmaPolicy)
+    typename Policy_,
+    /// Number of stages,
+    int Stages,
+    /// Used for partial specialization
+    typename Enable = bool>
+class CustomMmaBase {
+public:
+    ///< Size of the Gemm problem - concept: gemm::GemmShape<>
+    using Shape = Shape_;
+
+    ///< Policy describing tuning details
+    using Policy = Policy_;
+
+    //
+    // Dependent types
+    //
+
+    /// Warp-level Mma
+    using Operator = typename Policy::Operator;
+
+    /// Shape describing the overall GEMM computed from shared memory
+    /// by each warp.
+    using WarpGemm = typename Policy::Operator::Shape;
+
+    /// Shape describing the number of warps filling the CTA
+    using WarpCount =
+        GemmShape<Shape::kM / WarpGemm::kM, Shape::kN / WarpGemm::kN, Shape::kK / WarpGemm::kK>;
+
+    /// Number of warp-level GEMM oeprations
+    static int const kWarpGemmIterations = (WarpGemm::kK / Operator::Policy::MmaShape::kK);
+
+    /// Number of stages
+    static int const kStages = Stages;
+
+    //
+    // Nested structs
+    //
+
+    /// Shared storage object needed by threadblock-scoped GEMM
+    template <typename Element, typename OperandShape, typename OperandLayout>
+    struct OperandSharedStorage {
+        AlignedBuffer<Element, OperandShape::kCount> buffer;
+        using TensorRef = TensorRef<Element, OperandLayout>;
+
+        CUTLASS_DEVICE
+        static OperandLayout Layout()
+        {
+            return OperandLayout::packed({OperandShape::kRow, OperandShape::kColumn});
+        }
+
+        /// Returns a TensorRef to the operand
+        CUTLASS_HOST_DEVICE
+        TensorRef ref() { return TensorRef{buffer.data(), Layout()}; }
+    };
+
+    /// Shape of the A matrix operand in shared memory
+    using ShapeA = MatrixShape<Shape::kM + Policy::SmemPaddingA::kRow,
+                               Shape::kK * kStages + Policy::SmemPaddingA::kColumn>;
+
+    /// Shape of the B matrix operand in shared memory
+    using ShapeB = MatrixShape<Shape::kK * kStages + Policy::SmemPaddingB::kRow,
+                               Shape::kN + Policy::SmemPaddingB::kColumn>;
+
+    using SharedStorageA =
+        OperandSharedStorage<typename Operator::ElementA, ShapeA, typename Operator::LayoutA>;
+    using SharedStorageB =
+        OperandSharedStorage<typename Operator::ElementB, ShapeB, typename Operator::LayoutB>;
+    using TensorRefA = typename SharedStorageA::TensorRef;
+    using TensorRefB = typename SharedStorageB::TensorRef;
+
+    struct SharedStorage {
+        /// Buffer for A operand
+        SharedStorageA operand_A;
+
+        /// Buffer for B operand
+        SharedStorageB operand_B;
+    };
+
+protected:
+    //
+    // Data members
+    //
+
+    /// Iterator to load a warp-scoped tile of A operand from shared memory
+    typename Operator::IteratorA warp_tile_iterator_A_;
+
+    /// Iterator to load a warp-scoped tile of B operand from shared memory
+    typename Operator::IteratorB warp_tile_iterator_B_;
+
+public:
+    /// Construct from tensor references
+    CUTLASS_DEVICE
+    CustomMmaBase(
+        ///< Shared storage needed for internal use by threadblock-scoped GEMM
+        SharedStorageA& shared_storageA,
+        SharedStorageB& shared_storageB,
+        ///< ID within the threadblock
+        int thread_idx,
+        ///< ID of warp
+        int warp_idx,
+        ///< ID of each thread within a warp
+        int lane_idx)
+        : warp_tile_iterator_A_(shared_storageA.ref(), lane_idx),
+          warp_tile_iterator_B_(shared_storageB.ref(), lane_idx)
+    {
+    }
+};
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace threadblock
+}  // namespace gemm
+}  // namespace cutlass
+
+/////////////////////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/gemm/custom_mma_multistage.h

@@ -0,0 +1,714 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+    \brief Template for a double-buffered threadblock-scoped GEMM kernel.
+*/
+
+#pragma once
+
+#include "cutlass/aligned_buffer.h"
+#include "cutlass/arch/cache_operation.h"
+#include "cutlass/arch/memory.h"
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/gemm/gemm.h"
+#include "cutlass/matrix_shape.h"
+#include "cutlass/numeric_types.h"
+
+#include "custom_mma_base.h"
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+namespace gemm {
+namespace threadblock {
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+/// Structure to compute the matrix product targeting CUDA cores and SIMT math
+/// instructions.
+template <
+    /// Size of the Gemm problem - concept: gemm::GemmShape<>
+    typename Shape_,
+    /// Iterates over tiles of A operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorA_,
+    /// Iterates over tiles of A operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorA_,
+    /// Cache operation for operand A
+    cutlass::arch::CacheOperation::Kind CacheOpA,
+    /// Iterates over tiles of B operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorB_,
+    /// Iterates over tiles of B operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorB_,
+    /// Cache operation for operand B
+    cutlass::arch::CacheOperation::Kind CacheOpB,
+    /// Data type of accumulator matrix
+    typename ElementC_,
+    /// Data type of accumulator matrix
+    typename LayoutC_,
+    /// Policy describing tuning details (concept: MmaPolicy)
+    typename Policy_,
+    /// Number of stages,
+    int Stages,
+    /// Use zfill or predicate for out-of-bound cp.async
+    SharedMemoryClearOption SharedMemoryClear = SharedMemoryClearOption::kNone,
+    /// Upper boundon the K dimension
+    int kMaxK = cutlass::platform::numeric_limits<int>::max(),
+    /// Used for partial specialization
+    typename Enable = bool>
+class CustomMmaMultistage : public CustomMmaBase<Shape_, Policy_, Stages> {
+public:
+    ///< Base class
+    using Base = CustomMmaBase<Shape_, Policy_, Stages>;
+    ///< Size of the Gemm problem - concept: gemm::GemmShape<>
+    using Shape = Shape_;
+    ///< Iterates over tiles of A operand in global memory
+    using IteratorA = IteratorA_;
+    ///< Iterates over tiles of B operand in global memory
+    using IteratorB = IteratorB_;
+    ///< Data type of accumulator matrix
+    using ElementC = ElementC_;
+    ///< Layout of accumulator matrix
+    using LayoutC = LayoutC_;
+    ///< Policy describing tuning details
+    using Policy = Policy_;
+
+    using SmemIteratorA = SmemIteratorA_;
+    using SmemIteratorB = SmemIteratorB_;
+
+    static cutlass::arch::CacheOperation::Kind const kCacheOpA = CacheOpA;
+    static cutlass::arch::CacheOperation::Kind const kCacheOpB = CacheOpB;
+
+    //
+    // Dependent types
+    //
+
+    /// Fragment of accumulator tile
+    using FragmentC = typename Policy::Operator::FragmentC;
+
+    /// Warp-level Mma
+    using Operator = typename Policy::Operator;
+
+    /// Minimum architecture is Sm80 to support cp.async
+    using ArchTag = arch::Sm80;
+
+    /// Complex transform on A operand
+    static ComplexTransform const kTransformA = Operator::kTransformA;
+
+    /// Complex transform on B operand
+    static ComplexTransform const kTransformB = Operator::kTransformB;
+
+    /// Internal structure exposed for introspection.
+    struct Detail {
+        static_assert(Base::kWarpGemmIterations > 1,
+                      "The pipelined structure requires at least two warp-level "
+                      "GEMM operations.");
+
+        /// Number of cp.async instructions to load one stage of operand A
+        static int const AsyncCopyIterationsPerStageA = IteratorA::ThreadMap::Iterations::kCount;
+
+        /// Number of cp.async instructions to load one stage of operand B
+        static int const AsyncCopyIterationsPerStageB = IteratorB::ThreadMap::Iterations::kCount;
+
+        /// Number of stages
+        static int const kStages = Stages;
+
+        /// Number of cp.async instructions to load on group of operand A
+        static int const kAccessesPerGroupA =
+            (AsyncCopyIterationsPerStageA + Base::kWarpGemmIterations - 1) /
+            Base::kWarpGemmIterations;
+
+        /// Number of cp.async instructions to load on group of operand B
+        static int const kAccessesPerGroupB =
+            (AsyncCopyIterationsPerStageB + Base::kWarpGemmIterations - 1) /
+            Base::kWarpGemmIterations;
+    };
+
+    static bool const kSmemContainsEntireMat = kMaxK <= Shape::kK * Stages;
+    static constexpr int kNumStagesConcurrentLoad = kSmemContainsEntireMat ? Stages : Stages - 1;
+
+private:
+    using WarpLoadedFragmentA = typename Operator::FragmentA;
+    using WarpLoadedFragmentB = typename Operator::FragmentB;
+    using WarpTransformedFragmentA = typename Operator::TransformedFragmentA;
+    using WarpTransformedFragmentB = typename Operator::TransformedFragmentB;
+
+private:
+    //
+    // Data members
+    //
+
+    /// Iterator to write threadblock-scoped tile of A operand to shared memory
+    SmemIteratorA smem_iterator_A_;
+
+    /// Iterator to write threadblock-scoped tile of B operand to shared memory
+    SmemIteratorB smem_iterator_B_;
+
+    bool prologue_done_;
+
+    // Set to `True` to ensure the accumulator will be zero outside the GEMM
+    // footprint
+    bool zero_outside_bounds_;
+
+public:
+    /// Construct from tensor references
+    CUTLASS_DEVICE
+    CustomMmaMultistage(
+        ///< Shared storage needed for internal use by threadblock-scoped GEMM
+        typename Base::SharedStorageA& shared_storageA,
+        typename Base::SharedStorageB& shared_storageB,
+        ///< ID within the threadblock
+        int thread_idx,
+        ///< ID of warp
+        int warp_idx,
+        ///< ID of each thread within a warp
+        int lane_idx)
+        : Base(shared_storageA, shared_storageB, thread_idx, warp_idx, lane_idx),
+          smem_iterator_A_(shared_storageA.ref(), thread_idx),
+          smem_iterator_B_(shared_storageB.ref(), thread_idx),
+          prologue_done_(false),
+          zero_outside_bounds_(false)
+    {
+        // Compute warp location within threadblock tile by mapping the warp_id to
+        // three coordinates:
+        //   _m: the warp's position within the threadblock along the M dimension
+        //   _n: the warp's position within the threadblock along the N dimension
+        //   _k: the warp's position within the threadblock along the K dimension
+
+        int warp_idx_mn = warp_idx % (Base::WarpCount::kM * Base::WarpCount::kN);
+        int warp_idx_k = warp_idx / (Base::WarpCount::kM * Base::WarpCount::kN);
+
+        int warp_idx_m = warp_idx_mn % Base::WarpCount::kM;
+        int warp_idx_n = warp_idx_mn / Base::WarpCount::kM;
+
+        // Add per-warp offsets in units of warp-level tiles
+        this->warp_tile_iterator_A_.add_tile_offset(
+            {warp_idx_m, Base::kWarpGemmIterations * warp_idx_k});
+        this->warp_tile_iterator_B_.add_tile_offset(
+            {Base::kWarpGemmIterations * warp_idx_k, warp_idx_n});
+    }
+    CUTLASS_DEVICE
+    CustomMmaMultistage(
+        ///< Shared storage needed for internal use by threadblock-scoped GEMM
+        typename Base::SharedStorage& st,
+        ///< ID within the threadblock
+        int thread_idx,
+        ///< ID of warp
+        int warp_idx,
+        ///< ID of each thread within a warp
+        int lane_idx)
+        : CustomMmaMultistage(st.operand_A, st.operand_B, thread_idx, warp_idx, lane_idx)
+    {
+    }
+
+    CUTLASS_DEVICE
+    bool set_prologue_done(bool value)
+    {
+        prologue_done_ = value;
+        return true;
+    }
+
+    CUTLASS_DEVICE
+    bool set_zero_outside_bounds(bool value)
+    {
+        zero_outside_bounds_ = value;
+        return true;
+    }
+
+    template <bool kLoadA = true, bool kLoadB = true>
+    CUTLASS_DEVICE static void prologue(typename Base::SharedStorage& shared_storage,
+                                        ///< iterator over A operand in global memory
+                                        IteratorA iterator_A,
+                                        ///< iterator over B operand in global memory
+                                        IteratorB iterator_B,
+                                        int thread_idx,
+                                        int problem_size_k)
+    {
+        prologue<kLoadA, kLoadB>(shared_storage.operand_A,
+                                 shared_storage.operand_B,
+                                 iterator_A,
+                                 iterator_B,
+                                 thread_idx,
+                                 problem_size_k);
+    }
+
+    template <bool kLoadA = true, bool kLoadB = true>
+    CUTLASS_DEVICE static void prologue(typename Base::SharedStorageA& shared_storageA,
+                                        typename Base::SharedStorageB& shared_storageB,
+                                        ///< iterator over A operand in global memory
+                                        IteratorA iterator_A,
+                                        ///< iterator over B operand in global memory
+                                        IteratorB iterator_B,
+                                        int thread_idx,
+                                        int problem_size_k)
+    {
+        SmemIteratorA smem_iterator_A(shared_storageA.ref(), thread_idx);
+        SmemIteratorB smem_iterator_B(shared_storageB.ref(), thread_idx);
+        int32_t iter = (problem_size_k + Base::Shape::kK - 1) / Base::Shape::kK;
+        _prologue<kLoadA, kLoadB>(iterator_A, iterator_B, iter, smem_iterator_A, smem_iterator_B);
+    }
+
+    CUTLASS_DEVICE
+    void copy_tiles_and_advance(IteratorA& iterator_A,
+                                IteratorB& iterator_B,
+                                int group_start_A = 0,
+                                int group_start_B = 0)
+    {
+        iterator_A.set_iteration_index(group_start_A * IteratorA::kAccessesPerVector);
+        this->smem_iterator_A_.set_iteration_index(group_start_A);
+
+        // Async Copy for operand A
+        CUTLASS_PRAGMA_UNROLL
+        for (int j = 0; j < Detail::kAccessesPerGroupA; ++j) {
+            if (group_start_A + j < Detail::AsyncCopyIterationsPerStageA) {
+                typename IteratorA::AccessType* dst_ptr =
+                    reinterpret_cast<typename IteratorA::AccessType*>(this->smem_iterator_A_.get());
+
+                int const kSrcBytes = sizeof_bits<typename IteratorA::Element>::value *
+                                      IteratorA::ThreadMap::kElementsPerAccess /
+                                      IteratorA::kAccessesPerVector / 8;
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < IteratorA::kAccessesPerVector; ++v) {
+                    auto gmem_ptr = iterator_A.get();
+
+                    if (zero_outside_bounds_ ||
+                        SharedMemoryClear == SharedMemoryClearOption::kZfill) {
+                        cutlass::arch::cp_async_zfill<kSrcBytes, kCacheOpA>(
+                            dst_ptr + v, gmem_ptr, iterator_A.valid());
+                    } else {
+                        cutlass::arch::cp_async<kSrcBytes, kCacheOpA>(
+                            dst_ptr + v, gmem_ptr, iterator_A.valid());
+                    }
+
+                    ++iterator_A;
+                }
+
+                ++this->smem_iterator_A_;
+            }
+        }
+
+        iterator_B.set_iteration_index(group_start_B * IteratorB::kAccessesPerVector);
+        this->smem_iterator_B_.set_iteration_index(group_start_B);
+
+        // Async Copy for operand B
+        CUTLASS_PRAGMA_UNROLL
+        for (int j = 0; j < Detail::kAccessesPerGroupB; ++j) {
+            if (group_start_B + j < Detail::AsyncCopyIterationsPerStageB) {
+                typename IteratorB::AccessType* dst_ptr =
+                    reinterpret_cast<typename IteratorB::AccessType*>(this->smem_iterator_B_.get());
+
+                int const kSrcBytes = sizeof_bits<typename IteratorB::Element>::value *
+                                      IteratorB::ThreadMap::kElementsPerAccess /
+                                      IteratorB::kAccessesPerVector / 8;
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < IteratorB::kAccessesPerVector; ++v) {
+                    auto gmem_ptr = iterator_B.get();
+
+                    if (zero_outside_bounds_ ||
+                        SharedMemoryClear == SharedMemoryClearOption::kZfill) {
+                        cutlass::arch::cp_async_zfill<kSrcBytes, kCacheOpB>(
+                            dst_ptr + v, gmem_ptr, iterator_B.valid());
+                    } else {
+                        cutlass::arch::cp_async<kSrcBytes, kCacheOpB>(
+                            dst_ptr + v, gmem_ptr, iterator_B.valid());
+                    }
+
+                    ++iterator_B;
+                }
+                ++this->smem_iterator_B_;
+            }
+        }
+    }
+
+    template <bool kLoadA = true, bool kLoadB = true>
+    CUTLASS_DEVICE static void _prologue(IteratorA& iterator_A,
+                                         IteratorB& iterator_B,
+                                         int32_t& gemm_k_iterations,
+                                         SmemIteratorA& smem_iterator_A_,
+                                         SmemIteratorB& smem_iterator_B_)
+    {
+        // Issue several complete stages
+        CUTLASS_PRAGMA_UNROLL
+        for (int stage = 0; stage < kNumStagesConcurrentLoad; ++stage, --gemm_k_iterations) {
+            iterator_A.clear_mask(gemm_k_iterations == 0);
+            iterator_B.clear_mask(gemm_k_iterations == 0);
+
+            iterator_A.set_iteration_index(0);
+            smem_iterator_A_.set_iteration_index(0);
+
+            // Async Copy for operand A
+            CUTLASS_PRAGMA_UNROLL
+            for (int j = 0; j < Detail::AsyncCopyIterationsPerStageA; ++j) {
+                typename IteratorA::AccessType* dst_ptr =
+                    reinterpret_cast<typename IteratorA::AccessType*>(smem_iterator_A_.get());
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < IteratorA::kAccessesPerVector; ++v) {
+                    int const kSrcBytes = sizeof_bits<typename IteratorA::Element>::value *
+                                          IteratorA::ThreadMap::kElementsPerAccess /
+                                          IteratorA::kAccessesPerVector / 8;
+
+                    int src_bytes = (iterator_A.valid() ? kSrcBytes : 0);
+
+                    if (kLoadA) {
+                        cutlass::arch::cp_async_zfill<kSrcBytes, kCacheOpA>(
+                            dst_ptr + v, iterator_A.get(), iterator_A.valid());
+                    }
+
+                    ++iterator_A;
+                }
+
+                ++smem_iterator_A_;
+            }
+
+            iterator_B.set_iteration_index(0);
+            smem_iterator_B_.set_iteration_index(0);
+
+            // Async Copy for operand B
+            CUTLASS_PRAGMA_UNROLL
+            for (int j = 0; j < Detail::AsyncCopyIterationsPerStageB; ++j) {
+                typename IteratorB::AccessType* dst_ptr =
+                    reinterpret_cast<typename IteratorB::AccessType*>(smem_iterator_B_.get());
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < IteratorB::kAccessesPerVector; ++v) {
+                    int const kSrcBytes = sizeof_bits<typename IteratorB::Element>::value *
+                                          IteratorB::ThreadMap::kElementsPerAccess /
+                                          IteratorB::kAccessesPerVector / 8;
+
+                    if (kLoadB) {
+                        cutlass::arch::cp_async_zfill<kSrcBytes, kCacheOpB>(
+                            dst_ptr + v, iterator_B.get(), iterator_B.valid());
+                    }
+
+                    ++iterator_B;
+                }
+
+                ++smem_iterator_B_;
+            }
+
+            // Move to the next stage
+            iterator_A.add_tile_offset({0, 1});
+            iterator_B.add_tile_offset({1, 0});
+
+            smem_iterator_A_.add_tile_offset({0, 1});
+            smem_iterator_B_.add_tile_offset({1, 0});
+
+            // Defines the boundary of a stage of cp.async.
+            cutlass::arch::cp_async_fence();
+        }
+    }
+
+    /// Perform a threadblock-scoped matrix multiply-accumulate
+    CUTLASS_DEVICE
+    void operator()(
+        ///< problem size of GEMM
+        int gemm_k_iterations,
+        ///< destination accumulator tile
+        FragmentC& accum,
+        ///< iterator over A operand in global memory
+        IteratorA iterator_A,
+        ///< iterator over B operand in global memory
+        IteratorB iterator_B,
+        ///< initial value of accumulator
+        FragmentC const& src_accum)
+    {
+        //
+        // Prologue
+        //
+
+        if (!prologue_done_) {
+            _prologue<true, true>(
+                iterator_A, iterator_B, gemm_k_iterations, smem_iterator_A_, smem_iterator_B_);
+        } else if (!kSmemContainsEntireMat) {
+            _prologue<false, false>(
+                iterator_A, iterator_B, gemm_k_iterations, smem_iterator_A_, smem_iterator_B_);
+        } else {
+            gemm_k_iterations -= kNumStagesConcurrentLoad;
+        }
+
+        // Perform accumulation in the 'd' output operand
+        accum = src_accum;
+
+        //
+        // Clear the remaining tiles of SMEM. This is a functional requirement for
+        // some kernels so that all accumulator elements outside the GEMM footprint
+        // are zero.
+        //
+
+        if (SharedMemoryClear == SharedMemoryClearOption::kClearLastStage) {
+            /// Iterator to write threadblock-scoped tile of A operand to shared
+            /// memory
+            SmemIteratorA last_smem_iterator_A(this->smem_iterator_A_);
+
+            typename IteratorA::AccessType zero_A;
+            zero_A.clear();
+
+            last_smem_iterator_A.set_iteration_index(0);
+
+            // Async Copy for operand A
+            CUTLASS_PRAGMA_UNROLL
+            for (int j = 0; j < Detail::AsyncCopyIterationsPerStageA; ++j) {
+                typename IteratorA::AccessType* dst_ptr =
+                    reinterpret_cast<typename IteratorA::AccessType*>(last_smem_iterator_A.get());
+
+                *dst_ptr = zero_A;
+
+                ++last_smem_iterator_A;
+            }
+
+            /// Iterator to write threadblock-scoped tile of B operand to shared
+            /// memory
+            SmemIteratorB last_smem_iterator_B(this->smem_iterator_B_);
+            typename IteratorB::AccessType zero_B;
+
+            zero_B.clear();
+            last_smem_iterator_B.set_iteration_index(0);
+
+            // Async Copy for operand B
+            CUTLASS_PRAGMA_UNROLL
+            for (int j = 0; j < Detail::AsyncCopyIterationsPerStageB; ++j) {
+                typename IteratorB::AccessType* dst_ptr =
+                    reinterpret_cast<typename IteratorB::AccessType*>(last_smem_iterator_B.get());
+
+                *dst_ptr = zero_B;
+
+                ++last_smem_iterator_B;
+            }
+        }
+
+        // Waits until kStages-2 stages have committed.
+        cutlass::arch::cp_async_wait<kNumStagesConcurrentLoad - 1>();
+        __syncthreads();
+
+        // Pair of fragments used to overlap shared memory loads and math
+        // instructions
+        WarpLoadedFragmentA warp_loaded_frag_A[2];
+        WarpLoadedFragmentB warp_loaded_frag_B[2];
+        WarpTransformedFragmentA warp_transformed_frag_A[2];
+        WarpTransformedFragmentB warp_transformed_frag_B[2];
+
+        Operator warp_mma;
+
+        this->warp_tile_iterator_A_.set_kgroup_index(0);
+        this->warp_tile_iterator_B_.set_kgroup_index(0);
+
+        this->warp_tile_iterator_A_.load(warp_loaded_frag_A[0]);
+        this->warp_tile_iterator_B_.load(warp_loaded_frag_B[0]);
+
+        ++this->warp_tile_iterator_A_;
+        ++this->warp_tile_iterator_B_;
+
+        iterator_A.clear_mask(gemm_k_iterations == 0);
+        iterator_B.clear_mask(gemm_k_iterations == 0);
+
+        int smem_write_stage_idx = Base::kStages - 1;
+        int smem_read_stage_idx = 0;
+
+        warp_mma.transform(warp_transformed_frag_A[0],
+                           warp_transformed_frag_B[0],
+                           warp_loaded_frag_A[0],
+                           warp_loaded_frag_B[0]);
+
+        // tf32x3 kernels use staging accumulation. warp_mma uses a temporary
+        // accumulator and this temporary accumulator is added to the final
+        // accumulator once in every mainloop iteration.
+        plus<FragmentC> plus_accum;
+
+        FragmentC tmp_accum;
+
+        if (platform::is_same<typename Operator::MathOperator, arch::OpMultiplyAddFastF32>::value ||
+            platform::is_same<typename Operator::MathOperator,
+                              arch::OpMultiplyAddComplexFastF32>::value) {
+            tmp_accum.clear();
+        }
+
+        //
+        // Mainloop
+        //
+
+        CUTLASS_GEMM_LOOP
+        for (; gemm_k_iterations > (-kNumStagesConcurrentLoad);) {
+            //
+            // Loop over GEMM K dimension
+            //
+
+            // Computes a warp-level GEMM on data held in shared memory
+            // Each "warp_mma_k" refers to a warp-level matrix multiply-accumulate
+            CUTLASS_PRAGMA_UNROLL
+            for (int warp_mma_k = 0; warp_mma_k < Base::kWarpGemmIterations; ++warp_mma_k) {
+                // Load warp-level tiles from shared memory, wrapping to k offset if
+                // this is the last group as the case may be.
+
+                this->warp_tile_iterator_A_.set_kgroup_index((warp_mma_k + 1) %
+                                                             Base::kWarpGemmIterations);
+                this->warp_tile_iterator_B_.set_kgroup_index((warp_mma_k + 1) %
+                                                             Base::kWarpGemmIterations);
+
+                // In case of a non-circular buffer ("kSmemContainsEntireMat")
+                // make sure we don't load out of bounds data.
+                if (!kSmemContainsEntireMat || gemm_k_iterations > (-kNumStagesConcurrentLoad) ||
+                    warp_mma_k < Base::kWarpGemmIterations - 1) {
+                    this->warp_tile_iterator_A_.load(warp_loaded_frag_A[(warp_mma_k + 1) % 2]);
+                    this->warp_tile_iterator_B_.load(warp_loaded_frag_B[(warp_mma_k + 1) % 2]);
+                }
+
+                ++this->warp_tile_iterator_A_;
+                ++this->warp_tile_iterator_B_;
+
+                if (warp_mma_k > 0)
+                    warp_mma.transform(warp_transformed_frag_A[warp_mma_k % 2],
+                                       warp_transformed_frag_B[warp_mma_k % 2],
+                                       warp_loaded_frag_A[warp_mma_k % 2],
+                                       warp_loaded_frag_B[warp_mma_k % 2]);
+
+                if (platform::is_same<typename Operator::MathOperator,
+                                      arch::OpMultiplyAddFastF32>::value ||
+                    platform::is_same<typename Operator::MathOperator,
+                                      arch::OpMultiplyAddComplexFastF32>::value) {
+                    warp_mma(tmp_accum,
+                             warp_transformed_frag_A[warp_mma_k % 2],
+                             warp_transformed_frag_B[warp_mma_k % 2],
+                             tmp_accum);
+
+                    if (warp_mma_k == 0) {
+                        accum = plus_accum(accum, tmp_accum);
+                        tmp_accum.clear();
+                    }
+                } else {
+                    warp_mma(accum,
+                             warp_transformed_frag_A[warp_mma_k % 2],
+                             warp_transformed_frag_B[warp_mma_k % 2],
+                             accum);
+                }
+
+                // Issue global->shared copies for the this stage
+                if (!kSmemContainsEntireMat && warp_mma_k < Base::kWarpGemmIterations - 1) {
+                    int group_start_iteration_A, group_start_iteration_B;
+
+                    group_start_iteration_A = warp_mma_k * Detail::kAccessesPerGroupA;
+                    group_start_iteration_B = warp_mma_k * Detail::kAccessesPerGroupB;
+
+                    copy_tiles_and_advance(
+                        iterator_A, iterator_B, group_start_iteration_A, group_start_iteration_B);
+                }
+
+                if (warp_mma_k + 2 == Base::kWarpGemmIterations) {
+                    if (!kSmemContainsEntireMat) {
+                        int group_start_iteration_A, group_start_iteration_B;
+                        group_start_iteration_A = (warp_mma_k + 1) * Detail::kAccessesPerGroupA;
+                        group_start_iteration_B = (warp_mma_k + 1) * Detail::kAccessesPerGroupB;
+
+                        copy_tiles_and_advance(iterator_A,
+                                               iterator_B,
+                                               group_start_iteration_A,
+                                               group_start_iteration_B);
+                    }
+
+                    // Inserts a memory fence between stages of cp.async instructions.
+                    cutlass::arch::cp_async_fence();
+
+                    // Waits until kStages-2 stages have committed.
+                    cutlass::arch::cp_async_wait<kNumStagesConcurrentLoad - 1>();
+                    __syncthreads();
+
+                    // Move to the next stage
+                    iterator_A.add_tile_offset({0, 1});
+                    iterator_B.add_tile_offset({1, 0});
+
+                    this->smem_iterator_A_.add_tile_offset({0, 1});
+                    this->smem_iterator_B_.add_tile_offset({1, 0});
+
+                    // Add negative offsets to return iterators to the 'start' of the
+                    // circular buffer in shared memory
+                    if (smem_write_stage_idx == (Base::kStages - 1)) {
+                        this->smem_iterator_A_.add_tile_offset({0, -Base::kStages});
+                        this->smem_iterator_B_.add_tile_offset({-Base::kStages, 0});
+                        smem_write_stage_idx = 0;
+                    } else {
+                        ++smem_write_stage_idx;
+                    }
+
+                    if (!kSmemContainsEntireMat && smem_read_stage_idx == (Base::kStages - 1)) {
+                        this->warp_tile_iterator_A_.add_tile_offset(
+                            {0, -Base::kStages * Policy::kPartitionsK * Base::kWarpGemmIterations});
+                        this->warp_tile_iterator_B_.add_tile_offset(
+                            {-Base::kStages * Policy::kPartitionsK * Base::kWarpGemmIterations, 0});
+                        smem_read_stage_idx = 0;
+                    } else {
+                        ++smem_read_stage_idx;
+                    }
+
+                    --gemm_k_iterations;
+                    iterator_A.clear_mask(gemm_k_iterations == 0);
+                    iterator_B.clear_mask(gemm_k_iterations == 0);
+                }
+
+                // Do any conversions feeding the first stage at the end of the loop so
+                // we can start right away on mma instructions
+                if (warp_mma_k + 1 == Base::kWarpGemmIterations)
+                    warp_mma.transform(warp_transformed_frag_A[(warp_mma_k + 1) % 2],
+                                       warp_transformed_frag_B[(warp_mma_k + 1) % 2],
+                                       warp_loaded_frag_A[(warp_mma_k + 1) % 2],
+                                       warp_loaded_frag_B[(warp_mma_k + 1) % 2]);
+            }
+        }
+
+        if (platform::is_same<typename Operator::MathOperator, arch::OpMultiplyAddFastF32>::value ||
+            platform::is_same<typename Operator::MathOperator,
+                              arch::OpMultiplyAddComplexFastF32>::value) {
+            accum = plus_accum(accum, tmp_accum);
+        }
+    }
+};
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace threadblock
+}  // namespace gemm
+}  // namespace cutlass
+
+/////////////////////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/gemm/custom_mma_pipelined.h

@@ -0,0 +1,388 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+    \brief Template for a double-buffered threadblock-scoped GEMM kernel.
+*/
+
+#pragma once
+
+#include "cutlass/aligned_buffer.h"
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/numeric_conversion.h"
+
+#include "cutlass/matrix_shape.h"
+#include "cutlass/numeric_types.h"
+
+#include "custom_mma_base.h"
+#include "cutlass/gemm/gemm.h"
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+namespace gemm {
+namespace threadblock {
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+/// Structure to compute the matrix product targeting CUDA cores and SIMT math
+/// instructions.
+template <
+    /// Size of the Gemm problem - concept: gemm::GemmShape<>
+    typename Shape_,
+    /// Iterates over tiles of A operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorA_,
+    /// Iterates over tiles of A operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorA_,
+    /// Iterates over tiles of B operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorB_,
+    /// Iterates over tiles of B operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorB_,
+    /// Data type of accumulator matrix
+    typename ElementC_,
+    /// Data type of accumulator matrix
+    typename LayoutC_,
+    /// Policy describing tuning details (concept: MmaPolicy)
+    typename Policy_,
+    /// Transformation applied to A operand
+    typename TransformA_ = NumericArrayConverter<typename SmemIteratorA_::Element,
+                                                 typename IteratorA_::Element,
+                                                 IteratorA_::Fragment::kElements>,
+    ///
+    /// Transformation applied to B operand
+    typename TransformB_ = NumericArrayConverter<typename SmemIteratorB_::Element,
+                                                 typename IteratorB_::Element,
+                                                 IteratorB_::Fragment::kElements>,
+    /// Used for partial specialization
+    typename Enable = bool>
+class CustomMmaPipelined : public CustomMmaBase<Shape_, Policy_, 2> {
+public:
+    ///< Base class
+    using Base = CustomMmaBase<Shape_, Policy_, 2>;
+
+    using Shape = Shape_;          ///< Size of the Gemm problem - concept: gemm::GemmShape<>
+    using IteratorA = IteratorA_;  ///< Iterates over tiles of A operand in global memory
+    using IteratorB = IteratorB_;  ///< Iterates over tiles of B operand in global memory
+    using ElementC = ElementC_;    ///< Data type of accumulator matrix
+    using LayoutC = LayoutC_;      ///< Layout of accumulator matrix
+    using Policy = Policy_;        ///< Policy describing tuning details
+
+    using SmemIteratorA = SmemIteratorA_;
+    using SmemIteratorB = SmemIteratorB_;
+
+    using TransformA = TransformA_;
+    using TransformB = TransformB_;
+
+    //
+    // Dependent types
+    //
+
+    /// Fragment of operand A loaded from global memory
+    using FragmentA = typename IteratorA::Fragment;
+
+    /// Fragment of operand B loaded from global memory
+    using FragmentB = typename IteratorB::Fragment;
+
+    /// Fragment of accumulator tile
+    using FragmentC = typename Policy::Operator::FragmentC;
+
+    /// Warp-level Mma
+    using Operator = typename Policy::Operator;
+
+    /// Obtain the arch tag from the warp-level operator
+    using ArchTag = typename Policy::Operator::ArchTag;
+
+    /// Complex transform on A operand
+    static ComplexTransform const kTransformA = Operator::kTransformA;
+
+    /// Complex transform on B operand
+    static ComplexTransform const kTransformB = Operator::kTransformB;
+
+    // staticaly assert kStages for MmaPipelined is two (Double-buffered pipeline)
+    static_assert((Base::kStages == 2), "MmaPipelined requires kStages set to value 2");
+
+    static bool const kSmemContainsEntireMat = false;
+
+private:
+    using WarpFragmentA = typename Operator::FragmentA;
+    using WarpFragmentB = typename Operator::FragmentB;
+
+protected:
+    /// Iterator to write threadblock-scoped tile of A operand to shared memory
+    SmemIteratorA smem_iterator_A_;
+
+    /// Iterator to write threadblock-scoped tile of B operand to shared memory
+    SmemIteratorB smem_iterator_B_;
+
+public:
+    /// Construct from tensor references
+    CUTLASS_DEVICE
+    CustomMmaPipelined(typename Base::SharedStorageA& shared_storageA,
+                       typename Base::SharedStorageB& shared_storageB,
+                       int thread_idx,  ///< ID within the threadblock
+                       int warp_idx,    ///< ID of warp
+                       int lane_idx     ///< ID of each thread within a warp
+                       )
+        : Base(shared_storageA, shared_storageB, thread_idx, warp_idx, lane_idx),
+          smem_iterator_A_(shared_storageA.ref(), thread_idx),
+          smem_iterator_B_(shared_storageB.ref(), thread_idx)
+    {
+        // Compute warp location within threadblock tile by mapping the warp_id to
+        // three coordinates:
+        //   _m: the warp's position within the threadblock along the M dimension
+        //   _n: the warp's position within the threadblock along the N dimension
+        //   _k: the warp's position within the threadblock along the K dimension
+
+        int warp_idx_mn = warp_idx % (Base::WarpCount::kM * Base::WarpCount::kN);
+        int warp_idx_k = warp_idx / (Base::WarpCount::kM * Base::WarpCount::kN);
+
+        int warp_idx_m = warp_idx_mn % Base::WarpCount::kM;
+        int warp_idx_n = warp_idx_mn / Base::WarpCount::kM;
+
+        // Add per-warp offsets in units of warp-level tiles
+        this->warp_tile_iterator_A_.add_tile_offset(
+            {warp_idx_m, Base::kWarpGemmIterations * warp_idx_k});
+        this->warp_tile_iterator_B_.add_tile_offset(
+            {Base::kWarpGemmIterations * warp_idx_k, warp_idx_n});
+    }
+    CUTLASS_DEVICE
+    CustomMmaPipelined(
+        ///< Shared storage needed for internal use by threadblock-scoped GEMM
+        typename Base::SharedStorage& st,
+        ///< ID within the threadblock
+        int thread_idx,
+        ///< ID of warp
+        int warp_idx,
+        ///< ID of each thread within a warp
+        int lane_idx)
+        : CustomMmaPipelined(st.operand_A, st.operand_B, thread_idx, warp_idx, lane_idx)
+    {
+    }
+
+    CUTLASS_DEVICE
+    bool set_prologue_done(bool value)
+    {
+        // NOT IMPLEMENTED FOR PIPELINED
+    }
+
+    CUTLASS_DEVICE
+    bool set_zero_outside_bounds(bool value)
+    {
+        // NOT NEEDED FOR PIPELINED
+        // shared memory will always be zero-filled
+    }
+
+    template <bool kLoadA = true, bool kLoadB = true>
+    CUTLASS_DEVICE static void prologue(typename Base::SharedStorage& shared_storage,
+                                        ///< iterator over A operand in global memory
+                                        IteratorA iterator_A,
+                                        ///< iterator over B operand in global memory
+                                        IteratorB iterator_B,
+                                        int thread_idx,
+                                        int problem_size_k)
+    {
+        prologue<kLoadA, kLoadB>(shared_storage.operand_A,
+                                 shared_storage.operand_B,
+                                 iterator_A,
+                                 iterator_B,
+                                 thread_idx,
+                                 problem_size_k);
+    }
+
+    template <bool kLoadA = true, bool kLoadB = true>
+    CUTLASS_DEVICE static void prologue(typename Base::SharedStorageA& shared_storageA,
+                                        typename Base::SharedStorageB& shared_storageB,
+                                        ///< iterator over A operand in global memory
+                                        IteratorA iterator_A,
+                                        ///< iterator over B operand in global memory
+                                        IteratorB iterator_B,
+                                        int thread_idx,
+                                        int problem_size_k)
+    {
+        // NOT IMPLEMENTED FOR PIPELINED
+    }
+
+    /// Perform a threadblock-scoped matrix multiply-accumulate
+    CUTLASS_DEVICE
+    void operator()(
+        int gemm_k_iterations,                  ///< number of iterations of the mainloop
+        FragmentC& accum,                       ///< destination accumulator tile
+        IteratorA iterator_A,                   ///< iterator over A operand in global memory
+        IteratorB iterator_B,                   ///< iterator over B operand in global memory
+        FragmentC const& src_accum,             ///< source accumulator tile
+        TransformA transform_A = TransformA(),  ///< transformation applied to A fragment
+        TransformB transform_B = TransformB())
+    {  ///< transformation applied to B fragment
+
+        //
+        // Prologue
+        //
+
+        // Perform accumulation in the 'd' output operand
+        accum = src_accum;
+
+        FragmentA tb_frag_A;
+        FragmentB tb_frag_B;
+
+        tb_frag_A.clear();
+        tb_frag_B.clear();
+
+        // The last kblock is loaded in the prolog
+        iterator_A.load(tb_frag_A);
+        iterator_B.load(tb_frag_B);
+
+        ++iterator_A;
+        ++iterator_B;
+
+        this->smem_iterator_A_.store(transform_A(tb_frag_A));
+        this->smem_iterator_B_.store(transform_B(tb_frag_B));
+
+        ++this->smem_iterator_A_;
+        ++this->smem_iterator_B_;
+
+        __syncthreads();
+
+        // Pair of fragments used to overlap shared memory loads and math
+        // instructions
+        WarpFragmentA warp_frag_A[2];
+        WarpFragmentB warp_frag_B[2];
+
+        this->warp_tile_iterator_A_.set_kgroup_index(0);
+        this->warp_tile_iterator_B_.set_kgroup_index(0);
+
+        this->warp_tile_iterator_A_.load(warp_frag_A[0]);
+        this->warp_tile_iterator_B_.load(warp_frag_B[0]);
+
+        ++this->warp_tile_iterator_A_;
+        ++this->warp_tile_iterator_B_;
+
+        Operator warp_mma;
+
+        int smem_write_stage_idx = 1;
+
+        // Avoid reading out of bounds
+        iterator_A.clear_mask(gemm_k_iterations <= 1);
+        iterator_B.clear_mask(gemm_k_iterations <= 1);
+
+        // Issue loads during the first warp-level matrix multiply-add *AFTER*
+        // issuing shared memory loads (which have the tightest latency requirement).
+
+        //
+        // Mainloop
+        //
+
+        // Note: The main loop does not support Base::kWarpGemmIterations == 2.
+        CUTLASS_GEMM_LOOP
+        for (; gemm_k_iterations > 0; --gemm_k_iterations) {
+            //
+            // Loop over GEMM K dimension
+            //
+
+            CUTLASS_PRAGMA_UNROLL
+            for (int warp_mma_k = 0; warp_mma_k < Base::kWarpGemmIterations; ++warp_mma_k) {
+                // Load warp-level tiles from shared memory, wrapping to k offset if
+                // this is the last group as the case may be.
+
+                if (warp_mma_k == Base::kWarpGemmIterations - 1) {
+                    // Write fragments to shared memory
+                    this->smem_iterator_A_.store(transform_A(tb_frag_A));
+
+                    this->smem_iterator_B_.store(transform_B(tb_frag_B));
+
+                    __syncthreads();
+
+                    ++this->smem_iterator_A_;
+                    ++this->smem_iterator_B_;
+
+                    // Add negative offsets to return iterators to the 'start' of the
+                    // circular buffer in shared memory
+                    if (smem_write_stage_idx == 1) {
+                        this->smem_iterator_A_.add_tile_offset({0, -Base::kStages});
+                        this->smem_iterator_B_.add_tile_offset({-Base::kStages, 0});
+                    } else {
+                        this->warp_tile_iterator_A_.add_tile_offset(
+                            {0, -Base::kStages * Policy::kPartitionsK * Base::kWarpGemmIterations});
+                        this->warp_tile_iterator_B_.add_tile_offset(
+                            {-Base::kStages * Policy::kPartitionsK * Base::kWarpGemmIterations, 0});
+                    }
+
+                    smem_write_stage_idx ^= 1;
+                }
+
+                this->warp_tile_iterator_A_.set_kgroup_index((warp_mma_k + 1) %
+                                                             Base::kWarpGemmIterations);
+                this->warp_tile_iterator_B_.set_kgroup_index((warp_mma_k + 1) %
+                                                             Base::kWarpGemmIterations);
+
+                this->warp_tile_iterator_A_.load(warp_frag_A[(warp_mma_k + 1) % 2]);
+                this->warp_tile_iterator_B_.load(warp_frag_B[(warp_mma_k + 1) % 2]);
+
+                ++this->warp_tile_iterator_A_;
+                ++this->warp_tile_iterator_B_;
+
+                if (warp_mma_k == 0) {
+                    iterator_A.load(tb_frag_A);
+                    iterator_B.load(tb_frag_B);
+
+                    ++iterator_A;
+                    ++iterator_B;
+
+                    // Avoid reading out of bounds if this was the last loop iteration
+                    iterator_A.clear_mask(gemm_k_iterations <= 2);
+                    iterator_B.clear_mask(gemm_k_iterations <= 2);
+                }
+
+                warp_mma(accum, warp_frag_A[warp_mma_k % 2], warp_frag_B[warp_mma_k % 2], accum);
+            }
+        }
+    }
+};
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace threadblock
+}  // namespace gemm
+}  // namespace cutlass
+
+/////////////////////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/gemm/find_default_mma.h

@@ -0,0 +1,191 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holdvr nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+    \brief Cutlass provides helper template functions to figure out the right
+   datastructures to instantiate to run a GEMM with various parameters (see
+   `cutlass/gemm/threadblock/default_mma.h`). However, due to template
+   instantiation priority rules, it will only create an MmaMultiStage with
+   kStages=3 (otherwise creates an MmePipelined - which is not compatible with
+   FastF32). kStages=3 uses too much shared memory and we want to use kStages=2,
+   so we just copy-pasted some code from `default_mma.h` and
+   `default_mma_core.h` files and wrapped this template to allow our usecase.
+
+    This is really only for the FastF32 case - aka using TensorCores with fp32.
+*/
+
+#pragma once
+
+#include "cutlass/gemm/threadblock/default_mma.h"
+#include "cutlass/gemm/threadblock/default_mma_core_simt.h"
+#include "cutlass/gemm/threadblock/default_mma_core_sm70.h"
+#include "cutlass/gemm/threadblock/default_mma_core_sm75.h"
+#include "cutlass/gemm/threadblock/default_mma_core_sm80.h"
+
+namespace cutlass {
+namespace gemm {
+namespace threadblock {
+
+template <
+    /// Element type for A matrix operand
+    typename ElementA,
+    /// Layout type for A matrix operand
+    typename LayoutA,
+    /// Access granularity of A matrix in units of elements
+    int kAlignmentA,
+    /// Element type for B matrix operand
+    typename ElementB,
+    /// Layout type for B matrix operand
+    typename LayoutB,
+    /// Access granularity of B matrix in units of elements
+    int kAlignmentB,
+    /// Element type for internal accumulation
+    typename ElementAccumulator,
+    /// Layout type for C and D matrix operand
+    typename LayoutC,
+    /// Operator class tag
+    typename OperatorClass,
+    /// Tag indicating architecture to tune for
+    typename ArchTag,
+    /// Threadblock-level tile size (concept: GemmShape)
+    typename ThreadblockShape,
+    /// Warp-level tile size (concept: GemmShape)
+    typename WarpShape,
+    /// Instruction-level tile size (concept: GemmShape)
+    typename InstructionShape,
+    /// Number of stages used in the pipelined mainloop
+    int Stages,
+    /// Operation performed by GEMM
+    typename Operator,
+    typename Enable_ = void>
+struct FindDefaultMma {
+    static constexpr bool AccumulatorsInRowMajor = false;
+    static constexpr SharedMemoryClearOption SharedMemoryClear = SharedMemoryClearOption::kNone;
+    using DefaultMma = cutlass::gemm::threadblock::DefaultMma<ElementA,
+                                                              LayoutA,
+                                                              kAlignmentA,
+                                                              ElementB,
+                                                              LayoutB,
+                                                              kAlignmentB,
+                                                              ElementAccumulator,
+                                                              LayoutC,
+                                                              OperatorClass,
+                                                              ArchTag,
+                                                              ThreadblockShape,
+                                                              WarpShape,
+                                                              InstructionShape,
+                                                              Stages,
+                                                              Operator,
+                                                              AccumulatorsInRowMajor,
+                                                              SharedMemoryClear>;
+};
+
+/// Specialization for sm80 / FastF32 / multistage with kStages=2
+template <typename ElementA_,
+          /// Layout type for A matrix operand
+          typename LayoutA_,
+          /// Access granularity of A matrix in units of elements
+          int kAlignmentA,
+          typename ElementB_,
+          /// Layout type for B matrix operand
+          typename LayoutB_,
+          /// Access granularity of B matrix in units of elements
+          int kAlignmentB,
+          typename ElementAccumulator,
+          /// Threadblock-level tile size (concept: GemmShape)
+          typename ThreadblockShape,
+          /// Warp-level tile size (concept: GemmShape)
+          typename WarpShape,
+          /// Instruction-level tile size (concept: GemmShape)
+          typename InstructionShape,
+          int kStages,
+          typename Operator>
+struct FindDefaultMma<ElementA_,
+                      LayoutA_,
+                      kAlignmentA,
+                      ElementB_,
+                      LayoutB_,
+                      kAlignmentB,
+                      ElementAccumulator,
+                      layout::RowMajor,
+                      arch::OpClassTensorOp,
+                      arch::Sm80,
+                      ThreadblockShape,
+                      WarpShape,
+                      InstructionShape,
+                      kStages,
+                      Operator,
+                      typename cutlass::platform::enable_if<(kAlignmentA > 1)>::type> {
+    using LayoutC = layout::RowMajor;
+    using OperatorClass = arch::OpClassTensorOp;
+    using ArchTag = arch::Sm80;
+
+    using DefaultMma_ = cutlass::gemm::threadblock::DefaultMma<ElementA_,
+                                                               LayoutA_,
+                                                               kAlignmentA,
+                                                               ElementB_,
+                                                               LayoutB_,
+                                                               kAlignmentB,
+                                                               ElementAccumulator,
+                                                               LayoutC,
+                                                               OperatorClass,
+                                                               ArchTag,
+                                                               ThreadblockShape,
+                                                               WarpShape,
+                                                               InstructionShape,
+                                                               3,
+                                                               Operator>;
+    struct DefaultMma : DefaultMma_ {
+        using MmaCore_ = typename DefaultMma_::MmaCore;
+        // Define the threadblock-scoped multistage matrix multiply
+        using ThreadblockMma =
+            cutlass::gemm::threadblock::MmaMultistage<typename MmaCore_::Shape,
+                                                      typename DefaultMma_::IteratorA,
+                                                      typename MmaCore_::SmemIteratorA,
+                                                      MmaCore_::kCacheOpA,
+                                                      typename DefaultMma_::IteratorB,
+                                                      typename MmaCore_::SmemIteratorB,
+                                                      MmaCore_::kCacheOpB,
+                                                      ElementAccumulator,
+                                                      LayoutC,
+                                                      typename MmaCore_::MmaPolicy,
+                                                      kStages>;
+    };
+};
+
+}  // namespace threadblock
+}  // namespace gemm
+}  // namespace cutlass

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/gemm/mma_accum_lambda_iterator.h

@@ -0,0 +1,347 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holdvr nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+#include "cutlass/functional.h"
+#include "cutlass/gemm/warp/mma_simt_tile_iterator.h"
+#include "cutlass/gemm/warp/mma_tensor_op_tile_iterator_sm70.h"
+#include "cutlass/gemm/warp/mma_tensor_op_tile_iterator_sm80.h"
+#include "cutlass/matrix_shape.h"
+
+/*
+TensorCores have different accumulator layouts.
+This file provides a class to easily map the accumulator
+i-th element with the corresponding matrix row/col.
+*/
+
+template <typename T, typename accum_t, int kWarpSize>
+struct AccumLambdaIteratorSm80 {
+    static_assert(cutlass::platform::is_same<typename T::Layout, cutlass::layout::RowMajor>::value,
+                  "only RowMajor is supported");
+
+    using Policy = typename T::Policy;
+    using InstructionShape = typename T::InstructionShape;
+    using OpDelta = typename T::OpDelta;
+    using Shape = typename T::Shape;
+    static int const kElementsPerAccess = InstructionShape::kN / 4;
+    static int const kRowsPerTile = 8;
+    static int const kAccumulatorRows = InstructionShape::kM / kRowsPerTile;
+
+    static cutlass::MatrixCoord CUTLASS_DEVICE
+    get_lane_offset(int8_t lane_id, int8_t warp_id, typename T::TensorCoord const& tile_offset)
+    {
+        int quad = (lane_id >> 2);
+        int lane_in_quad = (lane_id & 3);
+        return cutlass::MatrixCoord(
+            quad + tile_offset.row() * Shape::kRow,
+            lane_in_quad * kElementsPerAccess + tile_offset.column() * Shape::kColumn);
+    }
+
+    template <typename FA, typename FB, typename FC>
+    CUTLASS_DEVICE static void iterateRows(cutlass::MatrixCoord& lane_offset,
+                                           FA beginRow,
+                                           FB op,
+                                           FC endRow)
+    {
+        // See cutlass/gemm/warp/mma_tensor_op_tile_iterator.h
+        CUTLASS_PRAGMA_UNROLL
+        for (int mma_m = 0; mma_m < Policy::MmaIterations::kRow; ++mma_m) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int row = 0; row < kAccumulatorRows; ++row) {
+                int accum_m = mma_m * InstructionShape::kM * OpDelta::kRow + row * kRowsPerTile +
+                              lane_offset.row();
+                beginRow(accum_m);
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int mma_n = 0; mma_n < Policy::MmaIterations::kColumn; ++mma_n) {
+                    int mma_accum_start = kAccumulatorRows * kElementsPerAccess *
+                                          (mma_n * Policy::MmaIterations::kRow + mma_m);
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int col = 0; col < kElementsPerAccess; ++col) {
+                        int accum_n = mma_n * InstructionShape::kN * OpDelta::kColumn + col +
+                                      lane_offset.column();
+                        int idx = mma_accum_start + row * kElementsPerAccess + col;
+                        op(accum_m, accum_n, idx);
+                    }
+                }
+
+                endRow(accum_m);
+            }
+        }
+    }
+
+    template <typename DT, typename F>
+    CUTLASS_DEVICE static bool reduceSameRow(int lane_id, DT& myValue, F fn)
+    {
+        // In each warp, 4 threads will work on the same row
+        // - the ones with the same `quad`
+        auto otherV = __shfl_xor_sync(0xffffffff, myValue, 1);
+        myValue = fn(myValue, otherV);
+        otherV = __shfl_xor_sync(0xffffffff, myValue, 2);
+        myValue = fn(myValue, otherV);
+        int lane_in_quad = (lane_id & 3);
+        return lane_in_quad == 0;
+    }
+};
+
+template <typename T, typename accum_t, int kWarpSize>
+struct AccumLambdaIteratorSm70 {
+    static_assert(cutlass::platform::is_same<typename T::Layout, cutlass::layout::RowMajor>::value,
+                  "only RowMajor is supported");
+
+    using Policy = typename T::Policy;
+    using InstructionShape = typename T::InstructionShape;
+    using OpDelta = typename T::OpDelta;
+    using Shape = typename T::Shape;
+    using Element = accum_t;
+
+    static int const kElementsPerPartial = 4;
+    using EleShapePerPatial =
+        typename cutlass::platform::conditional<cutlass::platform::is_same<Element, float>::value,
+                                                cutlass::MatrixShape<2, 2>,
+                                                cutlass::MatrixShape<1, 4>>::type;
+    static int const kElementsPerMma = 8;
+    static int const kAccumulatorPatials = 2;
+    using QuadShapePerPatialMma = cutlass::MatrixShape<4, 4>;
+
+    static cutlass::MatrixCoord CUTLASS_DEVICE
+    get_lane_offset(int8_t lane_id, int8_t warp_id, typename T::TensorCoord const& tile_offset)
+    {
+        int quad = (lane_id >> 2);
+        int lane_in_quad = (lane_id & 3);
+        int accum_m, accum_n;
+
+        if (cutlass::platform::is_same<Element, float>::value) {
+            // (quad[2],quad[0])+lane_in_quad[0]
+            accum_m = (((quad & 0x4) >> 1) + (quad & 0x1)) * 8 + (lane_in_quad & 1);
+            // (quad[1])+lane_in_quad[1]
+            accum_n = ((quad >> 1) & 0x1) * kElementsPerPartial * kAccumulatorPatials +
+                      (lane_in_quad & 2);
+        } else {
+            accum_m = (((quad & 0x4) >> 1) + (quad & 0x1)) * 8 + lane_in_quad;  // (quad[2],quad[0])
+            accum_n = ((quad >> 1) & 0x1) * kElementsPerPartial * kAccumulatorPatials;
+        }
+        return cutlass::MatrixCoord(accum_m + tile_offset.row() * Shape::kRow,
+                                    accum_n + tile_offset.column() * Shape::kColumn);
+    }
+
+    template <typename DT, typename F>
+    CUTLASS_DEVICE static bool reduceSameRow(int lane_id, DT& myValue, F fn)
+    {
+        static_assert(cutlass::platform::is_same<Element, float>::value,
+                      "update to support non-float accum");
+        // https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#warp-level-matrix-fragment-mma-884-f16
+        // T0 & T2 share same line within a quad
+        auto otherV = __shfl_xor_sync(0xffffffff, myValue, 1 << 1);
+        myValue = fn(myValue, otherV);
+        // quad 0 and quad 2 are on the same lines
+        otherV = __shfl_xor_sync(0xffffffff, myValue, 1 << 3);
+        myValue = fn(myValue, otherV);
+        return (lane_id & ((1 << 1) | (1 << 3))) == 0;
+    }
+
+    template <typename FA, typename FB, typename FC>
+    CUTLASS_DEVICE static void iterateRows(cutlass::MatrixCoord& lane_offset,
+                                           FA beginRow,
+                                           FB op,
+                                           FC endRow)
+    {
+        CUTLASS_PRAGMA_UNROLL
+        for (int tile_m = 0; tile_m < Policy::TileIterations::kRow; ++tile_m) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int mma_m = 0; mma_m < Policy::MmaIterations::kRow; ++mma_m) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int m = 0; m < EleShapePerPatial::kRow; ++m) {
+                    int accum_m = tile_m * Policy::InterleavedTile::kRow +
+                                  mma_m * QuadShapePerPatialMma::kRow + m * 2 + lane_offset.row();
+                    beginRow(accum_m);
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int tile_n = 0; tile_n < Policy::TileIterations::kColumn; ++tile_n) {
+                        CUTLASS_PRAGMA_UNROLL
+                        for (int mma_n = 0; mma_n < Policy::MmaIterations::kColumn; ++mma_n) {
+                            CUTLASS_PRAGMA_UNROLL
+                            for (int p = 0; p < kAccumulatorPatials; ++p) {
+                                CUTLASS_PRAGMA_UNROLL
+                                for (int n = 0; n < EleShapePerPatial::kColumn; ++n) {
+                                    int mma_accum_start =
+                                        (((tile_n * Policy::TileIterations::kRow + tile_m) *
+                                              Policy::MmaIterations::kColumn +
+                                          mma_n) *
+                                             Policy::MmaIterations::kRow +
+                                         mma_m) *
+                                        kElementsPerMma;
+                                    int accum_n = tile_n * Policy::InterleavedTile::kColumn +
+                                                  mma_n * QuadShapePerPatialMma::kColumn +
+                                                  p * Policy::InterleavedTile::kColumn / 2 + n +
+                                                  lane_offset.column();
+                                    int idx = mma_accum_start + p * kElementsPerPartial +
+                                              m * EleShapePerPatial::kColumn + n;
+                                    op(accum_m, accum_n, idx);
+                                }
+                            }
+                        }
+                    }
+                    endRow(accum_m);
+                }
+            }
+        }
+    }
+};
+
+template <typename T, typename accum_t, int kWarpSize>
+struct AccumLambdaIteratorSimt {
+    using Policy = typename T::Policy;
+    using Iterations = typename T::Iterations;
+    using Element = typename T::Element;
+    using Delta = typename T::Delta;
+    using Shape = typename T::Shape;
+    static_assert(cutlass::platform::is_same<typename T::Layout, cutlass::layout::RowMajor>::value,
+                  "only RowMajor is supported");
+
+    template <typename DT, typename F>
+    CUTLASS_DEVICE static bool reduceSameRow(int lane_id, DT& myValue, F fn)
+    {
+        CUTLASS_PRAGMA_UNROLL
+        for (int bit = 1; bit < Policy::WarpShape::kColumn; bit *= 2) {
+            auto otherV = __shfl_xor_sync(0xffffffff, myValue, bit);
+            myValue = fn(myValue, otherV);
+        }
+        return (lane_id & (Policy::WarpShape::kColumn - 1)) == 0;
+    }
+
+    template <typename FA, typename FB, typename FC>
+    CUTLASS_DEVICE static void iterateRows(cutlass::MatrixCoord& lane_offset,
+                                           FA beginRow,
+                                           FB op,
+                                           FC endRow)
+    {
+        CUTLASS_PRAGMA_UNROLL
+        for (int mma_m = 0; mma_m < Iterations::kRow; ++mma_m) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int m = 0; m < Policy::LaneMmaShape::kM; ++m) {
+                int accum_m = mma_m * Delta::kRow + m + lane_offset.row();
+                beginRow(accum_m);
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int mma_n = 0; mma_n < Iterations::kColumn; ++mma_n) {
+                    int accum_n = mma_n * Policy::WarpShape::kColumn * Policy::LaneMmaShape::kN +
+                                  lane_offset.column();
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int n = 0; n < Policy::LaneMmaShape::kN; ++n) {
+                        int idx = n + Policy::LaneMmaShape::kN *
+                                          (mma_n + Iterations::kColumn *
+                                                       (m + mma_m * Policy::LaneMmaShape::kM));
+                        op(accum_m, accum_n + n, idx);
+                    }
+                }
+                endRow(accum_m);
+            }
+        }
+    }
+
+    static cutlass::MatrixCoord CUTLASS_DEVICE
+    get_lane_offset(int8_t lane_id, int8_t warp_id, typename T::TensorCoord const& tile_offset)
+    {
+        static_assert(cutlass::platform::is_same<typename Policy::LaneLayout,
+                                                 cutlass::layout::RowMajorInterleaved<1>>::value,
+                      "");
+        typename Policy::LaneLayout lane_layout = Policy::get_lane_layout();
+
+        cutlass::MatrixCoord lane_offset =
+            lane_layout.inverse(lane_id) *
+            cutlass::MatrixCoord(Policy::LaneMmaShape::kM, Policy::LaneMmaShape::kN);
+        return lane_offset + tile_offset * cutlass::MatrixCoord(Shape::kRow, Shape::kColumn);
+    }
+};
+
+template <typename T, typename accum_t, int kWarpSize>
+struct DefaultMmaAccumLambdaIterator;
+
+// Simt
+template <typename S, typename P, typename accum_t, int kWarpSize>
+struct DefaultMmaAccumLambdaIterator<
+    cutlass::gemm::warp::MmaSimtTileIterator<S,
+                                             cutlass::gemm::Operand::kC,
+                                             accum_t,
+                                             cutlass::layout::RowMajor,
+                                             P,
+                                             1,
+                                             1>,
+    accum_t,
+    kWarpSize> {
+    using WarpIterator =
+        typename cutlass::gemm::warp::MmaSimtTileIterator<S,
+                                                          cutlass::gemm::Operand::kC,
+                                                          accum_t,
+                                                          cutlass::layout::RowMajor,
+                                                          P,
+                                                          1,
+                                                          1>;
+    using Iterator = AccumLambdaIteratorSimt<WarpIterator, accum_t, kWarpSize>;
+};
+
+// TensorOp - Volta
+template <typename S1, typename S2, typename accum_t, int kWarpSize>
+struct DefaultMmaAccumLambdaIterator<
+    cutlass::gemm::warp::MmaVoltaTensorOpAccumulatorTileIterator<S1,
+                                                                 accum_t,
+                                                                 cutlass::layout::RowMajor,
+                                                                 S2,
+                                                                 cutlass::MatrixShape<1, 1>>,
+    accum_t,
+    kWarpSize> {
+    using WarpIterator = typename cutlass::gemm::warp::MmaVoltaTensorOpAccumulatorTileIterator<
+        S1,
+        accum_t,
+        cutlass::layout::RowMajor,
+        S2,
+        cutlass::MatrixShape<1, 1>>;
+    using Iterator = AccumLambdaIteratorSm70<WarpIterator, accum_t, kWarpSize>;
+};
+
+// TensorOp - Sm75+
+template <typename S1, typename S2, typename S3, typename accum_t, int kWarpSize>
+struct DefaultMmaAccumLambdaIterator<
+    cutlass::gemm::warp::
+        MmaTensorOpAccumulatorTileIterator<S1, accum_t, cutlass::layout::RowMajor, S2, S3>,
+    accum_t,
+    kWarpSize> {
+    using WarpIterator = typename cutlass::gemm::warp::
+        MmaTensorOpAccumulatorTileIterator<S1, accum_t, cutlass::layout::RowMajor, S2, S3>;
+    using Iterator = AccumLambdaIteratorSm80<WarpIterator, accum_t, kWarpSize>;
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/gemm/mma_from_smem.h

@@ -0,0 +1,1939 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+    \brief Template for a double-buffered threadblock-scoped GEMM kernel.
+*/
+
+#pragma once
+
+#include "cutlass/aligned_buffer.h"
+#include "cutlass/arch/memory.h"
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/epilogue/thread/linear_combination.h"
+#include "cutlass/epilogue/threadblock/default_epilogue_simt.h"
+#include "cutlass/epilogue/threadblock/default_epilogue_tensor_op.h"
+#include "cutlass/epilogue/threadblock/default_epilogue_volta_tensor_op.h"
+#include "cutlass/functional.h"
+#include "cutlass/gemm/gemm.h"
+#include "cutlass/gemm/warp/mma_tensor_op_fragment_iterator.h"
+#include "cutlass/matrix_shape.h"
+#include "cutlass/numeric_conversion.h"
+#include "cutlass/numeric_types.h"
+#include "cutlass/platform/platform.h"
+#include "cutlass/transform/threadblock/vector_iterator.h"
+
+#include "../epilogue/epilogue_thread_apply_logsumexp.h"
+#include "../gemm/mma_accum_lambda_iterator.h"
+#include "../gemm_kernel_utils.h"
+#include "../iterators/make_residual_last.h"
+#include "../iterators/transpose_warp_iterator.h"
+#include "../iterators/warp_iterator_from_smem.h"
+#include "cutlass/epilogue/threadblock/epilogue_smem_accumulator.h"
+#include "cutlass/gemm/threadblock/mma_base.h"
+#include "cutlass/gemm/threadblock/mma_multistage.h"
+#include "cutlass/gemm/threadblock/mma_pipelined.h"
+#include "cutlass/gemm/warp/mma_tensor_op_tile_access_iterator.h"
+
+namespace cutlass {
+namespace gemm {
+namespace threadblock {
+
+/// Shared storage object needed by accumulator
+/// From 13_two_tensor_op_fusion/threadblock/b2b_mma_base_smem_accumulator.h
+template <typename Shape_, typename Element_, typename Layout_, typename Padding_>
+class AccumulatorSharedStorage {
+public:
+    //
+    // Type definitions
+    //
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = Layout_;
+    using Padding = Padding_;
+
+    /// Tensor reference to the accumulator
+    using TensorRefAccum = cutlass::TensorRef<Element, Layout>;
+
+    /// Shape of the accumulator matrix in shared memory
+    using ShapeAccum =
+        cutlass::MatrixShape<Shape::kM + Padding::kRow, Shape::kN + Padding::kColumn>;
+
+public:
+    //
+    // Data members
+    //
+
+    /// Buffer for accumulator
+    cutlass::AlignedBuffer<Element, ShapeAccum::kCount> accum;
+
+public:
+    //
+    // Methods
+    //
+
+    /// Returns a layout object for the Accum matrix
+    CUTLASS_DEVICE
+    static Layout LayoutAccum() { return Layout::packed({ShapeAccum::kRow, ShapeAccum::kColumn}); }
+
+    /// Returns a TensorRef to the Accumulator
+    CUTLASS_HOST_DEVICE
+    TensorRefAccum accum_ref() { return TensorRefAccum{accum.data(), LayoutAccum()}; }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+// Taken from
+// https://github.com/NVIDIA/cutlass/blob/master/examples/13_two_tensor_op_fusion/threadblock/b2b_mma_base_smem_accumulator.h
+////////////////////////////////////////////////////////////////////////////////
+
+/// Structure to compute the matrix product targeting CUDA cores and SIMT math
+/// instructions.
+template <
+    /// Size of the Gemm problem - concept: gemm::GemmShape<>
+    typename Shape_,
+    // Maximum value for K
+    int kMaxK,
+    /// Policy describing tuning details (concept: MmaPolicy)
+    typename Policy_,
+    /// Number of stages,
+    int Stages,
+    /// Used for partial specialization
+    typename Enable = bool>
+class MmaBaseFromSharedMemory {
+public:
+    ///< Size of the Gemm problem - concept: gemm::GemmShape<>
+    using Shape = Shape_;
+
+    ///< Policy describing tuning details
+    using Policy = Policy_;
+
+    //
+    // Dependent types
+    //
+
+    /// Warp-level Mma
+    using Operator = typename Policy::Operator;
+
+    /// Shape describing the overall GEMM computed from shared memory
+    /// by each warp.
+    using WarpGemm = typename Policy::Operator::Shape;
+
+    /// Shape describing the number of warps filling the CTA
+    using WarpCount =
+        GemmShape<Shape::kM / WarpGemm::kM, Shape::kN / WarpGemm::kN, Shape::kK / WarpGemm::kK>;
+    using WarpCount1 = WarpCount;
+
+    /// Number of warp-level GEMM oeprations
+    static int const kWarpGemmIterations = (WarpGemm::kK / Operator::Policy::MmaShape::kK);
+    static int const kWarpGemmIterations1 = kWarpGemmIterations;
+
+    /// Number of stages
+    static int const kStages = Stages;
+
+    /// If this is true, we fill the entire shmem buffer at start
+    /// and don't need to iterate through it in a circular fashion
+    static bool const kSmemContainsEntireB = kMaxK <= Shape::kK * kStages;
+
+    /// Tensor reference to the A operand
+    using TensorRefA = TensorRef<typename Operator::ElementA, typename Operator::LayoutA>;
+
+    /// Tensor reference to the B operand
+    using TensorRefB = TensorRef<typename Operator::ElementB, typename Operator::LayoutB>;
+
+    //
+    // Nested structs
+    //
+
+    /// Shared storage object needed by threadblock-scoped GEMM
+    class SharedStorage {
+    public:
+        //
+        // Type definitions
+        //
+
+        /// Shape of the B matrix operand in shared memory
+        using ShapeB = MatrixShape<Shape::kK * kStages + Policy::SmemPaddingB::kRow,
+                                   Shape::kN + Policy::SmemPaddingB::kColumn>;
+
+    public:
+        //
+        // Data members
+        //
+
+        /// Buffer for B operand
+        AlignedBuffer<typename Operator::ElementB, ShapeB::kCount> operand_B;
+
+    public:
+        //
+        // Methods
+        //
+
+        /// Returns a layout object for the B matrix
+        CUTLASS_HOST_DEVICE
+        static typename Operator::LayoutB LayoutB()
+        {
+            return Operator::LayoutB::packed({ShapeB::kRow, ShapeB::kColumn});
+        }
+
+        /// Returns a TensorRef to the B operand
+        CUTLASS_HOST_DEVICE
+        TensorRefB operand_B_ref() { return TensorRefB{operand_B.data(), LayoutB()}; }
+    };
+
+protected:
+    //
+    // Data members
+    //
+
+    // /// Iterator to load a warp-scoped tile of A operand from shared memory
+    // typename Operator::IteratorA warp_tile_iterator_A_;
+
+    /// Iterator to load a warp-scoped tile of B operand from shared memory
+    typename Operator::IteratorB warp_tile_iterator_B_;
+
+public:
+    /// Construct from tensor references
+    CUTLASS_DEVICE
+    MmaBaseFromSharedMemory(
+        ///< Shared storage needed for internal use by threadblock-scoped GEMM
+        SharedStorage& shared_storage,
+        ///< ID within the threadblock
+        int thread_idx,
+        ///< ID of warp
+        int warp_idx,
+        ///< ID of each thread within a warp
+        int lane_idx)
+        : warp_tile_iterator_B_(shared_storage.operand_B_ref(), lane_idx)
+    {
+    }
+};
+
+namespace {
+
+// has necessary trait compliance with WarpIteratorFromSmem but doesn't do
+// anything, can be default initialized, and uses fragment that takes up
+// (almost) no space. this warp iterator is selected at compile time when
+// elementwise on-the-fly scaling for operand A is disabled, in which case
+// operations related to loading scale factors for operand A get wiped out by
+// the compiler.
+template <typename TensorRef>
+class NoOpWarpIteratorScale {
+public:
+    // in pipelined+multistage MMA implementations we keep an array of fragments.
+    // if we aren't using scaling we don't want to waste registers on fragments
+    // of scale elements, so ideally this would be sized 0.
+    // Since arrays of zero-sized objects are not allowed, using size as 1.
+    // The compiler will most likely wipe it out anyways.
+    using Fragment = cutlass::Array<char, 1>;
+
+    CUTLASS_HOST_DEVICE
+    NoOpWarpIteratorScale() {}
+
+    CUTLASS_HOST_DEVICE
+    NoOpWarpIteratorScale(TensorRef const&, int) {}
+
+    CUTLASS_HOST_DEVICE
+    NoOpWarpIteratorScale& add_tile_offset(typename TensorRef::TensorCoord const&) { return *this; }
+
+    CUTLASS_HOST_DEVICE
+    NoOpWarpIteratorScale& operator++() { return *this; }
+
+    CUTLASS_DEVICE
+    void load(Fragment&) const {}
+};
+
+// if scaling is enabled, performs fragment elementwise multiplication between
+// fragment and its scaling factor.
+template <typename Fragment, typename FragmentScale, bool ScalingEnabled>
+class FragmentElementwiseScaler;
+
+// specialization for scaling being enabled.
+template <typename Fragment, typename FragmentScale>
+class FragmentElementwiseScaler<Fragment, FragmentScale, true> {
+public:
+    // cast scale_frag to correct type then apply elementwise to fragment
+    CUTLASS_DEVICE
+    static Fragment apply(Fragment frag, FragmentScale const& scale_frag)
+    {
+        Fragment converted_scale_frag =
+            cutlass::NumericArrayConverter<typename Fragment::Element,
+                                           typename FragmentScale::Element,
+                                           FragmentScale::kElements>()(scale_frag);
+        return cutlass::multiplies<Fragment>()(frag, converted_scale_frag);
+    }
+};
+
+// specialization for scaling being disabled. doesn't do anything and should
+// just get wiped out by the compiler.
+template <typename Fragment, typename FragmentScale>
+class FragmentElementwiseScaler<Fragment, FragmentScale, false> {
+public:
+    CUTLASS_DEVICE
+    static Fragment apply(Fragment frag, FragmentScale const&) { return frag; }
+};
+}  // namespace
+
+////////////////////////////////////////////////////////////////////////////////
+// Taken from
+// https://github.com/NVIDIA/cutlass/blob/master/examples/13_two_tensor_op_fusion/threadblock/b2b_mma_pipelined_smem_accumulator.h
+////////////////////////////////////////////////////////////////////////////////
+
+/// Structure to compute the matrix product targeting CUDA cores and SIMT math
+/// instructions.
+template <
+    /// Size of the Gemm problem - concept: gemm::GemmShape<>
+    typename Shape_,
+    // BEGIN smem
+    /// Iterates over the intermediate accumulator tile in shared memory
+    typename WarpIteratorA,
+    /// whether or not to perform elementwise multiplication of A
+    //  by another matrix (A_scale) that is also kept in shared memory prior
+    //  to matmul A @ B
+    bool ScaleOperandA_,
+    // Accumulator type
+    typename AccumulatorSharedStorage,
+    // END smem
+    /// Iterates over tiles of B operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorB_,
+    /// Iterates over tiles of B operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorB_,
+    /// Data type of accumulator matrix
+    typename ElementC_,
+    /// Data type of accumulator matrix
+    typename LayoutC_,
+    /// Policy describing tuning details (concept: MmaPolicy)
+    typename Policy_,
+    /// Transformation applied to B operand
+    typename TransformB_ = NumericArrayConverter<typename SmemIteratorB_::Element,
+                                                 typename IteratorB_::Element,
+                                                 IteratorB_::Fragment::kElements>,
+    /// Used for partial specialization
+    typename Enable = bool>
+class MmaPipelinedFromSharedMemory
+    : public MmaBaseFromSharedMemory<Shape_, AccumulatorSharedStorage::Shape::kN, Policy_, 2> {
+public:
+    ///< Base class
+    using Base = MmaBaseFromSharedMemory<Shape_, AccumulatorSharedStorage::Shape::kN, Policy_, 2>;
+
+    using Shape = Shape_;  ///< Size of the Gemm problem - concept: gemm::GemmShape<>
+    static constexpr bool ScaleOperandA = ScaleOperandA_;
+
+    ///< loads fragments of A_scale from shared memory if operand A scaling is
+    ///< enabled. otherwise no-op.
+    using WarpIteratorAScale = typename cutlass::platform::conditional<
+        ScaleOperandA,
+        WarpIteratorA,
+        NoOpWarpIteratorScale<typename WarpIteratorA::TensorRef>>::type;
+
+    using IteratorB = IteratorB_;  ///< Iterates over tiles of B operand in global memory
+    using ElementC = ElementC_;    ///< Data type of accumulator matrix
+    using LayoutC = LayoutC_;      ///< Layout of accumulator matrix
+    using Policy = Policy_;        ///< Policy describing tuning details
+
+    using SmemIteratorB = SmemIteratorB_;
+
+    using TransformB = TransformB_;
+
+    //
+    // Dependent types
+    //
+
+    /// Fragment of operand B loaded from global memory
+    using FragmentB = typename IteratorB::Fragment;
+
+    /// Fragment of accumulator tile
+    using FragmentC = typename Policy::Operator::FragmentC;
+
+    /// Warp-level Mma
+    using Operator = typename Policy::Operator;
+
+    /// Obtain the arch tag from the warp-level operator
+    using ArchTag = typename Policy::Operator::ArchTag;
+
+    /// Complex transform on B operand
+    static ComplexTransform const kTransformB = Operator::kTransformB;
+
+    // staticaly assert kStages for MmaPipelined is two (Double-buffered pipeline)
+    static_assert((Base::kStages == 2), "MmaPipelined requires kStages set to value 2");
+
+private:
+    using WarpFragmentA = typename Operator::FragmentA;
+
+    /// fragment type of OperandA elementwise scaling matrix. (almost) empty
+    /// if operand A scaling is disabled.
+    using WarpFragmentAScale = typename WarpIteratorAScale::Fragment;
+
+    using WarpFragmentB = typename Operator::FragmentB;
+
+    /// applies scaling factor to operand A fragment if operand A scaling is
+    /// enabled. otherwise no-op.
+    using FragmentAScaler =
+        FragmentElementwiseScaler<WarpFragmentA, WarpFragmentAScale, ScaleOperandA>;
+
+protected:
+    // /// Iterator to write threadblock-scoped tile of A operand to shared memory
+    // SmemIteratorA smem_iterator_A_;
+
+    /// Iterator to write threadblock-scoped tile of B operand to shared memory
+    SmemIteratorB smem_iterator_B_;
+
+    /// Iterator to load a warp-scoped tile of A operand from intermediate
+    /// accumulator tile
+    WarpIteratorA warp_tile_iterator_A_;
+
+    /// Iterator to load a warp-scoped tile of A_scale from intermediate
+    /// accumulator tile (only used if ScaleOperandA_ is true)
+    WarpIteratorAScale warp_tile_iterator_A_scale_;
+
+public:
+    /// constructor for MMA with operand A scaling enabled.
+    CUTLASS_DEVICE
+    MmaPipelinedFromSharedMemory(
+        // shared storage needed for internal use by threadblock-scoped GEMM
+        typename Base::SharedStorage& shared_storage,
+        // warp iterator over A tile held in shared memory
+        WarpIteratorA warp_iter_a,
+        // warp iterator over A_scale tile held in shared memory
+        WarpIteratorAScale warp_iter_a_scale,
+        int thread_idx,
+        int warp_idx,
+        int lane_idx)
+        : Base(shared_storage, thread_idx, warp_idx, lane_idx),
+          warp_tile_iterator_A_(warp_iter_a),
+          warp_tile_iterator_A_scale_(warp_iter_a_scale),
+          smem_iterator_B_(shared_storage.operand_B_ref(), thread_idx)
+    {
+        // Compute warp location within threadblock tile by mapping the warp_id to
+        // three coordinates:
+        //   _m: the warp's position within the threadblock along the M dimension
+        //   _n: the warp's position within the threadblock along the N dimension
+        //   _k: the warp's position within the threadblock along the K dimension
+        int warp_idx_mn = warp_idx % (Base::WarpCount::kM * Base::WarpCount::kN);
+        int warp_idx_k = warp_idx / (Base::WarpCount::kM * Base::WarpCount::kN);
+        int warp_idx_m = warp_idx_mn % Base::WarpCount::kM;
+        int warp_idx_n = warp_idx_mn / Base::WarpCount::kM;
+
+        // Add per-warp offsets in units of warp-level tiles
+        this->warp_tile_iterator_A_.add_tile_offset(
+            {warp_idx_m, Base::kWarpGemmIterations * warp_idx_k});
+        this->warp_tile_iterator_A_scale_.add_tile_offset(
+            {warp_idx_m, Base::kWarpGemmIterations * warp_idx_k});
+        this->warp_tile_iterator_B_.add_tile_offset(
+            {Base::kWarpGemmIterations * warp_idx_k, warp_idx_n});
+    }
+
+    /// Construct from tensor references
+    CUTLASS_DEVICE
+    MmaPipelinedFromSharedMemory(
+        typename Base::SharedStorage& shared_storage,  ///< Shared storage needed for internal use
+                                                       ///< by threadblock-scoped GEMM
+        AccumulatorSharedStorage& accumulator_shared_storage,
+        int thread_idx,  ///< ID within the threadblock
+        int warp_idx,    ///< ID of warp
+        int lane_idx,    ///< ID of each thread within a warp
+        int problem_size_0_n)
+        : Base(shared_storage, thread_idx, warp_idx, lane_idx),
+          warp_tile_iterator_A_(accumulator_shared_storage.accum_ref(), lane_idx),
+          smem_iterator_B_(shared_storage.operand_B_ref(), thread_idx)
+    {
+        // Compute warp location within threadblock tile by mapping the warp_id to
+        // three coordinates:
+        //   _m: the warp's position within the threadblock along the M dimension
+        //   _n: the warp's position within the threadblock along the N dimension
+        //   _k: the warp's position within the threadblock along the K dimension
+
+        int warp_idx_mn = warp_idx % (Base::WarpCount::kM * Base::WarpCount::kN);
+        int warp_idx_k = warp_idx / (Base::WarpCount::kM * Base::WarpCount::kN);
+
+        int warp_idx_m = warp_idx_mn % Base::WarpCount::kM;
+        int warp_idx_n = warp_idx_mn / Base::WarpCount::kM;
+
+        // Add per-warp offsets in units of warp-level tiles
+        this->warp_tile_iterator_A_.add_tile_offset(
+            {warp_idx_m, Base::kWarpGemmIterations * warp_idx_k});
+        this->warp_tile_iterator_B_.add_tile_offset(
+            {Base::kWarpGemmIterations * warp_idx_k, warp_idx_n});
+    }
+
+    // For API compatibility with MmaMultistageFromSharedMemory
+    // but not supported as it worsens perf: older gpus < sm80 don't
+    // support async transfers and have to waste registers
+    CUTLASS_DEVICE
+    void set_prologue_done(bool value) {}
+    CUTLASS_DEVICE
+    static void prologue(typename Base::SharedStorage& shared_storage,
+                         IteratorB iterator_B1,
+                         int thread_idx,
+                         int problem_size_0_n)
+    {
+    }
+
+    CUTLASS_DEVICE
+    static void drain_cp_asyncs() {}
+
+    /// Perform a threadblock-scoped matrix multiply-accumulate
+    CUTLASS_DEVICE
+    void operator()(int gemm_k_iterations,  ///< number of iterations of the mainloop
+                    FragmentC& accum,       ///< destination accumulator tile
+                    // IteratorA iterator_A,                             ///< iterator over A
+                    // operand in global memory
+                    IteratorB iterator_B,        ///< iterator over B operand in global memory
+                    FragmentC const& src_accum,  ///< source accumulator tile
+                    // TransformA transform_A = TransformA(),            ///< transformation
+                    // applied to A fragment
+                    TransformB transform_B = TransformB())
+    {  ///< transformation applied to B fragment
+
+        //
+        // Prologue
+        //
+
+        // Perform accumulation in the 'd' output operand
+        accum = src_accum;
+
+        FragmentB tb_frag_B;
+
+        tb_frag_B.clear();
+
+        // The last kblock is loaded in the prolog
+        iterator_B.set_residual_tile(gemm_k_iterations == 1);
+        iterator_B.load(tb_frag_B);
+
+        ++iterator_B;
+
+        this->smem_iterator_B_.store(transform_B(tb_frag_B));
+
+        ++this->smem_iterator_B_;
+
+        __syncthreads();
+
+        // remember that WarpFragmentAScale and WarpIteratorAScale are empty/no-op
+        // if scaling is disabled.
+
+        // Pair of fragments used to overlap shared memory loads and math
+        // instructions
+        WarpFragmentA warp_frag_A[2];
+        WarpFragmentAScale warp_frag_A_scale[2];
+        WarpFragmentB warp_frag_B[2];
+        warp_frag_A[0].clear();
+        warp_frag_A_scale[0].clear();
+        warp_frag_B[0].clear();
+
+        this->warp_tile_iterator_B_.set_kgroup_index(0);
+
+        this->warp_tile_iterator_A_.load(warp_frag_A[0]);
+        this->warp_tile_iterator_A_scale_.load(warp_frag_A_scale[0]);
+        this->warp_tile_iterator_B_.load(warp_frag_B[0]);
+
+        ++this->warp_tile_iterator_A_;
+        ++this->warp_tile_iterator_A_scale_;
+        ++this->warp_tile_iterator_B_;
+
+        Operator warp_mma;
+
+        int smem_write_stage_idx = 1;
+
+        // Avoid reading out of bounds
+        iterator_B.set_residual_tile(gemm_k_iterations == 2);
+        iterator_B.clear_mask(gemm_k_iterations <= 1);
+
+        // Issue loads during the first warp-level matrix multiply-add *AFTER*
+        // issuing shared memory loads (which have the tightest latency requirement).
+
+        //
+        // Mainloop
+        //
+
+        // Note: The main loop does not support Base::kWarpGemmIterations == 2.
+        CUTLASS_GEMM_LOOP
+        for (; gemm_k_iterations > 0; --gemm_k_iterations) {
+            //
+            // Loop over GEMM K dimension
+            //
+
+            CUTLASS_PRAGMA_UNROLL
+            for (int warp_mma_k = 0; warp_mma_k < Base::kWarpGemmIterations; ++warp_mma_k) {
+                // Load warp-level tiles from shared memory, wrapping to k offset if
+                // this is the last group as the case may be.
+                bool hasNext = true;
+
+                if (warp_mma_k == Base::kWarpGemmIterations - 1) {
+                    // Write fragments to shared memory
+                    this->smem_iterator_B_.store(transform_B(tb_frag_B));
+
+                    __syncthreads();
+
+                    ++this->smem_iterator_B_;
+
+                    // Add negative offsets to return iterators to the 'start' of the
+                    // circular buffer in shared memory SMEM: Don't reset iterator A, as
+                    // we are continuing our iteration at this point
+                    if (smem_write_stage_idx == 1) {
+                        this->smem_iterator_B_.add_tile_offset({-Base::kStages, 0});
+                    } else {
+                        this->warp_tile_iterator_B_.add_tile_offset(
+                            {-Base::kStages * Policy::kPartitionsK * Base::kWarpGemmIterations, 0});
+                    }
+
+                    smem_write_stage_idx ^= 1;
+                    hasNext = gemm_k_iterations > 1;
+                }
+
+                // Only read the next if we need to
+                if (hasNext) {
+                    this->warp_tile_iterator_B_.set_kgroup_index((warp_mma_k + 1) %
+                                                                 Base::kWarpGemmIterations);
+
+                    this->warp_tile_iterator_A_.load(warp_frag_A[(warp_mma_k + 1) % 2]);
+                    this->warp_tile_iterator_A_scale_.load(warp_frag_A_scale[(warp_mma_k + 1) % 2]);
+                    this->warp_tile_iterator_B_.load(warp_frag_B[(warp_mma_k + 1) % 2]);
+
+                    ++this->warp_tile_iterator_A_;
+                    ++this->warp_tile_iterator_A_scale_;
+                    ++this->warp_tile_iterator_B_;
+
+                    if (warp_mma_k == 0) {
+                        iterator_B.load(tb_frag_B);
+
+                        ++iterator_B;
+
+                        // Avoid reading out of bounds if this was the last loop iteration
+                        iterator_B.set_residual_tile(gemm_k_iterations == 3);
+                        iterator_B.clear_mask(gemm_k_iterations <= 2);
+                    }
+                }
+
+                warp_mma(accum,
+                         FragmentAScaler::apply(warp_frag_A[warp_mma_k % 2],
+                                                warp_frag_A_scale[warp_mma_k % 2]),
+                         warp_frag_B[warp_mma_k % 2],
+                         accum);
+            }
+        }
+    }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+// Taken from
+// https://github.com/NVIDIA/cutlass/blob/master/examples/13_two_tensor_op_fusion/threadblock/b2b_mma_multistage_smem_accumulator.h
+////////////////////////////////////////////////////////////////////////////////
+
+/// Structure to compute the matrix product targeting CUDA cores and SIMT math
+/// instructions.
+template <
+    /// Size of the Gemm problem - concept: gemm::GemmShape<>
+    typename Shape1_,
+    /// Iterates over the intermediate accumulator tile in shared memory
+    typename WarpIteratorA1_,
+    /// whether or not to perform elementwise multiplication of A
+    //  by another matrix (A_scale) that is also kept in shared memory prior
+    //  to matmul A @ B
+    bool ScaleOperandA_,
+    // Accumulator type
+    typename AccumulatorSharedStorage,
+    /// Iterates over tiles of B operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorB1_,
+    /// Iterates over tiles of B operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorB1_,
+    /// Cache operation for operand B
+    cutlass::arch::CacheOperation::Kind CacheOpB1,
+    /// Data type of accumulator matrix
+    typename ElementC_,
+    /// Data type of accumulator matrix
+    typename LayoutC_,
+    /// Policy describing tuning details (concept: MmaPolicy)
+    typename Policy1_,
+    /// Number of stages,
+    int Stages_,
+    int kMaxK_,
+    /// Used for partial specialization
+    typename Enable = bool>
+class MmaMultistageFromSharedMemory
+    : public MmaBaseFromSharedMemory<Shape1_, kMaxK_, Policy1_, Stages_> {
+public:
+    ///< Base class
+    using Base = MmaBaseFromSharedMemory<Shape1_, kMaxK_, Policy1_, Stages_>;
+
+    ///< Size of the Gemm problem - concept: gemm::GemmShape<>
+    using Shape1 = Shape1_;
+    ///< Iterates over tiles of B operand in global memory
+    using IteratorB1 = IteratorB1_;
+    using IteratorB = IteratorB1;
+    ///< Policy describing tuning details
+    using Policy1 = Policy1_;
+
+    using SmemIteratorB1 = SmemIteratorB1_;
+    using WarpIteratorA1 = WarpIteratorA1_;  ///< Iterates over the intermediate
+                                             ///< accumulator tile in shared memory
+    static constexpr bool ScaleOperandA = ScaleOperandA_;
+
+    ///< warp level iterator over A_scale matrix tile kept in shared memory.
+    ///< if elementwise A scaling is disabled then everything this does is no-op.
+    using WarpIteratorAScale = typename cutlass::platform::conditional<
+        ScaleOperandA,
+        WarpIteratorA1,
+        NoOpWarpIteratorScale<typename WarpIteratorA1::TensorRef>>::type;
+    ///< Data type of accumulator matrix
+    using ElementC = ElementC_;
+    ///< Layout of accumulator matrix
+    using LayoutC = LayoutC_;
+
+    static cutlass::arch::CacheOperation::Kind const kCacheOpB1 = CacheOpB1;
+    static constexpr bool kSmemContainsEntireB = Base::kSmemContainsEntireB;
+
+    //
+    // Dependent types
+    //
+
+    /// Fragment of accumulator tile
+    using FragmentC1 = typename Policy1::Operator::FragmentC;
+    using FragmentC = FragmentC1;
+
+    /// Warp-level Mma
+    using Operator1 = typename Policy1::Operator;
+
+    /// Minimum architecture is Sm80 to support cp.async
+    using ArchTag = arch::Sm80;
+
+    /// Complex transform on B operand
+    static ComplexTransform const kTransformB1 = Operator1::kTransformB;
+
+    /// Internal structure exposed for introspection.
+    struct Detail {
+        static_assert(Base::kWarpGemmIterations1 > 1,
+                      "The pipelined structure requires at least two warp-level "
+                      "GEMM operations.");
+
+        /// Number of cp.async instructions to load one stage of operand B
+        static int const TBLoadIterationsB1 = IteratorB1::ThreadMap::Iterations::kCount;
+
+        /// Number of cp.async instructions to load on group of operand B
+        static int const kAccessesPerGroupB1 =
+            (TBLoadIterationsB1 + Base::kWarpGemmIterations1 - 1) / Base::kWarpGemmIterations1;
+    };
+
+    static constexpr int kNumStagesConcurrentLoad = kSmemContainsEntireB ? Base::kStages
+                                                                         : Base::kStages - 1;
+
+private:
+    using WarpLoadedFragmentA1 = typename Operator1::FragmentA;
+    /// fragment of OperandA scale matrix. if operand A scaling is disabled this
+    /// is (almost) empty.
+    using WarpLoadedFragmentA1Scale = typename WarpIteratorAScale::Fragment;
+    using WarpLoadedFragmentB1 = typename Operator1::FragmentB;
+    using WarpTransformedFragmentA1 = typename Operator1::TransformedFragmentA;
+    using WarpTransformedFragmentB1 = typename Operator1::TransformedFragmentB;
+
+    /// applies elementwise scaling to fragment of A. if operand A scaling is
+    /// disabled this is a no-op.
+    using FragmentAScaler =
+        FragmentElementwiseScaler<WarpLoadedFragmentA1, WarpLoadedFragmentA1Scale, ScaleOperandA>;
+
+private:
+    //
+    // Data members
+    //
+
+    /// Iterator to load a warp-scoped tile of A1 operand from intermediate
+    /// accumulator tile
+    WarpIteratorA1 warp_tile_iterator_A1_;
+
+    /// Iterator to load a warp-scoped tile of A1_scale operand from shared memory
+    /// if operand A scaling is disabled everything this does is a no-op.
+    WarpIteratorAScale warp_tile_iterator_A1_scale_;
+
+    /// Iterator to write threadblock-scoped tile of B operand to shared memory
+    SmemIteratorB1 smem_iterator_B1_;
+
+    bool prologue_done_;
+
+public:
+    /// constructor for MMA with operand A scaling enabled.
+    CUTLASS_DEVICE
+    MmaMultistageFromSharedMemory(
+        // shared storage needed for internal use by threadblock-scoped GEMM
+        typename Base::SharedStorage& shared_storage,
+        // warp level iterator over operand A tile kept in shared memory
+        WarpIteratorA1 warp_tile_iterator_A1,
+        // warp level iterator over operand A elementwise scale tile kept in
+        // shared memory.
+        WarpIteratorAScale warp_tile_iterator_A1_scale,
+        int thread_idx,
+        int warp_idx,
+        int lane_idx)
+        : Base(shared_storage, thread_idx, warp_idx, lane_idx),
+          warp_tile_iterator_A1_(warp_tile_iterator_A1),
+          warp_tile_iterator_A1_scale_(warp_tile_iterator_A1_scale),
+          smem_iterator_B1_(shared_storage.operand_B_ref(), thread_idx),
+          prologue_done_(false)
+    {
+        // Compute warp location within threadblock tile by mapping the warp_id to
+        // three coordinates:
+        //   _m: the warp's position within the threadblock along the M dimension
+        //   _n: the warp's position within the threadblock along the N dimension
+        //   _k: the warp's position within the threadblock along the K dimension
+        int warp_idx_mn_1 = warp_idx % (Base::WarpCount1::kM * Base::WarpCount1::kN);
+        int warp_idx_k_1 = warp_idx / (Base::WarpCount1::kM * Base::WarpCount1::kN);
+        int warp_idx_m_1 = warp_idx_mn_1 % Base::WarpCount1::kM;
+        int warp_idx_n_1 = warp_idx_mn_1 / Base::WarpCount1::kM;
+
+        // Add per-warp offsets in units of warp-level tiles
+        warp_tile_iterator_A1_.add_tile_offset(
+            {warp_idx_m_1, Base::kWarpGemmIterations1 * warp_idx_k_1});
+        warp_tile_iterator_A1_scale_.add_tile_offset(
+            {warp_idx_m_1, Base::kWarpGemmIterations1 * warp_idx_k_1});
+        this->warp_tile_iterator_B_.add_tile_offset(
+            {Base::kWarpGemmIterations1 * warp_idx_k_1, warp_idx_n_1});
+    }
+
+    /// Construct from tensor references
+    CUTLASS_DEVICE
+    MmaMultistageFromSharedMemory(
+        typename Base::SharedStorage& shared_storage,  ///< Shared storage needed for internal use
+                                                       ///< by threadblock-scoped GEMM
+        AccumulatorSharedStorage& accumulator_shared_storage,
+        ///< ID within the threadblock
+        int thread_idx,
+        ///< ID of warp
+        int warp_idx,
+        ///< ID of each thread within a warp
+        int lane_idx,
+        ///< GEMM0 N is used for accumulator extent
+        int problem_size_0_n)
+        : Base(shared_storage, thread_idx, warp_idx, lane_idx),
+          warp_tile_iterator_A1_(accumulator_shared_storage.accum_ref(), lane_idx),
+          smem_iterator_B1_(shared_storage.operand_B_ref(), thread_idx),
+          prologue_done_(false)
+    {
+        // Compute warp location within threadblock tile by mapping the warp_id to
+        // three coordinates:
+        //   _m: the warp's position within the threadblock along the M dimension
+        //   _n: the warp's position within the threadblock along the N dimension
+        //   _k: the warp's position within the threadblock along the K dimension
+
+        int warp_idx_mn_1 = warp_idx % (Base::WarpCount1::kM * Base::WarpCount1::kN);
+        int warp_idx_k_1 = warp_idx / (Base::WarpCount1::kM * Base::WarpCount1::kN);
+
+        int warp_idx_m_1 = warp_idx_mn_1 % Base::WarpCount1::kM;
+        int warp_idx_n_1 = warp_idx_mn_1 / Base::WarpCount1::kM;
+
+        // Add per-warp offsets in units of warp-level tiles
+        warp_tile_iterator_A1_.add_tile_offset(
+            {warp_idx_m_1, Base::kWarpGemmIterations1 * warp_idx_k_1});
+        this->warp_tile_iterator_B_.add_tile_offset(
+            {Base::kWarpGemmIterations1 * warp_idx_k_1, warp_idx_n_1});
+    }
+
+    CUTLASS_DEVICE
+    void set_prologue_done(bool value) { prologue_done_ = value; }
+
+    CUTLASS_DEVICE
+    static void prologue(typename Base::SharedStorage& shared_storage,
+                         IteratorB iterator_B1,
+                         int thread_idx,
+                         int problem_size_0_n)
+    {
+        SmemIteratorB1 smem_iterator_B1(shared_storage.operand_B_ref(), thread_idx);
+        _prologue(iterator_B1,
+                  (problem_size_0_n + Base::Shape::kK - 1) / Base::Shape::kK,
+                  smem_iterator_B1);
+    }
+
+    CUTLASS_DEVICE
+    static void drain_cp_asyncs()
+    {
+        // commit and drain all pending and predicated cp.async pnz from the GEMM
+        // mainloop
+        cutlass::arch::cp_async_fence();
+        cutlass::arch::cp_async_wait<0>();
+        __syncthreads();
+    }
+
+    CUTLASS_DEVICE
+    void copy_tiles_and_advance_1(IteratorB1& iterator_B1, int group_start_B1 = 0)
+    {
+        iterator_B1.set_iteration_index(group_start_B1 * IteratorB1::kAccessesPerVector);
+        this->smem_iterator_B1_.set_iteration_index(group_start_B1);
+
+        // Load for operand B
+        CUTLASS_PRAGMA_UNROLL
+        for (int j = 0; j < Detail::kAccessesPerGroupB1; ++j) {
+            if (group_start_B1 + j < Detail::TBLoadIterationsB1) {
+                typename IteratorB1::AccessType* dst_ptr =
+                    reinterpret_cast<typename IteratorB1::AccessType*>(
+                        this->smem_iterator_B1_.get());
+
+                int const kSrcBytes = sizeof_bits<typename IteratorB1::Element>::value *
+                                      IteratorB1::ThreadMap::kElementsPerAccess /
+                                      IteratorB1::kAccessesPerVector / 8;
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < IteratorB1::kAccessesPerVector; ++v) {
+                    auto gmem_ptr = iterator_B1.get();
+
+                    cutlass::arch::cp_async_zfill<kSrcBytes, kCacheOpB1>(
+                        dst_ptr + v, gmem_ptr, iterator_B1.valid());
+
+                    ++iterator_B1;
+                }
+                ++this->smem_iterator_B1_;
+            }
+        }
+    }
+
+    CUTLASS_DEVICE
+    static void _prologue(IteratorB& iterator_B1,
+                          int32_t gemm_k_iterations_1,
+                          SmemIteratorB1& smem_iterator_B1_)
+    {
+        // Issue several complete stages
+        CUTLASS_PRAGMA_UNROLL
+        for (int stage = 0; stage < kNumStagesConcurrentLoad; ++stage, --gemm_k_iterations_1) {
+            iterator_B1.set_residual_tile(gemm_k_iterations_1 == 1);
+            iterator_B1.clear_mask(gemm_k_iterations_1 == 0);
+
+            iterator_B1.set_iteration_index(0);
+            smem_iterator_B1_.set_iteration_index(0);
+
+            // Load for operand B
+            CUTLASS_PRAGMA_UNROLL
+            for (int j = 0; j < Detail::TBLoadIterationsB1; ++j) {
+                typename IteratorB1::AccessType* dst_ptr =
+                    reinterpret_cast<typename IteratorB1::AccessType*>(smem_iterator_B1_.get());
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < IteratorB1::kAccessesPerVector; ++v) {
+                    int const kSrcBytes = sizeof_bits<typename IteratorB1::Element>::value *
+                                          IteratorB1::ThreadMap::kElementsPerAccess /
+                                          IteratorB1::kAccessesPerVector / 8;
+
+                    cutlass::arch::cp_async_zfill<kSrcBytes, kCacheOpB1>(
+                        dst_ptr + v, iterator_B1.get(), iterator_B1.valid());
+
+                    ++iterator_B1;
+                }
+
+                ++smem_iterator_B1_;
+            }
+
+            // Move to the next stage
+            iterator_B1.add_tile_offset({1, 0});
+
+            smem_iterator_B1_.add_tile_offset({1, 0});
+
+            // Defines the boundary of a stage of cp.async.
+            cutlass::arch::cp_async_fence();
+        }
+        iterator_B1.set_residual_tile(gemm_k_iterations_1 == 1);
+        iterator_B1.clear_mask(gemm_k_iterations_1 == 0);
+    }
+
+    /// Perform a threadblock-scoped matrix multiply-accumulate
+    CUTLASS_DEVICE
+    void operator()(
+        ///< problem size of GEMM
+        int gemm_k_iterations_1_,
+        ///< destination accumulator tile
+        FragmentC1& accum,
+        ///< iterator over B1 operand in global memory
+        IteratorB1 iterator_B1,
+        ///< initial value of accumulator
+        FragmentC1 const& src_accum)
+    {
+        // 2nd Gemm
+
+        //
+        // Prologue
+        //
+        // Perform accumulation in the 'd' output operand
+        accum = src_accum;
+
+        if (!prologue_done_) {
+            _prologue(iterator_B1, gemm_k_iterations_1_, smem_iterator_B1_);
+        } else if (!kSmemContainsEntireB) {
+            // Restore the iterators increments
+
+            int gemm_k_iterations_1 = gemm_k_iterations_1_;
+            // Issue several complete stages
+            CUTLASS_PRAGMA_UNROLL
+            for (int stage = 0; stage < kNumStagesConcurrentLoad; ++stage, --gemm_k_iterations_1) {
+                iterator_B1.set_iteration_index(0);
+                this->smem_iterator_B1_.set_iteration_index(0);
+
+                // Load for operand B
+                CUTLASS_PRAGMA_UNROLL
+                for (int j = 0; j < Detail::TBLoadIterationsB1; ++j) {
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int v = 0; v < IteratorB1::kAccessesPerVector; ++v) { ++iterator_B1; }
+                    ++this->smem_iterator_B1_;
+                }
+                iterator_B1.add_tile_offset({1, 0});
+                this->smem_iterator_B1_.add_tile_offset({1, 0});
+            }
+            iterator_B1.set_residual_tile(gemm_k_iterations_1 <= 1);
+            iterator_B1.clear_mask(gemm_k_iterations_1 <= 0);
+        }
+
+        // DEPBAR+SYNC
+        cutlass::arch::cp_async_wait<kNumStagesConcurrentLoad - 1>();
+        __syncthreads();
+
+        // remember that WarpFragmentAScale and WarpIteratorAScale are no-op/empty
+        // if scaling is disabled.
+
+        // Pair of fragments used to overlap shared memory loads and math
+        // instructions
+        WarpLoadedFragmentA1 warp_loaded_frag_A1[2];
+        WarpLoadedFragmentA1Scale warp_loaded_frag_A1_scale[2];
+        WarpLoadedFragmentB1 warp_loaded_frag_B1[2];
+        WarpTransformedFragmentA1 warp_transformed_frag_A1[2];
+        WarpTransformedFragmentB1 warp_transformed_frag_B1[2];
+
+        Operator1 warp_mma1;
+
+        warp_tile_iterator_A1_.load(warp_loaded_frag_A1[0]);
+        ++warp_tile_iterator_A1_;
+
+        warp_tile_iterator_A1_scale_.load(warp_loaded_frag_A1_scale[0]);
+        ++warp_tile_iterator_A1_scale_;
+
+        this->warp_tile_iterator_B_.set_kgroup_index(0);
+        this->warp_tile_iterator_B_.load(warp_loaded_frag_B1[0]);
+        ++this->warp_tile_iterator_B_;
+
+        int smem_write_stage_idx = Base::kStages - 1;
+        int smem_read_stage_idx = 0;
+
+        warp_mma1.transform(
+            warp_transformed_frag_A1[0],
+            warp_transformed_frag_B1[0],
+            FragmentAScaler::apply(warp_loaded_frag_A1[0], warp_loaded_frag_A1_scale[0]),
+            warp_loaded_frag_B1[0]);
+
+        // tf32x3 kernels use staging accumulation. warp_mma uses a temporary
+        // accumulator and this temporary accumulator is added to the final
+        // accumulator once in every mainloop iteration.
+        plus<FragmentC1> plus_accum;
+
+        FragmentC1 tmp_accum;
+
+        if (platform::is_same<typename Operator1::MathOperator,
+                              arch::OpMultiplyAddFastF32>::value ||
+            platform::is_same<typename Operator1::MathOperator,
+                              arch::OpMultiplyAddComplexFastF32>::value) {
+            tmp_accum.clear();
+        }
+
+        //
+        // Mainloop
+        //
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int gemm_k_iterations_1 = gemm_k_iterations_1_ - (Base::kStages - 1);
+             gemm_k_iterations_1 > (-Base::kStages + 1);
+             gemm_k_iterations_1--) {
+            //
+            // Loop over GEMM K dimension
+            //
+
+            // Computes a warp-level GEMM on data held in shared memory
+            // Each "warp_mma_k" refers to a warp-level matrix multiply-accumulate
+            CUTLASS_PRAGMA_UNROLL
+            for (int warp_mma_k = 0; warp_mma_k < Base::kWarpGemmIterations1; ++warp_mma_k) {
+                // Load warp-level tile from accumulator fragment (A)
+                // or shared memory (operand B)
+                this->warp_tile_iterator_B_.set_kgroup_index((warp_mma_k + 1) %
+                                                             Base::kWarpGemmIterations1);
+                // skip warp tile loading for the last kgroup (we are out of the buf)
+                if (gemm_k_iterations_1 > (-Base::kStages + 2) ||
+                    warp_mma_k < Base::kWarpGemmIterations1 - 1) {
+                    warp_tile_iterator_A1_.load(warp_loaded_frag_A1[(warp_mma_k + 1) % 2]);
+                    warp_tile_iterator_A1_scale_.load(
+                        warp_loaded_frag_A1_scale[(warp_mma_k + 1) % 2]);
+                    this->warp_tile_iterator_B_.load(warp_loaded_frag_B1[(warp_mma_k + 1) % 2]);
+                }
+                ++warp_tile_iterator_A1_;
+                ++warp_tile_iterator_A1_scale_;
+                ++this->warp_tile_iterator_B_;
+
+                if (warp_mma_k > 0)
+                    warp_mma1.transform(
+                        warp_transformed_frag_A1[warp_mma_k % 2],
+                        warp_transformed_frag_B1[warp_mma_k % 2],
+                        FragmentAScaler::apply(warp_loaded_frag_A1[warp_mma_k % 2],
+                                               warp_loaded_frag_A1_scale[warp_mma_k % 2]),
+                        warp_loaded_frag_B1[warp_mma_k % 2]);
+
+                if (platform::is_same<typename Operator1::MathOperator,
+                                      arch::OpMultiplyAddFastF32>::value ||
+                    platform::is_same<typename Operator1::MathOperator,
+                                      arch::OpMultiplyAddComplexFastF32>::value) {
+                    warp_mma1(tmp_accum,
+                              warp_transformed_frag_A1[warp_mma_k % 2],
+                              warp_transformed_frag_B1[warp_mma_k % 2],
+                              tmp_accum);
+
+                    if (warp_mma_k == 0) {
+                        accum = plus_accum(accum, tmp_accum);
+                        tmp_accum.clear();
+                    }
+                } else {
+                    warp_mma1(accum,
+                              warp_transformed_frag_A1[warp_mma_k % 2],
+                              warp_transformed_frag_B1[warp_mma_k % 2],
+                              accum);
+                }
+
+                // Issue global->shared copies for the this stage
+                if (warp_mma_k < Base::kWarpGemmIterations1 - 1) {
+                    int group_start_iteration_B1;
+
+                    group_start_iteration_B1 = warp_mma_k * Detail::kAccessesPerGroupB1;
+
+                    if (!kSmemContainsEntireB) {
+                        copy_tiles_and_advance_1(iterator_B1, group_start_iteration_B1);
+                    }
+                }
+
+                if (warp_mma_k + 2 == Base::kWarpGemmIterations1) {
+                    int group_start_iteration_B1;
+                    group_start_iteration_B1 = (warp_mma_k + 1) * Detail::kAccessesPerGroupB1;
+
+                    if (!kSmemContainsEntireB) {
+                        copy_tiles_and_advance_1(iterator_B1, group_start_iteration_B1);
+                    }
+
+                    // Inserts a memory fence between stages of cp.async instructions.
+                    cutlass::arch::cp_async_fence();
+
+                    // Waits until kStages-2 stages have committed.
+                    arch::cp_async_wait<kNumStagesConcurrentLoad - 1>();
+                    __syncthreads();
+
+                    // Move to the next stage
+                    iterator_B1.add_tile_offset({1, 0});
+
+                    this->smem_iterator_B1_.add_tile_offset({1, 0});
+
+                    // Add negative offsets to return iterators to the 'start' of the
+                    // circular buffer in shared memory
+                    if (!kSmemContainsEntireB) {
+                        if (smem_write_stage_idx == (Base::kStages - 1)) {
+                            this->smem_iterator_B1_.add_tile_offset({-Base::kStages, 0});
+                            smem_write_stage_idx = 0;
+                        } else {
+                            ++smem_write_stage_idx;
+                        }
+
+                        if (smem_read_stage_idx == (Base::kStages - 1)) {
+                            this->warp_tile_iterator_B_.add_tile_offset(
+                                {-Base::kStages * Policy1::kPartitionsK *
+                                     Base::kWarpGemmIterations1,
+                                 0});
+                            smem_read_stage_idx = 0;
+                        } else {
+                            ++smem_read_stage_idx;
+                        }
+                    }
+
+                    iterator_B1.set_residual_tile(gemm_k_iterations_1 == 2);
+                    iterator_B1.clear_mask(gemm_k_iterations_1 == 1);
+                }
+
+                // Do any conversions feeding the first stage at the end of the loop so
+                // we can start right away on mma instructions
+                if (warp_mma_k + 1 == Base::kWarpGemmIterations1)
+                    warp_mma1.transform(
+                        warp_transformed_frag_A1[(warp_mma_k + 1) % 2],
+                        warp_transformed_frag_B1[(warp_mma_k + 1) % 2],
+                        FragmentAScaler::apply(warp_loaded_frag_A1[(warp_mma_k + 1) % 2],
+                                               warp_loaded_frag_A1_scale[(warp_mma_k + 1) % 2]),
+                        warp_loaded_frag_B1[(warp_mma_k + 1) % 2]);
+            }
+        }
+
+        if (platform::is_same<typename Operator1::MathOperator,
+                              arch::OpMultiplyAddFastF32>::value ||
+            platform::is_same<typename Operator1::MathOperator,
+                              arch::OpMultiplyAddComplexFastF32>::value) {
+            accum = plus_accum(accum, tmp_accum);
+        }
+    }
+};
+
+template <typename WarpShape,
+          typename InstructionShape,
+          typename RegularWarpIterator,
+          typename Policy,
+          typename Enable = void>
+struct DefaultWarpIteratorAFromSharedMemory {};
+
+// TensorOp - Ampere half
+template <typename RegularWarpIterator, typename Policy>
+struct DefaultWarpIteratorAFromSharedMemory<
+    cutlass::gemm::GemmShape<32, 32, 32>,
+    cutlass::gemm::GemmShape<16, 8, 8>,
+    RegularWarpIterator,
+    Policy,
+    typename platform::enable_if<(sizeof_bits<typename RegularWarpIterator::Element>::value == 16 &&
+                                  Policy::Operator::Policy::OpDelta::kRow == 1)>::type> {
+    static constexpr auto kWarpSize = 32;
+    using OpDelta = typename Policy::Operator::Policy::OpDelta;
+    using WarpShape = cutlass::MatrixShape<32, 32>;
+
+    using WarpIterator =
+        cutlass::gemm::warp::WarpIteratorFromSmem<cutlass::gemm::Operand::kA,
+                                                  typename RegularWarpIterator::Element>;
+};
+
+// TensorOp - Ampere f32
+template <typename WarpShape, typename RegularWarpIterator, typename Policy>
+struct DefaultWarpIteratorAFromSharedMemory<
+    WarpShape,
+    cutlass::gemm::GemmShape<16, 8, 8>,
+    RegularWarpIterator,
+    Policy,
+    typename platform::enable_if<(sizeof_bits<typename RegularWarpIterator::Element>::value != 16 ||
+                                  Policy::Operator::Policy::OpDelta::kRow != 1)>::type> {
+    using InstructionShape = cutlass::gemm::GemmShape<16, 8, 8>;
+    static constexpr auto kWarpSize = 32;
+    using OpDelta = typename Policy::Operator::Policy::OpDelta;
+
+    using WarpIterator = cutlass::gemm::warp::MmaTensorOpMultiplicandTileAccessIterator<
+        cutlass::MatrixShape<WarpShape::kM, WarpShape::kK>,
+        cutlass::gemm::Operand::kA,
+        typename RegularWarpIterator::Element,
+        cutlass::layout::RowMajor,
+        cutlass::MatrixShape<InstructionShape::kM, InstructionShape::kK>,
+        OpDelta::kRow,
+        kWarpSize>;
+};
+
+// TensorOp - Volta
+template <typename WarpShape, typename RegularWarpIterator, typename Policy>
+struct DefaultWarpIteratorAFromSharedMemory<WarpShape,
+                                            cutlass::gemm::GemmShape<16, 16, 4>,
+                                            RegularWarpIterator,
+                                            Policy> {
+    using InstructionShape = cutlass::gemm::GemmShape<16, 16, 4>;
+    static constexpr auto kWarpSize = 32;
+    using OpDelta = typename Policy::Operator::Policy::OpDelta;
+
+    using WarpIterator = cutlass::gemm::warp::MmaVoltaTensorOpMultiplicandTileIterator<
+        cutlass::MatrixShape<32, 32>,  // MatrixShape<WarpShape::kM,
+                                       // WarpShape::kK>,
+        cutlass::gemm::Operand::kA,
+        typename RegularWarpIterator::Element,
+        cutlass::layout::RowMajorVoltaTensorOpMultiplicandCrosswise<16, 32>,
+        cutlass::MatrixShape<16, 4>,
+        OpDelta::kRow,
+        kWarpSize>;
+};
+
+// Simt
+template <typename WarpShape, typename RegularWarpIterator, typename Policy>
+struct DefaultWarpIteratorAFromSharedMemory<WarpShape,
+                                            cutlass::gemm::GemmShape<1, 1, 1>,
+                                            RegularWarpIterator,
+                                            Policy> {
+    using InstructionShape = cutlass::gemm::GemmShape<1, 1, 1>;
+    static constexpr auto kWarpSize = 32;
+
+    // We just use the same iterator, as we reproduced the same shared-memory
+    // schema. Just modify it to handle non-complete tiles.
+    using WarpIterator = RegularWarpIterator;
+};
+
+// Converts a "regular" Mma into their counterpart from shared memory
+template <typename Mma_,
+          typename AccumulatorSharedStorage,
+          /// whether or not to apply elementwise multiplication of operand A by
+          /// another matrix in shared memory before usage in A @ B
+          bool kScaleOperandA,
+          bool kTransposeA = false>
+struct DefaultMmaFromSharedMemory;
+
+// Mma pipelined
+template <
+    /// Size of the Gemm problem - concept: gemm::GemmShape<>
+    typename Shape_,
+    /// Iterates over tiles of A operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorA_,
+    /// Iterates over tiles of A operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorA_,
+    /// Iterates over tiles of B operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorB_,
+    /// Iterates over tiles of B operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorB_,
+    /// Data type of accumulator matrix
+    typename ElementC_,
+    /// Data type of accumulator matrix
+    typename LayoutC_,
+    /// Policy describing tuning details (concept: MmaPolicy)
+    typename Policy_,
+    /// Transformation applied to A operand
+    typename TransformA_,
+    /// Transformation applied to B operand
+    typename TransformB_,
+    typename AccumulatorSharedStorage_,
+    /// whether or not to apply elementwise multiplication of operand A by
+    /// another matrix in shared memory before usage in A @ B
+    bool kScaleOperandA,
+    bool kTransposeA>
+struct DefaultMmaFromSharedMemory<MmaPipelined<Shape_,
+                                               IteratorA_,
+                                               SmemIteratorA_,
+                                               IteratorB_,
+                                               SmemIteratorB_,
+                                               ElementC_,
+                                               LayoutC_,
+                                               Policy_,
+                                               TransformA_,
+                                               TransformB_>,
+                                  AccumulatorSharedStorage_,
+                                  kScaleOperandA,
+                                  kTransposeA> {
+    static constexpr int kWarpSize = 32;
+    using SmemAccumulatorLayout = cutlass::layout::RowMajor;
+
+    using RegularMma = MmaPipelined<Shape_,
+                                    IteratorA_,
+                                    SmemIteratorA_,
+                                    IteratorB_,
+                                    SmemIteratorB_,
+                                    ElementC_,
+                                    LayoutC_,
+                                    Policy_,
+                                    TransformA_,
+                                    TransformB_>;
+
+    using WarpShape = typename Policy_::Operator::Shape;
+    using InstructionShape = typename Policy_::Operator::InstructionShape;
+    using ArchMmaOperator = typename Policy_::Operator;
+
+    static constexpr bool kIsTransposedA = false;
+    using WarpIteratorA =
+        typename DefaultWarpIteratorAFromSharedMemory<WarpShape,
+                                                      InstructionShape,
+                                                      typename RegularMma::Operator::IteratorA,
+                                                      Policy_>::WarpIterator;
+    using IteratorB =
+        typename cutlass::transform::threadblock::MakeIteratorResidualLast<IteratorB_>::Iterator;
+
+    using Mma =
+        typename cutlass::gemm::threadblock::MmaPipelinedFromSharedMemory<Shape_,
+                                                                          WarpIteratorA,
+                                                                          kScaleOperandA,
+                                                                          AccumulatorSharedStorage_,
+                                                                          IteratorB,
+                                                                          SmemIteratorB_,
+                                                                          ElementC_,
+                                                                          LayoutC_,
+                                                                          Policy_>;
+};
+
+template <
+    /// Size of the Gemm problem - concept: gemm::GemmShape<>
+    typename Shape_,
+    /// Iterates over tiles of A operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorA_,
+    /// Iterates over tiles of A operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorA_,
+    /// Cache operation for operand A
+    cutlass::arch::CacheOperation::Kind CacheOpA,
+    /// Iterates over tiles of B operand in global memory
+    //  (concept: ReadableTileIterator | ForwardTileIterator |
+    //  MaskedTileIterator)
+    typename IteratorB_,
+    /// Iterates over tiles of B operand in shared memory
+    /// (concept: WriteableTileIterator | RandomAccessTileIterator)
+    typename SmemIteratorB_,
+    /// Cache operation for operand B
+    cutlass::arch::CacheOperation::Kind CacheOpB,
+    /// Data type of accumulator matrix
+    typename ElementC_,
+    /// Data type of accumulator matrix
+    typename LayoutC_,
+    /// Policy describing tuning details (concept: MmaPolicy)
+    typename Policy_,
+    /// Number of stages,
+    int Stages,
+    /// Use zfill or predicate for out-of-bound cp.async
+    SharedMemoryClearOption SharedMemoryClear,
+    typename AccumulatorSharedStorage_,
+    /// whether or not to apply elementwise multiplication of operand A by
+    /// another matrix in shared memory before usage in A @ B
+    bool kScaleOperandA,
+    bool kTransposeA>
+struct DefaultMmaFromSharedMemory<MmaMultistage<Shape_,
+                                                IteratorA_,
+                                                SmemIteratorA_,
+                                                CacheOpA,
+                                                IteratorB_,
+                                                SmemIteratorB_,
+                                                CacheOpB,
+                                                ElementC_,
+                                                LayoutC_,
+                                                Policy_,
+                                                Stages,
+                                                SharedMemoryClear>,
+                                  AccumulatorSharedStorage_,
+                                  kScaleOperandA,
+                                  kTransposeA> {
+    static constexpr int kWarpSize = 32;
+
+    using RegularMma = MmaMultistage<Shape_,
+                                     IteratorA_,
+                                     SmemIteratorA_,
+                                     CacheOpA,
+                                     IteratorB_,
+                                     SmemIteratorB_,
+                                     CacheOpB,
+                                     ElementC_,
+                                     LayoutC_,
+                                     Policy_,
+                                     Stages,
+                                     SharedMemoryClear>;
+
+    using WarpShape = typename Policy_::Operator::Shape;
+    using InstructionShape = typename Policy_::Operator::InstructionShape;
+    using WarpIteratorA_ =
+        typename DefaultWarpIteratorAFromSharedMemory<WarpShape,
+                                                      InstructionShape,
+                                                      typename RegularMma::Operator::IteratorA,
+                                                      Policy_>::WarpIterator;
+    using WarpIteratorTranspose = TransposeWarpIterator<WarpIteratorA_>;
+    static constexpr bool kIsTransposedA = WarpIteratorTranspose::kSupportsTranspose && kTransposeA;
+    using WarpIteratorA = typename platform::
+        conditional<kIsTransposedA, typename WarpIteratorTranspose::Iterator, WarpIteratorA_>::type;
+
+    static int constexpr kMaxK = kIsTransposedA ? AccumulatorSharedStorage_::Shape::kM
+                                                : AccumulatorSharedStorage_::Shape::kN;
+    // Reduce the number of stages if we don't need that many
+    static int constexpr kStagesMax = (kMaxK + int(Shape_::kK) - 1) / int(Shape_::kK);
+    static int constexpr kStages = cutlass::const_min(Stages, kStagesMax);
+
+    using IteratorB =
+        typename cutlass::transform::threadblock::MakeIteratorResidualLast<IteratorB_>::Iterator;
+    using Mma = typename cutlass::gemm::threadblock::MmaMultistageFromSharedMemory<
+        Shape_,
+        WarpIteratorA,
+        kScaleOperandA,
+        AccumulatorSharedStorage_,
+        IteratorB,
+        SmemIteratorB_,
+        RegularMma::kCacheOpB,
+        ElementC_,
+        LayoutC_,
+        Policy_,
+        kStages,
+        kMaxK>;
+};
+
+/////////////////////////////////////////////////////////////////////////////////////////////////
+
+template <typename IteratorC,
+          typename Operator,
+          typename scalar_t,
+          typename WarpShape_,
+          typename ThreadblockShape_>
+struct B2bGemm;
+
+// Tensor Cores >= Sm75 specialization (Ampere ...)
+template <  /// Size of the matrix to load (concept: MatrixShape)
+    typename Shape_,
+    /// Element type
+    typename Element_,
+    /// Layout of operand in memory
+    typename Layout_,
+    /// Shape of one matrix product operation (concept: MatrixShape)
+    typename InstructionShape_,
+    /// Interval between adjacent *MMA instructions (in units of MMA
+    /// instructions, concept: MatrixShape)
+    typename OpDelta_,
+    typename Operator,
+    typename scalar_t,
+    typename WarpShape_,
+    typename ThreadblockShape_>
+struct B2bGemm<
+    cutlass::gemm::warp::
+        MmaTensorOpAccumulatorTileIterator<Shape_, Element_, Layout_, InstructionShape_, OpDelta_>,
+    Operator,
+    scalar_t,
+    WarpShape_,
+    ThreadblockShape_> {
+    using IteratorC = typename cutlass::gemm::warp::
+        MmaTensorOpAccumulatorTileIterator<Shape_, Element_, Layout_, InstructionShape_, OpDelta_>;
+    using FragmentC = typename IteratorC::Fragment;
+    using InstructionShape = InstructionShape_;
+    using WarpShape = WarpShape_;
+    using ThreadblockShape = ThreadblockShape_;
+    using accum_t = Element_;
+    using lse_scalar_t = float;
+
+    using SmemAccumulatorLayout = cutlass::layout::RowMajor;
+
+    // Iterator to load accumulators (results of matmul in registers)
+    using FragmentIteratorAccumulator = cutlass::epilogue::warp::FragmentIteratorTensorOp<
+        WarpShape,
+        InstructionShape,
+        accum_t,
+        typename Operator::Policy::Operator::FragmentC,
+        cutlass::layout::RowMajor>;
+
+    // Iterator to store to shared-memory
+    using SmemIteratorD0 =
+        typename cutlass::epilogue::warp::TileIteratorTensorOp<WarpShape,
+                                                               InstructionShape,
+                                                               scalar_t,  // accum_t,
+                                                               SmemAccumulatorLayout>;
+    using AccumulatorSharedStorage =
+        cutlass::gemm::threadblock::AccumulatorSharedStorage<ThreadblockShape,
+                                                             typename SmemIteratorD0::Element,
+                                                             typename SmemIteratorD0::TensorLayout,
+                                                             typename SmemIteratorD0::Padding>;
+    // We need to provide an operation for the epilogue. Let's create an
+    // operation that does nothing (ScaleType::Nothing), just converts
+    // from accum_t (float) -> scalar_t (can be half)
+    using OutputOpNoOp = cutlass::epilogue::thread::LinearCombination<
+        typename SmemIteratorD0::Element,  // ElementOutput
+        FragmentIteratorAccumulator::Fragment::kElements,
+        accum_t,                           // ElementAccumulator
+        typename SmemIteratorD0::Element,  // ElementCompute
+        cutlass::epilogue::thread::ScaleType::Nothing>;
+    using Epilogue = cutlass::epilogue::threadblock::EpilogueSmemAccumulator<
+        SmemIteratorD0,
+        FragmentIteratorAccumulator,
+        SmemIteratorD0,  // ScaleBiasIterator
+                         // - not used
+        OutputOpNoOp>;
+
+    // Epilogue 2: with LSE (for backwards pass)
+    static int const kElementsPerAccess = 2;  // TODO: Why 2?
+    using IteratorAccumulatorLSE = cutlass::transform::threadblock::VectorIterator<
+        cutlass::transform::threadblock::PredicatedVectorAccessIterator<
+            // Shape
+            cutlass::MatrixShape<ThreadblockShape::kM, ThreadblockShape::kN>,
+            // WarpShape
+            cutlass::MatrixShape<WarpShape::kM, WarpShape::kN>,
+            lse_scalar_t,
+            cutlass::layout::RowMajor,
+            kElementsPerAccess>>;
+    using EpilogueOpApplyLSE = cutlass::epilogue::thread::ApplyLogSumExp<
+        scalar_t,      // ElementOutput_
+        lse_scalar_t,  // ElementLSE_
+        accum_t,       // ElementAccumulator_
+        accum_t,       // ElementCompute_
+        128 / cutlass::sizeof_bits<scalar_t>::value
+        // FragmentIteratorAccumulator::Fragment::kElements
+        // InstructionShape::kM * InstructionShape::kN / 32
+        >;
+    using EpilogueWithLSE =
+        cutlass::epilogue::threadblock::EpilogueSmemAccumulator<SmemIteratorD0,
+                                                                FragmentIteratorAccumulator,
+                                                                IteratorAccumulatorLSE,
+                                                                EpilogueOpApplyLSE>;
+
+    static void CUTLASS_DEVICE accumToSmem(AccumulatorSharedStorage& shared_storage,
+                                           FragmentC const& accum,
+                                           int lane_id,
+                                           cutlass::MatrixCoord const& tile_coords)
+    {
+        SmemIteratorD0 smem_iterator_attn(shared_storage.accum_ref(), lane_id);
+        smem_iterator_attn.add_tile_offset(
+            tile_coords * cutlass::MatrixCoord{SmemIteratorD0::TileIterations::kRow,
+                                               SmemIteratorD0::TileIterations::kColumn});
+        Epilogue epilogue;
+        epilogue(OutputOpNoOp({}), smem_iterator_attn, accum);
+    }
+
+    static void CUTLASS_DEVICE accumApplyLSEToSmem(AccumulatorSharedStorage& shared_storage,
+                                                   FragmentC& accum,
+                                                   lse_scalar_t const* lse,
+                                                   int32_t lse_extents,
+                                                   int thread_id,
+                                                   int warp_id,
+                                                   int lane_id,
+                                                   cutlass::MatrixCoord const& tile_coords)
+    {
+        constexpr int32_t kAlignLSE = 32;
+        IteratorAccumulatorLSE iterator_lse(
+            lse,
+            {(int32_t)0, (int32_t)ceil_div(lse_extents, kAlignLSE) * kAlignLSE},
+            thread_id,
+            warp_id,
+            cutlass::MatrixCoord{0, 0}  // offset
+        );
+
+        SmemIteratorD0 smem_iterator_attn(shared_storage.accum_ref(), lane_id);
+        smem_iterator_attn.add_tile_offset(
+            tile_coords * cutlass::MatrixCoord{SmemIteratorD0::TileIterations::kRow,
+                                               SmemIteratorD0::TileIterations::kColumn});
+        EpilogueWithLSE epilogue;
+        EpilogueOpApplyLSE minus_lse_exp({});
+        epilogue(minus_lse_exp,
+                 smem_iterator_attn,
+                 accum,
+                 // scale - unused
+                 iterator_lse,
+                 // bias
+                 iterator_lse);
+    }
+};
+
+// Volta Specialization
+// only supported for f16
+template <typename Operator, typename WarpShape_, typename ThreadblockShape_>
+struct B2bGemm<cutlass::gemm::warp::MmaVoltaTensorOpAccumulatorTileIterator<
+                   cutlass::MatrixShape<32, 32>,
+                   float,
+                   cutlass::layout::RowMajor,
+                   cutlass::gemm::GemmShape<16, 16, 4>,
+                   cutlass::MatrixShape<1, 1>>,
+               Operator,
+               cutlass::half_t,
+               WarpShape_,
+               ThreadblockShape_> {
+    using IteratorC = cutlass::gemm::warp::MmaVoltaTensorOpAccumulatorTileIterator<
+        cutlass::MatrixShape<32, 32>,
+        float,
+        cutlass::layout::RowMajor,
+        cutlass::gemm::GemmShape<16, 16, 4>,
+        cutlass::MatrixShape<1, 1>>;
+    using scalar_t = cutlass::half_t;
+    using accum_t = IteratorC::Element;
+    using WarpShape = WarpShape_;
+    using ThreadblockShape = ThreadblockShape_;
+    using FragmentC = IteratorC::Fragment;
+    using lse_scalar_t = float;
+
+    using SmemAccumulatorLayout = cutlass::layout::RowMajor;
+    using SmemIteratorD0 =
+        cutlass::epilogue::warp::TileIteratorVoltaTensorOp<WarpShape,
+                                                           cutlass::gemm::GemmShape<32, 32, 4>,
+                                                           scalar_t,
+                                                           SmemAccumulatorLayout>;
+
+    // // Storage in shared-memory for Q.Kt
+    using AccumulatorSharedStorage = cutlass::gemm::threadblock::AccumulatorSharedStorage<
+        ThreadblockShape,
+        scalar_t,
+        cutlass::layout::RowMajorVoltaTensorOpMultiplicandCrosswise<
+            16,
+            32>,                    // typename SmemIteratorD0::TensorLayout,
+        cutlass::MatrixShape<0, 0>  // Padding
+        >;
+
+    using OutputLayout = cutlass::layout::RowMajorVoltaTensorOpMultiplicandCrosswise<16, 32>;
+    using TensorRef = cutlass::TensorRef<scalar_t, OutputLayout>;
+    using Policy = typename IteratorC::Policy;
+    using Element = accum_t;
+    // Those are MmaVoltaTensorOpAccumulatorTileIterator private fields
+    // Let's copy their values
+    static int const kElementsPerPartial = 4;
+    using EleShapePerPatial =
+        typename cutlass::platform::conditional<cutlass::platform::is_same<Element, float>::value,
+                                                cutlass::MatrixShape<2, 2>,
+                                                cutlass::MatrixShape<1, 4>>::type;
+    static int const kElementsPerMma = 8;
+    static int const kAccumulatorPatials = 2;
+    using QuadShapePerPatialMma = cutlass::MatrixShape<4, 4>;
+
+    static void CUTLASS_DEVICE accumToSmem(AccumulatorSharedStorage& shared_storage,
+                                           FragmentC const& accum,
+                                           int lane_id,
+                                           cutlass::MatrixCoord const& tile_coords)
+    {
+        // ctor - from MmaVoltaTensorOpAccumulatorTileIterator
+        TensorRef ref_(shared_storage.accum_ref());
+        int quad = (lane_id >> 2);
+        int lane_in_quad = (lane_id & 3);
+        int accum_m, accum_n;
+
+        if (cutlass::platform::is_same<Element, float>::value) {
+            // (quad[2],quad[0])+lane_in_quad[0]
+            accum_m = (((quad & 0x4) >> 1) + (quad & 0x1)) * 8 + (lane_in_quad & 1);
+            // (quad[1])+lane_in_quad[1]
+            accum_n = ((quad >> 1) & 0x1) * kElementsPerPartial * kAccumulatorPatials +
+                      (lane_in_quad & 2);
+        } else {
+            accum_m = (((quad & 0x4) >> 1) + (quad & 0x1)) * 8 + lane_in_quad;  // (quad[2],quad[0])
+            accum_n = ((quad >> 1) & 0x1) * kElementsPerPartial * kAccumulatorPatials;
+        }
+        cutlass::MatrixCoord lane_offset(accum_m, accum_n);
+
+        // Tile offset
+        ref_.add_coord_offset(tile_coords * cutlass::MatrixCoord({IteratorC::Shape::kRow,
+                                                                  IteratorC::Shape::kColumn}));
+
+        using AccessType = cutlass::Array<scalar_t, EleShapePerPatial::kColumn>;
+
+        // store - from MmaVoltaTensorOpAccumulatorTileIterator
+        CUTLASS_PRAGMA_UNROLL
+        for (int tile_n = 0; tile_n < Policy::TileIterations::kColumn; ++tile_n) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int tile_m = 0; tile_m < Policy::TileIterations::kRow; ++tile_m) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int mma_n = 0; mma_n < Policy::MmaIterations::kColumn; ++mma_n) {
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int mma_m = 0; mma_m < Policy::MmaIterations::kRow; ++mma_m) {
+                        int mma_accum_start = (((tile_n * Policy::TileIterations::kRow + tile_m) *
+                                                    Policy::MmaIterations::kColumn +
+                                                mma_n) *
+                                                   Policy::MmaIterations::kRow +
+                                               mma_m) *
+                                              kElementsPerMma;
+
+                        CUTLASS_PRAGMA_UNROLL
+                        for (int p = 0; p < kAccumulatorPatials; ++p) {
+                            CUTLASS_PRAGMA_UNROLL
+                            for (int m = 0; m < EleShapePerPatial::kRow; ++m) {
+                                int accum_m = tile_m * Policy::InterleavedTile::kRow +
+                                              mma_m * QuadShapePerPatialMma::kRow + m * 2;
+                                int accum_n = tile_n * Policy::InterleavedTile::kColumn +
+                                              mma_n * QuadShapePerPatialMma::kColumn +
+                                              p * Policy::InterleavedTile::kColumn / 2;
+                                int r = (accum_m + lane_offset.row());
+                                AccessType to_store;
+                                CUTLASS_PRAGMA_UNROLL
+                                for (int n = 0; n < EleShapePerPatial::kColumn; ++n) {
+                                    int idx = mma_accum_start + p * kElementsPerPartial +
+                                              m * EleShapePerPatial::kColumn + n;
+                                    int c = (accum_n + n + lane_offset.column());
+                                    to_store[n] = scalar_t(accum[idx]);
+                                }
+                                int c = (accum_n + lane_offset.column());
+                                assert(r < 32);
+                                assert(c < 32);
+                                *reinterpret_cast<AccessType*>(ref_.data() + ref_.offset({r, c})) =
+                                    to_store;
+                            }
+                        }
+                    }
+                }
+            }
+        }
+    }
+
+    static void CUTLASS_DEVICE accumApplyLSEToSmem(AccumulatorSharedStorage& shared_storage,
+                                                   typename IteratorC::Fragment& accum,
+                                                   lse_scalar_t const* lse,
+                                                   int lse_extent,
+                                                   int thread_id,
+                                                   int warp_id,
+                                                   int lane_id,
+                                                   cutlass::MatrixCoord const& tile_coords)
+    {
+        // Non-optimized way to apply LSE to registers
+        // NOTE: accum is attn.T
+        // TODO: Optimize for each architecture
+        static constexpr int WarpSize = 32;
+        using AccumLambdaIterator =
+            typename DefaultMmaAccumLambdaIterator<IteratorC, accum_t, WarpSize>::Iterator;
+        auto lane_offset = AccumLambdaIterator::get_lane_offset(lane_id, warp_id, tile_coords);
+
+        cutlass::Array<lse_scalar_t, IteratorC::Fragment::kElements> lse_prefetched;
+        lse_prefetched.clear();
+        int rowIdx = 0;
+        int colIdx = 0;
+        AccumLambdaIterator::iterateRows(
+            lane_offset,
+            [&](int accum_m) {
+                ++rowIdx;
+                colIdx = 0;
+            },
+            [&](int accum_m, int accum_n, int idx) {
+                if (rowIdx == 1) {
+                    lse_prefetched[colIdx] = accum_n < lse_extent
+                                                 ? lse[accum_n]
+                                                 : platform::numeric_limits<accum_t>::infinity();
+                }
+                accum[idx] = expf(accum[idx] - lse_prefetched[colIdx]);
+                ++colIdx;
+            },
+            [&](int accum_m) {});
+        accumToSmem(shared_storage, accum, lane_id, tile_coords);
+    }
+};
+
+// Simt Specialization
+// for f32 on Sm70-Sm75 and f16/f32 below
+
+template <typename Operator,
+          typename OperatorPolicy,
+          typename scalar_t,
+          typename WarpShape_,
+          typename ThreadblockShape_>
+struct B2bGemm<cutlass::gemm::warp::MmaSimtTileIterator<cutlass::MatrixShape<32, 32>,
+                                                        cutlass::gemm::Operand::kC,
+                                                        float,
+                                                        cutlass::layout::RowMajor,
+                                                        OperatorPolicy,
+                                                        1,
+                                                        1>,
+               Operator,
+               scalar_t,
+               WarpShape_,
+               ThreadblockShape_> {
+    using IteratorC = cutlass::gemm::warp::MmaSimtTileIterator<cutlass::MatrixShape<32, 32>,
+                                                               cutlass::gemm::Operand::kC,
+                                                               float,
+                                                               cutlass::layout::RowMajor,
+                                                               OperatorPolicy,
+                                                               1,
+                                                               1>;
+    using accum_t = typename IteratorC::Element;
+    using WarpShape = WarpShape_;
+    using ThreadblockShape = ThreadblockShape_;
+    using FragmentC = typename IteratorC::Fragment;
+    using lse_scalar_t = float;
+
+    // Storage in shared-memory for Q.Kt
+    using AccumulatorSharedStorage =
+        cutlass::gemm::threadblock::AccumulatorSharedStorage<ThreadblockShape,
+                                                             scalar_t,
+                                                             cutlass::layout::ColumnMajor,
+                                                             cutlass::MatrixShape<0, 0>  // Padding
+                                                             >;
+
+    static void CUTLASS_DEVICE accumToSmem(AccumulatorSharedStorage& shared_storage,
+                                           FragmentC const& accum,
+                                           int lane_id,
+                                           cutlass::MatrixCoord const& tile_coords)
+    {
+        using Policy = typename IteratorC::Policy;
+        using Element = typename IteratorC::Element;
+        using Iterations = typename IteratorC::Iterations;
+        using Delta = typename IteratorC::Delta;
+
+        auto ref_ = shared_storage.accum_ref();
+        // ctor - MmaSimtTileIterator
+        // compute offset based on thread ID and lane layout
+        typename Policy::LaneLayout lane_layout = Policy::get_lane_layout();
+
+        MatrixCoord lane_offset = lane_layout.inverse(lane_id) *
+                                  MatrixCoord(Policy::LaneMmaShape::kM, Policy::LaneMmaShape::kN);
+
+        ref_.add_coord_offset(lane_offset);
+
+        // Tile offset
+        ref_.add_coord_offset(tile_coords * cutlass::MatrixCoord({IteratorC::Shape::kRow,
+                                                                  IteratorC::Shape::kColumn}));
+
+        // store - MmaSimtTileIterator
+        CUTLASS_PRAGMA_UNROLL
+        for (int mma_n = 0; mma_n < Iterations::kColumn; ++mma_n) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int n = 0; n < Policy::LaneMmaShape::kN; ++n) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int mma_m = 0; mma_m < Iterations::kRow; ++mma_m) {
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int m = 0; m < Policy::LaneMmaShape::kM; ++m) {
+                        int r = Policy::LaneMmaShape::kM * (mma_m * Policy::WarpShape::kRow) + m;
+                        int c = mma_n * Delta::kColumn + n;
+                        int idx = n + Policy::LaneMmaShape::kN *
+                                          (mma_n + Iterations::kColumn *
+                                                       (m + mma_m * Policy::LaneMmaShape::kM));
+                        ref_.at({r, c}) = scalar_t(accum[idx]);
+                    }
+                }
+            }
+        }
+    }
+
+    static void CUTLASS_DEVICE accumApplyLSEToSmem(AccumulatorSharedStorage& shared_storage,
+                                                   typename IteratorC::Fragment& accum,
+                                                   lse_scalar_t const* lse,
+                                                   int lse_extent,
+                                                   int thread_id,
+                                                   int warp_id,
+                                                   int lane_id,
+                                                   cutlass::MatrixCoord const& tile_coords)
+    {
+        // Non-optimized way to apply LSE to registers
+        // NOTE: accum is attn.T
+        // TODO: Optimize for each architecture
+        static constexpr int WarpSize = 32;
+        using AccumLambdaIterator =
+            typename DefaultMmaAccumLambdaIterator<IteratorC, accum_t, WarpSize>::Iterator;
+        auto lane_offset = AccumLambdaIterator::get_lane_offset(lane_id, warp_id, tile_coords);
+
+        cutlass::Array<lse_scalar_t, IteratorC::Fragment::kElements> lse_prefetched;
+        lse_prefetched.clear();
+        int rowIdx = 0;
+        int colIdx = 0;
+        AccumLambdaIterator::iterateRows(
+            lane_offset,
+            [&](int accum_m) {
+                ++rowIdx;
+                colIdx = 0;
+            },
+            [&](int accum_m, int accum_n, int idx) {
+                if (rowIdx == 1) {
+                    lse_prefetched[colIdx] = accum_n < lse_extent
+                                                 ? lse[accum_n]
+                                                 : platform::numeric_limits<accum_t>::infinity();
+                }
+                accum[idx] = expf(accum[idx] - lse_prefetched[colIdx]);
+                ++colIdx;
+            },
+            [&](int accum_m) {});
+        accumToSmem(shared_storage, accum, lane_id, tile_coords);
+    }
+};
+
+}  // namespace threadblock
+}  // namespace gemm
+}  // namespace cutlass
+
+/////////////////////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/iterators/epilogue_predicated_tile_iterator.h

@@ -0,0 +1,691 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+  \brief Epilogue iterator that supports prefetching
+
+  Mostly copied from "cutlass/epilogue/threadblock/predicated_tile_iterator.h"
+*/
+
+#pragma once
+
+#include "cutlass/arch/arch.h"
+#include "cutlass/arch/memory.h"
+#include "cutlass/array.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/epilogue/threadblock/output_tile_thread_map.h"
+#include "cutlass/epilogue/threadblock/predicated_tile_iterator_params.h"
+#include "cutlass/layout/matrix.h"
+#include "cutlass/layout/tensor.h"
+#include "cutlass/matrix_shape.h"
+#include "cutlass/numeric_types.h"
+#include "cutlass/tensor_ref.h"
+#include "cutlass/transform/pitch_linear_thread_map.h"
+
+////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+
+////////////////////////////////////////////////////////////////////////////////
+
+namespace epilogue {
+namespace threadblock {
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Tile iterator used to load and store output tile from global memory in
+/// epilogue.
+///
+/// Satisfies: ReadableTileIterator | PredicatedTileIterator |
+/// ForwardTileIterator
+///
+template <typename ThreadMap_,    ///< Thread map (conept: OutputTileThreadMap)
+          typename Element_,      ///< Element data type
+          bool ScatterD = false,  ///< Scatter D operand or not
+          bool UseCUDAStore = false>
+class PredicatedTileIteratorPrefetch {
+public:
+    using ThreadMap = ThreadMap_;
+    using Shape = typename ThreadMap::Shape;
+
+    using Element = Element_;
+
+    using Layout = layout::RowMajor;
+    using TensorRef = TensorRef<Element, Layout>;
+    using ConstTensorRef = typename TensorRef::ConstTensorRef;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+    using TensorCoord = MatrixCoord;
+
+    static int const kElementsPerAccess = ThreadMap::kElementsPerAccess;
+    static int const kThreads = ThreadMap::kThreads;
+    static int const kIterations = ThreadMap::Count::kTile;
+
+    static_assert(ThreadMap::Iterations::kRow > 0, "ThreadMap::Iterations::kRow must be > 0");
+    static_assert(ThreadMap::Iterations::kGroup > 0, "ThreadMap::Iterations::kGroup must be > 0");
+    static_assert(ThreadMap::Iterations::kCluster > 0,
+                  "ThreadMap::Iterations::kCluster must be > 0");
+    static_assert(ThreadMap::Iterations::kColumn > 0, "ThreadMap::Iterations::kColumn must be > 0");
+
+    /// Fragment object
+    using Fragment = Array<Element,
+                           ThreadMap::Iterations::kColumn * ThreadMap::Iterations::kRow *
+                               ThreadMap::Iterations::kGroup * ThreadMap::Iterations::kCluster *
+                               ThreadMap::kElementsPerAccess>;
+
+    /// Memory access size
+    using AccessType = AlignedArray<Element, ThreadMap::kElementsPerAccess>;
+
+    //
+    // Parameters struct
+    //
+
+    /// Uses a non-template class
+    struct Params : PredicatedTileIteratorParams {
+        using Base = PredicatedTileIteratorParams;
+
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout)
+            : PredicatedTileIteratorParams(
+                  layout.stride(0) * int(sizeof(AccessType)) / kElementsPerAccess,
+                  make_OutputTileThreadMapDesc<ThreadMap>())
+        {
+        }
+
+        CUTLASS_HOST_DEVICE
+        Params(Base const& base) : Base(base) {}
+    };
+
+    /// Mask object
+    struct Mask {
+        static int const kCount = ThreadMap::Iterations::kColumn;
+
+        /// Predicate state
+        bool predicates[kCount];
+
+        //
+        // Mask
+        //
+        CUTLASS_HOST_DEVICE
+        Mask() { enable(); }
+
+        ///< Efficiently disables all accesses guarded by mask
+        CUTLASS_HOST_DEVICE void clear()
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < kCount; ++i) { predicates[i] = false; }
+        }
+
+        ///< CUTLASS_HOST_DEVICE enables all accesses guarded by mask
+        CUTLASS_DEVICE void enable()
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < kCount; ++i) { predicates[i] = true; }
+        }
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Parameters structure containing reference and precomputed state.
+    PredicatedTileIteratorParams params_;
+
+    /// Byte-level pointer
+    uint8_t* byte_pointer_;
+
+    /// Array of boolean values to contain steady-state predicates
+    Mask mask_;
+
+    /// Extent of the matrix tile in rows
+    Index extent_row_;
+
+    /// Extent of the matrix tile in rows
+    Index extent_column_;
+
+    /// A thread's starting row position (assuming steady-state predicates have
+    /// been computed)
+    Index thread_start_row_;
+
+    /// A thread's starting column
+    Index thread_start_column_;
+
+    /// Internal state counter
+    int state_[3];
+
+    /// Scatter indices
+    int const* indices_;
+
+    //
+    // Static asserts about internal strides
+    //
+
+    static_assert(sizeof(extent_row_) == 4, "Expected 32b extents");
+    static_assert(sizeof(thread_start_row_) == 4, "Expected 32b extents");
+    static_assert(sizeof(PredicatedTileIteratorParams::stride) == 8, "Expected 64b strides");
+
+private:
+    //
+    // Methods
+    //
+
+public:
+    //
+    // Methods
+    //
+
+    /// Constructor
+    CUTLASS_DEVICE
+    PredicatedTileIteratorPrefetch(PredicatedTileIteratorParams const& params,
+                                   Element* pointer,
+                                   TensorCoord extent,
+                                   int thread_idx,
+                                   TensorCoord threadblock_offset = TensorCoord(),
+                                   int const* indices = nullptr)
+        : params_(params), indices_(indices)
+    {
+        TensorCoord thread_offset = ThreadMap::initial_offset(thread_idx) + threadblock_offset;
+
+        extent_row_ = extent.row();
+        extent_column_ = extent.column();
+
+        thread_start_row_ = thread_offset.row();
+        thread_start_column_ = thread_offset.column();
+
+        // Initialize predicates
+        CUTLASS_PRAGMA_UNROLL
+        for (int c = 0; c < ThreadMap::Iterations::kColumn; ++c) {
+            mask_.predicates[c] =
+                ((thread_offset.column() + ThreadMap::Delta::kColumn * c) < extent.column());
+        }
+
+        // Null pointer performs no accesses
+        if (!pointer) { mask_.clear(); }
+
+        if (ScatterD && !indices) { mask_.clear(); }
+
+        // Initialize pointer
+        byte_pointer_ = reinterpret_cast<uint8_t*>(pointer) +
+                        LongIndex(thread_offset.row()) * LongIndex(params_.stride) +
+                        LongIndex(thread_offset.column()) * sizeof(AccessType) / kElementsPerAccess;
+
+        if (ScatterD) {
+            byte_pointer_ =
+                reinterpret_cast<uint8_t*>(pointer) +
+                LongIndex(thread_offset.column()) * sizeof(AccessType) / kElementsPerAccess;
+        }
+
+        // Initialize internal state counter
+        state_[0] = state_[1] = state_[2] = 0;
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        byte_pointer_ += pointer_offset * sizeof_bits<Element>::value / 8;
+    }
+
+    CUTLASS_DEVICE
+    void prefetch_all()
+    {
+        CUTLASS_PRAGMA_UNROLL
+        for (int iter = 0; iter < kIterations; ++iter) {
+            prefetch();
+            ++(*this);
+        }
+    }
+
+    CUTLASS_DEVICE
+    void prefetch()
+    {
+        uint8_t* byte_pointer = byte_pointer_;
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
+                    int row_offset = row * ThreadMap::Delta::kRow +
+                                     group * ThreadMap::Delta::kGroup +
+                                     cluster * ThreadMap::Delta::kCluster;
+
+                    AccessType* memory_pointer = reinterpret_cast<AccessType*>(byte_pointer);
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
+                        // on windows using unsigned long here gives the error
+                        // error: asm operand type size(4) does not match
+                        // type/size implied by constraint 'l'
+                        uint64_t addr =
+                            (uint64_t)((void*)&memory_pointer[column * ThreadMap::Delta::kColumn /
+                                                              kElementsPerAccess]);
+                        asm volatile("prefetch.global.L1 [ %1 ];" : "=l"(addr) : "l"(addr));
+                    }
+
+                    if (row + 1 < ThreadMap::Iterations::kRow) {
+                        if (!ScatterD) { byte_pointer += params_.increment_row; }
+                    }
+                }
+
+                if (group + 1 < ThreadMap::Iterations::kGroup) {
+                    byte_pointer += params_.increment_group;
+                }
+            }
+
+            if (cluster + 1 < ThreadMap::Iterations::kCluster) {
+                byte_pointer += params_.increment_cluster;
+            }
+        }
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_byte_offset(Fragment& frag, int64_t byte_offset) const
+    {
+        uint8_t* byte_pointer = byte_pointer_;
+        AccessType* frag_ptr = reinterpret_cast<AccessType*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
+                    int frag_row_idx =
+                        (row + ThreadMap::Iterations::kRow *
+                                   (group + ThreadMap::Iterations::kGroup * cluster));
+
+                    int row_offset = row * ThreadMap::Delta::kRow +
+                                     group * ThreadMap::Delta::kGroup +
+                                     cluster * ThreadMap::Delta::kCluster;
+
+                    bool row_guard = ((row_offset + thread_start_row_) < extent_row_);
+
+                    AccessType* memory_pointer =
+                        reinterpret_cast<AccessType*>(byte_pointer + byte_offset);
+
+                    if (ScatterD && row_guard) {
+                        assert(indices_);
+
+                        memory_pointer = reinterpret_cast<AccessType*>(
+                            byte_pointer + byte_offset +
+                            LongIndex(indices_[row_offset + thread_start_row_]) *
+                                LongIndex(params_.stride));
+                    }
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
+                        bool guard = row_guard && mask_.predicates[column];
+
+                        cutlass::arch::global_load<AccessType, sizeof(AccessType)>(
+                            frag_ptr[frag_row_idx * ThreadMap::Iterations::kColumn + column],
+                            (void*)&memory_pointer[column * ThreadMap::Delta::kColumn /
+                                                   kElementsPerAccess],
+                            guard);
+                    }
+
+                    if (row + 1 < ThreadMap::Iterations::kRow) {
+                        if (!ScatterD) { byte_pointer += params_.increment_row; }
+                    }
+                }
+
+                if (group + 1 < ThreadMap::Iterations::kGroup) {
+                    byte_pointer += params_.increment_group;
+                }
+            }
+
+            if (cluster + 1 < ThreadMap::Iterations::kCluster) {
+                byte_pointer += params_.increment_cluster;
+            }
+        }
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) const { load_with_byte_offset(frag, 0); }
+
+    /// Stores a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, int64_t byte_offset) const
+    {
+        uint8_t* byte_pointer = byte_pointer_;
+        AccessType const* frag_ptr = reinterpret_cast<AccessType const*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
+                    int frag_row_idx =
+                        (row + ThreadMap::Iterations::kRow *
+                                   (group + ThreadMap::Iterations::kGroup * cluster));
+
+                    int row_offset = row * ThreadMap::Delta::kRow +
+                                     group * ThreadMap::Delta::kGroup +
+                                     cluster * ThreadMap::Delta::kCluster;
+
+                    bool row_guard = ((row_offset + thread_start_row_) < extent_row_);
+
+                    AccessType* memory_pointer =
+                        reinterpret_cast<AccessType*>(byte_pointer + byte_offset);
+
+                    if (ScatterD && row_guard) {
+                        assert(indices_);
+
+                        memory_pointer = reinterpret_cast<AccessType*>(
+                            byte_pointer + byte_offset +
+                            LongIndex(indices_[row_offset + thread_start_row_]) *
+                                LongIndex(params_.stride));
+                    }
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
+                        bool guard = row_guard && mask_.predicates[column];
+
+                        if (UseCUDAStore) {
+                            if (guard) {
+                                memory_pointer[column * ThreadMap::Delta::kColumn /
+                                               kElementsPerAccess] =
+                                    frag_ptr[frag_row_idx * ThreadMap::Iterations::kColumn +
+                                             column];
+                            }
+                        } else {
+                            cutlass::arch::global_store<AccessType, sizeof(AccessType)>(
+                                frag_ptr[frag_row_idx * ThreadMap::Iterations::kColumn + column],
+                                (void*)&memory_pointer[column * ThreadMap::Delta::kColumn /
+                                                       kElementsPerAccess],
+                                guard);
+                        }
+                    }
+
+                    if (row + 1 < ThreadMap::Iterations::kRow) {
+                        if (!ScatterD) { byte_pointer += params_.increment_row; }
+                    }
+                }
+
+                if (group + 1 < ThreadMap::Iterations::kGroup) {
+                    byte_pointer += params_.increment_group;
+                }
+            }
+
+            if (cluster + 1 < ThreadMap::Iterations::kCluster) {
+                byte_pointer += params_.increment_cluster;
+            }
+        }
+    }
+
+    /// Stores a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) const { store_with_byte_offset(frag, 0); }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void downsample_load_with_byte_offset(Fragment& frag,
+                                          int64_t byte_offset,
+                                          int convolution_P,
+                                          int convolution_Q,
+                                          int add_P,
+                                          int add_Q,
+                                          int problem_N) const
+    {
+        uint8_t* byte_pointer = byte_pointer_;
+        AccessType* frag_ptr = reinterpret_cast<AccessType*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
+                    int frag_row_idx =
+                        (row + ThreadMap::Iterations::kRow *
+                                   (group + ThreadMap::Iterations::kGroup * cluster));
+
+                    int row_offset = row * ThreadMap::Delta::kRow +
+                                     group * ThreadMap::Delta::kGroup +
+                                     cluster * ThreadMap::Delta::kCluster;
+
+                    bool row_guard = ((row_offset + thread_start_row_) < extent_row_);
+
+                    int output_row = row_offset + thread_start_row_;
+                    int output_N = output_row / (convolution_P * convolution_Q);
+                    int output_PQ = output_row % (convolution_P * convolution_Q);
+                    int output_P = output_PQ / convolution_Q;
+                    int output_Q = output_PQ % convolution_Q;
+
+                    int input_row = output_N * 2 * convolution_P * 2 * convolution_Q +
+                                    (2 * output_P + add_P) * 2 * convolution_Q + 2 * output_Q +
+                                    add_Q;
+
+                    int64_t byte_offset = (input_row - output_row) * problem_N * sizeof(float);
+
+                    AccessType* memory_pointer =
+                        reinterpret_cast<AccessType*>(byte_pointer + byte_offset);
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
+                        bool guard = row_guard && mask_.predicates[column];
+
+                        cutlass::arch::global_load<AccessType, sizeof(AccessType)>(
+                            frag_ptr[frag_row_idx * ThreadMap::Iterations::kColumn + column],
+                            (void*)&memory_pointer[column * ThreadMap::Delta::kColumn /
+                                                   kElementsPerAccess],
+                            guard);
+                    }
+
+                    if (row + 1 < ThreadMap::Iterations::kRow) {
+                        byte_pointer += params_.increment_row;
+                    }
+                }
+
+                if (group + 1 < ThreadMap::Iterations::kGroup) {
+                    byte_pointer += params_.increment_group;
+                }
+            }
+
+            if (cluster + 1 < ThreadMap::Iterations::kCluster) {
+                byte_pointer += params_.increment_cluster;
+            }
+        }
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void upsample_load_with_byte_offset(Fragment& frag,
+                                        int64_t byte_offset,
+                                        int convolution_P,
+                                        int convolution_Q,
+                                        int add_P,
+                                        int add_Q,
+                                        int problem_N) const
+    {
+        uint8_t* byte_pointer = byte_pointer_;
+        AccessType* frag_ptr = reinterpret_cast<AccessType*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
+                    int frag_row_idx =
+                        (row + ThreadMap::Iterations::kRow *
+                                   (group + ThreadMap::Iterations::kGroup * cluster));
+
+                    int row_offset = row * ThreadMap::Delta::kRow +
+                                     group * ThreadMap::Delta::kGroup +
+                                     cluster * ThreadMap::Delta::kCluster;
+
+                    bool row_guard = ((row_offset + thread_start_row_) < extent_row_);
+
+                    int output_row = row_offset + thread_start_row_;
+                    int output_N = output_row / (convolution_P * convolution_Q);
+                    int output_PQ = output_row % (convolution_P * convolution_Q);
+                    int output_P = output_PQ / convolution_Q;
+                    int output_Q = output_PQ % convolution_Q;
+                    int row_add_P = add_P;
+                    int row_add_Q = add_Q;
+                    if (output_P > convolution_P - 2) row_add_P = 0;
+                    if (output_Q > convolution_Q - 2) row_add_Q = 0;
+
+                    int input_row = output_N * (convolution_P / 2) * (convolution_Q / 2) +
+                                    ((output_P + row_add_P) / 2) * (convolution_Q / 2) +
+                                    (output_Q + row_add_Q) / 2;
+
+                    int64_t byte_offset = (input_row - output_row) * problem_N * sizeof(float);
+
+                    AccessType* memory_pointer =
+                        reinterpret_cast<AccessType*>(byte_pointer + byte_offset);
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
+                        bool guard = row_guard && mask_.predicates[column];
+
+                        cutlass::arch::global_load<AccessType, sizeof(AccessType)>(
+                            frag_ptr[frag_row_idx * ThreadMap::Iterations::kColumn + column],
+                            (void*)&memory_pointer[column * ThreadMap::Delta::kColumn /
+                                                   kElementsPerAccess],
+                            guard);
+                    }
+
+                    if (row + 1 < ThreadMap::Iterations::kRow) {
+                        byte_pointer += params_.increment_row;
+                    }
+                }
+
+                if (group + 1 < ThreadMap::Iterations::kGroup) {
+                    byte_pointer += params_.increment_group;
+                }
+            }
+
+            if (cluster + 1 < ThreadMap::Iterations::kCluster) {
+                byte_pointer += params_.increment_cluster;
+            }
+        }
+    }
+
+    CUTLASS_DEVICE
+    MatrixCoord thread_start() const
+    {
+        return MatrixCoord(thread_start_row_, thread_start_column_);
+    }
+
+    /// Need to get the thread start row from the tile iterator
+    CUTLASS_DEVICE
+    int32_t thread_start_row() const { return thread_start_row_; }
+
+    /// Need to get the thread start row from the tile iterator
+    CUTLASS_DEVICE
+    int32_t thread_start_column() const { return thread_start_column_; }
+
+    /// Extent of the matrix in rows
+    CUTLASS_DEVICE
+    Index extent_row() const { return extent_row_; }
+
+    /// Extent of the matrix in columns
+    CUTLASS_DEVICE
+    Index extent_column() const { return extent_column_; }
+
+    /// Advances to the next position to load or store
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorPrefetch& operator++()
+    {
+        ++state_[0];
+
+        if (!ScatterD) { byte_pointer_ += params_.advance_row; }
+
+        thread_start_row_ += ThreadMap::Shape::kRow;
+
+        if (state_[0] == ThreadMap::Count::kRow) {
+            state_[0] = 0;
+            ++state_[1];
+            byte_pointer_ += params_.advance_group;
+
+            thread_start_row_ +=
+                (ThreadMap::Shape::kGroup - 1) * ThreadMap::Shape::kRow * ThreadMap::Count::kRow;
+
+            if (state_[1] == ThreadMap::Count::kGroup) {
+                state_[1] = 0;
+                ++state_[2];
+                byte_pointer_ += params_.advance_cluster;
+
+                thread_start_row_ += ThreadMap::Count::kGroup * ThreadMap::Shape::kGroup *
+                                     ThreadMap::Count::kRow * ThreadMap::Shape::kRow;
+
+                if (state_[2] == ThreadMap::Count::kCluster) {
+                    state_[2] = 0;
+                    byte_pointer_ += params_.advance_tile;
+                }
+            }
+        }
+
+        return *this;
+    }
+
+    ///< Efficiently disables all accesses guarded by mask
+    CUTLASS_DEVICE void clear_mask() { mask_.clear(); }
+
+    ///< Efficiently enables all accesses guarded by mask
+    CUTLASS_DEVICE void enable_mask() { mask_.enable(); }
+
+    ///< Sets the mask
+    CUTLASS_DEVICE void get_mask(Mask& mask) const { mask = mask_; }
+
+    ///< Sets the mask
+    CUTLASS_DEVICE void set_mask(Mask const& mask) { mask_ = mask; }
+};
+
+template <typename IT>
+struct MakePrefetchableIterator {
+    using Iterator = PredicatedTileIteratorPrefetch<typename IT::ThreadMap, typename IT::Element>;
+};
+
+///////////////////////////////////////////////////////////////////////////////
+
+}  // namespace threadblock
+}  // namespace epilogue
+}  // namespace cutlass
+
+////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/iterators/make_residual_last.h

@@ -0,0 +1,91 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holdvr nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+#include "predicated_tile_access_iterator_residual_last.h"
+#include "predicated_tile_iterator_residual_last.h"
+
+namespace cutlass {
+namespace transform {
+namespace threadblock {
+
+template <typename BaseIterator>
+struct MakeIteratorResidualLast;
+
+template <typename Shape,
+          typename Element,
+          typename Layout,
+          int AdvanceRank,
+          typename ThreadMap,
+          int AccessSize,
+          bool Gather>
+struct MakeIteratorResidualLast<
+    PredicatedTileIterator<Shape, Element, Layout, AdvanceRank, ThreadMap, AccessSize, Gather>> {
+    using Iterator = PredicatedTileIteratorResidualLast<Shape,
+                                                        Element,
+                                                        Layout,
+                                                        AdvanceRank,
+                                                        ThreadMap,
+                                                        AccessSize,
+                                                        Gather>;
+};
+
+template <typename Shape,
+          typename Element,
+          typename Layout,
+          int AdvanceRank,
+          typename ThreadMap,
+          typename AccessType,
+          bool Gather>
+struct MakeIteratorResidualLast<PredicatedTileAccessIterator<Shape,
+                                                             Element,
+                                                             Layout,
+                                                             AdvanceRank,
+                                                             ThreadMap,
+                                                             AccessType,
+                                                             Gather>> {
+    using Iterator = PredicatedTileAccessIteratorResidualLast<Shape,
+                                                              Element,
+                                                              Layout,
+                                                              AdvanceRank,
+                                                              ThreadMap,
+                                                              AccessType,
+                                                              Gather>;
+};
+}  // namespace threadblock
+}  // namespace transform
+}  // namespace cutlass

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/iterators/predicated_tile_access_iterator_residual_last.h

@@ -0,0 +1,1964 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+    \brief Templates calculating the address and predicates to the load of tiles
+    from pitch-linear rank=2 tensors.
+
+    This iterator uses masks to guard out-of-bounds accesses. The first tile
+   this iterator visits maybe partial, then the remaining tiles are complete.
+   So, we only need to compute the predicates twice, once before the first tile
+   and once for the remaining full tiles which can share the same predicates.
+
+    A precomputed "Params" object minimizes the amount of state that must be
+    stored in registers, and integer addition is used to advance the pointer
+    through memory.
+*/
+
+#pragma once
+
+#include "cutlass/array.h"
+#include "cutlass/coord.h"
+#include "cutlass/cutlass.h"
+#include "cutlass/layout/matrix.h"
+#include "cutlass/layout/pitch_linear.h"
+#include "cutlass/matrix_shape.h"
+#include "cutlass/predicate_vector.h"
+#include "cutlass/tensor_ref.h"
+#include "cutlass/tensor_view.h"
+#include "cutlass/transform/threadblock/predicated_tile_access_iterator_params.h"
+
+////////////////////////////////////////////////////////////////////////////////
+
+////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+namespace transform {
+namespace threadblock {
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// PredicatedTileAccessIteratorResidualLast
+///
+template <typename Shape,
+          typename Element,
+          typename Layout,
+          int AdvanceRank,
+          typename ThreadMap,
+          typename AccessType,
+          bool Gather = false>
+class PredicatedTileAccessIteratorResidualLast;
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileAccessIteratorResidualLast for pitch-linear
+/// data.
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          typename AccessType_,
+          bool Gather>
+class PredicatedTileAccessIteratorResidualLast<Shape_,
+                                               Element_,
+                                               layout::PitchLinear,
+                                               AdvanceRank,
+                                               ThreadMap_,
+                                               AccessType_,
+                                               Gather> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::PitchLinear;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+    using AccessType = AccessType_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingPredicates = PredicatedTileAccessIteratorPredicates<Shape,
+                                                                        Element,
+                                                                        Layout,
+                                                                        AdvanceRank,
+                                                                        ThreadMap,
+                                                                        AccessType>;
+
+    static int const kAccessesPerVector = ThreadMap::kElementsPerAccess / AccessType::kElements;
+
+    static_assert(!(ThreadMap::kElementsPerAccess % AccessType::kElements),
+                  "Vectors implied by the thread map must be divisible by the access type.");
+
+    using Mask = typename UnderlyingPredicates::Mask;
+
+    /// Uses a non-template class
+    struct Params : PredicatedTileAccessIteratorParams {
+        using Base = PredicatedTileAccessIteratorParams;
+
+        // Default ctor
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout)
+            : Base(layout.stride(0),
+                   MakePredicatedTileAccessIteratorDesc<Shape,
+                                                        Element,
+                                                        Layout,
+                                                        kAdvanceRank,
+                                                        ThreadMap>()())
+        {
+        }
+
+        CUTLASS_HOST_DEVICE
+        Params(Base const& base) : Base(base) {}
+    };
+
+private:
+    /// Internal pointer type permits fast address arithmetic
+    using BytePointer = char*;
+
+private:
+    //
+    // Data members
+    //
+
+    UnderlyingPredicates the_predicates;
+    Mask residual_tile_mask;
+
+    /// Parameters object with precomputed internal state
+    Params params_;
+
+    /// Internal pointer to first access of tile
+    BytePointer pointer_;
+
+    /// Below is used when Gather is turned on.  We need to record strided_offset
+    /// and contiguous_offset separated to compute the offset by using
+    ///
+    /// offset = contiguous_offset + indices[strided_offset]
+    ///
+
+    /// Gather indices
+    int const* indices_;
+
+    Index gather_offset_strided;
+
+private:
+    /// Computes predicates based on internally tracked per-thread offset.
+    CUTLASS_DEVICE
+    void compute_predicates_(
+        /// Extent of the matrix window
+        TensorCoord extent,
+        /// optionally, simplify predicate calculation during 'steady state' phase
+        bool is_steady_state = false)
+    {
+        the_predicates.compute_predicates_(extent, is_steady_state);
+    }
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        /// Precomputed parameters object
+        Params const& params,
+        /// Pointer to start of tensor
+        Pointer pointer,
+        /// Extent of tensor
+        TensorCoord extent,
+        /// ID of each participating thread
+        int thread_id,
+        /// Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        /// Gather indices
+        int const* indices = nullptr)
+        : params_(params),
+          pointer_(reinterpret_cast<BytePointer>(const_cast<NonConstPointer>(pointer))),
+          the_predicates(extent),
+          indices_(indices)
+    {
+        the_predicates.set_predicates(thread_id, threadblock_offset);
+        the_predicates.get_mask(residual_tile_mask);
+
+        // Working around a weird compiler bug happening on P100 for the backward.
+        // I've seen together: the_predicates.predicates_[0] = 14 (instead of 15)
+        // residual_tile_mask[0] = 15 (correct)
+        //
+        // Adding prints when the value is calculated (in `compute_predicates_`)
+        // sometimes removes the bug. The consequence is that we skip some
+        // element of a tensor, leading to wrong results
+        // Setting `compute_predicates_`'s second argument (`is_steady_state`) to
+        // true also seems to get rid of the bug - at the cost of twice as many
+        // comparisons.
+#if !defined(__CUDA_ARCH__) || (__CUDA_ARCH__ >= 700)
+        constexpr bool kWorkAroundCompilerBug = false;
+#else
+        constexpr bool kWorkAroundCompilerBug = true;
+#endif
+        the_predicates.compute_predicates_(extent, true && !kWorkAroundCompilerBug);
+
+        // update internal pointers
+        Layout layout(params_.stride_);
+
+        if (!Gather) {
+            add_pointer_offset(layout(the_predicates.thread_offset_));
+        } else {
+            gather_offset_strided = the_predicates.thread_offset_.strided();
+            add_pointer_offset(layout(make_Coord(the_predicates.thread_offset_.contiguous(), 0)));
+        }
+    }
+
+    /// Construct a PredicatedTileAccessIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        /// Precomputed parameters object
+        Params const& params,
+        /// Pointer to start of tensor
+        Pointer pointer,
+        /// Extent of tensor
+        TensorCoord extent,
+        ///< ID of each participating thread
+        int thread_id)
+        : PredicatedTileAccessIteratorResidualLast(params,
+                                                   pointer,
+                                                   extent,
+                                                   thread_id,
+                                                   make_Coord(0, 0))
+    {
+    }
+
+    /// Overrides the internal iteration index
+    CUTLASS_HOST_DEVICE
+    void set_iteration_index(int index) { the_predicates.set_iteration_index(index); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool is_residual_tile)
+    {
+        if (is_residual_tile) { the_predicates.set_mask(residual_tile_mask); }
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        pointer_ += sizeof_bits<Element>::value * pointer_offset / 8;
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_DEVICE
+    void add_tile_offset(TensorCoord const& tile_offset)
+    {
+        if (!Gather) {
+            if (kAdvanceRank) {
+                pointer_ += params_.inc_advance_ * LongIndex(tile_offset.strided());
+                pointer_ += Shape::kContiguous * tile_offset.contiguous();
+            } else {
+                pointer_ += params_.inc_advance_ * LongIndex(tile_offset.contiguous());
+                pointer_ += Shape::kStrided * tile_offset.strided();
+            }
+        } else {
+            add_pointer_offset(Shape::kContiguous * tile_offset.contiguous());
+            gather_offset_strided += Shape::kStrided * tile_offset.strided();
+        }
+    }
+
+    /// Returns a pointer
+    CUTLASS_HOST_DEVICE
+    AccessType* get() const
+    {
+        if (Gather) {
+            assert(indices_);
+
+            if (!valid()) { return nullptr; }
+
+            LongIndex contiguous_offset =
+                the_predicates.iteration_contiguous_ *
+                    (ThreadMap::Delta::kContiguous * sizeof_bits<Element>::value / 8) +
+                the_predicates.iteration_vector_;
+            int strided_index = gather_offset_strided +
+                                the_predicates.iteration_strided_ * ThreadMap::Delta::kStrided;
+
+            LongIndex strided_offset = indices_[strided_index] * LongIndex(params_.stride_) *
+                                       sizeof_bits<Element>::value / 8;
+
+            return reinterpret_cast<AccessType*>(pointer_ + contiguous_offset + strided_offset);
+        }
+
+        return reinterpret_cast<AccessType*>(
+                   pointer_ + the_predicates.iteration_contiguous_ *
+                                  (ThreadMap::Delta::kContiguous * sizeof_bits<Element>::value) /
+                                  8) +
+               the_predicates.iteration_vector_;
+    }
+
+    /// Increment and return an instance to self.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast& operator++()
+    {
+        the_predicates.operator++();
+
+        ++the_predicates.iteration_vector_;
+        if (the_predicates.iteration_vector_ < kAccessesPerVector) { return *this; }
+
+        the_predicates.iteration_vector_ = 0;
+        ++the_predicates.iteration_contiguous_;
+
+        if (the_predicates.iteration_contiguous_ < ThreadMap::Iterations::kContiguous) {
+            return *this;
+        }
+
+        // Enter here only if (iteration_contiguous_ ==
+        // ThreadMap::Iteration::kContiguous)
+        the_predicates.iteration_contiguous_ = 0;
+        ++the_predicates.iteration_strided_;
+
+        if (the_predicates.iteration_strided_ < ThreadMap::Iterations::kStrided) {
+            if (!Gather) { pointer_ += params_.inc_strided_; }
+
+            return *this;
+        }
+
+        // Enter here only if (iteration_stride_ == ThreadMap::Iteration::kStrided)
+        // which means we enter the next tile.
+        the_predicates.iteration_strided_ = 0;
+
+        if (!Gather) {
+            // advance to next tile
+            pointer_ += params_.inc_next_;
+
+            // now return to start tile - if the iterator is subsequently advanced,
+            // this subtraction as well as the subsequent integer addition are both
+            // elided by the compiler.
+            pointer_ -= params_.inc_advance_;
+        }
+
+        return *this;
+    }
+
+    /// Increment and return an instance to self.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast operator++(int)
+    {
+        PredicatedTileAccessIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { the_predicates.clear_mask(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { the_predicates.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { the_predicates.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { the_predicates.get_mask(mask); }
+
+    /// Returns whether access is valid or not
+    CUTLASS_HOST_DEVICE
+    bool valid() const { return the_predicates.valid(); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileAccessIteratorResidualLast for column-major
+/// data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          typename AccessType_,
+          bool Gather>
+class PredicatedTileAccessIteratorResidualLast<Shape_,
+                                               Element_,
+                                               layout::ColumnMajor,
+                                               AdvanceRank,
+                                               ThreadMap_,
+                                               AccessType_,
+                                               Gather> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::ColumnMajor;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+    using AccessType = AccessType_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingIterator = PredicatedTileAccessIteratorResidualLast<
+        layout::PitchLinearShape<Shape::kRow, Shape::kColumn>,
+        Element,
+        layout::PitchLinear,
+        (kAdvanceRank == 0 ? 0 : 1),
+        ThreadMap,
+        AccessType,
+        Gather>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    static int const kAccessesPerVector = UnderlyingIterator::kAccessesPerVector;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileAccessIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        /// Default ctor
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout::PitchLinear(layout.stride(0))){};
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(typename UnderlyingIterator::Params::Base const& base) : params_(base) {}
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying pitch-linear tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        ///< Precomputed parameters object
+        Params const& params,
+        ///< Pointer to start of tensor
+        Pointer pointer,
+        ///< Extent of tensor
+        TensorCoord extent,
+        ///< ID of each participating thread
+        int thread_id,
+        ///< Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.row(), extent.column()),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.row(), threadblock_offset.column()),
+                    indices)
+    {
+    }
+
+    /// Construct a PredicatedTileAccessIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        Params const& params,  ///< Precomputed parameters object
+        Pointer pointer,       ///< Pointer to start of tensor
+        TensorCoord extent,    ///< Extent of tensor
+        int thread_id          ///< ID of each participating thread
+        )
+        : PredicatedTileAccessIteratorResidualLast(params,
+                                                   pointer,
+                                                   extent,
+                                                   thread_id,
+                                                   make_Coord(0, 0))
+    {
+    }
+
+    /// Overrides the internal iteration index
+    CUTLASS_HOST_DEVICE
+    void set_iteration_index(int index) { iterator_.set_iteration_index(index); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_HOST_DEVICE
+    void add_tile_offset(TensorCoord const& tile_offset)
+    {
+        iterator_.add_tile_offset({tile_offset.row(), tile_offset.column()});
+    }
+
+    /// Returns a pointer
+    CUTLASS_HOST_DEVICE
+    AccessType* get() const { return reinterpret_cast<AccessType*>(iterator_.get()); }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast operator++(int)
+    {
+        PredicatedTileAccessIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Returns whether access is valid or not
+    CUTLASS_HOST_DEVICE
+    bool valid() { return iterator_.valid(); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileAccessIteratorResidualLast for row-major
+/// data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          typename AccessType_,
+          bool Gather>
+class PredicatedTileAccessIteratorResidualLast<Shape_,
+                                               Element_,
+                                               layout::RowMajor,
+                                               AdvanceRank,
+                                               ThreadMap_,
+                                               AccessType_,
+                                               Gather> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::RowMajor;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+    using AccessType = AccessType_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingIterator = PredicatedTileAccessIteratorResidualLast<
+        layout::PitchLinearShape<Shape::kColumn, Shape::kRow>,
+        Element,
+        layout::PitchLinear,
+        (kAdvanceRank == 0 ? 1 : 0),
+        ThreadMap,
+        AccessType,
+        Gather>;
+
+    static int const kAccessesPerVector = UnderlyingIterator::kAccessesPerVector;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileAccessIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        /// Default ctor
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout::PitchLinear(layout.stride(0))){};
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(typename UnderlyingIterator::Params::Base const& base) : params_(base) {}
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying pitch-linear tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        ///< Precomputed parameters object
+        Params const& params,
+        ///< Pointer to start of tensor
+        Pointer pointer,
+        ///< Extent of tensor
+        TensorCoord extent,
+        ///< ID of each participating thread
+        int thread_id,
+        ///< Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        /// Gather indices
+        int const* indices = nullptr)
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.column(), extent.row()),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.column(), threadblock_offset.row()),
+                    indices)
+    {
+    }
+
+    /// Construct a PredicatedTileAccessIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        Params const& params,  ///< Precomputed parameters object
+        Pointer pointer,       ///< Pointer to start of tensor
+        TensorCoord extent,    ///< Extent of tensor
+        int thread_id          ///< ID of each participating thread
+        )
+        : PredicatedTileAccessIteratorResidualLast(params,
+                                                   pointer,
+                                                   extent,
+                                                   thread_id,
+                                                   make_Coord(0, 0))
+    {
+    }
+
+    /// Overrides the internal iteration index
+    CUTLASS_HOST_DEVICE
+    void set_iteration_index(int index) { iterator_.set_iteration_index(index); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_HOST_DEVICE
+    void add_tile_offset(TensorCoord const& tile_offset)
+    {
+        iterator_.add_tile_offset({tile_offset.column(), tile_offset.row()});
+    }
+
+    /// Returns a pointer
+    CUTLASS_HOST_DEVICE
+    AccessType* get() const { return reinterpret_cast<AccessType*>(iterator_.get()); }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast operator++(int)
+    {
+        PredicatedTileAccessIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Returns whether access is valid or not
+    CUTLASS_HOST_DEVICE
+    bool valid() { return iterator_.valid(); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileAccessIteratorResidualLast for affine rank 2
+/// data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          typename AccessType_>
+class PredicatedTileAccessIteratorResidualLast<Shape_,
+                                               Element_,
+                                               layout::AffineRankN<2>,
+                                               AdvanceRank,
+                                               ThreadMap_,
+                                               AccessType_,
+                                               false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::AffineRankN<2>;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+    using AccessType = AccessType_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingPredicates = PredicatedTileAccessIteratorPredicates<Shape,
+                                                                        Element,
+                                                                        layout::PitchLinear,
+                                                                        AdvanceRank,
+                                                                        ThreadMap,
+                                                                        AccessType>;
+
+    static int const kAccessesPerVector = ThreadMap::kElementsPerAccess / AccessType::kElements;
+
+    static_assert(!(ThreadMap::kElementsPerAccess % AccessType::kElements),
+                  "Vectors implied by the thread map must be divisible by the access type.");
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingPredicates::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    public:
+        friend PredicatedTileAccessIteratorResidualLast;
+
+    private:
+        /// stride of pitch-linear layout (units of Element)
+        Coord<Layout::kStrideRank, Layout::LongIndex> stride_;
+        /// amount (in byte) to increment pointer to move to next access along
+        /// contiguous dimension
+        LongIndex inc_contiguous_;
+        /// amount (in byte) to increment pointer from first access of current
+        /// contiguous dimension to first access of next one.
+        LongIndex inc_strided_;
+        /// amount (in byte) to increment pointer from last access of current
+        /// contiguous dimension to first access of next one.
+        LongIndex inc_next_strided_;
+        /// amount (in byte) to increment pointer from last access to first access
+        /// of next tile
+        LongIndex inc_next_;
+        /// amount (in byte) to increment pointer from first access of current tile
+        /// to first access of next tile
+        LongIndex inc_advance_;
+
+    public:
+        // Default ctor
+        CUTLASS_HOST_DEVICE
+        Params() : stride_(0), inc_contiguous_(0), inc_strided_(0), inc_next_(0), inc_advance_(0) {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : stride_({layout.stride(0), layout.stride(1)})
+        {
+            inc_contiguous_ = (LongIndex(stride_[0]) * ThreadMap::Delta::kContiguous) *
+                              sizeof_bits<Element>::value / 8;
+
+            inc_strided_ = (LongIndex(stride_[1]) * ThreadMap::Delta::kStrided) *
+                           sizeof_bits<Element>::value / 8;
+
+            inc_next_strided_ =
+                inc_strided_ - LongIndex(ThreadMap::Iterations::kContiguous - 1) * inc_contiguous_;
+
+            if (kAdvanceRank) {
+                // advance along strided dimension
+                inc_advance_ =
+                    Shape::kStrided * LongIndex(stride_[1]) * sizeof_bits<Element>::value / 8;
+            } else {
+                // advance along contiguous dimension
+                inc_advance_ = Shape::kContiguous * stride_[0] * sizeof_bits<Element>::value / 8;
+            }
+
+            inc_next_ = inc_advance_ -
+                        LongIndex(ThreadMap::Iterations::kContiguous - 1) * inc_contiguous_ -
+                        LongIndex(ThreadMap::Iterations::kStrided - 1) * inc_strided_;
+        };
+    };
+
+private:
+    /// Internal pointer type permits fast address arithmetic
+    using BytePointer = char*;
+
+    //
+    // Data members
+    //
+
+    /// Parameters object with precomputed internal state
+    Params params_;
+
+    /// Internal pointer to first access of tile
+    BytePointer pointer_;
+
+    UnderlyingPredicates the_predicates;
+    Mask residual_tile_mask;
+
+private:
+    /// Computes predicates based on internally tracked per-thread offset.
+    CUTLASS_DEVICE
+    void compute_predicates_(
+        /// Extent of the matrix window
+        TensorCoord extent,
+        /// optionally, simplify predicate calculation during 'steady state' phase
+        bool is_steady_state = false)
+    {
+        the_predicates.compute_predicates_(extent, is_steady_state);
+    }
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        ///< Precomputed parameters object
+        Params const& params,
+        ///< Pointer to start of tensor
+        Pointer pointer,
+        ///< Extent of tensor
+        TensorCoord extent,
+        ///< ID of each participating thread
+        int thread_id,
+        ///< Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : params_(params),
+          pointer_(reinterpret_cast<BytePointer>(const_cast<NonConstPointer>(pointer))),
+          the_predicates(extent)
+    {
+        the_predicates.set_predicates(thread_id, threadblock_offset);
+
+        // update internal pointers
+        Layout layout(params_.stride_);
+        add_pointer_offset(layout(the_predicates.thread_offset_));
+    }
+
+    /// Construct a PredicatedTileAccessIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        Params const& params,  ///< Precomputed parameters object
+        Pointer pointer,       ///< Pointer to start of tensor
+        TensorCoord extent,    ///< Extent of tensor
+        int thread_id          ///< ID of each participating thread
+        )
+        : PredicatedTileAccessIteratorResidualLast(params,
+                                                   pointer,
+                                                   extent,
+                                                   thread_id,
+                                                   make_Coord(0, 0))
+    {
+    }
+
+    /// Overrides the internal iteration index
+    CUTLASS_HOST_DEVICE
+    void set_iteration_index(int index) { the_predicates.set_iteration_index(index); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool is_residual_tile)
+    {
+        if (is_residual_tile) { the_predicates.set_mask(residual_tile_mask); }
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        pointer_ += sizeof_bits<Element>::value * pointer_offset / 8;
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_HOST_DEVICE
+    void add_tile_offset(TensorCoord const& tile_offset)
+    {
+        if (kAdvanceRank) {
+            pointer_ += params_.inc_advance_ * LongIndex(tile_offset[1]);
+            pointer_ += Shape::kContiguous * tile_offset[0];
+        } else {
+            pointer_ += params_.inc_advance_ * LongIndex(tile_offset[0]);
+            pointer_ += Shape::kStrided * tile_offset[1];
+        }
+    }
+
+    /// Returns a pointer
+    CUTLASS_HOST_DEVICE
+    AccessType* get() const
+    {
+        return reinterpret_cast<AccessType*>(pointer_) + the_predicates.iteration_vector_;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast& operator++()
+    {
+        the_predicates.operator++();
+        ++the_predicates.iteration_vector_;
+        if (the_predicates.iteration_vector_ < kAccessesPerVector) { return *this; }
+
+        the_predicates.iteration_vector_ = 0;
+        ++the_predicates.iteration_contiguous_;
+
+        if (the_predicates.iteration_contiguous_ < ThreadMap::Iterations::kContiguous) {
+            pointer_ += params_.inc_contiguous_;
+            return *this;
+        }
+
+        // Enter here only if (iteration_contiguous_ ==
+        // ThreadMap::Iteration::kContiguous)
+        the_predicates.iteration_contiguous_ = 0;
+        ++the_predicates.iteration_strided_;
+
+        if (the_predicates.iteration_strided_ < ThreadMap::Iterations::kStrided) {
+            pointer_ += params_.inc_next_strided_;
+            return *this;
+        }
+
+        // Enter here only if (iteration_stride_ == ThreadMap::Iteration::kStrided)
+        // which means we enter the next tile.
+        the_predicates.iteration_strided_ = 0;
+
+        // advance to next tile
+        pointer_ += params_.inc_next_;
+
+        // now return to start tile - if the iterator is subsequently advanced, this
+        // subtraction as well as the subsequent integer addition are both elided by
+        // the compiler.
+        pointer_ -= params_.inc_advance_;
+
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast operator++(int)
+    {
+        PredicatedTileAccessIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { the_predicates.clear_mask(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { the_predicates.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { the_predicates.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { the_predicates.get_mask(mask); }
+
+    /// Returns whether access is valid or not
+    CUTLASS_HOST_DEVICE
+    bool valid() { return the_predicates.valid(); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileAccessIteratorResidualLast for affine rank 2
+/// column-major data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          typename AccessType_>
+class PredicatedTileAccessIteratorResidualLast<Shape_,
+                                               Element_,
+                                               layout::AffineRank2ColumnMajor,
+                                               AdvanceRank,
+                                               ThreadMap_,
+                                               AccessType_,
+                                               false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::AffineRank2ColumnMajor;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+    using AccessType = AccessType_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    // Map to the underlying AffineRankN<2> layout
+    using UnderlyingIterator = PredicatedTileAccessIteratorResidualLast<
+        layout::PitchLinearShape<Shape::kRow, Shape::kColumn>,
+        Element,
+        layout::AffineRankN<2>,
+        (kAdvanceRank == 0 ? 0 : 1),
+        ThreadMap,
+        AccessType>;
+
+    static int const kAccessesPerVector = UnderlyingIterator::kAccessesPerVector;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileAccessIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        /// Default ctor
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given an AffineRankN<2> tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout)
+            : params_(layout::AffineRankN<2>(layout.stride(0), layout.stride(1))){};
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying AffineRankN<2> tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        ///< Precomputed parameters object
+        Params const& params,
+        ///< Pointer to start of tensor
+        Pointer pointer,
+        ///< Extent of tensor
+        TensorCoord extent,
+        ///< ID of each participating thread
+        int thread_id,
+        ///< Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.row(), extent.column()),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.row(), threadblock_offset.column()))
+    {
+    }
+
+    /// Construct a PredicatedTileAccessIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        Params const& params,  ///< Precomputed parameters object
+        Pointer pointer,       ///< Pointer to start of tensor
+        TensorCoord extent,    ///< Extent of tensor
+        int thread_id          ///< ID of each participating thread
+        )
+        : PredicatedTileAccessIteratorResidualLast(params,
+                                                   pointer,
+                                                   extent,
+                                                   thread_id,
+                                                   make_Coord(0, 0))
+    {
+    }
+
+    /// Overrides the internal iteration index
+    CUTLASS_HOST_DEVICE
+    void set_iteration_index(int index) { iterator_.set_iteration_index(index); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_HOST_DEVICE
+    void add_tile_offset(TensorCoord const& tile_offset)
+    {
+        iterator_.add_tile_offset(make_Coord(tile_offset.row(), tile_offset.column()));
+    }
+
+    /// Returns a pointer
+    CUTLASS_HOST_DEVICE
+    AccessType* get() const { return reinterpret_cast<AccessType*>(iterator_.get()); }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast operator++(int)
+    {
+        PredicatedTileAccessIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Returns whether access is valid or not
+    CUTLASS_HOST_DEVICE
+    bool valid() { return iterator_.valid(); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileAccessIteratorResidualLast for affine rank-2
+/// row-major data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          typename AccessType_>
+class PredicatedTileAccessIteratorResidualLast<Shape_,
+                                               Element_,
+                                               layout::AffineRank2RowMajor,
+                                               AdvanceRank,
+                                               ThreadMap_,
+                                               AccessType_,
+                                               false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::AffineRank2RowMajor;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+    using AccessType = AccessType_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    // Map to the underlying AffineRankN<2> layout
+    using UnderlyingIterator = PredicatedTileAccessIteratorResidualLast<
+        layout::PitchLinearShape<Shape::kColumn, Shape::kRow>,
+        Element,
+        layout::AffineRankN<2>,
+        (kAdvanceRank == 0 ? 1 : 0),
+        ThreadMap,
+        AccessType>;
+
+    static int const kAccessesPerVector = UnderlyingIterator::kAccessesPerVector;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileAccessIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        /// Default ctor
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given an AffineRankN<2> tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout)
+            : params_(layout::AffineRankN<2>(layout.stride(1), layout.stride(0))){};
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying AffineRankN<2> tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        ///< Precomputed parameters object
+        Params const& params,
+        ///< Pointer to start of tensor
+        Pointer pointer,
+        ///< Extent of tensor
+        TensorCoord extent,
+        ///< ID of each participating thread
+        int thread_id,
+        ///< Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.column(), extent.row()),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.column(), threadblock_offset.row()))
+    {
+    }
+
+    /// Construct a PredicatedTileAccessIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        Params const& params,  ///< Precomputed parameters object
+        Pointer pointer,       ///< Pointer to start of tensor
+        TensorCoord extent,    ///< Extent of tensor
+        int thread_id          ///< ID of each participating thread
+        )
+        : PredicatedTileAccessIteratorResidualLast(params,
+                                                   pointer,
+                                                   extent,
+                                                   thread_id,
+                                                   make_Coord(0, 0))
+    {
+    }
+
+    /// Overrides the internal iteration index
+    CUTLASS_HOST_DEVICE
+    void set_iteration_index(int index) { iterator_.set_iteration_index(index); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_HOST_DEVICE
+    void add_tile_offset(TensorCoord const& tile_offset)
+    {
+        iterator_.add_tile_offset(make_Coord(tile_offset.column(), tile_offset.row()));
+    }
+
+    /// Returns a pointer
+    CUTLASS_HOST_DEVICE
+    AccessType* get() const { return reinterpret_cast<AccessType*>(iterator_.get()); }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast operator++(int)
+    {
+        PredicatedTileAccessIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Returns whether access is valid or not
+    CUTLASS_HOST_DEVICE
+    bool valid() { return iterator_.valid(); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileAccessIteratorResidualLast for column-major
+/// interleaved data. It is mapped to the congruous layout.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          typename AccessType_,
+          int InterleavedK>
+class PredicatedTileAccessIteratorResidualLast<Shape_,
+                                               Element_,
+                                               layout::ColumnMajorInterleaved<InterleavedK>,
+                                               AdvanceRank,
+                                               ThreadMap_,
+                                               AccessType_,
+                                               false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    static int const kInterleavedK = InterleavedK;
+    using Layout = layout::ColumnMajorInterleaved<kInterleavedK>;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+    using AccessType = AccessType_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingIterator = PredicatedTileAccessIteratorResidualLast<
+        layout::PitchLinearShape<Shape::kRow * kInterleavedK, Shape::kColumn / kInterleavedK>,
+        Element,
+        layout::PitchLinear,
+        (kAdvanceRank == 0 ? 0 : 1),
+        ThreadMap,
+        AccessType>;
+
+    static int const kAccessesPerVector = UnderlyingIterator::kAccessesPerVector;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileAccessIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout::PitchLinear(layout.stride(0))) {}
+
+        CUTLASS_HOST_DEVICE
+        Params(typename UnderlyingIterator::Params::Base const& base) : params_(base) {}
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying pitch-linear tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        /// Precomputed parameters object
+        Params const& params,
+        /// Pointer to start of tensor
+        Pointer pointer,
+        /// Extent of tensor
+        TensorCoord extent,
+        /// ID of each participating thread
+        int thread_id,
+        /// Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.row() * kInterleavedK,
+                                             extent.column() / kInterleavedK),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.row() * kInterleavedK,
+                                             threadblock_offset.column() / kInterleavedK))
+    {
+    }
+
+    /// Construct a PredicatedTileAccessIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        Params const& params,  ///< Precomputed parameters object
+        Pointer pointer,       ///< Pointer to start of tensor
+        TensorCoord extent,    ///< Extent of tensor
+        int thread_id          ///< ID of each participating thread
+        )
+        : PredicatedTileAccessIteratorResidualLast(params,
+                                                   pointer,
+                                                   extent,
+                                                   thread_id,
+                                                   make_Coord(0, 0))
+    {
+    }
+
+    /// Overrides the internal iteration index
+    CUTLASS_HOST_DEVICE
+    void set_iteration_index(int index) { iterator_.set_iteration_index(index); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_HOST_DEVICE
+    void add_tile_offset(TensorCoord const& tile_offset)
+    {
+        iterator_.add_tile_offset({tile_offset.row(), tile_offset.column()});
+    }
+
+    /// Returns a pointer
+    CUTLASS_HOST_DEVICE
+    AccessType* get() const { return reinterpret_cast<AccessType*>(iterator_.get()); }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast operator++(int)
+    {
+        PredicatedTileAccessIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Returns whether access is valid or not
+    CUTLASS_HOST_DEVICE
+    bool valid() { return iterator_.valid(); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileAccessIteratorResidualLast for row-major
+/// interleaved data.
+//  It is mapped to the congruous layout.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          typename AccessType_,
+          int InterleavedK>
+class PredicatedTileAccessIteratorResidualLast<Shape_,
+                                               Element_,
+                                               layout::RowMajorInterleaved<InterleavedK>,
+                                               AdvanceRank,
+                                               ThreadMap_,
+                                               AccessType_,
+                                               false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    static int const kInterleavedK = InterleavedK;
+    using Layout = layout::RowMajorInterleaved<kInterleavedK>;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+    using AccessType = AccessType_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingIterator = PredicatedTileAccessIteratorResidualLast<
+        layout::PitchLinearShape<Shape::kColumn * kInterleavedK, Shape::kRow / kInterleavedK>,
+        Element,
+        layout::PitchLinear,
+        (kAdvanceRank == 0 ? 1 : 0),
+        ThreadMap,
+        AccessType>;
+
+    static int const kAccessesPerVector = UnderlyingIterator::kAccessesPerVector;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileAccessIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout::PitchLinear(layout.stride(0))) {}
+
+        CUTLASS_HOST_DEVICE
+        Params(typename UnderlyingIterator::Params::Base const& base) : params_(base) {}
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying pitch-linear tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        /// Precomputed parameters object
+        Params const& params,
+        /// Pointer to start of tensor
+        Pointer pointer,
+        /// Extent of tensor
+        TensorCoord extent,
+        /// ID of each participating thread
+        int thread_id,
+        /// Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.column() * kInterleavedK,
+                                             extent.row() / kInterleavedK),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.column() * kInterleavedK,
+                                             threadblock_offset.row() / kInterleavedK))
+    {
+    }
+
+    /// Construct a PredicatedTileAccessIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast(
+        Params const& params,  ///< Precomputed parameters object
+        Pointer pointer,       ///< Pointer to start of tensor
+        TensorCoord extent,    ///< Extent of tensor
+        int thread_id          ///< ID of each participating thread
+        )
+        : PredicatedTileAccessIteratorResidualLast(params,
+                                                   pointer,
+                                                   extent,
+                                                   thread_id,
+                                                   make_Coord(0, 0))
+    {
+    }
+
+    /// Overrides the internal iteration index
+    CUTLASS_HOST_DEVICE
+    void set_iteration_index(int index) { iterator_.set_iteration_index(index); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_HOST_DEVICE
+    void add_tile_offset(TensorCoord const& tile_offset)
+    {
+        iterator_.add_tile_offset({tile_offset.column(), tile_offset.row()});
+    }
+
+    /// Returns a pointer
+    CUTLASS_HOST_DEVICE
+    AccessType* get() const { return reinterpret_cast<AccessType*>(iterator_.get()); }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileAccessIteratorResidualLast operator++(int)
+    {
+        PredicatedTileAccessIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Returns whether access is valid or not
+    CUTLASS_HOST_DEVICE
+    bool valid() { return iterator_.valid(); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace threadblock
+}  // namespace transform
+}  // namespace cutlass
+
+////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/iterators/predicated_tile_iterator_atomic.h

@@ -0,0 +1,886 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+#include <cutlass/cutlass.h>
+#include <cutlass/epilogue/threadblock/predicated_tile_iterator.h>
+#include <cutlass/tensor_coord.h>
+namespace cutlass {
+namespace epilogue {
+namespace threadblock {
+
+template <class AccessType, class Enable = void>
+struct atomic_store {};
+
+template <class AccessType>
+struct atomic_store<AccessType,
+                    typename platform::enable_if<
+                        platform::is_same<typename AccessType::Element, half_t>::value>::type> {
+    using Element = typename AccessType::Element;
+    static const int kCount = AccessType::kElements;
+
+    CUTLASS_DEVICE
+    atomic_store(AccessType const& D, void* ptr, bool pred_guard)
+    {
+        static_assert(!(kCount % 2), "kCount must be even");
+        half2* p = reinterpret_cast<half2*>(ptr);
+        uint const* data = reinterpret_cast<uint const*>(&D);
+        asm volatile(
+            "{\n"
+            "  .reg .pred p;\n"
+            "  setp.ne.b32 p, %0, 0;\n"
+            :
+            : "r"((int)pred_guard));
+        for (int i = 0; i < kCount / 2; i++) {
+            asm volatile("  @p red.relaxed.global.add.noftz.f16x2  [%0], %1;\n"
+                         :
+                         : "l"(p + i), "r"(data[i]));
+        }
+        asm volatile("}\n" ::);
+    }
+};
+
+template <class AccessType>
+struct atomic_store<AccessType,
+                    typename platform::enable_if<
+                        platform::is_same<typename AccessType::Element, float>::value>::type> {
+    using Element = typename AccessType::Element;
+    static const int kCount = AccessType::kElements;
+
+    CUTLASS_DEVICE
+    atomic_store(AccessType const& D, void* ptr, bool pred_guard)
+    {
+        Element* p = reinterpret_cast<Element*>(ptr);
+        uint const* data = reinterpret_cast<uint const*>(&D);
+        asm volatile(
+            "{\n"
+            "  .reg .pred p;\n"
+            "  setp.ne.b32 p, %0, 0;\n"
+            :
+            : "r"((int)pred_guard));
+        for (int i = 0; i < kCount; i++) {
+            asm volatile("  @p red.relaxed.global.add.f32  [%0], %1;\n"
+                         :
+                         : "l"(p + i), "r"(data[i]));
+        }
+        asm volatile("}\n" ::);
+    }
+};
+
+template <typename ThreadMap_,  ///< Thread map (conept: OutputTileThreadMap)
+          typename Element_,    ///< Element data type
+          int Rank>
+class PredicatedTileIteratorAffineRankNAtomic {
+public:
+    using ThreadMap = ThreadMap_;
+    using Shape = typename ThreadMap::Shape;
+
+    using Element = Element_;
+
+    using Layout = layout::AffineRankN<Rank>;
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using ConstTensorRef = typename TensorRef::ConstTensorRef;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    static int const kElementsPerAccess = ThreadMap::kElementsPerAccess;
+    static int const kThreads = ThreadMap::kThreads;
+    static int const kIterations = ThreadMap::Count::kTile;
+
+    static_assert(ThreadMap::Iterations::kRow > 0, "ThreadMap::Iterations::kRow must be > 0");
+    static_assert(ThreadMap::Iterations::kGroup > 0, "ThreadMap::Iterations::kGroup must be > 0");
+    static_assert(ThreadMap::Iterations::kCluster > 0,
+                  "ThreadMap::Iterations::kCluster must be > 0");
+    static_assert(ThreadMap::Iterations::kColumn > 0, "ThreadMap::Iterations::kColumn must be > 0");
+    static_assert(!(Layout::kRank % 2),
+                  "Layout rank must be even. This assumes the first half of the "
+                  "modes correspond to the 'row' "
+                  "and the second half of the modes correspond to the 'column'");
+
+    static bool const kBigEndian = false;
+
+    /// Fragment object
+    using Fragment = Array<Element,
+                           ThreadMap::Iterations::kColumn * ThreadMap::Iterations::kRow *
+                               ThreadMap::Iterations::kGroup * ThreadMap::Iterations::kCluster *
+                               ThreadMap::kElementsPerAccess>;
+
+    /// Memory access size
+    using AccessType = AlignedArray<Element, ThreadMap::kElementsPerAccess>;
+
+    //
+    // Parameters struct
+    //
+
+    /// Parameters structure
+    struct Params {
+        //
+        // Data members
+        //
+
+        Layout layout;
+
+        /// Stride in units of bytes along M modes
+        Coord<Layout::kRank / 2, typename Layout::LongIndex> stride_m;
+
+        /// Stride in units of bytes along N modes
+        Coord<Layout::kRank / 2, typename Layout::LongIndex> stride_n;
+
+        /// Fast divmod objects divided by tensor extents
+        FastDivmod divmod_m[(Layout::kRank == 2) ? 1 : (Layout::kRank / 2 - 1)];
+
+        /// Fast divmod objects divided by tensor extents
+        FastDivmod divmod_n[(Layout::kRank == 2) ? 1 : (Layout::kRank / 2 - 1)];
+
+        int64_t rank2_inc_col;
+        int64_t rank2_inc_row;
+
+        //
+        // Methods
+        //
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        CUTLASS_HOST_DEVICE
+        Params(TensorCoord const& extent, Layout const& layout_) : layout(layout_)
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < Layout::kRank / 2; ++i) {
+                stride_m[i] = OffsetBytes<Element>(layout_.stride()[i]);
+                stride_n[i] = OffsetBytes<Element>(layout_.stride()[i + Layout::kRank / 2]);
+            }
+
+            if (kBigEndian) {
+                // "Big Endian" scheme
+                CUTLASS_PRAGMA_UNROLL
+                for (int i = 0; i < Layout::kRank / 2 - 1; ++i) {
+                    divmod_m[i] = FastDivmod(extent[i + 1]);
+                    divmod_n[i] = FastDivmod(extent[i + Layout::kRank / 2 + 1]);
+                }
+            } else {
+                // "Little Endian" scheme
+                CUTLASS_PRAGMA_UNROLL
+                for (int i = 0; i < Layout::kRank / 2 - 1; ++i) {
+                    divmod_m[i] = FastDivmod(extent[i]);
+                    divmod_n[i] = FastDivmod(extent[i + Layout::kRank / 2]);
+                }
+            }
+        }
+
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout_) : layout(layout_)
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < Layout::kRank / 2; ++i) {
+                stride_m[i] = OffsetBytes<Element>(layout_.stride()[i]);
+                stride_n[i] = OffsetBytes<Element>(layout_.stride()[i + Layout::kRank / 2]);
+            }
+
+            rank2_inc_col = ThreadMap::Delta::kColumn * stride_n[0];
+            rank2_inc_row = ThreadMap::Delta::kRow * stride_m[0];
+        }
+    };
+
+    /// Mask object
+    struct Mask {
+        static int const kCount = ThreadMap::Iterations::kColumn;
+
+        /// Predicate state
+        bool predicates[kCount];
+
+        //
+        // Mask
+        //
+        CUTLASS_HOST_DEVICE
+        Mask() { enable(); }
+
+        ///< Efficiently disables all accesses guarded by mask
+        CUTLASS_HOST_DEVICE void clear()
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < kCount; ++i) { predicates[i] = false; }
+        }
+
+        ///< CUTLASS_HOST_DEVICE enables all accesses guarded by mask
+        CUTLASS_DEVICE void enable()
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < kCount; ++i) { predicates[i] = true; }
+        }
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Parameters structure containing reference and precomputed state.
+    Params params_;
+
+    /// Byte-level pointer
+    uint8_t* byte_pointer_;
+
+    /// Array of boolean values to contain steady-state predicates
+    Mask mask_;
+
+    /// Extent of the matrix tile in rows
+    Index extent_row_;
+
+    /// Extent of the matrix tile in columns
+    Index extent_col_;
+
+    /// A thread's starting row position (assuming steady-state predicates have
+    /// been computed)
+    Index thread_start_row_;
+
+    /// A thread's starting column position (assuming steady-state predicates have
+    /// been computed)
+    Index thread_start_column_;
+
+    /// Internal state counter
+    int state_[3];
+
+    /// Offsets in columns, cached for performance
+    int64_t offset_modes_n_[ThreadMap::Iterations::kColumn];
+
+    //
+    // Static asserts about internal strides
+    //
+
+    static_assert(sizeof(extent_row_) == 4, "Expected 32b extents");
+    static_assert(sizeof(thread_start_row_) == 4, "Expected 32b extents");
+
+private:
+    //
+    // Methods
+    //
+
+public:
+    //
+    // Methods
+    //
+
+    /// Constructor
+    CUTLASS_DEVICE
+    PredicatedTileIteratorAffineRankNAtomic(
+        Params const& params,
+        Element* pointer,
+        MatrixCoord extent,
+        int thread_idx,
+        MatrixCoord threadblock_offset = MatrixCoord(),
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : params_(params)
+    {
+        MatrixCoord thread_offset = ThreadMap::initial_offset(thread_idx) + threadblock_offset;
+
+        extent_row_ = extent.row();
+        extent_col_ = extent.column();
+
+        thread_start_row_ = thread_offset.row();
+        thread_start_column_ = thread_offset.column();
+
+        if (Layout::kRank > 2) {
+            // Initialize predicates
+            CUTLASS_PRAGMA_UNROLL
+            for (int c = 0; c < ThreadMap::Iterations::kColumn; ++c) {
+                //
+                // Compute coordinate and decompose into N modes
+                //
+
+                int coord_n = thread_start_column_ + c * ThreadMap::Delta::kColumn;
+
+                mask_.predicates[c] = coord_n < extent.column();
+
+                Coord<Layout::kRank / 2, Index> modes_n;
+
+                int64_t offset_modes_n = 0;
+
+                if (kBigEndian) {
+                    modes_n = CoordinateDecomposition<Layout::kRank / 2>(coord_n, params_.divmod_n);
+
+                    offset_modes_n = dot(modes_n, params_.stride_n);
+                } else {
+                    modes_n = CoordinateDecompositionLittleEndian<Layout::kRank / 2>(
+                        coord_n, params_.divmod_n);
+
+                    offset_modes_n = dot(modes_n, params_.stride_n);
+                }
+
+                offset_modes_n_[c] = offset_modes_n;
+            }
+
+            if (!pointer) { mask_.clear(); }
+        }
+
+        // Initialize pointer
+        byte_pointer_ = reinterpret_cast<uint8_t*>(pointer);
+
+        // Initialize internal state counter
+        state_[0] = state_[1] = state_[2] = 0;
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        byte_pointer_ += pointer_offset * sizeof_bits<Element>::value / 8;
+    }
+
+    /// Stores a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, int64_t byte_offset)
+    {
+        uint8_t* byte_pointer = byte_pointer_;
+        AccessType const* frag_ptr = reinterpret_cast<AccessType const*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
+                int row_begin = thread_start_row_ + group * ThreadMap::Delta::kGroup +
+                                cluster * ThreadMap::Delta::kCluster;
+                int64_t offset_modes_m = row_begin * params_.stride_m[0];
+
+                CUTLASS_PRAGMA_UNROLL
+                for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
+                    int frag_row_idx =
+                        (row + ThreadMap::Iterations::kRow *
+                                   (group + ThreadMap::Iterations::kGroup * cluster));
+
+                    //
+                    // Compute coordinate and decompose into M modes
+                    //
+
+                    int coord_m = row * ThreadMap::Delta::kRow + row_begin;
+
+                    Coord<Layout::kRank / 2, Index> modes_m;
+
+                    if (Layout::kRank > 2) {
+                        if (kBigEndian) {
+                            modes_m = CoordinateDecomposition<Layout::kRank / 2>(coord_m,
+                                                                                 params_.divmod_m);
+                        } else {
+                            modes_m = CoordinateDecompositionLittleEndian<Layout::kRank / 2>(
+                                coord_m, params_.divmod_m);
+                        }
+
+                        offset_modes_m = dot(modes_m, params_.stride_m);
+                    }
+
+                    //
+                    // Compute the offset due to modes M
+                    //
+
+                    bool row_guard = (coord_m < extent_row_);
+                    int64_t offset_modes_n = thread_start_column_ * params_.stride_n[0];
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
+                        //
+                        // Compute coordinate and decompose into N modes
+                        //
+
+                        if (Layout::kRank > 2) { offset_modes_n = offset_modes_n_[column]; }
+
+                        //
+                        // Compute the pointer and access
+                        //
+                        bool guard;
+                        if (Layout::kRank > 2) {
+                            guard = row_guard && mask_.predicates[column];
+                        } else {
+                            guard = (coord_m < extent_row_) &&
+                                    ((thread_start_column_ + ThreadMap::Delta::kColumn * column) <
+                                     extent_col_);
+                        }
+
+                        atomic_store<AccessType>(
+                            frag_ptr[frag_row_idx * ThreadMap::Iterations::kColumn + column],
+                            (void*)(byte_pointer + offset_modes_m + offset_modes_n + byte_offset),
+                            guard);
+
+                        if (Layout::kRank == 2) { offset_modes_n += params_.rank2_inc_col; }
+                    }
+
+                    if (Layout::kRank == 2) { offset_modes_m += params_.rank2_inc_row; }
+                }
+            }
+        }
+    }
+
+    /// Stores a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_byte_offset(frag, 0); }
+
+    CUTLASS_DEVICE
+    void load(Fragment& frag) {}
+
+    /// Advances to the next position to load or store
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorAffineRankNAtomic& operator++()
+    {
+        ++state_[0];
+        thread_start_row_ += ThreadMap::Shape::kRow;
+
+        if (state_[0] == ThreadMap::Count::kRow) {
+            state_[0] = 0;
+            ++state_[1];
+
+            thread_start_row_ +=
+                (ThreadMap::Shape::kGroup - 1) * ThreadMap::Shape::kRow * ThreadMap::Count::kRow;
+
+            if (state_[1] == ThreadMap::Count::kGroup) {
+                state_[1] = 0;
+                ++state_[2];
+
+                thread_start_row_ += ThreadMap::Count::kGroup * ThreadMap::Shape::kGroup *
+                                     ThreadMap::Count::kRow * ThreadMap::Shape::kRow;
+
+                if (state_[2] == ThreadMap::Count::kCluster) { state_[2] = 0; }
+            }
+        }
+
+        return *this;
+    }
+
+    ///< Efficiently disables all accesses guarded by mask
+    CUTLASS_DEVICE void clear_mask() { mask_.clear(); }
+
+    ///< Efficiently enables all accesses guarded by mask
+    CUTLASS_DEVICE void enable_mask() { mask_.enable(); }
+
+    ///< Sets the mask
+    CUTLASS_DEVICE void get_mask(Mask& mask) { mask = mask_; }
+
+    ///< Sets the mask
+    CUTLASS_DEVICE void set_mask(Mask const& mask) { mask_ = mask; }
+};
+
+template <typename ThreadMap_,    ///< Thread map (conept: OutputTileThreadMap)
+          typename Element_,      ///< Element data type
+          bool ScatterD = false,  ///< Scatter D operand or not
+          typename PermuteDLayout = layout::NoPermute,  ///< Permute D operand or not
+          bool UseCUDAStore = false>
+class PredicatedTileIteratorAtomic {
+public:
+    using ThreadMap = ThreadMap_;
+    using Shape = typename ThreadMap::Shape;
+
+    using Element = Element_;
+
+    using Layout = layout::RowMajor;
+    using TensorRef = TensorRef<Element, Layout>;
+    using ConstTensorRef = typename TensorRef::ConstTensorRef;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+    using TensorCoord = MatrixCoord;
+
+    static int const kElementsPerAccess = ThreadMap::kElementsPerAccess;
+    static int const kThreads = ThreadMap::kThreads;
+    static int const kIterations = ThreadMap::Count::kTile;
+
+    static bool constexpr PermuteD = !layout::is_trivial_permute<PermuteDLayout>;
+
+    static_assert(ThreadMap::Iterations::kRow > 0, "ThreadMap::Iterations::kRow must be > 0");
+    static_assert(ThreadMap::Iterations::kGroup > 0, "ThreadMap::Iterations::kGroup must be > 0");
+    static_assert(ThreadMap::Iterations::kCluster > 0,
+                  "ThreadMap::Iterations::kCluster must be > 0");
+    static_assert(ThreadMap::Iterations::kColumn > 0, "ThreadMap::Iterations::kColumn must be > 0");
+
+    /// Fragment object
+    using Fragment = Array<Element,
+                           ThreadMap::Iterations::kColumn * ThreadMap::Iterations::kRow *
+                               ThreadMap::Iterations::kGroup * ThreadMap::Iterations::kCluster *
+                               ThreadMap::kElementsPerAccess>;
+
+    /// Memory access size
+    using AccessType = AlignedArray<Element, ThreadMap::kElementsPerAccess>;
+
+    //
+    // Parameters struct
+    //
+
+    /// Uses a non-template class
+    struct Params : PredicatedTileIteratorParams {
+        using Base = PredicatedTileIteratorParams;
+
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout)
+            : PredicatedTileIteratorParams(
+                  layout.stride(0) * int(sizeof(AccessType)) / kElementsPerAccess,
+                  make_OutputTileThreadMapDesc<ThreadMap>())
+        {
+        }
+
+        CUTLASS_HOST_DEVICE
+        Params(Base const& base) : Base(base) {}
+    };
+
+    /// Mask object
+    struct Mask {
+        static int const kCount = ThreadMap::Iterations::kColumn;
+
+        /// Predicate state
+        bool predicates[kCount];
+
+        //
+        // Mask
+        //
+        CUTLASS_HOST_DEVICE
+        Mask() { enable(); }
+
+        ///< Efficiently disables all accesses guarded by mask
+        CUTLASS_HOST_DEVICE void clear()
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < kCount; ++i) { predicates[i] = false; }
+        }
+
+        ///< CUTLASS_HOST_DEVICE enables all accesses guarded by mask
+        CUTLASS_DEVICE void enable()
+        {
+            CUTLASS_PRAGMA_UNROLL
+            for (int i = 0; i < kCount; ++i) { predicates[i] = true; }
+        }
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Parameters structure containing reference and precomputed state.
+    PredicatedTileIteratorParams params_;
+
+    /// Byte-level pointer. This pointer is usually for both load() and store(),
+    /// unless PermuteD is performed. When having PermuteD, byte_pointer_ is only
+    /// for load().
+    uint8_t* byte_pointer_;
+
+    /// Byte-level pointer for store(). Due to PermuteD Op, store_byte_pointer_
+    /// may be with different address computation compared to byte_pointer_.
+    uint8_t* store_byte_pointer_;
+
+    /// Array of boolean values to contain steady-state predicates
+    Mask mask_;
+
+    /// Extent of the matrix tile in rows
+    Index extent_row_;
+
+    /// Extent of the matrix tile in rows
+    Index extent_column_;
+
+    /// A thread's starting row position (assuming steady-state predicates have
+    /// been computed)
+    Index thread_start_row_;
+
+    /// A thread's starting column
+    Index thread_start_column_;
+
+    /// Internal state counter
+    int state_[3];
+
+    /// Scatter indices
+    int const* indices_;
+
+    /// PermuteDLayout
+    PermuteDLayout permute_layout_;
+
+    //
+    // Static asserts about internal strides
+    //
+
+    static_assert(sizeof(extent_row_) == 4, "Expected 32b extents");
+    static_assert(sizeof(thread_start_row_) == 4, "Expected 32b extents");
+    static_assert(sizeof(PredicatedTileIteratorParams::stride) == 8, "Expected 64b strides");
+
+private:
+    //
+    // Methods
+    //
+
+public:
+    //
+    // Methods
+    //
+
+    /// Constructor
+    CUTLASS_DEVICE
+    PredicatedTileIteratorAtomic(PredicatedTileIteratorParams const& params,
+                                 Element* pointer,
+                                 TensorCoord extent,
+                                 int thread_idx,
+                                 TensorCoord threadblock_offset = TensorCoord(),
+                                 int const* indices = nullptr)
+        : params_(params),
+          indices_(indices),
+          permute_layout_(PitchLinearCoord(extent.column(), extent.row()),
+                          params_.stride * kElementsPerAccess / sizeof(AccessType))
+    {
+        TensorCoord thread_offset = ThreadMap::initial_offset(thread_idx) + threadblock_offset;
+
+        extent_row_ = extent.row();
+        extent_column_ = extent.column();
+
+        thread_start_row_ = thread_offset.row();
+        thread_start_column_ = thread_offset.column();
+
+        // Initialize predicates
+        CUTLASS_PRAGMA_UNROLL
+        for (int c = 0; c < ThreadMap::Iterations::kColumn; ++c) {
+            mask_.predicates[c] =
+                ((thread_offset.column() + ThreadMap::Delta::kColumn * c) < extent.column());
+        }
+
+        // Null pointer performs no accesses
+        if (!pointer) { mask_.clear(); }
+
+        if (ScatterD && !indices) { mask_.clear(); }
+
+        // Initialize byte_pointer_
+        byte_pointer_ = reinterpret_cast<uint8_t*>(pointer) +
+                        LongIndex(thread_offset.row()) * LongIndex(params_.stride) +
+                        LongIndex(thread_offset.column()) * sizeof(AccessType) / kElementsPerAccess;
+
+        if (ScatterD) {
+            byte_pointer_ =
+                reinterpret_cast<uint8_t*>(pointer) +
+                LongIndex(thread_offset.column()) * sizeof(AccessType) / kElementsPerAccess;
+        }
+
+        // store_byte_pointer_ is set to be the same with byte_pointer_ unless
+        // PermuteD is used.
+        store_byte_pointer_ = PermuteD ? reinterpret_cast<uint8_t*>(pointer) : byte_pointer_;
+
+        // Initialize internal state counter
+        state_[0] = state_[1] = state_[2] = 0;
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        store_byte_pointer_ += pointer_offset * sizeof_bits<Element>::value / 8;
+        byte_pointer_ += pointer_offset * sizeof_bits<Element>::value / 8;
+    }
+
+    /// Stores a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, int64_t byte_offset) const
+    {
+        uint8_t* byte_pointer = store_byte_pointer_;
+        AccessType const* frag_ptr = reinterpret_cast<AccessType const*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int cluster = 0; cluster < ThreadMap::Iterations::kCluster; ++cluster) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int group = 0; group < ThreadMap::Iterations::kGroup; ++group) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int row = 0; row < ThreadMap::Iterations::kRow; ++row) {
+                    int frag_row_idx =
+                        (row + ThreadMap::Iterations::kRow *
+                                   (group + ThreadMap::Iterations::kGroup * cluster));
+
+                    int row_offset = row * ThreadMap::Delta::kRow +
+                                     group * ThreadMap::Delta::kGroup +
+                                     cluster * ThreadMap::Delta::kCluster;
+
+                    bool row_guard = ((row_offset + thread_start_row_) < extent_row_);
+
+                    AccessType* memory_pointer =
+                        reinterpret_cast<AccessType*>(byte_pointer + byte_offset);
+
+                    if (ScatterD && row_guard) {
+                        assert(indices_);
+
+                        memory_pointer = reinterpret_cast<AccessType*>(
+                            byte_pointer + byte_offset +
+                            LongIndex(indices_[row_offset + thread_start_row_]) *
+                                LongIndex(params_.stride));
+                    }
+
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int column = 0; column < ThreadMap::Iterations::kColumn; ++column) {
+                        bool guard = row_guard && mask_.predicates[column];
+
+                        if (PermuteD) {
+                            int col_offset = column * ThreadMap::Delta::kColumn;
+
+                            int col = col_offset + thread_start_column_;
+                            int row = row_offset + thread_start_row_;
+
+                            // Locate memory_pointer
+                            memory_pointer = reinterpret_cast<AccessType*>(
+                                byte_pointer + byte_offset +
+                                permute_layout_(PitchLinearCoord(col, row)) * sizeof(AccessType) /
+                                    kElementsPerAccess);
+                        }
+                        atomic_store<AccessType>(
+                            frag_ptr[frag_row_idx * ThreadMap::Iterations::kColumn + column],
+                            (void*)&memory_pointer[0],
+                            guard);
+
+                        if (!PermuteD) {
+                            memory_pointer += (ThreadMap::Delta::kColumn / kElementsPerAccess);
+                        }
+                    }
+
+                    if (row + 1 < ThreadMap::Iterations::kRow) {
+                        if (!ScatterD && !PermuteD) { byte_pointer += params_.increment_row; }
+                    }
+                }
+
+                if (group + 1 < ThreadMap::Iterations::kGroup) {
+                    byte_pointer += params_.increment_group;
+                }
+            }
+
+            if (cluster + 1 < ThreadMap::Iterations::kCluster) {
+                byte_pointer += params_.increment_cluster;
+            }
+        }
+    }
+
+    /// Stores a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) const { store_with_byte_offset(frag, 0); }
+
+    CUTLASS_DEVICE
+    void load(Fragment& frag) {}
+
+    CUTLASS_DEVICE
+    MatrixCoord thread_start() const
+    {
+        return MatrixCoord(thread_start_row_, thread_start_column_);
+    }
+
+    /// Need to get the thread start row from the tile iterator
+    CUTLASS_DEVICE
+    int32_t thread_start_row() const { return thread_start_row_; }
+
+    /// Need to get the thread start row from the tile iterator
+    CUTLASS_DEVICE
+    int32_t thread_start_column() const { return thread_start_column_; }
+
+    /// Extent of the matrix in rows
+    CUTLASS_DEVICE
+    Index extent_row() const { return extent_row_; }
+
+    /// Extent of the matrix in columns
+    CUTLASS_DEVICE
+    Index extent_column() const { return extent_column_; }
+
+    /// Advances to the next position to load or store
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorAtomic& operator++()
+    {
+        ++state_[0];
+
+        if (!ScatterD && !PermuteD) { store_byte_pointer_ += params_.advance_row; }
+
+        if (!ScatterD) { byte_pointer_ += params_.advance_row; }
+
+        thread_start_row_ += ThreadMap::Shape::kRow;
+
+        if (state_[0] == ThreadMap::Count::kRow) {
+            state_[0] = 0;
+            ++state_[1];
+            byte_pointer_ += params_.advance_group;
+            store_byte_pointer_ += params_.advance_group;
+
+            thread_start_row_ +=
+                (ThreadMap::Shape::kGroup - 1) * ThreadMap::Shape::kRow * ThreadMap::Count::kRow;
+
+            if (state_[1] == ThreadMap::Count::kGroup) {
+                state_[1] = 0;
+                ++state_[2];
+                byte_pointer_ += params_.advance_cluster;
+                store_byte_pointer_ += params_.advance_cluster;
+
+                thread_start_row_ += ThreadMap::Count::kGroup * ThreadMap::Shape::kGroup *
+                                     ThreadMap::Count::kRow * ThreadMap::Shape::kRow;
+
+                if (state_[2] == ThreadMap::Count::kCluster) {
+                    state_[2] = 0;
+                    byte_pointer_ += params_.advance_tile;
+                    store_byte_pointer_ += params_.advance_tile;
+
+                    thread_start_row_ += ThreadMap::Shape::kGroup * ThreadMap::Shape::kRow *
+                                         ThreadMap::Shape::kCluster * ThreadMap::Shape::kTile;
+                }
+            }
+        }
+
+        return *this;
+    }
+
+    /// Advances a number of positions to load or store
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorAtomic& operator+=(int increment)
+    {
+        // Row
+        state_[0] += increment;
+        int increment_row = state_[0] / ThreadMap::Count::kRow;
+        state_[0] = state_[0] % ThreadMap::Count::kRow;
+
+        byte_pointer_ += (params_.advance_row * increment);
+        store_byte_pointer_ += (params_.advance_row * increment);
+        thread_start_row_ += (ThreadMap::Shape::kRow * increment);
+
+        // Group
+        state_[1] += increment_row;
+        int increment_group = state_[1] / ThreadMap::Count::kGroup;
+        state_[1] = state_[1] % ThreadMap::Count::kGroup;
+
+        byte_pointer_ += (params_.advance_group * increment_row);
+        store_byte_pointer_ += (params_.advance_group * increment_row);
+        thread_start_row_ += (ThreadMap::Shape::kGroup - 1) * ThreadMap::Shape::kRow *
+                             ThreadMap::Count::kRow * increment_row;
+
+        // Cluster
+        state_[2] += increment_group;
+        int increment_cluster = state_[2] / ThreadMap::Count::kCluster;
+        state_[2] = state_[2] % ThreadMap::Count::kCluster;
+
+        byte_pointer_ += (params_.advance_cluster * increment_group);
+        store_byte_pointer_ += (params_.advance_cluster * increment_group);
+        thread_start_row_ += ThreadMap::Count::kGroup * ThreadMap::Shape::kGroup *
+                             ThreadMap::Count::kRow * ThreadMap::Shape::kRow * increment_group;
+
+        // Tile
+        byte_pointer_ += (params_.advance_tile * increment_cluster);
+        store_byte_pointer_ += (params_.advance_tile * increment_cluster);
+        thread_start_row_ += ThreadMap::Shape::kGroup * ThreadMap::Shape::kRow *
+                             ThreadMap::Shape::kCluster * ThreadMap::Shape::kTile *
+                             increment_cluster;
+
+        return *this;
+    }
+
+    ///< Efficiently disables all accesses guarded by mask
+    CUTLASS_DEVICE void clear_mask() { mask_.clear(); }
+
+    ///< Efficiently enables all accesses guarded by mask
+    CUTLASS_DEVICE void enable_mask() { mask_.enable(); }
+
+    ///< Sets the mask
+    CUTLASS_DEVICE void get_mask(Mask& mask) const { mask = mask_; }
+
+    ///< Sets the mask
+    CUTLASS_DEVICE void set_mask(Mask const& mask) { mask_ = mask; }
+};
+
+}  // namespace threadblock
+}  // namespace epilogue
+}  // namespace cutlass

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/iterators/predicated_tile_iterator_residual_last.h

@@ -0,0 +1,1938 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+    \brief Templates implementing loading of tiles from pitch-linear rank=2
+   tensors.
+
+    This iterator uses masks to guard out-of-bounds accesses. The first tile
+   this iterator visits maybe partial, then the remaining tiles are complete.
+   So, we only need to compute the predicates twice, once before the first tile
+   and once for the remaining full tiles which can share the same predicates.
+
+    A precomputed "Params" object minimizes the amount of state that must be
+   stored in registers, and integer addition is used to advance the pointer
+   through memory.
+*/
+
+#pragma once
+
+#include "cutlass/arch/memory.h"
+#include "cutlass/transform/threadblock/predicated_tile_access_iterator.h"
+
+////////////////////////////////////////////////////////////////////////////////
+
+namespace cutlass {
+namespace transform {
+namespace threadblock {
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// PredicatedTileIteratorResidualLast
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+/// Regular tile iterator using a precomputed control structure to minimize
+/// register liveness and integer arithmetic.
+///
+/// Layout is assumed to be invariant at the time the precomputed "Params"
+/// object is constructed.
+///
+/// Base pointer and tensor extents may be specified at the time the iterator is
+/// constructed. Subsequently, they are assumed to be immutable.
+///
+/// Adding a logical coordinate offset may be performed at the time the iterator
+/// is constructed. Subsequent additions to logical coordinate offset may be
+/// performed but are relatively expensive.
+///
+/// Visitation order is intended to first visit a "residual" tile that may be
+/// partially full in both the advance dimension and the steady-state dimension.
+/// This is assumed to be the last tile in the iteration sequence. Advancing an
+/// iterator that has just been constructed moves to the first tile that is full
+/// in the advance dimension and recomputes predicates. Subsequent accesses may
+/// be performed without updating internal predicates and are efficient in terms
+/// of live register state and pointer arithmetic instructions.
+///
+/// To be efficient, this assumes the iterator will be dereferenced and advanced
+/// at least once outside any looping structure to minimize integer arithmetic.
+///
+/// Accesses out of bounds are safe so long as `clear_mask()` is called prior to
+/// dereferencing the iterator.
+///
+///
+/// Example:
+///
+/// An efficient pipeline structure may be constructed as follows:
+///
+// template <typename Iterator>
+// __global__ void kernel(
+//   typename Iterator::Params params,
+//   typename Iterator::Element *ptr,
+//   TensorCoord extent) {
+//
+//   typename Iterator::Fragment fragment;
+//
+//   TensorCoord threadblock_offset(0, 0);
+//
+//   Iterator iter(params, ptr, extent, threadIdx.x, threadblock_offsets);
+//
+//
+//   fragment = *iter;        // load "residue" tile first
+//   ++iter;                  // advance to first "steady state" tile and update
+//   internal masks
+//
+//
+//   #pragma unroll
+//   for (int i = Remaining - 1; i >= 0; --i) {
+//
+//     f(fragment);
+//
+//     if (!i) {
+//       iter.clear_mask();   // light-weight operation to clear masks -
+//       subsequent loads become NO-OPs.
+//     }
+//
+//     fragment = *iter;      // load tile during "steady state" phase
+//     ++iter;                // advance to next tile - lightweight due to
+//     steady-state masks
+//   }
+// }
+//
+// void host(TensorView<Element, 2, layout::PitchLinear> view) {
+//
+//   using Iterator =
+//   transform::threadblock::PredicatedTileIteratorResidualLast;
+//
+//   typename Iterator::Params params(view.layout());
+//
+//   kernel<Iterator>(params, view.data());
+// }
+///
+///
+template <typename Shape,
+          typename Element,
+          typename Layout,
+          int AdvanceRank,
+          typename ThreadMap,
+          int AccessSize = ThreadMap::kElementsPerAccess,
+          bool Gather = false>
+class PredicatedTileIteratorResidualLast;
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileIteratorResidualLast for pitch-linear data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          int AccessSize,
+          bool Gather>
+class PredicatedTileIteratorResidualLast<Shape_,
+                                         Element_,
+                                         layout::PitchLinear,
+                                         AdvanceRank,
+                                         ThreadMap_,
+                                         AccessSize,
+                                         Gather> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::PitchLinear;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    /// Type used for internal memory accesses
+    using AccessType =
+        AlignedArray<Element, AccessSize, (AccessSize * sizeof_bits<Element>::value / 8)>;
+
+    /// Underlying iterator to compute the addresses
+    using TileAccessIterator = PredicatedTileAccessIteratorResidualLast<Shape,
+                                                                        Element,
+                                                                        Layout,
+                                                                        kAdvanceRank,
+                                                                        ThreadMap,
+                                                                        AccessType,
+                                                                        Gather>;
+
+    static int const kAccessesPerVector = TileAccessIterator::kAccessesPerVector;
+
+    /// Fragment object to be loaded or stored
+    using Fragment =
+        cutlass::Array<Element, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename TileAccessIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    public:
+        using Base = typename TileAccessIterator::Params::Base;
+
+        friend PredicatedTileIteratorResidualLast;
+
+    private:
+        /// Parameters object
+        typename TileAccessIterator::Params params_;
+
+    public:
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout) {}
+
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        CUTLASS_HOST_DEVICE
+        Params(Base const& base) : params_(base) {}
+    };
+
+private:
+    /// Internal pointer type permits fast address arithmetic
+    using BytePointer = char*;
+
+private:
+    //
+    // Data members
+    //
+
+    /// Data member to the tile access iterator
+    TileAccessIterator address_iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(
+        /// Precomputed parameters object
+        Params const& params,
+        /// Pointer to start of tensor
+        Pointer pointer,
+        /// Extent of tensor
+        TensorCoord extent,
+        /// ID of each participating thread
+        int thread_id,
+        /// Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        /// Gather indices
+        int const* indices = nullptr)
+        : address_iterator_(params.params_, pointer, extent, thread_id, threadblock_offset, indices)
+    {
+    }
+
+    /// Construct a PredicatedTileIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(Params const& params,  ///< Precomputed parameters object
+                                       Pointer pointer,       ///< Pointer to start of tensor
+                                       TensorCoord extent,    ///< Extent of tensor
+                                       int thread_id          ///< ID of each participating thread
+                                       )
+        : PredicatedTileIteratorResidualLast(params, pointer, extent, thread_id, make_Coord(0, 0))
+    {
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        address_iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast& operator++()
+    {
+        if (kAdvanceRank)
+            address_iterator_.add_tile_offset({0, 1});
+        else
+            address_iterator_.add_tile_offset({1, 0});
+
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast operator++(int)
+    {
+        PredicatedTileIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { address_iterator_.clear_mask(enable); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { address_iterator_.set_residual_tile(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { address_iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { address_iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { address_iterator_.get_mask(mask); }
+
+    CUTLASS_DEVICE
+    void load_with_pointer_offset(Fragment& frag, Index pointer_offset)
+    {
+        load_with_byte_offset(frag, pointer_offset * sizeof_bits<Element>::value / 8);
+    }
+
+    CUTLASS_DEVICE
+    void load_with_byte_offset(Fragment& frag, LongIndex byte_offset)
+    {
+        AccessType* frag_ptr = reinterpret_cast<AccessType*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int s = 0; s < ThreadMap::Iterations::kStrided; ++s) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int c = 0; c < ThreadMap::Iterations::kContiguous; ++c) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < kAccessesPerVector; ++v) {
+                    int idx = v + kAccessesPerVector * (c + s * ThreadMap::Iterations::kContiguous);
+
+                    address_iterator_.set_iteration_index(idx);
+                    char const* byte_ptr =
+                        reinterpret_cast<char const*>(address_iterator_.get()) + byte_offset;
+
+                    AccessType const* access_ptr = reinterpret_cast<AccessType const*>(byte_ptr);
+
+                    cutlass::arch::global_load<AccessType, sizeof(AccessType)>(
+                        frag_ptr[idx], access_ptr, address_iterator_.valid());
+
+                    ++address_iterator_;
+                }
+            }
+        }
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) { load_with_byte_offset(frag, 0); }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_pointer_offset(Fragment const& frag, Index pointer_offset)
+    {
+        store_with_byte_offset(frag, pointer_offset * sizeof_bits<Element>::value / 8);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, LongIndex byte_offset)
+    {
+        address_iterator_.set_iteration_index(0);
+        AccessType const* frag_ptr = reinterpret_cast<AccessType const*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int s = 0; s < ThreadMap::Iterations::kStrided; ++s) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int c = 0; c < ThreadMap::Iterations::kContiguous; ++c) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < kAccessesPerVector; ++v) {
+                    int idx = v + kAccessesPerVector * (c + s * ThreadMap::Iterations::kContiguous);
+
+                    char* byte_ptr = reinterpret_cast<char*>(address_iterator_.get()) + byte_offset;
+                    AccessType* access_ptr = reinterpret_cast<AccessType*>(byte_ptr);
+
+                    if (address_iterator_.valid()) { *access_ptr = frag_ptr[idx]; }
+                    ++address_iterator_;
+                }
+            }
+        }
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_byte_offset(frag, 0); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileIteratorResidualLast for pitch-linear data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          int AccessSize,
+          bool Gather>
+class PredicatedTileIteratorResidualLast<Shape_,
+                                         Element_,
+                                         layout::ColumnMajor,
+                                         AdvanceRank,
+                                         ThreadMap_,
+                                         AccessSize,
+                                         Gather> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::ColumnMajor;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingIterator =
+        PredicatedTileIteratorResidualLast<layout::PitchLinearShape<Shape::kRow, Shape::kColumn>,
+                                           Element,
+                                           layout::PitchLinear,
+                                           (kAdvanceRank == 0 ? 0 : 1),
+                                           ThreadMap,
+                                           AccessSize,
+                                           Gather>;
+
+    using AccessType = typename UnderlyingIterator::AccessType;
+
+    /// Fragment object to be loaded or stored
+    using Fragment =
+        cutlass::Array<Element, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout::PitchLinear(layout.stride(0))) {}
+
+        CUTLASS_HOST_DEVICE
+        Params(typename UnderlyingIterator::Params::Base const& base) : params_(base) {}
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying pitch-linear tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(
+        Params const& params,                   ///< Precomputed parameters object
+        Pointer pointer,                        ///< Pointer to start of tensor
+        TensorCoord extent,                     ///< Extent of tensor
+        int thread_id,                          ///< ID of each participating thread
+        TensorCoord const& threadblock_offset,  ///< Initial offset of threadblock
+        int const* indices = nullptr            ///< gather/scatter indices, note no support for
+                                                ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.row(), extent.column()),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.row(), threadblock_offset.column()),
+                    indices)
+    {
+    }
+
+    /// Construct a PredicatedTileIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(Params const& params,  ///< Precomputed parameters object
+                                       Pointer pointer,       ///< Pointer to start of tensor
+                                       TensorCoord extent,    ///< Extent of tensor
+                                       int thread_id          ///< ID of each participating thread
+                                       )
+        : PredicatedTileIteratorResidualLast(params, pointer, extent, thread_id, make_Coord(0, 0))
+    {
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast operator++(int)
+    {
+        PredicatedTileIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_pointer_offset(Fragment& frag, Index pointer_offset)
+    {
+        iterator_.load_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_byte_offset(Fragment& frag, LongIndex byte_offset)
+    {
+        iterator_.load_with_byte_offset(frag, byte_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) { load_with_pointer_offset(frag, 0); }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_pointer_offset(Fragment const& frag, Index pointer_offset)
+    {
+        iterator_.store_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, LongIndex byte_offset)
+    {
+        iterator_.store_with_byte_offset(frag, byte_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_pointer_offset(frag, 0); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileIteratorResidualLast for pitch-linear data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          int AccessSize,
+          bool Gather>
+class PredicatedTileIteratorResidualLast<Shape_,
+                                         Element_,
+                                         layout::RowMajor,
+                                         AdvanceRank,
+                                         ThreadMap_,
+                                         AccessSize,
+                                         Gather> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::RowMajor;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingIterator =
+        PredicatedTileIteratorResidualLast<layout::PitchLinearShape<Shape::kColumn, Shape::kRow>,
+                                           Element,
+                                           layout::PitchLinear,
+                                           (kAdvanceRank == 0 ? 1 : 0),
+                                           ThreadMap,
+                                           AccessSize,
+                                           Gather>;
+
+    using AccessType = typename UnderlyingIterator::AccessType;
+
+    /// Fragment object to be loaded or stored
+    using Fragment =
+        cutlass::Array<Element, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout::PitchLinear(layout.stride(0))) {}
+
+        CUTLASS_HOST_DEVICE
+        Params(typename UnderlyingIterator::Params::Base const& base) : params_(base) {}
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying pitch-linear tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(
+        Params const& params,                   ///< Precomputed parameters object
+        Pointer pointer,                        ///< Pointer to start of tensor
+        TensorCoord extent,                     ///< Extent of tensor
+        int thread_id,                          ///< ID of each participating thread
+        TensorCoord const& threadblock_offset,  ///< Initial offset of threadblock
+        int const* indices = nullptr            ///< Gather indices
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.column(), extent.row()),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.column(), threadblock_offset.row()),
+                    indices)
+    {
+    }
+
+    /// Construct a PredicatedTileIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(Params const& params,  ///< Precomputed parameters object
+                                       Pointer pointer,       ///< Pointer to start of tensor
+                                       TensorCoord extent,    ///< Extent of tensor
+                                       int thread_id          ///< ID of each participating thread
+                                       )
+        : PredicatedTileIteratorResidualLast(params, pointer, extent, thread_id, make_Coord(0, 0))
+    {
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast operator++(int)
+    {
+        PredicatedTileIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_pointer_offset(Fragment& frag, Index pointer_offset)
+    {
+        iterator_.load_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_byte_offset(Fragment& frag, LongIndex byte_offset)
+    {
+        iterator_.load_with_byte_offset(frag, byte_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) { load_with_pointer_offset(frag, 0); }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_pointer_offset(Fragment const& frag, Index pointer_offset)
+    {
+        iterator_.store_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, LongIndex byte_offset)
+    {
+        iterator_.store_with_byte_offset(frag, byte_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_pointer_offset(frag, 0); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileIteratorResidualLast for affine rank-2 data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_, typename Element_, int AdvanceRank, typename ThreadMap_, int AccessSize>
+class PredicatedTileIteratorResidualLast<Shape_,
+                                         Element_,
+                                         layout::AffineRankN<2>,
+                                         AdvanceRank,
+                                         ThreadMap_,
+                                         AccessSize,
+                                         false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::AffineRankN<2>;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    /// Type used for internal memory accesses
+    using AccessType =
+        AlignedArray<Element, AccessSize, (AccessSize * sizeof_bits<Element>::value / 8)>;
+
+    /// Underlying iterator to compute the addresses
+    using TileAccessIterator = PredicatedTileAccessIteratorResidualLast<Shape,
+                                                                        Element,
+                                                                        Layout,
+                                                                        kAdvanceRank,
+                                                                        ThreadMap,
+                                                                        AccessType>;
+
+    static int const kAccessesPerVector = TileAccessIterator::kAccessesPerVector;
+
+    /// Fragment object to be loaded or stored
+    using Fragment =
+        cutlass::Array<Element, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename TileAccessIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    public:
+        friend PredicatedTileIteratorResidualLast;
+
+    private:
+        /// Parameters object
+        typename TileAccessIterator::Params params_;
+
+    public:
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout) {}
+
+        CUTLASS_HOST_DEVICE
+        Params() {}
+    };
+
+private:
+    /// Internal pointer type permits fast address arithmetic
+    using BytePointer = char*;
+
+private:
+    //
+    // Data members
+    //
+
+    /// Data member to the tile access iterator
+    TileAccessIterator address_iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(
+        /// Precomputed parameters object
+        Params const& params,
+        /// Pointer to start of tensor
+        Pointer pointer,
+        /// Extent of tensor
+        TensorCoord extent,
+        /// ID of each participating thread
+        int thread_id,
+        /// Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : address_iterator_(params.params_, pointer, extent, thread_id, threadblock_offset)
+    {
+    }
+
+    /// Construct a PredicatedTileIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(Params const& params,  ///< Precomputed parameters object
+                                       Pointer pointer,       ///< Pointer to start of tensor
+                                       TensorCoord extent,    ///< Extent of tensor
+                                       int thread_id          ///< ID of each participating thread
+                                       )
+        : PredicatedTileIteratorResidualLast(params, pointer, extent, thread_id, make_Coord(0, 0))
+    {
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        address_iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast& operator++()
+    {
+        if (kAdvanceRank)
+            address_iterator_.add_tile_offset(make_Coord(0, 1));
+        else
+            address_iterator_.add_tile_offset(make_Coord(1, 0));
+
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast operator++(int)
+    {
+        PredicatedTileIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { address_iterator_.clear_mask(enable); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { address_iterator_.set_residual_tile(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { address_iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { address_iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { address_iterator_.get_mask(mask); }
+
+    CUTLASS_DEVICE
+    void load_with_pointer_offset(Fragment& frag, Index pointer_offset)
+    {
+        load_with_byte_offset(frag, pointer_offset * sizeof_bits<Element>::value / 8);
+    }
+
+    CUTLASS_DEVICE
+    void load_with_byte_offset(Fragment& frag, LongIndex byte_offset)
+    {
+        AccessType* frag_ptr = reinterpret_cast<AccessType*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int s = 0; s < ThreadMap::Iterations::kStrided; ++s) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int c = 0; c < ThreadMap::Iterations::kContiguous; ++c) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < kAccessesPerVector; ++v) {
+                    int idx = v + kAccessesPerVector * (c + s * ThreadMap::Iterations::kContiguous);
+
+                    address_iterator_.set_iteration_index(idx);
+                    char const* byte_ptr =
+                        reinterpret_cast<char const*>(address_iterator_.get()) + byte_offset;
+
+                    AccessType const* access_ptr = reinterpret_cast<AccessType const*>(byte_ptr);
+
+                    cutlass::arch::global_load<AccessType, sizeof(AccessType)>(
+                        frag_ptr[idx], access_ptr, address_iterator_.valid());
+
+                    ++address_iterator_;
+                }
+            }
+        }
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) { load_with_byte_offset(frag, 0); }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_pointer_offset(Fragment const& frag, Index pointer_offset)
+    {
+        store_with_byte_offset(frag, pointer_offset * sizeof_bits<Element>::value / 8);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, LongIndex byte_offset)
+    {
+        address_iterator_.set_iteration_index(0);
+        AccessType const* frag_ptr = reinterpret_cast<AccessType const*>(&frag);
+
+        CUTLASS_PRAGMA_UNROLL
+        for (int s = 0; s < ThreadMap::Iterations::kStrided; ++s) {
+            CUTLASS_PRAGMA_UNROLL
+            for (int c = 0; c < ThreadMap::Iterations::kContiguous; ++c) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int v = 0; v < kAccessesPerVector; ++v) {
+                    int idx = v + kAccessesPerVector * (c + s * ThreadMap::Iterations::kContiguous);
+
+                    char* byte_ptr = reinterpret_cast<char*>(address_iterator_.get()) + byte_offset;
+                    AccessType* access_ptr = reinterpret_cast<AccessType*>(byte_ptr);
+
+                    if (address_iterator_.valid()) { *access_ptr = frag_ptr[idx]; }
+                    ++address_iterator_;
+                }
+            }
+        }
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_byte_offset(frag, 0); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileIteratorResidualLast for affine rank 2
+/// column-major data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_, typename Element_, int AdvanceRank, typename ThreadMap_, int AccessSize>
+class PredicatedTileIteratorResidualLast<Shape_,
+                                         Element_,
+                                         layout::AffineRank2ColumnMajor,
+                                         AdvanceRank,
+                                         ThreadMap_,
+                                         AccessSize,
+                                         false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::AffineRank2ColumnMajor;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    // Map to the underlying AffineRankN<2> layout
+    using UnderlyingIterator =
+        PredicatedTileIteratorResidualLast<layout::PitchLinearShape<Shape::kRow, Shape::kColumn>,
+                                           Element,
+                                           layout::AffineRankN<2>,
+                                           (kAdvanceRank == 0 ? 0 : 1),
+                                           ThreadMap,
+                                           AccessSize>;
+
+    using AccessType = typename UnderlyingIterator::AccessType;
+
+    /// Fragment object to be loaded or stored
+    using Fragment =
+        cutlass::Array<Element, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given an AffineRankN<2> tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout)
+            : params_(layout::AffineRankN<2>(layout.stride(0), layout.stride(1)))
+        {
+        }
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying AffineRankN<2> tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(
+        Params const& params,                   ///< Precomputed parameters object
+        Pointer pointer,                        ///< Pointer to start of tensor
+        TensorCoord extent,                     ///< Extent of tensor
+        int thread_id,                          ///< ID of each participating thread
+        TensorCoord const& threadblock_offset,  ///< Initial offset of threadblock
+        int const* indices = nullptr            ///< gather/scatter indices, note no support for
+                                                ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.row(), extent.column()),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.row(), threadblock_offset.column()))
+    {
+    }
+
+    /// Construct a PredicatedTileIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(Params const& params,  ///< Precomputed parameters object
+                                       Pointer pointer,       ///< Pointer to start of tensor
+                                       TensorCoord extent,    ///< Extent of tensor
+                                       int thread_id          ///< ID of each participating thread
+                                       )
+        : PredicatedTileIteratorResidualLast(params, pointer, extent, thread_id, make_Coord(0, 0))
+    {
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast operator++(int)
+    {
+        PredicatedTileIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_pointer_offset(Fragment& frag, Index pointer_offset)
+    {
+        iterator_.load_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_byte_offset(Fragment& frag, LongIndex byte_offset)
+    {
+        iterator_.load_with_byte_offset(frag, byte_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) { load_with_pointer_offset(frag, 0); }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_pointer_offset(Fragment const& frag, Index pointer_offset)
+    {
+        iterator_.store_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, LongIndex byte_offset)
+    {
+        iterator_.store_with_byte_offset(frag, byte_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_pointer_offset(frag, 0); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileIteratorResidualLast for affine rank 2
+/// row-major data.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_, typename Element_, int AdvanceRank, typename ThreadMap_, int AccessSize>
+class PredicatedTileIteratorResidualLast<Shape_,
+                                         Element_,
+                                         layout::AffineRank2RowMajor,
+                                         AdvanceRank,
+                                         ThreadMap_,
+                                         AccessSize,
+                                         false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    using Layout = layout::AffineRank2RowMajor;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    // Map to the underlying AffineRankN<2> layout
+    using UnderlyingIterator =
+        PredicatedTileIteratorResidualLast<layout::PitchLinearShape<Shape::kColumn, Shape::kRow>,
+                                           Element,
+                                           layout::AffineRankN<2>,
+                                           (kAdvanceRank == 0 ? 1 : 0),
+                                           ThreadMap,
+                                           AccessSize>;
+
+    using AccessType = typename UnderlyingIterator::AccessType;
+
+    /// Fragment object to be loaded or stored
+    using Fragment =
+        cutlass::Array<Element, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given an AffineRankN<2> tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout)
+            : params_(layout::AffineRankN<2>(layout.stride(1), layout.stride(0)))
+        {
+        }
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying AffineRankN<2> tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(
+        Params const& params,                   ///< Precomputed parameters object
+        Pointer pointer,                        ///< Pointer to start of tensor
+        TensorCoord extent,                     ///< Extent of tensor
+        int thread_id,                          ///< ID of each participating thread
+        TensorCoord const& threadblock_offset,  ///< Initial offset of threadblock
+        int const* indices = nullptr            ///< gather/scatter indices, note no support for
+                                                ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.column(), extent.row()),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.column(), threadblock_offset.row()))
+    {
+    }
+
+    /// Construct a PredicatedTileIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(Params const& params,  ///< Precomputed parameters object
+                                       Pointer pointer,       ///< Pointer to start of tensor
+                                       TensorCoord extent,    ///< Extent of tensor
+                                       int thread_id          ///< ID of each participating thread
+                                       )
+        : PredicatedTileIteratorResidualLast(params, pointer, extent, thread_id, make_Coord(0, 0))
+    {
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast operator++(int)
+    {
+        PredicatedTileIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_pointer_offset(Fragment& frag, Index pointer_offset)
+    {
+        iterator_.load_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_byte_offset(Fragment& frag, LongIndex byte_offset)
+    {
+        iterator_.load_with_byte_offset(frag, byte_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) { load_with_pointer_offset(frag, 0); }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_pointer_offset(Fragment const& frag, Index pointer_offset)
+    {
+        iterator_.store_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_byte_offset(Fragment const& frag, LongIndex byte_offset)
+    {
+        iterator_.store_with_byte_offset(frag, byte_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_pointer_offset(frag, 0); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileIteratorResidualLast for interleaved data.
+/// It is mapped to the congruous layout.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          int AccessSize,
+          int InterleavedK>
+class PredicatedTileIteratorResidualLast<Shape_,
+                                         Element_,
+                                         layout::ColumnMajorInterleaved<InterleavedK>,
+                                         AdvanceRank,
+                                         ThreadMap_,
+                                         AccessSize,
+                                         false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    static int const kInterleavedK = InterleavedK;
+    using Layout = layout::ColumnMajorInterleaved<kInterleavedK>;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingIterator = PredicatedTileIteratorResidualLast<
+        layout::PitchLinearShape<Shape::kRow * kInterleavedK, Shape::kColumn / kInterleavedK>,
+        Element,
+        layout::PitchLinear,
+        (kAdvanceRank == 0 ? 0 : 1),
+        ThreadMap,
+        AccessSize>;
+
+    using AccessType = typename UnderlyingIterator::AccessType;
+
+    /// Fragment object to be loaded or stored
+    using Fragment =
+        cutlass::Array<Element, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout::PitchLinear(layout.stride(0))) {}
+
+        CUTLASS_HOST_DEVICE
+        Params(typename UnderlyingIterator::Params::Base const& base) : params_(base) {}
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying pitch-linear tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(
+        /// Precomputed parameters object
+        Params const& params,
+        /// Pointer to start of tensor
+        Pointer pointer,
+        /// Extent of tensor
+        TensorCoord extent,
+        /// ID of each participating thread
+        int thread_id,
+        /// Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.row() * kInterleavedK,
+                                             extent.column() / kInterleavedK),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.row() * kInterleavedK,
+                                             threadblock_offset.column() / kInterleavedK))
+    {
+    }
+
+    /// Construct a PredicatedTileIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(Params const& params,  ///< Precomputed parameters object
+                                       Pointer pointer,       ///< Pointer to start of tensor
+                                       TensorCoord extent,    ///< Extent of tensor
+                                       int thread_id          ///< ID of each participating thread
+                                       )
+        : PredicatedTileIteratorResidualLast(params, pointer, extent, thread_id, make_Coord(0, 0))
+    {
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast operator++(int)
+    {
+        PredicatedTileIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_pointer_offset(Fragment& frag, Index pointer_offset)
+    {
+        iterator_.load_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) { load_with_pointer_offset(frag, 0); }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_pointer_offset(Fragment const& frag, Index pointer_offset)
+    {
+        iterator_.store_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_pointer_offset(frag, 0); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+/// Specialization of PredicatedTileIteratorResidualLast for interleaved-32
+/// data.  It is mapped to the congruous layout.
+///
+/// Satisfies: ForwardTileIteratorConcept |
+///            ReadableContiguousTileIteratorConcept |
+///            WriteableContiguousTileIteratorConcept |
+///            MaskedTileIteratorConcept
+///
+template <typename Shape_,
+          typename Element_,
+          int AdvanceRank,
+          typename ThreadMap_,
+          int AccessSize,
+          int InterleavedK>
+class PredicatedTileIteratorResidualLast<Shape_,
+                                         Element_,
+                                         layout::RowMajorInterleaved<InterleavedK>,
+                                         AdvanceRank,
+                                         ThreadMap_,
+                                         AccessSize,
+                                         false> {
+public:
+    static_assert(AdvanceRank == 0 || AdvanceRank == 1,
+                  "Specialization for pitch-linear iterator may along advance along the "
+                  "contiguous(rank=0) or strided(rank=1) dimension.");
+
+    using Shape = Shape_;
+    using Element = Element_;
+    static int const kInterleavedK = InterleavedK;
+    using Layout = layout::RowMajorInterleaved<kInterleavedK>;
+    static int const kAdvanceRank = AdvanceRank;
+    using ThreadMap = ThreadMap_;
+
+    using Index = typename Layout::Index;
+    using LongIndex = typename Layout::LongIndex;
+
+    using TensorRef = TensorRef<Element, Layout>;
+    using TensorView = TensorView<Element, Layout>;
+    using TensorCoord = typename Layout::TensorCoord;
+
+    using Pointer = Element*;
+    using NonConstPointer = typename platform::remove_const<Element>::type*;
+
+    using UnderlyingIterator = PredicatedTileIteratorResidualLast<
+        layout::PitchLinearShape<Shape::kColumn * kInterleavedK, Shape::kRow / kInterleavedK>,
+        Element,
+        layout::PitchLinear,
+        (kAdvanceRank == 0 ? 1 : 0),
+        ThreadMap,
+        AccessSize>;
+
+    using AccessType = typename UnderlyingIterator::AccessType;
+
+    /// Fragment object to be loaded or stored
+    using Fragment =
+        cutlass::Array<Element, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+
+    /// Predicate vector stores mask to guard accesses
+    using Mask = typename UnderlyingIterator::Mask;
+
+    /// Parameters object is precomputed state and is host-constructible
+    class Params {
+    private:
+        friend PredicatedTileIteratorResidualLast;
+
+        /// Parameters object
+        typename UnderlyingIterator::Params params_;
+
+    public:
+        CUTLASS_HOST_DEVICE
+        Params() {}
+
+        /// Construct the Params object given a pitch-linear tensor's layout
+        CUTLASS_HOST_DEVICE
+        Params(Layout const& layout) : params_(layout::PitchLinear(layout.stride(0))) {}
+
+        CUTLASS_HOST_DEVICE
+        Params(typename UnderlyingIterator::Params::Base const& base) : params_(base) {}
+    };
+
+private:
+    //
+    // Data members
+    //
+
+    /// Underlying pitch-linear tile iterator
+    UnderlyingIterator iterator_;
+
+public:
+    /// Constructs a TileIterator from its precomputed state, threadblock offset,
+    /// and thread ID
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(
+        /// Precomputed parameters object
+        Params const& params,
+        /// Pointer to start of tensor
+        Pointer pointer,
+        /// Extent of tensor
+        TensorCoord extent,
+        /// ID of each participating thread
+        int thread_id,
+        /// Initial offset of threadblock
+        TensorCoord const& threadblock_offset,
+        int const* indices = nullptr  ///< gather/scatter indices, note no support for
+                                      ///< gather/scatter at this specialization
+        )
+        : iterator_(params.params_,
+                    pointer,
+                    layout::PitchLinearCoord(extent.column() * kInterleavedK,
+                                             extent.row() / kInterleavedK),
+                    thread_id,
+                    layout::PitchLinearCoord(threadblock_offset.column() * kInterleavedK,
+                                             threadblock_offset.row() / kInterleavedK))
+    {
+    }
+
+    /// Construct a PredicatedTileIteratorResidualLast with zero threadblock
+    /// offset
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast(Params const& params,  ///< Precomputed parameters object
+                                       Pointer pointer,       ///< Pointer to start of tensor
+                                       TensorCoord extent,    ///< Extent of tensor
+                                       int thread_id          ///< ID of each participating thread
+                                       )
+        : PredicatedTileIteratorResidualLast(params, pointer, extent, thread_id, make_Coord(0, 0))
+    {
+    }
+
+    /// Adds a pointer offset in units of Element
+    CUTLASS_HOST_DEVICE
+    void add_pointer_offset(LongIndex pointer_offset)
+    {
+        iterator_.add_pointer_offset(pointer_offset);
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast& operator++()
+    {
+        ++iterator_;
+        return *this;
+    }
+
+    /// Advances to the next tile in memory.
+    ///
+    /// The first time this method is called, predicates are updated, and the
+    /// iterator's internal pointer is reverted to the first "steady state" tile.
+    /// Subsequent calls are lightweight and must only update the internal
+    /// pointer.
+    CUTLASS_HOST_DEVICE
+    PredicatedTileIteratorResidualLast operator++(int)
+    {
+        PredicatedTileIteratorResidualLast self(*this);
+        operator++();
+        return self;
+    }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void clear_mask(bool enable = true) { iterator_.clear_mask(enable); }
+
+    CUTLASS_HOST_DEVICE
+    void set_residual_tile(bool enable) { iterator_.set_residual_tile(enable); }
+
+    /// Clears the predicate set efficiently
+    CUTLASS_HOST_DEVICE
+    void enable_mask() { iterator_.enable_mask(); }
+
+    /// Sets the predicate mask, overriding value stored in predicate iterator
+    CUTLASS_HOST_DEVICE
+    void set_mask(Mask const& mask) { iterator_.set_mask(mask); }
+
+    /// Gets the mask
+    CUTLASS_HOST_DEVICE
+    void get_mask(Mask& mask) { iterator_.get_mask(mask); }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load_with_pointer_offset(Fragment& frag, Index pointer_offset)
+    {
+        iterator_.load_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Loads a fragment from memory
+    CUTLASS_DEVICE
+    void load(Fragment& frag) { load_with_pointer_offset(frag, 0); }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store_with_pointer_offset(Fragment const& frag, Index pointer_offset)
+    {
+        iterator_.store_with_pointer_offset(frag, pointer_offset);
+    }
+
+    /// Store a fragment to memory
+    CUTLASS_DEVICE
+    void store(Fragment const& frag) { store_with_pointer_offset(frag, 0); }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace threadblock
+}  // namespace transform
+}  // namespace cutlass
+
+////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/iterators/transpose_warp_iterator.h

@@ -0,0 +1,57 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holdvr nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+#include "warp_iterator_from_smem.h"
+
+template <typename WarpIterator>
+struct TransposeWarpIterator {
+    using Iterator = char;
+    static bool constexpr kSupportsTranspose = false;
+};
+
+template <
+    /// Operand identity
+    cutlass::gemm::Operand Operand,
+    /// Data type of A elements
+    typename Element,
+    bool kTranspose>
+struct TransposeWarpIterator<
+    cutlass::gemm::warp::WarpIteratorFromSmem<Operand, Element, kTranspose>> {
+    using Iterator = cutlass::gemm::warp::WarpIteratorFromSmem<Operand, Element, !kTranspose>;
+    static bool constexpr kSupportsTranspose = true;
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/iterators/warp_iterator_from_smem.h

@@ -0,0 +1,269 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+/*! \file
+    \brief Inspired from
+   "cutlass/gemm/warp/mma_tensor_op_tile_access_iterator.h" Loads tiles of GEMM
+   operands from a RowMajor shared-memory layout into registers to use by A100
+   TensorCores.
+
+    The difference with "mma_tensor_op_tile_access_iterator.h" is that:
+    (1) We use "ldmatrix" to load tiles, rather than manual loads (slightly
+   faster) (2) We support to transpose the operand (eg read `A.transpose()` when
+   the shared memory holds `A`)
+
+    This is only implemented for the specific shapes.
+*/
+#pragma once
+
+#include <cutlass/gemm/gemm.h>
+
+////////////////////////////////////////////////////////////////////////////////
+namespace cutlass {
+namespace gemm {
+namespace warp {
+
+template <
+    /// Operand identity
+    Operand Operand_,
+    /// Data type of A elements
+    typename Element_,
+    bool kTranspose = false>
+class WarpIteratorFromSmem {
+public:
+    /// Shape of tile to load (concept: MatrixShape)
+    using Shape = cutlass::MatrixShape<32, 32>;
+
+    /// Operand tag
+    static Operand const kOperand = Operand_;
+
+    /// Basic check
+    static_assert(
+        kOperand == Operand::kA || kOperand == Operand::kB,
+        "WarpIteratorFromSmem may only be instantiated for A or B operands to warp-level Mma.");
+
+    /// Element type
+    using Element = Element_;
+    static_assert(sizeof_bits<Element>::value == 16, "Only supported for half");
+
+    /// Layout of source tile
+    using Layout = cutlass::layout::RowMajor;
+
+    /// Shape of one matrix product operation (concept: MatrixShape)
+    using InstructionShape = cutlass::MatrixShape<16, 8>;
+
+    /// Delta between *MMA operations (in units of *MMA operations, concept:
+    /// MatrixShape)
+    static int const kOpDelta = 1;
+
+    /// Number of participating threads
+    static int const kThreads = 32;
+
+    /// TensorRef type for loading element from a tensor
+    using TensorRef = TensorRef<Element, Layout>;
+
+    /// Index type
+    using Index = typename TensorRef::Index;
+
+    /// Long Index type
+    using LongIndex = typename TensorRef::LongIndex;
+
+    /// Coordinate for an element in the tensor
+    using TensorCoord = typename TensorRef::TensorCoord;
+
+    /// Number of elements accessed per Shared Memory load
+    static int const kElementsPerAccess =
+        (sizeof_bits<Element>::value >= 32 ? 1 : 32 / sizeof_bits<Element>::value);
+
+    using InstructionCount = MatrixShape<Shape::kRow / InstructionShape::kRow,
+                                         Shape::kColumn / InstructionShape::kColumn>;
+
+    static int const kIterations = (kOperand == Operand::kA) ? InstructionCount::kColumn
+                                                             : InstructionCount::kRow;
+
+public:
+    //
+    // Derived quantities
+    //
+
+    /// Fragment object holding a thread's part of a tile
+    using Fragment =
+        Array<Element,
+              (kOperand == Operand::kA) ? (Shape::kRow* InstructionShape::kColumn / kThreads)
+                                        : (Shape::kColumn* InstructionShape::kRow / kThreads)>;
+
+    /// Memory access type
+    // using AccessType = AlignedArray<Element, kElementsPerAccess>;
+    using AccessType = Array<unsigned, 4>;
+
+    static int constexpr kWarpShapeDivisibleInner =
+        (kOperand == Operand::kA ? InstructionShape::kColumn : InstructionShape::kRow);
+    static int constexpr kAccessesInner = (kWarpShapeDivisibleInner / kElementsPerAccess) / 4;
+    static int const kTilesPerInstruction = InstructionShape::kRow / 8;
+
+private:
+    /// Underlying tensor reference
+    TensorRef ref_;
+
+    /// Origin
+    MatrixCoord origin_;
+
+    /// Iterations in a tile
+    int iterations_;
+
+public:
+    /// Constructor from TensorRef
+    CUTLASS_HOST_DEVICE
+    WarpIteratorFromSmem(TensorRef const& ref, int lane_id)
+        : WarpIteratorFromSmem(ref, {Shape::kRow, Shape::kColumn}, lane_id)
+    {
+    }
+    CUTLASS_HOST_DEVICE
+    WarpIteratorFromSmem(TensorRef const& ref, TensorCoord extent, int lane_id)
+        : ref_(ref), iterations_(0)
+    {
+        int ldsm_vec_num = (lane_id >> 3);
+        if (kOperand == Operand::kA) {
+            origin_ = MatrixCoord(lane_id % 8, 0);
+            static_assert(InstructionCount::kRow * kAccessesInner * kTilesPerInstruction == 4, "");
+            CUTLASS_PRAGMA_UNROLL
+            for (int inst_m_idx = 0; inst_m_idx < InstructionCount::kRow; ++inst_m_idx) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int inner_idx = 0; inner_idx < kAccessesInner; ++inner_idx) {
+                    CUTLASS_PRAGMA_UNROLL
+                    for (int access_m_idx = 0; access_m_idx < kTilesPerInstruction;
+                         ++access_m_idx) {
+                        int access_idx =
+                            access_m_idx +
+                            kTilesPerInstruction * (inner_idx + kAccessesInner * inst_m_idx);
+
+                        MatrixCoord offset(access_m_idx * 8 + inst_m_idx * InstructionShape::kRow,
+                                           inner_idx * 4 * kElementsPerAccess);
+
+                        if (access_idx == ldsm_vec_num) {
+                            if (kTranspose) { offset = MatrixCoord(offset.column(), offset.row()); }
+                            origin_ += offset;
+                        }
+                    }
+                }
+            }
+        } else {
+            origin_ = MatrixCoord(0, lane_id % 8);
+            static_assert(InstructionCount::kColumn * kAccessesInner == 4, "");
+            CUTLASS_PRAGMA_UNROLL
+            for (int inst_n_idx = 0; inst_n_idx < InstructionCount::kColumn; ++inst_n_idx) {
+                CUTLASS_PRAGMA_UNROLL
+                for (int inner_idx = 0; inner_idx < kAccessesInner; ++inner_idx) {
+                    int access_idx = inner_idx + kAccessesInner * inst_n_idx;
+
+                    MatrixCoord offset(inner_idx * 4 * kElementsPerAccess, inst_n_idx * 8);
+
+                    if (access_idx == ldsm_vec_num) {
+                        if (kTranspose) { offset = MatrixCoord(offset.column(), offset.row()); }
+                        origin_ += offset;
+                    }
+                }
+            }
+        }
+
+        ref_.add_coord_offset(origin_);
+    }
+
+    /// Advances an iterator along logical dimensions of matrix in units of whole
+    /// tiles
+    CUTLASS_HOST_DEVICE
+    WarpIteratorFromSmem& add_tile_offset(TensorCoord const& tile_offset)
+    {
+        TensorCoord coord_offset(tile_offset.row() * Shape::kRow,
+                                 tile_offset.column() * Shape::kColumn);
+        if (kTranspose) { coord_offset = TensorCoord{coord_offset.column(), coord_offset.row()}; }
+        origin_ += coord_offset;
+
+        ref_.add_coord_offset(coord_offset);
+
+        return *this;
+    }
+
+    /// Advances the iterator along the advance dimension
+    CUTLASS_DEVICE
+    void advance()
+    {
+        if (kOperand == Operand::kA) {
+            add_tile_offset({0, 1});
+        } else {
+            add_tile_offset({1, 0});
+        }
+
+        iterations_ = 0;
+    }
+
+    /// increase iterations in a tile
+    CUTLASS_HOST_DEVICE
+    WarpIteratorFromSmem& operator++()
+    {
+        iterations_++;
+
+        if (iterations_ >= kIterations) advance();
+
+        return *this;
+    }
+
+    /// Loads a fragment from memory at the location pointed to by the iterator.
+    CUTLASS_DEVICE
+    void load(Fragment& frag) const
+    {
+        AccessType* access_ptr = reinterpret_cast<AccessType*>(&frag);
+        using LoadLayout =
+            typename platform::conditional<kTranspose, layout::ColumnMajor, layout::RowMajor>::type;
+
+        MatrixCoord offset;
+        if (kOperand == Operand::kA) {
+            offset = MatrixCoord(0, iterations_ * InstructionShape::kColumn);
+        } else {
+            offset = MatrixCoord(iterations_ * InstructionShape::kRow, 0);
+        }
+        if (kTranspose) { offset = MatrixCoord(offset.column(), offset.row()); }
+        cutlass::arch::ldsm<LoadLayout, 4>(access_ptr[0], ref_.data() + ref_.offset(offset));
+    }
+};
+
+////////////////////////////////////////////////////////////////////////////////
+
+}  // namespace warp
+}  // namespace gemm
+}  // namespace cutlass
+////////////////////////////////////////////////////////////////////////////////

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/transform/bias_broadcast.h

@@ -0,0 +1,148 @@
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+
+// This does nothing.
+template <typename ThreadMap, typename Shape, typename scalar_t>
+struct BroadcastNoLoad {
+    using Fragment =
+        cutlass::Array<scalar_t, ThreadMap::Iterations::kCount * ThreadMap::kElementsPerAccess>;
+    static const bool kEnable = false;
+    CUTLASS_DEVICE static void load(Fragment& frag,
+                                    scalar_t* ptr,
+                                    int thread_id,
+                                    const cutlass::MatrixCoord& extent,
+                                    int stride)
+    {
+    }
+    CUTLASS_DEVICE static scalar_t*
+    advance(scalar_t* ptr, int B_id, int N_id, int H_id, int strideB, int strideN, int strideH)
+    {
+        return ptr;
+    }
+};
+
+// This is to load the bias matrix from the global memory with on-the-fly
+// broadcast. The shape in global memory is [B, N, 1, 1, L]. Each time we load
+// the last dimension as a L row vector, and we further broadcast the L vector
+// to a tile of size [L, L] by repeating the L vector L times
+template <typename ThreadMap, typename Shape, typename scalar_t>
+struct BroadcastA : public BroadcastNoLoad<ThreadMap, Shape, scalar_t> {
+    using Base = BroadcastNoLoad<ThreadMap, Shape, scalar_t>;
+    static const bool kEnable = true;
+    using layout = cutlass::layout::AffineRank2RowMajor;
+
+    using GmemTileIterator = cutlass::transform::threadblock::
+        PredicatedTileIterator<Shape, scalar_t, layout, 0, ThreadMap>;
+    using Fragment = typename GmemTileIterator::Fragment;
+
+    CUTLASS_DEVICE static void load(Fragment& frag,
+                                    scalar_t* ptr,
+                                    int thread_id,
+                                    const cutlass::MatrixCoord& extent,
+                                    int stride)
+    {
+        GmemTileIterator iter({layout(0, 1)}, ptr, extent, thread_id);
+        iter.load(frag);
+    }
+
+    CUTLASS_DEVICE static scalar_t*
+    advance(scalar_t* ptr, int B_id, int N_id, int H_id, int strideB, int strideN, int strideH)
+    {
+        return ptr + B_id * strideB + N_id * strideN;
+    }
+};
+
+// This is to load the bias matrix from the global memory with on-the-fly
+// broadcast. The shape in global memory is [B, 1, H, L, L]. Each time we load
+// a [L, L] matrix. Different N use the same bias matrix when B and H are the
+// same.
+template <typename ThreadMap, typename Shape, typename scalar_t>
+struct BroadcastB : public BroadcastNoLoad<ThreadMap, Shape, scalar_t> {
+    using Base = BroadcastNoLoad<ThreadMap, Shape, scalar_t>;
+    static const bool kEnable = true;
+    using layout = cutlass::layout::RowMajor;
+
+    using GmemTileIterator = cutlass::transform::threadblock::
+        PredicatedTileIterator<Shape, scalar_t, layout, 0, ThreadMap>;
+    using Fragment = typename GmemTileIterator::Fragment;
+
+    CUTLASS_DEVICE static void load(Fragment& frag,
+                                    scalar_t* ptr,
+                                    int thread_id,
+                                    const cutlass::MatrixCoord& extent,
+                                    int stride)
+    {
+        GmemTileIterator iter({layout(stride)}, ptr, extent, thread_id);
+        iter.load(frag);
+    }
+
+    CUTLASS_DEVICE static scalar_t*
+    advance(scalar_t* ptr, int B_id, int N_id, int H_id, int strideB, int strideN, int strideH)
+    {
+        return ptr + B_id * strideB + H_id * strideH;
+    }
+};
+
+template <typename Shape,
+          typename scalar_t,
+          int kThreads,
+          template <typename, typename, typename>
+          class Broadcast1_,
+          template <typename, typename, typename>
+          class Broadcast2_>
+struct AttentionBiasEpilogue {
+    using ThreadMap = cutlass::transform::PitchLinearStripminedThreadMap<
+        cutlass::layout::PitchLinearShape<Shape::kColumn, Shape::kRow>,
+        kThreads,
+        1>;
+
+    using Broadcast1 = Broadcast1_<ThreadMap, Shape, scalar_t>;
+    using Broadcast2 = Broadcast2_<ThreadMap, Shape, scalar_t>;
+
+    Broadcast1 broadcast1;
+    Broadcast2 broadcast2;
+
+    using Ref = cutlass::TensorRef<float, cutlass::layout::RowMajor>;
+    using SmemTileIterator = cutlass::transform::threadblock::
+        RegularTileIterator<Shape, float, cutlass::layout::RowMajor, 0, ThreadMap>;
+
+    CUTLASS_DEVICE void operator()(const Ref& ref,
+                                   scalar_t* ptr1,
+                                   scalar_t* ptr2,
+                                   int thread_id,
+                                   const cutlass::MatrixCoord& extent,
+                                   int stride)
+    {
+        static_assert(Broadcast1::Fragment::kElements == Broadcast2::Fragment::kElements,
+                      "The two broadcast fragments must have the same number of "
+                      "elements");
+        typename SmemTileIterator::Fragment frag;
+        frag.clear();
+        float* frag_ptr = reinterpret_cast<float*>(&frag);
+        if (Broadcast1::kEnable) {
+            typename Broadcast1::Fragment frag1;
+            frag1.clear();
+            broadcast1.load(frag1, ptr1, thread_id, extent, stride);
+            scalar_t* frag1_ptr = reinterpret_cast<scalar_t*>(&frag1);
+            for (int i = 0; i < Broadcast1::Fragment::kElements; ++i) {
+                frag_ptr[i] += static_cast<float>(frag1_ptr[i]);
+            }
+        }
+        if (Broadcast2::kEnable) {
+            typename Broadcast2::Fragment frag2;
+            frag2.clear();
+            broadcast2.load(frag2, ptr2, thread_id, extent, stride);
+            scalar_t* frag2_ptr = reinterpret_cast<scalar_t*>(&frag2);
+            for (int i = 0; i < Broadcast2::Fragment::kElements; ++i) {
+                frag_ptr[i] += static_cast<float>(frag2_ptr[i]);
+            }
+        }
+        SmemTileIterator iter(ref, thread_id);
+        iter.store(frag);
+        __syncthreads();
+    }
+};

venv/lib/python3.10/site-packages/deepspeed/ops/csrc/deepspeed4science/evoformer_attn/transform/tile_smem_loader.h

@@ -0,0 +1,93 @@
+/***************************************************************************************************
+ * Copyright (c) 2017 - 2023 NVIDIA CORPORATION & AFFILIATES. All rights
+ *reserved. SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *this list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holdvr nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ *ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ *LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ *CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ *SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ *INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ *CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ *ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ *POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************************************/
+
+// Copyright (c) Microsoft Corporation.
+// SPDX-License-Identifier: Apache-2.0
+
+// DeepSpeed Team
+
+#pragma once
+#include <cutlass/cutlass.h>
+#include "cutlass/aligned_buffer.h"
+#include "cutlass/array.h"
+#include "cutlass/coord.h"
+#include "cutlass/layout/matrix.h"
+#include "cutlass/layout/pitch_linear.h"
+#include "cutlass/numeric_types.h"
+#include "cutlass/platform/platform.h"
+#include "cutlass/transform/pitch_linear_thread_map.h"
+#include "cutlass/transform/threadblock/predicated_tile_iterator.h"
+#include "cutlass/transform/threadblock/regular_tile_iterator.h"
+
+template <typename scalar_t,              // scalar type
+          typename ThreadblockTileShape,  // size of tile to load
+          int Threads,                    // number of participating threads
+          int ElementsPerAccess>          // thread access width in elements
+class TileSmemLoader {
+public:
+    using Shape = ThreadblockTileShape;
+    using SmemTile = cutlass::AlignedBuffer<scalar_t, ThreadblockTileShape::kCount>;
+
+    using ThreadMap = cutlass::transform::PitchLinearStripminedThreadMap<
+        cutlass::layout::PitchLinearShape<ThreadblockTileShape::kColumn,  // contiguous
+                                          ThreadblockTileShape::kRow>,    // strided
+        Threads,                                                          // Threads
+        ElementsPerAccess>;                                               // ElementsPerAccess
+
+    using GmemTileIterator = cutlass::transform::threadblock::PredicatedTileIterator<
+        ThreadblockTileShape,       // Shape
+        scalar_t,                   // Element
+        cutlass::layout::RowMajor,  // Layout
+        0,                          // AdvanceRank
+        ThreadMap>;                 // ThreadMap
+
+    using SmemTileIterator =
+        cutlass::transform::threadblock::RegularTileIterator<ThreadblockTileShape,       // Shape
+                                                             scalar_t,                   // Element
+                                                             cutlass::layout::RowMajor,  // Layout
+                                                             0,           // AdvanceRank
+                                                             ThreadMap>;  // ThreadMap
+
+    using Fragment = typename GmemTileIterator::Fragment;
+
+    /// load a tile from global memory into shared memory
+    CUTLASS_DEVICE
+    static void load(GmemTileIterator tile_load_iter, SmemTileIterator tile_store_iter)
+    {
+        Fragment tb_frag;
+        tb_frag.clear();
+        tile_load_iter.load(tb_frag);
+        tile_store_iter.store(tb_frag);
+
+        __syncthreads();
+    }
+};