dangpranay/CodeQwen1.5-7B-MG-Verilog

Introduction

This model is a 4-bit quantized, fine-tuned version of CodeQwen1.5-7B on the MG-Verilog dataset. This model has been fine-tuned with the aim of improving the accuracy and latency of Verilog based Code Generation tasks. Developed in collabortion with @nimeshpandey

Training Procedures

This model has been trained using the A100 GPU in a Google Colab environment. The training script and Colab notebook can be found on this GitHub repository (https://github.com/pranaydang/qwen-train-verilog) (repository still in progress).

Here are the specifications of the process used:

• The MG-Verilog dataset was downloaded from Gatech-EIC/MG-Verilog. I have copied this dataset to my GitHub repository used to train the model.

• The dataset and the training script was uploaded to my Google Drive for easy access on Colab.

• A 4-bit quantized version of the base model is loaded using a quantization configuration using BitsAndBytesConfig and AutoModelForCausalLM.from_pretrained. The follwing are the specifications of the quantization configuration:

  load_in_4bit=True,
  bnb_4bit_use_double_quant=True,
  bnb_4bit_quant_type="nf4",
  bnb_4bit_compute_dtype=torch.bfloat16
  

• The model is prepared for k-bit training using prepare_model_for_kbit_training.

• The PEFT configuartion is set and a PeftModel is created from the quantized model. Here are the specifications of the PEFT configuration:

  r=64,
  lora_alpha=16,
  target_modules=["q_proj", "v_proj"],
  lora_dropout=0.05,
  bias="none",
  task_type=TaskType.CAUSAL_LM
  

• The Data Collator class implemented in the training script has been taken directly from qlora.py from the MG-Verilog GitHub (https://github.com/GATECH-EIC/mg-verilog)

Citations

Citation for CodeQwen1.5-7B:

@article{qwen,
  title={Qwen Technical Report},
  author={Jinze Bai and Shuai Bai and Yunfei Chu and Zeyu Cui and Kai Dang and Xiaodong Deng and Yang Fan and Wenbin Ge and Yu Han and Fei Huang and Binyuan Hui and Luo Ji and Mei Li and Junyang Lin and Runji Lin and Dayiheng Liu and Gao Liu and Chengqiang Lu and Keming Lu and Jianxin Ma and Rui Men and Xingzhang Ren and Xuancheng Ren and Chuanqi Tan and Sinan Tan and Jianhong Tu and Peng Wang and Shijie Wang and Wei Wang and Shengguang Wu and Benfeng Xu and Jin Xu and An Yang and Hao Yang and Jian Yang and Shusheng Yang and Yang Yao and Bowen Yu and Hongyi Yuan and Zheng Yuan and Jianwei Zhang and Xingxuan Zhang and Yichang Zhang and Zhenru Zhang and Chang Zhou and Jingren Zhou and Xiaohuan Zhou and Tianhang Zhu},
  journal={arXiv preprint arXiv:2309.16609},
  year={2023}
}

Citation for MG-Verilog:

@inproceedings{zhang2024mgverilog,
  title={{MG-Verilog:} Multi-grained Dataset Towards Enhanced LLM-assisted Verilog Generation},
  author={Zhang, Yongan and Yu, Zhongzhi and Fu, Yonggan and Wan, Cheng and Lin, Yingyan (Celine)},
  booktitle={The First IEEE International Workshop on LLM-Aided Design (LAD'24)}, 
  year={2024}
}