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H: Linearity of power amplifiers
How are power amplifiers linear? Although they have some distortion they are still considered linear.
I tried referencing many materials, but I couldn't find an answer. The characteristics of transistors are non-linear for large signals and hence the output waveform for say a sine wave should be some mixture of sine and exp - but we don't see that.
AI: Expanding on my earlier comment... When there is excess gain available, NFB (negative feedback) is used to greatly improve linearity with non-linear devices and structures. (The following is from some old notes I'd saved. And yes, it's late to the game, as you have accepted an answer, but I don't care.)
Let's take this non-linear equation:
$$y = e^x$$
And now take 10% of the output and feed it back as NFB. The resulting equation is:
$$y = e^{x-0.1\, y}$$
That solves as:
$$y = 10\:\operatorname{Lambert-W}\left(\,0.1\: e^x\,\right)$$
Now compare the two curves:
(The above chart came from this Wolfram link.)
And that's the effect of just 10% NFB applied to an exponential curve.
NFB will do that to ANY equation. Let's grab a different one:
$$ y = 4\, x^2 - 6\, x + 3$$
Apply 10% feedback to it to get:
$$ y = 4\left(x-0.1\, y\right)^2 - 6\left(x-0.1\, y\right) + 3$$
Find now two solutions:
$$\begin{align*} y &= 10\, x + 5\: \pm 5\,\sqrt{10\, x - 2}\end{align*}$$
Plotting those:
(The above chart came from this Wolfram link.)
Now try:
$$ y = e^{\sin(x)+1}$$
That's got to be a mess, right? An exponential of a constant plus a sine wave?
Apply 30% NFB:
(The above chart came from this Wolfram link.)
Note that the sinusoid is nearly recovered from the non-linear mess! (This fact alone can be quite important for audio.)
Take ANY equation you want and feed back some fraction of the output as negative feedback, back into the input variable, and the resulting equation is moved towards linearity.
NFB is very, very powerful medicine.
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H: Feedback impact of collector-base shunt resistor in common emitter amp stage
I made this 3 transistor Rf amp which works well at 10 MHz and has 50 ohm output impedance, a gain of 8.2 (18.3 dB) and quiescent curent of 28.6 mA. It consists of a common emitter stage followed by 2 emitter follower stages. (Credit: Nick the vic M0NTV)
My question concerns only the first stage and, in particular the 680 Ohm feedback shunt resistor between collector and base.
At 10 MHz the reactance of a 10 nF capacitor is <<1 Ohm so, as far as the signal is concerned, all capacitors can be replaced by a short. This results in having 2 emitter resistors in parallel (180 & 15) which make us 14 Ohms together. To this I have added the internal emitter resistance of re = 3 Ohms (25 mV divided by the 8 mA emitter current). This gives the simplified circuit:
If I'm correct, but for the feedback resistor the gain would be approx 330/17 i.e. 19.4 or 25.9 dB (Rl divided by RE total). So the effect of introducing the feedback resistor is to halve the gain.
I've tried doing the calculation considering the effect of a small dV increase in Vb to work out the gain Av = dVc/dVb but end up going round in circles. Going to LTSpice might give the answer but would add nothing to my understanding.
Can someone help me out?
AI: You need to take the source impedance into account to calculate this correctly. I'm assuming that the input source is meant to have a 50 Ω impedance. Hence I'd visualize it like this: -
I'd then analyse it like an amplifier with an open-loop gain of \$\frac{-330}{17}\$: -
simulate this circuit – Schematic created using CircuitLab
If I call the output Y and the input X, the signal after the summing node (Z) is: -
$$Z = X + Y\cdot\dfrac{50}{680}$$
Then we know that Z multiplied by -330/17 = Y: -
$$Y = \left(X + Y\cdot\dfrac{50}{680}\right)\cdot\dfrac{-330}{17}$$
Hence: -
$$Y\left(1 + \dfrac{16500}{11560}\right) = X\cdot\dfrac{-330}{17}$$
Or,
$$Y = X\cdot\dfrac{-19.412}{\left(1 + \dfrac{16500}{11560}\right)}$$
Can someone help me out?
Chew on it a tad more and the gain (Y/X) comes out at -7.997.
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H: Has the user's guide for the UVM-IEEE-2020 framework been published yet?
I was able to find the User's guide for the UVM-1.1 and UVM-1.2 frameworks, but I haven't been able to find the same document for UVM-IEEE-2020.
There are of course resources posted at the Accellera's site such tutorials and videos that describe some of the main updates. However, our team is looking for a formal user's guide of sorts.
AI: Yes, IEEE Std 1800.02-2020 is available on the IEEE website. The document is titled:
IEEE Standard for Universal Verification Methodology Language
Reference Manual
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H: How is the PASCO microwave receiver realized?
I took a physical lab course where I worked on the microwave PASCO set-up WA-9316.
Having a little background on electronics, I wondered how their microwave receiver works and found a more or less dated schematic. Here's the interesting part:
According to the documentation:
"A microwave horn [...] collects the microwave signal and channels it to a Schottky diode in a 10.525 GHz resonant cavity. The diode responds only to the component of a microwave signal that is polarized along the diode axis, producing a DC voltage that varies with the magnitude of the microwave signal."
So my questions are:
I would use a Schottky diode as an incoherent demodulator as usually done in microwave front-ends (see e.g. this link). Why is the diode used with the anode as the positive electrode?
Do you have other references to this alleged (to me) configuration?
AI: It's a crystal receiver with a low frequency amplifier. The horn antenna is assumed to be good enough bandpass filter (=to keep out lower frequency signals) and of course it can catch enough power from a near or strong enough transmitter to generate a DC voltage by rectifying the microwaves with a diode. The diode is a Schottky diode designed to rectify at several GHz, no common Si-PN diode would work.
The amp is an ordinary opamp connected to a non-inverting amplifier. The gain is adjustable.
If the diode rectifies a pulsed microwave signal the amp output DC pulses, which can be heard as a sound, if one feeds them into a speaker. The speaker should be active one, an opamp cannot feed a speaker properly. Audible sound needs that the microwave signal is pulsed in an audible pulse repetition frequency.
A continuous microwave signal generates non-zero DC output. There seems to be an offset zeroing potentiometer intended for calibration the output to 0V when there's no DC input.
This receiver is not especially sensitive, but it can detect signals in many experiments. The linked system very likely allows experiments where moving target causes doppler shifts.
When Doppler shifted and the original signal from a continuous sinewave transmitter meet in this receiver at the same time, one can see how the DC output voltage varies just in the Doppler shift frequency. That's effectively the "frequency difference mixing result". A speaker may produce a sound of the Doppler shift. In the past there were land surveillance radars based on this effect. A well trained radar operator could hear what kind of target moved in the radar beam.
Communication radio links must have much more advanced receiver designs.
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H: Capacitor selection with current rating for switching regulator
The example design parameters in the TPS54332 datasheet are as follows:
In the input capacitor selection section, the values confused me.
Selected capacitors parameters are 10uF, ceramic X5R, 25V, 3mΩ ESR, 3A current rating.
But in ceremic capacitors these parameters are not specified and I am not sure if they can meet these values.
Although these values are specified in electrolytic capacitors, they do not meet these values. I can only see these values on polymer capacitors but I don't want to use them.
I'm having the same confusion for the output capacitor. Is there something I got wrong? Would it be a critical mistake to make a design by ignoring the capacitor's ESR and ripple current?
AI: The info is a bit hard to find.
For Murata, you can use their website (click on ceramic capacitors).
Then, picking a capacitor, you can plot "Temp rise" (orange button) which will tell you how much hotter above ambient the capacitor will be depending on ripple current.
You can also plot its ESR by clicking "Frequency characteristic" tab, then "R" button.
The "Product details" page will also give useful curves. Here's an example. It's quite convenient that your 1MHz DC-DC frequency corresponds to the minimum impedance point of these 10µF caps, which is also their ESR.
Would it be a critical mistake to make a design by ignoring the capacitor's ESR and ripple current?
Yes, always. If it's an electrolytic, it can pop from overheating, and if it's a tantalum, it can roast your board. But ceramics tend to have ridiculously good ESR and ripple current rating for the size, so in this case it's pretty easy.
In addition, the capacitor will have several vias to the ground plane, and most likely either a power plane or copper pour attached to it. Both act as heat sinks, making a tiny cap able to dissipate a surprising amount of power. At this current, make sure you don't use tiny traces, not just for heat, but you need the low impedance of a large copper area.
If you're worried, put several in parallel.
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H: What causes a person to get 'blown across' the room in an electric shock?
Recently I came across this article of a man being 'catapulted' across the room: https://news.sky.com/story/desperate-man-was-dead-for-two-minutes-after-being-electrocuted-while-stealing-scrap-to-pay-bills-during-lockdown-12621745
This reminds me of stories I heard of kids sticking metal objects into electrical outlets and getting 'blown across' the house.. what causes this? is there a term for this?
AI: Muscle contractions.
Nerves operate using electrical impulses, and are roughly analogue, so more electric current = muscle pulls harder.
An electric shock causes much larger currents than your nerves normally use, so makes your muscles contract as hard as they can.
You mostly get thrown because the pairs of muscles aren't symmetric - the muscles for straightening your legs are stronger than the ones for bending them. So when both sets of muscles pull harder than they normally should, your legs straighten with more force than normal, and you go flying as if you'd jumped unnaturally hard.
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H: Finding transfer function from Bode plot
While I know how to find the transfer function from the response graph, I don't know
how to find it from Bode plot.
What I know about the system:
The system is a second order system
The system has no zeros
According to the Bode plot, I estimate that there is a double pole at w=2.5
therefore, I need to find Wn, zeta and K.
This is the graph:
You can ignore the noise in the end of the phase graph.
AI: For a 2nd-order low-pass filter you can use this to calculate what the damping ratio, (\$\zeta\$) is: -
Image from my basic website.
Look at the peaking frequency in your spectrum and calculate the damping ratio from that. It looks like "k" the gain coefficient is unity (because of the low frequency gain aligning with 0 dB on your picture) so this needn't play a part anymore.
Once you have the damping ratio you can calculate what \$\omega_n\$ (also referred to as \$\omega_0\$) is.
It looks like you have about 8 dB of peaking. That's a ratio of 2.512. So solve the peaking amplitude formula to find \$\zeta\$. I estimate \$\zeta\$ to be about 0.2050.
I estimate the peak position in the spectrum to be at about 0.957053 of the natural resonant frequency, \$\omega_n\$.
Of course you could work a little bit on the graph to find the same answers: -
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H: What is the PE in 4P+PE connector mean?
I'm wiring a valve actuator to a connector for quick-disconnect purposes. The actuator has five wires so I thought of getting a connector that says 4p+PE, however I was told that 5p was needed.
I'm confused because I thought the 5th pin on the 4p+PE connector (the PE, I'm guessing) is where I can wire in the ground wire from the actuator. Could someone clarify this for me?
AI: Like @winny said, PE stands for Protective Earth, the ground path for fault currents. Since it is specifically for safety, I don't recommend wiring a power or signal ground to it; get a connector with the correct number of power/signal contacts and connect the PE contact in accordance with the actuator's spec sheet or leave it floating if the spec sheet doesn't say anything about it.
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H: Using fuse during initial tests?
I've implemented the presented 80W PFC boost pre-regulator in the following application note without using the applied fuse at the input. Surely I will add the fuse to the finalized tested circuit. But it was recommended to me not to use the fuse for early tests because it doesn't protect the semiconductor devices from failure and if you use the fuse, besides losing the main components, now you also lose the fuse without any advantage. Is it correct?
The reason for most failures is due to the "gate staying ON for a long time" and resulting in high current flow, core saturation, short circuit of the input terminal, and burning of the diode bridge, MOSFET, CS resistors, and IC.
Does the fuse protect the circuit from these failures and explosions during initial tests or do you recommend continuing testing without a fuse?
https://www.st.com/resource/en/application_note/cd00195944-solution-for-designing-a-transition-mode-pfc-preregulator-with-the-l6562a-stmicroelectronics.pdf
AI: Does the fuse protect the circuit from these failures (...?)
Would the fuse protect the switching element? Probably not - this is consistent with my experiences as well.
do you recommend continuing testing without a fuse?
Oh I've done this before and it doesn't end well. Essentially your circuit becomes the fuse, and does it's protection by burning until a circuit is no longer complete, and even 88VAC can draw a reasonable arc once the air ionizes. Do recall that mosfets like to blow short as well.
Even if the fuse wouldn't protect the switching elements, the difference in energy between a unfused failure and an fused failure could save the PCB, or adjacent capacitors and inductors/transformers, perhaps even the heatsink or enclosure.
A fuse would avoid putting a nasty scorch mark on the workbench anti-static mat that all your coworkers could point to and say "remember that time you set fire to the bench?".
Digikey has 4A fuses for 30 cents a piece in qty 10 packs in my country, which is cheap insurance in my opinion.
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H: Dependent source circuit find voltage
Suppose we have this circuit
simulate this circuit – Schematic created using CircuitLab
How to do nodal analysis for this circuit?
Is it $$5-\frac{5-V_{A}}{2}-V_{A} = 0$$?
or $$5-\frac{5-V_{A}}{2} - 2 \frac{5-V_{A}}{2} = 0$$
EDIT
By
AI: You need to introduce \$I_M\$ into the fray or you'll just get 0 = 0 and that helps nobody: -
$$5 = 2\cdot I_M + V_A$$
Where \$V_A = 2\cdot I_M\$ (as per the dependent source) so: -
$$5 = 2\cdot I_M + 2\cdot I_M$$
And, \$I_M=1.25\text{ amps}\$ and \$V_A = 2.5\text{ volts}\$. Sanity check: -
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H: Is this a "gapped" ferrite transformer/choke?
Here, two "E" cores are bonded together with brown epoxy. There isn't any intentional, visible gap, yet there are three bond points and that must introduce some gap...
How are these considered: gap or no gap?
Edit: There is no visible gap on the outer legs - if you zoom in, the halves are very close. But "no visible" could still be 0.005mm, so right there is 0.015mm. This particular coupled inductor has not been disassembled to determine if an actual gap was cut into the center leg; lets assume all legs are equal in length.
AI: There will always be a small gap between the contact surfaces of two ferrites because of surface roughness. This processing note from TDK provides additional information:
So your example would probably be considered an ungapped core.
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H: Selection of voltage transformer and current transformer for protection in substation
having a 66/11 kV substation, how does one know which voltage transformer and current transformer to use? They secondary side would be connected to a distance relay for monitoring. I know they need to withstand the maximum continuous current and a fault current of 31.5kA. I also know that we need to consider the burden on the secondary side, what I dont know is the following:
turns ratio
secondary cores and windings
Updated:
AI: We typically size CTs so at bank full load they have less than 5A in secondary (for 5A CTs like used in U.S.).
Full load current on 66 kV side of your 10 MVA bank is,
$$I_H= 1000\frac{10}{\sqrt{3}\times66}= 87.5 A$$
So, a \$600:5\$ CT would suffice.
Full load current on 11 kV side is,
$$I_L= 1000\frac{10}{\sqrt{3}\times11}= 525 A$$
So, a \$3000:5\$ CT would work.
You usually select the VTs to provide 115 V secondary ph-ph or whatever your protective relays/ instruments want.
EDIT: To show utility grade multi-ratio bushing CT. One core, multiple taps. Only one pair of taps used at a time. The primary conductor goes through center of core.
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H: Explanation of Analog Input Module
I'm trying to wire this module. I'm just confused as to what the difference is between the two triangles and how would I connect them?
AI: That appears to be internal to the module, likely +24VDC and 0VDC. If so then you should only need to deal with the pinout on the left.
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H: What does a function mean that doesn't have "void", "int", etc in front of it mean?
I am following a programming build in Arduino and I came across this code here:
ISR(PCINT2_vect) {
hall3state = digitalRead(hall3);
NextStep();
}
ISR(ADC_vect) {
int x = ADCH; // read 8 bit value from ADC
OCR1B = map(x,0,255,1,799);
}
I don't understand how the functionality of this code works. Are these 2 ISR() code snippets functions? If so how does this function get called because there is nowhere else in the code that calls ISR(). Also how is there 2 different functions with the exact same name? If you call ISR() how do you know which one will get called?
I don't need you to explain what the code is doing, I just don't understand how the computer knows when to run these functions because we never call it anywhere else in the code.
If you need to download the entire code you can get it here
AI: The functions are interrupt handlers, defined using the ISR(vector, attributes) macro. The macro generates a proper platform-specific function signature, including the return type (usually void).
This macro automatically "wires" the function body to the given interrupt vector. Note that the vector must be spelled correctly: if there's a typo or a wrong name is used, the function will have no effect.
The first and only required argument of the macro is the name of the interrupt vector.
PCINT2_vect is the Pin Change Interrupt Request 2 vector.
ADC_vect is the ADC Conversion Complete vector.
Those two functions are thus assigned as interrupt handlers for a given interrupt vector. As soon as you enable the interrupt from a given source, those functions will get called when the respective interrupt is asserted.
For a list of interrupt vectors and further details, see the documentation of the <avr/interrupt.h> header.
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H: MOSFET Driver Base and Gate resistors and other input stage for PWM motor control
I have the below basic pwm circuit for speed controller of a 12V ~10A motor -
I have seen this circuit but am unsure of how to select base or gate resistors. These should be to protect the gate from voltage spikes as far as I understand? I am also interested in how this changes based on the different mosfets.
Also I have seen increased input stages, but am not sure if those are necessary or the purpose of them?
EDIT: I have updated as follows -
With the current measurement being done as below:
EDIT2: As pointed out the current sense has issues. The corrected input is here -
EDIT 3: I have further updated the circuit as follows utilizing a ZXCT1009 -
AI: Bobflux covered the big issues, so just some extra notes:
The proposed RB isn't very useful, as it's effectively divided by hFE and shows up as an equivalent value at the emitter output.
D2 is incorrectly chosen. For a 10A motor, assuming it could be operated at low RPM and full torque -- that is, dropping a couple volts (driven at low duty cycle) while at full amps -- there's nearly 10A average in the diode. It's also a slow-recovery type, so will likely overheat even at fairly modest switching frequencies (~kHz?). Something MBR1045(S) or the like would be a fine choice here.
Also if it's going to be PWM, something should probably be watching motor current, so that PWM can be reduced or disabled if it should go too high. This has saved endless numbers of transistors when a mechanism jams up, say.
Also make sure there's a substantial capacitor beside Q5, D4 and RC, probably 1000µF or more. Keep the distance (placement and trace length) minimal between these components.
Regarding the current sense: put it in series with the motor itself. As shown, it will only sense transistor current, so you can't tell how much current is circulating when the transistor is off. Note SAC_OA must handle an input common mode voltage near +12V, which isn't obvious whether it can handle it, or if this implies its VCC will be above 12V.
There are two easy solutions to this:
Use a purpose-made current sense amplifier. This includes a high-CMRR diff amp, and either a current output (e.g. ZXCT1107), or a ground referenced (e.g. INA180) or other referenced (e.g. INA199) voltage output. No need to match precision resistors, they're already trimmed for you.
Use an "Over The Top" type op-amp. These are something like, self-powered from the inputs themselves, so they can still work even for Vin > Vcc; the downside is that current draw (input bias current), but they're carefully designed to use very little (~µA), certainly nothing you can't handle here.
Also, the diff amp shows a gain of 50, but RC already makes 1V at 10A (and dissipates 10W at that!); are you really expecting 50V full scale here?
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H: LVDS voltage levels
LVDS terminology can be a bit confusing when noted that Vcm typically is 1.2V and Vd 350mV. Does this mean 350mV as in +/-350mV so (Vin+ - Vin-) is (2*350mV) or overall swing (peak to peak of a signal) is 350mV?
For example, in this diagram the typical swing is (+/-250mV-400mV) between the inputs so overall swing is (500mV - 800mV) with 1.2V CM for LVDS standard.
Credit: https://www.star-dundee.com/spacewire/spacewire-users-guide/spacewire-links/signal-level/signal-level-and-noise-margins/
In this diagram the LVDS standard is 1.2V but the overall swing is 350mV between the inputs rather than (500mV - 800mV) as shown before:
Credit: https://www.thine.co.jp/en/contents/detail/serdes-lvds.html
Either I am not understanding something here or one of the pictures has a mistake. What is the correct LVDS standard and what does it mean to have Vd of 350mV?
AI: Yes, the first reference seems to be inconsistent: note they show 500-800mV difference, but the diagram immediately following still only shows 3.5mA into 100 ohms, which can only ever make 350mV.
The receiver, has a 100mV minimum input threshold range (and, as far as I know, most devices greatly outperform this limit -- some indeed being usable as cheap, high speed, general purpose comparators, if you're feeling clever); the fact that the signal is several times larger than this, is enough. Note there's also bus (multimaster, double terminated) vs. link LVDS, which halves the termination resistance, and doubles the current. Or transmitters may simply deliver double the current all the time, and that's that (in which case you'd get voltages like the first diagram).
It seems these are other standards, so if you're referring to "LVDS" as EIA-644 specifically, the other levels seem to be erroneous. (I don't have the standards to hand, mind; if others can provide better references, check them out.)
http://www.interfacebus.com/Design_Connector_RS644.html
Here again there seems to be some confusion; my guess is their diagram reflects the collection of standards, not EIA-644 alone. Hence the RX/TX and two termination resistors, rather than a single direction lane.
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H: Some questions regarding measuring current using ACS712
I'm using an ACS712 0-5A current sensor to measure the input current to a boost converter for the implementation of MPPT algorithm. To do so, I need to connect the ACS712 chip in series with a PV voltage source. There are two questions I have regarding this.
Will the inductor current ripple( assuming I designed it for 10% ripple) significantly affect the MPPT tracking? Is it recommended to use an averaging algorithm to ensure the sensor measures the average inductor current?
The sensor has two screws that act as the current input terminals. Underneath the screws are two pins which seem to be soldered to the board. Instead of providing the input current through the screws, can I directly solder the input current wires to these two pins sticking out? I have attached some pictures.
AI: It could, if the sampling and tracking cause the ripple to alias into the sensed signal. MPPT is basically a correlation function evaluated in real time; anything that correlates to the test signal, accidentally or otherwise, goes into it. Presumably you'll apply adequate filtering, and/or sampling at a slower (and preferably orthogonal) frequency, and/or a test signal that is in turn orthogonal to sampling or switching frequencies, to avoid this.
(I'm assuming by "algorithm" you intend this to be a digital solution, so I'm invoking the standard DSP stuff: sampling, aliasing, Nyquist reconstruction, etc.)
For example, if switching is 10kHz, sampling is 10kHz, and they're not phase locked, then the exact timing of the two can drift, and sometimes sample on a peak, sometimes on a valley. This introduces a DC error to the sampled signal. (Which isn't a problem in and of itself, because it's not necessarily correlated to the MPPT test signal.)
For another example, suppose switching is 10kHz, sampling is 9.9kHz, and MPPT test signal is 100Hz. The samples will sometimes land on the peaks, sometimes valleys, and this will not happen randomly, but changing smoothly over time, in fact at 100Hz. Which will show up as a signal to the MPPTer, leading to an error on par with the amount of ripple.
A good plan is to sample at such a rate where you can get reasonable coverage over the ripple; higher is always safe, so, sampling at 100kHz say gets 10 samples for every 10kHz switching cycle, and these can be averaged together for a reasonably stable reading at a lower (decimated) sample rate. If you don't have such high sample rates available, then a fraction is fine, too, preferably one that covers the switching cycles in equivalent time: for example an 9kHz rate picks a sample from each cycle, 10% further ahead each time, and entirely skipping over 1 in 10 cycles. Averaging these together and decimating, gets a 1kHz sample rate with similar statistics as the first case -- assuming the switching waveform is consistent and stable between cycles, of course!
Either example would be a fine candidate for an MPPT testing with say a square wave at, at most, a modest fraction of the final sample rate (after decimation if applicable, or bandwidth (lowpass cutoff rate) in general). So, for 1kHz decimation, getting every other sample as tracking signal would be a bit tight, but say 3 low, 3 high, would be fine. So, less than 1/4 or 1/6 say. I suppose it should be an even fraction, too, so you don't accidentally try and split a rising/falling edge in the middle; but this concern also goes away if a more general waveform is used (line a sine wave, and correlating to that directly -- the digital equivalent of using a balanced mixer instead of a synchronous switch for RF detection).
Or you could use something even more general and (hopefully) immune to expected kinds of interference, like a code sequence correlator, etc. (That's horrendously overkill for such an application, but is merely a natural extension of the method.)
Anyway...
If you need a permanent connection, and the terminal block for some reason isn't adequate, sure, it can be desoldered, wires placed in the holes, and soldered once again. Mind strain relief: soldered wires are notoriously prone to fatigue. The screw terminals are probably better in this regard, used with stranded wire, preferably with a ferrule crimped around.
As for my comment about the converter -- anticipating a future question about that, study current mode control first. Most texts introduce SMPS as, "hey did you know, when you PWM a voltage, you can reduce its average value?" Like, big deal, no one needs to worry about dynamics, ever, right?... The trouble is this: in most SMPS, the inductor current is a free variable, meaning it can take on most any value, independently, if not specifically accounted for by the control. This might seem irrelevant, or helpful -- it has to match the load current eventually, so if it's shooting up or down a bit to get there, maybe it's kinda, just like that? The problem is, the switching transistor/diode can only handle so much current, and fail in not very much time (potentially 100s µs) when that rating is exceeded. A control designed specifically -- and primarily -- to control that current, completely solves this possible mortality.
Once you have current mode control, adjust the current setpoint as needed for whatever end: if regulating voltage, add an error amp to do just that. If regulating input power, or MPPT, add an error amp (and whatever else i.e. MPPT stimulus + detector) on that. You can do both (indeed, probably should, in this case?) by using a wired-OR connection with diodes from the various error amp outputs, into the current setpoint node.
Maybe it's not actually so important for PV, where the source itself is intrinsically limited -- but it still depends, because just the capacitors on input or output can easily store enough energy to destroy transistors, if that energy happens to be used very wrongly for just an instant.
This also goes hand in hand with a caution about digital controls: preferably, solve the cycle-by-cycle behavior in analog, use a controller IC if you must -- indeed, that would be preferred. (And now you don't have to use ploddingly low switching frequencies; 100s kHz are reasonable.) Merely vary the setpoint with a DAC, while monitoring process variables with an ADC. The analog system is intrinsically safe from digital failures -- at worst, the MCU crashing leaves the DAC pegged at full scale, and perhaps a hardware timeout detects the MCU's hung and shuts everything down gracefully. The absolute worst idea is simply slamming gate drivers and an inverter onto an MCU's GPIOs: anything could accidentally set all pins active, and SSST..BANG, there go all the transistors. Good luck debugging that!
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H: Turn an LED on/off LED with a flip-flop counter
I want to make a 7x7 LED matrix which begins to turn on the first one LED to the last and then turns off the way back (spiral matrix.) I'm trying to turn the LEDs on/off by using signal created by flip flop counter.
I have a MOD 15 synchronous counter using JK FFs and at the 9th state (the 7 segment LED display "8") I use the output signal go through the AND gate so I have the high signal and connect to the LED, then the LED turn ons. Is there any way to keep the LED turn on until I use another high signal to turn it off?
AI: any help would be greatly appreciated
I would use an MCU but, if that is not an option then, a string of shift registers, something like this: -
Image from here. The above is a small section that needs repeating to produce outputs for all your LEDs. Shown above are four cascaded D type flip-flops and these would be used with 4 LEDs so, you'll need one per LED.
So with logic high on the input (labelled D3), for each clock pulse, logic high gets shifted along the outputs thus, each LED in your spiral can be illuminated sequentially with the previous ones remaining on.
The problem then comes with turning them off sequentially in reverse order but this can be achieved by a similar circuit operating in reverse. You can engineer a simple logic gate circuit for each LED to disable the previously illuminated LEDs in reverse order: -
simulate this circuit – Schematic created using CircuitLab
Or, you can use the reversing set of flip-flops to raise the LED cathode to 5 volts (logic level 1) to extinguish each LED in turn.
I have a MOD 15 synchronous counter using JK FFs
You probably don't really want to be using counters but, someone else may come up with a cool answer that does.
You did say "any help would be appreciated"!
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H: Does anyone know what CJMCU on breakout boards means?
I have recently been looking at a lot of breakout boards and noticed they have CJMCU in their description and even printed on them.
Initially I thought it may be an acronym and then thought it may be a brand but I have not been able to find any information at all.
Does anyone know what it means?
AI: It's just a brand name as pointed out in the comments by CL..
cjmcu.com
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H: What are the differences between these ferrite cores?
The ER, EC, and ETD ferrite cores are presented in a datasheet but visually I don't see any difference between them. The search results also say the same thing.
AI: EC and ETD are almost identical. ER is slightly different.
EC and ETD (ETD means economic transformer design) have both circular centre leg and circular winding window. ER's winding window is not perfect circular. Look at the outer legs closely and you'll get what I mean.
EC and ETD can generally be used interchangeably (e.g. EC34 or ETD34).
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H: Understanding the specs of an electronic ballast (UV-Tubes)
I got lost on the topic of selecting the right electronic ballast for 4 UV-tubes (Cosmolux S pink 15W). I have learned about magnetic ballasts and starters, about electronic ballasts and connecting them in series or parallel (or not).
Currently I am using an electronic ballast suitable for 4 tubes (4x15W) which I would like to replace by a new electronic ballast.
The datasheet of the tubes says:
Supply Voltage = 230V +/- 0.2%
Ballast = 15W /230V
Lamp wattage = 13W +/- 5W
Lamp current = 395 mA
Lamp voltage = 40V +/- 10V
This voltage and current rating would indicate 0.395A * 40V = 15.8W. Not exactly 13W, but within range.
The driver I have connected says:
U-OUT = 300V
Iout = 0.5A
I have several questions:
How can this setup work (because it is connected and it works). 300V as U-OUT is not even close to 40V, yet it does not damage the tubes. What is this 300V meaning?
At what inputs of the tubes should I be able to measure the 40V? Because, when ON, the voltage I measure is really low, talking about tens of mV's. (Measured over outputs 10&7 and over outputs 10&9).
I read that a series connection of tubes is possible for magnetic ballasts. Then the required power should be doubled and an extra starter should be added. Is such a series configuration at all possible with an electronic ballast?
The current that is supposed to flow (395mA), is it transported through the tubes from the one end to the other?
The electronic ballast says 4x15W = 60W. What causes this spec, because multiplying 300V by 0.5A would result in 150W -which is unlikely, so I must be thinking wrongly-.
The sources I used to get a better understanding are:
https://www.youtube.com/watch?v=qLaD11LITbQ
Multiple forum questions about wiring an electronic ballast.
AI: Uout would be the (max) striking voltage, not running.
Pin 9-10 would only see the preheat voltage during starting, after that zero. 10-7 should see the running voltage, but you need an oscilloscope to measure it or a high end DMM which can measure in the high tens of kHz. Most DMMs have low pass filter (intended or just from parasitics) and will have more and more attenuation on measured voltage the higher in frequency you go above 50/60 Hz.
For some yes, others no. Check the datasheet. Yours is made for series connected tubes for instance.
Yes.
See 1.
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H: Designing bandpass filter for audio amplifier
I am a 3rd year engineering student currently working on a project where I need to basically make an ultrasensitive metal detector.
Basically, I need to create an alternating magnetic field by connecting an audio amplifier (which is also connected to a function generator generating 1 kHz sine wave) to a solenoid. long story short, I need to put a bandpass filter in between the audio amplifier and a solenoid. I need some tips on how to do this. I tried to use filter design calculators available online, but to me, the major problem seems to be that I need a filter that can handle high current input as well as high current output (~1.5 A, I_rms) with minimal voltage drop. The resistors on the bandpass filters I made would just burn due to high power input. I guess this leads to a more general question:
How do you create a bandpass filter that can handle high power input with minimal power loss?
So far, I've focused on passive filter using RLC, but answers involving active filters are also good to me, though I don't really have any experience with it.
Additional information:
Setup: I have two solenoids:
Transmit coil which will generate alternating magnetic field.
Gradiometric pick up coil (or receive coil) which will sit inside the transmit coil.
The pick up coil generates minimum voltage thanks to the gradiometric design. However, once metal is inserted inside the pick up coil, either the eddy current or the magnetization will induce voltage on the pick up coil, which will be measured by DAQ.
The problem is that total harmonic distortion (THD) is much more amplified on the pick up coil (Ideally, there should be none). I believe this is due to the fact that the voltage induced in the pickup coil is proportional to the derivative of the current. THD doesn't really show in the transmit coil (below noise level).
AI: The problem is that total harmonic distortion (THD) is much more
amplified on the pick up coil (Ideally, there should be none).
Metal detector designers "parallel tune" the receive coil to avoid this so, if you can estimate the receive coil's inductance you can trial a few capacitors. Not only will you get reduced distortion but you will amplify the received signal be up to ten times.
You should use ceramic capacitors but, unfortunately at your low frequency you may find it difficult to obtain C0G/NP0 dielectric in the values you require. This means that you get a bit of tuning drift with ambient temperature but, that might not be a problem.
Metal detectors that I'm aware of also parallel tune the transmit coil because you can get a larger voltage across its terminals for a smaller drive current from your drive circuit.
In other words, no real reason to use a filter as you are saying.
I have designed two commercial metal detectors.
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H: Coupling 2 buck converter's output to increase output current
I'm quite new working with step-back converters, and I have to use them in the project I'm currently working. My board will have 24V/5A source input, and I want to step-down this tension to 12V, 5V and 3.3V.
The main voltage for the board will be 3.3 (the other 2 are specifically for some peripherals). For this I was planning on using LC78_12-1.5 switching regulator.
Link to the datasheet (https://gaptec-electronic.com/datenblaetter/LC78_2.0.pdf)
In the datasheet is specified that the maximum output current for the 3.3V step-down converter is 2A. I would like to use 2 of them and link the output, to make sure it will allow to provide more than 2A if necessary.
So the question then. It is possible to attach those converter's output? If so, is the design that I propose in the schematic the way to go? Or I am just committing a crime against all electronics and possibly condemning the project's power supply to break down as soon as I turn the power switch on? In the case I'm correct with my design, which value should R take?
Lastly, I would like you could link me some info about decoupling capacitors, what capacitance and what type of capacitor should I choose.
AI: A better way would be to use one single converter.
So the question then. It is possible to attach those converter's
output? If so, is the design that I propose in the schematic the way
to go?
Generally it's not good to parallel DC DC controllers output. A DC DC controller consists of a feedback loop to regulate a switching circuit that switches (usually) an inductor. Because of the switching the current output is not consistent over time, and the switching of one DC DC controller can affect the output of the other.
If DC DC controllers are paralleled Inductors are usually best to create enough impedance that the switching (ripple) of one converter circuit can't be 'seen' by the other. To really find this out you would have to know what the DC DC convert circuit is and do some hand calculations or use spice to simulate it. I have had some success in paralleling modules (CUI 7805 equivalents) with inductors before.
With modules, it's up to the manufacturer\designer. You could ask the manufacturer if the DC DC converters can be paralleled , some state that you can't parallel (some of the CUI's) them in the datasheet.
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H: Confused about chip antenna schematic and copper/GND from examples
I want to use a TDK chip antenna (ANT016008LCS2442MA1) on my board. There are two (design notes datasheet) technical documents, but they contain little useful infromation.
My questions are:
Ft-x and Mt components, are these supposed to be capacitors?
The antenna output (Radiator electrode), is this connected to ground(/shorted to ground)? I believe it is, although I've found some schematics using similar TDK antennas and some are/aren't.
In the third yellow/orange/green picture, should the yellow area be copper - or copper free?
In the first photo, it looks like Ft-1 and Mt aren't electrically connected to the tracks, but simply go over top of them?
I apologize for multiple questions at once - I'm confused about a lot. I'm not worried about optimizing range/performance at this point, just want to test it out and get it working.
AI: Question 1 and 4: Ft1, Ft2, Mt are all SMT capacitors, looks like they are 0201 size. They should connect to the underlying copper trace at each end of the capacitor.
Question 2: The Radiator pad should connect to the horizontal arm of the antenna. The Feed pad should connect to the vertical trace coming up parallel to the ground plane. There are "dummy pads" in between that need not be connected. But I have to say that I think their illustration is incorrect and shows the chip antenna malpositioned. Furthermore, the illustration does not show the copper pattern design that underlies the chip; it can have considerable effect on impedance matching.
Question 3: Yes, the light yellow area is a "keepout" and should not have copper on either side of the PCB.
Overall, given the ambiguity and possible error in their drawing, you might consider another chip antenna with better documentation. But shopping is off-topic, so no specific recommendation is possible.
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H: Do I need back EMF protection for a small brushless cooling fan?
I am designing a PCB, and I want to add cooling to the project. To accomplish this I have added a connector for small (40mm x 40mm) brushless cooling fan that will draw off an existing 12V supply from a DC/DC SMPS.
Do I need to add any back EMF protection to the fan connector? Would a Schottky diode be sufficient, or do I need something like a MOV?
AI: Can't hurt to put it in. Even if the fan you chose today does not need it, another in the future might. Either for future boards or when that fan wears out.
You don't need a Schottky diode, just about any ordinary diode should do (1N4148, 1N4005, M5 etc). The difference is that when the transistor turns off it will see a few hundred mV more with a regular diode, and less leakage added to the fan current when it is on (likely negligible under sensible conditions and a Schottky diode such as 1N5819).
The diode is likely not necessary if you're connecting it directly across the 12V supply if there is always significant capacitance to ground. But if the 12V rail is not bypassed and the power supply is 'hot' unplugged there could conceivably be an issue with other things connected to the rail.
Edit: It's always good to see empirical measurements. This gentleman measured a 100V+ transient on a 12V fan.
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H: Is there such thing as an inline ideal diode?
Probably a stupid question but I could not find an answer on the web.
I was looking for a diode to protect a 36V battery from a short circuit on the charging port. The best I could find (SB560-E3/54 and similar) have around 0.5V forward drop. That is a lot of heat at 2A charging current.
There are some OR-controllers (like LM5050) with reverse current protection function, but all of them require a GND connection and a few extra parts besides the FET.
Do 2-terminal ideal diodes exist and is it even possible to design such a device?
AI: For your application - it’s not possible to have such a diode without qualifications (unrestricted use), since they require power to operate, being active devices, and it’s not possible to get power out of a “resistor” that has 0V across its terminals.
It is possible to create approximations, though.
If the diode is expected to be periodically connected in reverse, you can use the reverse voltage and a boost converter to charge a low-leakage capacitor. The voltage on the capacitor would hold a mosfet turned on for a long time - perhaps days at room temperature. The mosfet’s body diode should act as a backup. A conducting low-RDS(ON) mosfet does a good job approximating a forward biased ideal diode.
Pursuing this idea further, another option opens if it’s possible for the diode to be non-ideal for a short time periodically, e.g. once in a few hours. These short periods of non-ideal behavior would be used to capture the diode drop voltage and use it to charge the gate capacitor using a step-up converter - a joule thief of sorts. There would need to be some reasonable forward current available to do this of course. Two forward diode drops will be plenty to run a boost converter to recharge a capacitor. One diode drop will make it less efficient but still possible. Once the capacitor is charged enough, the converter will turn off and the mosfet will turn back on.
Combining the two ideas, you can get a two-terminal diode that in certain operation regimes and certain load impedances will remain ideal either continuously or for the vast majority of the operating time. The nano power circuitry needed to switch between states would be an interesting challenge for sure. Low voltage CMOS gates (74 family) can be operated sub-threshold to manage that. With parts specified for 1.8V operation, 0.7V is not too hard, as the currents are still in the micro amps, so already a lot for this application.
In short: why do you care how many terminals you got? It’s not like you don’t have a power source available! It’ll make it miles easier. There are ideal diode controllers you can use directly then. So it’s an interesting challenge and a wonderful kludge to design into a one-off hobby project, but not suitable for production.
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H: What kind of LEDs are used in this lamp?
I have many of these lamps in my home.
They are sold as being LED lamps, but I do not know the proper name of this particular type.
Once I had one with the glass bulb broken and removed I got curious and measured the resistance of a stripe: to my surprise all four were open circuit.
My curiosity is to know the technical constitution of the stripes and if they can be used as LEDs outside of the protective bulb.
AI: The filaments are small PCBs composed of a few LEDs in series coated with phosphor. This is why they measure as open circuits.
They're normal LEDs so you can use them without the glass, although they likely have a very high forward voltage so be careful.
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H: Which connector is this three connections inline XS 20 marking
I can't find the connector type of this part found on alibaba for which I need its mate.
I have it in front to me. body is 300mil width and about 200mil thick.
Pin spacing 2.5mm (NOT 100mil!!!!)
There is a marking of XS 20 on the side of the connector.
On trace of information on product page. No datasheet on alibaba.
https://www.alibaba.com/product-detail/Diesel-fuel-flow-sensor-oval-gear_60419553239.html
Feels pretty standard, but I can't figure out which one it is.
AI: Looks like a JST SMP series, specifically a SMP-03V-BC.
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H: Buck Converter - Output Current Ripple
I have a follow up question to this question posted here
Why dc component I must flow entirely through the load resistance R in buck converter?
I know now that the DC component of the inductor current flows to the resistor, creating a DC voltage V.
The AC component of the inductor current flows to the capacitor, creating a voltage ripple on the capacito voltage which centered around the DC voltage
However, the voltage across the capacitor (with ripple) IS THE voltage across the resistor. So how can we claim that the resistor has only DC current if it has the same voltage across it as the cap which has a ripple??
AI: So how can we claim that the resistor has only DC current if it has
the same voltage across it as the cap which has a ripple??
Technically we can't but, given that the ripple voltage might be 50 mV p-p atop an average DC voltage of (say) 5 volts, it's significantly less than an error of 1%. In fact this error might be significantly less than the DC error in regulation due to other components so, it's not really a big deal to assume this.
And, none of the DC current flows into the capacitor; only the ripple voltage atop the DC voltage causes ripple current in the capacitor (which is of course the same ripple current as the inductor (within reason).
You can easily prove this with a simulator; use a 5 volt DC source in series with a ramping up and down 100 kHz voltage of 50 mV and just look at where the currents flow.
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H: Optimizing Peltier water cooler set up
Application
20 gallon aquarium cooler
Ambient temp: ~22C
Tank target temp: ~17C
Tank houses an axolotl and needs to be kept at cooler temperatures then currently in the basement.
Current Peltier Set Up:
(Top to Bottom):
80x80x38mm fan running at 5700 RPMs and 76CFM
80x80x20mm copper fin heatsink (0.5mm fin thickness and 40 fins with a 3.5mm bottom thickness)
2-TEC1-12706 hot side towards heatsink, cold side down towards water block
(Imax: 6.4A, Umax: 15.4V, Qmax: (dT=0) 63W, dTmax=68C)
40x80x12mm water block centered under the heatsink (surrounded on the sides with 20mm styrofoam and 10mm styrofoam at the back)
~26mm thick styrofoam
Wood base
All power is supplied by an AC/DC converter (12V 20A 240W)
Power to the system is managed by a W1209 Temperature Control Module (Relay)
Water flow is achieved by a 4L/min water pump (slowest I can find)
Issue and Solution Thoughts
The current cooler will only reach 18C and that is with it having a long continuous run time. My hypothesis is that the water does not have enough time in the water block for good thermal exchange. That seems to me that we either:
Need to increase the dT (between the water and block) [larger Peltier module]
Keep the water in contact with the block for a longer period of time. (Slower circulation pump or longer block.)
Proposed Solution (new Peltier set up):
(Top to Bottom):
(qty 1) 80x80x38mm fan running at 5700 RPMs and 76CFM, (qty 2) 80x80x25mm Fan running at 4500 RPMs and 59CFM
(qty 1) 80x80x20mm copper fin heatsink (0.5mm fin thickness and 40 fins) with a 3.5mm bottom thickness, (qty 2) 80x80x27 aluminum fin heatsink (0.8mm fin thickness and 26 fins with a 6mm bottom thickness)
5-TEC1-12715 hot side towards heatsink, cold side down to block (Imax: 15.6A, Umax: 15.4V, Qmax: (dT=0) 150W, dTmax=68C)
40x200x12mm water block centered under the heatsinks (surrounded on the sides and back with 20mm styrofoam)
~26mm thick styrofoam
Wood base
I can provide a CAD sketch or pictures of the current cooler if that helps. I have tried to use the Peltier cooling formulas but my experience is minimal with those calculations so I came here hoping for some advice/direction.
Will the proposed solution (higher capacity coolers, longer waterblock and heatsinks) solve my problem or is there another variable I am not accounting for?
UPDATE
I will order a 10k thermistor (https://www.adafruit.com/product/4890#description) this weekend and install between the plates when I strip it apart. I am seeing about a 1.5-2C drop from inbound water temp entering the block and the output to the tank. (Yes, I do expect some thermal loss for the ~1m travel, it will be insulated once I have a steady set up).
Forgive my weakness in thermodynamics but why do you want the water going through the block quicker rather than slowly? I realize that Al has about a 5x lower specific heat than water but will it really transfer the heat and hit an equilibrium that quickly? I have the option to go from 4L/min to a 5L/min, 8L/min, or 12L/min pump, I don't know if I can diffuse anything over 8L/min currently. (pun intended).
AI: The circulation speed vs. heat removal rate has an asymmetric knee.
With circulation too slow, the tank will heat faster than the slowly flowing very cold water can absorb. Go slow enough, and eventually the water on the cold side of the Peltier will even freeze up!
With circulation much faster than necessary, the pumping losses will be heating up the water excessively. The pumping losses are always there - after all, the entire power that goes into the pump ends up as heat in the water!
Making the pumping efficient is desirable: use large tubing and minimize flow resistance by using larger heat exchanger blocks on the water side of the Peltier.
The slowest pumping speed you chose may be too low already: try with a faster pump and see if things improve. Measure!
If the Peltier is able to remove the heat generally faster than the water is absorbing it from the environment, then you'll still initially have outlet temperature higher than the target of 17C - much higher. But as the water slowly cools down, and the inlet temperature goes below 22C, the outlet temperature will be coming down as well - at a bit lower rate the inlet temperature. That's because heat removal rate will drop as the water gets cooler: that's due to \$\Delta T\$ going down
So, making the water stay longer in contact with the Peltier will not necessarily improve anything. Minimum pumping rate is desirable to cut pumping losses, but it almost always reduces the heat removal rate. So pump as fast as needed to get sufficient heat removal, but no faster. You should measure heat removal rate for various pumping rates, and choose a pumping rate that provides highest removal rate per measurements. And then decide whether to add another Peltier module to speed down the cooling and as a backup.
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H: Specify and connect one power supply for two applications
I have a 1980s chess computer to which I have added a Raspberry Pi 2 Zero to provide display and speech capability via a Python. It all works via serial messages and the only electrical connection between the two is an RS232 to USB adapter.
The chess computer power supply is 9 volts 300mA.
The Pi 2 Zero supply is 5.1 volts 2.5A.
The Pi has a USB HAT with a USB sound card driving two tiny speakers and a 4 character 14 segment LCD display. The 5.1 volt 2.5A supply (genuine Rapsberry Pi model) powers it without issues.
I want to have a single power supply, but about the only thing I know about electricity is that I know too little to be safe.
So in my head a 3A 9v 27w AC/DC Regulated Switch Mode Power Adaptor with correct polarity would be fine (if overkill) for powering the chess computer. Could I take a parallel feed from that same supply and through some magic provide 5.1 volts with enough amps for the Raspberry Pi?
Despite my lack of knowledge my soldering skills are pretty good. I'm hoping somebody can help with the missing magic.
AI: There are plenty of 5V DC-DC converters that will happily take 9V in. Something in the 3-5A range is recommended and will probably be around $25 from a reputable source. With current ratings you are almost always fine overspecifying the source and it's generally recommended not to run them close to 100%.
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H: 5V Input and Output interfacing with 3.3V GPIO
I have a device (a motor drive) with 5V logic. My controller is 3.3V.
I draw the two circuits. The right sides are fixed in the device.
I have some exact questions about calculations.
-Q - What to look when selection a transistor for this applications? Some rule of thumb, or most common for this logic level shifting?
The input:
-Rb - let's say - for a ZXTN4240F? Will a 1k good? (3.3V/1000R=~3mA base current, right?)
-Rc - good around 200R? How to determinate the proper size? (5V/200R=25mA, right?). Can a 1k more efficient, and less power compulsion?
-If I switch my circuit pull up (Rc=200R) rail to 3.3V, that means (3.3V/200R=12.5=16mA) collector current?
-How to determinate Rc power? P=3.3*3.3/200=50mW?
-How to get the voltage drop across Q?
The output:
-What will be the power requirements for Re?
-Emitter current will be 5V/Re?
-Can I pull the GPIO input to 3.3V rail instead of 5V? If yes what will change (currents and power compulsion)?
AI: As jonk suggested in his comment you can simply omit Rc as the chip (or device) already has a pull-up, unless the manual/datasheet strongly suggests you to use one.
Determining Rb: Basically Q will be used as a switch so it needs to be saturated. For saturation, I use a practical formula (not a formula actually, comes from experience): Check the BJT's datasheet and use the one tenth of its minimum hFE as IC/IB ratio. And calculate Rb for this ratio. This will force the BJT into saturation. For example, if minimum current gain is given as 200 then select a base current of one twentieth of the collector current. In your case, the collector current will be 5V/5k = 1 mA (because there's no need to put an external Rc here) so the Rb should be calculated for a base current of 50 microamps.
Voltage drop across Q: Check the datasheet for this as it's given as VCEsat - remember you'll be using the BJT in saturation. Don't expect exactly the same voltage given but in your case it's not generally going to be higher than 0.1 or 0.2 VDC.
For the output section, same things apply: Q needs to be used in saturation.
-Can I pull the GPIO input to 3.3V rail instead of 5V?
That is what you "must" do unless it's indicated in the datasheet that the GPIOs are 5V-tolerant. You can simply tie the top end of Re to 3V3 for your application.
The current flowing through Re when Q is in saturation will be approximately 3V/Re (neglecting the saturation drop across emitter and collector -- again, it's not generally higher than 0.1-0.2 VDC). This current should be high enough so that the GPIO's input current can be neglected (e.g. if GPIO draws 10uA then 500uA collector/emitter current should be enough). And Rb should be high enough to keep its losses minimum. For most applications, 3.3k to 10k is enough. You can calculate the power loss for saturated Q.
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H: How to calculate the current through the LEDs/the collector current in the BJT circuit
For this exercise I have to calculate the voltage Vce and the current through the LEDs. The LEDs have a knee voltage of 2 V, the transistor has one of 0.7 V. Beta has been given as very big.
To start I calculated the Vce simply by applying the voltage law. I did
Vce = 9 V - 4 V - 4.7 V + 0.7 V = 1 V.
Now I have to calculate the current through the LEDs, or in other words the collector current. Since I assume that beta is just infinity, I struggle with applying any formula I know to get to the answer, since I cant use $$Ic < Ib * Beta$$.
Any tips on how to continue with this exercise?
AI: Assume beta is large, base current is negligible.
Assume ideal zener diode: if current flows through it in reverse, it will deliver the voltage on the label.
So, there's 4.7V across the zener, and the current in R5 is (9V-4.7V)/R5. It is not asked in the question, but it's 2.15mA.
Knowing the voltage applied on the base (4.7V) then if the transistor is ON, and not saturated, then the emitter is 0.6V below, so 4.1V above ground.
So, the current in R7 is 4.1V/R7 = 87mA. LED current is equal to this minus base current.
The LEDs are ON, there's 2V across each, so calculate Vce like you did to confirm the assumption that the transistor is not saturated.
Then assume beta>100 and calculate maximum base current to validate the assumption that current actually flows in the zener diode.
Supposing beta>100, then base current is <0.87mA.
Basically:
Make a bunch of assumptions (zener is conducting, and transistor is not saturated)
Calculate circuit variables based on this
Validate the previously made assumptions
For example in the last step if you found the transistor to be saturated, then the much lower resulting hFe would mean the zener would not have any current flowing through it, so the assumptions would be wrong, and you'd have to start over with different ones.
Note:
As far as current sources go, this one is pretty bad because it wastes lots of voltage heating the transistor and the resistor, only using 4V out of 9V to do something useful. Since everything is in series and the current is the same in the LEDs, the transistor and the resistor, and power P=V.I then power dissipated in each element is proportional to the voltage across it. So you want as much voltage as possible on the stuff that does something useful (ie, the LEDs) and as little as possible on the stuff that just makes heat.
In addition, if the 9V supply can vary, wasting less volts on the resistor and having higher Vce means it'll still work at lower supply voltage.
So here's an example simple current source with very low voltage drop. It's possible to go lower, but this one is hard to beat regarding price and simplicity.
This one uses feedback: if current through R1 (and the LEDs) increases, voltage across R1 increases, Q2 conducts more and steals base current from Q1, making it conduct less, that reduces current, and that makes a feedback loop. So Q2 regulates voltage on R1 to be equal to its own Vbe, which means it regulates current to the value Vbe/R1.
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H: Op-amp boost pedal tonal noise
I am working on a boost pedal, but I can't seem to find the cause of a humming noise in the circuit.
I tried bigger caps for C5 and C6, but it didn't solve the issue.
For power I use an 18V model train power supply (it's the only supply I have now.) I divide it for the TL072. The 6V is there for bias.
Spectrum of the hum:
AI: You use model train power supply. Those supplies often contain no capacitors to filter the rectifier output. I assume that the OpAmp is fed with 100 Hz pulsing DC, a proper voltage regulator is required.
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H: How to design a circuit that will trigger after a specific delay once a push button is pressed
I wanted to make a circuit in which a push button is pressed once and then the system should wait for a small period of 10 seconds and then give an output pulse of a second. I am looking for a cheap alternative by using analog circuits rather than using a microcontroller.
AI: You can do this with 555 timers as others have said (you could also do it with discrete transistors) the biggest problem being the capacitor values needed for relatively long time delays.
You can get around that problem by using constant current sources to feed the capacitors.
This is a general idea of how that would be done.
V2 represents the switch input, you would need to have the switch generate a negative going pulse. This answer gives an idea how to do that, but you would probably need to remove C1 to keep it from triggering on power up.
The two timers use 1 uF capacitors, these could be something like film or ceramic types. The capacitors are charged by current sources made up of transistors Q1 to Q3. R3 and R7 (along with R1 and R2 to some degree) set the charging currents for each timer.
The blue is the trigger pulse, the red the output occurring 10 seconds later for 1 second.
You would of course need to adapt it to your own needs, adding the switch circuit, an output driver, and possibly make the timing resistors adjustable.
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H: finding replacement for resistor labeled as fuse in schematic
I am trying to find a replacement for what appears to be a burned resistor in a power supply unit. It appears to be labeled as "F3" on the PCB which is the designation for a fuse. As far as the reason for the resistor blowing up, based on other testing I am reasonably certain that a nearby MOSFET has gone bad and I have already found a replacement for this, but I need to find a replacement for the resistor.
The lead on the left goes into the circle on the PCB next to the "F3" label, hard to see due to blob of goop:
Based on the orange-orange-gold-gold bands the resistor should be 3.3ohms 5% but it reads as 13MOhms so I assume it has failed (almost) open. The physical size of the resistor is: length of resistor body = 12mm, body dia = ~4mm, lead dia = 0.5mm.
Note resistor (fuse?) F3, transformer T4, and MOSFET Q10 which are also visible in PCB picture.
I have been looking for similar resistors and found some, but I am not sure about the wattage that is needed. Since this resistor appears to be functioning as a fuse I would guess that the wattage is important. I have found some similar sized ones but their wattage varies from 1/2w to 2W.
I found some information about something called fusible resistors but they seem to have different markings on them like an extra color band.
Any help or insight in to what a suitable replacement might be or what I need to search for would be helpful.
AI: Pick a fusible "safety" resistor of the same value (3.3\$\Omega\$) and tolerance (5%), and a similar physical size. It looks like a metal oxide film type. There are also wirewound types.
There will be other things (such as one or more semiconductors) that have failed in the circuit, the resistor is just a symptom and if you just replace the resistor it will fail again immediately.
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H: What is this solar path light component?
Just for fun and curiosity, I decided to reverse engineer an old, cheap solar path light. It's a fairly simple circuit, but there's a component I can't find any information on. It has transistor-style package with four leads. The markings are 6608A H13006. A Google search yields nothing. I suspect there's a diode function in there since it connects to the solar panel and the battery. Does anyone know what this component is or does?
Top of solar path lamp circuit board:
6608A H13006 component:
Bottom of the solar path lamp circuit board:
AI: That is an integrated solar lamp controller and boost converter.
It is probably similar to this YX8018 device that can control the LED to turn on when the sun sets and also boost the 1.2V from the NiMH cell to the voltage needed by the LED.
Note that the only other component on the PCB is a small inductor.
Image credit : https://datasheetspdf.com/pdf-file/710956/Shiningic/YX8018/1
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H: How to properly start an induction motor using a variable frequency drive?
I've seen on several websites that a variable frequency drive (VFD) can be used as a starter for induction motors, but didn't find any details calculation on what should be the starting frequency.
In a typical delta-star starter, the start configuration is used first to provide a lower voltage. Should I reduce the frequency such that the RMS gets equal to the star configuration? I don't think this is the right way. From which frequency should I start running?
AI: If the motor is not spinning, then from zero hertz or cycles per second.
If the motor is spinning, this is termed "catching" it and some VFD's can do this and some cannot. Check the feature set of the chosen VFD to see if it includes this capability.
A VFD, at zero hertz, locks at least one of the phases at any angle (full current) so that the motor can't spin. As the frequency is increased, the phase currents are alternated, resulting in rotation.
Some VFD's will let you control the magnitude of this (stand-still) current and some will not. Many will let you define the motor type (such as induction, synchronous, servo, etc.) and this directly impacts the drive methodology and capabilities. Again check the VFD features.
If a large motor, also consider DC injection braking via the VFD. That may be more convenient than using say, a resistor bank or mechanical brake to dissipate that power. The motor may get warmer from DC injection braking however.
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H: In-Amp Common Mode Rejection With Unbalanced Device Impedance
I am using an instrumentation amplifier (AD8220) to interface a pH probe. The pH probe produces a +/-414mV signal with large output impedance (>100MOhm). AD8220 has very low input bias current (~10pA) and low offset voltage (~500uV).
When I simulate with no pH probe impedance and a 1V common mode voltage, the output is as expected, with common mode totally removed.
However, when I add 100MOhm in series with my probe there is a considerable offset (~700mV), greater than the 10pA bias current can produce. I expect input impedance of the in-amp is very large (>1TOhm) and fairly balanced. Why is this offset produced?
AI: Why is this offset produced?
Because this LTSpice model is taking a much larger input current than the datasheet indicates:
LTSpice usually has good models for AD and LT devices. Strange. Edit: new model, still large currents
According to the datasheet these would be the currents around 80C or so.
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H: +/- 12v supply for AD8421
I need +/- 12 Vdc power supply for AD8421 from 5 Vdc. Can I use LT3582 (with output +/-12 Vdc; 85 mA) to supply the AD8421?
Thanks.
AI: It can supply the +/-12 without an MCU to set it up if you get the LT3582EUD-12. Assuming you can actually find any in stock. Otherwise, looks like you'd have to set it up with the \$\text{I}^{2}\text {C}\$ bus.
You could also consider a DC-DC converter module.
Getting close to the full 3nV/\$\sqrt{\text{Hz}}\$ performance out of the AD8421 may require a lot of care in layout and a multilayer board with nice ground planes when you have a switching regulator on board.
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H: Automatic voltage selection using SPDT relay
I'm working on a design with two voltage inputs and I need to give priority to one of the two inputs when both are plugged simultaneously. Both must also work individually.
the first input (V1) is from a battery (12VDC)
the second input (V2) is from an AC/DC powersupply (12VDC)
When the battery and the power supply are connected simultaneously, I want the power supply to provide the energy so that the battery is not discharged (electrically disconnected). As soon as I disconnect the main power supply, the battery takes over and provide the energy.
To do this I thought of a circuit using a SPDT-NC relay:
The non-priority input (battery) is connected to the NC input.
The priority input (Main power supply) is connected to the NO terminal and I also use its voltage to switch the relay. The relay switch/latch from NC to NO as soon as the Main power supply is plugged.
It is about this last point that I have a doubt about the behavior...
relay datasheet:https://omronfs.omron.com/en_US/ecb/products/pdf/en-g5le.pdf
I specify that it is V3 (voltage on COM terminal) which will then power the system (the load), so I cannot control the relay coil form a microcontroller since it will not be powered..
Have you ever had this experience, and does the attached circuit diagram seem functional?
how to improve the whole design to add reliability and protection ?
My load is around 10A@12V so 15/20A D2PAK schottky should be fine.
What's important in your solution is to check that the min voltage at full charge of the main PSU is always higher than the max voltage of the battery, to be sure that diode is indeed reversed and not conductive with both source simultaneously.
When battery is used without main PSU, the schottky continuously conduct. With a power dissipation of 10A*0.3V=3W it can quickly heat up... Standard Rja~35°C/W and Ta=30°C, Tj=135°C.
It can require an external heatsink. My design is passive thermal cooling and cannot be ventilated.
the solution with the relay avoid to drive high current in a component (except the relay which is made, for I guess...) and prevent temperature rising in some conditions.
What I'm missing is how to drive the relay coil to make sure I don't damage it by switching it everytime I turn on the main PSU...
AI: Here's a simpler solution, using Schottky diodes that have a low forward voltage drop.
The power supply, that is set to 13.8 V to reverse bias the Schottky diode in series with the battery, will predominate.
The battery will take over only when the utility supply fails or when the power supply is switched off.
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H: Simulating a four transistor audio amplifier circuit in LTspice
I'm designing a four transistor audio amplifier circuit.
I simulated it in LTspice. I replaced the BC547 with a TIP142 and the BC557 with a TIP147.
Collector
Base
Emitter
When run mode V out is not amplified.
,
What is the problem here?
AI: The BC547 and the BC557 are small signal transistors. The TIP142 and the TIP147 are Darlington power transistors.
The input signal level and the biasing for the small signal transistors won't work with the Darlington power transistors.
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H: Multimeter resistance measurement
I was doing a short and resistance test in my circuit on testpoints. I was testing the output of a voltage regulator.
When I place the + probe on the power and - probe to ground the meter takes time to find the correct range of resistance until it reaches around 200 kohm, when I reverse the probes that is - on the power and + on ground, the resistance measurements is right away shown to around 3 kohm.
What is the reason for the different resistance values and time to read the resistance?
Also what is the correct way to measure (I assume black to ground and red to Vdd)?
AI: You'll be charging the various caps through the multimeter, which explains timing phenomenon.
If you are reversing the probes with red against ground, it likely means you are measuring across anode to cathode of some protection diode, which isn't very meaningful.
Other than that, the value you get literally depends on every single component on the board, so the exact resistance isn't going to be a meaningful value. Though in case it is a couple of hundred ohms or less you have reason to be worried. Less than ~10 ohm would mean a short.
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H: Controlling external device by tapping into existing transistor
I'm working on one project where I cannot figure out on how I can control my external device by tapping into some home appliance. Just to note, that I have very limited knowledge of electronics and I learn by practice.
Here is the circuit of my control device (sorry for quality, I took it from the official service manual).
I need to turn on/off my external device when Q4 is open or closed. Q4 is controlled through 5V coming from the microcontroller. My external device is controlled via 24V.
My idea was to connect the ground of my device to the control device and then use the input to base of Q4 to drive the MOSFET on to switch my device. However, I cannot understand how should I connect the MOSFET.
How can I switch my load with Q4 properly?
My external load is: 24V 3A.
MOSFETS that I have are IRLB8721.
Q4 is DTC143Z - NPN 100mA 50V Digital Transistor (Bias Resistor Built-in Transistor).
AI: Try tapping into Q4's on/off state in the same way they do it here; with an opto-isolator.
You see the pair R40+LED? That's exactly what you should do, by connecting your own resistor and LED, where the LED is part of your own opto-isolator IC.
In that way, you have absolutely no concerns about accidental ground loops or interfering power supply rails, because your circuit will be completely isolated from the coffee maker's electronics.
I assume you're powering your own circuitry from an independent 24V supply, so this is how I envisage all this:
simulate this circuit – Schematic created using CircuitLab
You are responsible for everything in the blue box, and the two grey wires to the coffee machine.
When the LED in the coffee machines's own opto-isolator is lit, so is the LED in yours. That switches on the transistor inside, pulling the P-channel MOSFET Q1's gate low, and switching it on too.
Please note that I've used two different ground symbols. The one on the left is inside the coffee machine, the one in the blue box is yours. This is important, they are not connected together in any way by you. It's possible that both may be connected together via the wall plugs to mains Earth, that's OK, but do not connect them together explicitly yourself.
Edit: I included R3, to divide the collector voltage by two. Otherwise the maximum allowed \$V_{GS}\$ of the MOSFET could be exceeded.
Edit2: I included D1, only necessary if you are switching on and off a nasty device like a motor or relay. There's no harm leaving it there, regardless of the load.
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H: Different behavior of new() constructor
I'm trying to understand a reason for the different results between the usage of the new() constructor in SystemVerilog.
I understood that if once the constructor allocates the memory into the object by new(), then I can use it in a class. I don't need it anymore after constructed by new(). But, I can't understand the result between commented them out and not commented out as below:
typedef enum {GOOD, BAD_ERR1, BAD_ERR2} pkt_type;
class driver;
pkt_type pkt;
task pkt_sender;
std::randomize(pkt) with {pkt == GOOD;};
modify_pkt;
endtask
virtual task modify_pkt; // callback method
// $display("Good !! modify_pkt");
endtask
endclass
// Error introduction via err_driver class where callback method modify_pkt is implemented.
class err_driver extends driver;
task modify_pkt;
$display("Injecting error pkt");
std::randomize(pkt) with {pkt inside {BAD_ERR1, BAD_ERR2};};
endtask
endclass
class env;
bit inject_err;
driver drv;
err_driver drv_err;
function new();
drv = new();
drv_err = new();
endfunction
task execute;
if(inject_err) drv = drv_err;
// Sending a packet
drv.pkt_sender();
$display("Sending packet = %s", drv.pkt.name());
endtask
endclass
module callback_example();
env env_o;
initial begin
// Sending GOOD packet
env_o = new();
env_o.inject_err = 0;
repeat(3) env_o.execute;
// Injecting an error
//env_o = new(); //Test for new()
env_o.inject_err = 1;
repeat(3) env_o.execute;
// Sending GOOD packet
//env_o = new(); //Test for new()
env_o.inject_err = 0;
repeat(3) env_o.execute;
end
endmodule
If the 2nd and 3rd env_o = new(); statements are commented out, then I expected results below:
Sending packet = GOOD
Sending packet = GOOD
Sending packet = GOOD
Injecting error pkt
Sending packet = BAD_ERR1
Injecting error pkt
Sending packet = BAD_ERR1
Injecting error pkt
Sending packet = BAD_ERR1
Sending packet = GOOD
Sending packet = GOOD
Sending packet = GOOD
But, I get these unexpected result:
Sending packet = GOOD
Sending packet = GOOD
Sending packet = GOOD
Injecting error pkt
Sending packet = BAD_ERR1
Injecting error pkt
Sending packet = BAD_ERR1
Injecting error pkt
Sending packet = BAD_ERR1
Injecting error pkt
Sending packet = BAD_ERR2
Injecting error pkt
Sending packet = BAD_ERR2
Injecting error pkt
Sending packet = BAD_ERR1
I thought that even if I commented them out, then the result of new() constructor is the same in SystemVerilog. But, it is not the same. Could you guide me why the results are different?
AI: When you call new on the env_o handle, it calls the new function in the env class. This constructs two different objects: drv and drv_err.
When you execute:
env_o.inject_err = 1;
repeat(3) env_o.execute;
the 1st time execute is called, it sets the drv object to be the same as drv_err. drv is permanently set to be drv_err. This is why you keep getting BAD instead of GOOD.
The way to make drv and drv_err different from each other again is to call env_o.new again.
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H: How to implement unity gain buffer with long-tailed pair?
I read that a unity gain buffer can be implemented with an op-amp like in this circuit:
I also read that a long-tailed pair as an op-amp (this might be the wrong part). So according to the buffer circuit above, I believe the circuit using long-tailed pair will be like this (edited: this is my own idea only of how the long-tailed pair can be turned into a unity gain buffer which I hope to be confirmed or corrected):
However, the problem is that this configuration implies that the non-inverting input terminal will always remains at ground (0V) while the inverting input will be at G*Vin (G: gain). Hence I can't understand how negative feedback is implemented in this case since the Vout is supposed to be G(Vin - Vout).
Please correct me if there are any mistakes and demonstrate how long-tailed pair can be used as unity gain buffer (and explained with circuit schematic will be very appreciated).
AI: The long tailed pair is a pretty rubbish differential amplifier, but what you propose should work. Your problem is you've wired it up wrong. Why did you short Q2's collector to emitter?
Here's my attempt:
simulate this circuit – Schematic created using CircuitLab
All I did was connect the output to the inverting input, just like a voltage follower. It does what you would expect, except with terribly high output impedance, and awful linearity, due to low open loop gain. Here's the output, with a sinusoidal input:
To be honest, I was surprised how well it worked.
I wasn't sure it was truly working as a voltage follower (maybe this is just a really complex emitter follower, with a saturated Q2, or something), so I plugged in a couple of resistors, for 50% negative feedback, to get a gain of two:
simulate this circuit
Here are the input and output, in a simulation:
Again, surprisingly good, considering it's so primitive. I love the hilariously large input offset voltage, so clearly visible here, but well done little long-tailed pair, good job.
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H: determining the Bmax for inductor design
at this moment of this youtube video following graph is presented for selecting the proper maximum flux density.
the considered proper amount of core loss is 100mW/cm^3. is this a general amount for all cores or does it change according to each material datasheet? should it be selected according to the following information presented in the datasheet of another material about core loss?
AI: Generally the limiting factor is the temperature of the core.
The heat generated within the volume of the core is just one factor. To this we have to add ...
heat generated in the windings
ambient temperature
surface area of the core
core ventilation, is it fan assisted or natural?
The figure of 100 mw/cm3 is therefore a crude guideline, assuming reasonable defaults for all the other factors. It's a good place to start to see whether a design is feasible.
Once a design looks feasible, then you have to go into the detail of what core material, and do some cooling experiments on the shape and size of transformer you will be using, taking account of your maximum local ambient, and the maximum temperature your core materials, wires, insulation, glues, tapes will tolerate for the lifetime you want to specify.
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H: What are the advantages of a series emitter follower circuit for power supply?
I saw a power supply made of many series emitter follower circuits.
The input voltage is about maximum 480VAC.
I understand the circuit of single emitter follower power supply concept, but I don't know why many series emitter follower circuits are used.
Can it be replaced by series resistor?
What are the advantages of using it?
AI: Can it be replaced by series resistor?
Not easily because the lowest transistor will only have a voltage rating of maybe 200 or 300 volts and, if the load on it's emitter is open circuit, there will be very little collector current and, the series resistor will not drop much voltage AND, nearly the full supply voltage will be put on the lowest transistor's collector i.e. it will likely destroy it: -
I have chosen an MPSA42 transistor because it looks as old as the OP's diagram and it has a voltage rating of 300 volts.
If you can guarantee a minimum load of several mA then it's possible that a series resistor can be used to replace the top two emitter followers.
What are the advantages of using it?
It means you can have zero load current at the output and share the main DC voltage between three cascoded transistors thus, all three survive if the voltage rating for each isn't the full DC voltage from the bridge.
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H: Convert speaker level to microphone level
I have a digital piano without line output (not even earphone output) but I would like to record what I am playing. So I decided to convert the speaker level to mic level so I can record the audio in my smartphone (using the bultin TRRS input of my smartphone).
My piano speaker is 4 ohm and 10v. I need to bring it down to 0.01v (mic level? I think smartphones accept 0.1v?). A really smart and nice guy told me, in another thread (in which I had a similar problem), how to bring line level to mic level with this circuit:
https://electronics.stackexchange.com/a/620993/314164
It worked PERFECTLY! It has 10:1 attenuation and impedance of 1k which is the recommended to smartphones. Now I need to increase this attenuation and I know I can easily do this changing the 1k and 100 ohm resistors, however that will mess with the 1k impedance recommended to smartphone.
So how can I do this? Do you know the values of the resistors that I need to change (the capacitor will have to be changed?).
AI: The 1k resistors don't matter to the recording phone. They set the impedance that the electric piano "sees."
Assuming that you will be connecting the "Earphone_Left" and "Earphone_Right" lines to the hot side of the speakers, you will need to change R1 and R2 to 10k. More might be needed, but 10k is a good starting place.
Connect the "Earphone_Ground" to the common ground of the electric piano.
You don't need to change the value of the capacitor. It depends on the impedance of the phone.
The messier question is "Which way does the capacitor go?"
The original circuit was intended for use between Android phones. On those phones, there's no DC on the headphone lines but a small DC on the microphone line so that the "+" side of the capacitor goes towards the microphone.
Your electrica piano may have DC on the speakers. Measure the voltage between the speaker hot and ground. Do NOT play a note. Just have it turned on and ready to play. If there is a DC voltage between the speaker and ground, then the "+" of the capacitor will go towards the electric piano. If there's no DC, then the "+" goes towards the microphone.
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H: Controlling a 12V solenoid lock with 3.3V - IRLZ44N
I would like to drive a solenoid lock from a 3.3 V MCU with a N-channel IRLZ44N MOSFET.
Here are the specs and diagram:
Solenoid Lock: 12 V – 2 A (K02-12V DC 2A Electric Magnetic)
Below is the diagram where:
VCC: 12 V (Korad KA3005D Power Supply)
SV1_CONN: Solenoid Lock Connector
SV1: 3.3 V signal from MCU (Arduino Pro Mini 3.3 V)
GND: Common ground shared with the MCU
My problem/questions:
Although it is stated that it is a "logic-level gate drive" where "Gate Threshold Voltage: 1<VGS<2" in the MOSFET datasheet, MOSFET is acting weirdly with a gate voltage of 3.3 V. Current draw of the solenoid starts (t=0) at ~800 mA, starts rising and reaches to ~1.8 a in ~10 seconds. (It is like, mosfet is opening slowly).
Why does it take 10 seconds for the current to rise to 1.8 A (Gate: 3.3 V)? While working perfectly with a gate voltage of 5.0. .
Is using a IRLZ44N a wrong choice?
Do I need any additional elements between the mcu pin and mosfet gate to protect the MCU in the long run (other then the gate resistor, 82R)? Like an optocoupler?
AI: The Rds(on) is only guaranteed with a minimum drive voltage of 4.0V. 3.3V is less than 4.0V.
Possibly the MOSFET is heating up which typically decreases the Vgs for a given current. If you got the IRLZ44 from some dodgy source it's possible it does not meet specs. Although it's bad design to use an IRLZ44 with 3.3V drive, I would expect it to typically work under nominal conditions. That kind of time constant sounds like thermal or possibly leakage (as in an open or almost open connection to the gate).
There are many, many MOSFETs which are rated with 3V, 2.5V and even 1.8V drive, but few, if any, in a through-hole package. Here is one example, 0.005\$\Omega\$ maximum with 2.5V drive and 0.075\$\Omega\$ maximum with 1.8V drive.
If the MOSFET fails with a drain-gate short it could damage (ie. destroy) the MCU. Electrical noise could reset the MCU. You could use an optocoupler or add some transistors to drive the MOSFET which would provide protection. You might also be worried about the solenoid lock being destroyed if the MOSFET fails on- I think most of them are only rated for very intermittent duty.
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H: Hacking a trail camera
A quick warning, I have no prior knowledge in electronics. I don't even know if what I'm asking is doable.
Here is the idea. I was given an old refurbished Reconnyx Hyperfire 2 camera trap. The flash doesn't work anymore but the logic seems fine.
I would like to reuse it by bypassing the camera from the board and using my own DSLR camera, basically turning it into a fancy IR detector.
To connect to the camera, I will be using a 2.5mm jack. One wire for the shutter and the other one for the ground.
I have no idea where to start with this. I guess I should start by buying a multi-meter and try to figure out where I can plug my cables.
I don't know if it can help, but here is the board:
AI: It should be possible to do this without much reverse engineering. I can think of several solutions that do not require many tools or part. However it will require some basic electronics knowledge. But this is at a level that it would be a decent "Hello World" project for electronics - with the following hints as orientation. So I bet you could do it but it will require some learning effort.
Basically you only need to find a signal that changes it's state (voltage) only when the trap is triggered. This can actually be done by the same circuit that should later trigger your camera. I will describe the concept for the solution first then I will show that there is a wide range of implementations for this concept.
Concept
To the trap signal you attach a circuit that acts as a latch. Once the trap is triggered it will stay in that state - this helps to trigger your camera reliably even when the signal from the trap is too fast or too short.
Depending on implementation the latch should have an adjustable threshold - the voltage at which the latch "latches".
From the latch you need an actuator that triggers the camera.
Connect the remote control cable from your camera to the actuator. Usually the actuator needs to short two signals of the control cable together (this depends on the camera). If you can not get a remote control cable with separate wires for the camera trigger, then this project will get too complex in my opinion.
To arm the camera again the latch needs to be reset by a mechanism.
Implementation
These are options how you could build that concept. The circuits can be build on a breadboard. Soldering the final result is recommended, unless your camera trap sits indoors and never moves.
A bipolar transistor with resistors: The least robust solution but also the easiest to build. It will not act as a latch so finding the right signal is more important. The signal from the trap is connected through a resistor to the base of the transistor. The collector of the transistor connects the positive wire on the control cable to the ground wire - when the signal from the trap is positive. The transistor can control a relay instead to isolate the camera from your circuit. This is also the recommended output for all other implementations.
Discrete Latch: A latch can be build with transistors or logic gates. Or you can get a integrated circuit (IC) that is already a latch. The latch needs to be reset by a timing circuit. This can likely be done by an abundantly available "555" timer IC, though I never really used that one.
Microcontroller / Arduino: the most flexible option, buying an Arduino or similar probably gives you an easier start. The signal from your trap goes to the ADC of your microcontroller. The threshold is set in the programm. The latch and reset can be coded as well. The output of the MCU goes to the transistor output above.
I want all the pain / Assembly: The program for this task is not too complex. You can challenge yourself by writing it in Assembly, which is about the most direct way to write a program for a microcontroller. If you manage that, you will gain important expertise that quite a few programmers nowadays lack.
Finding the right signal
Check that your circuit triggers when you connect an AA Battery as its input signal.
Connect the ground of your circuit to the ground of the camera trap.
Use the wire for your input signal and press it to one of the metal contacs on the pcb.Preferably connections that go to the onboard camera or flash.
Force the camera trap to trigger.
Does your circuit triggers your camera?
If not repeat this with another contact.
Hints
Whenever you connect a signal between two circuits, you also need to make a connection for the return current and common reference - this is usually done by connecting the grounds of the two circuits to each other.
If you mess things up you might damage your camera. Check the wiring on the remote cable and use a relay between your circuit and the cable.
A multimeter and a very simple oscilloscope can help a lot in building and understanding whats happening.
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H: I2C Hot Swap design and feasibility
I would like to hear if someone has successfully implemented a working connectable/disconnectable I2C interface. I'm working with the back plane (host device) and am looking into implementing a I2C buffer/switch to be able to connect and disconnect a single I2C sensor without hanging the buss. The sensor is the only I2C device on the bus.
My starting point is following application report: https://www.ti.com/lit/an/scpa058/scpa058.pdf?ts=1655397886223&ref_url=https%253A%252F%252Fwww.google.com%252F#:~:text=1%20What%20is%20an%20I2C,to%20power%20down%20the%20backplane.
However, I have no possibility to alter connector to be staggered or to alter the sensor itself. So my current plan is to simply use TCA4311ADR together with a connection-detection pin.
Do you think the design can work reliably? Are there any reference designs availible?
AI: The buffer does nothing if you only have single card with single sensor on the bus and nothing else. If the unplugging happens during communication, it is the role of the MCU I2C code to handle the situation anyway. The fact that there is a connection detect pin may help but is not necessary, because you must handle non-working transactions anyway.
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H: Best way to make a system which is both 120 and 220 Volt compatible
I am currently preparing a piece of equipment that needs to run of both USA 120 volt and euro 220 Volt. I am running a 120 volt AC vacuum pump and a 6.3 volt transformer to provide 6.3 volts to a resistive heater. I imagine a switched 220 to 120 volt transformer before the pump and 6.3 volt transformer could achieve this.
Alternatively, I am considering running a different DC powered vacuum pump off an AC/DC power supply that will readily accept 110-240 volts input. I believe the DC power method is less cost and energy efficient and would need a cooling fan. I also would need to find a 6.3 volt power supply which is a bit hard to find.
AI: The easiest way is to make sure all your components are able to run on low voltage DC power, and then, use a listed switching power supply with a wide input range.
This will also make it easier to comply with design safety standards such as CE or UL White Book.
You could have a low voltage port on your machine, which would then take an already listed brick or wall-wart power supply matched to the locality. I.E. you ship Europlug power bricks to Europe, BS1363 to UK, NEMA 1-15 to North America, etc.
Since 6.3V is difficult for you to find, I would consider an intermediate voltage such as 12V, 19V, 24V etc.
For the heater either change the spec, or use a DC/DC converter.
For the pump, I recognize the difficulty of finding quality low voltage pumps. Worst case, you can use a DC-AC inverter to run the AC pump.
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H: Can a K-type thermocouple measure both air and surface temperatures?
I want to use a K-type thermocouple to measure exhaust gas temperature and surrounding structure temperatures for my micro turbo jet engine.
I read in the comments of How to use MAX6675 thermocouple k type with Arduino video the following:
From what I understand, a thermocouple is simply two different metal rods which are connected to a small bulb at one end where they are in thermal equilibrium and produce a voltage output at the other ends.
I do not understand why it would be the case that it can only be used to measure air temperature alone and will have problems measuring surface temperatures.
AI: There is no reason a thermocouple can't be used to measure surface temperature. This is done all the time.
However, note that the air and the thermocouple wires will be conducting some heat to the thermocouple in addition to the surface, and that can affect the reading.
Creating a good thermal bond between the thermocouple and the surface will minimize the error. Thermal epoxy may work at low temperatures. At high temps, I would try to weld or mechanically clamp the thermocouple to the surface.
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H: Using Jfet as constant current source to drive a BJT
The circuit diagram below shows two simple voltage regulators, one of them is driven by constant current source using a Jfet and the second one also providing a constant current because the voltage is constant.
What is the benefit of using a Jfet in a circuit like this? is it related to noise?
simulate this circuit – Schematic created using CircuitLab
AI: When using a JFET as a 1 mA constant current source, the maximum current that can be drawn into the TIP41 base is 1 mA and, given that the hFE of the transistor is only going to be around 50, the output current into RL is going to be limited to about 50 mA: -
I see or know no practical use of this circuit given the parts and values shown.
In circuit 2 (JFET and R3 replaced by R7), there is a possibility that more than 1 mA could enter the TIP41 base and so there may be a slight increase in the current that can be delivered to load RL under heavy loading (maybe up to 100 mA).
What is the benefit of using a Jfet in a circuit like this? is it
related to noise?
I see no benefit and it can't be related to noise (because the closed-loop op-amp control will dictate noise) but, I didn't design the circuits and I don't know what the design aims were.
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H: Resistive current sensor shows reading when I connect it in series with a battery while no current is flowing through it
I need to monitor the charge and discharge current of two 12V lead-acid batteries in series using an INA219 current sensor, and a 0.75 mOhm shunt. At first, I placed the current shunt in the low side of the circuit as shown below in the first figure. That setup was necessary due to the common mode limitation of the INA219, which was 26V; high side sensing was not an option due to the voltage of the two lead acid batteries in series that could reach 26V. The low side sensing was working as intended.
simulate this circuit – Schematic created using CircuitLab
I decided to place the shunt between the two batteries in the series connection to reduce the number of wires. This lead to an almost constant sensor reading of 0.5A (meaning a shunt voltage of 0.4 mV was obtained) when no voltage is present across the shunt(see figure 2 below). I did probe the shunt with an oscilloscope and beside negligible harmonics, there wasn't any DC component across the shunt. I did the same with a multimeter and a stray reading of 0.003 mV (9999 count multimeter) was obtained across the shunt, which is also negligible. I also measured the current in the loop using a current meter and the result was 0 mA. This current reading quickly becomes null once I disconnect the shunt from both battery terminals which leads me to believe that the batteries are affecting the sensing somehow; More specifically, The BAT1+ terminal, since when I connect the shunt to it, this problem occurs.
simulate this circuit
What exactly is causing this offset in the reading of the current sensor and how do I eliminate it?
Note: the low pass filter was used to reduce harmonics as per the datasheet instructions of the INA219.
Current sensor Datasheet
AI: The shunt used only generates 375uV. This is not ultra low, but precautions are required.
Common Mode Rejection Ratio:
The INA219 has a typical CMRR of 120dB. Hence by moving the sense point to the other side of BAT1 you've added 12V of common mode. This is expected to appear as an error then of 12uV RTI (referred to input). Likely to be a contributor, but much smaller than the offset reported.
Note CMRR can be tested easily. Short INA219 inputs together (or just leave the almost short 750uOhm!) and connect to a variable PSU. Check how much the output varies over 0-12V.
Processing:
Has the software processing chain be proven correct with large known currents? Does the software set the correct gain in the device for what its calculating? I wonder if its a combination of wrong scaling and the CMRR issue.
Input Bias:
I'm am a little suspicious over the slightly different way the IN+ and IN- bias currents are specified (despite both being 20uA). Is there any chance R3/R4 are not actually 10Ohms but much higher. This could induce an offset error larger than expected for the device if coupled with unequal bias currents.
Thermocouple effects:
Given sub millivolts are being investigated maybe double check for these type of issues. Unless something is really wrong it shouldn't explain the magnitude of offset observed.
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H: Why is there current flowing through the resistor R1?
I came across this problem in a book. In the question, one has to determine the current through resistor R1 as a function of the input current, while assuming a constant voltage model for the diode D1 (800mV voltage drop when it turns on.)
As far as I know, when the diode turns "on" as per the constant voltage model, it is replaced by a voltage source and also that current prefers the path of least resistance in a circuit. When the diode D1 turns on, shouldn't all the current go through D1 and none through R1?
When I tried to plot the same using LTspice here is what I found:
Another part of this question asks one to plot the current through R1 as a function of the input voltage but there is a current source as input not a voltage source in this question. How should I do it?
AI: I'll assume by "input voltage", you mean \$V_B\$. We don't have values for R1 or \$I_{IN}\$, so I am not sure how one is expected to produce a graph of \$I_{R1}\$ vs. \$V_B\$. I suppose we could make some up, because I think the purpose of such a graph would be to illustrate the two distinct regimes of operation of this circuit; the range of values of \$V_B\$ for which D1 is conducting, and the range where D1 is not conducting.
Examine the case where D1 is indeed passing current, and behaves as voltage source, as you say. An analysis of this circuit containing such a voltage source, \$V_{D1}\$, in the place of D1 should reveal the relationship between \$V_B\$, \$I_{R1}\$ and (crucially) \$I_{D1}\$. Whatever equation we obtain, it can only be valid for \$I_{D1} > 0\$, since for all other values (\$I_{D1} \le 0\$), the diode would (if it were in the circuit again) be reversed biased, so our model with the voltage source \$V_{D1}\$ is not a good representation of that circumstance.
The significance of this is that graphs of the original circuit's behaviour will necessarily contain some discontinuity at the point where \$I_{D1}\$ becomes zero, where the diode's behaviour changes. My first suspicion is that perhaps we can expect the slope of such graphs to change at that point on the plot, corresponding to \$I_{D1} = 0\$, but this remains to be seen.
Let's get on with the analysis, replacing D1 with a voltage source:
simulate this circuit – Schematic created using CircuitLab
Note the orientation of \$V_{D1}\$, whose more positive node must be the anode of the forward biased diode. I've thrown in some arbitrary values for \$I_{IN}\$ and R1, just for the purpose of graphing. You can analyse this either with meshes or nodally. Here's my nodal analysis:
$$ I_{R1} = I_{IN} + I_{D1} $$
$$ V_B + R_1I_{R1} + 0.8V = 0V $$
Combining these yields:
$$ I_{D1} = - \frac{0.8V + V_B}{10\Omega} - I_{IN} $$
Using my chosen values for \$I_{IN}\$ and \$R_1\$, a plot of \$I_{D1}\$ against \$V_B\$ looks like the blue line here:
If you use the equation to solve for \$V_B\$ when \$I_{D1}=0\$, you find \$V_B=-10.8V\$. That's the value of \$V_B\$ at which the circuit moves from one regime into the other. That equation is only valid for positive values of \$I_{D1}\$, which is everything to the left of vertical green marker at \$V_B=-10.8V\$, where \$I_{D1}\$ is always positive.
On the right side of the green marker, where \$V_B >= -10.8V\$, the diode cannot be conducting, because \$I_{D1}\$ would be negative, if it existed at all. Of couse \$I_{D1}\$ can never be negative, and our model is incorrect to the right of the marker.
In the absence of better information I have had to make some assumptions about what the "input" is, or what R1 is, and so on, but the main point of this answer is not to solve the actual problem. It is to illustrate the procedure and logic behind finding that "transition" point, caused by the presence of the diode, that divides the operation of this circuit into two regimes.
To recap, you start by analysing the circuit as if the diode were a voltage source, and find the conditions of the circuit where the current through that source becomes zero. That is the transition point, the cusp of conduction.
Now you may proceed to analyse the circuit from the perspective where the diode does not conduct, by removing it altogether. Knowing the transition point, you may then combine graphs from both scenarios, either side of that transition, into a single graph.
I used KCL to derive the relationship:
$$ I_{R1} = I_{IN} + I_{D1} $$
There's a big hint right there that R1 can pass current, and when the diode is reverse-biased (passing none of it), the current through R1 must be equal to \$I_{IN}\$. Whewre else could \$I_{IN}\$ go?
You may think of it like this: what I described above is how you might algebraically find out the conditions at which the diode becomes reverse biased and effectively "disappears". When that happens, \$I_{D1}=0\$, and \$I_{R1}\$ and \$I_{IN}\$ must necessarily become equal.
Let's run a simulation to see if that's what actually happens. Let's flip the variables around a bit. This time I will set a fixed \$V_B=-10.8V\$, and vary \$I_{IN}\$. From our calculations so far, I should expect to see a transition between regimes when \$I_{IN}=1A\$:
simulate this circuit
Now a simulation showing the merger of \$I_{R1}\$ with \$I_{IN}\$ happening as \$I_{IN}\$ crosses the threshold at 1A:
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H: Why does the LED turn off when I try to measure current?
I have the following circuit:
simulate this circuit – Schematic created using CircuitLab
I'm trying to measure the current in it, which should be
\$\frac{\text{5V}}{\text{220}\Omega} \approx 22 \text{mA}\$
The problem is that, when I put my multimeter in, the current is measured correctly, but the LED turns off.
Click here to see what I mean.
Why does the LED turns off?
AI: Why does the LED turns off?
The LED needs about 2 volts across it before fully illuminating. But, if the voltage across it drops below around 1.8 volts, it'll not illuminate at all. And, it'll drop low when measuring current (your way) because your meter has a low measurement impedance close to 0 Ω.
With your ammeter in parallel with the LED you collapse the voltage across the LED to a few millivolts and the LED fails to illuminate. The full 5 volts appears across the 220 Ω resistor and you incorrectly infer that the current in the LED is 22 mA. That's what flows through your meter.
The actual LED current (when operating without the ammeter shorting it out) will be about 14 mA because the LED drops about 2 volts leaving about 3 volts across the 220 Ω resistor hence, 3/220 = 14 mA.
If you want to measure current without interrupting current flow into the LED, measure the voltage across the 220 Ω resistor and compute LED current that way. Or, put your ammeter in series with the LED or resistor.
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H: Multiplication 32x32 Mealy machine using 16x8 multiplier Verilog code
I am trying to implement a multiplication 32x32 Mealy machine using a 16x8 multiplicator in Verilog. I wrote the arithmetic part and the FSM part + a code to connect both and a test bench, but when I am trying to run it in Modelsim, it seems like nothing happened -- only the initial values. I am new to Verilog and can't find my mistake.
I have a b_sel of 16, 16, a_sel of 8,8,8,8, shifter with 6 positions, a_msb_is_0 to check if a's most significant bite is 0 and b_msw_is_0 to check if b's most significant word is zero. the machine should run only after start = 0 and to store the value in the register until the next start happens.
Here is my code:
mult32x32_fast_fsm.sv:
// 32X32 Multiplier FSM
module mult32x32_fast_fsm (
input logic clk, // Clock
input logic reset, // Reset
input logic start, // Start signal
input logic a_msb_is_0, // Indicates MSB of operand A is 0
input logic b_msw_is_0, // Indicates MSW of operand B is 0
output logic busy, // Multiplier busy indication
output logic [1:0] a_sel, // Select one byte from A
output logic b_sel, // Select one 2-byte word from B
output logic [2:0] shift_sel, // Select output from shifters
output logic upd_prod, // Update the product register
output logic clr_prod // Clear the product register
);
typedef enum { start_st, mult1x1_st, mult2x1_st,mult3x1_st,mult4x1_st,mult1x2_st,mult2x2_st,mult3x2_st,mult4x2_st} sm_type;
//signals for curr and next state
sm_type current_state;
sm_type next_state;
always_comb begin
// Defining defaults
next_state = current_state;
busy = 1'b0;
a_sel = 2'b00;
b_sel = 1'b0;
shift_sel = 3'b000;
upd_prod = 1'b0;
clr_prod = 1'b0;
case (current_state)
start_st: begin
if(start == 1'b1) begin
next_state = mult1x1_st;
upd_prod = 1'b1;
end
end
mult1x1_st: begin
next_state = mult2x1_st;
busy = 1'b1;
upd_prod = 1'b1;
a_sel = 2'b01;
shift_sel = 3'b001;
end
mult2x1_st: begin
next_state = mult3x1_st;
busy = 1'b1;
a_sel = 2'b10;
b_sel = 1'b0;
shift_sel = 3'b010;
upd_prod = 1'b1;
end
mult3x1_st: begin
busy = 1'b1;
if(a_msb_is_0 == 1 && b_msw_is_0 == 1) begin
next_state = start_st;
end
else if(a_msb_is_0 == 1 && b_msw_is_0 == 0) begin
next_state = mult1x2_st;
a_sel = 2'b00;
b_sel = 1'b1;
shift_sel = 3'b100;
upd_prod = 1'b1;
end
else begin
next_state = mult4x1_st;
a_sel = 2'b11;
b_sel = 1'b0;
shift_sel = 3'b011;
upd_prod = 1'b1;
end
end
mult4x1_st: begin
busy = 1'b1;
if(b_msw_is_0 == 1) begin
next_state = start_st;
end
else begin
next_state = mult1x2_st;
a_sel = 2'b00;
b_sel = 1'b1;
shift_sel = 3'b100;
upd_prod = 1'b1;
end
end
mult1x2_st: begin
next_state = mult2x2_st;
busy = 1'b1;
a_sel = 2'b01;
b_sel = 1'b1;
shift_sel = 3'b101;
upd_prod = 1'b1;
end
mult2x2_st: begin
next_state = mult3x2_st;
busy = 1'b1;
a_sel = 2'b10;
b_sel = 1'b1;
shift_sel = 3'b110;
upd_prod = 1'b1;
end
mult3x2_st: begin
busy = 1'b1;
if(a_msb_is_0 == 1) begin
next_state = start_st;
end
else begin
next_state = mult4x2_st;
a_sel = 2'b11;
b_sel = 1'b1;
shift_sel = 3'b111;
upd_prod = 1'b1;
end
end
mult4x2_st: begin
if(start == 1'b1) begin
next_state = start_st;
clr_prod = 1'b1;
end
next_state = mult4x2_st;
busy = 1'b1;
end
endcase
end
endmodule
mult32x32_fast_arith.sv:
// 32X32 Multiplier arithmetic unit template
module mult32x32_fast_arith (
input logic clk, // Clock
input logic reset, // Reset
input logic [31:0] a, // Input a
input logic [31:0] b, // Input b
input logic [1:0] a_sel, // Select one byte from A
input logic b_sel, // Select one 2-byte word from B
input logic [2:0] shift_sel, // Select output from shifters
input logic upd_prod, // Update the product register
input logic clr_prod, // Clear the product register
output logic a_msb_is_0, // Indicates MSB of operand A is 0
output logic b_msw_is_0, // Indicates MSW of operand B is 0
output logic [63:0] product // Miltiplication product
);
//Logics
logic[7:0] A_2_MULT;
logic[15:0] B_2_MULT;
logic[23:0] MULT_2_SHIFTER;
logic[63:0] SHIFTER_2_ADDER;
logic[63:0] ADDER_2_PROD;
logic[63:0] PROD_2_ADDER;
// FSM synchronous procedural block for storing product.
always_ff @(posedge clk, posedge reset) begin
if (reset == 1'b1 || clr_prod == 1'b1) begin
product <= 64'b0;
end
else if (upd_prod == 1'b1 ) begin
product <= ADDER_2_PROD;
end
end
always_comb begin
assign a_msb_is_0 = a[31:24] == 0; // Outputs for FSM
assign b_msw_is_0 = b[31:16] == 0;
if (b_sel == 0) begin // MUX 2->1 For b operand
assign B_2_MULT = b[15:0];
end
else begin
assign B_2_MULT = b[31:16];
end
case (a_sel) // MUX 4->1 For a operand
2'b00 : begin
assign A_2_MULT = a[7:0];
end
2'b01 : begin
assign A_2_MULT = a[15:8];
end
2'b10 : begin
assign A_2_MULT = a[23:16];
end
2'b11 : begin
assign A_2_MULT = a[31:24];
end
endcase
PROD_2_ADDER = product; // Connect Wire to product output
assign MULT_2_SHIFTER = A_2_MULT * B_2_MULT; // 16X8 Multiplier
assign SHIFTER_2_ADDER = MULT_2_SHIFTER << shift_sel; // Shifter
assign ADDER_2_PROD = SHIFTER_2_ADDER + PROD_2_ADDER ; // Adder
end
endmodule
mult32x32_fast.sv:
// 32X32 Iterative Multiplier template
module mult32x32_fast (
input logic clk, // Clock
input logic reset, // Reset
input logic start, // Start signal
input logic [31:0] a, // Input a
input logic [31:0] b, // Input b
output logic busy, // Multiplier busy indication
output logic [63:0] product // Miltiplication product
);
//Logics
logic [1:0] a_sel;
logic b_sel;
logic [2:0] shift_sel;
logic upd_prod;
logic clr_prod ;
logic a_msb_is_0;
logic b_msw_is_0;
mult32x32_fast_fsm FSM (.clk(clk), .reset(reset), .start(start),.a_sel(a_sel),.b_sel(b_sel),.shift_sel(shift_sel),.upd_prod(upd_prod),.clr_prod(clr_prod),.busy(busy),.a_msb_is_0(a_msb_is_0),.b_msw_is_0(b_msw_is_0));
mult32x32_fast_arith ARIC (.clk(clk), .reset(reset),.a(a),.b(b), .a_sel(a_sel),.b_sel(b_sel),.shift_sel(shift_sel),.upd_prod(upd_prod),.clr_prod(clr_prod),.a_msb_is_0(a_msb_is_0),.b_msw_is_0(b_msw_is_0), .product(product));
endmodule
and mult32x32_fast_test.sv:
// 32X32 Multiplier test template
module mult32x32_fast_test;
logic clk; // Clock
logic reset; // Reset
logic start; // Start signal
logic [31:0] a; // Input a
logic [31:0] b; // Input b
logic busy; // Multiplier busy indication
logic [63:0] product; // Miltiplication product
mult32x32_fast uut(.clk(clk), .reset(reset), .start(start), .a(a), .b(b), .busy(busy), .product(product));
always begin
#4 clk =~clk;
end
initial begin
clk = 1'b1;
reset = 1'b1;
start = 1'b0;
repeat(4) begin
@(posedge clk);
end
reset = 1'b0;
a = 321332983;
b = 206777104;
@(posedge clk);
start=1'b1;
@(posedge clk);
start=1'b0;
@(negedge busy);
@(posedge clk);
a = 9975;
b = 11024;
@(posedge clk);
start=1'b1;
@(posedge clk);
start=1'b0;
@(negedge busy);
end
endmodule
This is what I get when I try to run it:
AI: To debug Verilog simulations, you need to look at waveforms of internal signals. When I look at your FSM, I notice current_state never changes (it remains in its default state, start_st). You are missing logic to update the state register:
always_ff @(posedge clk, posedge reset) begin
if (reset) begin
current_state <= start_st;
end else begin
current_state <= next_state;
end
end
With this change, I see the current state changing.
This shows you where to put the code:
module mult32x32_fast_fsm (
input logic clk, // Clock
input logic reset, // Reset
input logic start, // Start signal
input logic a_msb_is_0, // Indicates MSB of operand A is 0
input logic b_msw_is_0, // Indicates MSW of operand B is 0
output logic busy, // Multiplier busy indication
output logic [1:0] a_sel, // Select one byte from A
output logic b_sel, // Select one 2-byte word from B
output logic [2:0] shift_sel, // Select output from shifters
output logic upd_prod, // Update the product register
output logic clr_prod // Clear the product register
);
typedef enum { start_st, mult1x1_st, mult2x1_st,mult3x1_st,mult4x1_st,mult1x2_st,mult2x2_st,mult3x2_st,mult4x2_st} sm_type;
//signals for curr and next state
sm_type current_state;
sm_type next_state;
always_ff @(posedge clk, posedge reset) begin
if (reset) begin
current_state <= start_st;
end else begin
current_state <= next_state;
end
end
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H: AM demodulation circuit doesn't work
I'm designing AM modulation and demodulation circuits. The AM modulation works fine but when I connected it to the demodulator (I'm using envelope detection) the modulating signal changed to the original message.
Amplitude modulation circuit design:
The modulation output
the first one from the top is the carrier. The second one is the message. The third one is the modulation output.
When the envelope circuit is connected, this happens:
The third one from the top is the modulation output. The fourth one is the demodulation output.
AM modulation and demodulation circuit design:
AI: Simulating an "Additive" mixer is a bit difficult with BF at low frequency and LO (Local Oscillator) at high frequency.
Important thing: choose L & C for resonance @ frequency of the local oscillator (1 MHz).
Choose also resistance in parallel not too high.
And here is harmonic content of output.
Here is an example (another type of demodulator, quadratic).
Note the use of an emitter follower between the "mixer" and the "demodulator".
So, the "demodulator" does not interfere with the "mixer".
Note also the use of an L-C filter, example.
|
H: What's the purpose of the band-pass filter in an RF transmitter?
What is the purpose of the marked band-pass filter?
AI: The output of an AM (Amplitude Modulating) mixer contains a number of frequency components. These components are 1) the modulating signal. This signal is typically audio frequency, and in the diagram is the signal that comes out of the DAC and passes through a filter before reaching the mixer. The second component is the carrier signal, which is provided by the LO (Local Oscillator) in your circuit. The third and fourth components are the lower and upper sidebands. These are new components that are created in the mixer, and are neither the carrier, nor the modulating signal.
The purpose of the filter between the mixer and the (RF) radio frequency amplifier (in your circuit, labeled "PA") is to attenuate (reduce the amplitude of) the modulating signal, so that very little of it appears at the input of the RF amplifier. The filter between the mixer and the RF amplifier should not remove the carrier or either side-band in an amplitude modulated signal in an AM (amplitude modulated) system. There are other types of modulation, such as SSB (single-sideband suppressed carrier) where the carrier is suppressed, and one of the sidebands as well. Finally, there are systems such as phase modulation and frequency modulation that sometimes generate an AM signal as an intermediate stage. However, your diagram does indicate that the output of the mixer is used in any of these ways.
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H: Why do we need nonlinear electronics for computing?
When I read about photonics, I always see that they can be used for linear transformations (just matrix multiplications), and that this is a limitation that makes them unsuitable for building a complete photonic microprocessor. Why are linear transformations insufficient? What kind of computations require nonlinear transformations, and is there a subtopic in EECS that tackles the separation between applications of linear and nonlinear operations?
AI: Most computers use digital logic. Digital circuits are 'restoring' and minimize (eliminate) signal level error propagation. Analog circuits (which are used for linear transformations) generally add noise (errors) and decrease accuracy as signals propagate, making them unsuitable for complex multi-stage calculations.
Basically, if a logic gate has a signal (voltage level) that is high, or 'nearly high', its output will be even closer to 'perfect'. Similarly for low signals. This means that a logic level will propagate through the logic (with some delays), but at each step it doesn't lose quality -- in fact it improves the precision of the signal.
This comes because the digital logic gates are non-linear. For input signals close to the transition point, it has very high gain -- thus the output signal will be further away from the transition point. Since input and output signal levels span the same range, the corollary of this is that as the input level moves away from the transition point, the output saturates -- i.e. asymptotically approaches the ideal level; this implies that in this condition the gain is very low. Thus the circuit is non-linear.
This means that even to implement linear calculations (e.g. matrix multiplication) only the most basic manipulations are practical (i.e. accurate enough) to implement with analog circuits (e.g. opamp gain or integrators). When linear algorithms are implemented digitally (e.g. floating point computation) it is practical to have millions of variables and billions of calculations -- that is not feasible with an analog implementation.
There are a few cases where analog (linear) implementations can be better -- these are ultra low power circuits where a few transistors can implement a calculation that would require 1000's of digital gates; also extremely high speed circuits (multi-GHz) where digital logic isn't fast enough and some noise (inaccuracy) is tolerated. Examples include the front end of RADAR systems where the initial signal processing and filtering is implemented with analog circuits.
to clarify -- even if the computation is linear, it is generally most robustly implemented with digital electronics (e.g. a computer), likely with floating point representations, and computation using that uses non-linear functions (binary logic operations).
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H: Relation between signal mixer and filters
Mixer output shown as red wave:
Can a band-pass filter be used to remove the low frequency shown as a blue sine wave and leave the rest high frequency just like the frequency shown as a green sine wave? If so, which band-pass filter provides the most proper output (most relatable with the green wave?) RC or RLC filters? Active or passive filters?
I want the filter to be compatible with 2 different frequency values to distinguish frequency-modulated waves while showing high impedance to lower or higher frequencies.
An RC bandpass filter outputs a low voltage of the red sine wave if I'm not mistaken
Bandpass filter's input - red sine wave
Bandpass filter's output - green sine wave
Removed frequency - blue sine wave
The circuit I got the screenshot:
The circuit I am up to:
AI: A diode ring mixer used in your previous question can generate amplitude modulation suitable for radio-frequency transmission.
The example shown uses a sine wave V_carrier, frequency of 50 MHz. This could also be a square wave source as well. Amplitude is about 1.5V RMS. These mixers work well when driven with a source resistance of 50 ohms. The carrier signal generator should be capable of delivering roughly +10 dBm - that's 10 milliwatts into 50 ohms.
The modulating signal here V_baseband is 1 MHz sine wave, amplitude of 0.2V with a 0.2V DC offset. When this generator is at 0V, no RF output appears. When amplitude rises to +0.2V, maximum RF output appears. These modulators can usually accept baseband input frequency of many megahertz. It needn't be a sine wave - digital signals can be applied too, as long as they can drive 50 ohms. Be aware that the carrier frequency should be far higher than the frequency of this baseband signal, to ease the requirement of the output filter needed to knock down harmonics.
The output signal AM_radio_frequency_output contains harmonics, mostly at 3x carrier frequency (at 150 MHz) and above. These should be attenuated. This is usually done with a band-pass filter, centered at the carrier frequency (in this example 50 MHz).
These modulators are standard components made by various manufacturers which are to remain un-named. Many allow the modulating source to go down to DC, as shown in the schematic above. No need to build one yourself.
But be aware that output is feeble, and likely needs amplification before driving an antenna. And don't forget the bandpass filter, else those harmonics will cause problems for other spectrum users.
In this example, the bandpass filter should have a bandwidth of at least twice the modulating frequency (2 MHz). A low-pass filter would work too, with 50 MHz at the upper end of the pass-band, and 150 MHz in the stop-band. At these frequencies, LC filters are appropriate.
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H: Why is my maths saying that increasing turn count will decrease magnetic field strength in an AC coil?
I’m trying to make a device that can propel rings of conductive material upwards and make them hover, like the one seen in this video at 6:24, albeit on a smaller scale. I got a stepdown transformer to 24-volt AC and was having trouble getting this effect to work and realised that dealing with AC will be complicating things beyond the simple
\$ B = \frac{\mu I N}{l}\$ because, assuming a purely inductive load, \$ I = \frac{V}{2\pi f L} \$ and \$ L = \frac{\mu N^2 A}{l}\$, which has some of the same variables as \$B\$.
I can insert an iron core into my coil to increase the magnetic field strength, but that will also increase the inductance, which will decrease the current, which will decrease the magnetic field strength, possibly leading to zero or negative change in the final magnetic field (so it seems to me that the only reason for the core is to help bring the magnetic field up higher from the coil). I decided to do some maths to figure out which variables I should change to increase my magnetic field:
I substituted values in 2 different ways to see if I had made a mistake but the result both times was that if I increase the number of turns in the coil, I'll decrease the magnetic field strength (and also that if I use a really low frequency, I'll get a massive magnetic field???), which sounds like nonsense to me. Clearly I am approaching this the wrong way. My first instinct is that there is some effect that I have not heard of that affects the magnetic field of AC coils much differently to DC ones, but also, for the purposes of getting the eddy currents required to overcome gravity in the aluminium ring, is the B-field even the most important number to be looking at? Any help with this will be greatly appreciated.
AI: the result both times was that if I increase the number of turns in
the coil, I'll decrease the magnetic field strength (and also that if
I use a really low frequency, I'll get a massive magnetic field???),
which sounds like nonsense to me.
No, it's correct.
Maximum field strength is attained by pushing the most power into the coil that you can without vaporizing it. This value is determined by the size of the coil only. The number of turns (for a particular coil size) determines the voltage. The more turns you have the more voltage you need, because while more turns produce more magnetism at the same current, the longer thinner wire has higher resistance which reduces the current and magnetic field more.
So you choose the coil size needed to produce the magnetic field strength you want, and then the number of turns and wire size to match the voltage you want to use.
If you have a certain size coil that isn't producing enough magnetism on the voltage are using, either raise the voltage, or reduce the number of turns while increasing wire size to fill the same volume. One way to do this is split a single winding into two halves and then wire them in parallel. This will give you half the turns but 1/4 the resistance for 4 times the current and double the magnetic field strength with the same amount of copper. Power consumption increases by 4 times too, just like it would if you doubled the voltage on the original coil to get double the current and magnetic field strength.
The highest current (and therefore highest magnetic field strength) is achieved at DC, where the inductance has no effect. If the coil has high inductance when reducing the frequency will lead to increasing current as the inductive reactance decreases.
If you have an iron core and reduce the frequency it may saturate at some point as the current increases, reducing inductance dramatically and causing a huge increase in current (but not magnetism). The same thing will happen if you raise the voltage.
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H: Can you use a DC brushless motor as a torque motor?
I've got an outrunner brushless DC motor (Flipsky 63100 190KV 5500W if that's relevant). It'll be used to spin normally sometimes, but I also need it at other times to give resistance to motion.
Basically, I'll be running a current through it to spin one direction, but the motor will be forced to spin the opposite direction due to other forces. Would this hurt the motor in any way? Would it degrade the magnets or coils inside?
I read on here that this is what a torque motor is for, but this is what I have and I don't want to break the motor.
I understand that ESCs have a "governor mode" which monitors the RPM and gives more power to try and maintain the expected speed, but I've turned it off. If I resist the rotation of the motor, it slows down and I don't feel it drawing more power to overcome the resistance.
I don't have any way to measure the voltage/amp being drawn to actually know if any extra current is being drawn, but I don't have any reason to suspect the motor is getting any extra power when encountering resistance.
Any advice?
I figured I'd get a multimeter and check the current to see if there's more current drawn when the motor is stalled or not. But from what I've read elsewhere, if there's no extra current draw then the motor and ESC can be used in this way?
AI: There are two types of BLDC motor, each requiring its own type of ESC. Self commutated, and Hall-sensor commutated.
A self commutated motor uses the back-EMF generated by the motor for the ESC to figure out where it is, and drive the coils correctly. The ESC is normally designed to spin the motor at a speed, and may get confused if the motor is forced backwards. As far as it's concerned, the load is too large.
A sensored motor uses the Hall-sensed position of the rotor to work out how to drive the coils. This is the type used in Segways and hoverboards. The ESC can be designed to operate in all four quadrants of the speed/torque curve.
Generally, as long as a BLDC motor is neither overheated nor overspeeded, it and the ESC won't be damaged or degraded. The ESC however might get confused and stop trying to drive the motor until reset.
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H: Humming sound when not touching wire
I explained this problem in a video so you can see with your own eyes the problem... touching the GND wire makes the problem go away, however touching the signal wire creates the problem. Even touching the signal wire from the plastic it still creates the problem.
https://photos.app.goo.gl/dK87rBUf9LJme1dWA
I am using the circuit below (instead of 1k resistors I am using 10k resistors) to bring the speaker audio level to mic level. The speaker is from a digital piano where I play musics and I want to record them on my smartphone. This circuit was kindly provided by @JRE.
However today I discovered a weird behaviour with it: if I connect it to my smartphone (to record the sound on the mic line - TRRS) I hear a hum/hiss. However when I touch with my fingers the gnd or signal wire, it disappears. It took me hours to realize this was the problem. And it's 100% reproducible: if I touch any of the wires (signal or gnd) the noise goes away completely, if I remove my finger from any of the wires, the noise comes back.
I am using my smartphone on battery (not connected to any external power supply). I read on Google about ground issues, but how this simple circuit could cause it? And how can I fix it?
As requested on the comments: my digital piano is powered from the outlet (220V AC -> 12V DC -> input of piano). The smartphone is not connected to anything else (not usb, no charger... just its own battery). The only connection between the piano and the smartphone is the GND pin and MIC pin (of the TRRS connector inside the smartphone).
AI: It appears that hum is caused by lack of shielding in the interface between the piano and the smartphone.
The high impedance microphone input of the smartphone will pick up hum / noise from the unshielded interface.
A metallic enclosure and shielded cables are a must to avoid unwanted noise pick-up.
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H: Is it safe to PWM control a consumer smart plug or smart switch?
I was looking at a project that controls the speed of a normal off-the-shelf AC-powered house fan by plugging it up through a consumer smart plug (specifically, the Kasa ones, if that matters) and effectively pulse-width modulating its speed by turning the smart plug on and off with periods on the order of a couple of seconds. In the intended use case, this would be running for potentially hours at a time.
My primary question is: Is this strategy safe? Is it actually ok to PWM control a normal consumer AC-powered fan by flipping a normal consumer smart plug/switch on and off every couple of seconds?
My secondary question is: How quickly is this frequent switching likely to wear out the relay(s) in the smart plug/switch? And does wearing it out potentially become a fire hazard?
AI: I assume you mean a box fan or oscillating fan or something like that, not the HVAC whole-house fan. Slightly different power level there.
Anyway, it'll probably have a single-phase induction motor, and the "correct" way to vary the speed of one is to adjust both the voltage and the frequency. For example, if 100% is 120Vrms @ 60Hz, then 50% would be 60Vrms @ 30Hz, etc. There are industrial VFD's (variable frequency drives) that do exactly that in "dumb mode", or can actually read what the motor is doing in "smart mode" and run some logic to control that. The concept is quite similar to an audio amplifier, except that it's hooked up to a motor instead of a speaker. Any industrial electrical supply place should have them, though you might have some difficulty finding one that can drive a single-phase motor. They're normally used with 3-phase motors.
You might get away with a triac dimmer switch, though the cheap ones of those can be fooled into latching 100% on or dropping out if they don't have their expected incandescent-lighting load or close enough. For this purpose, it's more-or-less reducing the voltage while keeping the same frequency, but what it's actually doing is chopping up the AC sinewave faster than the motor (or hot filament) can respond.
I just happened to have a variac (variable transformer) sitting around, so I'm using that to actually reduce the voltage to one of my fans, because even the low-speed setting was a bit much for what I wanted.
Reducing the voltage while keeping the frequency up like that, is effectively reducing the torque that the motor can produce, while keeping the same maximum speed. So it'll be more susceptible to wind gusts if it's outside, etc. But if that's enough for you, then it's okay. You're not going to blow it up by doing that.
Torque actually corresponds to the current that it draws, but less voltage means it can't draw as much, all else being equal. How much it actually draws for a given voltage depends on the difference in speed between itself and the electrical frequency, or "slip": running slower, with more slip, draws more current, which produces more torque.
An on/off period of a few seconds is probably slow enough that it can respond to that. Thus, every PWM cycle is a start/stop cycle, not a constant speed. And the most stress happens during a full-on start, because it's receiving the full voltage and frequency ("commanded" fast, with lots of juice available), but presently running much slower than that.
As kind of a "nutty" experiment, you might actually get a big audio amplifier, like a Behringer NX-6000 for example, wire its output to a normal 120V outlet, and feed it from your phone or computer's headphone out. Play around with your favorite free signal generator and see what works. (Audacity at minimum)
A little bit of math on the claimed power rating and impedance says that it should be capable of producing the required voltage, and I'm pretty sure a floor- or desk- fan would be a lighter load than the 4-ohm speaker that it's designed for...
(This can also be used to drill home the idea that amplified speaker leads should be treated with respect, which for some reason the "artsy" audio guys don't seem to understand...)
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H: Why is this boost converter circuit outputting a lower voltage than expected?
I'm working on a boost converter board to power an OLED display, specifically a Midas Display MCOT128064SV-WM, off of 5V USB bus power (the VBUS pin on a Raspberry Pi Pico powered via USB).
I referenced this TI WEBENCH design:
I had this design printed and assembled, but it outputs around 12.2V (originally stated as 12.5V) when I applied power, instead of the 13V I'm expecting. Is there anything wrong with this circuit? I'm new to electronics design, so I'm pretty sure I'm missing something.
Edit to add: \$V_{out}\$ reaches 12.18V, and \$V_{FB}\$ only reaches 0.824V, instead of 0.795V.
Edit: After posting this, I found out R2 was ordered as a 1Ω resistor, not 100kΩ. Effectively, the upper half of the resistance divider around FB was 10% too low, so the output voltage was also about 10% too low.
AI: I had this design printed and assembled, but it outputs slightly under
12.5V when I applied power, instead of the 13V I'm expecting
So, to put that into context, it's a 3.85% error. Just saying...
The reference voltage for the TLV61046 at 25°C can be between 0.783 volts and 0.807 volts with a nominal at 0.795 volts. So, if the reference voltage in the chip is at 0.783 volts, the output voltage will be less than the ideal predicted one of 13 volts.
According to your resistor values, with 13 volts present on the output, the FB input will be 0.7934 volts but, factor-in some resistor tolerances to this (say 2%) and it might be more like 0.809 volts.
Taking all of this into account means that the actual output voltage could be as low as: -
$$\text{13 volts}\times \dfrac{0.783}{0.809} = \text{12.58 volts}$$
Add in some multimeter calibration errors and temperatures higher or lower than 25°C and you could easily get under 12.5 volts. So what accuracy does your meter brochure state? How old is your meter? When was it last calibrated?
If you are using 2% or 5% resistors it will be a lot more. If you meter's battery is close to depletion it could be more.
Trying to measure \$V_{FB}\$ with a standard 10 MΩ input impedance meter is going to alter \$V_{FB}\$ by nearly 10% and the regulator will adjust it's output by that amount to compensate. Be aware that this may upset things a little.
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H: What's wrong with level shifter output?
I was trying to understand what wrong about the output of the level shifter, the level shifter is part of my circuit that I trying to bring-up and encountered difficulty in this issue.
This is the circuit:
OE controlled by FPGA, the 5V and 3V voltages works well in other components in the circuit.
I measured the VCCA&VCCB their inputs are 5 and 3.3V respectively, the input from Retimer is 3.3V and the output of the level shifter is 2.5V, That's wrong because I need 5 volts for HDMI interface- As you can see these signals go to an HDMI connector and routing with cable to Test Pattern Generator Board(TPB).
The signals measured as stated at 2.5 volts are measured both before and after the FB (FL4,FL3).
I want to note even if the TPB is disconnected the voltage still 2.5V without any HDMI cable connected.
EDIT: attaching more relevant information for HDMI signals and pull-ups.
P1 connector is female connector that carrier DRACO TX MODULE(shelf product), I just design the carrier for it:
signals from manual requesting(DRACO SIDE):
If anyone can help me about this issues it would be much appreciated!
AI: The TXB0102 datasheet says:
The TXB0102 is designed to drive capacitive loads of up to 70 pF.
So it does not work with long traces, cables, or connectors.
If pullup or pulldown resistors are connected externally to the data I/Os, their values must be kept higher than 50 kΩ to assure that they do not contend with the output drivers of the TXB0102.
So you cannot use it for the CEC signal.
For proper operation, the device driving the data I/Os of the TXB0102 must have drive strength of at least ±2 mA.
So you cannot use it for the HPD signal.
The HPD signal is slow and unidirectional, so you can use pretty much any level shifter (except the TXB). But for the CEC signal, you need a shifter that can handle open-drain signals, like the TXS0102.
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H: Which edges (h->l or l->h) does this circuit detect?
Which edges (h->l or l->h) does this circuit detect? When I simulate it, the output voltage is constant, so it does not seem like it would detect any edges, which I did not expect.
AI: Edit: Andy aka has pointed out that the outputs of A1, A2 and A3 are always high. I think you meant them to be inverters, which requires that one of the inputs should be permanently high, not low. That explains why your graphs don't show any pulses. I'm ashamed that this didn't occur to me. That said, here's the rest of my original answer:
The combined propagation delay of A1, A2 and A3 is probably a few tens of nanoseconds, so any pulse you expect to see at the output of A4 will be that long. This is tiny compared to the time units you've specified for your pulse generator, and I suspect that if you are graphing time scales of the order of hundreds of milliseconds, then output pulses are too short to appear on the graphs.
Which transition is being detected, rising or falling? Well, in the condition where V1 is a steady high or low, the two inputs to A4 are always inverted with respect to each other, due to the odd number of inverters in the chain A1, A2, A3. Therefore, the natural state of output of NAND gate A4 is high.
If V1 starts high, bringing it low will not change that. Both inputs to A4 momentarily become low, and A4 output stays high. Later, when the delayed inverted signal also arrives at A4, it simply restores the state where the two inputs to A4 are inverted w.r.t each other. A4 output never changes during the transition of V1 from high to low.
If V1 starts low, though, things are different. If V1 then rises, both inputs to A4 become simultaneously, and momentarily, high. A4's output will go low and stay there until the other signal eventually arrives, to restore the status quo of mutually inverted signals.
Therefore this circuit detects a rising edge.
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H: How does a TTL gate input strain an ALS-TTL gate output, and how does it strain a CMOS gate output?
How does a TTL gate input strain an ALS-TTL gate output, and how does it strain a CMOS gate output?
Or do you maybe know where I can find resources on the topic?
AI: The datasheet (here of the SN74ALS04B) tells you how much current an ALS input needs:
The datasheet also tells you how much current an ALS output can supply:
(The absolute maximum ratings might be higher, but these are the highest output currents for which an output voltage is guaranteed.)
CMOS outputs (here of the SN74HC04) are designed to be symmetrical:
So both outputs have a drive strength that is much higher than needed for a single ALS input.
The output and input voltages also must match:
An ALS input must be pulled above 2 V when high, or below 0.8 V when low. The VOH/VOL values show that ALS and HC outputs can easily achieve that.
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H: Effect of antenna direction on antenna gain
I'm studying antenna theory right now, and I have a question about the effect of antenna direction on antenna gain.
My assumption of the antenna direction is like below:
Since the Rx antenna cannot get the signal from the Tx antenna, I thought receive antenna gain would be zero.
As a result, based on the Friis equation, \$P_r\$ will be zero too.
$$\frac{P_r}{P_t} = G_tG_r\left(\frac{\lambda}{4\pi d}\right)^2$$
If the antenna's direction is parallel, is the gain of RX antenna zero because of its direction? Am I right?
AI: If the antenna's direction is parallel, is the gain of RX antenna zero because of its direction? Am I right?
Yes you are right. Take for example the following definition for antenna gain taken from wikipedia
The ratio of the radiation intensity in a given direction to the radiation intensity that would be produced if the power accepted by the antenna were isotropically radiated
Gain is the ratio of power received and powerr received by an hypothetical isotrpoic radiator in a given direction. It is a function of direction, when it is given as a single number it is in the direction of maximum gain.
In your hypothetical case, power received in the direction of the TX antenna is 0, so gain is 0 (as correctly noted in a comment in a real case won't probably be zero but some very small amount, we use dB to work with quantities with such dynamic range)
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H: The structure of the loaded circuit in Thevenin's theorem
If the load in Thevenin's theorem happens to be a circuit instead of a single resistor, must this loaded circut contain only resistors or may it contain also voltage or current sources, etc.?
AI: Let's assume you have any circuit named X which contains voltage sources, current sources, resistors, capacitors, inductors and linear amplifiers, but absolutely no parts where currents and voltages depend on each other obeying some non-linear equation.
Take any 2 nodes of X, say A and B. Thevenin equivalent of X in relative with nodes A and B contains a voltage source and a series impedance, which both may depend on frequency or be presented in s-domain with Laplace transforms.
The Thevenin equivalent of X in relative with nodes A and B is the same, no matter what load you are going to connect between A and B. You can connect as well a single resistor or a more complex circuit which can contain anything. Only be sure that no other connections are made between X and your load.
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H: LED on off delay (without an Arduino)
I'm new to electronics but I want to put delay on a circuit without using an Arduino. I do have a Raspberry Pi 4, but I would like to try without using it. When I was looking on the internet I saw people using a capacitor, but they also used an Arduino.
What I want to make as something like a police light: every LED goes on and when it Is off, it starts the next LED.
This is what I have made on Tinkercad so far:
I want them to go on/off in the direction of the arrow:
AI: This is the first stage of a shift register solution
simulate this circuit – Schematic created using CircuitLab
You need the switch SW1 to define an initial pattern to be moved around. Connect this signal to all following stages.
With the 4 inputs D0-D0 you configure the start pattern, here just the first LED on. In the following stages connect all 4 of them to GND or whatever you like.
Loop back Q3 of the the last register back to IN_RIGHT of the first to build a ring.
Use e.g. NE555 to create the moving clock signal CLK1. All stages need this clock signal.
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H: What is the purpose of button like blinking
My father was an electric engineer who passed away 12 years ago. Today I found this component in our house, it works with two LR927 batteries. There is no cable (only a cotton like rope attached to the back panel) or button outside of the thing. If you close the back panel hard enough it will start blinking red and blue constantly. What is purpose of this component? There is no additional part to un-assemble. I tried Google Lens and no luck for it. Could you help me to identify it?
AI: It is a cheap piece of jewelry. You can buy them for about a dollar each when you buy 25 at a time.
it looks like part of burglar alarm transmitter.
It doesn't look like any burglar alarm transmitter I've ever seen, although I haven't seen all of them. It's made like a toy.
There are likely many variants of this design made using similar tooling, with details varying across time and space, so to speak. Some of them are not earrings but pendants, for example. There are probably millions of the things made yearly.
And just googling "blinking earring" brings this picture, which is just another version of the same thing.
It came from this Amazon listing.
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H: How to infer resistor size from the manual of this microcontroller board?
I have STM32's NUCLEO-F302R8 board. The manual is given here. I couldn't find any PCB design file for this board so that I can open it in KiCad, Eagle,etc..
From the manual I couldn't figure out the resistor sizes on the bottom layer for the solder bridges SB51, SB56, SB46, SB52:
How can I infer those resistor sizes?
AI: The CAD files that @TimWescott referenced contain the PCB layout (in the schematic zip, not necessarily where you would expect it). As typical for ST, they are in Altium.
The footprints look like this:
Outer copper dimensions are 100 mils x 40 mils. So maybe an 0805 would be appropriate.
Of course if you're doing a few by hand all you need is a soldering iron and some solder. Lead-free will work even better than nice 63/37 solder.
(below does not relate to your eval board)
I note that a Nucleo board I happen to have in front of me at the moment (G071RB) has jumper dimensions that are hard metric and a bit smaller (2.4mm x 1mm) and they bridge them with 0603 zero-ohm resistors. Unusually, they mask the pad off partially with solder mask (i.e. the pad is partially solder-mask defined). Probably some compromise to allow the boards to be reliably machine-assembled with zero-ohm 0603 parts- so the asymmetric pads don't pull the resistor to one side when the solder is molten and look bad or maybe even tombstone.
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H: Are antennas specified for a certain frequency?
"LTE 868 MHz Antenna" Why does 868 MHz stand for? Are antennas specified for a certain frequency or is it necessary for something like input type? For example, I want to transmit a 40 MHz RF signal. Can I use an 868 MHz or 2.4 GHz antenna to transmit? Or am I supposed to make an antenna specified for that frequency band? What might happen if I use an 868 MHz antenna on a 2.4 GHz compatible device like a WiFi router? Lack of performance? Not working?
AI: It's not so much that antennas are specified at certain frequencies (they usually are), but that they tend to work best over certain frequency ranges, determined by their physical shape and the materials they're made of. But -- it's complicated. People can spend entire engineering careers doing nothing but designing antennas.
"LTE 868 MHz Antenna" Why does 868 MHz stand for? Are antennas specified for a certain frequency or is it necessary for something like input type?
"Specified" means someone is promising something. A given antenna will tend to actually work for some range of frequencies.
To work well, an antenna must work over the range of frequencies that the equipment it's connected to must work (i.e., if you're only going to transmit Morse code at only 11MHz, then you can have a really narrow band antenna -- but if you're going to receive any signal between 50MHz and 200MHz without changing the antenna dimensions, or if you have a signal that actually spans that range, then you need a very broad band antenna).
For example, I want to transmit a 40mhz RF signal. Can I use an 868MHz or 2.4GHz antenna to transmit?
Well, you can, in much the same way that you can use a knitting needle or a wheel off of a car for the same task. But it probably won't work out well.
Or am I supposed to make an antenna specified for that frequency band?
"Supposed" and "specified" presumes that there's some Physics Police out there who will arrest you or hand you demerits for getting it wrong. I have no clue what people expect you to do -- but a given antenna will work best at a given frequency, and if you're designing a system then you generally need to design the antenna to match, or obtain one that's going to (usually by design) work the way you wish it to.
What might happen if I use an 868 MHz antenna on a 2.4GHz compatible device like a wifi router? Lack of performance? Not working?
In the case of a consumer-grade WiFi router, probably degraded performance, perhaps to the point of not working unless you're inches away. You probably wouldn't damage it if it has external antenna connections, because a responsibly-designed consumer device will embrace the possibility that someone is doing something dumb with it.
In the case of a professional device that's intended for 2.4GHz and that includes a transmitter (or a really crappy consumer device) the mismatch between the antenna and the transmitter may damage the transmitter, the receiver section (if there) and possibly whatever circuit switches between receive and transmit. The difference here is that a professional device presupposes a professional doing the installation. Most modern RF devices will have some sort of protection, but the more "pro" it gets the more "pro" you are expected to be.
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H: Should a 5V wall adapter output 150V pk-pk AC relative to earth?
I've recently bought a wall adapter off amazon which claims to be able to output 5V @ 2A. I tested this adapter by connecting a probe to the +5V output, and WOW! My scope shows a 150V Pk-pk 60 Hz... RC-like curve. In this case I connected the ground to earth, to make sure that I don't damage the scope. You can see this below, Yellow = input 1 (GND), Green = input 2 (+5V), pink = math (Yellow - Green)
My question is: Is this normal to see, and is this safe? I'm not sure that I should even be using a power supply that can output 106VAC... Can I hook up my probe ground to the output of one of these circuits?
AI: Many small "offline" power supplies resemble the partial schematic below.
simulate this circuit – Schematic created using CircuitLab
Power comes from the mains supply, passes through an EMI filter (omitted from the schematic), and is then rectified and smoothed. The output of the rectifier/smoother section is a high voltage DC bus. The positive and negative lines of this high voltage DC bus are fed into a DC-DC converter, the details of which are omitted from this schematic.
Note that the mains Neutral wire is connected to the Protected Earth (at the building's main circuit breaker panel). This protected earth is represented in this schematic as the ground symbol. Other schematics may have the ground symbol placed elsewhere, such as at the negative rail of the High Voltage DC Bus, or at the negative output of the DC-DC converter (not shown here). Do not be confused by where the ground symbol is placed, for it makes no difference to the actual functioning of the circuit. In this schematic the ground symbol is attached to the protective earth because we are interested in voltages relative to the ground wire of a building, or to conductive objects, such as pipes in a building, that have an electrical path to the ground.
The following graph shows the differential mode and common mode voltages of the high voltage DC bus. The differential mode voltage is just the voltage difference between the positive and negative rails of the high-voltage DC bus. The common mode voltage is the average of the voltages of the two rails relative to ground.
As one can see, the differential mode voltage is approximately the peak mains voltage with some ripple in it. The common mode voltage is a sine wave with a voltage of 1/2 the mains voltage. It is this common mode voltage on the high voltage DC bus that is the root source of the high voltage that may be observed between ground (i.e. mains ground) and the outputs of the power supply. Again, don't be confused by the fact that negative output of the power supply might be "identified" as ground in some schematics and in some contexts. We are talking about mains ground here).
If the inputs to the DC-DC converter were galvanically connected to the outputs, the explanation of the high voltage AC measured at the output of the power supply would be complete simply by referring to the common mode voltage of the high voltage DC bus. However, the internals of the DC-DC converter typically contain a "flyback transformer" which galvanically isolates the high voltage DC bus from the power supply output. That is, the power supply output is theoretically "floating" with respect to the high voltage DC bus and to the mains ground.
Here is the schematic for a typical 5V wall adapter illustrating the use of a flyback transformer.
(circuit found in the EE Times article Power Tip 52: Making over the wall wart)
Although the secondary side of the flyback transformer is floating relative to primary side, the transformer has inter-winding capacitance. In the absence of some stronger effect, the inter-winding capacitance will cause the common mode voltage from the high voltage DC bus to appear as a common mode voltage on the power supply outputs. That is what you are measuring. (Remember that the common mode voltage of the DC bus is actually AC! So, it can pass across a capacitor).
However, the inter-winding capacitance is small, meaning that it's impedance is very high. The voltage can be measured with an AC volt-meter, or with an oscilloscope. That is because the input impedances of these instruments are high. However, if a low impedance path is connected between the power supply's negative rail and mains ground, the voltage between them will drop dramatically. A high voltage through a very high impedance, like in this case, is called a ghost voltage or a phantom voltage. It is measurable, but "disappears" when connected to a "practical" circuit. It is therefore not a danger to you. Furthermore, ghost/phantom voltages generally cannot produce enough current within your body to be felt. That is, they don't have noticeable "touch" current.
Not all power supplies are like that, however. Yours is a 5V wall adapter, and I have been writing specifically about such an adapter. Generally, such adapters have too little power to require a particular and significant filtering step that changes the analysis. Larger power supplies, and by that I mean only slightly larger, often have problems with electromagnetic interference. Particularly noise that is conducted back from the DC-DC converter back into the mains wiring. To mitigate this problem in some power supplies lacking a ground connection, a "Y" capacitor is added across the flyback transformer. The capacitance of this Y capacitor is larger than the inter-winding capacitance, so the two sides of the transformer are linked by a lesser impedance. The voltage is in this case not "phantom" or "ghostly" but "real". In fact, in some cases, significant "touch current" can be developed, as in the case of the power supply discussed in this question, where the OP experienced a shock from his laptop computer charger.
(Schematic taken from this answer)
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H: For below circuit, the simulation result is not matching with theoretical prediction
Please note that i1(t) is the loop current (in loop analysis method) and not the inductor current.
The answer to above problem is option B, which is derived below
Following principles are used:
Capacitor acts as an open circuit under DC steady state.
Inductor acts as a short circuit under DC steady state.
Capacitor volatge and inductor current cannot change instantaneously.
When I tried the simulation, it seems V(C1) (V(1,2) in the snap) is settling to input volatge and V(C2) (V(3) in the snap) remain as zero.
I realize this is also a stable steady state solution.
My doubts are:
Looks like there are 2 stable solutions for this circuit.
V(C1) = input voltage, V(C2) =0
V(C1) =V(C2) = half of input voltage
What is the exact condition which determines which solution the circuit will eventually settle to?
In the simulation result, I see the capacitor voltage rising instantaneously. Not sure how is it possible. (Note: Initial voltage is set to zero). Looks like some simulation basics I am not aware of.
AI: At \$ t=0^- \$ right before the switch opens, we're at DC steady state, so inductors are shorts and caps are open. The top capacitor has charged to voltage V, which means no current flows in the battery. The right cap is shorted by the inductor, so it is charged to 0V.
There can not be an instantaneous change in current in an inductor. So, at \$ t=0^+ \$ right after the switch opens, both capacitor voltages and inductor currents are the same as previously.
This means i1 (inductor current) is 0 at \$ t=0^+ \$.
For i2 we have a loop formed by two caps, one charged to V and the other to 0V, and two resistors R. Current flows in the opposite direction relative to the i2 arrow drawn on the schematic, so i2=-V/2R.
As time passes, inductor current and capacitor voltages will change, so this is only valid at this precise time of course.
Looks like there are 2 stable solutions for this circuit.
V( C1) = input volatge , V(C2) =0
V(C1) =V(C2) = half of input voltage
The second one is not possible because the inductor will short the right side of C1 to ground. So after the oscillations have settled, there is no voltage on C2.
In the simulation result, I see the capacitor voltage rising instantaneously. Not sure how is it possible. (Note: Initial voltage is set to zero)
The sim will calculate the DC operating point of the circuit, which as expected has the supply voltage across C1. So it starts at 10V. It'll just ignore your ".ic" initial condition. If it has not ignored it, the graph would have started with 0V across C1.
You say "I see the capacitor voltage rising instantaneously" but I don't see that on the plot. I just see it starting at 10V. I guess you think it rises instantaneously because you set ".ic"...
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H: How do MOSFETs in 300-500A ESCs handle the current?
I’m trying to build an elecyronic speed control (ESC) for a boat that requires a massive amount of continuous current flow. I’m trying to also design the ESC my self.
I need to supply 50 V and 300 A to the motor continuously,but when researching MOSFETs, I can’t seem to find any that can handle anything close to that load. Yet I see 50 V 300 A ESCs on the market.
How do they do it?
Do they wire multiple MOSFETs in parallel? Do they use massive capacitor banks? Do they just have massive MOSFETs? I’m slowly figuring this out, I just need some clarification on how those massive ESCs supply that amount of power.
AI: Well, MOSFETs have a special property (you can't do that with BJTs). You can parallel them. It's not unusual to see 5-10 or more MOSFETs in parallel for each branch of the bridges.
However there are still some issues:
You need to somehow carry all of that current, which usually means custom laminated busbar;
You need to keep the MOSFETs cool, if you look at the datasheet they are often specified with the case at 25°C. Good luck with that
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H: Do gate level simulations have any utilitly in the current highly complex digital circuit designs?
Gate level simulation involves taking a netlist and annotating it with the delay information from a layout of the circuit. This information can be obtained after the floorplan and layout of circuit has been completed.
Electronic circuits today can be millions and millions of logic gates. They shall be implementing highly complex functions and even be implementing some complex features for power reduction and routing through complex network on chips. For something of this nature, a gate level simulation will run extremely slowly.
Taking into consideration the fact that functional verification is completed and timing closure is achieved, is there any benefit to carrying out a gate level simulation since it will require a lot of time and effort to make it work? I assume that no one carries it out anymore due to little value added, but I could be wrong.
AI: If you are doing an FPGA design I think that timing closure would be enough.
When you are doing custom silicon however I think the manufacturing and NRE costs justify doing a full gate level simulation even if it takes a week to complete.
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H: What is the MCU-Pinmode equivalent of a button-press to ground in this scenario?
The more I think about it the more I confuse myself... In the attached circuit if I want to simulate the effect of SW1 (or SW2) closing to ground how do I set the MCU-pin? Connect to Terminal 2 of the SW to one MCU-pin, and via Pinmode-set to INPUT for high impedance when the SW is OPEN? And then DigitalWrite-LOW while in INPUT (for low impedance) to CLOSE the SW? Or I need to change Pinmode to OUTPUT and then LOW (for low impedance) to close the SW?
I think I got the NPN transistor "switch": connect Base to a pin and set Pinmode-OUTPUT-HIGH if I want the transistor to conduct to E from C. And then set to Pinmode INPUT (no pullup) for high impedance to stop it from conducting.
AI: Yes for simulating a button you must have a low output to ground it or high-impedance input (no pull-up or pull-down) to let the pin float.
For driving the transistor, you can just have an output that is set low or high. No need to change it to a floating input.
However the VIN must never exceed the MCU supply voltage, if SW is connected to MCU IO pin.
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H: Microchip CanBus Bootloader J1939 - Multiple devices programmed in parallel
Bonjour,
I have a project where I need a canbus bootloader. The device will be wired on a J1939 bus.
Multiple of my devices can be on the same bus.
Now Microchip gives an application note (AN247) but apparently there were problems with it and it was discontinued.
Now they point to the AN851 but it's an UART bootloader so I guess it needs to be modified.
Does anyone has experience with the AN247 or AN851 regarding CanBus bootloader ?
Is there a "ready made" bootloader usable with a little software to program it ?
Thank you
AI: Running a bootloader while other, powered devices are present on the J1939 bus means that your bootloader has to be implemented according to J1939 standards, not after some generic Microchip application note about low-level CAN frames.
Otherwise, you'll have to invent a programming mode where your node is disconnected from the rest of the bus during programming. For example this can be done in hardware by routing the tx/rx signals to a different transceiver, through an analog switch, whenever a button is pressed.
Or if you are certain that nothing in J1939 will collide with your bootloader, maybe just disconnect the node from the J1939 bus during updates. If you are lucky, your bootloader can even co-exist with J1939 if you only use 11 bit identifiers, but that's assuming no other node will go nuts upon receiving such frames.
As for implementing the bootloader, if Microchip provides no code for it, for the specific MCU, or in case there isn't any hardware support on-chip for CAN bootloaders, you have to write it yourself. CAN is as it would happen, far more suitable than UART, since it's more rugged and you get CRC checks free of charge.
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H: Flyback converter small-signal model
I am currently designing a flyback converter and I am interested in measuring the stability of the converter (with a Bode plot). I will try to connect an isolation transformer on the feedback loop that inject a small AC signal and measure the transfer function with an FRA.
However, I'd like to compare my measurements to a simulation model.
In order to do that, the idea is to make a small-signal model of my converter on LTSpice.
I have seen on internet different models of a flyback converter, but
My questions related to this subject are:
Is it possible to model the whole flyback converter, including the IC controller? Does one has to do each model of each controller or is there a pole/zero/delay/... equivalent?
Are stability models created in the industry of the IC controller usually does the job (integrated compensation, protections,...)?
A TL431 is often used for FB + optocoupler. I have seen equivalent models with poles, how about the model of a chip with integrated feedback like the Innoswitch family?
The book of Christophe Basso seems to cover this subject, has anyone successfully made a model based on his book?
Thanks a lot for your advices.
Regards.
AI: The answer given by Antonio51 is good and uses the auto-toggling CCM-DCM model built on the PWM switch in 2005. This is great to determine the small-signal response of many switching circuits and not only a flyback converter of course. What is cool is that the subcircuit determines the operating mode itself and works for ac but also dc and TRAN large-signal analyses. The model has been ported to LTspice in many different flavors and I posted a few on my webpage.
Let me add another option for determining this transfer function. In the example documented by Antonio51, this is an averaged model in which the switching component has purposely been neglected as we are interested by the average component values. So if you want to analyze a circuit, you first need to identify the averaged model configuration and then run a separated ac analyses with confirmation that all bias points between the switching and the averaged version are identical (or very close) to confirm the circuit and validate the ac results. Depending on the circuit, the exercise can be long - but nothing insurmountable though - and some structures such as resonant converters don't have an averaged model. This is because energy is conveyed by the switching fundamental and its harmonic that we purposely ignored in an averaged model.
In this case, one cool thing is to resort to a piece-wise linear (PWL) simulation engine such as PSIM or SIMPLIS. These programs let you extract the ac response from a switching circuit of any kind, without resorting to an averaged model. For your information, LTspice also does offer this possibility with a built-in frequency-response analyzer (FRA) but I don't think SPICE lends itself well to doing this type of exercise swiftly. Look at the below isolated current-mode flyback converter implementing a TL431:
This a circuit excerpted from the free 60+ ready-to-simulate simulation templates I posted with the release of my last book covering the determination of transfer functions for switching converters. These platforms are described here, from my webpage. And what is interesting is that most of these templates work with the free SIMPLIS demo version. If you press the start button, then you'll have the switching operating point and the ac responses in few seconds:
You will need to model your PWM controller internals to reproduce the feedback path and account for division, filters etc. Here, nothing complicated beside a divide-by-three block and a clamp. You ignore all protections as they are silent in normal operation. You can also add delays if you deal with fast dc-dc converters but for a flyback converter, as you limit crossover because of the RHP zero, propagation delays can be ignored safely for loop analysis I would say.
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H: EMC pre-compliance test in the lab
I would like to test the EMI performance of our product in our lab. I have access to a small shield box, a spectrum analyzer.
Should I test the device inside the shield box to isolate external noise?
If I test the test outside the shield box, how should I factor out the ambient noise?
What kind of antenna should I use? I would like to test the device EMI performance over a range of 30 MHz up to 1 GHz.
AI: Forget about the box. What you need is near field probes and a optionally log-periodic type antenna.
You will always be able to tell if noise is from your EUT or from external just by switching your EUT off and compare measurements to EUT powered on.
The logper antenna can be used broadband from 100 MHz to 1GHz and it is very directional (~ 6-10 dBi) So if you aim at your EUT, it will not pick up too much noise from outside. Distance should be >50cm (far field) and <2m (because of reflections of the walls).
But you could also just measure the cable emissions, because almost always any RF emitted by EUT can be measured on the connected cables.
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H: Is it true that for asynchronous clock domain crossing, there is always a small chance that data will be lost or corrupted?
There are several techniques that can be used to transfer data between two asynchronous clock domains. For a few bits, and depending on direction of data between the two clock domains, one could use register chain for slow -> fast domain and use pulse stretching for fast -> slow. It is also possible to use handshake mechanisms I believe. Also, for large number of bits, it will have to be use of clock crossing FIFO. I am not aware of any other techniques actually.
Is it true that while we can move data into the other clock domain but there will always be a small chance that the data will not be transferred accurately? This means that there will always be a very small chance that the receiver end of data will actually get corrupted data. It is possible to take steps to reduce the likelyhood of such an event but it can never be prevented completely. Is that true?
AI: No.
If you move one bit into the other domain, and that bit is sufficiently slow (compared to both clock rates) then there is a chance that its value will be "incorrect" or unresolved for ONE clock cycle - e.g. due to the bit change hitting the tiny metastability window,
However even in that case, the NEXT clock will be a whole clock period away from the metastability window and thus guaranteed.
So you design the CDC with this limitation in mind. If the above bit is your "data available" handshaking signal, you can guarantee that by the second clock, the actual data has been stable for plenty of time.
Now if your data rate is comparable with the slower of the clockrates it gets more complex, and FIFOs are your friend. (which just means, Peter Alfke did the difficult bit for you in the 1990s!) But there is no reason you have to live with uncertainty in the data path.
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H: Why isn't my application of KVL working here
Firstly, please note that this is a high school level, physics question, but as this is related to circuits, I feel this is a better place for such a question than PSE.
The image is from byjus and first appeared in jee mains 2020.
The question is to find the approximate current via the 10 V battery along with the direction.
My attempt - Let the flow be clockwise in the left hand part and anti-clockwise in the right hand part.
Let the current flowing via the left hand part be i1 and the flow via part 2 be i2.
then -20=-5i1-10(i1+i2)-2i1
and -10=-10(i1+i2)-4i2
So we get the required answer in magnitude but not in direction.
Why is my answer wrong?
Instead are the correct equations as follows?
20=-5i1-10(i1+i2)-2i1
and 10=-10(i1+i2)-4i2
Please let me know if this isn't an appropriate place for such an elementary question.
AI: Let the flow be clockwise in the left hand part and anti-clockwise in
the right hand part
Like this: -
Hence, \$20 = 5\cdot I_1 + 10\cdot(I_1+I_2) + 2\cdot I_1\$
And, \$10 = 10\cdot (I_1+I_2) + 4\cdot I_2\$
It looks like you may have stated or believed incorrectly what the current directions were.
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H: What is the correct unit to specify throughput of an RTL block?
There does not seem to be an agreed way to calculate throughput for digital circuit design which is confusing. I am talking about front end design i.e RTL coding. The data rate can be represented as number of bits per clock cycle after an initial latency for pipelined design, or number of bits per second e.g data rate of a serial port.
The difference between the two approaches is that one of these relies on a clock frequency while the other does not. And the thing about clock frequency is that the fmax may be limited by some other part of the system and not the one RTL block of interest that we are designing.
So, this brings me to the question. What is the "correct & standard" way that an FPGA/RTL designer would specify or calculate data throughput?
AI: There is no single answer.
For practical purposes designing a block, bits per clock is most useful because it's technology independent.
Actual performance will then depend on the speed grade of the physical device, which has to be negotiated with the purchasing department.
So I normally use throughput per clock cycle for a technology-independent design, with a representative expected clock speed for a representative device.
But a system specification must be in throughput per second.
Then implementing a design to meet that system specification using a block, the above figures determine how many times you need to instantiate the block, and the clock speed you can get from synthesis/PAR effort settings, and the speed grades of the FPGA you can afford.
That's just an optimisation problem.
If some other block is limiting the clock rate, then you can either
improve your block's throughput per clock (most trivially by instantiating 2 of them. Saves engineering cost at the expense of FPGA area cost)
or doubling your clock (synchronous clocks DO NOT have to impose metastability issues and most toolchains handle the crossings correctly and warn you if they can't)
or re-pipelining the other block.
But if you can't hit your targets (first, achievability - then, price) you need a better block - perhaps simply a better pipelined version of the same block.
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H: What is the function of varistor in this design
Came across this on internet. The description mentioned this module help prevent relay stick to the contact. Please explain why varistor need to be included in the design if it is to connect in parallel to relay contact.
AI: If you are driving an inductive load, and abruptly stopping current through it by opening relay contacts, the induced back-EMF voltage which happens due to the collapsing magnetic field is in theory infinite. The capacitor has a maximum voltage limit, and so does the resistor. So to protect the RC snubber, a TVS is used to clamp excess voltage not handled by the RC snubber network.
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H: Is there a good way to insulate the backplate of a 7915 voltage regulator?
Didn't realise this when I purchased it, but apparently voltage regulators come in two different housings:
I.e. one that has a metal backplate connected to the input pin and one with a non-conductive backplate. The cooler to which I was planning to attach it, is grounded meaning I would short the input pin to ground.
Any good way to avoid the short (other than biting the bullet and waiting for a new one to be delivered)?
AI: Here's how.
The insulator between the device and the heat sink is a mica shim and that between the device and the screw is an insulating bushing.
Image credit: Infineon.com
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H: Help identifying possible faulty transformer
I am trying to identify this component removed from a Mean Well PB-120N-27C charger.
In this picture I see two pins (bottom left) connected to two small wires. They are shorted. Same thing for the other side. Could it be a broken internal fuse?
Do you have any suggestion to what I should read from the other pins?
AI: There is nothing to identify. It is a custom transformer for the charger and likely it is not even broken.
The charger has a switching mode power supply and this is the main switching transformer. It does not work at 50 Hz but at maybe tens of kilohertz. The 230VAC mains input is rectified to 325 VDC raw supply which is then driven to the transformer by a swiching mode controller chip.
There are several typical modes of failure. Since there is 320VDC preset on board, it has not blown a fuse, so it is not completely burnt up. One of the simplest failure modes is just a broken bootstrap resistor, so the switch mode chip won't get initial power supply and stays off.
As you already removed the transformer, it may have been damaged in the process, so it may not be worth to put it back and fix what is actually broken.
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H: For a switching boost regulator, will putting the inductor on the bottom side of the PCB cause issues?
I'm working on a 6-layer PCB with dual-side component placement. To help assembly, I'd like to keep all of the "large" components on the bottom side of the board. One of those large components is the inductor for a switching boost regulator.
Normally I'd follow standard SMPS layout guidelines (e.g. https://www.analog.com/media/en/technical-documentation/application-notes/an136f.pdf). Typically vias in the power path should be avoided due to the increase in inductance... but for the inductor, does this matter?
All other components (IC, passives) would be on the top side of the board, arranged to minimize loops.
Why do I not see layouts with the large inductor on the opposite side of the board more often?
AI: For switching regulators, loop area is usually the prime concern.
Loops are not only in the XY plane, but are also in the Z axis as well. So, sometimes, you can get a smaller overall loop by placing components on the backside of the board and use multiple vias to connect them (as you have surmised). Via inductance isn't really an issue if you put multiples of them in a grid. If you put 6 or more vias on each leg of the inductor, you'll have negligible inductance from them.
If you are concerned about what the actual inductance is, recall that they add like resistors. So in parallel they divide. Assuming that all the vias are the same size, 6 of them in a small grid would divide their effective inductance by 6.
How do you calculate the inductance of one?
$$L=5.08\cdot h \left[\ln\left(\frac{2h}{r}\right)+1\right],$$
Where:
\$L\$ is the via inductance in nH (nano Henries)
\$r\$ is the radius of the via in inches
\$h\$ is the length of the via (board thickness for a simple via) in inches
Why do I not see layouts with the large inductor on the opposite side of the board more often?
Mostly because it's cheaper to have all the components placed on one side of the board.
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H: Shorting the USBLC6 ESD protection pins
I am using USBLC6 IC to USB pins for ESD protection. In the diagram in the datasheet, I see that pins 1-6 and 3-4 are shorting. I also want to shorting these pins on the PCB so that the circuit works without using this USBLC6.
However, in the example pcb layout image on page 11 of the datasheet, these pins are not shorting.
Will shorting these pins on the pcb have any effect on ESD protection?
AI: Yes, that strategy will negatively affect ESD protection.
The equivalent pspice model shows this:
There is an impedance on both sides of the data lines (likely caused by the package leads and bonding wires) which will serve to help the Dlow / Dhigh diodes to shunt unwanted current.
As to how much it will affect your protection, that is another question entirely. What is your purpose for installing the component? Your USB communication will work without it under most conditions for hobbyist or prototype use.
Is this a consumer product? Is there a situation where you would not want to install it when you are manufacturing in quantity?
For those prototyping, I have typically used a solder bridge to connect the data lines, in situations where I have not needed or wanted this protection device. The footprint remains on the board and gets populated during manufacturing.
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H: Does it make a difference if I use 8MHz or 16MHz crystal for PIC18F47J53
I'm using a PIC18F47J53 in a project. Because I need to use Full-Speed USB 2.0, I can't use the internal 8MHz oscillator because it's not stable enough (*). Although Microchip has a lot of interesting application notes on Oscillator design (FACT001, AN849, AN949), I found a good Application report from Texas Instruments (SLLA122 - December 2002) which helps choosing the right components, including the XTAL.
Selection and Specification of Crystals
for Texas Instruments USB 2.0 Devices
To summarize the crystal specifications:
Mode of operation: fundamental
Crystal circuit type: parallel resonant
Frequency Tolerance: ±50 ppm (maximum: ±100 ppm)
Frequency Stability: ±50 ppm (maximum: ±100 ppm)
Aging (Long Term Stability): ±5 ppm per year
Maximum Equivalent Series Resistance: 50 Ω (100 Ω, if CL1 and CL2 <10 pF)
With this information, I could easily find the XTAL to use in my project.
But I have 1 question:
Is there a difference when I use a 8MHz or 16MHz XTAL? If you look at the PIC18F47J53 FAMILY CLOCK DIAGRAM, you can use both to drive the PLL Prescaler which at the end generates a 48MHz signal, that is then used for the Full-Speed USB Module and can also directly be used as CPU primary clock source.
Is there any reason why I should prefer 8MHz or 16MHz? As both can create the same result. I could easily find a XTAL of both frequencies that comply with the specifications above. Or is the price difference of 0.08 EUR (0.27 EUR for 8MHz, 0.35 EUR for 16MHz) the only reason to choose one or the other?
(*) Remark: I used the PIC18F45K50 before, which does support Full-Speed USB while using the internal oscillator. This is possible because 1) it has a 16MHz internal oscillator, and 2) because it has an Active Clock Tuning (ACT) Module, which can use the Full-Speed USB signal as reference. Unfortunately, due to the worldwide chip shortage, the PIC18F45K50 is not available until somewhere in 2023. That's why I searched for an alternative that is immediately available with some suppliers, which is the PIC18f47J53.
AI: I don't think there is a lot of difference, all other things being equal. Both are more-or-less in the optimal range for inexpensive and widely available crystals.
Case size is probably a bigger variable than this particular 2:1 variation in resonant frequency.
I would use one that is already on another product's BOM if possible. Or if not, pick the one that is slightly cheaper.
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H: Can't upload firmware on ESP32-WROOM-32UE with CP2102N
I designed a custom ESP32 board with a CP2102N bridge (schematic attached). I'm using an ESP32-WROOM-32UE. My schematic is based on the ESP32-Devkitc-V4 board from Espressif (schematic attached). When I plug the board to my computer (with VCC connected to a 7.2V power supply), the CP2102N is correctly showing on the device manager. However, I didn't manage to upload any code to my ESP32. I tried with autostart (without pressing any button) and by using enable and boot button, but it is not working. The arduino IDE is displaying a serial data error. I heard that I should desolder the capacitor in parallel with the boot button (C6 100nF). Is this cap causing the issue or there is a schematic mistake ?
OS: Windows 10
Board: Custom (based on ESP32-Devkitc-V4 by Espressif)
IDE: Arduino
USB/UART Bridge: CP2102N-A02-GQFN24R
AI: The CP2102N VIO pin is not connected, so it is missing a supply voltage for IO pins and thus can't work.
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H: WiFi Module Heating Issue
I salvaged an RTL8188ETV WiFi from an old tablet,
I connected usb wires and used AMS1117 3.3V Regulator, it works fine for some time but heats up and looses connectivity, Regulator is tested to be fine including all connections, it heats up with or without stock antenna, tried with a small heatsink, still stops working after some time.
What could cause it to overheat? Am I supposed to limit current myself? I really need it to work as I wanna test DIY antennas on it.
AI: You should have minimum output capacitor of 22uF tantalum or 22uF ceramic + a few ohms in series near the regulator to ensure stability. If the regulator oscillates under some load conditions it could deliver more than 3.3V. An input capacitor of 10uF or 22uF near the regulator would also be a good idea.
If the input voltage to the regulator is coming from another power supply (not in the laptop), ensure that there is not a grounding issue.
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H: Do I need via shielding for the GPS antenna trace?
I'm working on a 4 layer board (signal, GND, PWR, signal). I have a NEO-M8P GPS module and the Hardware integration manual says to connect the antenna with a 50 ohms impedance trace to the connector which I did. I've also been reading and watching videos for best practices routing the 4 layer board and I came across "Via Stitching & Via Shielding". There are lots on info about these two subjects. The picture below shows the trace from the GPS antenna pin (U1 pin 11) to the connector (J7). The trace to the side is an inductor needed for active antenna support (Figure 8 in the Hardware integration manual). There is an MCU in the middle of the PCB and a few sensors around it. There is really nothing high speed. The GPS parts are on the edge of the PCB. I'm wondering if I need to add Via Shielding to the GPS antenna trace?
AI: Adding via stitching as shown in the Altium article makes that a coplanar waveguide which will alter the impedance of the trace unless you make the necessary corrections. Doing so creates issues in maintaining impedance when you consider the physical interference from the inductor. If you're worried about interference, you can shorten up the antenna trace quite a bit or add a shield around the sensitive area as done in many designs.
What would help is moving the inductor so the inductor pad is directly over the GPS antenna trace. This minimizes the stub caused by the trace to the inductor which causes an impedance bump. You may want to move C1 which allows shortening of the antenna trace.
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H: Determining Headers and Connectors
I'm doing my first non-kit electronics project for computer controlled fans for my electronics closet. The person who posted the project said to use JST headers. There are two four pin connectors for two Corsair LM120 fans. There doesn't appear to be a data sheet for the fans so I looked into motherboard fan connectors and found that a Molex 0470531000 is used. I'm going to build the project on a solder breadboard (meaning one where you solder the components to a breadboard like layout in case my terminology is incorrect). Given that the pitch is 2.54mm, I'm in business. The closest JST connector I could find is 2.5mm, which I've read may not work for four pins at 2.54mm, a 120 micron difference.
The other component that will be off board and connected by a cable is the HiLetgo DHT11 Temperature Humidity Sensor Module. The data sheet for the sensor gives 2.54mm pitch. I'm assuming it's the same for the board in that it easily plugs into the connector from the Corsair fan. I've found a 3 pin header on digikey.com that looks to be correct. The page links to a connector: Molex 0022012031. It doesn't look to have pins and there is a link on the page to these pins: Molex 0008510108.
Is this how one goes about building these types of connections? I have a crimp tool and don't mind making them up. The cable has to be three or four feet long so I don't imagine I could find a stock one. Is there an easier way to do this? I've searched on the web for Molex connector kits. None looked to be the for this type. Is it typical to build connection by ordering all the individual parts or is there a more generalized approach?
AI: There are many things to consider when selecting a connector such as physical size, current capacity, voltage rating, number of insertion cycles, cable retention, mounting method... to name a few.
From your description, you need a 2.54mm (100mil), through-hole connector. You didn't list your current or voltage specs and it's up to you if you want a locking ramp, polarization, etc. However, this is an extremely common connector and many manufacturers, including JST and Molex, will make one that suits your needs.
You are correct that you need the board header (thing that solders into the board), metal contacts (thing you crimp onto the wire), and connector housing (piece of plastic that holds the contacts). Assuming it fits your other requirements, the Molex KK254 series should work. Take a look at their website for a better view of the connector and their recommended mating parts.
Molex KK254 Series
With regards to your selections, it looks like you selected a 3-pin housing and a 4-pin header. You can either buy the contacts and crimp them onto wire yourself or buy pre-crimped wires and splice them with your cable of choice.
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H: Is it safe to discharge li ion below 2.5v?
I accidentally discharged my samsung inr18650 25r, 20A battery to 1.5V. Is it permanently damaged? I quickly charged it back to 3.7v using 0.5-1A charger but I'm not able to figure out if there is a significant damage to cell or not.
AI: Li-ion cells usually work in the range of 4.2V (while charging) to 3V (fully discharged). This voltage range MIGHT differ depending on the manufacturer and their cell chemistry. But this is a general data.
As for your question, discharging the cell to 1.5V just once may not have damaged your battery to the full extent. However, I am pretty sure the State of Health of the cell would have been considerably reduced.
To make myself clear, consider the figure below. When you discharged your cell to 1.5V, the inactive region (in Red) would have increased. This means that your cell can retain energy after a full recharge only for lesser amount of time than it was originally designed for.
And figuring out the damage done to your cell might not be very easy. To get a ballpark estimate, you could recharge it to 100% and see how long it lasts for. Then, compare it with the duration you used to get before the incident occured.
You can also notice if there is excessive temperature being generated when the cell is being used or recharged. This is usually a good indicator that the Internal Resistance of a cell has increased, which usually happens due to a damage to the cell chemistry
Hope it answers your question. If you found it helpful, kindly upvote or accept the answer with a tick mark. ^^
References:
Image courtesy: Battery University, https://batteryuniversity.com/article/bu-908-battery-management-system-bms.
Some Battery Basics: https://batteryuniversity.com/article/bu-105-battery-definitions-and-what-they-mean
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H: Why does adding "& 1" to an assign statement produce a completely different synthesis?
I am trying to implement a one-bit full adder in Verilog. Here's my original code:
module add1 ( input a, input b, input cin, output sum, output cout );
assign sum = (a + b + cin) & 1;
assign cout = ((a + b + cin) >> 1); // no "& 1" at the end
endmodule
This produces the following synthesis:
As apparent from the image, cout is directly connected to 0. However, adding an "& 1" at the end of the assign statement:
assign cout = ((a + b + cin) >> 1) & 1;
produces the correct synthesis.
I am very new to Verilog so I am wondering what's going on.
AI: The unique thing about Verilog compared to other programming languages is the concept of operand width and the context of operands and operators with different widths. The widths of certain operands get extended before applying the operators.
When you have a simple expression
L >> R
The width of result that expression is just the width of L. The width of R has no part in the width of the result and is not part of the expression context. If L is the expression a+b+cin, and all those signals are single bits, the the result of that operations in a single bit. Shifting a single bit right by any number of places results in single bit 0 value.
When you append & 1 to the expression, that is the same as appending & 32'sd1 which is a 32-bit signed decimal 1. Verilog will extend all operands in the context of the expression to 32-bits; so now the result of the addition is also 32-bits. The following would also give you the correct result:
assign cout = ((a + b + cin) >> 1) & 1;
assign cout = ((a + b + cin) >> 1) + 0;
assign cout = ((a + b + cin) >> 1) + 2'b00;
assign cout = ((a + b + cin + 0) >> 1);
But a better way of writing this is
assign {cout, sum} = a + b + cin;
Section 11.6.1 Rules for expression bit lengths in the IEEE 1800-2017 SystemVerilog LRM explains this in more detail for all operators.
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