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H: Question about fingering
I have designed a circuit in Cadence Virtuoso. As a first step, I used all the transistors without fingers (i.e. each transistor is a single transistor).
Once the circuit satisfied all the requirements I wanted (dc gain, location of the poles, slew rate and so on) I decided to use fingers for each transistor in order to realize the stick diagram. To my astonishment, after using fingers, the dc analysis was completely different with respect to the original circuit: the dc voltages at each node were considerably different with respect to the original circuit.
Question: I know that fingering is used to reduce parasitic capacitances. Anyway, since a capacitor is an open circuit in dc, theoretically nothing should change as far as regards the dc analysis. Why then did Cadence give completely different results in dc when I converted my original circuit into the "fingered" version?
Here the circuit without fingers:
It is a two stages op-amp in open loop configuration (frequency compensation network has been omitted). If now I put 9 fingers for PM21, I get the following dc result:
As you can see, the output dc voltage has changed!
AI: When you change the number of fingers indeed, in first order, the DC solution should not change. If it does then maybe something is wrong.
Some design kits might take edge effects into account so that a 10/1, fingers = 1 doesn't behave exactly the same as a 10/1, fingers = 2.
Note that in some design kits, if you start with a:
W/L = 10/1 transistor with fingers = 1
then change
fingers = 2
the transistor might become 2 x 10/1 = 20/1, so twice as wide!
In such a design kit you would need to enter:
W/L = 5/1 transistor with fingers = 2
and that would then give you the 10/1 transistor with fold = 2 so effectively two 5/1 transistors in parallel and a shared source (or drain).
Pro tip1: when placing a new transistor, make fingers something different from the default 1 unless it's a very small transistor. For example, when I need a 100/0.5 transistor I would make fingers = 5 or 10.
Pro tip2: create a layout cell view and instanciate a 10/1 transistor there. Then copy it so you have two. Now change fingers = 2 on the copy. Compare the layouts, is this what you expected?
|
H: AD823 current sense
Refer the attached schematics.
Consider the details mentioned in it. I want to build the current sensing scheme using the part AD823 . enter link description here
I understand that offset correction could be done in the controlled interfaced to the ADC. But i want to understand from circuit perspective what i could do here to minimize various errors and get the best circuit performance ?
simulate this circuit – Schematic created using CircuitLab
AI: But i want to understand from circuit perspective what i could do here
to minimize various errors and get the best circuit performance ?
The first thing to take note of is the input common-mode voltage range and, for this device it is limited to 13 volts on a 15 volt rail. Typically it might be as high as 13.8 volts but, given that the +in node will see 13.63 volts, you might get into trouble if you built a few.
The input offset voltage can be as high as 3.5 mV (7 mV over the full temperature range) and given that your circuit implies a current of 1 amp flowing through a 1 milli ohm resistor, you are going to get massive errors.
Input bias and offset currents won't produce a significant error as far as I can tell.
Common mode errors might also be significant if the V1 voltage jumped around a bit. CMRR is guaranteed to be 66 dB and this translates to a shift in input offset of 0.5 mV for a change in V1 of 1 volt. Might be significant!
The accuracy of the resistors is fundamental to best performance for this type of circuit and, if you do the math (i.e. a tolerance analysis) you'll quickly see that performance/repeatability is poor with 1% resistors.
I recommend you simulate this last point by changing the resistors, 1 by 1, to create a tolerance error.
|
H: PMSM Rotor Design. Are these terms equivalent?
I'm working on a project with a PMSM. As I go through the literature I come across the following terms and wanted to make sure that I am getting right which ones are synonyms.
Surface-mounted PM = Non-salient pole rotor = Round Rotor = Cylindrical (in this case Inductances \$L_d\$ and \$L_q\$ are equal)
Interior Mounted PM = Buried PM = Salient pole rotor (in this case \$L_q \neq L_q\$)
Is that right?
AI: You are correct !
Burried magnet change the permitivity distribution inside the rotor. Thus depending on the arrangement of the magnets, asymetrising its direct and quadratic inductances.
Look at this post: Explanation of Lq, Ld and how it relates to motor inductance
And this paper (if you can): https://doi.org/10.1109/emobility.2010.5668074
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H: Instantiating module inside for loop
I'm trying to write Verilog code for converting any digit decimal number to a BCD number.
My logic: when I read decimal number, I'll extract the decimal number digit by digit, and I have written a module to convert the decimal digit (0 to 9) to BCD.
But, I'm getting an error in the line:
dec_to_bcd_0_to_9 a(temp2, bcd_num [(3*i)+(i-1):4*(i-1)]);
It is showing a syntax error in the Icarus Verilog simulator.
What is wrong in my code?
module dec_to_bcd_0_to_9(dec,bcd);
input integer dec;
output reg [3:0] bcd;
always@*
begin
case(dec)
1'd0:bcd=4'b0000;
1'd1:bcd=4'b0001;
1'd2:bcd=4'b0010;
1'd3:bcd=4'b0011;
1'd4:bcd=4'b0100;
1'd5:bcd=4'b0101;
1'd6:bcd=4'b0110;
1'd7:bcd=4'b0111;
1'd8:bcd=4'b1000;
default:bcd=4'b1001;
endcase
end
endmodule
module dec_to_bcd_any_number(dec_width,dec_num,bcd_num);
input integer dec_width,dec_num;
output [4*dec_width-1:0] bcd_num;
reg integer temp1,temp2;
assign temp1=dec_num/10;
assign temp2=dec_num%10;
generate
genvar i;
for(i=1;i<=dec_width;i=i+1)
begin
dec_to_bcd_0_to_9 a(temp2, bcd_num [(3*i)+(i-1):4*(i-1)]);
assign temp2=temp1%10;
assign temp1=temp1/10;
end
endgenerate
endmodule
AI: There are two problems.
First, you can't use integer as the type of an input port. In fact, iverilog seems to treat it as equivalent to reg, which means you can't use it in assign statements either. You need to replace it with a wire with an explicit width.
Second, the limits of a for loop need to be known at compile time, so you can't base it on an input port. dec_width must be a module parameter instead.
Also, there was a minor problem with declaring an explicit width of 1 bit for your case values.
Here's a version of your code that compiles cleanly with iverilog -tnull ...:
module dec_to_bcd_0_to_9 (dec, bcd);
input [31:0] dec;
output reg [3:0] bcd;
always @* begin
case (dec)
'd0: bcd = 4'b0000;
'd1: bcd = 4'b0001;
'd2: bcd = 4'b0010;
'd3: bcd = 4'b0011;
'd4: bcd = 4'b0100;
'd5: bcd = 4'b0101;
'd6: bcd = 4'b0110;
'd7: bcd = 4'b0111;
'd8: bcd = 4'b1000;
default: bcd = 4'b1001;
endcase
end
endmodule
module dec_to_bcd_any_number (dec_num, bcd_num);
parameter dec_width = 5;
input [31:0] dec_num;
output [4*dec_width-1:0] bcd_num;
wire [31:0] temp1, temp2;
assign temp1 = dec_num/10;
assign temp2 = dec_num%10;
generate
genvar i;
for (i = 1; i <= dec_width; i = i+1) begin
dec_to_bcd_0_to_9 a (temp2, bcd_num [(3*i)+(i-1):4*(i-1)]);
assign temp2 = temp1%10;
assign temp1 = temp1/10;
end
endgenerate
endmodule
|
H: Power devices max voltage, current, power, speed, etc. .. ratings
I want to know how to get the real world or the most recent or the reliable information about power devices max ratings in volt, ampere, power, speed .. etc., parameters.
I found this picture that is seem to be reasonable, but I'm also interested if there's a better source or table for similar comparison of power devices.
Any ideas for better sources about similar comparisons ? to get the real max ratings about power devices?
For example, the power transistors used in mobiles data/calls towers, they are I think working of a very high frequency speed which is in case of 4G is like 4GHz, am I right ? I'm not sure about my assumption. Or the ones used in the microwave oven magnetron frequency which is 2,450 MHz, I just got that from google. So why these max numbers aren't listed in the comparison in the picture?
AI: I think this table is pretty accurate (even if technologies have improved) when considering the parameters (first column). Here the PowerMOSFET depicted is 500V/200A rated, which make them completely different to an RF "power" mosfet.
When in doubt you can always go look online to electronic component resellers.
Here is a common "High Power" MOSFET 100V/300A turn-on 36ns / turn-off 86ns (7$)
This one has very similar characteristic to the example of your book (maybe a little faster and a smaller Rdson, but it is relatively close)
And here a "High Power" RF MOS 48V/72A ~1GHz (555$)
You can already see that obviously the manufacturing process to make the RF transistor very fast and linear is completely different (just by looking at its pricing)
Thus each one has a specific use case and your book table only shows one of the two (it might not consider RF "power" MOS to be power devices, since those are not used in motor control or common power conversion applications but as amplifiers in signal chains).
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H: Sensitivity analysis question
I am trying to figure out how to calculate the sensitivity of a circuit, especially the sensitivity of a damping ratio (how much the damping ratio changes as each component value varies).
Expression for zeta is quite long and complicated, so I prefer not to take partial derivative. I would like to do something like:
calculate the value of zeta when R = 100 ohms.
calculate the value of zeta when R = 101 ohms.
then divide the change in zeta by the change in R.
In this case, how would I normalize this sensitivity value (x/y part)?
AI: In this case your "y" is zeta and your "x" is R. So just subsitute the values in.
$$S_R^\zeta \approx \frac{R}{\zeta}\frac{\Delta \zeta}{\Delta R}$$
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H: Matlab code to determine and plot impulse response
I have a signal y[n], represented by the vector y in this form
y[n] =x[n] + ax[n−N]
About this signal:
x[n] is the uncorrupted speech signal which has been delayed by N samples and added back in with its amplitude decreased by a<1
N= 1000, and the echo amplitude,a= 0.5.
I need help with:
Determining and plotting the impulse response of the signal. Also I was hoping to store this impulse response in the vector for 0≤n≤1000
What I have and which does not work:
% Testing the input:
sound(y,8192)
% echotime,N= 1000, and
% the echo amplitude,a= 0.5.
N = 1000;
a = 0.5;
n = [0:1000]; %time vector
for i=0:1000
y(i)=x(i)+a*x(i+N)
end
stem(n,y) %output plot
This would give me an error lie:
Undefined function or variable 'x'.
Error in (line 15)
y(i)=x(i)+a*x(i+N)
AI: Determining and plotting the impulse response of the signal.
You are confusing signals and systems. Systems have impulse responses, signals don't. You can calculate the output signal of a linear time invariant system for any given input vy convolving the input signal with the impulse response of the system.
% create the impulse response
M = 1; % MATLAB indexing offset
N = 1000;
h = zeros(1001,1);
h(M+0) = 1;
h(M+1000) = 1;
stem(h);
|
H: When making power polygon , making polygon on the smd-pad has any problems?
I'm now making 4 layer PCB
and my PCB has one Power plane (L3) and one GND plane (L2).
Now I just make a connection with inner layer (L3) with Top plane(L1).
At this point, I'm curious that what is the best connection for supplying power.
In the picture, Left one is that making polygon on the component's smd pad.
and right one is that first I'm making polygon and routing wires to polygon.
I'm new to 4 layer PCB.
so I want to know what is the common way for this.
I use DC power and this is 3.7 to 4.2 voltage comes from Lithium Battery.
I hope many experts may help me.
Thank you for reading.
AI: Thermal reliefs (image 1) are better for manufacturability, as it minimizes the effect of the copper pour as a heat sink. If you have large traces coming off of an SMD pad, the heat will be wicked away more quickly and make it more difficult for the solder to melt. When done on SMD passive components (capacitors, resistors) and similarly-shaped devices, they tend to "tombstone", or stand up on end on the side without the pour:
Photo source: https://www.eurocircuits.com/blog/tips-tricks-why-do-components-tombstone/
Unless performance is a serious concern, I would strongly recommend using option #1 and keep the thermal reliefs.
|
H: How can I float a pin that otherwise should be low?
I want to enable/disable a TI TPS54302 buck regulator with a microcontroller. The enable (EN) pin should float to enable the device, or be tied low to disable it.
I currently have the EN pin connected to a GPIO pin on the MCU. At startup, before the pin state can be set low, it will sometimes already be floating, so the regulator operates for a brief time before the pin is intentionally set low.
I'd like to add an external pull-down resistor to ensure the regulator stays off until it is supposed to be on, but that would prevent floating the pin.
I presume I could simply pull the pin high (instead of floating it) and achieve the desired result. The TPS54302 datasheet says:
The EN pin has an internal pullup-current source which allows the user to float the EN pin to enable the device. If an application requires control of the EN pin, use open-drain or open-collector output logic to interface with the pin.
If I tie the EN pin to ground with a 10kΩ resistor, and pull the MCU pin high when I want the regulator to operate, is that a viable solution?
I'm not concerned about small (≥1mA) constant current usage as this is a line-powered device.
AI: Yes, you're fine with your approach. The EN pull up current is less than 2uA, so a 10K will allow you to remain below the threshold, and the microcontroller output will be able to pull it up to 5V (or at least greater than the threshold. Just stay below 7V on the enable pin and you'll be fine.)
As you pointed out an open drain output on your micro doesn't really solve the problem of keeping the device disabled while the uC boots up.
Note datasheet specs below:
[EDIT for more clarity:]
The reason for the recommendation for the open drain approach is that this part allows Vin up to 28V, but the EN pin is only rated to 7V abs max. So you can't pull the enable to Vin or drive it with an open collector with a pull-up tied to Vin. Nothing prohibits driving the pin from an open collector only, an open collector pulled up to (e.g.) 3.3V or 5V, or a push-pull output in the right voltage range. You don't HAVE to just float the pin or pull it low. Note the UVLO level modification circuit in the datasheet:
|
H: Is a line to ground fault always 3 times the zero sequence current?
I'm a little confused, I was provided the 3IO current and I was under the impression that is the bolted 3 phase current but now I am suspecting that it is 3 times Io which is the zero sequence current. My question here is, can I always assume that the single line to ground fault current 3 times the zero sequence current?
AI: For a symmetrical system we know that we can find the zero, forward, and negative sequence currents as follows [1, 2, 3]:
$$ \begin{bmatrix} I^0_a \\ I^1_a \\ I^2_a \end{bmatrix} = \frac{1}{3} \begin{bmatrix} 1 & 1 & 1 \\ 1 & a & a^2 \\ 1 & a^2 & a \end{bmatrix} \begin{bmatrix} I_a \\ I_b \\ I_c \end{bmatrix}$$
However, for a single line-to-ground fault we are assuming that all current flows through the faulted line which means our other two line currents are zero, therefore:
$$ I_b = I_c = 0 $$
Substituting the above into our matrix we can find that:
$$ \begin{bmatrix} I^0_a \\ I^1_a \\ I^2_a \end{bmatrix} = \frac{1}{3} \begin{bmatrix} 1 & 1 & 1 \\ 1 & a & a^2 \\ 1 & a^2 & a \end{bmatrix} \begin{bmatrix} I_a \\ 0 \\ 0 \end{bmatrix}$$
$$ I^0_a = I^1_a = I^2_a = \frac{1}{3}I_a$$
$$ \therefore I_a = 3I^0_a$$
Reference:
[1] H. Saadat, "Power System Analysis", 3rd ed., 2010, p. 460
[2] A. Amberg, and A. Rangel, "Tutorial on Symmetrical Components Part 1: Examples", 2013 [Online]. Available: https://selinc.com/api/download/100686/ [Accessed Oct. 2, 2019].
[3] A. Amberg, and A. Rangel, "Tutorial on Symmetrical Components Part 2: Answer Key", 2013 [Online]. Available: https://selinc.com/api/download/100688/ [Accessed Oct. 2, 2019].
|
H: What kind of 16-pin connector is this?
I was wondering if anyone knew what this type of connector is called.
One of the wires connected to this seems to have a tear, and I'd like to see if I can get a few of these connectors for future use.
The device that this connects to is a third party accessibility Xbox controller, which doesn't seem to be in production anymore. http://lpaccessibletechnologies.com/products/game-controllers/lp-pad
I've reached out to the company to see if they can offer me any support, so far nothing though. Was hoping someone on here might have some idea.
For extra detail, the contacts are more like blades than they are pins, and have a pitch of about 0.8mm/0.0315in
AI: it seems the connector is from Molex's HandyLink family of connectors. Thanks for the input!
|
H: 21v solar panel safety issues, and how to get a consistent 12v from it
We just bought a 50w 12v solar panel but it's actually getting 21v in full sun. Are there any safety issues we should take into consideration with this getting producing almost double what it's supposed to produce? And how can we get a consistent 12v from it?
Apologies for the newbie questions, I bought this for my 10 year old who likes to make electronics projects, so clearly there's a safety issue high in my mind and I'm far from an electronics expert, I just facilitate him with maker type projects as much as I can.
Here's the unit we bought.
https://www.banggood.com/50W-125V-Portable-Solar-Panel-Dual-USB-For-Car-RV-Battery-Charge-p-1506635.html
Thanks in advance.
AI: The panel is "safe enough" when used with normal precautions you should use with any battery powered experiments or equipment.
The 5V USB outputs will allow charging and operation of 5V equipment.
The "12V" (18V / 21V see below) output will allow charging of 12V lead acid batteries (car / motorcycle / alarm) and operation of 12V equipment that is tolerant of up to about 18V when loaded and somewhat more under light loads.
Use of a 12V battery (such as an old car battery) will allow the 12V output to be at about 12V when experimenting.
The 12V output should provide ABOUT 2.75A at 18V in full sun. It will provide maybe 3A when loaded to 12V or below in full sun.
ANY energy supply system has some risks. s long as these are understood and allowed for they become part of learning. At 50 W and 18V (see below) the output COULD cause a fire (it may take some effort).
Shock is unlikely
Do not put wires in mouth or stand in metal bucket of salt water with one lead attached to bucket and holding other lead !!! :-) .
I say that to make the point that it is very safe usually BUT that if you tried the bucket experiment you'd strongly notice the result.
You'd regret putting both wires in your mouth! - but you'd about equally regret it if a car battery was the energy source. ].
Your PV panel consists of 35 PV cells in series (5 columns of 7 cells) - see image below.
These will produce ABOUT 0.5V/cell in full sunlight when loaded or 35 x 0.5 = 17.5V - say around 18V when fully loaded.
Optimally loaded for maximum power values in full sunlight under optimum loading are said to be at the "maximum power" point and suffixed mp.
So here Vmp = 18V.
You are seeing 21V O/C (open circuit) so Vmp/Voc = 18/21 ~= 85%.
This is consistent with what would be expected.
A "12V"panel is typically about 18Vmp loaded so that it can fully charge a 12V lead acid battery (about 14,4 V) plus a diode drop (about 1V at full current) + wiring and connection losses.
At 50 Watt (Wmp) the current (Imp) will be I = VW/V Wmp/Vmp = 50/18 = 2.78 A.
This is under full sun conditions at noon with the panel optimally aligned to the sun (point panel at sun and angle panel to maximise shadow length)
The 5V outputs are very hopefully provided via a DC-DC converter so should be capable of currents up to 10A total. However, they may have cut corners and provided a less capable converter. Experimenting will tell. This SHOULD charge cellphones and similar with ease BUT I'd be wary of committing an expensive device to the mercy of a panel of unknown provenance and quality - if the 5V output voltage rose to 12V, or 18V, or 21V a connected cellphone or other device would quite probably be destroyed. If using for 5V charging I'd consider the use of an external charger that I was confident was trustable.
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H: VHDL: Use a type, dependent on entity generics, for other entity ports/generics
I'm trying to design a memory emulation entity for simulation. To make it as versatile as possible,
it uses generics to define data and address widths. Additionally, one should be able to supply an
initialization memory image via a third generic:
entity memory is
generic (
DATA_WIDTH : positive;
ADDR_WIDTH : positive;
INIT_DATA : image_t
);
port (
[...]
);
end memory;
Where image_t would look something like this:
type image_t is
array(0 to (2 ** ADDR_WIDTH - 1)) of
std_logic_vector(DATA_WIDTH-1 downto 0);
But where could I possibly define this type? Entities don't have an is ... begin block like
architectures that could be used. After reading another question on here,
I've pondered on using a generic package:
package memory_pkg is
generic (
DATA_WIDTH : positive;
ADDR_WIDTH : positive
);
type image_t is
array(0 to (2 ** ADDR_WIDTH - 1)) of
std_logic_vector(DATA_WIDTH-1 downto 0);
end package;
This just moves the problem one level deeper though, because I can't find a way to instantiate
the package such that
it uses the entity generics (possible by instantiating it in the architecture head) AND
its contents are available in the entity declaration (possible by instantiating it on the file level, before the entity)
So it seems like a dead end. Is there any way (maybe using VHDL-2019) to do what I'm trying to accomplish?
AI: As mentioned by user8352 in the
comments, VHDL-2008 indeed allows to solve the problem using an unconstrained array of
unconstrained elements. In a normal, non-generic package, I added this type declaration:
package memory_image_pkg is
type image_t is array(natural range <>) of std_logic_vector;
end package;
Then, in the entity, this type can be constrained directly in the generic definition:
use work.memory_image_pkg.all;
entity memory is
generic (
DATA_WIDTH : natural;
ADDR_WIDTH : natural;
INIT_DATA : image_t(0 to 2 ** ADDR_WIDTH - 1)(DATA_WIDTH - 1 downto 0) := (others => (others => '0'))
);
port (
[...]
);
end memory;
To generate an instance of this entity with an initialization image, it's easiest to create a bounded
constant and pass that to the generic map:
use work.memory_image_pkg.all;
architecture rtl of ram is
constant INIT_DATA : image_t(0 to 65535)(7 downto 0) := (
x"00",
[...]
);
begin
mem: entity work.memory
generic map (
DATA_WIDTH => 8,
ADDR_WIDTH => 16,
INIT_DATA => INIT_DATA
)
port map (
[...]
);
end rtl;
|
H: Safety switch "breaking capacity" vs. voltage
In the context of safety switch rating (fuses, circuit breakers, etc.), the concept of breaking capacity refers to the maximum electric current which can be safely interrupted by a tripping safety switch, i.e. interrupted without the formation of an electric arc. The article Breaking capacity on Wikipedia states that
The current breaking capacity corresponds to a certain voltage, so an electrical apparatus may have more than one breaking capacity current, according to the actual operating voltage.
I am curious as to what a breaking capacity vs. operating voltage plot would look like, but I haven't been able to find one. I suspect breaking capacity is negatively correlated with open circuit voltage, but that is just a guess.
For my question, consider the following case:
Let there be a circuit with a switch, where \$A\$ and \$B\$ denote the contactors of the switch. A voltage of \$U_a\$ is the maximum voltage between \$A\$ and \$B\$ such that no electric arc can form between them when the switch is open.
If the switch is originally open, a voltage of \$U_a\$ between \$A\$ and \$B\$ will not generate an arc between \$A\$ and \$B\$.
If the switch is originally closed and a current of \$I_b\$ flows, when suddenly the switch is opened, is the voltage \$U_a\$ now enough to generate an arc between \$A\$ and \$B\$?
If the flow of current reduces the voltage required for electric arc formation in the example above, why does it happen? Does it have to do with momentum of the charge carriers?
I hope my question is clear enough for being answered. If not, please point out where it is unclear.
AI: If the switch is originally closed and a current of \$I_b\$ flows, when suddenly the switch is opened, is the voltage \$U_a\$ now enough to generate an arc between \$A\$ and \$B\$?
Switches can be designed to open very quickly, but the opening time can never be zero. As a consequence, it must be assumed that an arc is formed. The current drawn influences the breaking of the arc as the gap rapidly increases. If the arc has not been extinguished by the time the switch is completely open, it may be sustained.
The current level influences the breaking of the arc in two ways. One is the temperature of the arc. The other is the voltage developed by the inductance to the circuit tending to maintain the flow of current.
|
H: What's the practical difference of a wait process and a sense process?
All the VHDL-tutorials I've read mentions that one can use a sense process and a wait process, but I have been unable to grasp the difference.
That is:
Waitproc: process
wait until clock ...
end process
Versus
Sense-proc: process (clock)
if rising_edge(clock) then
...
end process
To me, these to seems do the same thing but obviously there must be a difference.
When should I use which one, and why?
AI: In pure VHDL, there is no difference between a process with a sensistivity list (a,b,..x) and a process without one but with a 'wait on a,b,..x;' as its final line.
So no difference between:
pFirst : process(a,b) is
begin
...
end process pFirst;
pSecond : process is
begin
...
wait on a,b;
end process pSecond;
You will almost always see the first form used because it is synthesizable. The wait statement is not.
Note that pSecond has the 'wait on' statement at the end of the process. At the start of simulation, all processes are carried out once, regardless of what they are sensitive to. The position of the 'wait on' statement in pSecond ensures that it does not pause for its sensitive signals until its end.
The second form is useful in testbenches where you want a non-synthesizable process to include time delays as well as sensitivity to signal(s). A process with a sensitivity list will not allow a 'wait for n us;' statement but one without a sensitivity list will.
So you can't do:
pThird : process(a) is
begin
if falling_edge(a) then
wait for 10 ns;
cs <= not cs;
wait for 2 ns;
end if;
end process pThird;
but you can do:
pFourth : process is
begin
if falling_edge(a) then
wait for 10 ns;
cs <= not cs;
wait for 2 ns;
end if;
wait on a;
end process pFourth;
I find the latter very useful for writing bus master or bus slave models and so on.
|
H: Changing clock speed of STM32F779II
I'm configuring the clock of the LCD which has a max clock of 30MHz as following. Plus I'm using the touch at I2C1, and USB at 48MHz.
The clearing and painting an image to the LCD is slow, and it's not that fast, also the operations that the CPU is using is really slow. I'm not sure what is configured wrong, or how do I configure the MCU to run at MAX Speed.
Here is the screenshot of the configuration:
AI: Set in the Pinout & Configuration, RCC, High Speed Clock (HSE) to Crystal/Ceramic Resonator (and make sure you have it in your schematic/dev board).
Than I get the following screen after setting I2C & USB and let it compute automatically the timing table:
|
H: How to solder these tiny pogo pins?
I bought pogo pins to use for firmware uploading.
So I have to make a Jig for my PCB,
but this is the first time I use pogo pins.
I have no ideas where I have to solder, I mean I want to know if pogo pins have a direction for soldering.
as far as I know Gold surface is for better current conduction so I think Gold end is for contact point, but in this picture It seems silver end is for contact point; I'm a little confused.
How can I make a Jig for this tiny one? (I use 2.54 mm gap for Test point on PCB)
and
what is the direction of soldering for this Pogo pins?
AI: The inner part of the Pogo pin, silver colored in your picture, is what contacts the workpiece. In many styles it has a broader head or a special shape.
You are not actually supposed to solder to pogo pins, but rather insert them in sleeves. The sleeve for a P75 pin for example is an R75. The sleeves come with either a solder tail or what is effectively a wire wrap post, or may be available prewired to cable. Tiny heatshrink works well.
The advantage of the sleeves is that when a Pogo gets bent or starts sticking in the compressed position you can carefully pull it out and push in another without having to rewire.
That said if you want to use only what you have you can carefully solder to the back of the outer part of the pogo just below the end. It's probably better if you don't get solder in the hole.
|
H: Resistance of mosfet's internal diode
I am an IoT solutions developer and not an engineer, so please excuse my vocabulary if not upto the mark.
I have used Mosfets such as FDD6637 and IRF9310 in my circuits for power switching and they work great for my use cases because of their low Rds(on).
From the datasheet, there is an internal diode and I am showing the characteristics in the attached image.
My questions:
What would be the internal resistance of this diode? Will it be the same as Rds(on)? I can't seem to find it in the datasheet.
Do you know of any P-channel mosfet that does not have this diode but has similar Rds(on) (10 to 15 mOhms at -4.5v?). I do not want reverse current to flow in a particular case, as I need my switching to work in only one direction.
Thanks in advance for your help!!
EDIT:
I have shown my problem in the rough diagrams below (sorry if the symbols are not accurate).
Works but battery powers load through internal diode (apparently):
Even though above circuit works, the question is about the internal resistance of diode and the drop across the mosfet when main power is off.
Following does not work because main voltage shows up at battery connector:
In the above circuit, I expect the mosfet not to conduct when there is +9v. But it is conducting because of the internal diode. This circuit would take advantage of the low Rds(on), so it is desired.
When there is no +9v, the load gets powered by the battery alright.
AI: I answer to your questions below, starting from the first one on the body drain diode.
What would be the internal resistance of this diode? Will it be the same as Rds(on)? I can't seem to find it in the datasheet.
The I-V characteristic of a diode is not linear, so it is almost never modeled as a single resistor: this is the reason why, in the datasheet of the MOSFETS you use, such parameter is not even mentioned. The only exception to this situation I'm aware of is the characterization of high power diodes like this: in the datasheet of those power devices, the so called slope resistance \$\mathrm{r_T}\$ is specified. In such devices, the magnitude of this model resistance is usually of few milliohms: however, in MOSFETs you cannot expect any precise relation between the (unspecified) \$\mathrm{r_T}\$ and the (very well characterized) \$R_{DS_\mathrm{ON}}\$ since these two resistances do not model the same physical phenomena even if the semiconductor structure is the very same one.
Do you know of any P-channel mosfet that does not have this diode but has similar Rds(on) (10 to 15 mOhms at -4.5v?). I do not want reverse current to flow in a particular case, as I need my switching to work in only one direction.
Power MOSFETs where the body drain diode is not present have been produced in the past, but they are not easily available and surely do not have the low \$R_{DS_\mathrm{ON}}\$ you need in your application. I suggest another approach which may be a more viable alternative:
simulate this circuit – Schematic created using CircuitLab
The \$p\$-channel MOSFETs shown are used in the so called anti series connection: when the common \$V_{GS}\$ is \$>0\$, the MOSFETs are OFF and the two body drain diodes are connected back to back, so they are not conducting. When \$V_{GS}\ll V_\mathrm{th}\$, both the two MOSFETs are ON and the battery feed the load through a \$2R_{DS_\mathrm{ON}}\$ resistance: by choosing properly the devices, you solve the problem at the cost of an additional MOSFET.
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H: Effect of Pi Filter on the Output of LDO
Similar to my previous question on +5V Sneak path, I ran into another question now.
I have this circuit as shown.
I have an Pi Filter at the Output.
ATT has 600Ohm Impedance at 100MHz and 0.1Ohm DCR.
This 3.3V goes to the MPC5606S Micro.
My issue:
If I remove the Output capacitor C2, I get the output voltage but All my micro functions are down. Board doesn't get up.
However, If I remove the Attenuator ATT along with C2 (Short the ATT pads), I get the output voltage and my Micro Functions are up. Board is UP.
What effect is this? How come removing the output capacitor plays this type of a role?
Can someone tell me the concept behind this.
Thanks.
AI: If there is not other decoupling capacitance across your 3.3 V supply (and taking a beginner's view of it)...
Your microcontroller is a rapidly switching load. It draws a DC current plus spikes of current drawn when the logic transistors within it switch in response to its internal logic clock. You don't say but I imagine this is in the tens of megahertz.
The regulator cannot react to changes of output load at these speeds. Therefore local decoupling capacitors provide current to the load during these spikes of draw and charge up in between them. The voltage across the load is no longer tightly coupled to the regulator response. The capacitors have 'de-coupled' the load voltage from it somewhat.
The inductor will oppose this switching current flow. It will have a high impedance in response to the load current changing sharply when it spikes, so the voltage across the load will fall. This is why a Pi filter in a voltage supply uses an output capacitor. A multimeter measures average voltage so it might not show these dips in supply voltage very well. A 'scope will show it much better.
As a rule, keep series inductance out of power supplies wherever possible. Only put it in where needed, rather than just as an idea. (That's true of every component in any circuit.) If you need to filter high supply frequencies from your reaching your circuit, put the series inductor on the linear regulator supply. But ensure your regulator has suitable input and output decoupling capacitance for the loads it has.
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H: MCP604 op-amp output seems to jump to the positive rail
I'm hoping someone can give me some insight as to what's going wrong with this MCP604 op-amp. I'm seeing this issue on about 150 of the ICs. Below are some specs for the MCP604 and an image from my oscilloscope.
The yellow line is from the V+ of the op-amp, and the pink is Vout. It looks like the output is jumping up the positive rail. Is this a defective part?
My input signal is 0 - 3.3 V and it's passing through a 10k resistor. I have a 0.1 uF cap right next to the power connection. Anyone have an idea of what's going on?
AI: You seem to be running afoul of the upper-end of the common-mode range, which is 1.2V below the Vdd rail:
Recovery from this condition is often slow for high-gain op-amps.
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H: What is a terminal plane in high frequency circuits?
The term "terminal planes" come up very frequently in books on microwave circuits. What exactly does the term mean?
The closest answer I have got is
A terminal plane, or reference plane, is the equivalent of a terminal
pair in a low-frequency network
-Foundations of microwave engineering, Robert E Collins
But I don't understand what a "plane" is in this sense, and I don't understand why we couldn't just use the term terminal port?
AI: It's called a reference plane because, for both coaxial cable and hollow rectangular waveguides, an ideal connector cuts across the guide in a plane cut.
This is what a waveguide connector looks like, a flange with a plane cut across the guide.
This is a pair of APC-7 (A Precision Connector - 7mm) connectors, designed for precision measurement specifically so that the breaks in the inner and the outer line up to form a plane.
Distances from the 'connector' are measured from this plane.
In a more conventional RF connector like BNC, N-type or SMA, the break in the outer defines the plane.
Any plane across the guide can be taken as a reference plane when doing maths with the phase of RF waves propagating along the guide.
The most usually used planes are those of the connectors, as we are usually interested in reflection coefficients of components with respect to their connectors.
You will however sometimes see evaluation boards for RF components, with a line drawn on the board across a microstrip line, with a note that some S-Parameters are quoted with reference to this plane. This can be useful when you will be copying the reference design, and can choose that cut point as your virtual connector.
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H: How to place through solder pads of different shapes in EAGLE?
I searched everywhere and watched many eagle tutorials, but I couldn't find out how to place circle and square through hole solder pads.
In the Eagle parts list, I only found the octagon solder pad. I would really like to know how to place pads of different shapes, square, circle...
I've started learning Eagle yesterday, and I have managed to put together a 3PDT daughter board schematic and design a PCB:
Any help is very appreciated :)
AI: As Peter Bennett described in his comment, you're looking at pre-made single pads in a library. You're limited to the choices that the person who developed the library made at the time.
If you create a custom component of your own in the library editor, you have the full range of pad shapes and sizes available to you.
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H: Can the microcontroller program flash memory be used for storing user configuration?
Many microcontrollers, e.g. PIC18F, have flash program memory: "The Flash program memory is readable and writable during normal operation". Does this mean I can store some user configurations in the program memory?
AI: Yes, you can. I have done this many times.
However, there are some drawbacks relative to using separate EEPROM:
The number of lifetime writes to program flash memory is significantly less than data EEPROM.
The processor will go out to lunch during the erase and write times.
Program flash is erased in blocks. You can't just update a single byte. I usually use a block caching scheme to deal with this.
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H: Is it bad to connect multiple electrolytic smoothing capacitors in parallel?
I'm making a power supply using a transformer and bridge rectifier, and I'm wondering whether it is a bad idea to put multiple (5) capacitors in parallel for smoothing.
The output should be capable of drawing 1.1A at 10.7V. I'm allowing for a ~2V peak to peak ripple, as this is fed into a boost converter.
$$
C = \frac{I }{2 f V_{p-p}}
$$
$$
= \frac{1.1 }{100 *2}
$$
$$
= 5.5mF
$$
Further, what if I was to use different valued capacitors (e.g. a 4.7mF and 1mF)?
AI: It is common practice to parallel a bunch of capacitors of small values for noise suppression; each value suppresses a different frequency band. The values are typically provisioned in decades, e.g. 0.001µF (1nF), 0.01 µF (10nF), 0.1 µF (100nF) etc. For high-frequency devices like cell radios, you will see caps in the pF range.
However it is also common to parallel capacitors of higher values, either electrolytic or tantalum. This is done for several reasons. First, the value you want may not be available, but a smaller value that can be paralleled is. Or maybe the larger value isn't available in the tolerance you want, and again you can get that in a smaller value.
Then there are price considerations. Depending on a how common the value is, a larger value cap may actually cost more than twice what two smaller caps cost.
And finally, there are size considerations, particularly on a board with SMT devices. The manufacturer recommended adding 2000µF to a 3.6V rail going into a cell module. First of all, a single 2000µF tantalum cap wasn't available, just 2200µF. But it was actually bigger than two 1000µF caps, and cost more than the two smaller ones together. So I used two 1000µF capacitors.
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H: Suggestions to interface a photodiode in the MHz range
The task at hand is to read the variations of incoming light at speeds up to 1 MHz, with some dynamic range capability (10-1000lx with 1% accuracy would suffice).
This is to be used in a device which measures lighting quality (flicker detection in light sources and backlights). Light flicker is usually in the kHz range, but we've measured an office CFL lighting that has some small 100 kHz "ripple". I take it that in order to analyze a 100 kHz signal to at least some degree, a 1 MHz sampling rate or more would be needed.
I have questions on both the analogue and the digital part of this :)
The analogue part of the question is how to interface the photodiode (SFH213). I've read that a transimpedance amplifier is the suggested path, but I need a programmable gain TIA to cater for the dynamic range. Making a TIA for a fixed gain seems doable, and there are even ICs for that, but I haven't found any programmable-gain TIA ICs (or I haven't searched well enough). Would it be a good idea to use a fixed TIA gain, tuned to the 1000lx illumination range, and then follow that with a good programmable voltage-gain amplifier to cover the 100lx and 10lx ranges? (Other ideas come to mind, but are probably stupid, e.g. a logarithmic amplifier there).
The digital part of the question is how to sample the resulting signal at 1 MHz. I've selected a dsPIC33FJ16GS502, which boasts a 4 MHz ADC sample rate. Is this actually attainable? Analyzing the signal on-the-fly would be of course impossible at 1 MHz, but I can use a sample-store-analyze approach there.
AI: I cannot speak to the digital question, but the analog is pretty straightforward. You should use a TIA with a 1000 lux sensitivity, about 8 kohm / full scale volt. Use about a 5 volt bias, and expect a photodiode capacitance of 4 or 5 pF. I'd suggest that you don't need a PGA, rather, use a pair of x10 amplifiers in series and an analog mux to select the active channel. Be aware that selecting the appropriate channel will not be trivial in some cases, especially where there is a lot of AC on the signal. All amplifiers need to be selected with fast overload recovery in mind, or incorporate clamps. Fortunately, your currents are so low that a decent clamp should be straightforward. Log amps are in principle a good idea except that it's hard to make a good log amp that is also fast. The other problem with log amps is that it's very difficult to produce the sort of precision you want over large dynamic range.
ETA In response to a request, here's a TIA using an AD8651 and +/- 3.3 volts -
simulate this circuit – Schematic created using CircuitLab
The AD8651 is available for less than $4 in onesies.
One thing to be careful about is the value of the feedback compensation capacitor. With the values shown, and an assumed total input capacitance of 6 pF (4 pF for the diode, 2 pF for the IC) my simulation gives settling time for a full-scale step (3 volts for 130 uA) of less than 300 nsec. However, this is quite sensitive to the value of the capacitor, and so is sensitive to layout considerations. A very compact layout is a must - which means that breadboards are absolutely verboten. Good decoupling of the +3.3 supply at the op amp is also a must - this is a 50 MHz op amp.
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H: Do my specific constraints prevent me from using this Zero and Span Amplifier?
I am interfacing a thermistor with an ADC, and I have found a circuit that, at first glance, appears to suit my needs. A zero and span circuit using a single op amp.
http://www.ti.com/lit/an/slyt173/slyt173.pdf (figure 3, page 3)
The thermistor is in a voltage divider, using a 82k resistor as the fixed resistance. The thermistor's resistance is 3k @ 212F, and 160k at 32F. With 5V across the full divider, this gives 4.8V across the fixed resistor @ 212F, and 1.7V at 32F. I'd like to map 4.8V to 4V, and 1.7V to 0V.
To calculate my required offset and gain, I set up two simultaneous y=mx-b equations:
Vout = m * Vin - b
4.0 = m * 4.8 - b
0 = m * 1.7 - b
Solving for m is as easy as (y2 - y1)/(x2 - x1).
plugging m = 1.2903 back into either equation gives you b = 2.1935.
According to the PDF, the equations for the resistors, as they relate to m and b are as follows:
m = (RF + RG)/RG
|b| = (RF/RG) * (R2/(R1+R2))
If m is roughly 4/3, it follows that RF is roughly RG/3, and RF/RG = 1/3.
A little more algebra, and plugging in b = 2.2 makes R2/(R1 + R2) = 2.2 * 3 = 6.6.
There is no combination of R1 and R2 that can make the quotient more than 1.
Does this mean that this circuit can not perform this particular zeroing and spanning?
If so, what are my options to accomplish this?
Thanks.
AI: I suggest that you flip over the voltage divider so that you get a range of 0.2V to 3.3V.
It's generally better to have one side of the sensor grounded anyhow.
Then you can work out the resistors to get 0~4V for 0.2V to 3.3V.
Another suggestion might be to just connect the op-amp as a unity-gain buffer, and reduce the 82K to 40K so you get 4V at 32°F and 0.348V at 212°F. That gives you an offset zero so you don't suddenly run out of range close to zero C (depending on op-amp offset) and you still get 91% of the resolution.
Speaking of resolution, note that the resolution at high temperature will be much less than the resolution near 32°F, so you should make sure it's good enough for your purposes. It's important to take the op-amp offset into account too, since it greatly affects the high temperature measurement (and the low temperature measurement hardly at all). If one particular temperature is of the most interest, a strategy is to use that value of resistor as the other half of the divider (and use ratiometric conversion) because that's where the resolution will be maximum.
Ratiometric is usually the way to go with resistance measurements because the reference voltage has no effect on the measurement, all that matters is the reference resistor value.
If you do a sensitivity analysis on the method you originally suggested, I think you'll find it adds a lot of error unnecessarily.
To answer your specific title question, yes you can't do this without a voltage higher than 5V to offset the output that much. That's a consequence of the low gain (about 1.3) and the large offset.
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H: PSPICE Simulation of Cascode Amplifier Not Working
Can anyone please tell me why I am getting the following "floating node" errors. I have fiddled around with the resistors to see if it affects anything, so these are not the actual values. I have also read a number of post on PSPICE "floating node" errors, but nothing has helped so far. Everything seems to be grounded... I just want to get rid of the simulation errors for now. Thank you.
Here is the schematic:
Here are the errors:
AI: Very simple problem with an equally simple fix. Your entire circuit is floating. You need to use this for GND:
Edit: Node 0 is the internal reference in SPICE for all voltages, and the ground symbol with the graphic '0' is connected to it. Every node in your circuit must have a DC path to node 0 (even if that path is a 100G ohm resistor). The ground symbols without the 0 are simply connected to all the other similar symbols with the same net name (GND or GND_POWER typically). You could also edit the node name for the symbol you used from GND to 0, but I think it's better to use the provided symbol.
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H: How to implement a current controlled voltage source, or a comparator that trips once a certain current is reached?
I have current flowing through a CCVS, once 10A is reached, the CCVS puts out 10V, which takes a comparator's output high. The current that goes through the CCVS continuous to the load. Is there a way to implement this without an ideal CCVS?
AI: Measure the voltage drop across a small (very small) resistor in series with the load using an instrumentation amplifier, and feed the output of the inamp into your comparator.
simulate this circuit – Schematic created using CircuitLab
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H: How to run Small Brushed Motors for Quadcopter with bare Atmega328 microcontroller?
I am trying to make a Nano Quadcopter using my Atmega328 microcontroller powered by a 3.7v 600mAh Lipo battery. I am using very Small Brushed Motors. If I directly connect motors to PWM pin of Atmega328, it will fry up my Atmega.
My question is How can I connect motors to PWM pin of Atmega328 without frying up my Atmega?
I saw many similar articles but none could give me the solution.
The motors I am using are:
http://www.amazon.com/Hubsan-Mini-Quadcopter-Spare-Motor/dp/B00B3RO0GE
AI: Sounds like this might be a first experience with motors for you?
Here are a couple pointers to get you started. You're going to need use your micro to switch a higher voltage supply. One problem that I'm seeing with your current battery is the relatively low voltage. I'm not privy to the specifics of your micro, but typically they run off of a 3.3V or similar supply voltage. I would guess that after the voltage drop in your switch, you won't have a lot of oomph left to run your four motors.
What needs to happen is you need to control a switch with your PWM signal. The reason that you do this is because your chip can only source(put out) a relatively small amount of current. The effect that the PWM'd switch has is to leverage the capability of the micro to turn a switch off an on rapidly. At one extreme, the switch could be off, on the other, fully on. By changing the duty cycle of the PWM (time it is high vs low), you can effectively chop up that voltage so the motor sees the amount of voltage that you choose from 0V up to the supply voltage, and anywhere in between(ideally).
The problem with your low voltage is that these switches are never ideal. We use transistors as switches, and supply a current (for BJT devices) or a voltage (for FET devices) to turn them on or off, but they have a voltage drop associated with them. Take a look at this very simple circtuit:
I'm just using this as an example. I'm not recommending you just copy component numbers or values for your circuit. The output of the micro is hooked up to the base of the transistor through a current limiting resistor. That 10V up top will drop through the load, and then drop through the transistor. Effectively, the load will see a lower potential than the 10V because of the non-idealities in the 'switch'. With 3.3V, you're not giving yourself a lot of wiggle room. Here's how I'd proceed if I were you. Research anything that I've written that doesn't make total sense to you. Think about the resistance in the coil windings of your motors, the voltage drop across the transistor you might use, and how much current (proportional to torque) you're gonna need and how much current your motors can handle. This is a big boy project, and implementing the control algorithm for that quadcopter is no small feat. Start small, work your way to your goal. You're not gonna get there successfully without some hard work and research!
PS: Another typical way to control motors is with an H-Bridge circuit. This would allow you to drive current in two directions and allow you to make your motor go in both directions depending on which side of the circuit you drive. Since you're planning a copter, you probably don't need to go both ways, but it could be a valuable stepping stone for you. Note the diode across the load in the circuit. This is pretty crucial for many applications as the changing current in the motor can cause some dangerous voltage spikes.
Best of luck.
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H: How much power is generated from a typical solar-powered watch?
I have an ABC watch from Casio that is also an altimeter, barometer, and compass. I'm fascinated that all these features are powered by solar, which makes me curious:
How much power is generated from a typical solar-powered watch?
AI: There are two main factors which will affect the power you can get from solar.
How much power the solar radiate on your watch's solar panel. Per this link, in summer day, 40 degree latitude, there will be 600W/m^2, and in winter, there will be 300W/m^2.
The efficiency of your solar panel. This depends on many factors, typical may be less than 15%, according to this link.
Assume a 600W/m^2 solar power and a 15% efficiency, 1 cm^2 solar panel:
$$
600W/m^{2} \times 0.15 \times 1 cm^2 \approx 10mW
$$
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H: How to determine dielectric constant and loss tanget of a PCB board at a specific frequency?
I need to know dielectric constant (relative permittivity) and Tan loss of a FR4 board at 2.45 GHz.
The specification of the manufacturer is as it is below:
Dielectric Constant:
Test method (IPC-TM-650): 2.5.5.2
Test condition: Etched/@1 MHz
Specification(IPC-4101C) <5.4
Typical value: 4.58
Loss Tanget:
- Test method (IPC-TM-650): 2.5.5.2
- Test condition: Etched/@1 MHz
- Specification(IPC-4101C) < 0.035
- Typical value: 0.022
I read on the Net that those values should be lower at higher frequencies. Is it possible to calculate/determine/predict those two values for 2.45 GHz?
AI: There are equations to calculate them. Look here: http://www.sigcon.com/Pubs/news/4_5.htm.
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H: GLCD doesn't work
I have a ts12864a-2v2 LCD and I think its controller is KS0108B. I have downloaded this lib to use it for my LCD and also my MCU is STM32F103RET6. the schematic I have used to connect LCD to MCU is this:
And the MCU's pins are connected to the LCD like this:
MCU LCD
PB0 --> DB0
PB1 --> DB1
PB2 --> DB2
PB3 --> DB3
PB4 --> DB4
PB5 --> DB5
PB6 --> DB6
PB7 --> DB7
PB8 --> RES
PB9 --> R/W
PB10 --> E
PB11 --> CSA
PB12 --> CSB
please consider the D/I pin is NC(not connected). is it neccessory? I couldn't find anything about it in the KS0108-STM32.c file.
And the circuit is this:
The KS0108-STM32.c is this:
#include "stm32f10x.h"
#define KS0108_PORT GPIOB
#define KS0108_RS GPIO_Pin_8
#define KS0108_RW GPIO_Pin_9
#define KS0108_EN GPIO_Pin_10
#define KS0108_CS1 GPIO_Pin_11
#define KS0108_CS2 GPIO_Pin_12
#define KS0108_CS3 GPIO_Pin_13
#define KS0108_D0 0
#define DISPLAY_STATUS_BUSY 0x80
extern unsigned char screen_x;
extern unsigned char screen_y;
GPIO_InitTypeDef GPIO_InitStructure;
//-------------------------------------------------------------------------------------------------
// Delay function /for 8MHz/
//-------------------------------------------------------------------------------------------------
void GLCD_Delay(void)
{
__asm("nop"); __asm("nop"); __asm("nop"); __asm("nop");
}
//-------------------------------------------------------------------------------------------------
// Enalbe Controller (0-2)
//-------------------------------------------------------------------------------------------------
void GLCD_EnableController(unsigned char controller)
{
switch(controller){
case 0 : GPIO_ResetBits(KS0108_PORT, KS0108_CS1); break;
case 1 : GPIO_ResetBits(KS0108_PORT, KS0108_CS2); break;
case 2 : GPIO_ResetBits(KS0108_PORT, KS0108_CS3); break;
}
}
//-------------------------------------------------------------------------------------------------
// Disable Controller (0-2)
//-------------------------------------------------------------------------------------------------
void GLCD_DisableController(unsigned char controller)
{
switch(controller){
case 0 : GPIO_SetBits(KS0108_PORT, KS0108_CS1); break;
case 1 : GPIO_SetBits(KS0108_PORT, KS0108_CS2); break;
case 2 : GPIO_SetBits(KS0108_PORT, KS0108_CS3); break;
}
}
//-------------------------------------------------------------------------------------------------
// Read Status byte from specified controller (0-2)
//-------------------------------------------------------------------------------------------------
unsigned char GLCD_ReadStatus(unsigned char controller)
{
unsigned char status;
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = 0xFF << KS0108_D0;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(KS0108_PORT, &GPIO_InitStructure);
GPIO_SetBits(KS0108_PORT, KS0108_RW);
GPIO_ResetBits(KS0108_PORT, KS0108_RS);
GLCD_EnableController(controller);
GLCD_Delay();
GPIO_SetBits(KS0108_PORT, KS0108_EN);
GLCD_Delay();
status = ((GPIO_ReadInputData(KS0108_PORT) >> KS0108_D0) & 0xFF);
GPIO_ResetBits(KS0108_PORT, KS0108_EN);
GLCD_DisableController(controller);
return status;
}
//-------------------------------------------------------------------------------------------------
// Write command to specified controller
//-------------------------------------------------------------------------------------------------
void GLCD_WriteCommand(unsigned char commandToWrite, unsigned char controller)
{
while(GLCD_ReadStatus(controller)&DISPLAY_STATUS_BUSY);
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = (0xFF << KS0108_D0);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(KS0108_PORT, &GPIO_InitStructure);
GPIO_ResetBits(KS0108_PORT, KS0108_RS | KS0108_RW);
GLCD_Delay();
GLCD_EnableController(controller);
GLCD_Delay();
GPIO_SetBits(KS0108_PORT, (commandToWrite << KS0108_D0));
commandToWrite ^= 0xFF;
GPIO_ResetBits(KS0108_PORT, (commandToWrite << KS0108_D0));
GLCD_Delay();
GPIO_SetBits(KS0108_PORT, KS0108_EN);
GLCD_Delay();
GPIO_ResetBits(KS0108_PORT, KS0108_EN);
GLCD_Delay();
GLCD_DisableController(controller);
}
//-------------------------------------------------------------------------------------------------
// Read data from current position
//-------------------------------------------------------------------------------------------------
unsigned char GLCD_ReadData(void)
{
unsigned char tmp;
while(GLCD_ReadStatus(screen_x / 64)&DISPLAY_STATUS_BUSY);
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = 0xFF << KS0108_D0;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU;
GPIO_Init(KS0108_PORT, &GPIO_InitStructure);
GPIO_SetBits(KS0108_PORT, KS0108_RS | KS0108_RW);
GLCD_EnableController(screen_x / 64);
GLCD_Delay();
GPIO_SetBits(KS0108_PORT, KS0108_EN);
GLCD_Delay();
tmp = ((GPIO_ReadInputData(KS0108_PORT) >> KS0108_D0) & 0xFF);
GPIO_ResetBits(KS0108_PORT, KS0108_EN);
GLCD_DisableController(screen_x / 64);
screen_x++;
return tmp;
}
//-------------------------------------------------------------------------------------------------
// Write data to current position
//-------------------------------------------------------------------------------------------------
void GLCD_WriteData(unsigned char dataToWrite)
{
while(GLCD_ReadStatus(screen_x / 64)&DISPLAY_STATUS_BUSY);
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = (0xFF << KS0108_D0);
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(KS0108_PORT, &GPIO_InitStructure);
GPIO_ResetBits(KS0108_PORT, KS0108_RW);
GLCD_Delay();
GPIO_SetBits(KS0108_PORT, KS0108_RS);
GLCD_Delay();
GPIO_SetBits(KS0108_PORT, (dataToWrite << KS0108_D0));
dataToWrite ^= 0xFF;
GPIO_ResetBits(KS0108_PORT, (dataToWrite << KS0108_D0));
GLCD_Delay();
GLCD_EnableController(screen_x / 64);
GLCD_Delay();
GPIO_SetBits(KS0108_PORT, KS0108_EN);
GLCD_Delay();
GPIO_ResetBits(KS0108_PORT, KS0108_EN);
GLCD_Delay();
GLCD_DisableController(screen_x / 64);
screen_x++;
}
//-------------------------------------------------------------------------------------------------
//
//-------------------------------------------------------------------------------------------------
void GLCD_InitializePorts(void)
{
vu32 i;
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
GPIO_StructInit(&GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_All;
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
GPIO_Init(KS0108_PORT, &GPIO_InitStructure);
GPIO_Write(KS0108_PORT, KS0108_CS1 | KS0108_CS2 | KS0108_CS3 | KS0108_RS | KS0108_RW | (0xFF << KS0108_D0));
}
//-------------------------------------------------------------------------------------------------
//
//-------------------------------------------------------------------------------------------------
unsigned char GLCD_ReadByteFromROMMemory(char * ptr)
{
return *(ptr);
}
And the my program is this:
/* Includes ------------------------------------------------------------------*/
#include "stm32f10x.h"
#include "KS0108.h"
#include "graphic.h"
/* Private functions ---------------------------------------------------------*/
/*******************************************************************************
* Function Name : main
* Description : Main Programme
* Input : None
* Output : None
* Return : None
* Attention : None
*******************************************************************************/
int main(void)
{
GLCD_Initialize();
GLCD_ClearScreen();
GLCD_GoTo(0,0);
GLCD_WriteString("+-------------------+");
GLCD_GoTo(0,1);
GLCD_WriteString("| Universal |");
GLCD_GoTo(0,2);
GLCD_WriteString("| KS0108 library |");
GLCD_GoTo(0,3);
GLCD_WriteString("| |");
GLCD_GoTo(0,4);
GLCD_WriteString("| en.radzio.dxp.pl |");
GLCD_GoTo(0,5);
GLCD_WriteString("| STM32 Cortex-M3 |");
GLCD_GoTo(0,6);
GLCD_WriteString("| microcontrollers |");
GLCD_GoTo(0,7);
GLCD_WriteString("+-------------------+");
while(1)//Loop for ever.
{
}
}
Alright, so far so good! I compiled the program and downloaded it to the MCU correctly and easily! ok, let's to turn on the circuit. all things I can see is just this:
Why?
also I have checked out the MCU's pins and I saw this:
more zoom:
Why the GLCD doesn't work?
AI: Maybe because the D/I pin is disconnected...? That pin is very much needed to make the LCD work - it's what selects whether you are sending Data, or Instructions to the LCD.
If you don't tell it what kind of bytes you're throwing at it are, how can it hope to work out what to do with them?
In your library it is known as the RS pin - Register Select. Some also refer to it as the C/D pin - Command / Data.
|
H: LDO - SOT223 - What's the Fourth pin for?
What's the fourth pin in LD1117-33 for (the thick on the top)?
AI: I can't find a picture of an SOT223, but here is a TO-220 which follows the same principle:
You can see how the tab and the middle pin are one and the same piece of metal.
As others have rightly mentioned, this is for heatsinking purposes, and is often required. It is also used in some packages for high current connections, where you may have the tab as one connection, then 4 or 5 pins together for another connection (such as in >100A MOSFETs).
|
H: getting more from batteries via series connection
Let's assume I have a 100W load.
If I run this load on two 2000mAh 3.7V batteries in parallel then I should get a continuous run time of 8 min 53 seconds (given the 27 amp draw).
However if I were to take the load and modify its resistance so it would draw 100W on 7.4V then I will have a draw of 13.5 amps from the cells. This should give a continuous run time of 17 mins 46 seconds.
All this is considering the way voltage has a larger effect on wattage than current.
Are my calculations correct in this sense? (I'm aware a 100W load is rather a lot for this voltage, but its just a rounded number for an example).
Also assume the second load of higher resistance performs the same as the first, lower resistance, load e.g. light/heat output.
AI: Your calculation for the series case is incorrect. You forgot that since the batteries are in series, you can only use the 2 Ah of each cell. 100 W / 7.4 V = 13.5 A. 2 Ah / 13.5 A = 9 minutes, just like your answer for the parallel case. You can't cheat conservation of energy.
Also, calculating battery runtime to better than 1 part in 500 (one second out of 8 minutes 53 seconds) is absurd. Battery capacity is a rough number at some set of nominal conditions. Various factors, like temperature, drain rate (current), age, what you consider "empty", number of charge/recharge cycles for rechargables, and part to part variation change the total charge you will get from the battery. Take a look at a battery datasheet. Batteries are complicated.
|
H: SN74HC138 demultiplexer. How do I implement a switch?
I have this demultiplexer and I need to configure it in such a way that I can control 8 transistors using its outputs. They NEED to be NPN transistors, so when I select an output using the addresses, it must give me logic level 1, not 0. The problem is, in the data sheet of this multiplexer there is a logic table and according to it there doesn't seem to be any possibility of getting a HIGH logic level at the selected output, and only LOW logic levels at the other, not selected, outputs. Is there a way I can do that using this demux?
AI: Just add a second NPN as an inverter.
simulate this circuit – Schematic created using CircuitLab
Adjust resistor values and add speed-up caps and/or Schottky clamps to meet your speed and current requirements.
|
H: Inverting charge pump with boost converter loading characteristics
I've added a test inverting charge pump to an LMR64010 based boost regulator. This regulator outputs +12V (exact value is 11.88V) from a 7.4V battery pack.
This is a notated image from a Maxim application note showing what I did. The output capacitors are whatever I had handy - 22u and 10u in parallel:
With no attached loads I get a value for -V of -11.65V. The immediate issue I noted was with an attached negative load of 1K for approximately 12mA, the voltage immediately drops off to -6.5V.
Varying the load on the positive side (with a fixed negative load) I get:
Neg Load Pos Load Neg output (V)
--------------------------------------
1k inf -6.50
1k 3.3K -9.95
1k 1.0K -10.30
1k 500R -10.38
1k 250R -10.40
So a rapid convergence to about -10.30 volts at a load that matched the negative load. Then little or no rate of return below that.
Is this a correct statement then: "an inverting charge pump must have a matching load on the boost converter output".
Is this how I should design the completed circuit (which is providing negative biasing for an opamp - not my design) ? So I'd put a 1K resistor across the +12V rail and then specify that loading (12mA or so) as a max loading for the negative rail?
AI: Charge pumps driven from square waves have inherent apparent series resistance based on the frequency, and the size of the pump capacitor. You expect the output voltage to drop as it is loaded with decreasing resistance.
However, your table shows the opposite. Either you measured something wrong or wrote down the data wrong, or there is something else going on here. Keep in mind that in this case you have a feedback loop that adjusts the PWM duty cycle and possibly the period to keep the 11.9 V output regulated. This may be causing various non-obvious affects on the charge pump output. The pulses are there for another purpose and the charge pump is coming along for the ride.
This probably doesn't matter much if you only want a few mA, like the negative supply of a opamp. Make sure to filter this well before using it to power a opamp. I'd put a ferrite chip inductor followed by a 20 µF or so ceramic cap to ground before the opamp power pin at least, maybe two of those filters in series. The opamp will have some supply rejection capability, but that won't work well at high frequencies. You need to filter out enough of the high frequency noise from the charge pump supply so that the active circuit in the opamp can handle the rest.
Added:
You are now measuring the negative supply voltage with a fixed 1 kΩ load on it, while varying the load on the positive supply. The relationship you measured makes sense. By increasing the load on the positive supply, the feedback mechanism increases the duty cycle and/or frequency of the switching pulses. This lowers the effective resitance of the charge pump negative supply. This is all a consequence of the pulses being produced for the purpose of regulating the positive supply, which is not necessarily optimal for regulating the negative supply. The harder the switcher has to work to maintain the positive supply, the better job it does of driving the negative supply too.
|
H: NPN BJT base->emitter resistance is effectively zero?
I've been trying to better understand BJT transistors. In particular I've been trying to understand the inverting amplifier configuration. Wikipedia shows this schematic:
Which shows an input voltage Vin. However my understanding of how a BJT works tells me that there is effectively no resistance between the base and the emitter (is this correct?). This would mean an input from a voltage source would kill the BJT. And that it needs to be current limited like so:
I've written up my understanding in more detail here:
https://41j.com/blog/2014/12/npn-bjt-common-emitter-inverting-amplifier/
And tried to confirm experimentally, that there is no resistance between the base and the emitter. If there is an effective resistance between the base and the emitter, which parameter in the datasheet typically tells me what it is?
AI: Understanding transistors is a bit like peeling an onion- there are many layers. At the simplest large-signal level you can consider the transistor as a current sink that's controlled by the current through the base-emitter junction. The latter behaves like a forward-biased diode. Not much current until you get to some hundreds of mV, and way too much current if you put volts across the junction. As you say, the transistor will conduct excessive current and will be destroyed if you simply connect (say) 5V to the base with emitter grounded. This is in stark contrast to the behavior of a MOSFET.
At a more sophisticated level of understanding (which is required if you want to predict how most amplifiers work) and for small signals the base-emitter junction behaves like a resistor of Vt/Ib where Vt is the thermal voltage, about 26mV at room temperature. So if your base current is 2.5uA (say the beta is 300 and the transistor is biased with 0.75mA collector current), the base-emitter junction looks like about a 10K resistor for small signals. You can consider the transistor as a (somewhat imperfect because of r0) voltage controlled current source with an input resistance of Vt/Ib. This is the hybrid-\$\pi\$ model. Note that the transconductance gm (and thus the voltage gain in a common emitter configuration) is a function of the collector bias current and temperature and beta does not enter into it at all.
I must emphasize that this model is a linearized model about a bias point and is quite invalid if the (change in) input voltage is large (more than some millivolts). In other words we're talking about relatively small changes on top of a fixed base-emitter voltage of perhaps 600 or 700mV.
|
H: Phototransistor bandwidth issue
I'm trying to sense IR wave with a phototransistor circuit. The circuit operates well under DC operations (I mean 3V or 0V through inputs). However, if a square wave is supplied from UART input, propagation delay increases after some frequency due to bandwidth of phototransistor(I suppose). What should I consider to increase bandwidth? There is 1.5cm space between IR & phototransistor in vertical axis. LED draws about 15mA current when it conducts.
For example;
When 8kHz, %50 DC, square wave input is applied from UART pin, the DC of output decreases to 27% with about 20us propagation delay.
I've tried increasing the distance between IR & phototransistor to decrease photocurrent gain. Is it a good approach, or should I vary resistance values to decrease gain? Lowering the value of R2&R3 gave me better result; but, what other effects should I take into account?
Here are the datasheets:
bc848b: http://www.nxp.com/documents/data_sheet/BC848_SER.pdf
bc858b: http://www.nxp.com/documents/data_sheet/BC856_BC857_BC858.pdf
phototransistor: http://www.megasan.com/service/pdfhandler.ashx?fileid=3565
simulate this circuit – Schematic created using CircuitLab
edit: Problem has solved according to values of updated schematic.
For square wave input with 3Vpp, 50%DC up to 9.6kHz has been tested.
@4.8kHz -> DC: 45%, propagation delay: 10us
@9.6kHz -> DC: 40%
AI: The photo-transistor collector is connected via 330R to the local supply. Try shorting the 330R out and decouple the transistor's collector with 100nF to ground (bottom of R3) to reduce miller capacitance slowing the response of the transistor down.
|
H: What is the physical size of a logic gate?
I always hear about process size improvements in the news, but could never figure out how it translates into dimensions of a logic gate. I found a chapter from Weste's CMOS VLSI Design, that contains figures which looks like things I create when playing KOHCTPYKTOP. There's a figure of a 3-input NAND gate, but none for a simple 2-input NAND. So I used Inkscape to draw my own, based on Mead & Conway's design rules mentioned in the chapter:
(I have no idea about the spacing around the well tap, I made it just 1 lambda)
So if I were to just plug in the current state of the art process size, which is supposedly 14 nm in 2014, can I say that the size of a NAND gate is about 448×518 nm²? Or is it possible to design it even smaller?
AI: You can use that as a raw approximation. If you want to get better (or even get an idea of how much you are wrong), you better find someone who has access to a library or the design rules themselves and may speak about it (NDA are everywhere at that level).
Design rules for lower feature size are not a simple linear down scaling of the previous one. And new constraints are added which may make simple width and spacing adjustment just not enough. Mead & Conway is just a far too old source to even get an idea of the rules which apply for a state of the art process. For instance, I'd worry about the jog in poly, keeping strictly on routing direction was once for router convenience, and thus ignored in standard cell routing; nowadays, processes more or less mandate that as well, at least for some layers (and low level one such as diffusions and poly are the first to get the constraints).
Two remarks about your layout:
I'd not worry about the top spacing on the well, standard cells are often "vertically" mirrored (so the well of two adjacent rows are abutted, sometimes sharing the power rail).
I'd worry about how to route some signal to the poly. You'll want to drop vias on them, and thus the minimum spacing for poly may not be enough.
|
H: How do I solder this tiny QFN chip
I am not very experienced with soldering. I have a basic soldering iron with a new tip, and a third hand.
Last time I tried soldering wires to a ble chip that looked like this, I ruined two chips in the process and gave up. Those were not cheap.
Now I want to solder this QFN chip but I want to have the right tools and skills for the job.
Perhaps I don't even need to solder, all I want is to connect some of the pins of the chip to a bread board. If there is another way to do that without soldering, I would prefer that.
I am a novice in this area. Any help, guidelines or reference to tutorials for beginners would be much appreciated.
I just want to know what is the best way, that is relatively safe (so I won't destroy the chip), to get it on a bread board.
Thanks!
AI: I would suggest to buy a QFN to DIP adapter, something like this.
Then, you can use air reflow or solder with an iron. I solder all 0.5mm pitch components, such as CPLDs or FPGAs with a good soldering iron using a small (thin) tip.
However, it might not fit well into your breadboard since there are two parallel rows on each side. What I usually do is solder DIP female pin headers
on this board and then use wires to connect it to the bread brad.
|
H: Are IC sockets suitable for mains voltage?
I need to derive a low-voltage galvanically isolated 50 Hz signal from 230 V mains. I'll use an opto-isolator for this. I'd like to use IC sockets for all ICs in this personal one-off project.
Opto-isolators are typically suitable for mains voltage, being rated for thousands of volts of isolation between the diode and the transistor. But are DIP IC sockets suitable for mains voltages?
I know IC sockets are made of plastic, but I preferred to ask rather than possibly compromise isolation. I don't think there are any datasheets I could check either.
AI: I just grabbed one socket at random on Farnell UK, and got this drawing datasheet. In it is this little bit of text:
ELECTRICAL:
Contact Resistance: 10 milliohms Max
Contact Rating: 3 Amps
Capacitance: 1.0pF per MIL-STD-202, Method 305
Insulation Resistance: 5000 Ohms Min @ 500 VDC Per MIL-STD-1344, Method 3003.1
Dielectric Withstanding Voltage: 1000 Volts (RMS) Per MIL-STD-1344, Method 3001.1
So I would conclude from that two things:
Datasheets with the relevant information in them are available if you look, and
Yes, that one would be OK for mains at low currents.
Besides, you'll have a resistor there too, right, which would mean you'd end up with maybe 2V across the LED anyway?
By the way, MIL-STD-1344A Method 3001.1 states:
PURPOSE. The purpose of this test is to prove that a given electrical connector or coaxial contacts can operate safely at its rated voltage and withstand momentary overpotentials due to switching, surges, and other similar phenomena. The dielectric withstanding voltage shall be established as 75 percent of the minimum breakdown voltage of the connector or coaxial contacts. It is suggested that the operating voltage of the connector or coaxial contacts be established as one-third of the dielectric withstanding voltage.
From that I can tell that the maximum normal operating voltage of that socket would be 333V RMS.
For clarification on the insulation resistance, Method 3003.1 states:
PURPOSE. The purpose of this test is to establish the methods and procedures to be followed in determining the resistance offered by the insulation materials and the various seals of a connector or coaxial contacts to a direct current potential tending to produce a leakage of current through or on the surface of these members.
So it's intentionally making the insulation "break down" and testing the resistance during that catastrophic event.
Addendum: Don't sue me if I'm wrong.
|
H: On-Board connection of ethernet transceivers
Is it possible to connect two 1000-BaseT transceivers with each other? I have two transceivers, each of them has 4 twisted pairs that actually are meant to be connected to an RJ45 connector including magnetics. Is there anything wrong with making on-board connections between ethernet transceivers?
AI: You may have some trouble if you don't provide a resistive padding network between the two ports when you cross tie them, to simulate the damping you'd normally get with a length of cable / transmission line, and provide enough attenuation to avoid saturating the magnetics. I have not done this with 1000 speeds but I can tell you of several occasions where I've cross connected two 100-Base-T ports, and found that anything less than about 1/2 meter of cable produced unreliable results. 1000-Base-T will surely be even more problematic. To cross connect them "on-board", you will likely have to have "T" pads pon each leg of each differential pair, and at that speed will have to be mindful of the transmission line characteristics of your PC traces. Now all this is worst case! Depending on the magnetics and filtering already on board to interface to the outside world, you may get lucky, or you may find that one resistor on each leg will do (though you'll still need to be careful of your trace layout!). Finally, if you are scratch laying out a board here, you will likely find that the manufacturer of the transceiver has guidelines for simpler direct coupling, when done before the "outside world" interface. There's a little black magic here sometimes, so I'll end by wishing you luck.
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H: Impedance of waveguides shorter than 1/10 of wavelength
I read already several times that it is a common rule of thumb, that matching the impedance of a waveguide to the external network impedance is only necessary for waveguides longer than 1/10 of the wavelength of the incident signal. Is that true? And why is that so? Can someone give me a physical science basis for why that rule of thumb is true? Maybe someone knows literature where this rule is confirmed?
Thanks a lot in advance!
AI: A rule of thumb cannot really be true or false. It does not belong to science, but to to engineering or practice. So it can be useful or not useful. The basic idea, at an intuitive level is that a short waveguide will not affect the signal much, because the reflection gets back to the source before the source phase has changed much (recall that for a sine wave, phase advances linearly at a constant rate with time). The big problems caused by reflections have to do with creating minima and maxima in space on the waveguide and self cancellation associated with that.
In digital circuits, it is similar, but it is the rise and fall time that matter, not the frequency. If the rise/fall time is long compared to the waveguide flight time, then impedance matching is not needed. Because the reflection will get back to the driving source while the edge is still changing. So in other words, the source feels the load, even though there is a mismatch at the transmission line.
Another way to look at it is this. (This is highly non-technical.) When a source puts energy into a waveguide, it does not know what the load looks like. It only knows what the waveguide looks like. It does not receive any feedback from the load until energy reaches the load, reflects, and comes back to the source. If the waveguide is long, and the mismatch is large, then the feedback, when it arrives, may be far out of phase with the source. This can cause big problems. But if the waveguide is short, the feedback will not be far out of phase, and all will be well, even if the mismatch is larger. And if the load is perfectly matched to the waveguide, then there will be no reflection, no feedback, and all will be well.
One last thing. This has to do with RF propagation in the presence of obstacles. In order for an RF wave in space to be reflected (or absorbed, for that matter), you need an object of a certain size with respect to the wavelength. Longer wavelengths tend to refract around small objects. This happens with waveguides also. If the waveguide is "small" the energy sort of refracts around it.
|
H: Type of switch for AC power cord?
I have a power supply that has only screw terminals for its AC mains input. Currently I'm using a power cord from a computer that I cut the female end off of and attached fork terminals to (live, neutral, and ground). It works fine but now I'd like to add a rocker-type switch to the cord so I don't have to unplug it whenever I turn it off.
Is it better to use a DPST-type switch to simultaneously connect/disconnect the live and neutral wires or is a SPST-type switch fine? If an SPST is ok, does convention and/or code prefer attaching it to the live or neutral wire?
AI: ALWAYS switch the live wire(s). If you only switch the neutral, then the entire circuit becomes live when switched off.
Switching the neutral also can add some safety in case the outlet is wired backwards. It would also allow you to give it 120-0-120 split phase later on (240v total), if it's rated for that.
Do NOT switch the ground, but you probably knew that.
In case you didn't know, neutral is actually the center tap of the utility transformer outside and is (supposed to be) connected to ground (dirt) in the breaker box and nowhere else. This is why it's okay to leave the neutral connected in most cases. However, don't be tempted to use ground to carry current just because it goes to the same place. Neutral is there because the current that it carries causes it to not be ground anymore once it leaves the breaker box.
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H: Does a Connector With Multiple GND Pins Make a GND Loop?
There are some cable standards that have multiple GND pins on the connector proper. A good example of this is the SATA connector (it has 3 of them).
In reality, each GND pin has a slightly different impedance, due to varying factors: connection quality, cable quality, cable age, etc.
Wouldn't these mismatched impedances form a GND loop? Wouldn't it be better to have a single GND pin (of larger gauge if more current is needed)?
And if it is a GND loop, why are cables wired this way?
AI: In practice the impedance difference isn't enough to cause a problem. Multiple smaller diameter conductors improve the impedance over a single larger conductor because of skin effect. Also, the ground conductors can serve a a shield between other conductors that may be carrying fast signals and could otherwise couple capacitively into an adjacent signal conductor.
|
H: Inrush Thermistor Bypassing
Hi I want to bypass an Inrush Limiter Thermistor. It is between the rectifying bridge and the smoothing capacitors, I was considering using a solid state device.
After the rectifer current only flows in one direction, so I considered using a mosfet because I have good quality ones lying around. However, would the charged capacitors maintain a reverse voltage on the mosfet when the AC wave goes down? In such case would a mosfet be unsuitable?
Then my next choice would be an SCR/Triac right?
p.s.: voltage is 12V to 15V AC, 4A max, I have 6600uF of capacitance.
AI: The rectifier doesn't enforce a decrease in voltage, only that the output is greater than or equal to the input minus a diode drop or two. Otherwise the caps wouldn't do much except possibly blow up from excessive ripple.
If you leave the FET on, then it's basically a low-value resistor that can pass current in both directions. Might as well call it a wire unless you're really concerned about it. To keep it on, you simply need a gate-source voltage that satisfies the threshold.
When the FET is off, it theoretically works like an open switch to both polarities...except for the parasitic diode in parallel that's impossible to get rid of. So you'll orient the FET so that the diode will block the normal flow of current and choose the channel type to control it conveniently given that orientation and which rail it's on.
Seems to me like it ought to work. I assume you're going to start with it off, to let the thermistor do its job of limiting inrush, then turn it on and leave it on?
Thinking through several configurations in my head, I think you'll be stuck with the gate referenced to the line side of the thermistor instead of the load side, unless you can boost it beyond the normal supply rails. But if you put a resistor between gate and source to hold it off and then pull it to the opposite supply rail to turn it on, you should be good. As long as the controlling circuit can handle the full, unfiltered rectifier while the main caps charge.
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H: Is it possible for the transfer function of an RLC system to have zeros other than at the origin?
I could not find a counterexample to the claim that the transfer function of an RLC system can only have zeros at the origin. Is this a true statement?
AI: simulate this circuit – Schematic created using CircuitLab
One pole, one zero. Neither one is at the origin.
Or, even simpler, if you're willing to consider a transimpedance transfer function:
simulate this circuit
The transimpedance (\$v_{out}/i_{in}\$) has just one zero, and it's not at the origin.
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H: momentary to on/off switch for 12v
I got some oem switches and I want to mod them into light switches.
Here is my situation:
I would like to use the oem switch since it has illumination and button that matches the car.I have already located the illuminations and found out the switch is momentary.
I'd want them to operated as on/off switches.
Here is the diagram for the lights and the included switch:
https://dl.dropboxusercontent.com/u/6569565/Forester/2014-12-09%20201.jpg
The momentary switch has 2 wires, but the included switch has 3, + - and ground.
So far I've found latch relay and ic jk flip flop would work, but they are too complex (I can't seem to find the right diagram for my needs). Are there any pre made relay for my purpose, 12v?
Edit by Kamil:
I've found this one on the net, but it's for 5V: link
and can someone list the parts that are in this circuit?
Mainly the spec for the jk flipflop? For 12v tho.
AI: This does not use a relay but a FET, seems to tolerate your voltage needs (from 4.5V to 20V). You have to check if 10A max is ok for your application.
http://www.pololu.com/product/750
If you bypass the push button with your momentary switch you should have what you need.
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H: AD620 with load cell help!
I have bought a 200kg load cell and an AD620 in-amp. I only want to use 100kg as the maximum weight capacity. I want to power the load cell and the in-amp from the 5v pin of the arduino. The seller can't give me the specifications of the load cell so i'm actually having some difficulty computing for the gain.
I want an output swing of about 0 - 5V from the in-amp so i can utilize the 10-bit ADC resolution of the arduino with the default 5v reference.
Do I have to use a dual +-5V supply to have an output swing of 0-5V? What could I connect to the reference pin of the in-amp if i only have a single supply as I mentioned earlier.
I would really appreciate your help, this is for my thesis.
-----------------------------------UPDATE--------------------------------------
After I have read the datasheet and some books about amplifiers, I have tried to make a circuit so I can check if I could get the -Vs+1.1 to +Vs-1.2 output swing of the Ad620. Below is the circuit:
I have referenced the REF pin of the AD620 to half the supply by connecting it to the
output of the LM741 op amp with two 10k resistors on the non-inverting pin. After testing
some load and testing some gain resistor(as i have said earlier, the seller didn't give me the datasheet of the load cell so i dont know exactly what the exact sensitivity is), I have read an output swing of approximately half of my supply to 3.6V. That would be like 2.2V(because when i test the voltage supply from the arduino its like 4.4V) to 3.6V. Am I getting the right output from the AD620?
AI: You don't need a dual supply, but you'll need more design work than you seem aware of. You can use the AD620 with a single 5 volt supply since the load cell outputs ought to be about 2.5 volts and are within input limits. Set the reference to 1.1 volts. The ouput will then be restricted (according to the data sheet - and you DO have a copy of the data sheet and you HAVE tried to understand it, right?) to the range 1.1 to 3.7 volts. If you're willing to deal with 200 gram resolution you can stop right there.
If not, you need a second amplifier / offset generator. But first you would set the AD620 reference to something useful like 1.5 volts using a pair of resistors, and the gain for a 2 volt swing. Then, using a rail-to-rail op amp you would make a gain of 2.5 difference amplifier, and add in a 1.5 volt offset. The result would be (nominally) a 0 to 5 volt output. And before you ask - no, I won't give you a design. Do some research first. Google "differential amplifier" and actually try to understand what you read. Make a preliminary design and mess around with it. If you can't get it to work, describe your problem in detail on another question. Folks, including me, are glad to help - but I'm not going to do your work for you.
There is another consideration. First, you want to set your zero point at very slightly above zero volts. You should be able to check your data at zero load and see a little bit of noise. If the output of the amplifier is dead zero you know that your zero load level is less than 0 volts, but you don't know how much less. You can always subtract out a known zero offset, but there is no way to recover a completely unknown quantity. Losing a little bit of dynamic range or resolution is much less of a problem than not knowing what your zero point is.
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H: Why a MOSFET in accumulation mode is not conducting?
In accumulation mode, the channel is not conducting, whereas in inversion mode it is conduting. But if in both cases I have free charge carriers in the channel, why isn't there conduction in both cases?
I know that the energy band diagram between the semiconductor and the oxide has a barrier for, say holes, and an accumulation well for electrons, but why would this have any influence on any barrier between the semiconductor and the source/drain?
(source)
AI: Take NMOS as example, it has p-type body, and n-type drain and source.
If you apply a negative voltage on the gate, holes are drawn to the semiconductor-insulator interface. A conducting surface extends from the bulk all the way to the interface. But because both source and drain are n-type, in accumulation mode, it's like a npn transistor (source and drain are insulated by two reverse biased pn junctions), electrons in source can't go to drain. That is, there is no conduction channel formed.
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H: Independent voltage sources using voltage regulators?
I'm trying to design a variable power supply, and need some clarification regarding using voltage regulators in parallel as independent voltage sources.
As this is a power supply, one of the outputs may not be used.
My question is, if say V2 is set to 1.2V (the minimum voltage), will it sink too much current so that V1 will not be able to draw 10W (ideally)?
The voltage regulators will probably be LM317's and not intended to be tied together.
AI: V2 will sink very little current unless there's a load attached (similar for V1).
Your two voltage regulators are in parallel, so their branch currents add (see: Kirchhoff's Current Law).
So if V2 is attached to a load which will draw 0.4A at 1.2V, then that means V1 can draw at most 0.4A regardless of what voltage V1 is set to.
Note that linear regulators (like the LM317) have a drop-out voltage, so your output channels will only be able to regulate up to about 2V below the input voltage (the 12V output from the boost converter).
V1 will not be able to draw 10W because the single boost converter is supplying the two regulators; it is only rated to supply 10W total. There is 4.8W drawn by V2 (12V*0.4A, note that this is 12V because V2 is a linear regulator), thus V1 is limited to 5.2W. edit: However, this limit is above the 4.8W limit of what V1 nominally could draw because of the specifications on the output limits of 12V and 0.4A. So even if V2 was not present, V1 could never deliver 10W.
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H: Why use a 0 ohm resistor?
My customer's schematic uses a 0 ohm resistor for connecting analog(AGND) and digital (DGND). I think it is for testing, current measurement , fuse, jumper, test point etc but is there another reason?
AI: In a mixed signal system it's recommended to join AGND and DGND close to the mixed-signal IC, often the one performing the A-D function. The reason for this is to reduce differential noise in the mixed-signal IC. See the diagram below. The objective of minimising noise coupling from B to A is aided by joining the GNDs on a low-impedance ground plane. In a system with both an AGND plane and a DGND plane it is common to connect both the planes at this point with a link to minimise differential voltages. Sometimes this link is a wire with a ferrite bead, sometimes it's a zero-ohm resistor or even just a narrow PCB trace.
See a good description here.
As for the Zero Ohm resistor. Think of it as a link that is easily placed by a pick and place machine during manufacture and also easily removable for experimentation on prototypes, if required. Because it's a physical component, the ground plane connection is easily identifiable in PCB design tools which makes it easier for the designer and layout engineers to communicate intent.
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H: Final voltage of two parallel (switched) capacitors
I am trying to obtain a resistance-circuit equivalent to a switched-capacitor circuit. It is the first stage of a ladder filter.
simulate this circuit – Schematic created using CircuitLab
Two switched capacitor C2 and C3 are charged (during the current semi-period of the clock) to different voltages: C3 is charged to - say - $$V_2 - V_{in}$$ (V2 is the output of the following stage), while C2 is charged to V1 (V1 is considered as the output of the actual stage).
But during the successive semi-period of the clock, the switches put the capacitors C2 and C3 in a parallel configuration. Do they discharge themselves until an intermediate and common voltage?
And does ground play some role? The left terminal of C2 always remains connected to ground.
The circuit above should be the switched capacitor realization of the following first stage of a ladder filter.
The op-amp is a differential inverting integrator, with unity resistances as its inputs realized by the switches and C3. It is used to realize the relation
$$V_1 = \displaystyle - \frac{1}{sC_1} (I_2 - I_{R_1}) = - \frac{1}{sC_1} \left( I_2 - \frac{V_{in} - V_1}{R_1} \right)$$
(I2 is the current exiting from V1 towards the second stage, which contains an inductor, L2)
simulate this circuit
I have read the consideration in this question and I agree, but here the problem is more conceptual. That is: how can I correctly draw the first circuit by substituting all the switched capacitors with their equivalent resistances?
AI: Both capacitors have accumulated a certain amount of charge (and it does not matter if the corresponding voltages are different). If both capacitors act in parallel (one side grounded and the other side connected to the inverting opamp terminal which is on virtual ground) the charge is transferred completely (opamp ideal) to the feedback capacitor.
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H: Thevenin Voltage of the circuit
Suppose I have the following circuit, How do I compute Vth using the node voltages?
I simulated a circuit similar to this one with values.
I got:
Vnode1 = 5.93 kV
Vnode2 = 12.4 kV
Vnode3 = 5.64 kV
With Isc = 1.85 A and Rth = 1293.53 ohms, I got Vth = 2393.65 V.
Playing with the node voltages' values does not seem to be getting a 2393.65 V.
Sorry I used the wrong meter for measuring Rth it should be 3661.97 ohms, I know now
AI: $$V_{th}=V_{\text{node3}} - V_{\text{node2}}$$
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H: Is it ok to drive a stepper motor below it's rated current?
I got two of these:
Frame size 42 x 42mm - NEMA 17
1.8 degree step angle
Length 47mm
Holding torque 44 N.cm (4.4kg.cm, 62oz.in)
Voltage 2.8V
Current/Phase 1.68A
Resistance/Phase 1.65ohm
Inductance/Phase 2.8mH
Inertia 68g.cm
Bipolar, 4-wire
I'm using a micro controller board. I've been looking on different ways to drive the motors. For example this one: Big Easy Driver.
But most driver boards I looked at has a limit of around 1.4A before they get overheated. Is it ok to drive these motors at 1.4A? Or should I find any other Driver/board/chip/controller?
I'm open to any suggestions of driver/setup to drive these motors via usb communication...
Thanks :)
AI: I had the exact same motors for an Arduino Uno project. For maximum torque I used this (TB6560 3A Single-axis Stepper Motor Driver Controller Board).
You can buy it on ebay cheaper.
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H: Driving a stepper motor to a set force
I am trying to drive a Linear Actuator (stepper motor with a lead screw) to drive until a force of 15 pounds is reached then stop. I am having trouble finding a good method to do this (I am new to stepper motors) can anyone point me in the right direction?
I am thinking of getting the motor with an encoder and adjusting a voltage/current until it will stall at 15 pounds and detecting that it did not move using the encoder then stopping the motor, is this a good way to go about this?
AI: If you're going to put a encoder on the stepper motor, then you might as well not use a stepper motor. The point of a stepper is to let you know accurate position open loop. If you're going to close the loop, then you can get other motors that are cheaper, more efficient, and smaller at the same torque.
A brushless DC motor might be a good choice. You inherently have position feedback, so you know where the motor is and can tell it stalled. The current to generate the desired 15 pounds at the end of the mechanism will also be fairly predictable and consistant between units after having been measured once.
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H: inverted input for adc
I am using ADC122S625 (Datasheet: http://www.ti.com/lit/ds/symlink/adc122s625.pdf).
The ADC has a differential input per channel. My signal is from a RF devide with 3V peak to peak and 1.5V DC offset. I want to use the ADC in Single-Ended Input Operation. So I have choosen a Reference Voltage of 1.5V. Now my question is what should I use for the Inverted ADC input?
First I thought I will pull it to Ground as a normal Single input ADC would use 0 to Va input range. But after reading the Datasheet (page. 15) it seems that I need to feed the Vref (1.5V) to the inverted inputs.
From Datasheet (copied)::
"Single-Ended Input Operation
For single-ended operation, the non-inverting inputs of the ADC122S625 can be driven with a signal that has a maximum to minimum value range that is equal to or less than twice the reference voltage. The inverting inputs should be biased at a stable voltage that is halfway between these maximum and minimum values. In order to utilize the entire dynamic range of the ADC122S625, the reference voltage is limited at VA / 2. This allows the
non-inverting inputs the maximum swing range of ground to VA. Figure 35 shows the ADC122S625 being driven by a full-scale single-ended source. Even though the design of the ADC122S625 is optimized for a differential input, there is very little performance degradation while operating the ADC122S625 in single-ended fashion."
Please suggest to clear my understanding about the Inverted input.
AI: On an ADC, the reference voltage Vref is used to establish the full scale voltage, not some middle-ish setpoint. If you're expecting an input voltage of greater than 1.5V, and you'd like the ADC to sample the difference between the input voltage and 1.5V, yes, you would use differential mode, and send 1.5 V to the negative input.
Vref may also need to be set, depending on the ADC (very often there is a default value and the use of the Vref terminal is set through configuration commands). If you want to get the best resolution out of your ADC, you would set Vref to the largest difference between your signal and 1.5V that you expect. If you're not concerned about resolution, you might just use Vcc or the default value (but you should do some napkin calculations to make sure your resolution is good enough)
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H: Analyzing reflection and transmission without a VNA
The wikipedia page for network analyzers mentions "reflection and transmission of electrical networks are easy to measure at high frequencies" but doesn't give any hint on how this is done or what it is that's called "high frequencies" there (I'm guessing it's the GHz spectrum...)
Does this means I can do without a VNA in such cases (using just, say, a spectrum analyzer?)
Could someone elaborate?
AI: I'm going to assume you're familiar with S-Parameters. S-Parameters change for different frequencies. When using a VNA, you will be testing the circuit at a specific operating frequency. This website shows how you could crudely measure the S-Parameters. A VNA will do the exact same thing in a much more calibrated manner. Thus there is no need to use a spectrum analyzer.
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H: battery balancing
I am using a balancing circuit for a 3S (3 series 11.1V) li pol battery. The chip I am using is the S8204B. I am unable to understand the datasheet properly. I have basically 3 components in my system -
1) Li pol charger circuitry, 2) 3S li pol battery and 3) Load.
The datasheet states EB+ and EB-. What do they stand for.
How do I connect the 3 modules.
I am attaching 2 images which I feel. But, I can find flaws with both. Can anyone suggest the optimal usage of this chip pls. The images are attached -
datasheet - http://datasheet.sii-ic.com/en/battery_protection/S8204B_E.pdf
AI: The right way to connect your tree cells is in the attached image here, the IC needs to protect your tree cells from overcurrent and overcharge and short circuit and cut the connection between the charger and the battery in case of battery failure of charge or discharge phases.
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H: transistor level design of Op-amps
How do we realize the design of a simple Op-amp with Bipolar Junction Transistors or MOS Field Effect Transistors alone? I mean I understand the need for differential amplifiers for providing a differential mode gain and I understand the requirement of Darlington pair as voltage amplifiers of the differential gain, but what about the others, how do they integrate the common mode gain into the equation as well.
AI: The differential amplifier is what gives you the common-mode rejection. Differential gain implies common-mode rejection.
The high input impedance also comes from the input stage. If FETs are used, the high resistance is a property of the gate of the FET. BJTs multiply the resistance of the bias current source, which is pretty high to begin with. There's nothing particularly exotic about this.
Low output impedance can be obtained by using a common collector or common drain amplifier for the output stage.
The inverting input follows the voltage of the non-inverting input when there's negative feedback. This happens because the op amp has a very high differential gain. The basic feedback equation is:
$$G = \frac{A}{1 + A\beta}$$
G is the closed-loop gain -- for instance, the gain of an inverting amplifier configuration. A is the open-loop gain, which is the differential gain of the voltage between the two inputs. \$\beta\$ is the feedback ratio, which is the fraction of the output voltage that gets fed back to the inverting input. When A is very large, the equation reduces to:
$$G = \frac{1}{\beta}$$
That's all an op amp is -- a differential amplifier with a very large gain and a large input impedance. Everything else is feedback.
If you want to learn more about op amp construction, I'd suggest learning about basic transistor amplifiers first. This will give you a better understanding of input/output impedance, gain, and the role of feedback.
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H: How to wire subwoofer to 2.0 channel amplifier
How to wire the sub-woofer amp to existing 2 channel amplifier?
I have dual LM386 for left and right channel and I would like to connect a sub-woofer.
where should I wire the sub ?
Is it in the right channel or the left channel and before LM386 or after or combine both channel ? (The sub will be use different IC and power source)
simulate this circuit – Schematic created using CircuitLab
AI: You should mix channels at line level and then amplify each of them with individual amplifier.
Take a look at this article to get some ideas on how to mix audio channels: https://sound-au.com/project18.htm
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H: what do you connect to IN+ and IN- for ADC differential input configuration?
I was trying to understand how to read analog inputs on a raspberry pi. I found this video post and I think I understood how it works.
https://www.youtube.com/watch?v=oW0mTwFck_c
This video uses a potentiometer and read its analog outputs through MCP3004 microchip.
In this video, he says to use "1" for the single / diff control bit, and he didn't explain much about the differential input. I was curious, and after some searches, I found that it was used to reduce noises when to read analog outputs.
Now, when I look at this diagram,
http://i.gyazo.com/f86370f39c199b4b8a4fe345b1486b09.png
I understand how to use CH1, 2, 3, 4 for single input type (you just connect analog sensor output to one of them), but for the differential, it says IN+ or IN-, and this gets me really confused.
What do I need to connect for the + and -?
Can anybody explain what to do when you have a potentiometer to read just like the video example?
AI: As the name suggests, a differential ADC is used to measure the difference between two signals.
For a simple potentiometer, there isn't really two different signals to measure, so you're measuring the difference between the wiper and ground.
simulate this circuit – Schematic created using CircuitLab
When working in single-ended mode the - input of the ADC is connected to ground internally for you, so you basically end up with the same circuit anyway.
Now, the fun comes when you have a more complex circuit. If your potentiometer forms just part of a chain of resistances, and you need to know exactly the voltage across just the potentiometer, then the differential ADC comes in very handy:
simulate this circuit
Now with the ADC you are measuring the difference just between the wiper and the lower point of the potentiometer. The other resistors are then ignored by the ADC.
Any strange fluctuations in the voltages in that resistor network are also ignored, since the same fluctuations will be proportionally the same throughout - at both the wiper and at the lower side of the ADC, so they will not be sensed by the ADC.
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H: How to connect a four route MOSFET to multiple power sources?
I have this four channel MOSFET switch:
I have connected one RGB LED-strip to this, and controlling it from an Arduino, and this works great.
The problem is that I need to control four of these LED-strips, and they each need 12V. So I wan't to remove the 12V from connection to the board, and connect it directly to the LED's, and then control the RGB values on the LEDs from the board (the will all be controlled identically, so the are connected together). How would I go about doing this?
When I connected one LED-strip, I did what is described in this tutorial: http://arduino-info.wikispaces.com/Brick-4ChannelPowerFetSwitch
But I need to wire it more like this illustration, where the power is directly connected to the LED, so that I can control multiple LED-strips at once:
AI: Looking at the device schematic on your linked page, I see that the power + terminal is directly connected to each output + terminal, as well as the internal circuitry. Therefore, you are free to connect the plus side of each load (LED strip) to either the output + terminal or the plus side of the 12V power source.
Just make sure that you do connect the power terminals of your MOSFET board, even if you don't use the plus output terminals.
Edit: the OP clarified that he wants to use a separate 12V source for each LED strip. This is fine. You can do the following:
Connect all negative leads (from power supplies) together and to the MOSFET power input connector.
Connect each positive lead to one LED strip. Chose one of the power supplies and also connect its positive lead to the MOSFET board power connector.
Each LED strip negative lead goes to the negative side of the corresponding board output.
Do not connect all of the positive leads together!
Each power supply will power one LED strip. One of the supplies will also power the board (very little power draw).
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H: What are the AC characteristics of a battery?
I'm planning on building a single cell AA NiMH battery charger and in the process I decided that I must also build a battery simulator to help me debug the charger. In my research, the best simulator circuit I came across was the one described in the Linear Technologies Application Note 58, Appendix B (page 35), which relevant part of its schematic is below.
In the circuit description, the AN says:
R10 and C5 simulate the AC characteristics of the battery.
Well, I have no idea what that means. I did search the net for a description but couldn't find anything useful.
So, my questions are:
What exactly are the AC characteristics of a battery?
Are there AC characteristics that are particular to NiMH cells?
Out of curiosity, what happens if I don't add those components to my simulator?
AI: The "AC characteristics" have to do with how the battery responds to rapid changes in load current or charging current.
The simple fact is that a battery is NOT "just" as voltage source and a series resistor. The electro-chemical reactions inside the battery take time. Thus, you can apply a sudden charging current and the terminal voltage will take some time to settle to the steady voltage it will have.
This is particularly important when you use a PWM charging current (that is, pulsed, with a varying on-time). In this case, the AC characteristics are particularly important.
I do not know how these characteristics differ between, say, lead-acid and NiMH or LiIon.
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H: How to generate Duty Cycle from DC without 555
I am currently working on a simple circuit which includes creating duty cycle from DC. Also, I need to change it's pulse width with time. I have decided to use op-amp relaxation oscillator to produce square waves but I have no idea how to chance it's width. I am allowed to use resistors, capacitors, inductors, diodes, OPAPs, transistors and relays.
My question is how can I create a circuit which produces duty cycle and it's pulse width is changing with time as shown at the picture above.
AI: Use the relaxation oscillator to make a ramp or triangle wave and then compare that wave's voltage to a DC voltage that you can control (for example with a potentiometer).
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H: Understanding capacitor usage in the Sparkfun arduino
In the schematic for the Sparkfun Arduino mini pro 3.3v https://cdn.sparkfun.com/datasheets/Dev/Arduino/Boards/Arduino-Pro-Mini-v14.pdf
there's a 0.1uF capacitor (C3) just left of the atmega ground pins going from vcc to gnd. In the upper left corner on the power regulator there's also a 0.1uF (C10) cap from the output vcc to gnd which should be essentially the same thing.
What is the design rationale here? I assume they're doing this for power smoothing but why not have a 0.2uF cap or two parallel 0.1uF caps on the regulator output? Are they trying to say that the other one should be closer to the atmega?
AI: That is a decoupling capacitor for the microcontroller. Yes, it is meant to be as close to the VCC and GND pins as possible. Noise can be picked up on the trace from between the regulator and the microcontroller. It is most likely a ceramic capacitor, which has a very low ESR(equivalent series resistance) rating for good decoupling. Smaller capacitance ceramic capacitors have a lower ESR than high capacitance versions generally. The lower the ESR, the better it is at shunting high frequency noise on the VCC rail to the device.
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H: How to interface two wire & three wire SPI device?
ADC AD9266 Here is the datasheet of ADC AD9266. page no 25 of it is SPI
I'm working on a Project where I have to interface my ADC with MCU 8051. The Problem I encountered with is my ADC supports two wire SPI mode ( SCLK , SDIO pins ) while my MCU has three wire SPI configuration ( SCLK , MISO , MOSI ).
How would I connect my MISO & MOSI pins to single SDIO pin..
My Actual problem is I have to program ADC first to through SPI Port for which I need my MCU to act as Master & connect MOSI to SDIO & During first instruction ADC will be programmed but after that I need to collect the data from ADC so ADIO must be connected to MISO. What is the remedy ?
thank you all in advance.
AI: The "SPI" in your microcontroller stands for "Serial Perpheral Interface", which is an industry standard I/O port originally defined by Motorola. But the "SPI" in the Analog Devices' AD converter stands for "Serial Port Interface", which is not the same as the SPI in your microcontroller. It's Analog's own definition for a digital interface.
Analog has written an application notes on how to communicate with this port. It can be found here:
AN-877 Interfacing to High Speed ADCs via SPI:
http://www.analog.com/static/imported-files/application_notes/56755538964965031881813AN_877.pdf
You might be able to use your microcontroller's SPI port for this, at least partly - the Atmel protocol seems at least somewhat compatible with Serial Peripheral Interface. You could connect your microcontrollers MISO port to the Atmel's SDIO port and then bit-bang the instruction header from your microcontroller to the ADC and then use the hardware SPI to read the data. Or you perhaps could connect both MOSI and MISO together in your MCU and use the pin's direction and mode bits (input-or-output, gpio-or-peripheral) to essentially disable the MOSI pin when you're reading data and MISO pin when you're writing data.
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H: Why do we need a ramp for stepper motor?
I am a newbie and trying to understand how i can run a stepper motor. The concept i had in mind was that steppers need digital pulses to run, and i tried it out too. I was able to run the stepper i am using very easily. But lately I came across a link where they have used a ramp for starting a stepper justifying it by saying that
"if we try to start the stepper motor with fast pulses then it just sits there and hums away not turning, We need to start the stepper off slowly and gradually increase the speed of the steps (ramping up)."
Source:http://www.societyofrobots.com/member_tutorials/book/export/html/314
My question is why does the stepper then starts up with regular square pulses? Why do we need a ramp? All the other forums and tutorial always talk about providing digital pulses to the stepper for starting it up, why is the concept of ramp generation not discussed there? Is it a bad practice to run stepper with digital pulses?
AI: When the controller steps the motor, the rotor has to move far enough (angle) that when the next coil (or coil pair) is energized it will pull the rotor in the correct direction. If the rotor has not moved through enough angle, then the coils will pull the rotor backwards and the motor just sits there and buzzes. You can find many illustrations and animations online that explain how normal operation works- imagine if the rotor only moved a fraction of the intended amount.
The rotor, shaft, and whatever is connected to the shaft all have inertia and there is friction of various kinds.
The maximum speed the stepper can turn the shaft is related to the torque available from the motor and the torque required to turn the shaft (available torque drops as RPM increases, and the required torque generally increases as the RPMs increase). That's not directly related to the inertia.
To actually get to the maximum (or some fraction thereof) you can only accelerate the RPM so fast without missing steps. The maximum acceleration is related to the inertia and the excess available torque at a given RPM. If the motor is doing all it can just to keep up with the current RPM then you can no longer accelerate. If the RPM are low enough, you don't need to ramp it up, you can simply tell it to step, but that will typically be only a fraction of the RPM the motor is capable of. Often linear ramps are used for simplicity, but a more convex curve would be optimal.
Here is a motor torque curve from Oriental Motor (a major Japanese maker):
To predict the maximum rate of acceleration you need to know the torque and the mass moment of inertia. If you exceed the maximum rate of acceleration at a given loading then the motor will lose steps, so a reasonable safety margin is a good idea.
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H: Why is the LT1054 circuit providing far more than double voltage?
I created a LT1054 bipolar doubler circuit. I am using Linear Technology's chip.
My supply source is measured at 6.1V. My finished circuit is providing -16.2V and +21.5V.
Besides being far beyond double, there is quite a difference.
I have never worked with charge pumps before, so I am unsure if this is to be expected, or did I do something wrong. I have went over my circuit several times and it looks fine to me.
UPDATE
Read the accepted answer for the solution. With tantalums, I now achieve -12v and +13v from the unregulated circuit under 15mA load on each rail using a 6v source. Entirely sufficient for my needs. Below is the final layout I used on perfboard (in case anyone wants to use it!)
AI: First of all you should never measure the output of an unregulated supply without a load. Try to choose a load that is close as possible to the final load you think the circuit will see.
From the datasheet for the LT1054, it appears the capacitor selection is rather critical. In particular, under Capacitor Selection on page 8, it has specific recommendations for C\$_{IN}\$ and C\$_{OUT}\$.
Ironically, in the schematic you copied from page 11 of the datasheet, C\$_{IN}\$ and C\$_{OUT}\$ are not labeled; but from the other examples it is clear that C\$_{IN}\$ is the 10 µF capacitor between CAP\$^+\$ and CAP\$^-\$, and C\$_{OUT}\$ is the 100 µF capacitor between V\$_{OUT}\$ and ground.
The datasheet first says that for unregulated circuits (like yours) the nominal values of C\$_{IN}\$ and C\$_{OUT}\$ should be equal. Clearly their example schematic for a Bipolar Supply Doubler is going against their own recommendations.
Then they recommend using tantalum capacitors with low ESR values for both C\$_{IN}\$ and C\$_{OUT}\$
What I would do, is use a 10 µF tantalum cap, like this one, with an ESR of 0.3 Ω for C\$_{IN}\$ and C\$_{OUT}\$, and then optionally add a 100 µF electrolytic capacitor (which may have 10 times the ESR value of a tantalum) in parallel with the 10 µF tantalum for capacitor C\$_{OUT}\$.
If you have the parts, you might want to use the tantalum caps for the other two 10 µF shown in the circuit, on the left side of the chip, one connected to pin CAP\$^+\$ and the other to CAP\$^-\$.
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H: Is it ok to feed the output of one LDO regulator to the input of another?
Sorry if this is a stupid question, but I am mainly working with 5V PIC circuits and now want to integrate a component (nRF24l01+) that needs a 3.3V supply.
As I have a box full of ~7V wall-warts, I normally use a 7805 or similar LDO regulator to power the circuit. Now I want to also get 3.3V without using a separate external supply.
I'm looking for guidance on the "right" way to do this. I think the options are:
Use a voltage divider on the output of my 5V regulator to get 3.3V
Use a 3.3V LDO regulator fed directly from the 7V wall-wart
Use the output of the 5V regulator as input to a 3.3V regulator
I can see that all of these would work (would they?) and that option 3 seems to waste least power, but I don't know what gotchas might arise by chaining two regulators like this.
What things do I need to consider when making this choice?
AI: Do not use a voltage divider circuit to power something like an RF transmitter, that will not work during pulsed currents as the "load" equivalent resistance drops when it needs more current, and therefore the divider will not actually "Regulate" at all.
You can do this, if you do not trust your 7805's other parallel loads, and this will probably help protect the 5V system from noise feedback from the RF system, which you may get in the #3 option. In this method, make sure both regulators have good input capacitance, and also reasonable output capacitance (follow datasheet recommendations, usually put a little extra to avoid spike brownouts which often happen, especially with RF modules).
yes, I would put the LDO after the 5V 7805's output, as long as the dropout is actually within spec. Go for one with less than 1V drop out and you should be fine. Ensure plenty of capacitance between the two regulators, and on the LDO's output stage to feed the pulsed TX currents of the NRF24.
These 7V wall warts I assume have enough output current to run your system. You just mention some 5V PIC-based circuits, which I assume are low-powered. The NRF24 is low power, but has high power bursts which can brown-out and cause things to reset (just see all the other questions on EE Stack Exchange about power issues with RF TX/RX modules hehe). To fix this, always ensure good and fast acting capacitors are available nearby, and are properly rated.
Capacitor chemistries like tantalum and ceramics are the fastest to respond to pulse currents, and have the least ESR (equivalent series resistance, this is effectively what slows down other capacitor types). A cheapo electrolytic capacitor has very high capacitance but often poor ESR characteristics, making them slow to react and therefore their "reactance" at high frequency (fast pulsed loads) means they are almost useless.
Your 3.3V system should be okay from either the 7V wall wart output or the 5V 7805 output, but like I said check the dropout, check the rating of the 3.3V LDO (some have ~6V max voltage ratings, obviously you cannot use the 7V input in this case). Also make sure current ratings for all regulators in your system can handle their respective loads, and if the 7805 is near to it's max load already it's best not to attach the LDO to it.
EDIT: I actually cover some basic things exactly like this, in a 'Seminar' thing I made for my uni's robotics club. Check it out here, in PDF format
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H: Steady State Error of controlled loop system
I am trying to calculate the steady state error of the following system but unable to do it. I have used MATLAB and calculated the steady state error to be 0.1128 but don't understand the steps that I need to do to calculate this.
Please help.
Thanks
AI: Here is how you proceed :
Reduce the system to either unity feedback system or a Single block representing the closed loop transfer function. In your case, reducing to a single block should be easy.
For a unity feedback system , as shown
Then from the diagram
E(s) = R(s) - Y(s) = R(s) - G(s)E(S)
Or
E(s) = R(s) / [ 1 + G(s)]
If you reduce it to a single block, Then
E(s) = R(s) - R(s)G(s) = R(s)[ 1 - G(s)]
If you have non unity feedback system, then
G'(s) = G(s) / [ 1 + G(s)H(s) - G(s)]
will reduce it to the form in figure.
For steady state error, you need to specify the input. 3 inputs are used :
Step with Laplace transform 1/s
Ramp with Laplace transform 1/s^2
Parabolic with Laplace transform 2/s^3
Substitute the transform of input into the equation for your error obtained in step 2.
Use the final value theorem acc to which
E(infinity) = lim s-> 0 [ s.E(s)]
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H: Control multiple servos using pic18f microcontroller?
I want multiple servos to be controlled through pic18f4550 microcontroller.
I know for a single servo I can use the following code.
unsigned int angle=0,i;
void cs_delay(unsigned int);
void main()
{
TRISB.F0=0;
while(1)
{
for(angle=0;angle<=180;angle+=45) // Loop to increase the angle by 45°
{
for(i=0;i<50;i++) // Loop to provide continuous train of pulse
{
LATB.F0=1; // Send high to control signal terninal
cs_delay(angle); // Call delay function
LATB.F0=0; // Send low to control signal terninal
Delay_ms(18);
}
}
}
}
void cs_delay(unsigned int count)
{
int j=0;
Delay_us(550); // Delay to move the servo at 0°
for(j=0;j<count;j++) // Repeat the loop equal to as much as angle
{
Delay_us(6); // Delay to displace servo by 1°
}
}
But I cannot figure out how it can be used for multiple servos..
BTW, using MikroC v8.2 for programming.
Any help?
AI: Not easily.
You see, you have written there what is known as blocking code. The PIC can't do anything else while it's processing your software PWM signal because you are using delays.
Instead you need to step away from that whole concept and instead to things based on time, not waiting.
For instance, when you get up in the morning, do you lie there awake all night staring at your clock until it's time to get up, or do you set the alarm for 7:30 then go to sleep, until the clock wakes you up?
Most PICs make it even easier, by allowing you to tie a timer to an output compare module, which will generate your PWM waveform purely in hardware. The more output compare modules and timers you have the more servos you can drive with it.
Even without using output compare, there are ways of using a timer to trigger an alarm the next time an output is due to change state. It's up to you to come up with how best to decide when that is, and change the timer's time accordingly.
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H: Bluetooth audio stream to commercial headset
I would to connect my simple audio player (Arduino + https://www.sparkfun.com/products/11125 ) to a Bluetooth headset you can buy at the market.
How can I do ? Is it possible ?
AI: Did you look at this module also on spark fun?
It has an embedded stack you just configure over its serial interface.
Description: This RN-52 Bluetooth from Roving Network is an audio
module that provides a highly integrated solution for delivering high
quality stereo audio in a small form factor with little difficulty.
This module is perfect for a project involving hands free audio for
your car, remote controlling your media center, or streaming 2-channel
audio.
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H: Safety when charging two LiPo cells in series
NOTE: I am asking this question because I am new to this subject, and I want to be sure about what I'm doing before I go out and buy parts.
I am making a really fancy watch with an OLED screen, sensors, and all those goodies, along with an arduino nano requiring 7-12V in its input in order to function. My plan is to put two 3.7V LiPo cells in series.
I'll need to charge them every so often, and of course, when I do, I don't want to interrupt power to the watch. So, I am currently following this online guide:
http://blog.zakkemble.co.uk/a-lithium-battery-charger-with-load-sharing/
(This is a tutorial to build a "... circuit [that] disconnects the battery when USB power is connected, the load will instead use power from USB. This allows the battery to charge normally without any outside disturbances.")
My question is this: is it safe to make two of these circuits, wire them up in parallel, and charge both batteries at the same time? And if that's no good, is it at least safe to charge each one individually in this series setup?
Thanks
AI: Series chargers
1 cell chargers can't be used for multiple cells in series as their charge voltage won't be enough. I don't have experience with chargers designed to charge multiple cells in series, but I assume such charger would have a separate input for each cell's thermistor if present or at least its voltage: without some kind of load balance circuit you'll end up with different voltages across your cells, so you have to make sure none is particularly stressed at the time of charging - lithium batteries are dangerous if charged improperly.
Boost converters
The usual solution (mine anyway, used it in a product no later than last friday) is to use a boost DCDC converter: if you look up the definition, you'll see it's a converter that's similar to a pump: it increases the voltage on the output. However, this is at the expense of:
Available current: the converter will only be able to handle a limited current. Although most of the time more current is better in terms of efficiency (see 2.), there will come a point when the components won't be able to dissipate enough and you won't get more out of them (or they'll heat up and burn out). If you have a particularly capable boost module, watch out for the current that it will draw on the input: even with ideal efficiency (see 2.), the input current will be higher than the output current.
Battery life: Converters, just like any circuit, have a non unitary efficiency: they dissipate some power, which means for 1 unit of power out, you'll draw more than 1 unit of power on the input. The power dissipated will draw an additional current on the input, which decreases battery life. Is it proportional to the output power? If only! Converters have efficiency curves to describe the efficiency as a function of the output power. Now, boost converters are switching converters based on pulse width modulation: they mostly dissipate power at the time of transitions. So if you need less power out, at the same frequency the efficiency will drop. Some of them have a way to adapt the frequency as well depending on the load, those are called pulse frequency modulated (PFM) and have reasonably flat efficiency curves even at low loads.
Calculations
A formula doesn't cost much:
$$Power_{in}=Power_{dissipated}+Power_{out}$$
$$\Leftrightarrow V_{in}*I_{in}=\frac{V_{out}*I_{out}}{efficiency}$$
$$\Leftrightarrow I_{in}=\frac{V_{out}*I_{out}}{efficiency* V_{in}}$$
$$BOLbatterylife=\frac{capacity\times depthofdischarge}{I_{in}}$$
BOL states for beginning of life. The deeper the discharge, the more the capacity will drop with cycles. Here capacity is in Ah => battery life in hours, the rest is SI.
Illustrations
Example of efficiency curves of a boost converter with and without PFM (source).
Illustration of waveform of a PWM+PFM [Edit: actually it seems to be PFM only. PWM would modulate the width as well] boost converter output voltage before filtering (source).
Conclusion
I would suggest using a boost converter (you can buy plug and play modules) with pulse frequency modulation (as you'll certainly be using low currents if it's a watch) and a high efficiency curve, and outputting on the Vcc/5V input of the Arduino. Not the RAW because you'll end up unnecessarily losing power in the integrated regulator as well (even more, since it's a linear regulator that is made to dissipate the difference in power). Add additional filtering (called decoupling caps here) to be sure everything's smooth (switching converters are quite noisy) though. You'll still need a single cell charger though; most of the chargers I've seen around which enable simultaneous charging are doing nothing more than connect devices directly to the battery while it's charging, but I think it all depends on the power drawn. If the power draw is ten times less than the charging current, I reckon it's fine (anyone can confirm?).
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H: Capacitance value - AC RC Circuit - Impedance Method
Here is the circuit:
simulate this circuit – Schematic created using CircuitLab
\$
V_i = \frac{8}{\sqrt 2} \angle0° V\\
V_c = \frac{6}{\sqrt 2} \angle45° V\\
R = 1000\space\Omega
\$
I'd like to know how to find the capacitance with these given values. What I've tried:
\$
V_c = V_i \times \frac{X_c}{R\space\space+\space\space X_c} \\
X_c = \frac{V_c\space R}{V_i\space\space - \space\space V_c}
\$
Here is the problem, just solving for Xc, I got a complex number with a angle different than -90°. So I forced Xc to be -90°, then when I solve for the capacitance c, I get a complex number:
\$
X_c = 1058.7141\angle 93.4716182° \\
\frac{1}{j\frac{500}{2\pi}c} = 1058.7141\angle 93.4716182° \\
c = -0.00001184768784 + j\space 7.18682779 \times 10^{-7}
\$
What am I possibly missing?
AI: It's a malformed question because with these components, the phase angle of \$V_C\$ must be \$-90^\circ\$. The only way it could be \$45^\circ\$ would be if there were also an inductance in the circuit.
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H: How does a constant current (CC) power supply regulate voltage (V) in parallel circuits?
I see that some power supplies provide a wide range of output voltages meanwhile maintaining the current.
For example: 2.7 A, 20-36 V output.
I understand that the voltage rate will depend on the end-unit consuming the power (eg., an LED chip).
What happens if the output from the PSU is divided into two parallel connections, one lead connected to an end-unit needing to use 27v, and another using 30v?
What happens internally? What's the reason why for the end result?
Example:
[[80W 2.7 A PSU with 18-30 V]] |--> (21-24) V, 1 A Diode
|--> (27-31) V, 2 A Diode
How would it regulate the voltage in each case?
AI: I understand that the voltage rate will depend on the end-unit consuming the power (eg., an LED chip).
I don't believe there's such thing as a "voltage rate" in the context you're using and, in the same context, the power supply will generally be indifferent as to what the load looks like.
What happens if the output from the PSU is divided into two parallel connections, one lead connected to an end-unit needing to use 27v, and another using 30v?
The voltage across the loads will be the single voltage the supply generates in order to force a total of 2.7 amperes through the parallel loads.
What happens internally? What's the reason why for the end result?
The supply senses the current in its output lead and adjusts its output voltage so that its output current will remain constant at 2.7 amperes, regardless of the load resistance.
As an aside, your:
I see that some power supplies provide a wide range of output voltages meanwhile maintaining the current.
For example: 2.7 A, 20-36 V output.
Indicates that since - from Ohm's law - R = E/I, with 20 volts across a load and 2.7 amperes through it, the load's resistance must be 7.41 ohms.
Similarly, at the high end of the supply's compliance, with 36 volts across a load and 2.7 amperes through it, the load's resistance must be 13.33 ohms.
Note that the range of load resistances the supply can accommodate is from 7.41 ohms through 13.33 ohms, regardless of whether the load is a single resistor, a couple of parallel diodes, or whatever, as long as the compliance of the supply is maintained within its limits.
Next, re. your diode example:
Example:
[[80W 2.7 A PSU with 18-30 V]] |--> (21-24) V, 1 A Diode
|--> (27-31) V, 2 A Diode
How would it regulate the voltage in each case?
It CANNOT regulate the voltage, it can only increase it until it either pushes 2.7 amperes through the load or until it runs out of headroom.
In the first instance, assume a diode with a 4 volt drop when there's 1 ampere through it.
If it's running from a 23 volt constant-voltage supply it'll need a ballast resistor to drop the remaining 19 volts, that resistor being: Rs = (Vsupply - Vled)/Iled = (23V - 4V)/1A = 19 ohms
Notice though, that since it's not a constant voltage supply, but a constant current supply it'll raise its output voltage in an effort to get 2.7 amperes through the load. In this case its output voltage can only rise to 30 volts, so when it gets there the current into the load will be: Iled = (Vsupply - Vled)/Rs = (30V - 4V)/19R = 1.53 amperes.
In the instance where you have two LEDs in parallel, the output voltage of the supply will rise until the total current out of the supply is 2.7 amperes, or until its output voltage rises as high as it can if it can't output 2.7 amperes.
With a 1 ampere LED in parallel with a 2 ampere LED and each LED's current limited by a ballast resistor, the voltage of the supply will rise until the current into the parallel combination equals 2.7 amperes.
|
H: Unable to toggle SN74HC109
I'm a complete amateur, I've probably gotten a million things wrong with this already. I'm using an SN74HC109 dual j-k" flip-flop chip. I'm trying to toggle the led (forgot to add a resistor in the diagram, ah, also forgot to add a line from 5V to Vcc.) with a momentary switch. When the circuit is powered, the led turns on but does not toggle when the momentary switch is pressed and released.
AI: Please build the following circuit:
simulate this circuit – Schematic created using CircuitLab
There are a number of things to learn from it.
1) With CMOS, ALWAYS tie unused inputs (not outputs) directly to ground or VCC. There are exceptions, with some circuits incorporating a built-in pull-up or pull-down resistor, but unless the data sheet mentions these, assume they don't exist. Leaving unused pins floating (particularly with CMOS) can produce amazingly intermittent, bizarre and maddening errors. And don't think that you can ignore the inputs of an unused part of the circuit, such as the unused flip-flop in your 74HC109. Don't even think about it. Sometimes that works, and sometimes it doesn't. Tie them all high or low.
2) C2, a 0.1 uF ceramic cap, should be connected as close as humanly possible to the ground and power pins of at least 1 IC, in this case the 74HC109. For larger circuits, particularly CMOS on a PCB with a ground plane, a minimum of 1 cap per 5 ICs is OK for CMOS, but for other logic families, or at high speeds, 1 cap per IC is a very good idea. Caps are cheap and don't take up much space, but the problems arising from not enough of them can be hard to diagnose. If you're using a solderless breadboard, do NOT use jumpers from the IC pins to the cap. Connect the cap directly to the sockets nearest the IC power and ground pins.
3) Never tie an LED directly to any low impedance output, and particularly don't tie one directly to the connection between an output and an input. On the one hand, it will try to draw too much current in the on state, and will also clamp the output to a low voltage which the input will not recognize as high. In this case, a 470 ohm resistor, combined with the LED voltage and the limited high output drive of the flip-flop will give you about 6 or 7 mA LED current when on. Just to show what I'm talking about, once you've got the circuit working, put an LED directly to ground on the flip-flop clock input, and watch what happens.
4) At microsecond to millisecond time scales, mechanical contacts such as switches and relay contacts will physically bounce as they close, and logic is fast enough to resolve those bounces into separate closures/openings. In this case, it will show up as intermittent operation of the flip-flop, depending on whether or not it got an even or odd number of contacts when you press the switch. For more complex circuits using counters or state machines you can get the most amazing errors.
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H: Controlling heater with PWM through MOSFET
I'm trying to control a heater coil (resistance ~0.9 Ohm) with PWM using a MOSFET. PWM modulator is based on LM393, MOSFET is IRFR3704 (20V, 60A).
If I place 1k resistor in place of heater everything runs fine and waveforms at testpoints CH1 and CH2 are nearly square. But when I place an actual heater in the scheme, oscillation occurs on the falling edge of pulse at the moment when voltage crosses Vth (channels are mixed here: yellow oscilloscope channel is connected to testpoint CH2 and cyan channel to CH1). Oscillation amplitude is somewhat larger than battery voltage and reaches 16V at its maximum.
I'm mostly a microcontroller specialist and my knowledge of this kind of circuits is poor. Is it an effect of the heater inductance or something else? How to oppose it?
AI: It's probably not mostly from the inductance.
More likely, pulling close to 8 Amps from the battery has a significant effect on the battery voltage, and this changes the switching thresholds around the comparator generating the PWM signal.
You probably need to feed the LM393 and R3 from a lower noise supply, either R-C filtered (say 50 ohms and 1000 uf) from the battery, or perhaps better, from a 5V LDO regulator (with decoupling).
You can keep the pullup resistor R1 connected to the full battery voltage to turn on the FET as hard as possible, even with the LM393 supplied from 5V.
And as the voltage peaks exceed the battery voltage, inductance must be having some effect so the flyback diode is definitely recommended.
|
H: PWM-stimulated N-channel MOSFET unexpectedly always on
Electronics!
I would appreciate help with the following problem:
Goal:
Get 12V PWM-modulated from a microcontroller-generated 5V PWM.
Elements:
• IRLML2502, n-channel FET - Datasheet
• Resistors R1 (56 Ohm) and R2 (6K8 Ohm)
Reduced schematics:
Problem:
Drain is always around 12V (100% duty cycle) - independent of gate duty-cycle.
All my IRLML2502 show the same behaviour.
What I checked:
• Scope shows correct duty cycle(s) on gate.
• Gate voltage either 0V or 5V.
• Source voltage is 12V as expected.
• Checked pin-correctness various times.
My Request:
Please tell me, if you see any obvious problems.
Please point me in a direction to perform further checks.
Please be kind, i am no native electronics guy :)
Thank you very much for your help!
Best regards,
R2D2
AI: You are using your MOSFET backwards. your circuit, re-drawn the right way up, with proper symbols, is this:
simulate this circuit – Schematic created using CircuitLab
Note: I have added the body diode specifically to highlight the problem.
An N-channel MOSFET should be used as a low side switch, not a high side switch. That specific MOSFET, the gate has to be at least 1.2V higher than the source for it to switch on. Since your source is 12V that means your PWM signal would have to reach as high as 13.2V to turn the MOSFET on. Not that it'd make much difference, since the diode bypasses the MOSFET anyway.
So, either turn the MOSFET over and use it to switch the GND wire of whatever you're switching, or use a P-channel MOSFET to switch the 12V.
For low side switching the circuit would be:
simulate this circuit
|
H: Is there a sensor capable of measuring distance?
I'm looking for a simple way to measure the distance between 2 devices, basically 1 device will be placed in each leg and one of them will measure the leg stride, at any moment, by calculating the distance between both mechanisms.
I've read you could measure distance with an ultrasound sensor and an ultrasound transmitter or a magnetic sensor, but are they accurate between 0 and 1 meters, in any direction?
If such a solution is feasible could someone point me to some documentation or a project already made?
The specs are roughly the follow:
distance: 0 to 1m
accuracy: about +/-5cm
type of range: omnidirectional (or at least with a good angle)
size: small enough to fit on someone's heel
AI: Laser rulers are widely available at hardware stores.
http://www.homedepot.com/p/Bosch-50-ft-Compact-Laser-Measure-GLM-15/205387213
|
H: A Question on Resistance
A 19 v dc supply is switched to an IC amplifier. A 12 V dc, 100mA pilot lamp,(nonLED)is wired in parallel with the switch to indicate an active circuit. What size resistor is needed to support the pilot lamp ? My research indicates 70 ohm, but I am a newb.
AI: If the lamp and its series ballast resistor are wired in parallel with the switch, when the switch is made - supplying power to the opamp - the lamp will extinguish, giving an indication that power to the circuit has been turned OFF, when the opposite will be true.
Conversely, when the switch is opened, [some] power will be supplied to the opamp through the lamp and its ballast resistor, keeping the circuit from being turned OFF completely. The lamp may or may not glow dimly, depending on the current drawn by the circuitry on the cold side of the switch.
To be wired into the circuit properly, the lamp and its ballast should be wired in parallel with the opamp:
|
H: Pololu Pushbutton Power Switch
I am replacing my auxiliary light switch of my car.
on the switch assembly, it has a positive, negative, and ground.
I am replacing it with a pololu pushbutton power switch with an oem switch that is a momentary type.
Here is the switch: http://www.pololu.com/product/750/pictures
Positive to Vin
Negative to Vout
There are 4 grounds on this circuit board, so which one is the correct one to connect to the right ground?
Or am I completely wrong?
AI: The site you link to shows a picture of the breakout board. The lighter green patches are the copper traces connecting the silver contact pads. You can see that a large trace connects all four Gnd pins together, so you can use any one of them. The same goes for Vin and Vout: each pair of pins is connected together.
|
H: Puzzlement on Evaluating the Datasheets of a GLCD
I have decided to use an LCD display for my project. In order to learn how to use one, I have consulted its and its drivers' datasheets. Here are the links for them:
Link for the LCD display's datasheet: WDG0151-TMI-V#N00.
Link for the LCD display's segment drivers' datasheet: NT7108C.
Link for the LCD display's com driver's datasheet: NT7107C.
If you would excuse, I would like to ask a couple of questions regarding them.
1) First of all, why aren't pin numbers of the drivers shown at the block diagram in the LCD display's datasheet which is at p.10? Also, not every signal's name is shown as well. Am I supposed to be able to extract a meaning out of a block diagram without knowing which signal goes to where?
2) Another puzzling point is as follows: In the p.10 of the LCD display's datasheet, there is a block diagram. In that diagram, there are 8+6 lines connected to the MPU. Also, there is an application circuit provided in p.20 of LCD display's segment drivers' datasheet. In the application circuit, there are 8+7 lines connected to the MPU. Now what does that mean?
3) In the p.6 of the datasheet of NT7108C, pins; CS1B, CS2B and CS3 are defined as follows:
Chip selection
In order to interface data for input or output, the terminals have to
be CS1B=L, CS2B=L, and CS3=H.
and throughout the entire document, only that given combination of CS1B, CS2B and CS3 is mentioned. My question is: If only a single combination is being used, why are there 3 pins provided for a single task, instead of just 1?
4) As my last question, in this page, there is an application provided using the same LCD display. In that page, there is a figure given which explains how the display is structured. My question is: How are the authors of the page were able to come up with that figure? More precisely, which points in the datasheets helped the authors of the page to come up with that figure?
Thank you very much in advance.
AI: This answer is a very general answer to interfacing LCD modules, but looking at the datasheets you provide, it's generally on topic. First you must realize that the LCD module and the LCD driver IC are two separate things. The LCD module manufacturer chooses a driver IC and designs a PCB which holds the driver IC, the LCD glass and most of the surrounding passives that are needed.
The manufacturer then decides which interface pins of the driver IC are brought out to the pin connector of the LCD module. Often a module has an initial customer (often a mobile phone maker) who defines what signals he wants to use to control the LCD. If the mobile phone maker doesn't need some signal, it's often left out to save space on the connector and more importantly on the mobile phone's PCB.
The LCD module maker then makes a "datasheet" of the LCD module, which consists of a mechanical drawing, test acceptance criteria, interface pin listing and the name of the driver IC. Often some pages from the driver IC's datasheet are copied to the module datasheet to make it easier for the reader to get a general idea about how to use the module without having to look into the driver IC datasheet (enough to get an idea if the module might be suitable to a project or not). But beware - the LCD module datasheets are often made from some previous module datasheets .doc file with minimal editing and they sometimes contain even erroneous information that has been left there by accident.
The LCD driver ICs tend to have a fairly established set of digital IO buses that they use: 8-bit or 9-bit 8080-style and/or 6800-style parallel buses (8080 style has separate /RD and /WR signals while the 6800 style has R/W and enable) and 16, 18 or 24 bit parallel bus options as well as an SPI bus option. Any interface mode selection bits that are not needed for the configuration that is brought out to the module's pin connector are left out. Sometimes there are places for pull-up/pull-down resistors on the LCD module's (flexible) PCB that you can tweak - the manufacturer might make the same module in two different configurations and solder the pull-up resistors accordingly differently in manufacturing.
Compared to a lot of modules I've seen you seem to have a lot of information of the module. I've often had to guess a lot of the interface to fill in the missing pieces the manufacturer has left out. Often the LCD modules you find are from manufacturers that are commisioned to make second sources (clones) of existing LCD module types and the original customer just uses the previously existing datasheet - in this case the information from the second module maker might be quite sparse indeed.
Answers
The pin numbers are not needed for the block diagram. Leaving them out allows the module manufacturer to reuse the same block diagram in different products that have different pinouts. The pin numbers can be found in the top-right corner of the mechanical drawing in the previous page (page 9).
CS3 is missing from the module's interface. It means that CS3 is not brought from the driver IC to the 20-pin connector of the module. Thus you won't be able to use the pin CS3, you must accept whatever connection is made to the driver's pin CS3 in the module's PCB. Also "RS" is renamed to "D/I" in the module's connector.
A minute ago I thought that "It's to give you more freedom. For example let's consider that you are driving two LCD modules with a 8080 style microprocessor bus. You would connect the bus to the LCD normally, using CS1 and the other data connections. Then additionally you would control the CS2 of both modules individually by software. That way you can select which LCD of the two actually receives your operations.", which would be true generally. But upon closer look at the module, I realize that the module contains two driver ICs, and CS1 goes to one of the active low chip selects of the first driver IC and CS2 goes to the other driver IC. The remaining chip selects of the drivers are permanently connected high or low on the module's PCB.
There might be an application note somewhere that we don't know anything about which holds this information, but it's actually quite easy (and often necessary) to get this info by experimentation. You start by clearing the display and then write some data to the display in a loop with some delays and look visually where the dots start appearing and in which order. It helps that there usually aren't so many different ways to connect the driver that would make any sense - different modules are usually quite similar and as you gain some experience, it gets easy to find it out.
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H: Mplab X Programmer selection
I am using Mplab X IDE. My question is what does the colours Red, yellow and green dots during selection of programmer indicate ?
AI: It refers to the combination of programmer / target chip:
Red means not supported in MPLAB-X, though third party tools may work with it (such as a pickit2 using pic32prog to program a non-supported PIC32).
Yellow means partially supported or Beta support.
Green means fully supported and tested.
Where you have just one dot it means the whole device support. Either the whole setup has full support (green), partial or beta support (yellow) or no official support (red).
When there are two dots the setup is split up into two parts. In the case of hardware programmers the first dot is the debugging support, and the second is the programming support. For the simulator the first dot refers to core compatibility (CPU and instruction support), and the second to peripheral compatibility (timers, IO ports, etc).
If you hover over an entry in the list it tells you what the support levels are. For instance, a PICkit2 talking to a PIC18F4455 has two yellow dots and comes up with:
Debugger - Beta Support, Programmer - Beta Support
The same PICkit2 when set to talk to a PIC32MX795F512L has a single red dot and comes up with:
Not Supported
Yet the PICkit3, which has two green dots, comes up with:
Debugger - Production Tested, Programmer- Production Tested
The PM3 only has one green dot though, as there is no debugging in it, so you just get:
Production Tested
|
H: Do microcontrollers have cache?
I wonder if microcontrollers normally have cache or not.
What is the common case?
If not, what could be the benefit behind this?
AI: Some do, some don't.
Low-end MCUs don't as a general rule. The reason for this is they're pretty simplistic devices with no pipeline or other optimizations. Just a simple 8-bit CPU core connected to address and data buses (usually Harvard architecture). They don't generally run fast enough to get any speed increase from cache as they can read from Flash at pretty much full speed anyway.
Higher end ones, typically most 32-bit ones, such as ARM and PIC32, do have cache. These usually run considerably faster (80MHz as opposed to 16MHz for instance) than little 8-bit MCUs, and as a result they can't read the Flash fast enough, so they have a small amount of cache, and a (usually 5-stage) pipeline, to make the whole system smoother and faster.
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H: Colpitts oscilator - purpose of voltage divider
I'm confused by the Colpitts oscillator shown below:
I've marked my understanding of the various components, but I'm having trouble understanding the tank circuit.
My understanding is that C1 and C2 form a voltage divider. However, I'm assuming Vin is coming from the emitter, between the two caps which seems unusual given the standard representation:
(source: learningaboutelectronics.com)
But intuitively I can see that the voltage is split between C1 and C2. But what is the purpose of this? From my understanding of tank circuits, L1 and C1 alone in parallel should resonate? Why is a voltage divider required?
AI: Yes - it looks like a capacitive voltage divider - however, it isn`t one because the signal input is NOT at the top of C1 but between both caps). If you try to look into the feedback circuit (starting at the emitter node which has a dynamic output small-signal resistance r,out) we face a third order circuit. This circuit is a first order grounded RC block (r,out-C2) that is connected with a second order grounded CL block (C1-L1). Both blocks together provide something like a bandpass response, however, with a squared s in the numerator and a third order denominator (EDIT: First order RC lowpass in series with a second order highpass).
(That means: Your second diagram is not correct: Vout is not across C2)
This bandpass provides - as desired - a zero deg phase for the resonant frequency wo. The necessary loop gain (>1) at this frequency is possible because of the existing voltage enlargement across the inductor at w=wo (although the common collector stage has a gain below unity). C3 acts simply as a coupling capacitor and does not influence the oscillation condition).
A good description of the circuit (including derivation of formulas) can be found here:
http://seit.unsw.adfa.edu.au/staff/sites/hrp/teaching/Electronics4/docs/PLL/colpitts.pdf
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H: PIC to PIC serial communication
I need to send all port info from one pic to another using serial port..
currently using 9600bps baud rate. on pic18f4550 running at 20mhz clock.
i have used this code to send and receive data of a single port.
send:
while(1)
{
TXREG=PORTB;
while(PIR1.TXIF==0);
delay_ms(100);
}
and receive:
while(1)
{
while(PIR1.RCIF==0);
PORTB=RCREG;
}
on tx part PORTB is set as input and at RX PORTB is set as output.
I need to send/receive all ports info.. How can it be done?
AI: You need to write a simple transfer protocol.
Basically you need to come up with a way of one PIC saying to the other: "This is the start of the data, here is the data, and this is the end of the data". That could be as simple as starting and ending your data stream with characters that are identifiable, ideally characters that aren't ever going to be in your data stream, or more complex whereby you have a header describing the data that's about to arrive, and a checksum to ensure that the data was received correctly.
The most understandable (to us) method is to send the data as pure ASCII text, maybe in the form of a hexadecimal string. So for 4 ports you would send 8 characters 0-9A-F followed by a carriage return to mark the end of the data, say a stream like:
017F36AB<cr>
017F36AB<cr>
017F26AB<cr>
017F26AB<cr>
017FA6AB<cr>
etc.
Then it is up to your receiving PIC to decode each character into a 4-bit value, and join together character pairs into a single 8 bit value.
The simplest reception method would be to define an array that is big enough to receive all the characters (8 bytes in this case). As characters arrive, you look to see if it's a character. If it is, then you decode the characters in your array. If it's 0-9 or A-F, then you slide the characters in your array down one space (losing the oldest), then adding the new character in to the top of your array. This is called a sliding window where you have an 8-byte "window" on the data stream that is arriving, and the data "slides" past the window.
A more complex arrangement would be like I wrote for my ICSC Library for Arduino which defines a sending and receiving station (to allow communication between lots of chips), a command, a variable length block of data, and a final checksum. The packet format I came up with is:
(All values are 8-bit and symbolic names are ASCII standard values.)
Preamble:
76543210
+--------+
| SOH |
+--------+
| SOH |
+--------+
| SOH |
+--------+
| SOH |
+--------+
Packet:
76543210
+--------+
| SOH |
+--------+
| DestID |
+--------+
| OrigID |
+--------+
| Cmd |
+--------+
| DatLen |
+--------+
| STX |
+--------+
| Data 0 |
| Data 1 |
| ... |
| Data N |
+--------+
| ETX |
+--------+
| Cksum |
+--------+
| EOT |
+--------+
Checksum is sum of all bytes between (but not including) SOH and ETX, modulus 256.
Special destination address 0x00 is the broadcast. All stations will receive and
act upon messages sent to this address.
Addresses that equate to the ASCII symbols SOH etc should be avoided.
Packet reception and identification is through a 6-byte sliding window identifying
the header of a packet. As bytes arrive they enter the top of the window and
they work their way down to the bottom as more bytes arrive. When the first
byte of the window is SOH, the last byte is STX, and the Dest ID is either 0x00
or the ID of the receiving station, it is assumed a valid packet is arriving.
From this point on DatLen bytes are then read into the data buffer.
If the next three bytes do not equal ETX, the valid checksum, and EOT, then the
packet is rejected. Otherwise the function associated with Command is executed.
|
H: Two different 3-AND gates: correct implementation?
One of the questions in my textbook (Introduction to Computing Systems) asks to design a 3-input AND gate. The given solution is as follows:
simulate this circuit – Schematic created using CircuitLab
If I am reading this correctly, this is a 3-NAND–NOT combination.
I don't understand why you need the NAND–NOT instead of just creating an AND by itself.
My proposed schematic is the following:
simulate this circuit
This seems simpler, and uses fewer transistors, so I'm guessing that there's some reason that it won't work (otherwise it would be the example solution!).
I don't see any possibilities for short-circuiting: if NAND(A,B,C), then NOT OUT, so there will be no path from power to ground (because it would have to go through OUT).
On the other hand, I do think that everything is properly grounded: if NAND(A,B,C), then OUT should have a path to ground through whichever of (A,B,C) is logically false.
What am I missing?
AI: The problem here is that you're misunderstanding (or not having the basic understanding) of how MOSFETs work, in particular the \$V_{GS}\$.
On an N-channel MOSFET the gate voltage has to rise a certain amount above the source pin. On a P-channel it has to fall a certain amount below the source pin.
In your schematic the N-channel's source is connected to \$V_{CC}\$ and the P-channel's to GND. If the threshold is, say, 1.2V (a reasonable logic level threshold), then the input logic HIGH would have to be at least 1.2V above \$V_{CC}\$ and the logic LOW would have to be below -1.2V.
That, as you can see, just isn't practical.
|
H: How do I deal with ideal current and voltage sources in my circuits?
Data given: electromotive force of the ideal voltage source \$E=20V\$, power output of the ideal voltage source \$P_e=3.333W\$, current of the ideal current source \$I_s=4A\$, power output of the ideal current source \$P_i=56/3W\$. The task is to find the resistances \$R_1\$ and \$R_2\$.
So here are the steps that I've taken: \$P_e=E \cdot I\$, therefore, \$I_1=1/6(A)\$, and the resistance at the i.v.s. is therefore 120 ohms. With this we can calculate \$I_2\$, namely it is \$23/6 (A)\$. Then using Kirchhoff's laws, I found that \$R_2 = 1.6 \Omega\$ and \$R_1 = 277 \Omega\$.
I am having a trouble figuring out how deal with these sources, and I am not sure of my answers. When having an i.v.s. do I place the appropriate resistance in parallel with it? What about i.c.s.? In series? I've searched many sites online, but didn't find the explanations I was looking for. We are only allowed to use Kirchhoff laws here. Can you recommend some good, valid sources to learn from?
AI: If the sources are ideal, you don't have to put any internal resistance on them. Also, I think you are mistaken in assigning a resistance value at the voltage source. It is true that you have a voltage and a current, but the voltage is constant while the current depends on the circuit.
In order to solve the problem, you correctly found the current on the voltage source, and since the text says that it produces 3.333W, it must be the inverse of the arrow.
Therefore, if you apply the KCL at the upper node, you get that \$I_2 = I_S - I_1\$, but since I1 is negative you have to sum the absolute values. I actually don't now how you got the 23/6 A value.
Since you know the voltage on Is, you can calculate the voltage on the two resistances, and since you know all the currents you can obtain the resistance values.
|
H: What is this symbol on the schematic?
What is this element on the far right of schematic described as "270 OHM"? Is this some kind of inductor? What is its purpose in this device (this is a reference design of dc-dc power supply of sim900 taken from its datasheet) and what would be an exemplary part number?
AI: It is a ferrite bead with a 270Ω impedance.
Ferrite beads have a number of symbols in use in schematics. There hasn't been a standardization in the symbol like for other components. Many people treat them like a simple inductor, some like a resistor, some with a special symbol they made for it. Some of the symbols seen include:
|
H: LDO Regulator ADP3338
I was looking the ADP3338 LDO Regulator of Analog Devices and i'm wondering whats the output voltage of this LDO?
http://www.analog.com/static/imported-files/data_sheets/ADP3338.pdf
Is the output voltage same of input?
AI: Is the output voltage same of input?
What would be the point of that?
The answer to your question is: It depends which ADP3338 you get - they come in a range of output voltages from 1.5V right up to 5V. See the table on page 13 of the datasheet.
|
H: How does this voltage detector IC work in a circuit? What does open drain vs. CMOS output mean?
I'm evaluating the Rohm BD48/BD49 series voltage detector. I'm having trouble understanding the data sheet.
I want to generate a high signal when the input voltage is above a desired threshold (3.0 volts, so the BD4xx30x), and low when it's below that. This chip comes in two varieties, one of which is an "open drain" and the other is "CMOS". The data sheet says:
For both the open drain type ... and the CMOS output type ... When the voltage applied to the VDD pins reaches the appropriate threshold voltage, the VOUT terminal
voltage switches from either “High” to “Low” or from “Low” to “High”.
I think that means high-to-low, or low-to-high respectively? I.E. A) the open drain type when input voltage is below the threshold generates a high signal on the output pin (but as mentioned elsewhere, only via an external pullup), which goes low when input voltage exceeds the threshold, while B) the CMOS type generates a low signal when the input voltage is below the threshold, which switches high when the input voltage exceeds the threshold.
So I think that I want the BD49 CMOS series, with its Vout hooked straight to the control pin (active high) of the chip I want to pair it with. Is that right? I'm guessing based mostly on some assumptions of the accompanying figures.
AI: To answer your question, both ICs (the open-drain and the "CMOS" types) have the same output characteristics: they will pull the output high when the input voltage is high, and pull the output low when the input voltage is low. See the Output vs Input voltage graphs on pg. 9 (Fig 6). In short, either IC will work for your purpose, but the open-drain one will require an external pull-up resistor (whether or not the open-drain or the "CMOS" type is more useful for you depends on your application).
The datasheet mentions "low to high" and "high to low" separately, I believe, in order to imply that there is hysteresis on the output (and indeed, the rest of that sentence refers to a different part of the datasheet discussing the IC's built-in hysteresis). Hysteresis is a feature that essentially means you have two separate threshold voltages, depending on the type of change occurring. For instance, the low-to-high threshold voltage will be higher than the high-to-low threshold, to avoid rapid switching (bouncing) of the output when there is noise in the input.
Ignacio covered the difference between open-drain and the "CMOS" output, so I won't go into that here.
|
H: Why don't we use capacitors containing multiple kinds of dielectric in a single package?
I know that it is common in DC regulators to use both a high capacitance electrolytic capacitor and a low capacitance ceramic capacitor in a parallel, in order to maintain sufficent capacitance over a wider frequency range.
Why are not these parts sold in a single package? Presumably a capacitor combining electrolytic and ceramic dielectrics would be a closer approximation to an ideal capacitor.
AI: I'd say it's probably cheaper to manufacture them as two separate processes. No two designs are the same so it would be difficult to come up with value combinations that people would use.
More importantly in decoupling inductance is very important especially as you go up in frequency. So I prefer a tiny surface mount ceramic with minimum loop area for my high frequency decoupling. But I can use an electrolytic's larger package for my lower frequency bulk supply needs.
Stuffing my ceramic cap up in the electrolytic's package would negate the point of using it.
|
H: Simple RS232 to 8 bit Parallel circuit
I want to make a simple rs232 to parallel (8 bit) converter.
I would like the input to 1 wire and the output can just be 8 bit with no strobes etc. and run at high speeds (ideally up to 1Mbps, put ~100kbps would be ok)
Ideally, what would be simplest circuit to achieve this? I tried to work it out but it ended up being quite complex, multiple cloks/monostables, shift register, decade counter.. So, I thought I'd post here as I thought there may be a trick to simplify it or a specific chip. Ideally CMOS.
Thanks :)
AI: Peter Bennett has the right idea, I think.
If you Google on "6402 UART" you can find the part you need - Jameco, for instance, sells them.
Depending on what you're used to, some aspects may be a problem. It's a 40-pin DIP with 0.6 inches between rows, so it's pretty big. It also needs 5 volts, so 3.3 volt operation is out. Interfacing is easy. It has tri-state outputs. The standard part will work to 125 kHz, using a 2 MHz input clock. The only extra circuit you need is an inverter and some delay. Have the DR output produce an inverted level with a 200 nsec delay at the DRR input, and you're fine. Format - word length, parity, start/stop bit lengths - are all controlled by pin levels. Bit rate is not programmable - you must provide a 5-volt TTL/CMOS oscillator with a frequency 16 times the bit rate.
However, I think you need to rethink your statement that "the output can just be 8 bit with no strobes etc." How will you detect the arrival of two successive identical words by just looking at the data? Since you have to generate a "data received" pulse anyways (that's what the delay/inverter does), I'd recommend designing something which uses it.
|
H: JK flip flop random start outputs
I am working on a project for college and I have to implement a sort of alarm using only MUX's and JK flip flops and a bread board. The problem I encountered is that whenever I power the whole circuit my flip flops have random outputs. I have 2 SN74HC73's meaning I have 4 flip flops. I connected all ports(correctly, checked three times) and have CLR set to HIGH (basically connect it to the power source) for all 4.
Is there a way to ensure that all flip flops default to 0 once I power the circuit on?
Please help me :)
AI: There is nothing in the specifications, nor in the internal schematics, that defines what the outputs of a JK flip-flop should be at power-on. The only way of getting a known state is to use the CLR input of the chip, which resets the whole chip into a known state.
The normal way of doing this is to hold CLR low for a short period while the chip powers up, and only then release it to HIGH. The simplest way to do this is with a capacitor and resistor on the pin.
simulate this circuit – Schematic created using CircuitLab
You will need to experiment to get the component values right for your situation. The larger the values the slower the capacitor will charge, and the longer the delay before the CLR pin goes high. R2 acts as a "bleed" resistor to remove the charge from the capacitor ready for the next power-on. It should be much higher than the charge resistor R1 as the two of them act like a voltage divider defining the maximum level of the capacitor's charge. It may or may not be needed depending on the self-discharge of the capacitor and leakage current of the CLR pin when VCC is removed.
|
H: I need help in starting this 7segment from 0
I am making a control system as my project. Here i have used 2 555 timers one in monostable and the other sin astable. The monostable outputs when process one button is pushed and this also triggers the astable 555 timer. The 7 seg attched to the monostable 555 which is the left one shows how many times the process is initiated and the 7seg with astable 555 shows time taken for the process. Now when i start the monostable 555 the astable 555 starts but it counts from 1 not 0. And also i would like to add that when the process 1 button is pressed again the 7 seg attached to the astable 555 resets and starts from 0 again.
Image of circuit before simulation.
Image of circuit after simulation. As can be seen it is starting from 1.
AI: It's worse than the simulation- those counters will start at more-or-less random numbers at power up. Also you must not leave the reset inputs floating.
Connect the MR inputs (pin 15) to an active-high reset signal to reset the counters to zero.
|
H: PIC24 PLL module is always out of lock
I have been working on a PIC24FJ128GA310 development board for for some time now and recently got a PCB made. If I try to move my code into the new board all timing related math and functions are failing on HS oscillator even the UART lines wont work at the desired baud rate. The device does not run when I put it to XT oscillator.
After some debugging, I found out that the PLL module wasn't getting locked. I have a 8 MHz oscillator with PRIPLL config bit on. So, instead of having FCY of ((8*4)/2) I have (8/2). The case is true if I have POSCMD as HS. But if I put POSCMD as XT, the controller just wont work at all. I am unable to debug the code with POSCMD as XT, IDE says device is not ready for debugging as some config bit is incorrect or the emulator is not wired properly. I know for sure the pickit3 connections are fine because when I change the POSCMD to HS or put the device to work on internal oscillator I am able to get into debug mode.
I tried doing a while(OSCCONbits.LOCK == 0); at the starting to check if the PLL module start-up timer is satisfied. But it never out of that loop. I also tried to start up with internal oscillator and then switch to external oscillator and PLL without much luck.
After some research online I got to this thread, which says the capacitor on Vcore pin should be causing the problem. I changed that capacitor to a through hole 10uF tantalum. But still the issue remains unresolved.
Here is the schematic and layout of relevant sections.
Oscillator Circuit
Vcore pin
Layout of both. Bottom Layer
I have run out of options and need some help. Please suggest any other course of action. Thanks for any help.
AI: Firstly the Vcore capacitor - Microchip recommends a low-ESR (such as ceramic) 10uF cap there. Your 10uF tantalum in parallel with the 100nF ceramic will probably work though, so I don't think this is your problem.
As for you oscillator config - for an 8MHz crystal you really should have the POSCMD bits set for XT mode (01) as HS mode is intended to be used with crystals 10MHz and higher. Using an 8MHz crystal in HS mode could make the oscillator too unstable for the PLL to lock.
Check the recommended load capacitance for your specific crystal and if its manufacturer recomends any other 'extra' components (I have on occasion needed to add a large resistor in parallel to achieve reliable oscillation), but I suspect that the capacitance is your most likely problem.
Remember that an xxpF capacitance spec on the crystal datasheet does NOT mean 'use a pair of xxpF capacitors' ... I struggled with this fun fact about crystals for far too long before finally figuring it out.
|
H: WLCSP MCU's - what hardware is needed for programming these tiny chips?
I just received my DigiKey order of some Atmel ATTiny4 MCU's from DigiKey. I wanted to tinker with one of the smallest MCU's I could find, and this was one of them.
It is, in fact, so small because it is wafer level chip scale packaging (WLCSP), described here. This image from that document indicates scale.
This question may be very naive, but how do I "hobby" with a chip this size?
I cannot directly plug it in to a breadboard. (Unless there is some socket I can buy that I am unaware of?) Programming the chip is the next step, but I do not know what hardware I need to interface with my PC. There are plenty of tutorials out there on the web that show to program a DIP (with an Arduino, for example). I cannot, however, find any information on how to program these tiny chips.
Is this even possible for someone (me) tinkering out his apartment? Or are these chip sizes primarily sold to manufactures of electronic devices with automated systems for integrating these chips?
Note: I am not sure how to tag this question. Feel free to edit.
AI: I'm sorry, but you've got no chance.
It's basically an ultra-small BGA - you need to reflow it properly onto a PCB, and at that scale it's going to be very very hard to both get and keep the alignment properly (and even generate the PCB in the first place). Better to stick to DIP.
As for programming them - you route the programming pins out to a header on your PCB and connect a normal AVR ICSP of some form into it.
|
H: No output from Transimpedance Amplifier
I'm trying to set up a transimpedance amplifier reading the response from an avalanche photodiode (Hamamatsu S12572-100P http://www.hamamatsu.com/resources/pdf/ssd/s12572-025_etc_kapd1043e03.pdf) and a low-noise operational amplifier (TI LMV793 http://www.farnell.com/datasheets/1771351.pdf).
The dark current is around 0.15 uA, and the signals I'm expecting to measure correspond to around 0.8 uA current on the APD. My feedback resistor is 1.27 MOhms. However, after building this circuit on a PCB I just get about 0.09V on the output of the amplifier, in a situation where it should saturate, and no variation at all. I've replaced both the APD and the op amp thinking they might be damaged, but the problem persists.
The biasing is being achieved by setting 70V across a 2 KOhm load and connecting a 1 KOhm resistor in series with the APD, as suggested by the datasheet. The breakdown on the APD is 67V, thus I assume the APD is pulling around ~35 mA from the biasing supply, but I don't get any output.
AI: I'm assuming your circuit looks like
simulate this circuit – Schematic created using CircuitLab
and your expectation that "it should saturate" is exactly correct. It IS saturating. The op amp is trying to drive the output below zero, but it cannot since it's a single-supply amplifier.
If you're going to use a TIA you have to use a negative bias to get a positive output.
ETA: Oh yes, and just to make your day - you may well have killed your op amps. Maybe not, since designers have gotten pretty good at protecting chips against overload, but this is pretty extreme. Not as extreme as getting hit by lightning, but that kills most chips, too. You need to check them in a less stressful circuit if you want to reuse them.
|
H: What is the maximum voltage of a Lithium Ion Battery
My question is about the maximum charge voltage of a Lithium-Ion cell.
I have charged my battery pack with 8.4V (the maximum voltage). The pack is a Samsung ICR18650-26F. The pack has a smart controller with a maximum voltage of 8.5V. This is 4.25V per cell.
I read about this that exceeding 8.5V can degrade the lifetime of the pack. However, the manufacturer don't clarify this detail.
My question: Will this voltage damage the cells or this within the tolerance range.
AI: The datasheet I'm reading says those batteries (like almost all other Li-Ion battery packs) have a charging voltage of 4.2V +/- 0.05V per cell. So two cell pack would be 8.4V plus or minus 0.1V.
So yes, it is within the tolerance range as specified by the manufacturer. But bear in mind you are supposed to aim for 8.4V! So if you aim for 8.5V and you are the smallest bit off then you will be out of tolerance.
My guess is that the manufacturer of your charger is simply saying the same thing as the manufacturer of your batteries: 8.5V is the maximum value in the range that the charger is specified to output.
Simple answer is that this seems fine to me.
|
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