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H: Which DC-DC converter power supply to choose for a 6A motor from a 7.2V battery? I'm looking to build a motor controller where I want to have consistent motor performance. Normally you have a 6v DC motor and you can plugin a 7.2v battery pack directly and be fine, but the motors start out running really hard and slowly fade as the battery level drops. So I was thinking of building/buying a DC-DC power supply so the motors would get a consistent 6v but still be able to draw a lot of current. Digikey has a 10A 6V Murata OKR-T/10-W12-C DC-DC converter for $10. While I can buy one, I always like learning to build my own and would like the ability to have a final product have both the motor controller and DC converter in one. The motors I'm working with have a stall current of 6A each. My questions: 1) Is a DC-DC converter a good solution for my situation? 2) Would that Digikey DC-DC converter work in this situation? 3) Are there better alternative solutions? Any pointers in the right direction would be much appreciated. Here are some TI components I'm going to experiment with: LM3150 - SIMPLE SWITCHER® CONTROLLER, 42V Synchronous Step-Down PTN78020W - 6-A Wide-Input Voltage Adjustable Switching Regulator LM2587 - 5A Flyback Regulator TPS56921 - 4.5V to 17V Input, 9A Synchronous Step-Down SWIFT? Converter with VID Control AI: You don't need a separate DC/DC converter. A motor controller that does Pulse Width Modulation (PWM) into an inductive (motor) load is essentially a buck-type non-isolated DC/DC converter. At an intermediate duty cycle, the voltage across the motor will be less than the battery voltage - try measuring it. Power is conserved, so Vbatt * Ibatt = Vmotor * Imotor + [switching losses] Note that if you limit the maximum duty cycle, you can safely use a higher battery voltage than the motor can withstand. This may allow you to add more energy storage (more batteries) to your project without being constrained by motor voltage. Whether you decide to close the control loop with voltage (like a DC/DC converter), current (torque control), or go open loop (most small electronic speed controls) is up to you.
H: relationship between modulation index and carrier-suppressed condition in fm What is the relationship between modulation index and carrier-suppressed condition in FM. What should the modulation index be when the carrier is suppressed in FM? AI: The answer to this fills whole chapters of some large textbooks[1], but to summarize a lengthy discussion involving Bessel functions of the first kind, the carrier component vanishes for M=2.405, 5.520, 8.653, 11.79, 14.93, ... Mathematically, these are the zeros of J0(M). [1]: Cook & Liff, Frequency Modulation Receivers, Prentice Hall, 1968, Fig 1-19, but you will find the same diagram in numerous texts.
H: Quantization noise and Quantization error What is the difference between the quantization noise and quantization error in ADC? I understood that the quantization error you get when you convert analog to digital and quantization noise when you convert from digital to analog. AI: The quantization noise is an abstraction, meant to represent the quantization error as a signal (so it can be compared to other forms of noise. You consider the quantization noise as the difference between the (real) quantized signal and the (ideal) sampled one. Because of the loss of information due to quantization, a signal that is A/D and then D/A converted will show an additional noise due to quantization. A situation in which using quantization noise is useful is when determining the quantization depth (number of levels/bits) of a signal. By comparing the quantization noise to the other noise sources, it's possible to determine the maximum reasonable number of levels for the quantization, because additional bits would be absorbed by noise. This of course happens if the sampling rule is respected.
H: Is there any standard which defines that a particular connector or header on PCB has to be male or female? Is there any standard which defines that connector (DB9, DB25, USB or header) type has to be MALE or FEMALE while choosing one to use on circuit board? I am designing a microcontroller circuit board for general use. AI: Often the connector side that is "live", having voltage present on it while not plugged in, will be female/sockets and the mating half will obviously be male/pins. It reduces the chance of shock or shorting. Small signal stuff doesn't matter so much, but with power connectors it's more important to keep live contacts inaccessible.
H: Common anode 7 segment display I've hooked up my arduino to a 7 segment display with a common anode.. At first I thought it wouldn't work at all because I was setting the pins on the cathode side of the LEDs to high.. then I discovered when I set the pins to the cathodes high the LEDs turn off.. Which is good, because I just needed to do a binary NOT (pretty much) on the output. However, I don't really understand what's going on.. when the cathodes aren't set high, how is this the same as them being ground? Can someone please tell me what's going on here? I don't quite see how the circuit is complete.. AI: This is how the output of most logic chips works. When they are high, they are connected to the 5 volt supply, and when they are low, they are connected to ground. You saw this yourself; you just didn't believe it. Equally important is why the LED is off when the output is high. When the cathode and anode are both at 5 volts, there is no voltage difference between them, and the LED does not light. Many beginners have trouble understanding the nature of voltage.
H: Taking the limit of voltage division equation I'm required to take the limit of the voltage division equation(internal voltmeter resistance included as Rm) when Rm goes to infinity to show that the limit equals to the basic voltage division equation. \$\varinjlim_{R_m\rightarrow\infty}\ \dfrac{R_1V_s}{R_1+R_2+R_m}\$ But I'm kind of confused. So how should I do it? AI: As Andy aka points out, it's not entirely clear what you're asking. A schematic would help in the future. I think your original equation is incorrect. It sounds like you have this circuit: simulate this circuit – Schematic created using CircuitLab From the basic voltage divider equation: $$ V_{out}=\frac{R_LV_s}{R_L+R_2} $$ Where RL is R1 || RM. $$ R_L=\frac{1}{\frac{1}{R_1}+\frac{1}{R_M}} $$ Showing that RL -> R1 as RM -> infinity is simple algebra from this point. Now, as a matter of reality, RM is not infinite. This approximation only holds value if RM is much larger than R1. If RM is within, say, two orders of magnitude of the value of R1, the meter can affect the circuit it's attached to.
H: Current Transformer with pic16f877a I am currently working with a current transformer (CT) to measure the load current of a system. I am connecting the CT with a pic16f877a microcontroller using a basic circuit I found on the internet. I have implemented this circuit pictured below and connected the CT but it did not work. The value is not being changed by CT. Please suggest any changes in the diagram below or provide help regarding how to connect CT with the PIC. I have provided pics of the specific CT as well. I need to measure AC Current. actually am software engineer by profession and don't know much electronics but are learning and implementing things. My purpose is to measure load on three phases of our company which is provided to us from Grid. So I will pass AC wires from CT to measure load on every phase. Can you help me to provide solution as I can read ADC value from pic because I have measures temperature successfully using LM35 but don't know how to connect CT with Pic, neither any manual or data sheet is provided by CT supplier. Can you help me to connect CT with pic16F877a. AI: Your circuit doesn't make much sense. The two resistors attenuate whatever signal is produced by the CT by a factor of 2 and shift it up 2.5 V. Is this really what you intended? What current range do you want to measure, and therefore what is the expected output voltage of the CT? Without knowing that, it's impossible to say whether it's doing what it's supposed to or not. Start by just putting the load resistor on the CT and measuring the voltage. Do you get what is expected? If so, work forwards thru the circuit to see where you are not getting the expected signal. If the signal seems right at the PIC pin, then any remaining problems are in the firmware. I'd expect you would want to amplify the CT signal before it drives the PIC pin, but you also have to make sure a current spike can't cause a voltage outside the PIC Vss to Vdd range. A TL082 is inappropriate here. Look at its overhead voltage. It's not going to do anything useful with a 5 V supply. The power is connected backwards to the opamp, or you labeled the pins backwards. Either way something is wrong since you have the more positive power at the bottom of the opamp symbol. You realize a CT can only measure AC current, right? You won't get any response out other then a short blip if you put DC current thru the hole, regardless of how much current.
H: Voltage regulation on the high side of a Darlington array? I'm looking to build an 3.3V Arduino Pro Mini based LED driver that drives 3 (possibly 6) super bright 10mm LEDs (R, G and B). I intend to use this 3.7V LiPo battery and these LEDs. The LEDs have the following specs (units are V, A and Ohm). I've calculated the required resistor values based on a 3.7V supply. Max Fwd Cur VDC Drop VDC delta Req'd Resistor RED 0.08 2.2 0.1 18.75 GREEN 0.08 3.2 0.2 6.25 BLUE 0.08 3.2 0.2 6.25 I want to drive this with a ULN2803A Darlington Array (DA). I have a few questions. Have I calculated the required resistor values correctly above? Will PWM work for the LEDs when wired into the low EDIT:[I mean't HIGH] sides of the DA? Do I need to regulate the voltage into the common pin of the DA, or can I wire this into the RAW (VIN) pin of the Arduino or directly into the battery? As the battery's voltage drops, I appreciate that the lights might get dimmer -- this is okay (up to a point) as long as the DA continues to function? As an aside, if I used an unregulated wall wart, rather than a battery, would the ripple cause a problem with the DA's operation? Am I being lazy here and should I regulate the high side voltage as a matter of good practice anyway? If I was running it at 5V, say, rather than 3.7V, would the answer be the same? Do I risk the Arduino by drawing too much current if I wire the DA common pin directly into the 3.3V VCC pin of the Arduino? I see everywhere that GNDs should be wired together. Is this true in this case, for both the low and the high sides of the DA? Even if the high side is unregulated? Will picking a higher voltage battery be a better option in terms of brightness, power dissipation, and battery life? Even if the mAh rating of the battery is comparable? Is there a better way to do this (e.g. a shift register, MOSFETs, etc)? I want to have the LEDs be able to be as bright as possible without risking the Arduino, and minimising on power loss wherever possible. Physical space is also at a bit of a premium but SMD chips scare me from a soldering perspective. AI: NOTE - these answers were in the process of being given before Jippie's comments were apparent. His comments I agree with. 1) Resistance = (3.3 -Vled)/0.08 and for a Vled of 2.2v R = (3.3 - 2.2)/0.08 = 13.75 ohms. You got 18.75 ohms so someone is wrong; either you or me. 2) The darlingtons are an array that "grounds" a load connected to the 3.3V rail so basically no, the LEDs are connected in the "high-side" BUT yes, they can be PWM'd 2a) Darlingtons are probably not the best choice because they "drop" about 0.6V when driving a load and you haven't got all that much to play with looking at the green and blue LED specs you have in your post 2b) Best to use conventional transistor, not those configured as darlingtons 3) the common pin on the DA is grounded, the LEDs via resistors (see (1)) connect to 3V3 4) Don't do that - do (3) 5) digest this advise and decide if (5) is a relevant question 6) possibly not but digest the other answers first 7) you can use a shift register to save on IO and you can use fets
H: 22J 6KV and 33J 6KV are two kinds of ceramic cap that seems to be burned out. What do I replace it with? These capacitors are located in power supply module DPS-279BPA section where it is marked with high voltage area. It is a Phillips LCD televisionPhillips 37PFL5603D/10 with no picture and audio, Though it shows the power light in front panel. After I opened the back lid and noticed that these 3 capacitors turned black. Not sure if damaged or not. Other similar cap are still blue in original color. Not having multimeter and ESR I am not able to test these these out. I guess replacement parts will cost less than the multimeter or other measuring devices so thing to just find the replacement part and replace and see if really needed go for other options. I hope I am not in a wrong place, I am sorry that I could not be detailed than this! I tried to search the actual part specifications as suggested but was unable to find appropriate no. I have uploaded the some more pictures hope helps. The Manual suggested looks similar. AI: First, some advice: It's very tricky troubleshooting anything without even an inexpensive digital multimeter. Even a low-grade one will allow you to effectively troubleshoot. Honestly, there's no guarantee that these caps are the only ones damaged. A quick search showed me that this particular power supply (based on the label) is Philips part number 2722 171 00584, a.k.a power supply module DPS-279BPA. If you search online, you may be able to find a complete replacement. Please add the model number to the question. The best way to find out exactly what these are is by a schematic or bill of material, which should be in the service manual for the set. (That being said, I believe the parts are non-safety high voltage ceramic disc capacitors, which any major electronics distributor should sell. You could try Digi-Key.) Update: I found a service manual which mentions the power supply in your photo. Connectors CN2 and CN3 bring high voltage from the transformer to the backlights, and the four capacitors appear to bring the HV signal down to several protection circuits including overvoltage protection. You should check the integrity of the backlights before trying to fix these caps, it's possible that one of the lamps is dead which led to all of this damage.
H: How do I know where to place resistors on my circuit? Some of the books I have state that power comes from the negative terminal on the power supply.If that is the case, the circuit starts from the negative right? Say I have a simple circuit with a 6v supply, an 1K resistor and an LED. If I wire the resistor to the positive source, then wire that to the anode of the LED and back to ground, the circuit works fine. How can this be the case? Shouldn't the resistor be between the cathode and the negative source? AI: It is true that, in most conductors, the actual charge carriers are negatively charged electrons, which leave the negative terminal of the power source, pass through the circuit, and return to the positive terminal of the source. However, early scientists studying electricity didn't know about electrons, so arbitrarily declared that current flowed from the positive terminal of the battery, through the circuit, reeturing to the negative terminal of the battery. Today, almost everyone uses this "conventional" (positive charge) current, and you will avoid confusion by using it also. Circuits work equally well whether you wish to think of them using conventional (positive) or electron (negative) current. For your LED and resistor circuit, it doesn't matter which component is connected to the positive terminal of the battery, as Kirchoff's Current Law says that the current is the same at all points in a series circuit. That is, the resistor will limit current through the LED, whether it is placed "before" or "after" the LED, regardless of which way you think the current is flowing.
H: What makes a display visible in daylight (such as the Pixel Qi)? What characteristics of the Pixel Qi display make it visible under daylight conditions? It seems to have something to do with "daylight grayscale". But what exactly does "daylight grayscale" mean? Is it something that can be accomplished/reproduced in software on any grayscale displays? Can it be reproduced on a color display? AI: The pixels are "transflective", meaning half-backlit and half-mirrored.
H: How to build a switch with Bluetooth? I have a small circuit with a battery and a lamp. If I close the circuit the lamp will turn on, otherwise will turn off. I want to create a very small wireless switch. It will have only 2 signals to understand: Turn On (close the circuit) Turn Off (open the circuit) The circuit will work with a 3V battery. And it need to be as small as possible. So, I think the Bluetooth will be the best. There are other good technology? What I want is a start point. Where can I find a good book/tutorial to start this project? Or, if this is easy to say, how I build this switch? AI: For BLE there are two popular devices: CC2540 from TI nRF8001 from Nordic Semiconductor Both use BLE. You can then connect a relay to them to enable a switch. They have development platforms you can buy rather inexpensively and use (look at the key fob).
H: Powering sub-sytems on a robot with a single battery I am making a robot for a project, and have a quick question about the power system for my robot. I have to power an AVR MCU (5V), 6 servos (also 5V), 4 dc motors (12V), and a camera (9V). I really want to use just one battery for the whole robot. I was thinking of using 4 voltage regulators (i.e.LM780*s) to provide the correct voltage for each sub-system from a LiPo battery (each in parallel with the battery). Will this work the way I need it to? If so, what kind of things do I need to consider. For example, will the servos create a lot of noise on the MCU's power line, or would they be completely separate despite being connected to the same battery? Essentially, I would like to know what the ideal and/or widely used method of powering various components with a single power source is. AI: The issue with using linear regulators (LM78xx) is that each regulator dissipates as heat the power represented by current to the load x Voltage dropped by regulator. For at least the servo motors mentioned, this would be substantial: 6 x Servo Current x (12 - 5). For one thing this will need a good heat sink on the LM7805, for another, the battery will discharge quickly as a lot of power is just being wasted as heat. A scheme that could work is to use DC-DC buck regulators powered from the 12 Volt battery for the 9 Volt camera and the 5 Volt servo motors, and (optionally, if needed) a linear regulator instead of a buck regulator, from the 9 Volt camera rail, for a clean 5 Volt supply to the microcontroller. Also, one would use separate 5 Volt regulators for the microcontroller supply rail and the servo supply rail, to avoid EMI from the servo motors messing with the microcontroller. Buck or switching regulators do not waste as much power or generate as much heat as linear regulators, they have efficiency in the 80% to 92% range. Thus batteries would last longer too. There are integrated buck regulators available as drop-in replacements for the 78xx series. See the Murata OKI-78SR series as one option, there are others as well:
H: Decoding multiple quadrature rotary encoders Scenario I have 4 ACZ16 quadrature rotary encoders connected to GPIO Port D on an ATMega168P. I am only trying to extract rotation direction from them. Position is irrelevant, and it is guaranteed only one encoder will rotate at any given time. Debouncing is handled in hardware using the recommended debounce filter in the datasheet and there is no switch bounce visible on the scope. Problem Differentiating between the encoders is not a problem. Where I run into hurdles is extracting the direction. My first thought after some Googling was a pin change interrupt. Resulting ISR: ISR(PCINT2_vect) { unsigned static char int_count = 0; unsigned char pins = PIND; unsigned char send; if(int_count == 0) { switch(pins) { case 0x7F: send = MIRROR_X_L; break; case 0xBF: send = MIRROR_X_R; break; case 0xDF: send = MIRROR_Y_D; break; case 0xEF: send = MIRROR_Y_U; break; case 0xF7: send = LASER_X_L; break; case 0xFB: send = LASER_X_R; break; case 0xFD: send = LASER_Y_D; break; case 0xFE: send = LASER_Y_U; break; default: send = NOTHING; break; } if(send != NOTHING) { sendSPI(send); } int_count++; } else { if(int_count == 3) { int_count = 0; } else { int_count++; } } } This detected rotation in the correct rotary encoder, but only one direction. A clockwise rotation is decoded correctly, a counterclockwise rotation is still decoded as a clockwise rotation. After further Googling, I tried a polling approach, using similar code. Resulting main loop: while(1) { switch(PIND) { case 0x7F: send = MIRROR_X_L; break; case 0xBF: send = MIRROR_X_R; break; case 0xDF: send = MIRROR_Y_D; break; case 0xEF: send = MIRROR_Y_U; break; case 0xF7: send = LASER_X_L; break; case 0xFB: send = LASER_X_R; break; case 0xFD: send = LASER_Y_D; break; case 0xFE: send = LASER_Y_U; break; default: send = NOTHING; break; } if(send != NOTHING) { sendSPI(send); _delay_ms(40); } } I played with multiple delay values following my SPI transmission, thinking that would fix the issue (actual cycle time is about 20ms), but this approach exhibits identical behavior to the pin change interrupt example. A clockwise rotation is decoded correctly, a counterclockwise rotation is still decoded as a clockwise rotation. Most methods I've found, such as look up tables do not scale well past one, maybe two rotary encoders. What is a better way to do with with multiple rotary encoders? AI: The key is how a quadrature encoding works: two signals are out of phase, so you can detect direction by which signal follows the other one. Combined, they have 4 states they pass through, but they will do so in opposite order for the opposite direction. I.e. 00-01-11-10- for right, 00-10-11-01- for left. As you see, they'll pass both the 01 and 10 states you're looking for - and the only way to know which way is by checking the next or previous state. Given that you can guarantee only one encoder rotates at any time, the scaling of the quadrature decoder isn't really an issue. You can start by finding where the port changed and then decode only that transition. Otherwise, we have the interesting challenge of finding a parallel algorithm for quadrature decoding applicable to microprocessors. A fundamentally parallel operation most of them have is bitwise operations on wider registers. Let's start by finding each channel where a change has happened, given the port arrangement a1b1a2b2 etc, i.e. every 2-bit group belongs to one channel. If we do ((value&0xaa)>>1)^(value&0x55)) we get a parity value. This can then be xored with the previous parity value, and presto, we have a step signal. Next comes direction. Let's set up a Karnaugh map, using inputs a, b, a' and b' (where ' means prior): phase diagram ___/"""\___/""" a _/"""\___/"""\_ b a=0 a=1 b=0 b=1 b=1 b=0 1 means right, 0 means left, x don't care a'=0 b'=0 x 1 x 0 a'=0 b'=1 0 x 1 x a'=1 b'=1 x 0 x 1 a'=1 b'=0 1 x 0 x We have a diagonal pattern, which tends to occur with xor functions. We also have a margin of values that should not be counted (meaning either no step or a missed step). We already found the step function to eliminate those. In essense, all we need is to find the diagonal with 0s in it, so we can invert step to get direction. It looks like the remaining discrimination can be done with b^a': b^a' a=0 a=1 b=0 b=1 b=1 b=0 a'=0 b'=0 0 1 1 0 a'=0 b'=1 0 1 1 0 a'=1 b'=1 1 0 0 1 a'=1 b'=0 1 0 0 1 So, given that we need a'^b' for step and a' for direction, we can save those two bits from the previous step. Our functions are step=a'^b'^a^b, dir=step&(b^a'). old_a_axb = ((oldpin&0xaa)>>1) ^ oldpin # This has a serious bug, in that the ROL step actually used B from # the next channel over. Let's fix it. #b_axb = ROL(pin)^(pin&0x55) b_axb = ((pin&0xaa)>>1)^(pin&0x55)|((pin&0x55)<<1) dir_step = old_a_axb ^ b_axb # Rewrite since the selections get messy old_al = oldpin&0xaa old_ar = old_al>>1 old_br = oldpin&0x55 al = pin&0xaa ar = al>>1 br = pin&0x55 bl = br<<1 axb_r = ar^br axb_l = axb_r<<1 old_a_axb = oldpin ^ old_ar b_axb = bl | axb_r = br*3^ar dir_step = old_a_axb ^ b_axb next_old_a_axb = axb_l^b_axb It might be possible to optimize the a^b operation to occur only once, but given that I needed either a or b in the other bits I leave that to someone else. Also, this method doesn't discriminate between channels at all; use another mask and finding set bits to detect which channels actually stepped. Addendum: The algorithm actually gets a lot cleaner if we do not pair the signals in adjacent bits, but use matching positions of separate variables: # assume, for instance, a[3:0] in pin[7:4] and b[3:0] in pin[3:0] a=pin>>4 b=pin&0x0f # Separate signals into individual variables axb=a^b step=oldaxb^axb dir=olda^b olda=a oldaxb=axb So, for one register width count of quadrature decoders, it takes two stored variables, three xor operations, and one extra temporary register (which rarely matters).
H: Raspberry Pi USB-to-Serial Atmega328 I understand you can create a serial transmission between the Raspberry Pi and an Atmega328 using the GPIO: http://www.raspberrypi.org/phpBB3/viewtopic.php?t=22736&p=293668 I'm interested in having more serial options, like the USB ports. I managed to do so, but with an Arduino board: http://www.doctormonk.com/2012/04/raspberry-pi-and-arduino.html I've searched a lot on this topic and got pretty confused. Is there a safe way to use the RPi's USB port for serial communications with an Atmega328? What would be the easiest safety intermediate circuit? Thanks! (Note: Easiest as in minimal number of components, like transistors and resistors. Preferrably NOT ICs. This is to reduce size and ensure availability of components in my country) AI: The standard Raspberry Pi distributions have FTDI driver support so you can use a USB to serial adapter based on FTDI chipsets. In fact FTDI have released a few products specifically marketed for use with the Raspberry Pi: http://www.ftdichip.com/Products/Cables/RPi.htm http://www.ftdichip.com/Products/Modules/RPi.htm You could also purchase their chip level devices to roll your own custom solution if you prefer. There is also some information on supported USB to serial adapters here, Prolific PL2303 based devices are also listed as supported: http://elinux.org/RPi_VerifiedPeripherals#USB_UART_and_USB_to_Serial_.28RS-232.29_adapters I noticed you have already mentioned a GPIO based solution and a similar FTDI based system. Those are really about the only two options, converting USB to serial is quite complex and certainly the most practical path is a dedicated chipset. To gain some additional serial lines over the GPIO port you could also use a technique called 'bit banging' to toggle an I/O line to transmit data and write something to decode the incoming serial data on another GPIO line. However that would normally require the use of a hardware timer for reliable operation so I believe you would need to write your own kernel drivers. From user code you may be able to use standard timers but given that Linux is not a real-time operating system in the true sense I doubt that would work 100% reliably, especially at higher baud rates.
H: How do I know what the right signal amplifier to use is in order to program a hall-effect sensor? I am trying to look for a signal amplifier in order to program the sensitivity and offset of the A1362 Hall-Effect sensor. Doing a simple google search reveals: http://www.amazon.com/RDL-ST-VCA3-Voltage-Controlled-Amplifier/dp/B0051V1JRG But I feel like this is overkill for the hall-effect sensor. In order to program the hall-effect sensor data sheet I need approximately 27V to send a high pulse, 15V for a mid, and less than 5V for a low pulse. I would appreciate it if someone could point me in the right direction with regards to the bare minimum voltage / signal amplifier needed to program the hall-effect sensor. AI: I see from your previous question that you appear to be trying to do this with resistor dividers and switches; I feel that's very unlikely to work. There's a reason the official dev kit costs $500, and that is that this programming scheme is quite onerous. Bare minimum required from the datasheet is something with rise/fall times of <100us for a 5V -> 27V transition. Current isn't clear, but the largest value in the datasheet is 300ma for fuse blowing mode, so let's use that as our target. I would build this in three phases: 1) Get a suitable power opamp, configured with a fixed gain: http://www.electronics-tutorials.ws/opamp/opamp_3.html ; if you pick R2 = 1k RF = 9k that will give you a fixed gain of 10. LM675 is a possible opamp: http://www.ti.com/product/lm675 : its supply is good up to 60V. I would use a supply a bit above 30V to make sure the amp has headroom. Obviously the power supply also needs to be suitably powerful. (While the opamp is cheap, the power supply may not be, if you don't already have a bench PSU) 2) Generate the desired pulse train using a microcontroller DAC in the 0-3.3V range. Vlow=0.5v, Vmid=1.5v, Vhigh=2.7V. 3) TEST EVERYTHING: using a scope, check that you have the desired pulse train coming out of the DAC, with correct timings. Connect the DAC to the amplifier, and a dummy load (eg. 10k 1watt resistor) to its output. Check you get the right pulse train. Wire up the sensor and test it for real! There doesn't seem to be any way to confirm programming, so I guess you just have to measure the output. Note: the reason why Am I following the procedure to set the sensitivity in Try Mode for the A1362 Hall-Effect sensor correctly? didn't work for you is that you have to keep the programming supply at at least 5V at all times - pulses that go to zero abandon the programming sequence.
H: Groundplanes for Wideband synthesizer I'm build a synthesizer (up to 2GHz) and got a questions regarding the gound planes (analog vs. digital). According to the datasheet (p. 7) some pins must be connected to analog GND, ex. pin 10 must be connected to the analog GND plane. http://www.analog.com/static/imported-files/data_sheets/ADF4351.pdf I read somewhere that it is best to have separate ground planes, connected at a single point. But somewhere else I read that it is best to have one gnd plane, and just be carefully with the the placement of analog and digital blocks. But what is the best pcb layout design? AI: At 2 GHz I strongly recommend a single ground plane. Separating planes with a star topology certainly has its place in low noise audio designs, keeping digital noise out of analog circuitry. But at 2GHz, the dangers of accidentally building resonant circuitry and antennae when you divide up the ground plane completely outweighs any possible benefits. Use a single ground plane. Keep all loop areas as small as possible. Minimise inductances; if necessary, use multiple vias in parallel around decoupling capacitors. Decouple as close as you can to PSU and ground pins. Or invest in serious signal integrity simulation tools (Hyperlynx?) and get/create Ibis models for everything, spend a few months learning the tools and simulating the exact PCB layout until it's right.
H: STM32 USART loopback Is it possible to connect the Rx and Tx pins of the same USART or on two different USARTs on an STM32 discovery board to make a loopback and test the USART? AI: You can do anything with USART lines as long as you stick to one basic rule. To understand this rule, you have to understand how the protocol works. Basically, we have two lines: Rx and Tx. Let's consider these from the device A point of view. Rx is A receives, Tx is A transmits. This means Rx is B transmits, and Tx is B receives. You can now see that these two data lines are one-directional: it's in the circuit who writes and who reads. It's possible to 'hack' a USART communication: sending data to device X and listening with device Y. Actually, it's a great idea. For example: simulate this circuit – Schematic created using CircuitLab In this case, I wanted to read data from A with B, but A sent way too much data. So I added a filter in C. Device A doesn't even notice this change. You can do really anything with USART lines: listening with multiple devices on one line, et cetera. Just make sure there aren't two devices that have Tx and Tx connected. They will interfere.
H: bridge rectifier connected to a raspberry pi gpio I'd like to connect a bridge (full wave) rectifier to my Raspberry Pi (RPi), GPIO pin 22 (configured as an input). I have configured the rectifier such that it has a 120VAC input and 3VDC output (I used a voltage divider on the DC output). The circuit works fine. I'm able to power an LED from the 3VDC output. Now my question is, how do I connect this 3VDC output to the RPi? Do I just tie the grounds together (rectifier DC ground to RPi ground) and then connect the bridge rectified 3VDC to the RPi GPIO pin 22? I measured a 68V difference between the RPi ground and the bridge rectifier DC ground. I decided to hold off on connecting anything until I figured out why there is such a large voltage difference between the two grounds. Any help would be appreciated. BTW, the RPi is being powered by the same 120VAC source that is connected to the AC input of the bridge rectifier. Here's the circuit I ended up implementing: 120VAC Detector Circuit AI: The Raspberry Pi is generally powered from a 5V wall-wart type of DC power supply. The secondary is galvanically isolated from the mains voltage for reasons of personal safety (a fault will not expose the end user to the mains voltage). The DC return of your bridge rectifier circuit is most certainly not isolated from the mains. The Raspberry Pi ground is 'floating' with respect to the bridge rectifier ground - there is no galvanic connection between them, hence your voltage measurement. If you were to connect the DC return of the bridge rectifier circuit to the Raspberry Pi ground, you bypass the galvanic isolation that the DC power supply gives you. This means your Raspberry PI is now mains-referenced, and any fault could potentially expose you you to lethal voltages. I wouldn't do this. A further complication comes if you also hook up an earth-referenced return to the Raspberry Pi, like a connection to a PC, with the mains-reference return connected. When you mix a mains-referenced return like your rectifier circuit with earth, things are going to explode (you essentially short out your bridge through the earthed return, which is often a flimsy wire that gets really hot and melts/catches fire while blowing up everything connected to it). Another reason not to do this. You would be much better off with a small line frequency transformer to (1) step down the mains voltage to a lower level ahead of your resistive attenuator, and (2) provide galvanic isolation from the mains. Put your bridge and attenuator in the secondary of the transformer. With this, you can safely connect the low voltage isolated rectifier return to the Raspberry Pi return. (You also must include a fuse in the line to isolate the rectifier circuit from the mains if there is a severe fault like a transformer fault or a short circuit.)
H: How to ensure that a pin never floats I am making a DAC circuit with uses an AD7541A chip which is going to be connected to another board with a microcontroller on it. Now the AD7541A gets fried if someone turns it on while all the pins are floating. So I want to ensure that even if someone accidentally turns on the circuit with pins floating, the chip does not fry. So what can I do to ensure that? AI: Assumption: Based on the wording of the question, presumably certain input pins must not be floating to a "high" condition when the AD7541A is powered on. The conventional method of preventing a pin from floating, i.e. ensuring that it is held low until some logic state is imposed upon it by an external device, is to use a pull-down resistor on the pin in question. A pull-down resistor is simply a resistor of high value, connected between the pin in question, and the circuit ground. The value of the resistor should be high enough than the external device that needs to assert a value upon the pin at some time, is not unduly loaded, or in the case of analog input pins, unduly distorted in overcoming the resistor's effect. Common pull-down values are 10 kOhms or 100 kOhms. For analog inputs that must be held low until externally asserted, sometimes 1 MegaOhm resistors are used. The selection of resistor value must be such that it is significantly higher than the output impedance of the pin or device that will be asserting a value on the pulled-down pin during normal operation. At the same time, too high a resistance value will leave the pin susceptible to stray noise pulling the pin high on occasion. The reason for using very high values for analog inputs, when a pull-down is used at all, is that if the source impedance the analog input is to read is of comparable magnitude to the pull-down resistance, the combination will act as a voltage divider, lowering the voltage seen by the analog input during operation.
H: How does the collector emitter relationship work with a transistor? So, I'm not understanding how NPN transistors really work in this scenario. In this image, I have highlighted what I understand to be the collector and emmiter. My understanding is that power flows from the collector, TO the emitter right? In this example, the base either turns the circuit on or off. I get that the circuit is open when the transistor isn't being fed positive power. But, why is the emitter running to ground? Shouldn't it be the other way, collecting and emitting to the LED? AI: An analogy may help to visualize this: Think of the transistor as a valve or faucet. The base is the knob, the water tends to flow from the positive side (storage tank) to the ground (drain), if you follow the normal "current flow" directions. The LED is like a little transparent glass section in the pipe, with a small ball loosely held in that section. When the faucet is opened, water will be allowed to flow, and the little ball will jump around due to the water's flow. This will happen whether the LED is above or below the faucet section. Now for the case of electron flow, as opposed to conventional current flow direction. Consider the same pipe and faucet, but with the ground being a source for some gas, say natural gas at high pressure underground. The Vcc is the open air, normal barometric pressure. Again, as the faucet is opened up, the gas will flow up the pipe, the little ball will bobble around. Again, the glass pipe section (LED) could be before or after the faucet, it won't matter. I hope this analogy helped.
H: Sending "larger than 8-bit" quantities over an 8-bit link I have data that I logically manipulate in 12-bit quantities which I need to move over an UART link. (actually soft-serial from Mbed to PC over USB cable, but that's irrelevant) I was thinking about using the common 8N1 (8 data bits, no parity, 1 stop bit) UART setup, which just leaves me with the question of how to "chop up" my 12-bit values in to two 8-bit "packets". I could of course implement something trivial myself like sending the 8 lowest bits first and then sending the 4 highest bits in the second packet, with the other 4 bits of the second packet not used. Or I could chop it up in to two 6-bit pieces, with the other 2 bits of each packet either unused or designated for meta-information (like whether the current packet is the first or second half of a 12-bit quantity). Before doing that I wanted to see if there was any standard or a "standard industry practice" way of chopping up data larger then 8 bits in to 8 bit quantities? Link speed should is not a issue since my requirements are about 3 kbps. (In the absence of a "low level communications protocol"-Stack-Exchange I feel this is the most suitable platform for this type of question, per various discussions on Meta.) EDIT: All answers were valid and good. I marked Olin's answer as correct since it's the way I went with my project. AI: No, there is no standard or even generally accepted common practise. If you are really sure all you will ever send over this link is a stream of 12 bit values, then you can put 6 bits in each byte and use the remaining 2 bits to identify whether this byte contains the high or low 6 bits of the 12 bit word. That leaves two more codes for a little expansion. However, that's not what I'd, and certainly not what I usually do. No matter how much you think to the contrary now, chances are good that sooner or later you'll wish you could send something else over the link, even if just for debugging. Since you say bandwidth is not a problem, do it right now so that expanding the protocol will be easy. What I usually do is send data in packets that start with a opcode byte, which is then followed by whatever data goes along with that opcode. I have done this many times. For clarity of documentation, I call packets from the host to the micro commands, and from the micro to the host responses, but that doesn't mean responses must be only a result of commands. This scheme is easy to implement in firmware. It's easy on the host too, but that doesn't matter. With the infinite processing power and memory of a PC, any protocol you cook up that is tractable on the micro will be easy on the host. The point is to keep it simple on the small resource-limited system and have the other system adapts as necessary. On receiving, I use a jump table for the opcode byte. That dispatches to the routine unique for that command, which knows how many more input stream bytes to read and what to do with them. When done, command routines jump back to a common return point, which fetches the next opcode, dispatches thru the table, which runs the next command routine, etc. Once you have this mechanism set up and a test program on the host to read and write this protocol, it is really simple to add another command or response. Being so simple, you'll start to use this facility in ways you might not have envisioned at the start. For example, you can make a command that sets a debug bit in the firmware which causes other code to do something special. Or you realize there are some options you would like to control, maybe read back data memory, a special command that does something one-off for testing, etc, etc. This sort of stuff comes in really handy a lot. To solve the particular case you asked about, you'd have a response that is followed by 2 bytes which contain the 12 bit number. In the micro, that's as simple as sending the response opcode byte followed by the two data bytes periodically. Meanwhile it leaves open the option of sending other things without messing up the stream of 12 bit values.
H: Decoupling capacitor across Raspberry Pi GPIO input (+ Arduino + robotics) I've been messing around with a robot kit from Parallax (the BOE Shield Kit), which has a 5xAA (7.2 V?) power source. The BOE shield includes its own 5 V regulator, which is used to control servos that in turn spin the wheels of the robot. The regulator is rated for up to 1 A of regulated power. Now for the fun part: I want to also power a Raspberry Pi from this same circuit. I've been able to successfully power the Raspberry Pi via the Arduino's own 5 V output (not through the BOE regulator) and the GPIO pins. The Raspberry Pi has a single USB peripheral - a Wi-Fi adapter. When the servos are not running, or when they're running steadily, there's no problem, and the whole system, including the Raspberry Pi, chugs along happily. When the Raspberry Pi isn't doing anything over Wi-Fi, turning the servos off and on also has no effect on the Raspberry Pi's operation. However, when the Raspberry Pi is using Wi-Fi heavily (I ran 'apt-get update' as a proof of concept), and I start turning the servos, the Raspberry Pi resets. I'm assuming it detected an undervolt condition and rebooted to protect itself. Would a decoupling capacitor across the Raspberry Pi's inputs work to overcome these periods of "startup" servo load? Something like this: (source: circuitlab.com) If so, what type and size of capacitor should I use for this? Does it make a difference how far from the Raspberry Pi the capacitor is placed (I don't really want to solder one directly to the Pi)? (Yes, I know, I used a relay symbol to depict the servo in the CircuitLab diagram, but they didn't have a "servo" block. Just imagine it as "thing that draws a lot of current for a very short time".) AI: A bypass capacitor on the input to the RPi might be enough, but it depends on the duration and magnitude of the dips caused by servos. I would use an oscilloscope to investigate the dips. If they are very short (us) then I would add arbitrary caps (100uF, 1000uF) and re-test. Another solution would be to try and confine those peak draw pulses by adding a diode from the battery to the Arduino, then connecting the Vin to the 5V regulator to before the diode. This way, transients won't pull from the input caps of Arduino, only from the battery.
H: Can someone explain how this truth table was filled in from a Mealy model? I'm having a bit of trouble figuring out how the truth table was filled in. I understand how to draw the diagram from the first table and I understand the boolean expression given from the truth table but I can't quite grasp how the truth table was filled in. Could anyone do me a favor and explain it for me? AI: The way the truth table was filled is the following: You make a list of all the possible states and inputs, in this case A-D in with their respective mapping and X either 0 or 1 for this case. This should cover columns y1,y2 and X. Then we reference the first table, Which tells me that for State A[y1=0,y2=0]and X=0, my next state should be D[Y1=1,Y2=1] and my output Z, and so on and so forth until you go through all the possible states and input combinations
H: how to use CT to measure current I have purchased CT but don't know what his terminals means and how to identify primary and secondary coils terminals. I am software engineer but currently learning pic controller. as for I have read LM35 using pic16f877a and now working to measure load using Current transformer but no achievement until now. Can anyone tell me how to use current transformer to measure current with wiring diagram with explanation. any help would be help full as am trying google since more then 83 hours and have tried few circuits but no help. below are the provided pics of CT. Supplier didn't provided me any technical manual. I want to measure load of AC current of three phase, which is provided from grid to our office. If I pass load wire from primary coils which is center hole then I receive AC 1.08v on secondary coil terminals. how Can I connect this to adc of Pic16f877a? am currently using this circuit to read value with adc of pic16f877a, if it's ok? Update:: Currently am using provided code to take sampling but value varies from 485 to 535. while constant value without load is still 514. for load I have used iron and made 14 turns in CT as provided in picture. to connect CT I have used @Olin Lathrop provided circuit in one of the answer. Peter Bennett has suggested to rectify signal is it a case? set_adc_channel( 1 ); value = read_adc();//Read ADC Value for(i=0;i<200;i++) { value = read_adc();//Read ADC Value temp = value/1024; c = 0; if(temp > c) { c = temp; } delay_ms(2); } for(i=0;i<200;i++) { value = read_adc();//Read ADC Value temp = value/1024; c = 0; if(temp > c) { c = temp; } delay_ms(2); } for(i=0;i<200;i++) { value = read_adc();//Read ADC Value temp = value/1024; c = 0; if(temp > c) { c = temp; } delay_ms(2); } for(i=0;i<200;i++) { value = read_adc();//Read ADC Value temp = value/1024; c = 0; if(temp > c) { c = temp; } delay_ms(2); } for(i=0;i<200;i++) { value = read_adc();//Read ADC Value temp = value/1024; c = 0; if(temp > c) { c = temp; } delay_ms(2); } temp=c; printf(lcd_putc,"=:%d=:%d=:%d=:%d=:%d:=\n:%f:", input(PIN_B0), input(PIN_B1), input(PIN_B2), input(PIN_B3), input(PIN_B4), value); output_low(pin_B7); delay_ms(2000); } AI: From the pictures of the CT it says 60:5A and I'm making a guess that means if you input 60A through the hole, then the output (into a small value burden resistor) will be 5A. If the max input current is 60A through one phase of your 3-phase supply, the current into your burden resistor (1ohm) will produce a peak-to-peak voltage of 5A x 1ohm x sqrt(2) x 2 Vp-p. This equals 14.142Vp-p. This will be too much for most micros BUT we don't know what your anticipated max input current will be. Assuming it is 60A you'll need to attenuate the output voltage by a factor of something like 5 to make it work correctly within the limits imposed by the ADC you might use. EDIT - The 1ohm burden resistor is likely to be the best candidate for adding attenuation. If instead of 1ohm it were 0.2ohm you have, in effect reduced the output voltage by one-fifth and this will now produce 2.828Vp-p - now use Olin's circuit (shown elsewhere on this page) but with 0.2ohms instead of the 1ohm shown. Another advantage of reducing the burden to 0.2ohms is power dissipation; with 5A flowing, the power dissipated iin the 0.2ohms resistor is 5W and much more manageable. I'll also add that the measurement on your meter (picture above) is somewhat confusing. You appear to be measuring 1.06VAC but note you have fed the input wire through the centre of the CT several times and this is not representative of anything really useful.
H: Breakout Board for 1.27 mm to 2.54 mm Is there any breakout board like this for 1.27 mm to 2.54 mm pitch? Example for 1.27 mm: Example for 2.54 mm: I also appreciate any hint how to perform this conversion on any other cheap way. AI: Many! http://www.futurlec.com/SMD_Adapters.shtml are perhaps the least expensive. Digikey stocks Surfboards. My favorites are from http://www.proto-advantage.com/store/, who will actually order the IC for you and solder it down before shipping.
H: Can I use Eclipse CDT to debug a PIC18 using PICkit3? I'm curious and interested in buying a PIC18 micro and a PICkit3 to do some programming on a breadboard, to learn a bit. I like using Eclipse CDT for C development quite a bit. Is it possible to use Eclipse rather than MPLab X, the Netbeans version? AI: Theoretically, it's possible to build stuff. The XC toolchains are based around GCC, so if you could figure out all of the needed command-line arguments, they should work with any IDE. That being said, one of the nice things about using the IDE is it abstracts those command-line arguments away into nice menus and GUIs. Where you may run into difficulty is flashing and debugging, as these are functions of the IDE itself (to the best of my understanding) and not the XC toolchains themselves.
H: DIY Inductor: Solve for number of turns without knowing the length? I'm trying to wrap my own inductors (air coil) for an RF circuit that I am making and I am having a little trouble solving for the number of turns I need to reach the desired inductance. \$L=\dfrac{D^2N^2}{18D+40l} \$ L = inductance in uH D = coil diameter in inches l = length of the coil N = number of turns I'm wondering if there is a way to negate l from the equation using the gauge of the wire. I'm using 32AWG magnet wire and have found that 113 turns is equivalent to 1 inch of l. Can I just replace l with N/113? My goal is to be able to measure the diameter of the non ferrite core I am going to wrap around and plug in the desired inductance. It shouldn't matter how long the coil is in the end unless I reach the end of the core and wrap another layer on top. If possible, is there an online calculator that will do this for me? AI: You have experimentally derived the equivalence that 113 turns yields one inch of coil length, yielding the conversion factor (1 inch / 113 turns). Obviously this tacitly depends on the coil diameter, but is a sound figure for the diameter under which you established the measure. If you have 113 turns that is one inch. If you have 226 turns that is two inches. and so forth. So Length definitely equals number of turns / 113. Looks to me like you can safely substitute N/113 for l. Just keep in mind this doesn't generalize because of the implicit dependence on diameter built into the 113. You should probably just ask the second part of your question as a new question. It's way more interesting than the part I'm answering here :-).
H: PIC turns on with the Rx pin If I connect the Rx pin of my PIC18F2550 and GND to another already powered-on circuit, the PIC turns on and starts running code. There is nothing in the datasheet preventing this. Is this normal? PS: Rx and SDA are connected toghether, but still the PIC shouldnt turn on at all. AI: You are parasitically powering your IC through the protection diodes on the Rx IO line. I'm assuming you have voltage on the Rx line (presumably 3.3V or 5V). This is getting into the PIC Vcc through the protection diodes on the IO pins. From the PIC18F2550 datasheet: I/O pins have diode protection to VDD and VSS. There's not much you can do about this, and having any current flow through the protection diodes is a bad idea (they're not intended for this). You will have to modify your circuit to prevent voltage from being present on any of the PIC pins when the PIC is not powered. If you can't prevent voltage from being present on the PIC IO lines when it's unpowered, you should clamp the Rx line to Vcc and Gnd with shottky diodes. Since the diodes in the PIC are constructed on the silicon die in the MCU, they are plain-old silicon diodes, with a \$V_{F}\$ of ~0.6v. Since the clamp diodes are schottky, they will begin conducting before the internal diodes on the PIC, so the MCU will be safe. Of course, if the source driving the Rx line can source enough current to power your whole circuit, you'll wind up simply powering your circuit this way. To compensate you'll need to add a series resistor inline with the Rx line.
H: What's the best/easiest way to measure an unkown inductance without an RLC meter? Is there a decent way to measure inductance accurately using an oscope and a function generator? The best method I can find is to build a tank circuit and sweep the frequency until the highest voltage appears. Then use the formula below to solve: $$f = \dfrac{1}{2\pi\sqrt{LC}}$$ It seems like there must be an easier way! AI: I've used a two terminal oscillator, with the inductor in parallel with a suitable capacitor, with a scope or counter to measure the oscillation frequency. I once checked an inductor on a very expensive inductance meter at work, and the values were identical. The source-coupled oscillator using two FETs is ideal for this application, or the LM311:
H: STM32 - PC serial communication What are the available options or ways to connect the STM32 discovery board using UART to a PC via USB or the serial port? What is the required hardware/cables? AI: As Chris mentioned, you can buy a FTDI RS232-USB converter. They're really popular and are cheap. Here's one: https://www.sparkfun.com/products/9716 Simply hook up the TX & RX headers on the board to your microcontroller, download the driver from FTDI, open up a terminal and go!
H: What should I get to desolder components from random boards After failing trying to use my friends blow-torch to De-solder components from all these circuit boards and burning them badly and probably both of us getting lead poisoning and smelling the crap all day, I decided that I were to invest a bit of my money on de-soldering technology. I know Radio-Shack is a bit pricy, but I can bike to it and get free shipping therefore I don't want to get it online. I first heard about the de-soldering wick, but that runs out and I've heard it isn't the best. After a bit of internet surfing, two things popped up that seemed they may be suitable this and this. The first one is a desoldering iron with a bulb. I would like to go for this because it is cheaper but I don't know if it will work very well (like it not sucking up any solder or me having to replace the bulb ALL of the time). It does look nice because of it's one-handed-ness but does it work? any experience with these? The second one was a de-soldering vacuum and it was a bit more pricy but may work better for my needs because of its spring-loaded pump. So... Is the first one suitable for de-soldering a bunch of circuit boards, or should I get the vacuum? Sorry if it is not "on topic" AI: You could also potentially use ChipQuik. It's mainly for SMD components but I suppose it could be used for thru-hole components. https://www.sparkfun.com/products/10925
H: Degradation of AC signals as inputs of inverter amplifier circuit i recently, did a configuration of an inverter op amp model and i fed it with an analog signal of the form$$S(t)=2sin(1000t\pi)$$ As you may know, the general response of an inverter Op Amp (741), is the additive inverse of the resistance pluggers to the output and the one plugged to the input, times the input signal. When put high values of R2, the oscilloscope wave form change and it looks like a square signal, i wonder if anyone knows why is that, is that behavior related to the system, the IC, the oscilloscope. Is that related with FT in any way? Thank you very much. Implemented ciruit: (R2=10k), (R1=100 ohms) (vcc=15) Input signal: Output signal: AI: You're railing your op-amp. Basically, the output can't swing to the power rails. As such, even though your circuit has a gain of 100, the maximum voltage you could ever reasonably expect to get out of the output would be +-15V. Note that this maximum is independent of the gain. There are basically two things you can do. You can increase your power supply voltages, or decrease your input signal magnitude. Note that no real op-amp can ever swing completely to the rails. A modern rail-rail output op-amp may swing to a few millivolts of the rails. However, you're using the ancient (and extremely crappy) 741 op amp. This is not a rail-rail op-amp. From the 741 datasheet: VS = ±15V RL ≥ 10 kΩ Min: ±12v Typ: ±14v You can see with ±15V rails, and a 10 kΩ load on the output (what you have), the output swing is typically +14V - -14V, with a worst-case situation being ±12v. So basically, your circuit is doing exactly what you would expect, given the op-amp you are using.
H: Amperian loop to measure solenoid's magnetic field My textbook proves the formula \$B =\mu_0In \$ for a solenoid by taking a rectangular Amperian loop as shown here: The problem I see with this though is that it only takes into account the contribution of the current going out of the page since the loop only surrounds one side of the solenoid. If I were to take an Amperian loop along the other side only, then the same result would hold: \$B =\mu_0In \$. Shouldn't these two magnetic contributions then superimpose to create a magnetic field, \$B =2\mu_0In \$ within the solenoid? AI: If you could do that, then you could also superimpose the contributions from the vertical plane (the plane normal to the sheet of paper) to get B=4μ0In. Or again at every degree around the coil for B=360μ0In. Which would be ridiculous. Instead, if you look at that row of conductors within the orange loop, consider that it is symmetrical; the field below it and the field above it (from the infinitesimally thin sliver of conductor passing through the paper alone) would be identical. (Correction : the magnitude would be identical; the direction would not!) Integrate the field from all those slivers around the entire coil and the total field inside the coil is B=μ0In. There are exactly as many "lines of flux" outside the coil, but distributed over a much larger area (theoretically extending to infinity), so the external magnetic field is relatively low.
H: 4 bit mux input/outputs If i have a 4 input mux with the output being in the form of S1 AND NOT(s0) MY truth table therefore looks like the following (remember NOT(S0)). S1 S0 X 0 0 0A 0 1 0B 1 0 1C 1 1 0D Does that mean that the inputs have to be A=0 B =0 C=1 and D=0 in order for the output to be the above boolean equation? AI: Yes, that's how you would implement the logic function with a multiplexer.
H: Why is open hardware so rare? I'm trying to understand why open hardware is so much harder to come by than software. I've tried looking around online and I couldn't find as satisfactory explanation. I understand that hardware is so much easier to keep proprietary and so much harder (impossible) to reverse engineer (in the case of ICs, not PCBs), but why would that hold back open hardware initiatives? Is it the cost of manufacturing? Is it the lack of shared knowledge about hardware design? Is it the complexity involved? With the advent of FPGAs making it so easy to design hardware (although they themselves are proprietary as well), I would expect that open hardware would be taking off at a much faster rate than it has been. I'm sorry if this is the wrong place to ask, but this has been perplexing me for about a year now and has made me wish I had taken Computer Science instead of Computer Engineering. AI: Everyone can edit source code at home, very few people have a chip fabrication plant to knock out a couple of custom chips. Bytes are free to create and distribute, materials are not. There's also the issue that source code is portable, and although CAD files etc. are sort of portable, there's a lot more overhead & errors & setup cost wasted materials. 3D printing crosses some of the boundaries, perhaps a bit of effort could do the same for the (much older) technology of machining, both parts & PCB's. Edited to add: re-reading the question, and perhaps the intent of the question relating to FPGA's, I would say that they're currently still a bit of a dark art to many, and just not on the radar of most people. The entry barrier is quite high, in terms of effort, understanding, and tools.
H: Relationship between the circuit bandwidth and the gain for an inverter op amp do you know the relationship between those two quantities, for an inverter configuration of the op amp. I know graphs, but i do not know any equation or function that relates those two quantities. AI: The two quantities on the graph you refer to are called "unity-gain bandwidth" (12MHz) and "3db point of open-loop response" (24Hz). If you do understand graphs then you can see that for each decade of frequency change the red-line changes by 20dB. This then allows you to predict any points on the line to a reasonable degree of accuracy. nb if you know that the op-amp is a simple type of device (20dB/decade roll-off) then you only need one of these two points to predict the other. This graph (for most simple op-amps) generally applies to any configuration either inverting or non-inverting. When you apply feedback to an amplifier to configure it as an inverting amplifier (for instance), a new line is drawn that indicates the new frequency response of the circuit. This new line, intercepts the slope-part of your graph somewhere between 24Hz and 12MHz and, at frequencies lower than the intercept, the gain remains constant. For an inverting configuration |gain| = Rf / Rin where Rf is the feedback resistor and Rin is the resistor in series with your input signal before it connects to the inverting input of the op-amp. If Rf = 10 x Rin then the voltage gain is ten (in dBs this is 20dB). If you follow the blue line (below) from 20dB on vertical axis to where it hits the red line it intercepts at about 1MHz - this will be the new 3dB point of the inverting circuit. So, you went from an op-amp with an open-loop characteristic to a closed-loop characteristic having a stable bandwidth of 1MHz and a gain of 20dB
H: Analog to Digital converter module of MCU - Conceptual question Please consider the following codes: //Code Sample 1 void func_val(void) { unsigned int val; ADCSC1 = 0x00; // sets the required channel. while(!ADCSC1_COCO); //check for conversion complete flag. val= ADCRL; } //Code sample 2 void EvalProx() { unsigned int proxval; ADCSC1 = 0x02; // sets the required channel. while(!ADCSC1_COCO); //check for conversion complete flag. proxval = ADCRL; } Now both the samples are snippets from a bigger code, which compiles and works. My question is about the concept of Analog to Digital Converters in MCU. ADCRL and ADCRH are the registers in which the converted values are stored. ADCSC is the status control register in which I have specified two different channels to be used. Question: The ADCRL/ADCRH are same for the two different setting of the ADCSC i.e. same for both the channels. So does the value of proxval influence the value of val when accessed? i.e. If func_val() is executed and then EvalProx(), is the value of proxval influenced by the val? (when both the values depend on ADCRH and ADCRL) I hope I am clear. Before down voting this question, I request, please take some time to tell me why you have down voted, so I can improve my question. Datasheet of the used MCU: MC9S08DZ60 Specific Page Numbers: Chapter 10 :- Page 181,182- for ADCRH and ADCRL. AI: I doubt that would be the case, Usually in a case like this the compiler would read the value of ADCRL and store it a location in memory that is associated with the variable val or proxval. You can verify this by looking at the generated assembly code by the compiler. But if your worried that's I would declare val and proxval as volatile variable. If val and proxval where pointers to ADCRL then yes calling one function would affect the other but as regular variable the value from ADCRL gets actually stored to variable
H: Is it true that CISC architectures generally consume more power than RISC architectures? I keep hearing CISC architectures consume more power than RISC architectures. This is said to be the reason for using RISC architectures for low-power applications. I am a skeptic, I think it could be possible that the low-power consumption of RISC is just a confirmation bias after seeing examples of low-power RISC architectures. I am not sure if there is a scientific basis to this. The reason could also be the availability / low-cost of licensing of RISC architectures for embedded applications. The reason that is usually given for RISC consuming lesser power is said to be a lesser complex decoder unit compared to CISC. Is this true? Do RISC architectures consume lesser power than CISC architectures? Or does CISC vs. RISC really not matter for power consumption? AI: On the basis you can't link duplication across SE board, I'll duplicate here: https://stackoverflow.com/questions/20298991/does-generally-risc-processors-have-lower-power-consumption-than-cisc-processors No, they don't. It was commonly believed in the past that RISC CPUs were more power friendly, mostly due to the large overhead of maintaining the large ROMs needed for CISC. However, a recent study comparing several workloads on multiple platforms finally ended that myth, stating: there is nothing fundamentally more energy efficient in one ISA class or the other. It's still true that many implementations of these ISAs are directed at certain market segments that still reflect this classification, you'll find more x86 at the segments with higher power envelopes such as PCs and servers, and more ARM at the low power and embedded segments, but these are mostly design points and marketing decisions. There's nothing fundamental preventing a CISC ISA from entering lower power domains. Don't mix that with backward compatibility - x86 for e.g. would have a hard time reducing power while still keeping all legacy modes and specialized ISA, but it's another issue. It's also not a real block, as can be seen in Atom based implementations, some of which even going below 1W TDP Credit to Leeor for linking the study.
H: What would happen if I inject the charges (ESD) at PCB many times and PCB is completely floated (isolated) from the earth? Just I wonder: If I inject the charges (ESD) at PCB many times and PCB is completely floated (isolated) from the earth. Will charges be dissipated or remain? I think charges will be charged in the conductors like capacitor. If I touch it, charge will flow out. Is that right? AI: This depends on the %RH and the surface dust, flux or other contaminants. Even floating PCB’s have some leakage currents with TBD Gohm * picofarad = T, time constants. So dwell time between discharges is often specified with an environmental in ESD susceptibility tests. Accumulation of charge voltages will occur but never last forever.
H: Is there a default state of a configurable IC? I am making a USB hub and the controller chip is configurable, but i am wondering if the hub can work without configuration, if I can put a bunch of no connect flags on half the pins. Here is the datasheet. I am using the USB2514B version. AI: 1.1, first sentence: yes, there is a default configuration "that might work for most use cases".
H: Was the last mile copper wire not the limitation in dial-up internet service? My local internet service providers can provide ADSL (asymmetric digital subscriber line) service at various speeds, for example, 50 M bits per second. This service is in Canada. Is this typically provided on the same twisted pair of copper wires that in the 1990s was formerly used to provide dial-up internet service? In other words, I want to know if the last mile of copper wires was not the data rate limiting facility in the old days of dial-up internet service or has the last mile been upgraded in the years since? Also offered in my area is fiber to the home but that ends at a separate wall outlet so it seems to be a parallel system. If it is a parallel system it would seem that the copper wires are still in use and they might be the same copper wires that have long existed. AI: Is this...the same ...pair of copper wires that...was formerly used to provide dial-up internet service? Same wires, but those wires weren't put there for dial-up, they were put there for voice. And, the whole telephone switching system was put there for voice, and that includes the trunk lines that run between cities, and between exchanges within a city. In order to make the best use of those trunk lines, the voice circuits were multiplexed. And, the multiplexing scheme allowed just enough bandwidth (typically, 4kHz) for each voice channel to transmit intelligible speech. It was the arbitrary bandwidth of those virtual voice circuits, and not the physical characteristics of the "last mile" wiring that prevented dial-up from ever going faster than 56k.
H: What direction of force on the conductor in a magnetic field? The question: The answer: In my opinion the force should be UP! Source: PPI PE Power Practice Problems, 4th Edition – Over 400 Electrical Engineering Practice Problems for the NCEES PE Electrical Power Exam John A. Camara PE Publisher ‏ : ‎ PPI a Kaplan Company; Revised, Fourth Edition, Revised (March 10, 2021) ISBN-10 ‏ : ‎ 1591267862 ISBN-13 ‏ : ‎ 978-1591267867 AI: I don‘t know what type of hand you have, but with my right hand it goes like this: Current: Index finger pointing into the paper. Mag. field: Middle finger pointing right. Force: Thumb pointing down.
H: Capacitor on output of regulator causing short circuit We were using switching regulator and when we turned on the regulator short was found. C285 was damaged. After removing C285 , regulator worked without any issues. We were suspecting inrush current due to capacitor placed before inductor. Can there be some other reason for this issue? AI: Your SWH1.. are switching outputs of your regulator; you really must not put the capacitor where you put it: Instead of rapidly switching the current through the inductor, you'd guarantee the current change is always limited by the capacitor. That is the literal opposite of what you want in a switch mode supply! Of course this means you'd have a very very high AC component through the capacitor, with the potential for damaging it. You probably wanted to put the capacitor on the other side of the inductor? Consult your regulator's data sheet for reference circuits.
H: Can anyone please help me identify this diode and possibly link me to a datasheet I need to replace this part on another identical board. Any information on what type of diode this could be or maybe a datasheet link. I have searched the internet and I have come up empty handed. AI: It is an ON Semiconductor MRA4004T3G Marking code R14 = MRA4004T3G It is rated for 400V and 1A.
H: lowering output level of a phono preamp I built a RIAA phono preamp that works great from these schematics: But the output level seems a bit too high. What would be the best way to lower it? AI: The simplest solution might be to use a resistive divider in the output. Alternatively you could increase R5,11 and decrease C2,10 in proportion.
H: What effect in the current will have the change of the diameter of coil but same length of coil and same magnetic flux? First image is one coil with the large diameter and a magnet rotating to create current in the coil. Second image is the same set but the diameter of coil is smaller. AI: I will take the induced voltage as a criteria since that's the physical cause. A rotating magnet with a static coil should have the same characteristics as a rotating coil in a static magnetic field. The formula for the latter is generally known. The amplitude of the voltage is dependent on the number of turns, the diameter and the frequency. We are interested in the product of area times number of turns (A⋅N). If you have a coil with diameter d and number of turns N, than the number of turn has to increases to k⋅N if you reduce the diameter to d/k (in order to keep the overall length the same). So the number of turns increases, but A=pi/4⋅d², which means the area is reduced bei 1/k². Overall the product changes by k/k², thats equal to 1/k. This means the induced voltage will be reduced by a factor of 1/k if you reduce the diameter by 1/k.
H: Is it safe to exceed the power supply current rating for a pump? I want to buy a water pump that has capacity DC 3.5V-9V 3W which by my 5V USB charger makes 0.6A. My charger has output 5W 1A. Is it safe to exceed the 0.6A value by 0.4A? AI: It’s never wise to exceed rated current with surges without storage capacity depending inrush current limits. The pump power may rise >500% on startup and drop to 5/9 th of 3W max at 5V depending on load or lower. It is unknown how your load will react unless you test it with a flyback protection diode to opposite power rail. Measuring pump DCR will tell you the start resistance and surge current.
H: IC protection diodes confusion This question is (loosely) related to my previous question here. I wanted to check the ESD protection diodes of the LPC1114 MCU from NXP. So I measured all pins on a brand new LPC1114 MCU with a multimeter in diode test mode and I am confused about the results. Measurement setup 1: Connected red (anode) multimeter probe to VCC Connected black (cathode) multimeter probe to GPIO (e.g. Pin1 PIO2_0) ==> Result ~1.2V Measurement setup 2: Connected red (anode) multimeter probe to GND Connected black (cathode) multimeter probe to GPIO (e.g. Pin1 PIO2_0) ==> Result ~0.54V (When I reverse the measurement polarity, I get a open circuit reading) What I don't get is why in the first measurement the cathode seems to be on the GPIO side? For a proper circuit protection, I would expect the cathode of the supply protection diode to be on the VCC side. Edit1: I made a mistake and made the measurements when the MCU was still soldered on a PCB. So I removed the MCU and got the following measurements (my multimeter diode test has Vo=3.75V and Io=0.6mA) I think this brings it back to what I was expecting: A diode from GND to PinX and a diode from GND to VCC (although the diode from PinX to VCC seems to be missing). AI: Not all ESD protections are using this "classic" circuit: simulate this circuit – Schematic created using CircuitLab In more modern designs, some diodes might be replaced by "grounded gate NMOS" where the parasitic "snap back" behavior of the NMOS is used as a fast clamping device. simulate this circuit When you measure between IO and VSS you would see the Drain-Body diode of the NMOS. When you measure between IO and VDD my guess is that you're seeing the diode between VDD and VSS in series with the NMOS where the NMOS behaves as a "MOS diode" so you would measure \$V_{GS}= V_t\$ which is often around 0.6 V, in series with that diode that would be ~1.2 V. I would suggest to measure between VDD and VSS, do you see the diode D3 as I have in my schematics? I do not know what the actual design of the ESD protection on this device looks like but the fact that it doesn't follow your expectations doesn't mean there's anything wrong with these devices.
H: Weird result when finding ripple bounds of RC circuit with square wave input If \$V_{ext}\$ is applied to a RC circuit, then voltage across capacitor is given by: $$v(t) = V_{ext} + (V_i -V_{ext})e^{-t/RC} $$ Using above to find the ripple bounds \$v_l\$ and \$v_h\$, get two equations: $$v_h=A + (v_l - A)e^{-aT/RC}$$ $$v_l = 0 + (v_h-0)e^{-(T-aT)/RC}$$ Where \$A,T, a\$ are the amplitude, period, duty cycle of the input square wave. Eliminating \$v_l\$ gives: $$\color{blue}{A(1-e^{-aT/RC})} = \color{purple}{v_h(1-e^{-T/RC})}$$ If I'm looking at it correctly, the left side represents: \$\color{blue}{\text{voltage charged by the capacitor in time $aT$ when external dc voltage is $A$. }}\$ the right side represents: \$\color{purple}{\text{voltage charged by the capacitor in time $T$ when external dc voltage is $v_h$. }}\$ The equation above says these two voltages are EQUAL! Is this a coincidence or something interesting going on here? I'm not able to see further why they are equal... Love to hear your insights! simulate this circuit – Schematic created using CircuitLab AI: The exponential terms on the two sides of the equations are not the same. You only have equality if the duty factor is 1, which means that you have a step input rather than a rectangular wave. This makes sense. If the input is a step that stays high then the capacitor voltage will eventually be equal to \$A\$, the input voltage.
H: Ethernet over individual wires I am doing the integration of an aircraft device that uses Ethernet 100BASE-T as its main communication line. The manual says the device comes with its own testing cable which is approximately 2 feet long but it does not feature any twisted pair in it. Instead, the testing cable consist of 51 loose individual wires all crimped to micro D-SUB connector. Will the ethernet communication work in this kind of setup? On how long of a distance should I expect to have a 100Mb/s ethernet link over loose wires, if at all? AI: Will the ethernet communication work in this kind of setup? Maybe yes, out of pure luck; 100 Mb/s is really really really old, and 0.7m is not that long, and modern Ethernet hardware has really gotten good. It's impossible to tell how long things might work this way – this cable has the wrong impedance, will pick up interference, interfere with other electronics... Together with how "forgiving" the actual network hardware is, that means you can't make any reasonable statement: As a cable for testing, this is completely unsuitable, as the point of testing is producing a reliable environment. So, make a better cable, throw this away. I mean, this is aircraft electronics of all things. The system designers here should know better. Delivering this kind of cable would be a violation of base design requirements in my book, and you should not integrate the device.
H: Induction motor breakdown power The question and the answer is: However, I think there is a mistake. Below is my solution: Since ZRotor = 0.3 + j0.35 Ω R2/s = 0.3 Ω from the below equation, the maximum slip can be found: s = 0.474 So, R2/s = 0.3/0.474 = 0.632Ω To find the current I = 120/(0.2+j0.25+j0.35+0.632) The magnitude of the current = 117 A Using the following equation to find the maximum power: Pr = 3 * 117^2 * 0.632 = 25.95 kW Is my approach correct? AI: Your calculation appears to correctly provide the maximum electrical power transferred to the rotor. However 0.474 of that power is dissipated as heat in the rotor and 0.526 of the power is converted to mechanical power. The method that you used is the same as presented by Fitzgerald, Kingsley, Umans, Electric Machinery 4nd ed. It doesn't say why the maximum is based on the maximum power transferred to the rotor rather than the maximum converted to mechanical power. It seems to be assumed to occur at the same slip. That is probably a good assumption for a "normal design" squirrel-cage motor, but it would probably not be a good assumption for a motor with a high rotor resistance.
H: Can a ggNMOS be implemented discretely on a PCB? Reading this answer, I ran across the ggNMOS for ESD protection. https://electronics.stackexchange.com/a/576935/166672 Reading on the web a little, it seems that this is only used inside of an IC, not at the PCB level. However I do not see any references as to why this might be. According to the Wikipedia article on ggNMOS when connecting the gate to the source and ground, "The drain of the ggNMOS is connected to the I/O pad under protection. A parasitic NPN bipolar junction transistor (BJT) is thus formed with..." There is no mention of special structure/doping being used to create the parasitic BJT. So my questions are: Can a ggNMOS be created discretely on a PCB? Would it's performance be much different than using diodes. My inclination on #1 is no, simply because I don't see this structure out in the wild. For #2 my LTSpice simulations so far are not working for this circuit structure, so no comparisons yet. AI: Can a ggNMOS be created discretely on a PCB? I don't think it can. I'm assuming that by "created discretely on a PCB" you mean, using a discrete N-channel MOSFET. The N-channel MOSFETs that are used as ESD protection devices on an IC are always planar MOSFETs. Planar devices are "surface" devices, they work in the horizontal direction, the current flow left-right. Here's a side view of a planar MOSFET: source This is bascially the "standard MOSFET" that most of us are familiar with. Note that from Source to substrate to Drain you pass from N-type to P-type and N-type again, in other words, an NPN structure. That's the parasitic NPN which we need for the ggNMOS's "snapback" behavior. Practically all discrete MOSFETs however are vertical or trench devices which work in the vertical direction, the currents flow up-down. Here's a side view of vertical MOSFET: source Note how the planar device is symmetrical, source and drain basically look the same. That means that if you look at the way how a ggNMOS device works then the Emitter and the Collector of the parasitic NPN are also the same. This is not the case for the vertical device. Here the drain and source look very different. This is usually done so that the drain can be optimized to cope with high voltages and also to make the MOSFET be able to carry large currents and have high power dissipation. Yes, vertical MOSFETs are usually Power MOSFETs and they're optimized for switching somewhat large currents. The build of vertical MOSFETs is such that usually a parasitic NPN is present but since the doping profiles are different from a planar MOSFET, I doubt that the parasitic NPN would work in the same way as it would in a planar MOSFET. If you read the ggNMOS article on Wikipedia there are several conditions that need to be met for this device to work properly so it is likely that the ggNMOS behavior only exists in certain specific situations.
H: GPIO protection with diodes I've got a question regarding diodes you can see on the schematic. In my circuit VCC is 12V (I have separated power supply for MCU) and the current on this line may even reach 1.5 A. Can I safetly use diode like 1N4004 which has max current about 1A? I'm also not sure how this wiring could protect my GPIO pin. May I ask somebody to explain this? It was recommended to me to use such wiring, but I not longer have contact with the author of it, so I can't ask him for explanation. AI: ESD protection diodes don't have any current through them in normal operation, so the current on the power rail they're connected to doesn't matter. They are only there to provide a current path for ESD events, discharging the static charge into the power supply instead of into the fragile logic circuitry. The way the circuit works is that the diodes clamp the discharge to the power rails (with a diode drop of margin added), so instead of charging up to thousands of volts until something breaks in a discharge event, the charge can just go to the power supply and decoupling capacitors, with the voltage on the fragile pin limited to safe values.
H: Connecting development board board to sensor I am trying to connect a Nordic nRF52840DK board to the LSM6DSL sensor (accelerometer) on a STEVAL-MKI178V2 adapter board. The goal is to successfully connect the devices and test the sample program from zephyr RTOS of outputting the data from the accelerometer. The user guide to the nRF52840DK board can be found here, and the schematic on page 28 maybe helpful. The spec sheet for the adapter board and the sensor can be found here. I know that I need to connect VDD and GND first, but there are also pins like SDO, SDA, SCL, CS, INT1, INT2 pins that I'm not sure what to do with. I was wondering if anyone could explain which pins are needed and why. Thanks in advance! AI: Read the LSM6DSL datasheet for details. The sensor has several options so the datasheet seems complicated at first. Focus on the options/features that you're planning to use. Refer back to the datasheet as you read this answer to confirm and hopefully clear things up. First choose the communications method. The LSM6DSL sensor supports either I2C or SPI. SPI is preferred because it can be clocked at a greater rate (i.e. more bandwidth), which can allow you to read samples faster. If you have a spare SPI port on your microcontroller and don't have a preference for I2C, then choose SPI. Then connect the microcontroller communications port to the sensor. For SPI connect: Microcontroller's SPI Clock (SCK) to Sensor's SCL Microcontroller's MOSI to Sensor's SDI (microcontroller output to sensor input) Microcontroller's MISO to Sensor's SDO (microcontroller input to sensor output) Microcontroller's SPI Chip Select (CS/NSS) to Sensor's CS For I2C connect: Microcontroller's I2C Clock (SCL) to Sensor's SCL Microcontroller's I2C Data (SDA) to Sensor's SDA Sensor's CS pin to Vdd (to enable the sensor's I2C mode) The INT pins are optional. Read the sensor datasheet and decide whether you want to use the INT pins. INT1 is an output from the sensor and will most likely be connected to an external interrupt (or a GPIO that functions as an external interrupt) on the microcontroller. INT2 has more features and it could get connected to an external interrupt or a GPIO pin on the microcontroller depending on how you plan to use it. For examples of how to connect the sensor, look at the schematics of the STMicro eval boards containing an LSM6DSL.
H: Ferrite core in electromagnets I have a small project based around designing a small home-made DC actuator using a small DC electromagnet. My final goal is to generate the strongest magnetic field possible with the minimum amount of current, but for prototyping purposes I used a 0.5mm diameter enamelled copper wire to generate lesser amounts of resistance while varrying the current with my 30V/5A DC power supply. I know that the magnetic field B is dependent on the permeability of free-space (µ0), on the permeability of the core material (µr) and on the magnetomotive force divided by the length of the coil (NI/l=H). Thus I started prototyping with what I had under the hand, namely a steel screw and laminated iron plates I cannibalised from an old nokia transformer, needless to say it was a lost cause to search for their B vs H hysteresis curve. In the end I made 3 increasingly powerful magnets, one with the steel screw core, one with a core made of several laminated iron plates and the last and most powerful one with E-shaped laminated iron plates. But as I said, my goal isn't to generate the most powerful magnetic field possible but rather to find a decent compromise between B and I. Therefore I started looking for other materials online and found these ferrite rods (pdf warning). These rods are 2.5cm long, have a medium permeability (initial permeability at µi=2300) and saturate at about 0.5T which was more or less exactly what I was looking for. Once I got them, I winded 100 turns of copper wire around them. And according to their B vs H curve and this small equation : \$I = \frac{H.l}{N} = \frac{5*10^3}{4\pi}*2.5\times10^{-2}*\frac{1}{100} = 0.1A\$ The ferrite core should saturate at about 0.5T when a current of 0.1A is fed into the coil. I tested this and half-surprised, a current of 100mA produced next to nothing and the magnetic field increased with the current at least up until 5A, which is my power supply upper current limit. I mentioned that I was half-surpised because it was clearly indicated under each graph that all measurements had been done under a 10kHz AC signal, which finally brings us to my questions: first, do lower frequencies affect the permeability of the material or did I just misunderstand the datasheet and second, if the answer to the first question is "yes, lower frequencies affect the permeability of the material", does the datasheet somehow allow us to estimate the impact of these lower frequencies ? Any help would be greatly appreciated. Thank you. AI: You are using a ferrite rod but you need to consider a closed path in your calculations. To calculate the magnetic flux or flux density you should first think about the closed magnetic circuit. One reluctance (magnetic resistance) of such a magnetic equivalent circuit would be the reluctance of the ferrite rod: $$R_\mathrm{m}=\frac{l}{\mu A}$$ To get a closed magnetic circuit, you still have to take the reluctance of the distance through the air into consideration: Source The magnetic path through the air is at least as long as the rod. The permeability \$\mu\$ is one. So the overall reluctance of the magnetic circuit is significantly larger than you think. There are certainly some formulas and even calculators online for a rod geometry that help you with these calculations. When you have an approximation of the overall reluctance you can calculate the magnetic flux density etc. based on: $$NI = \phi R_\mathrm{m} = B A R_\mathrm{m}$$ There are a lot of core shapes that are better suited for electromagnets than rods. The air reluctance should be as small as possible so that you can actually saturate the core material.
H: Maximum Ethernet bandwidth through a slip ring I'm trying to understand what would prevent a 1 GbE non-optical slip-ring from transmitting 10GbE, 40GbE or even 100/200/400GbE. They all have 'metallic'/copper variants (backplane or short cable) and I can only find up to 1GbE industrial slip-rings in a quick market search. I'm a slip-ring and 'cabling' noob, I don't have the right lexicon to start with... But if it is 'just' about losses, the slip ring size can't be much more than 7m (the limit on some of those copper modes) and can be reamplified/relayed at input/output of the slip-ring, right? I'm missing something obvious but I don't know what. AI: Maximum ethernet bandwidth is about maintaining the characteristic 100Ω (transmission line) impedance of the 10Gbe cable from device to device. As long as that can be done, you could use many different kinds of copper transmission media. However, this is probably not going to be easy through a slip ring, as by the looks of twinax cable the impedance is tightly controlled. When designing transmission lines any capacitance or inductance that does not look like a 100Ω transmission line will cause reflection and attenuation and cause the signal to degrade and the bandwidth reduced (or no bandwidth at all).
H: What can I do about using incorrect P-FET package? I just got a PCB in I designed from fab, and I quickly discovered I made a mistake in the design. I'm using a P-channel MOSFET, D2PAK, as a high-side switch. Its pinout is (1) gate, (2) drain, (3) source, but I laid it out as if it was (1) gate, (2) source, (3) drain. As it stands, the fully assembled PCBs conduct whether the gate is driven or not via the body diode. What can I do? I don't see any MOSFETs with the pinout that I used, so I don't see a way to replace the component to fix the problem. I also don't see a good way to reorient the package in a way that would make for a clean install and a sale-able product. Any ideas? AI: It's unfortunate, but you probably just need to get new PCBs made. You've learned an important lesson today, to always double check your package pinouts! For the purposes of running tests, you may be able to just cut the traces on the PCB and use wires to connect the FET to what it should be connected to, or connect it with wires while it's insulated from the board, but doing either of these in production is a bad idea. The reason you can't find any FETs with the pinout you want is a practical one: due to the way VDMOSFETs (a category that includes almost all currently produced discrete MOSFETs) work, the source and gate are on the top of the silicon wafer and the drain is on the bottom. In a D²PAK (as well as many other common packages), the bottom of the die is attached directly to the leadframe's tab, since (among other reasons) this provides good thermal contact between the die and the package (and any heatsink the package is attached to). So pin 2 (the tab) of a FET in a D²PAK package will nearly always be the drain.
H: A question on timers in 8051 Suppose the timer 1 of 8051 has finished counting, and raised TF1. Since it rolls back to 0, so currently TH1=00,TL1=00, and assume the bit TR1 is still set. At this moment, if we just clear the TF1 alone , will it count now from 00 again? Because we did not stop the timer yet. Next question is - let us take TF1 is set but TR1 is reset, at this moment can we load the TH1 and TL1 using # addressing (immediate)? AI: At this moment, if we just clear the TF1 alone , will it count now from 00 again? Because we did not stop the timer yet. TF1 will set once the Timer-1 overflows. Now, if you clear TF1 but keeps TR1 set, then the timer keeps running. After the overflow, it will restart incrementing from 0x00 or pre-loaded value in TH1 (depends on timer mode). So, in case of 16-bit timer mode, you have to clear both TF1 and TR1, reload the Timer-1 register, and set TR1 again to continue the same cycle. In case of auto-reload 8-bit timer mode, clearing TF1 alone will suffix. No need to clear TR1 as the timer automatically restarts from the pre-loaded value in TH1. let us take TF1 is set but TR1 is reset, at this moment can we load the TH1 and TL1 using # addressing (immediate)? Yea, you can. And once you set TR1, timer starts running from the loaded value. But you should clear TF1 to not miss the event of next timer overflow.
H: What is this binocular transformer and how do I model it in LTSPice, Have High SWR In Ham Radio I purchased this 70 Watt Amplifier Kit and built it. Unfortunately, the kits do not come with any instructions. I have managed to find a variety of web sites where people built the amp and offered perspective. The kit seems to be shipped in varying configurations. In any case, I built it and it does not work properly. It basically amplifies, but the input SWR as seen by my Ham radio is high. I am using a 50 Ohm dummy load as output. I have decided to model the device in LTSPice to see what is going on and work on the source impedance problem. Here is a link to a site describing the amp/more info https://www.qsoshack.com/make-a-45-watt-linear-amplifier/ The pictures show the transformer labelled as having a 2T:0.5T turns ratio. When the amplifier is active, the input signal goes thru an inductor(the transformer) to ground. My radio sees a high SWR (at 3.9 MHZ). The resister labelled R6 (18 Ohms)/Vertically placed was not described on some web sites, but another said to include it. The resister is over the secondary side of the transformer. When I wound this transformer, I only used one piece of wire, as per most of the web site descriptions. I believe what I have shown in the photos is a binocular transformer? If it is not, please correct me. I am not sure how it can be built with only 1 wire, but I did it. How is the secondary linked? One side of the transformer is soldered to a single contact area. The other side is soldered to 2 contact areas. The resister is over these two contact areas. I wish to model this transformer in LTSpice. In LTSpice I can set up 3 inductors and use a K statement to link them. I am wondering how to determine the proper inductances to use for my LTSPice model. I understand the turns ratio of 2:0.5 would govern the ratio of the inductances on the primary and secondary. Aside from the ratio, how do I determine the inductance to use for the primary side (in Henries)? I have an inductance meter (LCR). Could I unsolder the two yellow wires , shown in one of the photos , and measure the inductance? If I did this, would the reading be muddied because the transformer is soldered to the board and the secondary is connected (somehow)? If I use the turns ratio to determine an inductance to use for the secondary side of the transformer, is that value to be divided by 2 and then used for each of the two transformers on that side. The secondary side looks like it is center tapped. Please post some advice on this modelling problem. I think my first uncertainty is the inductance value to use for the primary side? If anyone knows what might needed to reduce the SWR as seen by my radio, that would be helpful. One person mentioned a cap in series with the transformer input. At first, I'd like to see this modelled in LTSPice and then test things there. Thanks AI: T1 is a 2 hole oval ferrite slug with a 2T:0.5T turns or 4:1 turns ratio “0.5T “ is a U shape loop T2 is a dual cylindrical ferrite slug that seems to be mounted on FR4 at both ends with 0.5T:3T turns. All the turns must be done with Litz wire a dozen or two doz. fine magnet wires in parallel to significantly reduce the skin effect losses. Use the finest Litz wire gauge you can get your hands on that fits in the area avail. e.g. AWG 40 to 48 strands min. Skin Effect depth at 30MHz = 12 um. AWG40 radius = 40um ! The FR4 might have mu foil to reduce end flux leakage on T2.
H: Is there a way to use "others" as index when assigning to slices of VHDL array? Is it possible to do something like this in VHDL? a: std_logic_vector(7 downto 0); ... a(1 ,3, others) <= ('0','1','0'); Rather than what I do at present: a: std_logic_vector(7 downto 0); ... a <= (others=>'0'); a(1) <= '0'; a(3) <= '1'; AI: Something like, using an array aggregate : a <= (1 => '0', 3 => '1', others => '0'); -- or simpler a <= (3 => '1', others => '0');
H: What's the change of resistance after gate high voltage failure? I have a damaged p-type mosfet. Resistance of drain to gate: almost zero , Drain to source : below 10Mohm(some are xxxkohm). I think ESD is injected into drain. So. I want to know the symptoms(resistance changes) difference when gate insulator is breakdown due to gate high voltage. Any different? Also, will drain to source resistance change or not, when ESD injected at gate? AI: High dV/dt transients to the Drain can couple thru the Miller capacitance and destroyed the insulation to gate then conduct to the body and short out G-D from an ESD arc in a nanosecond. If powered, it can then explode. Adding ferrite beads to drain can reduce dV/dt somewhat. But if conductive exposure to ESD is possible, you may require insulation coating or a mylar shield.
H: Is this video fake? I thought Tesla coils only worked on AC This video shows a 9-volt battery connected to a wire as a primary. The first reason I think this is fake is that he is powering a Tesla coil with 10 volts. The second reason is that Tesla coils work on AC, or at least I thought so, and he wouldn't be able to step the voltage up too high because a transformer only works on AC and the battery provides DC. AI: It's real. this video shows a 9-volt battery is connected to a wire as a primary ... and a transistor, and a resistor. This is the simplest SSTC (Solid State Tesla Coil) I've seen. The transistor chops the incoming DC power supply so that it's changing at the primary. It takes feedback from the secondary, so that it oscillates at the resonant frequency of the secondary inductance and its self capacitance. Drawing the circuit from the video (I might make one myself for the lols), we get this simulate this circuit – Schematic created using CircuitLab I'm not absolutely certain I have the transformer 'dotting' correct, but I think I have interpreted it correctly from the video. If it fails to work, swap the orientation of one of the coils. Eye-balling the coils, I'd guess at 32 mm x 100 mm and 200 turns = 350 µH for the secondary, and 35 mm x 3 turns = 690 nH for the primary, coupling in the 0.1 to 0.2 ballpark. When power is switched on, the transistor is biassed as an amplifier by R1. It's quite a large value, so the base current is small, and the collector current is similarly small enough that the transistor doesn't draw too much current for the battery or let out smoke. If you run this in a simulator, that might be all that happens until you give it a kick. In real life there's noise in the circuit, and this noise will be amplified by the transistor. This will cause a variation in the collector current, which will induce a voltage in the secondary. This voltage will drive a current into the circuit consisting of the transistor base and the coil self capacitance. If the transformer is connected the correct way round, the effect will be to reinforce the change and drive it further. This reinforcement will continue until one of two things happen. A) If the collector current is increasing, eventually the transistor will run out of gain or B) if the collector current is decreasing, eventually the current will get to zero. At either end point, the collector current stops changing, so the reinforcement feedback stops, and the transistor switches to the other mode. This cycle now continues indefinitely. Once started, the timing of these reversals is dominated by the resonance of the secondary with its self capacitance. As @Hearth points out in comments, it's basically a Joule thief, or blocking oscillator circuit. A combination of low input power and the 2N2222 being fairly tough allows this to keep working without blowing it up from overvoltage on the collector or base. More input voltage or a more fragile transistor would not work, at least not beyond the first few cycles. I like circuits that are as simple as possible. If I'd started to design this, I'd probably ground the secondary with a pair of anti-parallel diodes, so that the discharge current is kept out of the transistor base, and then have to connect the feedback to the base. However, the capacitance of these diodes would change the phase shift and gain, and it may not start, and would use more components ... sigh! Perhaps it's worth the risk of killing a 2N2222 for the simplicity. Maybe just one little signal diode between base and emitter as shown to prevent VBE reverse bias. I'm sure that would not stop oscillation.
H: What is the initial input used in a NOR gate for a reset-set latch? What happens the moment the reset-set latch is switched on? AI: Here's your set-reset latch implemented with your relay NOR gates:- simulate this circuit – Schematic created using CircuitLab At power on all relays are released, but the coils of RLY1-B and RLY2-B are powered. Each 'B' relay will then start to operate. If the relays were identical then each one would disconnect the other, then fall back and operate again continuously. However in practice they won't be identical, so one relay will probably break its contact first, causing the other relay to fall back and hold the first relay operated. If one of the input switches SW1 or SW2 are operated at power on then its 'A' relay will operate, ensuring that its 'B' relay does too because the 'B' relay of the opposite gate will be forced off. If both switches are operated at power on then both 'A' relays will operate, forcing both 'B' relays off. To ensure that the latch powers up in a known state you could make one relay slower to operate by adding some resistance in series with its coil, or using a different relay which operates slower. In complex relay logic techniques such as late breaking contacts, an auxiliary winding shorted out by a Normally Closed contact, or a copper 'slug' acting as shorted turns were often used to make a relay slower to operate.
H: IEC 61010 table for creepage distances Good day I am making a pcb layout that is required to comply with the IEC 61010-1. In the standard, there is a table for clearances and creepages, which depends on working voltage, pollution degree and dielectric properties (CTI/comparative tracking index). However, I am a bit confused about the two columns: Printed wiring boards CTI >= 100 VS Material Group III CTI >= 100. Since our pcb uses a standard FR-4 material, I found out that FR-4 typical CTI is 175. And since I am making a pcb (so I am applying the spacing on track-track, track-pad, pad-pad, track-copper pour...etc), I figured that the right column I should be looking is at Printed wiring boards CTI >= 100, which tells me creepage should at least be 1.5mm for 250Vrms. Am I correct that this is the column applicable for my project? Then where is the other column "Material Group III CTI >=100" used (this column tells me creepage is 3mm instead)? Because now that I think about it, I could also look at this column since FR-4 is under material group IIIA. I simply used the other column because it appears to be more specific (printed wiring board). And the file provided to me (IEC file) is 2004 AI: It actually gets even nastier: if you coat the board the clearance become different (and creepage somewhat 'disappears', and pollution level decreases). The reason for different columns is that you can have exposed terminals on things that are not circuit boards; for example some power relays have quick disconnects on the top and often they have a plastic ridge exactly to meet creepage distance. Sadly I'm stuck with the 2010 edition (the last one is 2019) and the tables are slightly different. Also your table doesn't mention the overvoltage category which for mains circuit is strange… I think (the standard doesn't state it explicitly, maybe there is some application guide) boards are treated differently because There are explicit rules for inner and outer layers (mostly for clearance) The microenvironment for the board is better than for the rest of the equipment Board manufacturing tolerances are usually better than switchgear (0.05mm versus 0.2mm) 1.5mm of creepage seems a little low for me in degree 2, mains on dust tracks quite fast in my experience. By the way, my table has the same values with reordered columns (and no CTI reminder for the material groups)
H: Communication between two microcontrollers with different operating voltages (5 V and 3.3 V) I want to communicate between two microcontrollers - one is PIC18F2550 and the other is STM32F103VET. They operate at different voltages: 5 V (PIC) and 3.3 V (STM32). I would prefer to use SPI communication. The problem is, I couldn't connect two microcontrollers operating at different voltages directly. There might be some trick I need. Is there anyone else who could help me out? AI: In addition to Andy's answer, in case your available MCU pins are not capable of receiving different voltage, you can either build a level translation circuit (as described here 1.8V UART with 3.3V UART), or use a ready-made level translation development board (for example https://www.sparkfun.com/products/12009 ), or finally use a specific IC for thah job ( for example https://www.ti.com/lit/ds/symlink/txs0108e.pdf?HQS=dis-mous-null-mousermode-dsf-pf-null-wwe&ts=1622023837184&ref_url=https%253A%252F%252Fgr.mouser.com%252F ) . The choice is yours, according to your needs (UART, I2C, SPI etc ) and the parts available.
H: How to size the fuse in this case? Inside an enclosure, this PSU(12V, 12.5A) powers all the electrical devices such as DC fans and some other DC operated devices. So basically the PSU powers everything and needs to source 8A continuously. The AC power only feeds the PSU. AC power outlet --> IEC connector --> PSU --> DC powered devices The thing is I use this IEC connector to power the PSU. An this connector requires a fuse. In my case, is the fuse type and rating relevant? How can I roughly size the required fuse? AI: This RS part: - Is rated at 6 amps maximum and the inrush current of the Mean Well power supply has a cold-start inrush current of 60 amps: - That's what I'd focus on and not the fuse rating (although it does need to be adequately rated. In other words, I'd be seriously concerned about the rocker switch on the RS part and its ability to survive a few cycles on cold start with burning.
H: Op-amp speed: bandwidth vs slew rate I was learning about the difference between op-amp slew rate and bandwidth. Everywhere it says slew rate is a large signal parameter and bandwidth is a small signal parameter. I have few questions: What is meant by large/small here, because large/small are relative terms? What is the reference for large and small? When do we need to give priority to slew rate compared to bandwidth and vice versa? AI: Here you have an answer via a graph which is present in the specification of the op-amp or you can calculate it. (example of LM324 https://www.onsemi.com/pdf/datasheet/lm324-d.pdf figure 7) LM324 is a "new replacement" of old LM741. The slew rate are the same, but I did not find the graph for LM741, but only slew rate in the datasheet. Signal input, \$V = A . sin( 2\pi ft )\$ Take derivative ... \$dV/dt = 2\pi fA . cos( 2\pi ft)\$ --- this is maximum when \$ t=0\$ So, \$(dV/dt)_{max}\$ = \$2\pi fA\$ --- this a hyperbolic function: \$A\$ vs \$f\$ \$ \therefore f_{max} = \text{solve } \{(dV/dt)_{max} = \text{SR}\$, at \$ f=f_{max}\}\$ ; -- where \$\text{SR}\$ = op-amp slew rate \$\implies f_{max}= \text{SR} / (2A\pi)\$ \$\text{SR}\$ for LM741 = \$0.5V /\mu s\$, and amplitude \$A = 15 V\$ \$\therefore f_{max} = 5.305 \text{ kHz}\$ At low frequencies, \$(dV/dt)_{max}\$ of "sinusoid" is lower than slew rate ... amplitude max. At high frequencies, \$(dV/dt)_{max}\$ becomes higher ... so amplitude must be lower ... The breaking point is where \$(dV/dt)_{max} = \text{SR} \$. I called fmax because it is the highest frequency you can use the full range of output swing. it is also the breakpoint of the "hyperbolic" curve. How using the \$(dV/dt)_{max}\$. Examples : amplitude \$A = 15 V\$ @ \$50 \text{ Hz}\$, \$(dV/dt)_{max}\$ = \$2\pi fA = 4710 < \text{SR} = 500000 V/s\$ or \$0.5V /\mu s\$ ... @ \$5000 \text{ Hz}\$, \$(dV/dt)_{max}\$ = \$2\pi fA = 471000 <= \text{SR} = 500000 V/s\$ or \$0.5V /\mu s\$ ... Amplitude (without distortion) vs Frequency plot:
H: What is a good way measure voltage considering accidental polarity reversal? Hypothetically, if a circuit is potentially exposed to accidental polarity reversal (i.e. when a user connects positive to negative, and negative to positive by accident): When measuring the voltage using a voltage divider, I assume that the component which is receiving the voltage measurement signal will then be potentially exposed to reverse current. Is the solution to still use a voltage divider and place a diode on the measuring component's ground connection, or should a voltage follower op amp be used to provide current isolation? AI: The solution is usually to size the resistors in the potential divider such that the current flowing in the op-amp pin (due to reverse voltage) is below about 1 mA but, in any case check the data sheet for the op-amp because this limit value is usually stated.
H: Green circle around via in Altium I am a newbie in Altium (have some experience with KiCAD) while placing via I am getting a green circle around via, should I be concerned about this if not how to turn this off. Thanks in advance AI: This could be the clearance around the via on Layer 2 (GND_1 in your design). Notice how it is sitting "on top" of the adjacent green component outline, which is most likely a courtyard (they are separated with fine lines). This suggests that this circular green feature is not on the same layer as the green courtyard features. Internal layers are often negative by default, so a solid circle represents the lack of copper on that layer. Check your clearance rules - I suspect the distance between one edge of the via and the edge of the circle will match one of them. Pressing Shift S will switch to single layer mode, and then click through the layers (or use the +/- keys on your number pad) to figure out which layer has this feature on it.
H: Soft start circuit problem I am currently working on a soft-start circuit. The picture below is my schematic. It worked fine in simulation and even in a real circuit. But after several times, turn on and off the power source (My power DC source: V=24V, 290W), the MOSFET dies for no apparent reason (Vgs = Vds = Vgd = 0 V). I even touched my finger on top of the MOSFET and it was just warm the whole time. I use Chroma 63204 Programmable DC Electronic Load in CR mode. I don't know why the mosfet died so quickly. Any idea would be appreciated! I forgot to take photos of my scope screen but when I measured Vg,Vs,Vd by scope, it looked the same as the simulation result AI: Consider this important diagram from the data sheet when running in linear mode: - Say you set a gate voltage that produced a drain current of 5 amps. At a 25°C ambient, the device would start warming straight away. Say it warmed to 75°C, it would then be taking 8 amps. Do you see where this ends up? This is a poorly documented MOSFET given that it doesn't tell you what happens at 150 °C (absolute maximum junction temperature) but, you can put money on the fact that that it would be trying to draw hundreds of amps if it could. Of course it can't because it will burn internally. This is the main problem of linear applications in MOSFETs that are not intended for linear applications. It's called the Spirito effect by the way and is a well-documented phenomena of running MOSFETs in linear applications. In most cases, the thermal runaway can happen in less than 1 ms and not hardly produce any heat to the touch. Choose a better MOSFET that is designed for linear applications. Other stack exchange Q/A on this matter: - Spirito effect #1 Spirito effect #2 Spirito effect #3 The lie they told me about MOSFETs when I was at college Burning a power MOSFET
H: Totem pole driver topology (inverting amp) Hello guys this question is regarding a gap in my knowledge regarding transistors specifically the driver of the totem pole configuration. Based on the following figure And these results here: When the control voltage goes high why does the base of Q2/Collector of Q1 rise to 0.8V, and why does the base of q1 also rise by that same value? simulate this circuit – Schematic created using CircuitLab Partial Answer: The answer to this question I believe has to do with the fact that Q1 is in reverse bias configuration. After looking at this resource: https://learn.sparkfun.com/tutorials/transistors/operation-modes. The Emitter voltage > Base voltage > collector voltage. I will have to look into this further but, I didn't realise the value of this configuration as I barely covered it in my engineering classes. If I find out more I will add further to this answer, but please give a more in-depth explanation as it still isn't intuitive to me why the collector voltage increases. AI: When the control voltage goes high why does the base of Q2/Collector of Q1 rise to 0.8V, and why does the base of q1 also rise by that same value? Because the is a pn junction between the base of Q1 and the input (essentially a diode), the voltage at the base of Q1 will never be more than somewhere around 0.6-0.7V above the input. For a similar reason, the collector of Q1 and the base of Q2 will never be more than 0.6-0.7V below the base of Q1. This means that when the emitter of Q1 is low, the base of Q2 will also be low. When the emitter of Q1 is high, the base of Q1 will rise to about 1.2-1.4V. There will be one diode drop between the base and collector of Q1, and one diode drop between the base and emitter of Q2. If the circuit seems strange at first, it is probably because when the input is high, the base-emitter junction of Q1 is reverse biased. That is not normal for CE, CB or CC amplifiers. But this transistor in not being used in as a normal CE, CB or CC amplifier. It's function is basically that of two diodes. However it has an advantage over two discrete diodes. In discrete diodes, when current switches from one diode to the other, there is a longer reverse recovery time. Minority carriers in the diode need to be cleared. With the transistor used in place of two diodes, carriers in the base do not need to be cleared. They simply change direction regarding whether they are flowing to/from the emitter to flowing to/from the collector. Hence using a transistor this way allows faster switching than using two discrete diodes. (Hence TTL or transistors transistor logic, replaced DTL, or diodes transistor logic.)
H: What does "top through view" mean for MSOP pin assignment? Reading the datasheet for a USB switch IC, it says "top through view" for the pinout diagram (page 2). It seems like this means "looking from the top-down at the IC", where the notch is in the top left. Is that the correct assumption? AI: It means you are looking from the top view "down through" the part. Typically the word "through" is not used (and usually top view or top down or bottom view).
H: What is the op-amp output voltage for a voltage-controlled current source? I am trying to analyse the voltages in a voltage-controlled current source. What I have so far: Vin = V_C V_B = Vsupply - I_shunt*R_load However, I don’t know how to find an equation for the op amp’s output voltage at the gate of the FET (V_A). Could you please help explain/show how I’d be able to find the voltage at node A? I am really stuck since I don’t know how to find the the output voltage of an op amp when a relationship between the input and output voltage can’t be found using nodal analysis. Any help would be greatly appreciated! AI: You need the MOSFET characteristics. For example, the IRF540 has the following typical characteristics: So, for example, if your current is 10A the typical Vgs is about 4.75V. You need to add that to the voltage across the shunt to find the output voltage of the op-amp that is required to balance the op-amp. The op-amp will attempt to drive the gate in order to balance the input voltages. If that is not possible the op-amp output will "rail" near the positive supply voltage of the op-amp for large input voltage (might be a couple volts or more below depending on the type of op-amp). Similarly for very low input voltages the op-amp can only "rail" near the lower supply voltage. In some cases only within a few volts. If the MOSFET conducts too much with that voltage applied (either due to the non-zero Vgs applied or due to leakage) then it will not be possible for the op-amp to balance. So to analyze a real circuit you would need both the transistor characteristics (worst-case if you're doing a serious design, 'typical' if you're just trying to make a best guess as to what will happen) and the op-amp characteristics. If you have an ideal op-amp, then only the transistor characteristics matter.
H: Lazer wifi connection Would it be possible to create a Wifi cable that uses lasers to send information at light speed? AI: No. You are confusing several things. Lazer wifi connection. LASER stands for "light amplification by stimulated emission of radiation" so it's spelt with an 'S', not a 'Z'. You may be confusing it with a brand name for a laser tag game, for example. Would it be possible to create a Wifi cable ... Figure 1. Laser pointers showing highly columnated beams. Image credit: Netweb01 on Creative Commons. No. WiFi uses radio waves to transmit over a wide area. Laser uses light and one of its main features is that it produces a collimated narrow beam. Fibre optic cables are used for telecoms and internet backbone to transmit data from point to point but not to broadcast like WiFi. Laser can also be used to transmit point to point through the air or space. The collimated beam helps in these configurations and the laser beam can be modulated to carry information. Figure 2. Optical fibres in a network switch. These are point-to-point connections. Image source: Electrical Engineering Portal. ... that uses lasers to send information at light speed? The light will travel at whatever the speed of light is for that medium. Light travels at approximately 300,000 kilometers per second in a vacuum, which has a refractive index of 1.0, but it slows down to 225,000 kilometers per second in water (refractive index of 1.3) and 200,000 kilometers per second in glass (refractive index of 1.5). Source: Olympus LifeScience. The data speed will depend on the modulation technique and will be rated in bits per second. DO NOT STEAL MY IDEA. I think you're safe enough.
H: Determining initial state of the circuit that uses 74HC00 I've built the following circuit that makes a push-button work like a toggle switch: It works exactly as expected. Pressing the button once turns the LED on. Pressing the button once again turns it off. However, there is one thing I don't understand. When the circuit is powered on the LED is always off. Why does the circuit have this particular initial state? AI: With Vcap=0 on power up and positive feedback with some RC delay, this ensures the output is always off on startup. Connecting the cap between V+ And input would have the opposite effect. Revised answer: This is a metastable condition with a race to see which input reaches the crossover threshold which is expected to be equal for all devices in the same IC. My hypothesis is that the switch adds some 1 pF to the 0V cap and that may be enough to assert the 1st gate losing the race and forcing the output high when they both are expect to transition when Vcc exceeds 1.2V or just around the Vgs(th) of the CMOS gate. so I simulated it and everytime, the LED is OFF on reset, but if I pull off the 1pF across the button, the LED is ON after reset as expected. The proof is hard to scope but easy to verify. Moving the 1uF cap from ground to Vdd (if non polar) will invert the LED on power up. If it stays off then it is the other theory that the 100 ohm load reducing Voh by 1/3 above Vbe due to the internal RdsOn being 50 ohms nomonal at 5V is the correct answer and this one is just a SWAG or incorrect. Anyone care to place any bets? In any case, R3 can be increased to 10k easily. But th 100 ohms and the transistor has no effect on this on the 50 ohm 74HC driver, except to reduce the Voh levels by 25% or so. In either case if you want it ON, add 100 pF or more across the switch (or to 0V) and change R3 to 10k.
H: Can I connect a 1A device to a USB 3 port? All, If I were to connect 16 WS2182b LEDs in series (16*0.06=0.96A) and an Arduino to a USB 3 port on my PC (0.9A max I think), would my PC/USB controller get fried or would the LEDs just run dimmer? Would this be safe to do this or would I need to use a separate power supply for the LEDs? Thanks AI: According to this answer here and this manual: To start, the power delivery is defined in "units of load". For USB 2.0 one unit is 100 mA, and for USB 3.x one unit is 150 mA. ... The requirements for power delivery from a normal USB port should not be confused with requirements for USB DEVICES: USB devices should NOT take more than one unit of load until host completes the device enumeration. ... Before a device is configured, it must not use more than 100 mA, defined as one unit load in the USB specification, of power for low, full, or high-speed devices. While I think this actually will likely work with your USB3.0 port as most motherboards will tolerate maximum current without any negotiation, still this isn't really a good idea. You mess up with USB specs and weird things could happen. For example if somebody will attach it to a USB 1/2 port which can handle 500mA maximum only and your device will start drawing 900mA+ without even negotiating this is possible at all. That is why usually high power (> 100mA) USB devices will have some sort of IC which can negotiate power capabilities of the host or DCP (dedicated charge port, i.e. USB wall adapter). EDIT: Assuming you have Arduino, which will have a some sort of USB-UART bridge this should already negotiate & enumerate USB device. But still it has some drawbacks. It's not a USB 3.0 IC, and enumeration will take some time.
H: Do more logic gates in series mean more slowing of the output result? I heard that every logic gate has a propagation delay in nano scale. As the digital signal propagates through the logic gates, the signal output result will have a delay. Even though the delay is so short since the unit in nano scale or nano seconds, still we can't underestimate it because the output signal may go to another pin input (serially) which it will give another delay (delay increased) to endpoint output. Can we conclude that less logic gates means the progress/calculation/propagation will be faster? We know that the AND operator gives output HIGH only if both inputs are HIGH, else LOW. That speed is standard when it is applied using TTL gates. What if we apply De Morgan's laws, we know that an A AND B operation is same as NOT(NOT(A) OR NOT(B)). Which is just making more propagation delay if we apply to logic gates even though both operations the give same result output. We know that massive numbers of logic gates are used in computer nowadays, and we know that every IC (especially CPUs) is made of logic gates. If the CPU has fewer logic gates, will the CPU performance increase? A science question that I want ask beside engineer question: What factors cause propagation delay happen in a wire? I can think of: type of wire, transistor technology, temperature. Are there any other factors? AI: It's definitely the case that frequency can increase with simpler logic. A 3 GHz processor has 333 picoseconds to complete every operation. A few extra picoseconds of delay means lower operating frequency. Nowadays a lot of the delay is wire delay, but logic gate delay still matters. Performance doesn't necessarily increase though. The gates are there for a reason. They do useful things. Logic synthesis tools will automatically do things like apply de Morgan's law, and other more complicated transformations, to get the optimal logic implementation based on the available standard cells.
H: How do generation schedules / load schedules work on a power grid? I've noticed that some generating stations have "generation schedules" and similar schedules also exist for load distribution stations. They usually have a MW amount telemetered to the ISO (grid operator) for each operating hour. How do they determine these values in their schedules knowing that they could change throughout the day? What significance do they have? AI: The fact that demand might change during the day doesn't mean that the grid operator can throw their hands in the air in exasperation. Planning is still required and deviation from plan is to be expected if the situation changes. Planning will be based on historical data, season, weather forecasts, large user demand planning information, the famous big TV event ad-breaks, etc., along with other generators' production schedules (solar and tidal are intermittent but predictable) and maintenance schedules. This will lead to a plan with adequate base generation capacity and, if possible, some generation that can be started quickly - hydro, pumped storage, gas turbine and now battery storage. Don't forget that the system should be able to sustain the loss of a generator due to a fault. What significance do they have? They're "a plan to deviate from".
H: Help understanding current sense application note to inject feedback into buck converter I am trying to understand this application note using MAX4173H to inject feedback into a MAX1692 step-down converter. How to they determine the precise point at which the current limit will kick in, is it the point at which the forward voltage of D1 starts to be exceeded? Does R1 and R4 form a voltage adder? What i think i understand so far. The feedback voltage of the converter is 1.213-1.285v When there is 0.3A of output the current sense amplifier will output a voltage of 0.06 x 100 x 0.3 = 1.8V The forward voltage of the diode D1 is 1v AI: The datasheet for the MAX4173H states the formula for Vout (page 7): Vout = Gain * Rsense * Iload. It also states Gain = 100 for the "H" device. For the values given in the application note (0.06 Ohm and 300mA) that makes 1.8V. The MAX1692 will regulate towards 1.25V on it's feedback pin. If current exceeds the maximum allowed the MAX4173H will start pulling the MAX1692's feedback pin up, prompting it to lower it's output voltage. They apparantly took 1.8 - 1.25= 0.55V as the voltage drop for the diode. At the moment the current limit kicks in, the feedback pin is already at 1.25V due to normal regulation so hardly any current will flow trough R4, so one can ignore it's voltage drop.
H: Choosing the right opamp for a charge sensitive pre-amplifier circuit? I am preparing to build a charge sensitive pre-amp for use with a gas filled proportional counter. Here is an (idealized) schematic for a CSP: But in all my reading they are referencing idealized opamps. Broadly speaking, what opamps make good CSPs? I currently have a few different opamps in my supplies: ADA4530 (advertised as electrometer grade) OPA128 LM11 What parameters should be considered when choosing the opamp? Input bias current seems to be a big deal with electrometer grade opamps. Or is the choice of opamp not so important compared to choosing the right values of Cf and Rf? AI: I could not find enough information about "gas filled proportional counter". However, it sounds like as sensitive device as other ionization detectors. I use ADA4530 for one of my Electrometers as well. I can measure sub pA level using this OPA. Since you are going to detect small amount of charge (ion), the front-end needs to be very low bias/leakage current OPA. Meantime, due to the high gain, input offset voltage has to be low. And, the drift of those parameters should be low, too. Meantime, since you are just starting, follow the design guidelines in the datasheet. Besides all the design aspects for low noise high resolution (I use 24bit ADC), don't forget shielding (cage), no conformal coating, and absolutely clean assembly. In case, try ceramic coating on FR4.
H: What do you test when changing parts Let's say some parts within one of your products are discontinued. You already have a replacement that seems to fit from specifications. What tests do you usually conduct to verify proper operation? Long time test over temperature? Just a few test routines on the desktop? I am currently in charge to define which tests should be done and I am searching for advice and when possible literature sources adressing the question above. Thank you very much AI: From the comments to my question, I just realized: There is no generic answer to the question. It depends much on the key parameters of the product, the importance of the part and product and how good replacements meet the specification.
H: Unused pins of FMBA14 I am using NPN Darlington array FMBA14. I am only using B1,C1 and E1 pins for my application. The other pins B2,C2 and E2 can be left floating?. Can someone suggest anything on this? Thank you AI: The datasheet explicitly says that it's a multichip component so they are literally two separate darlingtons on two different dies. There's nothing joining them inside. Just do whatever you want, you could even carefully cutting the package to get a spare transistor out probably
H: Explanation a line in SPI Realisation in C: receive data I have googled how SPI in C could be implemented and found a tutorial, where there is the following line: #define SpiPs_RecvByte(BaseAddress) (u8)XSpiPs_In32((BaseAddress) + XSPIPS_RXD_OFFSET) I am a beginner and have no idea what this line does. Could someone explain in detail? AI: The #define is a preprocessor directive, which allows a programmer to write something that looks like a function call but isn’t - in this case it keeps the code readable and concise. In this case BaseAddress must be the address of the memory-mapped SPI controller. When the directive is invoked, it reads the RXD register of the SPI controller; this assumes that an SPI transaction has already been carried out and a received octet (byte) is available to read. In practice a programmer would write something of the form rxc = SpiPs_RecvByte(SPI_ADDR); That’s a start, do you need clarification of any of those points?
H: Why do input power calculations for this power supply not match? According to the specifications of this Mean Well LRS-150F-12, PSU (12 V, 12.5 A) its output power Pout is 150 W. I want to estimate the input rated power Pin at rated output. Efficiency is given as 87.5%. So this makes Pin = 100 * Pout / 87.5 So Pin = 171.4 W If I calculate Pin by using Pin = Vin × Iin = 2.8 A × 115 V = 322 W. So which Pin is correct here and why do they not match? Does that mean power factor is 171.4 / 322 ? AI: The AC input current will be worst case while charging up the high-voltage capacitors inside the PSU when power is first connected. In general maximum input current in normal operation will occur when powered at minimum input voltage. On "universal" power supplies which typically operate between 100 V and 250 V AC the maximum current will be when fed at 100 V.
H: Can LED work as pull-down for BOOT0? Apologies if this is a silly question. I must be really overworked to not see an answer myself. In short, I want to free GPIO pin by moving LED to BOOT0 of STM32L4Q5. According to datasheet BOOT0 automatically switches to analog mode after reset and then it can be used as PH3 GPIO. The straightforward way to use it is to add 10k pull-down and a FET to drive the LED. But what if I connect the pin to GND via LED and its 300R resistor? Will it work as sort of pull-down during reset (to boot from main flash)? AI: No, it is not guaranteed to work due to LED being sensitive to light and having some parasitic capacitance. To be 100% reliable under all conditions, it requires a separate pull-down resistor. That's because a LED will also act as a photovoltaic cell, and due to light that hits the LED it will output voltage. I just measured that a random SMD LED with series resistor will measure 1.24V in bright light. The multimeter input impedance is rated above 10 Mohm, but the voltage will be higher with no load impedance at all and just the MCU. So even with the multimeter, LED output voltage is already above typical CMOS input voltage requirements for a logic low level. In practice, the MCU could still understand that as logic low, and the voltage will be lower under normal lighting conditions. I used a flashlight for demonstration purposes. Many other circuits with LEDs connected to pins that are potentially three-stated or occasionally inputs (such as GPIO expanders) also suggest a resistor over the LED to shunt the photocurrent to avoid indeterminate floating voltages. Also the LED semiconductor junction has some smallish amount of capacitance, in the order of 10 to 100 picofarads. If you turn on the LED and reset the MCU, it takes some time for the charge to decay, and until it does, the GPIO pin will read as a high input. An external resistor will also make sure to discharge this charge. In some circuits, the LED capacitance can be used to measure light levels, by measuring how long it takes for the photocurrent to charge the capacitance - effectively making the LED a bidirectional communication device.
H: Opto-Isolator FODM 8071 switching noise at output Issue I am working with Logic Gate Output Optocoupler. I have tried removing 15pF capacitor but it didn't made any difference. On output port it is generating noise Any help would be appreciated..! Thanks in advance AI: Your schematic is barely legible, but it appears that you have a resistor (R8?) in series with VDD of a CMOS logic power rail. That shouldn't be there and will cause the voltage to drop depending on the load on VO.
H: ATTiny204 accurate delay with correct fuses and F_CPU So I worked with an ATTiny for the first time today and I was quite different from my regular Arduino / ESP8266 programming. When testing the Blink script I noticed that the delays weren't correct at all. I think I understand that I have to set the Clock Frequency Fuse and some Symbols correctly in order to have accurate delays. #include <avr/io.h> #include <avr/delay.h> #define F_CPU 20000000UL int main(void) { PORTA.DIR |= PIN4_bm; while (1) { PORTA.OUT |= PIN4_bm; _delay_ms(1000); PORTA.OUT &= ~PIN4_bm; _delay_ms(1000); } } Platformio.ini (Inluding fuses): [env:ATtiny204] platform = atmelmegaavr board = ATtiny204 framework = arduino board_fuses.osccfg = 0x2 board_build.f_cpu = 20000000L board_fuses.MCLKCTRLB.PEN = 0x00 upload_flags = -c$UPLOAD_PORT upload_command = pyupdi $UPLOAD_FLAGS -f $SOURCE -d attiny204 -v Readout of the set fuses: Device info: {'family': 'tinyAVR', 'nvm': 'P:0', 'ocd': 'D:0', 'osc': '3', 'device_id': '1E9122', 'device_rev': '0.1'} Fuse:Value 0:0x00 1:0x00 2:0x02 3:0xFF 4:0x00 5:0xF6 6:0x07 7:0x00 8:0x00 9:0xFF 10:0xC5 osccfg = 0x2 should set the clock to 20MHz, which I also set in F_CPU 20000000UL correctly. At least I think that. The delays are more like 4s in reality. How do I fix that? I'm unsing PlatformIO as my IDE. Clock source is Internal AI: You have to set the MCLKCTRLB.PEN (prescaler enable) bit to zero when the controller starts up (at the start of your main function). Otherwise the internal clock prescaler is active, which divides the clock by 6 by default. The datasheet's section on the clock controller (section 10) explains this. Note that you have to follow a special unlock procedure to change this register. int main(void) { CPU_CCP = CCP_IOREG_gc; //Unlock the IO config registers for writing CLKCTRL.MCLKCTRLB = 0; //Disable the prescaler ...
H: 5V voltage regulator output voltage I am using a MC78M05 voltage regulator to supply a microcontroller with 5V from a 7.5V input voltage. When I want to programm the card, the system is not working and there is no 5V supplied by the MC78M05 (the system is off, input regulator=0V). The 5V is supplied by the external programming signals like this: My question is: Can we destroy the 5V regulator by supplying the output to 5V with no input voltage in the voltage regulator? Research: I looked to the inside of the voltage regulator: I note that we have a voltage to the emitter transistors bipolar. I don't know the risk of supplying the output voltage regulator when the input is 0V. AI: Yes, forcing reverse current through a linear regulator like this can destroy it. The 78xx series is not designed specifically to survive this. You should protect the regulator with a diode from its output back to its input, as shown below. This means that the programmer will also have to supply some voltage to the circuitry before the regulator (if there is any). simulate this circuit – Schematic created using CircuitLab
H: Sniffing a SPI BUS I want to sniff some data from a SPI Bus between boards from a loom machine. The bus starts at J9 from PCB 5722 and goes through 8 boards named PCB 5778, which I guess are the slaves. The connector where the BUS starts has 14 pins and some of them are /OUTEN_EXP, SI, CKOUT+, CKOUT-, CEOUT+ and CEOUT-. The BUS goes through connectors J3 and J4 of each 5778 board and comes back to PCB 5722 on connector J10 which seems to have 2 termination resistor between CKOUT+ and CKOUT- and CEOUT+ and CEOUT- I guess those are the corresponding pins in a single-ended spi line (4 at the start) SI -> MOSI (6 & 8) CKOUT -> CLK (10 & 12) CEOUT -> CE / CS / SS (4 at the end) SO_MID -> MISO Is that normal for SPI to have CKOUT+ and CKOUT- and CEOUT+ and CEOUT-? Looks like differential pairs. After some research I found that in some cases LVDS can be used on SPI to increase the length of the bus. Is that the case? Also, the lack of more CE pins leads me to think it's connected in a Daisy-Chain topology. Any tips on how can I sniff the data from this BUS? Edit: I took some measurements with a scope right before J10 at the end of the line, here they are: 1 - CEOUT+ && CEOUT- with reference to GND 2 - CKOUT+ && CKOUT- with reference to GND 3 - Delay between CEOUT going low and CKOUT starting (3us) 4 - CKOUT stays on during 385us, considering it is 1 Mhz, it means the message has 385 bits = 48 bytes, right? 5 - SI signal stays HIGH when CEOUT is inactive, does that means something? 6 - Measuring SI and CKOUT+ is possible to conclude it reads the bits at rising edge, right? With that in mind Can you identify what standard is that? (RS485, LVDS, TTL...) What receiver would you recommend to read these signal? Is that a way for me to simply connect in parallel and drop the voltage of the CKOUT+ and CEOUT+ in 1V to identify when it is HIGH and LOW and connect directly to a microcontroller pin and read it like a normal SPI? AI: I agree with you about SPI for it's resemblance, that has strobe, clock, data out, and data in. It just uses buffers/drivers (PHY) instead of direct logic level signaling. Assuming so: For CLK & CE, the driver & receiver front ends are "differential", "shunt terminated" at the receiver end of the "master"(pin 6-8 & 10-12). These are likely RS422 or RS485. I would scope it, then attach a 422/485 receiver. Data line (SI -> SO_MID) is single ended. Possibly, it is pulled-up (open collector/drain, shared, dot-ored). That is to simplify the hardware arbitration while fitting SPI protocols to "ring topology". Meantime, data line can be shared with other signaling as well, if you see other activities than data on this signal line. Check the signal level, then attach a buffer.
H: RJ11/RJ45 power surge protection I have a case where phone landline is above the ground and when lightning strikes it hard, the internet modem and router gets damaged, including devices connected to it. I was wondering what would be essential components of some sort of surge protector. I would expect it to look similar to surge protectors in electric installation which trips when the voltage spikes but I'm not sure it would be sufficient to protect such delicate (low voltage) equipment. the devices i can quickly find online usually just give you a third terminal to connect to ground but I doubt it's all you need to have? AI: A good protection network will use multiple types of protective devices which compliment each other. To be able to withstand lightning strikes, a common first device is a gaseous discharge tube - a spark gap. During an overvoltage event these can conduct thousands of amps but the voltage at which they activate is relatively high and cannot be made precise: +/- 20% is what you might expect to see. After the GDT, you might have a metal oxide varistor. These also conduct when the voltage across them rises to a preset level, but they're more precise (+/- 10%). They cannot conduct as much current as a GDT, but they're just working with whatever is left over after your GDT did its job. Finally, you might have a transient voltage suppressor - a kind of Zener diode. Same story as before: even more precise than a MOV, but at the expense of current handling capability. On top of all of this, you have to take into account how all these devices are interacting with the line you're trying to protect: leakage current, additional capacitance, etc. If you're trying to protect a high speed data line, my suggestion is not to roll your own, but to buy a premade network that is designed for the line where engineers have already thought about these things.
H: What is a C1 and A1 chip? I'm fixing a Playstation 4 and Playstation 5 and I blew off a PS5 chip labeled C1. I managed to use a similar chip from a PS4 but it is labeled A1. What are these chips called and what do the labels mean? AI: Kind of a blind shot here, but that seems to be a SOD package. So in this case it would be some kind of diode. Not sure how to decode the label.
H: How is a line commutated inverter different from a grid-following inverter? The U.S. Department of Energy provides this definition of a line commutated inverter: An inverter that is tied to a power grid or line. The commutation of power (conversion from direct current to alternating current) is controlled by the power line, so that, if there is a failure in the power grid, the photovoltaic system cannot feed power into the line. In my mind, a commutator is a mechanical device for converting ac to dc using a rotor -- the power electronics corollary would be a rectifier, which is the opposite of an inverter. The DOE definition goes the opposite direction (dc to ac) for commutation, suggesting that a synonym for "line commutated inverter" would be "line inverted inverter." However, all of this to me sounds just like a grid following inverter, that requires an ac grid connection in order to convert dc to ac. Do these two terms mean the same thing, or is there more nuance that I'm missing? Why the use of "commutated" in this odd way? AI: This use of the term "line commutated" does seem a bit odd in the context of prior use in power electronics. "Line commutated" has been used to distinguish the use of the reversal of the AC line voltage and current to commutate a thyristor rather than using a forced commutation method. Commutation "controlled by the power line" seems more like commutation synchronized with the power line rather than using the power line to reverse bias the switching device to turn it off. A grid-following inverter is synchronized with the grid and accepting the grid as the voltage regulator. A grid-forming inverter would attempt to regulate the grid voltage expecting other sources to accept that. The following is an example of the use of the term "line-commutated" from Bimal K. Bose, Power Electronics and Motor Drives Advances and Trends, Copyright © 2006, Elsevier Inc: Thyristor converters are characterized by line (or natural), load, or forced commutation. Line-commutated converters are used extensively in utility systems, and these will be discussed in this chapter. Force-commutated thyristor converters that require auxiliary transient circuits are practically obsolete. Converters that use devices such as power MOSFETs, GTOs, IGBTs, and IGCTs are characterized by self-commutation. Another example comes from Philip T. Krein, Elements of Power Electronics, Copyright © 1998, Oxford University Press (emphasis in original): The term commutation refers to the general process of changing the current flow path from once circuit configuration to another. Diodes and SCRs exhibit what is termed line commutation, in which ac sources and line parameters such as inductance define the way in which current switches among paths. Line commutation typically means that a natural "make before break" action occurs in which a new current path is established before the initial path is cut off. Transistors and GTOs [gate turn-off SCRs] exhibit forced commutation, in which the switch can be turned off actively even before another path has been established.
H: How to use a battery charger evaluation module as a booster? I have a power source that can give me around 0.9 ~ 1 V and 900uA. I would like to use the BQ25570 battery charger evaluation module to give an output of 1.8 V. I would like to attach a capacitor to discharge the current at 1.8 V. I looked at the manual, but it only discusses how to set it up as a buck converter. How can I set it up to increase my voltage while charging the capacitor? AI: The buck converter is operated from the energy stored at a higher voltage on VSTOR. It isn't intended to drive the consumer directly. It charges VSTOR to 4.2V, then uses the buck converter to make 1.8V for the consumer. The chip has a programmable threshold - when VBAT rises above the threshold, the 1.8V output is enabled.
H: Calculating N-type enhanced MOSFET gain with two different equations brings me a different result? Hi, take a look at this problem from my notebook. Leave alone the fact that the resistor should actually be 1,111.111, it is not related. If they claim that VGS=2 and Vs is connected to ground it means that VG = Vin =5V. And if VD = Vout = 10V. If it's true, than the gain should be Vout/Vin = 10/5 = 2. But if I calculate it with the different formula gmRd then the gain is indeed 6.6. How is that possible? AI: There are two issues I see. The first is I think you've mistaken the actual gate-source voltage \$V_{GS}=5V\$ for the MOSFET threshold voltage, which is called \$V_{GS,th}=2V\$ in your text. Second, they are not calculating gain as a function of pure DC input and output voltages - e.g. Vout/Vin because they are talking about small signal gain. In small signal gain, you make a "small" change in input voltage (e.g. 0.1V), and measure the change in the output voltage (e.g. 0.66V). The base DC levels for your input voltage and output voltage aren't a factor.
H: Can I use a SSR to switch on/off an electronic ballast? It's not appropiate to use a SSR to switch on/off magnetic ballast (used with HID lamps), because it's an inductive load and the Triac inside the SSR cut off while there is still current flowing. That produce flickering. Can I use an SSR to switch on/off an electronic ballast without adverse side effects? AI: The easiest way to solve that is use SCRs. They have 1/2 cycle to commutate. We did that with 500V 100 horsepower DC motors, no problems. There were 8 of them on extruders. I do not know if you can purchase them any more. You can also add to the snubber circuit.
H: Is it a good idea to charge multiple Li-Ion batteries using a single buck converter? I am trying to implement a DIY MPPT into my solar tracker project and I wanted to know if it was possible to charge all of the three li-ion 3.7v batteries in series with just one feedback buck converter; BMS modules charge each cell individually so they can discharge every cell that has stored extra charges, which makes sense to me, but what makes the batteries charge unevenly in the first place? AI: Most BMS modules do actually charge all cells in series with a single converter. They just have extra circuitry to discharge single cells that are charged too much. This can be achieved by simply putting a resistor in parallel with each cell which can be activated using a FET to discharge the cell a bit. If you want a fancy solution, you can also recycle the charge drained from one cell to charge the others. There are also BMS modules that only balance the cells and don't include charging circuitry. This might be a good choice if you want to build your own charger but don't want to worry about balancing the cells yourself. The reason why the cells have different voltages is that their capacities are not the same, one cell might be full with 2000mAh while another one might need 2200mAh. Their voltages therefore have to be equalized somehow. They may also dissipate more or less of the charging energy as heat, depending on how efficient they are (as was already commented on the question). The cells will also have different self-discharge rates.
H: Current flow in full wave bridge rectifier during negative half wave I was watching a video on full wave bridge rectifiers and was wondering why the current flows in the direction of the green arrow (+ to point C) during the negative half wave, instead of going in the direction of the pink arrow to the resistor? AI: The negative cycle conducts thru D1,D3, and +ve cycle thru D2,D4. So the green and your pink arrow are the same current.
H: Assess Efficiency of Small Switching Power Supply First of all, I'm a noob. I just like to tinker around. I would like to find how efficient my little 12v/1a switching power supply is (and many others like it). From some research, it may appear things aren't so simple on the 120v input side. It sounds like power factor and delay of voltage/amperage waves make it harder than simply multiplying voltage by amperage. AC input power can't be calculated simply as RMS input voltage times RMS input current because of the differences in phasing between the voltage and the current in an AC system, designated as ϕ and seen in figure 1. If we did this, it would yield a result that's too high because the value would include both the power converted by the power supply (P) and the power that's returned to the AC source (Q). --> Source I just ordered the Kaiweets HT206D (6000 count) meter which measures AC amperage, though it's a clamp meter. Probably don't want to use it due to lack of precision at that low of current. (It has settings for 60A and 600A.) I also ordered a cheap multimeter that measures AC current (AstroAI M4KOR - 4000 count - settings for 400ma / 10A). For the record, I also have a Kill-a-Watt that will measure power factor. Here's the question: Can I use the power factor reading from the Kill-a-Watt combined with the voltage and amperage measured by the multimeter to gauge the wattage the power supply consumes on the input side and then pit that against the output DC amperage & voltage to assess efficiency? Thanks for your input! AI: If your serious about getting accurate effiency readings I would recommend you purchase a dedicated power meter that can do the efffiency measurement. When it comes to power supply eff every .1% is a huge battle to get. Im guessing if you do a tolerance analysis on all of the equipment you have you will start to see the challenges.
H: How to calculate the pulsating current flowing through a shunt resistor? If the current flowing through the shunt (0.5 ohm) is in pulsating form (PWM with 50% duty cycle and 100 Hz frequency,) how do I calculate power loss through shunt in order to choose proper for application? (Driving a solenoid with pulse and hold approach.) Maximum peak value is 0.8A while pulse and maximum peak value while hold is 0.5A. See the image below of my current flowing through the shunt. If I have to calculate the power loss then what would be the equation I have to take in account? Maybe I can do \$P = I_{RMS}^2 R\$, but I am more interested in how to calculate it by integration and then compare it with \$P = I_{RMS}^2 R\$ for me to learn and understand. I am sorry in advance if this question is too naïve to answer here. (May be you can give me a link as well if this kind of calculation is done.) I am just trying to understand. EDIT: 0.8A current staying for 500ms and 0.5A current staying for 12 seconds than again 0.8A current for 500ms repeat it self. AI: The average power for a period is the total energy dissipated in that period of time divided by the length of time: $$\overline{P}=\frac{1}{t_1 - t_0}\int_{t_0}^{t_1} V_t\: I_t\:\:\textrm{d}t$$ Power, as defined above, can be positive or negative. But given a constant load, \$R\$, then either \$V_t=I_t\:R\$ or \$I_t=\frac{V_t}{R}\$ can be applied: $$\overline{P}=\frac{1}{t_1 - t_0}\frac1R\int_{t_0}^{t_1} V_t^2\:\:\textrm{d}t=\frac{1}{t_1 - t_0}R\int_{t_0}^{t_1} I_t^2\:\:\textrm{d}t$$ And it cannot now be negative (so long as you move forward in time like most of us, anyway.) \$R\$ can be moved to the other side of the equation so that you either have \$V_{_\textrm{RMS}}^{^{2}}=R\cdot\overline{P}\$ or else \$I_{_\textrm{RMS}}^{^{2}}=\frac{\overline{P}}{R}\phantom{\:}\$. The resulting equations are then: $$\begin{align*} V_{_\textrm{RMS}}&=\sqrt{\frac{1}{t_1 - t_0}\int_{t_0}^{t_1} V_t^2\:\:\textrm{d}t} \\\\ I_{_\textrm{RMS}}&=\sqrt{\frac{1}{t_1 - t_0}\int_{t_0}^{t_1} I_t^2\:\:\textrm{d}t} \end{align*}$$ The inner integrations, \$\int_{t_0}^{t_1} V_t^2\:\:\textrm{d}t\$ and \$\int_{t_0}^{t_1} I_t^2\:\:\textrm{d}t\$, are action integrals. That is, they summarize into a single scalar value the history of some action over some period of time. (In physics, the term action has an important role enshrined by the principle of least action.) In electronics, action integrals are used to specify ratings for fuses or to help in analyzing datasheets for pulse-rated resistors. In your case, the starting time is \$t_0=0\:\text{s}\$ (because we can "just say it is") and then \$t_1=500\:\text{ms}\$ and \$t_2=12.5\:\text{s}\$, which then covers your total repeating cycle: $$\begin{align*} I_{_\textrm{RMS}}&=\sqrt{\frac{1}{t_2 - t_0}\left[\int_{t_0}^{t_1} I_t^2\:\:\textrm{d}t+\int_{t_1}^{t_2} I_t^2\:\:\textrm{d}t\right]} \\\\ &=\sqrt{\frac{1}{12.5\:\text{s}}\left[\int_{0\:\text{s}}^{500\:\text{ms}}\!\!\!\!\!\!\!\!\! I_t^2\:\:\textrm{d}t+\int_{500\:\text{ms}}^{12.5\:\text{s}} \!\!\!\!\!\!\!I_t^2\:\:\textrm{d}t\right]} \end{align*}$$ But you know that in your first phase, there are exactly 50 pulse periods (\$10\:\text{ms}\$ each.) Each pulse period has an 80% duty cycle and so active for only \$8\:\text{ms}\$, being zero for the remaining \$2\:\text{ms}\$. So we know that the total active time is \$8\:\text{ms}\cdot 50=400\:\text{ms}\$. Also, you know that \$I_t=800\:\text{mA}\$. So you can readily compute that the first integral term within the square root is: \$400\:\text{ms}\cdot \left(800\:\text{mA}\right)^2=0.256\:\text{A}^2\:\text{s}\$. You know that in your second phase, there are exactly 1200 pulse periods (\$10\:\text{ms}\$ each.) Each pulse period has a 50% duty cycle and so active for only \$5\:\text{ms}\$, being zero for the remaining \$5\:\text{ms}\$. So we know that the total active time is \$5\:\text{ms}\cdot 1200=6\:\text{s}\$. Also, you know that \$I_t=500\:\text{mA}\$. So you can readily compute that the second integral term within the square root is: \$6\:\text{s}\cdot \left(500\:\text{mA}\right)^2=1.5\:\text{A}^2\:\text{s}\$. So the final answer is: \$I_{_\textrm{RMS}}=\sqrt{\frac{1}{12.5\:\text{s}}\left[0.256\:\text{A}^2\:\text{s}+1.5\:\text{A}^2\:\text{s}\right]}\approx 375\:\text{mA}_{_\textrm{RMS}}\$. That's the final figure that includes both the first and second phases. So that's also the result for all integer number of recurring periods, \$N\ge 1\$. To confirm this through a different approach, you can find that the energy delivered is \$50\cdot 8\:\text{ms}\cdot 500\:\text{m}\Omega\cdot \left(800\:\text{mA}\right)^2+1200\cdot 5\:\text{ms}\cdot 500\:\text{m}\Omega\cdot \left(500\:\text{mA}\right)^2=878\:\text{mJ}\$. Average power is \$\frac{878\:\text{mJ}}{12.5\:\text{s}}=70.24\:\text{mW}\$. Now compute \$500\:\text{m}\Omega\cdot 375\:\text{mA}_{_\textrm{RMS}}^2\approx 70.31\:\text{mW}\$, the difference due to the fact that I rounded the earlier result to \$375\:\text{mA}_{_\textrm{RMS}}\$. That's the mathematics part. That's what you asked for. So there it is. The safest way to go, for example when designing the board with a PWM driven by uncertain software, is to assume the worst. In that case, you'd want a resistor rated for at least \$\frac12\:\Omega\cdot \left(800\:\text{mA}\right)^2 =320\:\text{mW}\$. You don't round that down, but up. So at least \$\frac12\:\text{W}\$ if you like keeping your margins slim. Or \$1\:\text{W}\$, if you are more safety-minded. There are "pulse-rated" resistors. Chip-type resistors rated for pulsing are wider than usual to avoid current crowding. (You know that fuses are designed with very narrow wires inside for exactly the opposite reason -- you want the fuse to fail at certain currents.) Wire-wound resistors are another approach, which also come in nice cemented bodies. A lot of companies make these kinds of resistors and they will (or should) rate them. Still, you aren't in the "pulse" market. You are operating these resistors over relatively long periods of time with pulses that are almost continuous. Anything in the area of 50% to 100% is to be treated as an average. So if you knew that it would be a 50% duty cycle, then you might reasonably say that a \$\frac12\:\text{W}\$ resistor could handle \$1\:\text{W}\$ peak pulses. That's as far as you need to go and there's no need to dwell on action integrals see where a resistor might fuse. This doesn't help your situation much because your early pulses are \$320\:\text{mW}\$. 80% of that just means \$256\:\text{mW}\$, average. That may mean that a \$\frac12\:\text{W}\$ now appears to be a safer choice. But it doesn't mean much more than that.