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H: Are large electrolytic capacitors necessary in a servo system that doesn't need to be precise
I have two servos in an autonomous sail boat. One controls the rudder, the other the winch. I try to use both sparingly to minimize power consumption, and so I disconnect each unused servo through an n-MOSFET, and additionally, when neither are in use, I put the power regulator to sleep. Here's the circuit diagram:
I added the large caps based on recommendations from the interwebs to reduce "jitter," but given the fact that keeping a fixed position isn't really important here, are the caps doing anything besides effectively wasting energy? What I see when I scope the system is that when I power down the regulator, the caps discharge within a few seconds, meaning the power is wasted somewhere.
AI: Typically, any feedback system requires capacitors, so that small fluctuations in the power supply due to movement of the motors do not create another unintentional feedback path. In this case, the charge lost in 1 discharge cycle of two 250uF capacitors is minuscule compared to your battery capacity: 250 uF * 5 V is about 1.25 mC, by comparison 1 mAh (where most batteries are on the order of thousands of mAh) is 3600 mC. Therefore, a typical 1000mAh battery can theoretically support many million charge and discharge cycles of your caps.
Not having capacitors may very well reduce your battery life, if small fluctuations in the power supply cause noise in your servo feedback readings and therefore cause the motors to move unnecessarily. Powering up the motor (even for a couple of milliseconds) is likely to waste magnitudes more energy than charging and discharging the caps. |
H: What are all of the pins of the Beaglebone Black Rev. C serial (debug) header?
The Beaglebone Black Rev. C has a serial debug header with 6 pins. I would like to know what each of these pins is. If numbered 1-6 starting closer to the 5v barrel connector, pin 1 is ground, pin 4 is RX, and pin 5 is TX. What are the other pins? Are they NC (not connected)? do any supply any power? Can they safely have an applied voltage (3.3V, 5V, or other)? Consider that most FTDI cables, which match up to the Tx/Rx/Gnd header pins, have a supply voltage output that would line up with header pin 3 (as I have defined the numbering). Are the other pins functional RTS and CTS, as would match up with the FTDI connections? What are the safe/recommended voltage ranges for pins?
AI: There is a schematic available here: http://elinux.org/Beagleboard:BeagleBoneBlack#LATEST_PRODUCTION_FILES_.28C.29
See page 4. Looks like J1 (the UART0 serial port) has only three of the six pins connected - ground, TX, and RX. The others are NC, so you can apply any reasonable voltage to them. Looks like it is designed to work with a USB to TTL serial cable. The TX and RX signals pass through a 74LVC2G241 dual tristate non-inverting buffer/driver that is powered by the 3.3 volt supply. The inputs are 5v tolerant.
The CTS pin of the UART is not connected while the RTS pin is brought out as TP9.
By the way, those are some of the longest pin names that I have seen. |
H: Inverting or Differential Amplifier? (Or neither?)
I have been searching for how to calculate Vout in the following operational amplifier circuit, but so far I have come up empty.
I feel it is either an inverting amplifier or a differential amplifier. I have yet to find an equation for an inverting amplifier that incorporates an external voltage source between the non-inverting input and ground. Also, if this is a differential amplifier, then the just-mentioned external voltage source could be the result of a voltage division between R2 and Rg according the following circuit.
I should then be able to use the following formula to calculate an output voltage.
This gives a Vout of 100 mV. Does this seem right? It is interesting how Vout = V1 = VRg.
Can anyone shed some light of understanding upon this conundrum of mine?
AI: You're correct; this will output 100 mV as drawn. The reason for this is the amplifier outputs whatever voltage is required to set its inputs equal. Since one input is fixed at 100 mV, the other one must be driven to 100 mV. This happens when the output is at 100 mV. Since every node in the circuit is at 100 mV, no current will flow through the resistors (well, ignoring any current flowing in to the op amp input pins). |
H: Low output impedance vs high output impedance of an amplifier
I read that a low output impedance is desirable for an amplifier. I am unable to understand why from my analysis of the output side of the common emitter amplifier. So looking at the output of the Common Emitter amplifier below, the output impedance is \$Z_{0}=r_{o}||R_{C}\cong R_{C}\$.
The load and \$R_{C}\$ will be in parallel with respect to the current source.
Let's consider the two extremes:
\$R_{C}=\infty\$ : \$R_{C}\$ branch is open so all the current will be flowing through the load. The load voltage is, \$\beta I_{b}R_{L}\$.
\$R_{C}=0\$ : \$R_{C}\$ branch provides a short for the current source so no current reaches the load. Load voltage is 0.
So what's going on? How come a low output impedance is desirable? Surely, something must be wrong with the way I'm analyzing the circuit!
AI: In general
The output impedance of an amplifier is equivalent to a source impedance \$Z_{S}\$ from the perspective of a load with impedance \$Z_{L}\$. Think of a voltage divider where \$V_{\text{out}}\$ is the output voltage of the amplifier without a load (i.e. \$Z_{L} = \infty\$):
simulate this circuit – Schematic created using CircuitLab
The voltage delivered to the load is
$$V_{\text{load}} = \frac{Z_{L}}{Z_{L} + Z_{S}}V_{\text{out}}$$
If \$Z_{S} \gg Z_{L}\$ then \$V_{\text{load}} \approx 0\$, which is bad if you are trying to amplify a voltage for the load. But if \$Z_{S} \ll Z_{L}\$ then \$V_{\text{load}} \approx V_{\text{out}}\$.
For voltage amplification you want low output impedance from the previous stage and high input impedance from the next stage to maximize the voltage gain.
For current amplification you want the reverse: high output impedance from the previous stage and low input impedance from the next stage. Think of a current divider: the current will mostly flow through the lower impedance, so a low input impedance from the next stage means most of the current will flow into the load.
Your case
\$R_{C}\$ actually forms part of the load for the common emitter -- the total load to the common emitter is \$R_{C} \| R_{L}\$ where \$R_{L}\$ is the input impedance looking into the load. As in the general case you want to maximize the input impedance looking into the next stage, so you want to maximize \$R_{C}\$. In the limiting case where \$R_{S} = \infty\$ the only load is the input impedance looking into the load (i.e. \$R_{L}\$), which is the maximum load impedance you can get. In the limiting case where \$R_{C} = 0\$ the collector is shorted to \$V_{CC}\$ and there can be no voltage gain (the collector, which is the output node, is just shorted to the supply). |
H: CMOS inverter with feedback
In some circuits such as crystal oscillators, there is a CMOS inverter with a feedback resistor, they all simply say the resistor bias the 'amplifier' and force it to operate in the linear region, such as Fairchild: CMOS Linear Applications:
Due to the symmetry of the P- and N-channel transistors,
negative feedback around the complementary pair will
cause the pair to self bias itself to approximately 1/2 of the
supply voltage.
But what's the internal working details?
Why the bias point is '1/2' supply voltage?
It seems the '1/2' bias point only work when the input is open, or the source is capacitive coupled with the inverter, right?
The inverter's VTC from Sedra & Smith's book
AI: Diverger - I recommend to study the V(in)-V(out) transfer characteristic to be found in the relevant CMOS data sheets. As you will see - the output voltage will be at Vdd/2 in case the input also is Vdd/2. Because the transfer curve of the inverter has a negative slope (rising input causes falling output) you can find a stable operating point at V(in)=V(out). This can be simply accomplished using a large feedback resistor Rf between output and input (Rf should be "large" with respect to the overall input resistance of the circuit).
If you are going to use the CMOS device as an analog amplifier you need an input coupling capacitor to separate dc and ac. The gain is relatively large - however, determined by the slope of the transfer curve which has large tolerances and uncertainties. Thus, it is recommended to use signal feedback using a series resistor between signal source and the input capacitor. This reduces the gain, but stabilizes the gain value against CMOS tolerances. |
H: Conversion Process From Single-Ended to a Differential Filter
I have a single ended filter which is quite similar to the one on the following picture;
My question is how to convert from single ended to a differential filter. Especially the inductors and capacitors which are going to the ground?
Should one multiply or divide its values? or ?
Thanks/
AI: Basically, just draw a line across all of the grounds and then mirror the entire circuit over the line. See: http://www.ti.com/lit/an/slwa053b/slwa053b.pdf
After that, you can remove the ground connections and combine series components (two caps in series become one of 1/2 the value, two inductors in series combine to one 2x the value, etc.)
You should end up with your line of inductors duplicated at the bottom with the same values, interconnected by series LC circuits with 1/2C and 2L. |
H: General wiring questions: high power LEDs, relay and microcontroller
I think I understand the Raspbery Pi GPIO pins and most of how this diagram below works, at a high level at least.
First question, it's not clear to me exactly how the middle part with the resistors and transistors works. Can anyone help explain how this works in another way? This is essentially flipping the high/low logic from the GPIO pins so a low output from the pi is non-zero voltage to the relay input?
source
another reference for the middle section
To power the LED's on the other end of the relay, I have a wall AC adapter to 28VDC, .9A that will power a 700 mA driver. The driver will connect each of the relay terminals to the LEDs. I will only need one led/relay active at a time.
My second question, if I run 8 wires from the relay terminals to power each LED, can I connect them all to the same wire for ground to return? I'd like to have some sort of quick disconnect for the LEDs so they can be easily unplugged, can you have multiple quick connect terminals spliced into a shared ground or is that a bad idea? Any recommendations for quick disconnecting plugs?
Still pretty new to all of this so I feel like I could very easily miss anything from "common sense" and "good practice" to "just completely wrong".
Here's the LEDs I was planning to use in a series to justify the 700mA current.
AI: I admit the explanation about the transistor is a little misleading. I wouldn't have chosen to use the term "active low" in this scenario because you have direct control of the GPIO pin, not direct control of the relay. The GPIO pin is active high. All they're saying is you need to turn on the transistor so it can provide a path to ground for the relay's coil. And to do so, you need to drive the GPIO pin high.
Here's what the full circuit probably looks like for each GPIO/relay pair:
simulate this circuit – Schematic created using CircuitLab
When the GPIO of the RPi is driven high (in your code), the 2N222 NPN transistor is turned on. That allows current to flow from the 5V source, through the relay coil, through the transistor, and into ground, which will activate the relay. The author's description of "active low" is actually referring to the spot I marked "V1" in the circuit. When the voltage at that node is low (when the transistor is on or if you just touch a ground wire there), current will flow and the relay will activate. I think she explained it that way because that point in the circuit is physically manifested as a pin you can connect to.
R1 is a current-limiter resistor. It prevents too much current from being sourced from the GPIO pin and into the transistor's base. R2 is a pull-down resistor. It forces the base of the transistor low (and thus the transistor off) if the GPIO pin is physically disconnected or high impedance (tri-stated). When the GPIO pin is attached, R2 can be ignored. There is no signal flipping going on.
If you wire up your LEDs and current source like so, you can connect them all to the same ground wire:
simulate this circuit
I'm assuming you've got a handle on how much current these LEDs need. If you're not sure about hooking up your LEDs to a 700mA constant current source, please do more research first (or sit back and enjoy the fireworks). At no time should all of the LEDs be off - unless the current source has been safely disabled.
This circuit will work as long as you do as you said and only have one LED on at a time. If you do activate more than one at a time, the current will divide between them. And since LEDs have a negative temperature coefficient, one LED will tend to dominate the current and look brighter than the others. |
H: Calculating resistor wire properties for my projects
I have a few things I wanna do with the resistor wire. They all involve getting approximate temperature using known voltage. I understand that temperature heavily depends on environment, but what I know now is nothing, which is much less that can be known in my opinion.
In the shop they offer wires with these 3 properties:
length
resistance
diameter
I have two general things I want to create
low temperature drying device for chemicals
high temperature electrical shisha
I wonder how could I calculate approximately which wire do I want. I would then test it to get the exact temperature. I understand this would need some additional electronics - but I'm sure I can first calculate the wire so that it's not burning red instead of slightly warm.
AI: This mostly depends on what your powering the resistance wire with. The voltage going in, combined with the resistance of the wire will dictate the current flow and therefore the power dissipated in the resistance wire. All power dissipated in the resistance wire is useful heat, to heat up your materials (chemicals/shisha etc).
So the actual resistance is not relevant if you have absolute control over the voltage being fed in. As a rough indicator, a 10W heater with a 12V voltage source would need a total resistance of 14.4Ohm (Pd = V^2 / R), which with this wire would need to be 3.42m long.
How much thermal power you produce (Pd) will then dictate the temperature, depending on the materials you are heating. Thermal energy will be needed to bring up the materials to the desired temperature, and less energy will be required to keep the materials at the required temperature (due to heat escaping to the environment).
To keep a constant temperature, you need to reach a state of equilibrium where thermal energy added to the system matches thermal energy being lost. Heat loss will increase as the system temperature increases, so for any given heater system it will naturally reach a maximum temperature. However, any change to the system will change the maximum temperature (remove materials, the wire may overheat).
In short, you can make a heater system that does not have a controller, but the required power fed in is highly dependent on the system (what materials you are heating, how much etc). Your best bet is to use a lab power supply, in current control mode, and slower creep up the current until it heats up and stabilizes at the required temperature. You can do calculations to estimate heat loss, but they may not be much more useful than empirical testing.
As a rough guide for somewhere to start, make an educated guess as to the rough order of magnitude of power needed. This device heats about 0.5sq m of soil to around 30C, and is rated at 27W. So we could infer that for temperatures of 30-50C, over an area of about an A4 piece of paper to 0.5sq m, 10-30W would do the trick. This is assuming that the wire is heating something else up first (some medium like sand). This is a Fermi style estimation, to give a rough idea or scales. If you start testing with the ability to generate 10-30W of heat from your wire, you can then ramp up your power supply across the range to see what works.
If you do make a heater without a controller, you still need some kind of safety trip to stop it overheating. If you do some googling, you can find various ways to do this. The easiest is probably a simple thermal fuse in series with the resistance wire, that will disconnect power to the resistance wire if it heats beyond a set temperature. |
H: Determining Bandwidth of any circuit
I am getting familiar to SNR, noise calculations, thanks to this forum, however I often come across Bandwidth of the system to calculate resistor noise, to get rms noise from nV/rt-Hz, etc.
I have a pressure sensor (wheatstone) connected to ADC through an Opamp and I have a single RC LPF between Op-amp and ADC.
So should I take cutoff of LPF as bandwidth?
And on what factor should the cutoff of my LPF depend since the sensor is just giving DC differential output.
Op amp I am using is MCP6v07, in its datasheet I see a large spike at 10Khz in noise density graph, should I choose my LPF cutoff to be much lower than 10KHz.
I set my ADC to sample at 19.2KHz since it's datasheet says it to be optimal sampling frequency, Should My LPF cutoff depend on ADC sampling rate.?
Also is it this ADC sampling rate my BANDWIDTH?
I am so confused.
Thanks for any pointers.
AI: And on what factor should the cutoff of my LPF depend since the sensor
is just giving DC differential output.
Your application is a very sensitive Wheatstone bridge and, if the signal you are looking for is basically DC, then you want your filter cut-off frequency to be as low as possible in order to reduce noise from the op-amp amplifier. But, in reality you can't have a LPF with a DC cut-off frequency because nothing will ever change and, the component sizes will be infinite so you have to re-examine your requirements and possibly 10 Hz might be a good filter cut-off.
You are sampling at 19.2kHz but that is now irrelevant to your design - you could sample at 100Hz and get the same performance if 10 Hz is your low-pass filter. Remember, the LPF does two things: -
Gets rid of unwanted self-generated noise from your op-amp amplifier (this is your main problem)
Prevents aliasing (this won't be a problem because nothing will get through a 10 Hz filter that would cause aliasing when you sample at 19.2kHz)
In your previous question I reckoned your op-amp had a noise of 60 nV / \$\sqrt{Hz}\$ but, if you restrict your bandwidth to 10Hz, the sum of all the noises will be over a bandwidth that is 16Hz (believe it or do the math! link) therefore, your equivalent noise at the input to your op-amp will be \$\sqrt{16}\$ x 60nV = 240nV. This is then multiplied by your op-amp gain (say 10) to give you a real figure of 1.2 micro volts into the ADC.
In your previous question it was 10 micro volts because I had assumed the BW to be 16kHz.
Remember also that the op-amp noise will rise (per Hz) as frequency falls and that in the DC to 10Hz range there will be another figure in the data sheet for the op-amp that covers this area. I'm not sure about the MCP6v07 and how well it's "auto-zero" feature works well at eradicating this LF noise so you'll need to check. However, if I looked at the ADA4528 (because I use it similarly to you) it has only 97nVp-p noise in the 0.1Hz to 10Hz bandwidth and this is a really good figure for an op-amp, made so by the auto-zero feature. It appears that the MCP6v07 is 1.7 micro volts p-p for comparison.
Is this good-enough? - I can't tell you because I don't know what gain the op-amp is needed to be set at and I don't know your requirements - I can only make comparisons.
Noise Equivalent Bandwidth - for a low pass filter the NEB depends on the order of the filter: -
Noise bandwidth = 3dB cut-off frequency \$\times \dfrac{\frac{\pi}{2n}}{Sin(\frac{\pi}{2n})}\$ where n is the order of the filter. For n = 1 this reduces to Fc x pi/2 |
H: AVR simple bootloader - how to call application code?
I am using the atmega328. I want to create a simple test application using a bootloader. I want to: Blink an led at one speed in the bootloader section of flash, and then blink at another speed in application section of flash. these are my fuse bits:
From my knowledge, if I set the BOOTRST fuse I can set where the program boot(or rests from)
so, I have set the program to execute from the begging of the boot loader section, 0x3800 (for a page size of 2048). this is on page 282 of the datasheet ).
This is the current code:
#include <avr/io.h>
#include <avr/delay.h>
void boot_program_page ()
{
DDRC = 0xFF;
PORTC = 0xFF;
_delay_ms(1000);
PORTC= 0x00;
_delay_ms(1000);
}
void main(void)
{
boot_program_page ();
asm ( "jmp 0x0000" );// Jump to application code.
PORTC = 0xFF;
_delay_ms(10000);
PORTC= 0x00;
_delay_ms(10000);
}
This is my understanding:
Because I have set the BOOTRST fuse at the beginning of the boot loader section, this code is burnt into the bootloader. As soon as the program sees the jump to application code (asm command) it burns the rest of the following code in the application memory. this is not what happens though, the boot_program_page() is just run indefinitely.
How can I fix this?
Thanks!!
AI: You are misunderstanding the function of the assembler command.
If you program a "GOTO" in C, the jmp assembler command comes out. It is just what it says on the tin: Jump. It tells the compiler nothing about code location.
Nowhere in your code do you specify what code goes where, as such the compiler just decides for you that you want the code to go where it thinks is best. Which most likely is the start of non-vector non-boot space.
I think you'd be well off going to:
http://www.avrfreaks.net/
And searching for "[TUT] Bootloader" and see if there's a tutorial that pops up that fits your general way of thinking. It'll take you at least a good half day, but you will learn most you need to know about it.
Edit:
I forgot to point out that your code also doesn't stop at a predictable point. These days often the compiler helps out in the assumption you mean to stop at the end of main(), but it's "good manners" to include a while(1){}; at the end, where you want the code to halt. That way you are in absolute control of what happens and you are absolutely sure your code doesn't just run on into empty flash. |
H: Is my understanding correct in selecting ADC resolution? (Noise analysis)
I have posted a similar question before: ADC resolution, considering DSP. And finally I think I know the answer. Could you please have a check on it?
Here is the set up:
The input signal of the ADC has a noise floor with noise density of \$ 5\times10^{-4} V/ \sqrt{Hz}\$ already.
The input signal has been amplified to full scale of ADC.
The ADC has a range of 3V with 12 bits.
The sampling rate will be 10,000Hz.
Is it correct to say that:
The quantization noise RMS of the ADC will be \$ {q\over\sqrt{12}
}={3V \over {2^{12} \times \sqrt{12}} } ={2.11 \times 10^{-4} V}\$
The noise density created by ADC quantization will be \${{2.11\times 10^{-4}}V\over \sqrt{5,000Hz}} = {{2.984\times 10^{-6}}V/\sqrt{Hz}} \$
The noise density is dominated by ADC input signal noise, instead of ADC quantization noise. Therefore, 12 bit ADC is sufficient in this application.
Edit: What I want to know
Sorry for the confusion. I will try to put "what I really want to know" here:
Lets assume that ADC is perfect and the only enemy will be analog noises.
Under this condition, we are employing very high Q band pass filters in DSP, with bandwidth around 0.01Hz. Therefore the \$ 0.5mV/ \sqrt{Hz} \$ noise becomes 0.05mV rms here and is acceptable for us.
The measurement precision will corresponds to \$ 3V/0.05mV = 2^{16} \$, which has 16 bit resolution.
Now let us come back to the real case. When a 12-bit ADC is to be employed, could the 12-bit resolution be simply treated as quantization noise? If this is the case, 12 bit ADC can also lead to a 16 bit resolution result.
What bothers me is "Can I really get a more precised result than ADC resolution WITHOUT oversampling?"
Thank you very much.
AI: The statement:
The noise density created by ADC quantization will be \${{2.11\times 10^{-4}}V\over \sqrt{10,000Hz}} = {{2.11\times 10^{-6}}V} \$
is incorrect. The analog bandwidth is going to be no more than half the sampling rate. This calculation is not necessary anyway, since you already have the RMS value for this noise.
What you need to do is compute the corresponding RMS value for the analog noise at the ADC input, which is \$5\times10^{-4}\frac{V}{\sqrt{Hz}}\times\sqrt{5000 Hz} = 3.5\times10^{-2}V\$. It will be less if you can band-limit the input signal to something less than the Nyquist bandwidth.
But this gives you a worst-case scenario. It basically says that you have roughly a 100:1 (40 dB) SNR (relative to a full-scale signal) at the ADC input, which would suggest that anything over about 7 bits will be enough.
To address the broader issues you raise: The real question is what is the probability distribution that each source of noise introduces into the stream of samples. The quantizaiton noise is uniformly distributed, and has a peak-to-peak amplitude that's exactly equal to the step size of the ADC: 3V/4096 = 0.732 mV.
In comparison, the AWGN over a 5000 Hz bandwidth has an RMS value of 35 mV, which means that the peak-to-peak value is going to be less than 140 mV 95% of the time and less than about 210 mV 99.7% of the time. In other words, your digital sample words will have a distribution of ±70 mV/0.732 mV = ±95 counts around the correct value, 95% of the time.
EDIT:
The measurement precision will corresponds to \$ 3V/0.05mV = 2^{16} \$, which has 16 bit resolution.
Be careful — you're comparing a peak-to-peak signal value to an RMS noise value. Your actual peak-to-peak noise value is going to be about 4× the RMS value (95% of the time), so you're really getting about 14 bits of SNR.
Now let us come back to the real case. When a 12-bit ADC is to be employed, could the 12-bit resolution be simply treated as quantization noise? If this is the case, 12 bit ADC can also lead to a 16 bit resolution result.
The 12-bit resolution is quantization noise. And yes, its effects are reduced by subsequent narrow-bandwidth filtering.
What bothers me is "Can I really get a more precised result than ADC resolution WITHOUT oversampling?"
Yes. Narrow-bandwidth filtering is a kind of long-term averaging. And the wide-bandwidth sampling is oversampled with respect to the filter output. Since the signal contains a signficant amount of noise prior to quantization, this noise serves to "dither" (randomize) the signal, which, when combined with narrowband filtering in the digital domain, effectively "hides" the effects of quantization.
It might be a little more obvious if you think about it in terms of a DC signal and a 0.01-Hz lowpass (averaging) filter in the digital domain. The mean output of the filter will be the signal value plus the mean value of the noise. Since the latter is zero, the result will be the signal value. The quantization noise is "swamped out" by the analog noise. In the general case, this applies to any narrowband filter, not just a low-pass filter. |
H: What's wrong with my answer finding the resistance?
This is the question and the solution:
Here's my answer:
My answer was incorrect, though I believe my analysis was correct. Can anyone point my mistake? I hope it's not with the signs.
AI: I think I found it:
The mistake happened in Step 3: it should be:
$$
-(-2) + V_{src} + 2\cdot I = 0 \\
2 -6 + 2\cdot I = 0\\
I = 2\mathrm{A}
$$
Then, step 4:
$$
1 - 2 - I_1 = 0 \\
I_1 = -1\,\mathrm{A}
$$
Then, step 5:
$$
R = \dfrac{U}{I} = \dfrac{-2}{-1} = 2 \,\Omega
$$ |
H: Which is actually an active component?
"An active device or component is something which can provide an infinite energy or non-zero power for an infinite interval"
I learned this definition for an active device in a book, which is valid for capacitor, inductor and batteries (I have evaluated). I was wondering what is a "PN junction", "junctions of a transistor", "OPAMP", "JFET", "MOSFET"? I mean what are the above mentioned devices inside the quotation marks? Are they active devices or passive? If either one then please provide explanation for my understanding.
AI: First, capacitors, resistors and inductors, all they are passive devices. An active device is one that is able to impose the voltage or the current in a given circuit.
That is, an active device (ideal) may be a voltage source which delivers a constant voltage, current whenever required. It can also be a source of current (ideal) that provides a permanent electric current to any power requirement.
OPAMP (operational amplifier), BJT, JFET (transistors), it is called active devices, because of its ability to manipulate and maintain voltage or constant current (within specified operating ranges, unlike the ideal elements).
Here, you can find a more detailed explanation. |
H: Why don't we get shocked when we touch a car?
According to this answer to a question about car batteries:
[...] so the entire chassis is an extension of the minus terminal of the battery.
If this is the case, I would expect that you'd get shocked when you touch something metal on a started vehicle if you're grounded.
I've read that 10mA passing through the heart at a high enough voltage is enough to kill a human, but only if the voltage is high enough (which in the case of most car batteries is only 12V.)
Is the voltage simply too low to produce an electric shock?
AI: You don't get shocked because you're talking about DC with no connection path back to the positive terminal of the battery.
If you touch something metal on the vehicle you're now at the potential of the negative terminal of the battery (or the car's ground voltage). If you're also touching earth ground, then a very slight current will flow to balance out earth ground and car ground. But after that's balanced, there's no difference in potential across you and no current flows.
It's kind of akin to a bird resting on a high voltage power line. They don't get shocked much because there's no completed circuit. |
H: GPS Antenna | When is an Active Antenna really Necessary?
Many vendors provide positioning modules that support active antennas as well as ones that don't. I am using 4 positioning modules out of which 3 of them support active antennas and the other , CC4000 by TI , supports only passive antennas. To be honest I am testing modules for performance, in terms of TTFF for SGEE, CGEE and A-GPS.
Take a look if its necessary.
http://www.u-blox.com/en/gps-modules/pvt-modules/max-m8-series-concurrent-gnss-modules.html
https://www.linxtechnologies.com/en/products/gps-modules/fm-gps-receiver-module
http://www.ti.com/tool/cc4000gpsem
However all three claim to have almost same acquisition gains,about 143 dBi.
But let me make my question general so that it will help more people.
For all 4 positioning modules that claim to have almost same acquisition gains, how would the antenna type (active/passive) effect its performance? I mean with a passive antenna if the module can have a acquisition gain of 143dBi why bother fixing it an active antenna?
Is an active antenna necessary for applications that have really short antenna cables(about 2-3cm)?
If I have gone wrong somewhere, kindly direct me.
AI: Active antennas contain a low noise amplifier and possibly a filter and line driver. It is very important to put the LNA as close to the antenna as possible to get some gain before the cable loss. The trick with GPS is that the signal is extremely small. The GPS signal is actually below the noise floor of the LNA, so adding more gain really does not help at all above mitigating the loss in the cable. What does help is the coding gain in the receiver when it despreads the signal. This does not depend on the receiver as the coding gain is dependent on the design of the code. |
H: How does this PMOS circuit work?
I've been trying to figure out how this PMOS circuit is functioning.
B_VCC is 5V coming from a USB port on the board, while VCC5V is used elsewhere in a regulator to create 3.3V but otherwise does not exist anywhere else. PSELF is effectively grounded as nothing is being plugged into the DC Jack.
When USB is plugged in and nothing is plugged into the DC jack, B_VCC goes to 5V which is understandable but VCC5V goes to 5V as well, which means the transistor must be on. For it to turn on, the conditions are that the PMOS is either in Linear or Saturation.
\$V_{sd}\$=floating-5V ; \$V_{sg}\$ = floating-0V ; \$V_t\$ = -0.8V (from datasheet)
\$V_{sd} < V_{sg} – \vert V_t\vert\$ LINEAR
TRUE
\$V_{sd} > V_{sg} – \vert V_t\vert\$ SATURATION
FALSE
Is it okay to assume that the floating VCC5V is 0V?
Also after VCC5V goes to 5V, then \$V_{sd}=0\$, \$V_{sg}\$=-5V and \$V_t\$ = -0.8V so it would then move to Saturation mode?
AI: The transistor likely contains a parasitic body diode that allows current to flow from the drain to the source even when the transistor is turned off. It's called a parasitic device because you get it for free due to the geometry of how the transisor is constructed. This would raise VCC5V to B_VCC minus a diode drop. However, once BVCC5V raises high enough, the transistor wil turn on and VCC5V will be directly connected to B_VCC.
You will sometimes see PMOS transistors installed 'backwards' to prevent conduction through the body diode, or transistors installed 'back to back'. |
H: What is this SB component on schematics
Is the SB19 component a "jumper" (0-Ohm resistor)? On the board itself, some of these are placed, and some aren't, leading me to believe that's what they are. There aren't any 0's on them, though.
EDIT: I put 0-Ohm resistor in parentheses because some people thought I was asking if it was a jumper or 0-Ohm resistor, when I meant that it could be referred to by one name or the other. My bad on the wording.
AI: It's a solder bridge.
I'm guessing that you're looking at schematic on page 37 of this document:
http://www.st.com/st-web-ui/static/active/en/resource/technical/document/user_manual/DM00039084.pdf
If so, then SB19 is documented in table 4.11 on page 20, under "Solder Bridges". This solder bridge allows you to add/remove the pulldown resistor on the BOOT1 signal. |
H: Why do different colored LEDs interfere with each other when connected in parallel?
My very basic electronics education has taught me that parallel circuits are equivalent to separated circuits. To my surprise, when I was playing around with some electronics I found the following:
Essentially I connected two red and two blue LEDs in parallel. The red ones lit up, but the blue ones didn't. Only when I removed the red LEDs would the blue ones light.
Why is this?
AI: The red LED has a much lower voltage drop for a given current. In that way, the red ones light but the rest don't achieve their voltage necessary to light.
Red LEDs have a voltage drop of about 1.8V.
Blue LEDs have a voltage drop of about 3V.
You can see more colors and their corresponding voltage drop here in this table: http://en.wikipedia.org/wiki/Light-emitting_diode#Colors_and_materials
To solve this issue, you need a separate current limiting resistor for each led.
You could think about it as if you were putting two different zener diodes in parallel. If you have a 2 volt zener and a 5 volt zener, the 2 volt zener will reach it's voltage and prevent the 5 volt zener from ever passing any current. |
H: Determining Voltage and DC/AC from Wiring Diagram for Spark Door Buzzer
I'm looking to use my Spark Core to control my door buzzer in my apartment. I'd like to identify the correct parts I need to build the required circuit, but this seems to be dependent on the voltage and current type that the buzzer system uses. I have been referencing this question: to try and identify the proper relay and transistor needed. Here is the schematic for my buzzer system (My apartment unit has model 3404 inside it with LISTEN, TALK, and DOOR buttons):
http://www.leedan.com/Pacific_AF-1000_Diagram.jpg
According to this similar example, I need to find a relay with a coil voltage equal to that of the door buzzer system. Also, as the Spark core provides 3.3 VDC, I believe I would need to amplify this using a transistor. From the schematic, can you help me identify what the voltage and type the system uses, and also what types of relay and transistor I would need for the circuit?
Many thanks!
AI: simulate this circuit – Schematic created using CircuitLab
As noted in comments, the transistor can be any general purpose switching transistor. The transistor must be able to handle the current necessary to activate the relay coil. The relay coil must be able to be switched on by 3.3V. The relay must be capable of switching a 16 VAC load and be able to handle 0.625 Amps.
Note that the AC ground likely won't be connected to the Spark Core's ground because there shouldn't be a need and it could cause issues if you hook things up wrong.
A high signal from the Spark Core will activate the relay and activate the Buzzer. A low signal would block current in Q1 which would prevent RLY1 from activating which would prevent the buzzer from activating. |
H: Using a digital signal to turn on and off a vibrating motor
I'm designing a circuit with the IOIO-OTG board and a vibrating motor. The idea would be to have a digital pin on the IOIO board control the state of the motor (either ON or OFF).
The motor operates from 2.5 to 3.8 volts and the IOIO-OTG ports provide a 3.3 or 5V digital output (up to 5V if you use a drain circuit).
My current understanding is that I should be able to do something like this:
IOIO port @3.3V -> resistor -> motor @3V -> ground on IOIO
However, from what I'm reading, I should use a transistor and have the digital pin connect to its base. I remember from my electrical engineering classes that a BJT can be used as such a switch. However, I have a few questions regarding this:
What is wrong with my original implementation above? I assume it has to do with the safety of the board.
Is the proper implementation one with a transistor?
Are there any best practices I should be observing to protect the motor and the board for my little project?
AI: Whether you need a transistor buffer or not will depend on the current capability of the IOIO-OTG board, and the current requirements of your motor.
A quick look through some of the IOIO_OTG documentation didn't reveal any IO current spec, but a photo of the board just shows one chip - presumably the PIC microcontroller, so I would assume the board can only safely drive a 20 mA load. I would expect any motor to require more than 20 mA so you will almost certainly need a transistor buffer to control it. |
H: Average Cycles Per Instruction
We have two different computers with the same instruction set. There are three classes of instructions (A, B, and C) in the instruction set.
Computer M1 has a clock rate of 80 MHz and Computer M2 has a clock rate of 100 MHz. The average number of cycles for each instruction class and their frequencies (for a typical program) are as follows:
Instruction Class Machine M1 Cycles/Instruction Class Machine M2 Cycles/Instruction Class Frequency
Class M1 Cycles/Instrctn Class M2 Cycles/Instrctn Class Frequency
A 1 2 60%
B 2 3 30%
C 4 4 10%
Calculate the average CPI for each machine, M1 and M2.
My initial hunch would be to just do something like M1: .6*1+.3*2+.1*4 = 1.6/3=.53 average for M1 but that makes no sense.
AI: You had it correct right up to the point where you divided. Since you've already multiplied the values by the weights, no further math needs to be performed and the final result is 1.6. |
H: PIC USB host and device
I have been designing PIC based systems for several years, but this will be the first time that I am involved in a project based on USB communication. I don't exactly know where to start but I have been searching around the internet for a few days for "PIC USB tutorials". Unfortunately I could not see any information for my situation.
I need to design a system which will have "only one USB port" to connect to PC (in order to pass some logging information to PC) and also a "USB flash memory" to save some data. Of course, these connections can not be created at the same time since there is only one slot. But my system should sense which is connected and behave in a proper way. Is it possible to create a system like this? What kind of electrical designations should I consider? And some guidance links for a starter will be appreciated.
AI: As long as the PIC you are using has an "On-The-Go" port (for instance, all PIC32 chips with USB are On-The-Go) then what you are proposing is feasible.
The USB port provides a pin called "USBID". On USB Micro AB ports there are 5 pins. Pin 4 is the USBID pin (between D+ and GND) and is used by the chip to know if it's supposed to act as a host:
An OTG dual role device supports both USB host and device functionality. OTG dual role devices
use a micro-AB receptacle. This allows a micro-A or a micro-B plug to be attached. Both the
micro-A and micro-B plugs have an additional pin, the ID pin, to signify which plug type was con-
nected. The plug type connected to the receptacle determines the default role of the host or
device. An OTG device will perform the role of a host when a micro-A plug is detected. When a
micro-B plug is detected, the role of a USB device is performed.
-- PIC32 Manual section 27
Making a fully OTG system though is quite an involved and specialized process, and unless you already know both host and device modes intimately I wouldn't be inclined to attempt it. Instead I'd separate out the two different roles into separate connections. Dedicating the USB to the USB Memory device simplifies the code massively. Routing the PC communications through a USB serial chip, such as an FT232R, PL2303, or MCP2200, for example, means you can then just use the simple UART device to do all PC communications. Time to market is reduced as you don't have to learn all about USB OTG, and it also gives you the advantage that you can have the USB MSD plugged in at the same time as the PC connection is active. |
H: Bypassing a switching regulator
I am trying to design a power supply for a 3.3 V / max. 340 mA system.
It should provide the possibility for 5 V-12 V input as well as directly providing 3.3 V. Even though it is not intended to connect both input voltages, the system should not break down in that case (at least it should work again, as soon as only one supply is connected).
My first attempt is using Schottky-Diodes, but this would result in 2.9 V output voltage and not 3.3 V:
simulate this circuit – Schematic created using CircuitLab
Any idea?
AI: In this situation you would typically design an active switching solution.
First you nominate a primary supply - the supply that is the preferred one. Normally this would be the higher powered supply, so your switching regulator.
If that supply is working, then the secondary supply should be isolated. If it's not working, then the secondary supply should be enabled.
The trick here is to use a component backwards - a P-channel MOSFET. Connect it in series with the 3.3V input in such a way that its parasitic diode conducts. This provides a lower (~3V) "trigger" voltage. You then use that to power an op-amp, which works as a comparator. The input (5-12V) voltage is then monitored through a resistive divider to ensure it is above a suitable threshold by the op-amp. If the input voltage is below that threshold then the output of the op-amp enables the P-channel MOSFET, which then causes its parasitic diode to be bypassed by the main channel, thus reducing the voltage drop to near 0.
It's basically how boards like the Arduino UNO etc handle multiple power sources and yet get the full 5V from the USB power input:
Your equivalent would have USBVCC as your 3.3V input, and +5V would be your intended 3.3V running voltage. |
H: Energy harvesting from AC wire
I'm designing a home automation module and finding a way to supply power.
Is it possible to harvest energy from existing AC wire using step-up current transformer?
Also I can only find step-down current transformer for current sensing, where can I get step-up transformer? (Or it's not feasible?)
simulate this circuit – Schematic created using CircuitLab
AI: A conventional current transformer will do what you want.
As Jim Dearden says, you probably do not need or want a current step up transformer as voltage will be reduced AND the device will interfere with normal circuit action.
As shown below, if you use a conventional current transformer and feed the main circuit via a single turn "winding" on the core, then you will get an output voltage at lower current. Terminate the winding with a resistor and then use the voltage across the resistor as an energy source. The single turn usually consists of a conductor passed through the core laminations. This circuit produces voltage proportional to load current - so at low currents the voltage may be too low to be useful with a regulator. Replace the regulator with an "energy harvester" if you want to use a very wide range of voltages. If you remove R_CT_LOAD and place a minimum load on the regulator output it will work at low currents but Vin may rise to high values for heavy mains load. A dynamic load scheme could be 'easily enough' devised so that Vout was acceptable under most mains-load conditions.
simulate this circuit – Schematic created using CircuitLab
R_CT_Load OR a consistent minimum output load on the regulator is absolutely essential at all times. The resistor value is based on manufacturer's data for the CT used and is designed to give a target V when target current flows in the input single turn.
Note that with any current transformer, if you run it unloaded Vout can rise to very high values and may destroy the transformer or connected circuitry. |
H: Ideal LC Tank Circuit
It is true that connecting an Inductor (L) and a capacitor (C) in parallel provides oscillation? If so, where do you take the output from?
Theoretically it is explained that once we connect L and C in parallel, we assume one of them has some initial energy either in form of voltage (in case of C) or in form of current (in case of L). Then the one initially having energy starts providing it to the one which is bereft of it and as soon as the energy provider element is deprived of its energy, the one which has gained the energy starts providing the energy to the previous provider.
Theoretically that seems ok but where are oscillations in practice? I mean if I have to take the output (i.e the oscillations), where would I connect the load? (assume an ideal tank circuit)
AI: (assume an ideal tank circuit)
Even within the context of ideal circuit theory, if one connects a load, e.g., a resistor, to an LC circuit, one no longer has an ideal LC circuit but rather, an ideal RLC circuit.
For an ideal RLC circuit, any initial energy stored will be dissipated by the resistor; the oscillations decay exponentially with time. |
H: EAGLE: Delete internal layers
I'm doing a Layout and I have some problems deleting an internal layer. As you can see in the pictures below I have 4 layers (1, 2, 15, 16). But somehow I also have a layer called Route 3 (3).
I get the error:
Can't delete internal layers`
as soon as I try to remove the layer in the display window.
How can I remove layer 3?
AI: Ok, I tried a bit and found a tricky solution. I just added layer 3 to the layer setup ( [2:(1+(2*3*15)+16):15] ) and deleted it afterwards ( [2:(1+(2*15)+16):15] ). |
H: Why is the RC value of a demodulator near the geometric mean of the period of carrier and message signal?
The figure below is a AM demodulator. My instructor told me to chose RC so as to satisfy the following inequality :
Tc << RC << Tm
Where Tc is the period of the carrier wave and Tm is the period of the message signal. I found that RC should be the geometric mean of Tc and Tm.
Why is this true? Why is the best value near the geometric mean?
AI: The general idea is that you want to recover the modulating signal with as little distortion as possible. There are two sources of distortion: the "contamination" by the remnants of the carrier signal, and the amplitude and phase changes introduced by the R-C filter itself. The minimum overall distortion occurs when these two effects are approximately equal.
I'll leave it to you to demonstrate that this occurs when the R-C cutoff frequency is approximately equal to the geometric mean of the carrier and modulating frequencies.
In practice, the amplitude changes caused by the filter are not really all that important, so it generally makes sense to set the R-C cutoff value to some small multiple of the baseband signal's bandwidth, regardless of the carrier frequency. |
H: Update ATmega168 program with serial
I'm working with an ATmega168 with a Linux based board (TI DM365). The ATmgea168 communicates with the TI over UART.
The Atmel is programmed using AVRMKII and is running fine. I was wondering if there was way to utilize the UART lines and program the Atmel from a Linux environment?
Right now the UART is set up to receive basic (single char) commands from the TI in interrupt routines and echo out the results. I suppose I need to modify this to make the programming over UART work.
EDIT: (should have noticed this earlier)
The atmel is actually controlling the power to all the devices, including the TI. So if I try to reprogram the atmel while the system is up and running, the TI will definitely lose power. So, with a set up like this, it will be very difficult to reprogram the atmel. But any ideas or suggestions would be great.
AI: Arduino's 'bootload' their programs themselves via a USB-to-serial interface.
So, if you loaded an Arduino ATmega168 bootloader (there are several to choose from), it would do exactly what you want.
This Arduino Bootloader page explains how to do it, and gives links to bootloader source code.
Remember, there are several different ATmega's used in Arduino' so be sure to get the ATmega168 version.
An ATmega88/168/328 has two Flash memory sections called 'Read-While-Write' (RWW) and 'No Read-While-Write' (NRWW). They are described in Section "27.4 Read-While-Write and No Read-While-Write Flash Sections" of the ATmega48/88/168/328 manual.
The difference between the two Flash sections is an ATmega88/168/328 can run a program in NRWW at the same time as programming RWW Flash. However, the Atmega CPU is halted when NRWW Flash is being programmed, i.e. it will not run any program while NRWW in being programmed. So NRWW Flash memory can only be programmed using an external programmer.
Further, the manual warns against trying to read RWW Flash while it is being programmed, for example the CPU must not try to execute a program from RWW Flash while RWW Flash is being programmed:
During an on- going programming, the software must ensure that the RWW
section never is being read. If the user software is trying to read
code that is located inside the RWW section (i.e., by a call/jmp/lpm
or an interrupt) during programming, the software might end up in an
unknown state.
It continues to explain that interrupts should either be disabled, or be handled within the same NRWW section as the bootloader. So, the existing UART code, and bootloader code will need to be combined, and the combination must be contained completely within the NRWW section, or it won't reliably work to reprogram the 'application' in RWW Flash,
Also ATmega has its Flash memory partitioned into two areas which can protected using fuse bits, independently of the other, from being accidentally overwritten. It might be worth using this feature to protect the UART interrupt routine and bootloader from accidental damage.
The problem of loading code is not solved by an in-Flash bootloader alone. You will also need a program on the host PC to upload the program. Many ATmega tool chains, including the Arduino IDE, use avrdude. If you install that, and follow the documentation, avrdude will upload to an Arduino bootloader.
The good thing about this approach is you can install the Arduino IDE on a machine, and test the entire process using a toolchain which is known to work, and supports ATmega168. So it should be relatively straightforward to get it working.
Edit:
There is also a AVR bootloader project called kavr which claims to be only 512bytes. I have no experience of it. |
H: What is this circuit symbol?
Does anyone know what this circuit symbol is? My guess is that it's a surge protector but I'm not sure
Context
AI: According to Edraw: Standard Process Flow Diagram Symbols and Their Usage, it is the symbol for a pump. |
H: What methods are used to protect floating devices against ESD
In conventional circuits you'd like to divert your strike to ground and through a path that diverts the current safely to a grounded chassis or output. That is not possible in hand held devices for example, i'd like to know what methods are chosen for these kind of floating hand held or otherwise devices. Do we prefer dumping charges into our ground plane or the power plane for an example?.
Hints on material related to this for further reading also appreciated.
AI: I dump the ESD into the ground plane. Most application notes for surge suppressors, TVS or similar do this.
Some sources:
Semtech pdf on ESD
Cooper pdf on ESD
Infineon inf on ESD |
H: Why do LCD Screens ripple through cameras?
I noticed that when taking pictures of an LCD screen (thank you, laziness to print), that while I look at the LCD screen through the cell phone camera, the screen has both 1) Ripples and 2) Moving waves.
1) You can clearly see in the picture below:
2) You can see them when you look through the camera (try for yourselves) but you cannot take pictures of them. I've noticed two things about this wave:
It follows a certain axis. If you tilt your cell phone horizontally, they will also tilt horizontally.
They move at various speeds. If you slowly move your cell phone closer to the screen, these waves will alter speeds, going very slowly to very fast. The ripples also change dending on the distance, and have different shapes and patterns. This shape appears a lot (I couldn't take a good picture of it)
So my question is: What is going on? What explains all of this? What are these ripples and waves? I'm guessing polarization is probably the phenomenon involved, but I have no clue how.
AI: Have you ever been making a turn in traffic, and thought that all of the cars ahead of you seemed to have the turn indicators in sync? After watching for a moment, you realize some are slipping out of sync, and they begin to look random or chaotic again. If you wait long enough, they'll seem to be in sync once again...
This is related to the concept of a moiré pattern, where regular intervals of one thing seem to alternately line up and then fail to line up with the regular intervals of another thing. The Wikipedia page linked shows some good examples, such as this:
An emergent property (a third pattern) is visible, but in reality there are only two sets of parallel lines at an angle to each other. The combined pattern has alternating areas of white and dark space, because of the particular amount of overlap varies with position on the intersecting lines.
If you take video of someone with a finely striped or plaid shirt, you may notice a similar effect.
What is happening is the pixels of the CCD in the camera are lining up with the subject material unevenly. Sometimes the pixels line up well with light areas of the subject, and other times they "miss" or see dark areas of the subject. The result can create a new, unwanted pattern.
When you take video of an LCD screen, the same thing is happening, but the pixels of the display are alternately lining up and "missing" the sensors in the video camera.
The curved shape happens due to another effect, parallax. If the plane of the CCD is exactly parallel to the plane of the display, the curved shapes should not appear. But if the planes are not exactly parallel, you introduce different frequencies of the regular pattern of pixels (either display or CCD). As that frequency changes, the moire pattern changes its appearance, which results in the curved lines.
There's even more to consider, and that's the frame rate of the video device and the refresh rate of the display, which can add flickering and apparent bright/dark lines that seem to move during the video. It's the same concept, but with a time dimension. |
H: Getting more information about a transformer
I'm trying to figure out more information about a small transformer on a old board that we are reverse engineering, can someone give me some advices about how can we reverse engineer this transformer? Do the numbers on it represent something?
4783
6610741
AI: The numbers aren't going to help you. Remove the unit from the board, and you can probe around with a ohmmeter to figure out what is connected to what and what the DC resistance of each coil is. Then inject a sine wave of a few volts into one of the windings, and measure the open circuit voltage of the other windings to find the turns ratio. Then you can load individual outputs with known resistances to see how the voltage drops to get some idea of impedance.
From context, you can hopefully get some idea of what the transformer is intended to do. From the small size and apparent lack of isolation (although we can't be sure from this picture), it is probably not handling wall power. It could be a audio transformer, or maybe something for a switching power supply, but that is less likely if this was really built in 1983. It seems too big for a pulse transformer.
I'd start with using 1 kHz for the AC test signal and see where that leads. 1 kHz is a good frequency for probing audio transformers. |
H: Trimmer pot to fixed resistor conversion
Sorry for the simplicity of this question but I've been struggling on this circuit for a while.
In the schematic link below you'll see a trimmer pot and I simply want to replace it with one/two fixed resistors.
I'm under the impression it will be two resistor to form a voltage divider, but still struggling to achieve this.
Following the schematic that states the 10k pot should be tuned to ~7.8k how would the circuit be rewritten to include fixed resistors?
http://dlnmh9ip6v2uc.cloudfront.net/datasheets/Kits/UhOh-v11_corrected.pdf
Thanks for any help.
AI: simulate this circuit – Schematic created using CircuitLab
If the bottom part of the pot is 7.8K then the top should be 10K-7.8K = 2.2K.
For the feedback voltage to equal the reference (2.495V), the voltage at the
top of the divider would have to be (10/7.8)*2.495V = 3.20V. |
H: Series capacitor equivalence
I have capacitors of 100uF, 10uF and 1uF; and need a series circuit with these capacitors to form a 0.1uF capacitor, is this possible?
AI: Capacitors associations
Series association
This association gives a lower total capacity than any of its component capacitors. The total capacity, for \$n\$ capacitors is
$$
C_{eq} = \dfrac{1}{\sum\limits_{n}\dfrac{1}{C_n}}
$$
Parallel association
This association gives a greater total capacity than any of its component capacitors. The total capacity, for \$n\$ capacitors is
$$
C_{eq} = \sum\limits_nC_n
$$
So, for your question, the answer is yes. You must connect 10 capacitors of 1\$\mu\$F in series. |
H: CMOS gate logic switching time based on input vectors
My question is regarding CMOS logic gates switching time based on input.
Say I have a NAND gate and my input vectors are:
00 | 1
01 | 1
11 | 0
10 | 1
So, the output is not switching in case of the first 2 vectors and switches for the rest.
I would like to know if the gate will temporarily lose its Logic 1 state and in the process adding to compute time when the input toggles from:
00 ---> 01
I need to know this as I have built a gate level netlist (verilog) simulator which adds to compute time only when the output toggles. I need to know if my approach should look at the input values instead.
AI: @sanjay: A standard CMOS NAND gate has two PMOS devices in parallel to pull the output (to supply) and two series NAND gates to pull the output down (to ground). If either input is zero, then at least one PMOS is on pulling the output up and at least one of the series NMOS FETs is off preventing the output from pulling down.
So the output will not "lose its state." There can be small glitches seen in the output voltage when the one input changes from 0 to 1 due to gate overlap capacitance in the FETs, but any glitches like this should be small enough that they do not cause the next gate or stage to see a change in the NAND output.
Note we don't usually consider a combinational logic gate as having a "state." In digital design, a "state" implies some sort of memory or latched condition as in a flip-flop or latch. |
H: Power, Voltage, Current Supplies
I am confused by the use of these three terms in conjugation with supplies.
I read somewhere that the prime objective of the circuit is to provide power rather than voltage? What exactly does that mean. Isn't \$Power = IV\$? So saying that you're supplying power rather than voltage is another way of saying supplying a large current. If so why not just say so. Why beat around the bush when saying a current supply is far more intuitive than a power supply?
So what does this cryptic sentence mean: "Supplying power to the load." Do they mean a large current or a large voltage?
AI: In general, the term "voltage supply" refers to a constant voltage supply, and "current supply" (or "current driver") refers to a constant current supply. Both are power supplies, they just try to regulate different things.
Typically* "supplying power to the load" means supplying the voltage that the load is rated for, and letting it draw whatever current it wishes or intrinsically does. It doesn't have to be a large voltage or current, but the point is to supply energy, instead of communicating by sending a signal, which usually involves only a tiny current.
*It's also a pretty vague saying that could refer to something different than what I wrote above. |
H: How to determine how much current and or voltage a given circuit "needs"?
My apologies in advance if I make any wrong assumptions. Say you have an outlet that is rated at 120V and 10A. My power adapter for my MacBook says it is rated at 16.5V and 3.65A max. How was it determined that the power adapter needs to provide at most 16.5V and 3.65A? What is the process of actually figuring this out when designing electronics/circuits?
The only thing I have been able to think of so far is that based on the physical properties of a circuit, you can only handle a certain amount of current before burning out which can be figured out empirically. In addition to that maybe the amount of voltage required has to do with power efficiency and driving the max amount of current you can handle.
I understand Ohm's Law and I am not asking about how to calculate anything using it. This is more of a design question when you have a circuit in mind but need to figure out what resistors to apply and what voltage/current you will need to operate correctly.
AI: As you may have gathered from the other responses, this is generally not a trivial exercise.
At the individual component level, each manufacturer publishes a datasheet that lists, among many other things, the max and min supply voltages and the expected current for at least one recommended supply voltage. Add up all the components on the same internal power bus (don't forget passives) and back-calculate the current going into each regulator at the voltage that feeds the regulator. (more datasheets) Add up all of those, back-calculating again through cascaded regulators, until you end up at the power input.
As for the input voltage selection, they may have chosen something just higher than the highest regulated voltage + dropout of that regulator. I suspect though, that a laptop adapter would be just enough to charge the battery and the rest of the computer then runs off the battery terminals, even if there's not actually a battery plugged in.
Most of the time, this process is much more iterative in design than in testing. There may be a total power budget to start with (probably specified in watts), then parts are chosen somewhat by experience to try and add up to less than the budget. If it's over budget, then some of the parts are substituted for more efficient or less capable ones and the total power is calculated again. Once the numbers work out, in many more ways than just power consumption, then it goes to the first prototype.
In some designs, the power budget is a major factor in the design, like an all-day netbook. In others, it's more of an afterthought so long as it can still be cooled adequately, like a high-quality architectural drafting engine that is used both in the office and on a job site.
Of course, this is grossly simplified, but you get the idea. |
H: Why is there heavy oscillation in my capacitor discharge circuit and is there anyway to fix it?
I have the following capacitor discharge circuit:
simulate this circuit – Schematic created using CircuitLab
When solving for the voltage across the primary and secondary inductors, I get the following:
Where in the current setup C = 160 nF, R_L1 = 200 uOhms, L1 = 1 nH, L2 = 2.5 uH, and V0 = 500 V. When I try to simulate this, I am getting intense oscillations in the voltage across the transformer that can vary quite drastically depending upon the values of omega and tau. I've even noticed a certain type of "beating" behavior depending on the value of omega and tau. Here are two results:
Is there a reason for these oscillations? Or did I somehow do my solutions for VL1 and VL2 incorrectly? If indeed the problem is physical (and not mathematical error), then how can I prevent this from happening? The goal of a capacitor discharge circuit is to generate an initial high voltage (~ 25 kV) on the secondary coils. This voltage should sustain briefly and have some type of fall time. I am not an electrical engineer, so I am not too certain if I can add some kind of element in the circuit to prevent these oscillations - maybe a diode of some kind? Any help is highly appreciated!
AI: What you have here is a classic LC tank circuit. This is basically guaranteed to oscillate. Changing the sizes of the inductor and capacitor will change the frequency and adding a resistor will damp the oscillation if it's large enough. It might help if you hang a load off of that transformer so the cap has something to discharge into. Right now, it seems like it discharges into the transformer coil, which then charges the cap right back up in the other direction due to the inductance. If you put a load on the other side of the transformer, more of the energy will end up in the load instead of back in the capacitor. |
H: How do I find the resistance between three terminals?
I'm trying to self-study this problem and I found a bizarre problem with an unusual circuit.
I have never faced this in all the problems that I have solved. What do they mean by finding the equivalent resistance between b and e. I don't even know if this is possible. If you look carefully, you'll see that there is a terminal c between terminal b and e. I have no idea how this could be solved.
AI: Look at the path from b to e: if you go up along the \$5\Omega\$, \$3\Omega\$ and \$4\Omega\$ resistors, up to there you have a total resistance of \$(5+4+3)\Omega=12\Omega\$. This resistance is in parallel to the resistance in the lower path up to that point, which is \$4\Omega\$. Evaluating the parallel connection of these two resistances gives
$$R_1=\frac{12\Omega\cdot 4\Omega}{(12+4)\Omega}=3\Omega$$
To this resistance you have to add the \$12\Omega\$ resistor leading to point e. So you get a total resistance between b and e
$$R=R_1+12\Omega=15\Omega$$ |
H: Use of the GPS 1PPS feature in a system
I'd like to know how synchronization between the GPS unit and any other sensors is done in a typical system. I understand that the 1PPS signal plays an important role.
Could anyone give me a very simple explanation of the 1PPS signals role?
AI: PPS is not a fundamental function of GPS receivers. It is a axillary function that a GPS receiver can provide from it's internal timing systems that are used for actually measuring GPS position.
However, in many contexts, having a very precise local timestamp is highly beneficial. It is these applications where the PPS output is helpful.
Take a example where you have two sensor systems, perhaps a mile or two apart. They're going to have separate local clock oscillators, which will have different drift rates. The PPS signal, referenced to the GPS timestamp, is extremely useful for providing a way to accurately determine timing between the two systems. The GPS system compensates for the transmission time between each receiver and the GPS sattelite, so the PPS signals can be said to occur "simultaneously" to a considerable degree of precision, sometimes greater then the actual time-of-light transit between their positions!
For example, the LEA-6T timing GPS has a RMS time-pulse (e.g. PPS) output accuracy of 30 nanoseconds. Critically, that timing accuracy is position invariant compared to a theoretical global GPS time-base.
Note that this has fun effects like making the effects of the theory of relativity important to measurements. Light travels ~11.8" per nanosecond, but the GPS PPS output has a functionally infinite propagation speed, as all PPS pins theoretically would go high within the error band (~30 nanoseconds), invariant of their physical distance.
This works because the PPS output is not driven by an external pulse, but rather an internal clock that is adjusted to account for distance from the GPS sattelites, so each GPS receiver independently maintains it's own timebase, and the system conspires to make each discrete timebase phase and frequency align with each other.
Edit: You are asking about inertial measurement and navigation systems? If you're asking for the role of a PPS signal in something like a IMU, there isn't one. It's not used, except perhaps for setting the clock of the IMU's output timestamps (if it has timestamps).
To be clear, GPS systems are a critical component of many IMU systems, but the IMU uses the position output of the GPS, not the precision timing output. |
H: Help understanding onboard power supply measurement test connections
I recently came across this circuit for measuring the output of a TPS54620 switching regulator (12V->3.3V). I'm not a power engineer, so I'd like some help understanding the parts in red boxes (presumably used by the power engineer to measure the power supply?)
1) Is this Hirose U.FL coax connection (J4) used for measuring the output ripple and/or noise on the regulated 3.3V output? I think the 49.9 ohm resistor is used to provide a 50-ohm source impedance to match a 50-ohm coax cable, which is presumably terminated via a 50-ohm BNC pass-through (or the 50-ohm setting on a scope). Is 49.9-ohm used instead of 50-ohm to ensure that the resistance is precise to within 0.1-ohm? (just curious why you'd use a 49.9 ohm...)
If the designer was just concerned with ripple/noise, why wouldn't they add a DC blocking capacitor in series before the 49.9 ohm resistor? Since there is no DC blocking, this presents a 100-ohm DC load (49.9-ohm + 50-ohm), which results in a static current draw. For 3.3V output, this is probably ok (3.3V * (3.3V / 100-ohm) = 0.1W), but if the output was 12V, you'd get 12V * (12V / 100-ohm) = 1.44W, which I think is too much power for the 50-ohm input on my scope. Do people normally put some kind of DC block inline with the coax cable? What is the best practice for putting an onboard coax connection like this? What tests is this connection typically used for?
2) I believe R134 (the 10-ohm resistor) is for loop stability measurements (see http://www.tij.co.jp/jp/lit/an/snva364a/snva364a.pdf) TI recommends adding a 20-ohm resistor into the feedback loop of the power supply for bode measurements, and I think the 10-ohm resistor is for the same purpose here. Is this correct? Any other reason for this resistor?
3) Why have another large resistance (R137) in parallel with the upper half of the feedback divider? The TI reference design uses 31.6k/10k resistors in the feedback loop, so 3.16k/1k seem like they should be the correct value without R137. I'm not sure why you'd want this resistor?
AI: Your scope should have a capacitor in series to block DC when making AC measurements. Putting a blocking capacitor in the test circuit would be redundant, and also would prevent you from monitoring the DC voltage (which might be useful for certain tests).
The reason for R133 being 49.9 Ohms instead of 50 Ohms is simply that 49.9 is the nearest value in the E96 1% resistor series.
You are probably right about the purpose of R134.
R137 compensates for the combined resistance of R135 + R134, which would otherwise make the output voltage about 1% too high (it would not be needed if R135 was 3115 Ohms, but that is not a standard value). |
H: PIC resets when motors work
I'm using a PIC18F452 in my project, and L293d for driving motors. I'm using two completely separate power supplies for driving motors and driving the PIC. completely separate two power packs. a 12 v 1A one for driving motors. the circuit diagram is as below:
My problem is when motors work the PIC get reset. when motors are disconnected it works fine and when the motors input voltage is reduced to about 6v also it works fine but with less speed. I have three questions.
When the motor supple is separate how can that voltage affect the MCU to reset?
if I use only one supply (12v battery), and 7805 to regulate and supply 5v to PIC how should I modify the circuit to work properly without resiting? (I used separate supply because this method was unsuccessful first, but my second option also was unsuccessful.)
I want to know whether L293D reduse the current flow and how to prevent it? the motors are enough powerful when I directly power it. but when it is driven from L293 and same power pack they are very poor. (I use 12v motors and when they are directly powered and with load it draws about 460mA )
please help me regarding this issue, I can't solve it myself...
AI: You circuit lacks decoupling capacitors for the microcontroller.
Try adding 100 nF / 1 uF ceramic capacitor as close as possible to each pair of Vdd/Vss pins.
Related question and great answer from Olin: PIC16f877A resets due to external noise |
H: Why should PCB design be mirrored before toner transfer?
I am currently designing a PCB to make with the toner transfer method for the first time. I was reading a guide that said to mirror the image before printing it to the paper. However it seems that the paper should not have a mirror image because when you are designing the board it is like looking through the board onto the other side and in turn drawing directly on the paper. Does the PCB design need to be mirrored to work?
AI: For the toner transfer method, you should reflect the layout of the tracks of the top layer. When designing, the tracks of the top layer, they look like should be on the board. If you print as you see, the transfer will be reflected on the board. For this reason, you must reflect the print of the tracks of the top layer, but not the tracks of the bottom layer. |
H: How to write on SD card smaller than sector size (512 bytes)
I am writing a library for FAT file system management on STM32 for learning purpose.
I want to use a SD/MMC card connected through SPI bus.
I do some tests with a disk image on PC (I emulate disk_read(),disk_write() with fseek(),fread(),fwrite()) to understand FAT principes.
I just finished the SD/MMC protocole implementation and realize i could not read/write block smaller than a sector (512 bytes)
For reading operation is not a problem, i can ignore unused bytes (window concept), but for writing it seems more complicated...
I heard about the principle of 'read-modify-write', so if i understand i need to read the entire sector i want to modify.
For example, if i write into a file, in worst case, i need to :
Read, modify and Write the sector in the file allocation table to update cluster indexes.
Read, modify and Write the sector in the file new allocated cluster.
Read, modify and Write the sector where the file entry reside.
So in this case, i need 3 reads and 3 writes, sounds like a waste of time, , are you confirm this ?
This also implies that in order to write i need a buffer of at least 512 bytes, are you confirm this ?
(I try to read FatFs source code but it's complicated, but it's complicated. I wonder how he manages to write with a smaller than 512 bytes buffer. Can you explain ?)
I think with a cache mecanism i can limit the number of reads (before modify-write) but this implies to increase the amount of RAM used.
Can you help me see it clearer in this 'write (read-modify-write) sector barrier' ?
AI: Read, modify and Write the sector in the file allocation table to update cluster indexes.
You must do that only when the number of clusters for a file changes. A usual cluster size is 32 KB.
Read, modify and Write the sector in the file new allocated cluster.
No, you only have to write the changed data sectors. You could omit the read cycle when you write the data to card in 512 byte steps.
Read, modify and Write the sector where the file entry reside.
Most FAT implementations write this once on file create, and once on file close (to update the size when written to). |
H: Tuning LED circuit so LED turns on at specific voltage
I am attempting to add a signal activity LED to my dummy load box. I have constructed the following circuit and so far it does what it is supposed to (lights an LED with signal applied and does not interfere with overall load impedance). I am now trying to tune the circuit to turn on at appropriate level and not over-current the LED at higher signals. I am using a 3mm red LED with max current of 30mA, which is what I get when the load box sees a 100V peak to peak signal, about the largest signal the load box will see. The LED currently does not turn on until load box sees ~12.6V peak to peak signal, I would like the LED to turn on at ~5V peak to peak. Is there a way to accomplish this while still allowing 100V peak to peak signals without toasting the LED?
This is my current circuit:
simulate this circuit – Schematic created using CircuitLab
If possible the LED would need to come on at ~5V peak to peak and then increase in light intensity up until 100V peak to peak. My main issue as noted is that I'm already nearing the LEDs maximum current (30mA) at 100V peak to peak and the LED does not turn on until ~12.6V peak to peak.
AI: You could return the LED to a fixed negative voltage of (say) -1V to control where it turns on. Or (better) put the LED in a feedback loop so that you get mA out for volts in.
The latter will eliminate the LED 'on' threshold entirely- if that's acceptable (it might glow very slightly with zero input).
Or add an additional resistor to get a threshold, as below:-
simulate this circuit – Schematic created using CircuitLab
The maximum current is set (mostly) by R1 so if the maximum input voltage is 13V,
you'd have a maximum current of about 25mA minus about 0.8mA or about 24mA
Threshold current is set (roughly) by R2 so if the LED starts to come on at around 1.5V, and you want it to light up at about 650mV in you could set R2 to about 2.2K
Edit:
D2 is just to prevent the op-amp from imposing a high negative voltage across the LED if it's presented with a negative voltage at the input. If R2 is not present, even a tiny voltage (or the offset of the op-amp) would be enough to rail the op-amp which would exceed the reverse voltage rating on the LED.
The op-amp drives a constant current proportional to the input voltage through the parallel combination of D1||D2||R2. I = Vin/R1. For positive input voltage we can ignore D2 since it will be reverse biased.
D1 needs about 1.5V before it starts conduct much current (and thus to light). Without R2, the voltage across D1 will rise to whatever is required to get even a tiny current because of the feedback mechanism. R2 provides an alternative path when the current is low so, say at 0.1mA, the voltage across R2 will be only 220mV, so the LED will not light at all. So a minimum current of Vf(min)/R2 is required to get the LED to begin to light significantly. |
H: Combine 9V and 1.5V power supplies to make a 7.5V supply
To save on cost, I wish to buy a 9V DC and a 1.5V DC power supply and connect the positive outputs together to create a 7.5V 200mA supply my Plantronics headset needs. That is, 9 - 1.5 = 7.5 across the two negatives at that point. Problems?
AI: The 1.5V supply will have current trying to flow in reverse through it from the 9V supply. If it were a battery there may be some problems with some technologies but because it's a power supply and more than likely uses a diode bridge, I don't think you'll find one that works: -
simulate this circuit – Schematic created using CircuitLab |
H: Reading corresponding pins from a circuit diagram
I am completely new to Arduino tinkering and am trying to make sense on how to wire a 8x8 LED matrix using the following diagram:
This chart is supposed to correspond to this 8x8 LED, 12x12pin LED matrix:
Now, the question:
The physical led matrix has 12 pins on top, 12 pins on the bottom.
The diagram shows 16 pins on top, 8 pins on the left.
How am I supposed to make sense of this? I highly appreciate an actual answer as opposed to someone pointing to arbitrary articles because reading articles on this is all I've done the past two evenings.
Side-notes:
Yes, this is homework, but we have no book for the course and we haven't learned to read diagrams like this yet.
The components used are: Arduino Uno + MAX7219 + 1588ABEG 8x8 LED Matrix
AI: The first picture you posted is called a schematic diagram and shows how the component is wired logically. It doesn't necessarily show how the pins are physically arranged. It does show where the LEDs are, though.
To make out how the pins are arranged, you need to look at the pin numbers, locate pin 1 and count from there. Be careful when counting from pin 12 to 13 - you must follow a clockwise direction, that is, pin 13 is the one one the upper-left side of your 2nd picture. Pin 24 is the one on the upper-right corner.
So, if you want to use just one color, choose red or green symbol from the legend (green has the LED symbol filled) and pick the pins coming in and out of those LEDs only.
In either case (picking red or green), you'll always have to wire pins 1, 2, 3, 4, 21, 22, 23 and 24 to the positive terminal of your power supply. These are the LED common cathodes. They are called common because they are shared among each pair of red and green LEDs. If you choose to use the red LEDs, you'll also have to wire pins 13 through 20 to your negative supply. On the other hand, if you pick green, you'll wire pins 5 through 12. These are the LED anodes.
In other words, to light up the red LED on the lower-left corner, you must apply voltage (with limited current), to pins 1 (+) and 20 (-). To light up the green LED at the same position, you must apply voltage to pins 1 (+) and 5 (-).
Don't forget to wire a current limiting resistor in series with each LED. |
H: Measuring band-limited noise coming from an amplifier
I have a strain gauge amplifier and from my analysis, it will produce a low level of white noise above approximately 1kHz i.e. the power spectral density is flat above 1kHz.
If I measure the output noise with a reasonably decent meter Agilent 34401A it gives me a reading of around 0.4mV RMS. The meter has a bandwidth that is flat to 300kHz and possibly extends to significantly past 1MHz.
I'm only interested in the noise in the spectrum DC to 50kHz so, I could build a battery powered 8th order low pass filter to measure that noise or maybe (and this is the crux of the question), I could make a single order low pass filter (a resistor and capacitor) and utilize what I know about that filter's equivalent noise bandwidth.
Given that I wish to know the noise over a DC-50kHz bandwidth (and that I expect the noise to be spectrally flat above about 1kHz), does it seem unreasonable to make my simple RC low pass filter have a bandwidth that is: -
\$\dfrac{2}{\pi}\times 50kHz\$ = 31.83kHz
I now the measure the noise with the filter (previously 0.4mV RMS without the filter) and it almost halves - this I like (of course) but am I making some really stupid error to convince myself something is better than it actually is? I'm quite happy to expect a filter of low nth order to have a significantly higher ENB but does this work in reverse?
A link to a reputable source on this would be great.
AI: You're fine, although you will be introducing some errors, but as you point out in a spectrally flat PSD this should be minimal or even ideally zero. In your linked to derivation of noise bandwidth, the implicit assumption is that the noise spectrum is flat. So you are safe.
BTW, there is a EE.SE version of the noise bandwidth question here.
For really detailed analysis I use a Spectrum analyzer (which you may not have) as they are the ultimate low noise instrument available besides just having that handy V vs. Frequency thing going. |
H: Protecting a comparator in a tension measurement device
I am building a device to measure the tension of a conducting wire using an Arduino.
The basic circuit concept consists of two stages:
The wire is placed in a strong magnetic field. Then the Arduino send a 2 seconds saw-tooth pulse going up to 24V through the wire which cause it to vibrate in its fundamental frequency ranging around 60-200 Hz.
Since the wire is now vibrating in a magnetic field, it produces an induced AC EMF with the same vibration frequency. The voltage on the wire is amplified using a comparator which sends a square wave back to the Arduino where the frequency is measured. Calculating the tension from the fundamental frequency is then very simple to do.
A more detailed schematic:
simulate this circuit – Schematic created using CircuitLab
I am looking for a way to protect the 5V comparator from the 24V pulse going through the wire that will not affect my ability to measure the induced voltage later on.
An Ideal solution would be a way to switch the system from the "pulse stage" to the "measure stage", each time disconnecting the unnecessary part of the circuit. I was thinking of achieving that using a MOSFET switch but got it all messed up. I did manage to pull it off with a mechanical relay disconnecting the comparator but I rather find a different solution.
Note that this is an individual device that will not be mass produced, so a solution does not have to be cost efficient.
This is my first circuit I ever design and my first time asking for help on StackExchange so if there is anything unclear please tell and I'll be happy to explain some more.
AI: The MAX913 has a fairly high input bias current (8uA maximum) so it won't tolerate too much series resistance in the input before you start to see significant errors. Even 1000 ohms can cause more than 5mV offset.
A series resistor of maybe 500 ohms and back-to-back (inverse parallel) Schottky diodes (eg. 1N5817) across the input may work for you. Presumably the signal from the wire is less than a couple hundred mV (if not you'll be exceeding the input CM range of the comparator and also you'd get some damping of the wire with this configuration). Add another 100 ohms from the diodes to the input if you feel paranoid. Also a matching resistance of about 500 or 600 ohms respectively from the inverting input to ground to match off the offsets due to bias current.
Edit: We also need to consider the resistance of the wire, so the resistance should be 510 + 100 + 200 ohms in this case, or 810 ohms.
The input bias current of the comparator can be as much as 8uA from each input, but the difference between the two currents is tightly matched.. only 300nA at room temperature typical and 1uA worst case over temperature. That means that if we match the resistance, the offset due to the bias current will only be 0.24mV typical and 0.8mV maximum worst case. Since the comparator itself has an offset of 0.1mV typical and 3mV maximum worst case, it doesn't change things much.
Eg:-
simulate this circuit – Schematic created using CircuitLab |
H: Adjustable charge current from programming resistor for Li-Ion charger - how to change on demand?
I am designing a device which has an integrated Li-Ion battery (single cell, for simple low power portable digital device) and normally charges by way of a buck converter which goes from 12-16V Automotive supply to 5V, then into the single cell linear battery charger. If in the event the battery goes 'flat' and is not desirable to wait and rely on automotive input (inconsistent supply) or during user interaction by for example diagnostics/testing/data logging I need to also power the battery charger IC via the same power bus.
When the buck converter operates, it is intending to charge at up to 1-1.2A if possible during the short times it has energy available. In the normal use case of this device, the buck converter is the primary input to the Li-Ion charger. I will therefore make the standard case for the charge current setting of my charger IC to be 1.2A.
In the case when the USB is connected, it is assumed the device has been removed from the automotive input, but just in case I will have the USB activate the "Shutdown" Pin on my Buck converter IC. The only remaining issue (as far as I can see) is the charger IC attempting to draw 1.2A to charge the battery, from a USB port on a standard computer!
I have come up with a way to have a "normally ON" N-channel MOSFET based switch for a resistor to be in parallel to give me the required R_PROG value for ~1.2A. When USB is plugged in, the buck converter is disabled and the switch which parallels the two resistors is turned "OFF", leaving only the high value resistor and therefore the low (200mA) charge current for safe use with a PC or laptop.
I have attached a picture showing my plan below, which uses a MOSFET, NPN transistor, and 3 resistors to implement my plan. Note the blocking schottky diode D1 for the USB bus to the battery charger input node, that is there for protecting the USB power bus if the buck converter is in operation but the USB bus is not powered/floating, and to make sure the NPN transistor does not then also turn off the MOSFET.
The question is: Is there an easier way that uses less components than my intended N-MOS + NPN + 3 resistors to achieve a context sensitive resistance value for the charger IC, where the resistance is normally low, and when a certain input is connected, the resistance goes higher? This must be done in hardware, for a fast response. Slow responses may attempt to draw too much current for too long.
I am not actually sure if the charger IC can deal with an adjustable resistance like this on its PROG pin, as it may just sample the resistor initially and lock in the charge current setting until power-off. Any thoughts on that part too? The charger is MCP73113/4. Thanks for any insights guys/girls!
AI: I searched for "Li-Ion battery charger dual current".
It looks like ICs are designed for exactly this task, e.g. ISL9221.
Or much of the task, e.g. LTC4077
And finally LM3658 which can be preset to 100mA or 500mA for USB.
They adjust the battery charging current when when one source is disconnected (they assume a high current wall outlet is on one), and assume the other is USB, where the default current is 100mA.
I think disabling the buck converter when USB is detected may be optional for the ISL9221, but might still be needed for the LTC4077. |
H: Is there a good physical model for what happens when a light bulb suddenly goes out?
Sometimes a light bulb just stops working and goes dark for seemingly no reason. Can Dirac δ impulse to a light bulb serve as a mathematical model for what happens so we can assume that the electric current for the light bulb or the component itself had a sudden spike that caused the light bulb to go dark? Is there some other good explanation or should we assume that the component fails randomly in time according to a Poisson distribution if we want to model electronic circuitry's reason for failing?
AI: Incandescent bulbs fail because the filament wears out and gets too thin, and then breaks. DC filaments also suffer from uneven wear called "notching".
Since the filament gets thin and brittle over time, it tends to fail when mechanically shocked ( for example at turn-on when the resistance is low).
There is a distribution of lifetime that is an exponential function of filament voltage. You can find models in some of the old GE literature if you look. Here's another article which covers some aspects of your question. |
H: Magnet that needs power to turn off? Inverse coil?
I have never heard of such thing. But it would really suit my needs.
I'm inventing a device and during it's operation, it should be able to catch an iron object any time (with a permanent magnet). The device should be mobile, so using inductor would really reduce the time of operation.
But the device must also be able to turn the field off, so that the objects can drop down.
I only could think of one concept: Put inductor behind a permanent magnet in a way that when the inductor is turned on, it's field will negate the permanent field of the magnet.
As you see it's my attempt to draw a coil connected to permanent magnet (isolator is in-between). When the coil goes on, it should produce field of oposite direction to the field created by magnet.
Is this possible? Is there a better trick?
AI: Your need is well served by an "Electro permanent magnet"
This Wikipedia link has a good summary description but no useful material, but a web search under that term will find a large amount of related material.
Wikipedia text at end of this post.
Images link below gives many examples.
Useful explanation of a variant
This Kickstarter project gives a good practical idea.
This ROBOT Pebbles page uses EPMs to hold the pebbles together. Construction details given. They say -
The top view of an electropermanent (EP) magnet used for latching, communication, and power transfer. Each EP magnet assembly is composed of two pole pieces (a,b) which sandwich cylindrical Alnico (c) and NdFeB (d) magnets. The entire assembly is wrapped with 80 turns of #40 AWG wire (e) and held together using epoxy (f) (which makes the Alnico magnet appear larger than its NdFeB counterpart).
DIY Drones EPM cargo gripper.
One version:
The EPM688-5 is designed to hold a cargo of 1kg securely and switch on and off effectively with low power consumption. 800mA at 5V for 3S or 3.4J per cycle.
Under the capacitor discharge condition pull either S_on or S_off high Via RC channel 7 or 8 for 3 seconds and then low. The capacitor is fully charged and the device is ready to cycle. Pulling either S_on or S_off high via Via RC channal 7 or 8, causes the magnetic field to move either in the on or off state.
The complete device will have a mass of about 50 grams, and is capable of holding a mass of 7kg in optimal conditions, in practice it should securely hold 1kg of cargo on a quad.
These linked images provide a large number of ideas.
Wikipedia says:
An electropermanent magnet is a type of magnet which consists of both an electromagnet and a dual material permanent magnet, in which the magnetic field produced by the electromagnet is used to change the magnetization of the permanent magnet. The permanent magnet consists of magnetically hard and soft materials, of which only the soft material can have its magnetization changed. When the magnetically soft and hard materials have opposite magnetizations the magnet has no net field, and when they are aligned the magnet displays magnetic behaviour.
They allow creating controllable permanent magnets where the magnetic effect can be maintained without requiring a continuous supply of electrical energy. For these reasons, electropermanent magnets are essential components of the research studies aiming to build programmable magnets that can give rise to self-building structures.[2][3] |
H: Setting the absolute potential of an isolated DC power supply
I have a circuit that, for reasons out of my control, is powered by an bipolar +/-4V supply. This circuit includes instrumentation amplifiers and so forth that have input headroom requirements of over 1V.
I use an isolated DC/DC converter to produce a floating 5V supply from +4V/0. Now, I'd like to be able to reference the mid-voltage of this floating supply (2.5V) to the circuits ground, so that the 5V output actually looks like a +/-2.5V supply from the circuit's ground. The device running off the 5V supply is only going to send analog signals back into the main circuit, and that into high-impedance inputs.
How can I do this sort of biasing? All the currents involved are low, but precision is important to me. I'd like to avoid ground loops and the like as far as possible.
AI: Conceptually, you could do something like this:
simulate this circuit – Schematic created using CircuitLab
In reality, depending on the op-amp type and the value and positions of bypass capacitors on the supplies, you'd have to take some precautions to keep the op-amp from oscillating, most likely.
Since the output voltage of the op-amp is nominally 1.5V above the negative rail, pick an op-amp that can sink or source all necessary current at that voltage with some margin. If there is significant bypassing on the supplies, either pick an op-amp that has enough phase margin with a heavy capacitive load or decouple the output with a smallish resistor and establish an AC feedback path. |
H: What is the rate at which a mobile/cell phone listens for an incoming call or a text in standby mode?
As I understand, a mobile/cell phone, in the standby mode, listens to some kind of circular buffer in its memory for acquired packets from the antenna to check if there's something that regards installed SIM card. What is the rate at which the CPU fetches and checks the packets if there's anything (an incoming call, a text message) that's been sent for the installed SIM card?
AI: In most cellular systems the receiver in the handset (mobile, phone, etc.) goes into a low power "discontinuous receive" mode when not actively in a call. It wakes up about once per second and listens to a control channel from the base station it's currently associated with. The operations inside the handset occur at whatever the CPU clock rate is, on the order 26MHz, 38.4MHz,... or higher. The timing at the radio side of the system is fixed to certain symbol rates, but once messages are received the internal processor can operate as quickly as it is capable of (and designed to operate).
If there is an SMS (text) message or a call for the handset then it can be delivered in one of the base station control channel time slots. Since it's a synchronous system, the timing is really governed by the design of the cellular system rather than the handset.
What level of detail are you interested in? Once the message is received, it's up to the phone software to alert you that a message has been received, and that's dependent on what else the phone is doing (schedule priorities, interrupt rate, etdc.). |
H: Ohm's Law and in-series components
I am doing some practice problems based on what I learned today in lecture. However, I am stuck on this problem:
A 10Ω resistor is in series with a bulb and a 12V source.
a. If 8V is across the bulb, what is across the resistor?
b. What is the current in the circuit?
c. What is the resistance of the bulb?
Where would I begin solving what voltage is across the resistor? I do not the current, nor do I have the means to find it (that I can see), thus I can not find what voltage is dropped. I am not sure if I can assume the bulb has no resistance, in which case I can solve the problem easily.
AI: You need to use KVL around the loop:
simulate this circuit – Schematic created using CircuitLab
KVL says that the sum of the voltages around the loop equals 0. That means that if there is a 12V increase traveling from the negative to the positive terminal of the voltage source, then the voltage must fall by 12V traveling through the bulb and resistor.
The current in the loop can be found using Ohm's Law and from the voltage \$V\$ across the \$10\Omega\$ resistor you found in part (a).
The resistance of the bulb can then be found using Ohm's Law again: you are given the fact that 8V is across the bulb and from part (b) you know the current through it. Solve for the resistance \$R\$. |
H: Formula for voltage drop vs PCB trace width, temperature, current, and trace length
I need to find out the voltage drop in the PCB traces with respect to the possible factors like: copper thickness, trace length, trace width, temperature, etc.
I found some calculators available at:
http://www.leiton.de/leiton-tools-pcb-voltage-drop.html
http://www.eeweb.com/toolbox/external-pcb-trace-max-current
http://easycalculation.com/physics/classical-physics/circuit-trace.php
Since all the calculators are providing different values for same input, I am not sure which calculator is giving the correct value. Is there any formula so I can calculate the voltage drop in the PCB traces?
AI: I'm going to have a stab at some maths :)
The DC resistance of a conductor - any conductor - is calculated as:
\$R_{DC} = \frac{{\rho}l}{A}\$
Where \$\rho\$ is the resistivity of the conductor in \$\Omega/m\$, \$l\$ is the length in meters, and \$A\$ is the cross-sectional area in m².
The thickness of 1oz copper is \$0.000034798m\$. Say you have a 3mm (or 0.003m) wide trace. The cross-sectional area is (approximately, assuming a perfectly rectilinear cross-section) \$0.000034798 × 0.003 = 0.000000104m^2\$. Resistivity of copper is \$1.68×10^{−8}\$ at 20C, and your trace is 100mm long (0.1m).
\$R_{DC} = \frac{1.68×10^{−8} × 0.1}{0.000000104} = 0.016153846\Omega\$ at 20C.
Ok, now for the tricky bit. The temperature co-efficient (\$\alpha\$) for copper is 0.003862.
\$R(T) = R(T_o)(1+\alpha{\Delta}T)\$
So for a temperature of 30C we have a \${\Delta}T\$ of 10C, or 10K (30 - 20 = 10, K = C + 272.15).
So \$R(30) = R(20)(1+0.003862×10) = 0.016153846×1.03862 = 0.016777708\Omega\$
So now solve Ohm's Law for voltage. Say you have 100mA flowing through the trace. That's \$V=RI\$, so \$0.016777708×0.1 = 0.001677771\$ or \$1.678mV\$ dropped across the trace at 30C.
Who says you need online calculators?
(Now, it's been about 20 years since I did this kind of thing at college, so I may be completely wrong ;) ) |
H: Question about CMOS Inverter Oscillator
Using CMOS inverter with crystal and cpacitors, we can make a oscillator. And i find many docs mention the method 'negative resistance'. But, they are not all the same.
The method from TI's doc: Use of the CMOS Unbuffered Inverter in Oscillator Circuits, it separate the circuit as below:
The method from ST's doc: Oscillator design guide for ST microcontrollers, it separate the circuit as below:
Beside the differences above, there are some other differences:
TI's method use the voltage gain of the inverter, ST's method use the \$g_{m}\$ of the inverter.
TI's method has some limitations on \$R_{f}\$'s value, but in ST's doc, it only say \$R_{f}\$ is used to bias the inverter, but it seems it has no clear 'limitation' on \$R_{f}\$'s value.
I'm a bit confused, what's the 'source' of the differences?
AI: Diverger - I think some confusion can arise because there are always two different ways to explain the functioning of oscillator circuits (models). Normally, we discriminate between two-pole and four-pole oscillators - however, it is important to know that this is nothing else than a different way to describe the oscillation principle.
a) Two-pole oscillators can be described using the concept of negative resistances, and
b) Four-pole oscillators are described using the classical feedback loop (in conjunction with Barkhausen`s criterion).
For most oscillator topologies it is not a problem to explain the working principle using both models (after suitable redrawing and/or change of the common ground). As mentioned in both application notes, the basis for the shown oscillator is the Pierce topology, which very often is considered as a two-pole type (but not necessarily).
Regarding your question "gain vs. transconductance": The CMOS inverter has a relatively large output resistance so that it makes sense to use the corresponding transconductance gm for gain calculation. In this respect, of course the connected load is important (in both notes there is an external resistor Rext, which is NOT shown in your drawings!). Thus: voltage gain=gm*load resistance.
Regarding the role of Rf: This resistor is necessary to fix the wanted DC operational point (bias point) of the analog CMOS amplifier. In addition, this resistor attenuates the resonant loop and, thus, influences the total loop gain. For this reason there is a recommended/preferred range of values which ensures safe start of oscillations - and this range somewhat depends on the oscillation frequency because the total resistance of the crystal feedback loop depends on frequencies. |
H: Free spice Model to simulate integrated circuits design
I am using ltspice and I would like to simulate integrated full custom circuits for educational purpose.
I found the NMOS4 and PMOS4 models but there are not enough since there are too ideal there is i.e. no Early Effect.
Are there any possibilities to get a free spice model which includes the basic effects of the FETs and in which I can modify width and length like in the NMOS4 and PMOS4 models?
AI: If you're just looking for a rough model, then there are two sources of IC models that are free and readily available. The first is ASU's Predictive Technology Models, which allow you to download models that should be representative of a particular process node. These models let you go way down in feature size (e.g. 7nm), but they are predictions of what that process node looks like. The newer models use BSIM4, and I'm not sure if that is supported with LTSpice. The other is the post-run SPICE measured date provided by MOSIS on some processes. This will give you measured parameters for an actual IC run, but it is only available on some of their older(est) processes. |
H: Converting PWM to bipolar square wave?
Is it possible to make bi-polar square signal from PWM signal?
Im talking about 40 kHz frequency and 0.5v /-0.5v peak to peak signal.
The PWM dose is %50. And the PWM frequency is 40 kHz too. The PWM is generated with an Atmel MCU with no extra parts. The MCU digital pins are rated at 5V.
AI: You can use a circuit like:
simulate this circuit – Schematic created using CircuitLab
where \$V_{ref}\$ is the level below GND that shifts the signal. For example, if the PWM signal is 1V amplitude, with \$V_{ref}\$ = 0.5V you get a square signal \$\pm\$0.5 V.
Of course, you can add a circuit for limiting or attenuating the output of the operational amplifier. The slew rate of this device is not too critical for the frequency of 40 k, and easily find such devices on the market.
Attention
The scheme I present is only a guideline for implementation. You must take into account the gain levels of OPAMP (adjusted with external components), or if you use a comparator, the levels of signal excursion, according to the power supply. |
H: Decoupling pair of microphones using noisy power source
I currently have a high quality microphone that I am powering from a relatively noisy 8V source, like that shown below. It has a built-in amplifier, and doesn't require any amplification. It just needs power and a bypass capacitor in place, and it handles the rest.
In order to resolve the noisy power supply, I temporarily removed it, and power the circuit off of a 9V battery for now, which has resolved a fair amount of the noise issue. Now I have a new problem: I need to power two of these microphones off of the power supply, and I'm now encountering cross talk.
So, ultimately I am trying to decouple the microphones by balancing the circuit by halving the resistance of the biasing capacitors, and placing a second resistor of the same value in series with the mic between MIC- and GND. Additionally, I'm putting some Schottky diodes in place in hopes they will also help block cross talk. Finally, I'm just putting a simple LDO voltage regulator (8VDC) at the power source, and following it with a large bypass capacitor to further aid in power source noise rejection. Will this circuit work, or does anybody have suggestions for improvements or different approaches to resolving this issue?
Thanks!
AI: D4 and D5 won't do you any good.
Put the series resistors back where they were to start with (undo the split.)
You had the right idea with the regulator and the large capacitor. You shouldn't need more than a regulated and filtered supply.
Be sure to follow the datasheet recommendations for decoupling capacitors around the regulator. Many regulators can oscillate of they aren't properly bypassed.
If you have a problem with crosstalk, then I would use two regulators - one for each microphone.
Cheaper would be to split the series resistor (2*340) but keep the two in series to Vcc - but put a capactor from them to ground (from where the two 340ohm resitors are tied together.) That may mess up the frequency response, though. Two regulators is your best bet. |
H: Transmitting HDMI/DVI over an FPGA with no support for TMDS
I'm hoping to be able to output HDMI/DVI-D for my next FGPA project but my FPGA doesn't have native support for TMDS outputs. The FPGA is a Spartan 3E and I believe it only has support for LVDS differential signalling.
I read a lot online about differential signalling and I have a general idea of how it works but I am confused about the different standards. I have also gone through the specifications for HDMI but it's very dry and seems to presume a certain familiarity with these concepts beforehand which I don't have.
For example, what exactly is TMDS vs LDVS? Is TMDS just an encoding scheme run over LVDS? Are TMDS and LVDS just standards for differential signalling but with different electrical characteristics? The absence of search results for LVDS to TMDS converter chips suggests my understanding is broken here.
In a practical sense, I am wondering if I can simply wire an HDMI breakout board directly to the input pins of my FPGA, configure those pins to the LVDS IO standard and expect it to work (given that the software side is written correctly). Some websites imply that I can but it seems that their FPGAs all have built in TMDS drivers where mine doesn't. Other sites say that I need TMDS support but then go onto say that LVDS works too. Wikipedia seems to suggest that LVDS is being phased out as a standard for transmitting data over DVI or HDMI.
Can anybody help me clear up any misunderstanding on how all this works?
AI: Good questions. I have been researching this topic myself recently, and will try to provide some brief answers here.
what exactly is TMDS vs LDVS?
LVDS (low-voltage differential signaling) is simply an electrical specification for a differential signaling interface, while TMDS (transition-minimized differential signaling) is both an electrical specification AND a specific 8b/10b encoding scheme. Unfortunately, the electrical specifications are not directly compatible, although there are various ways to "adapt" one to the other under certain circumstances.
Electrically, LVDS uses totem-pole drivers and differential termination (100-120Ω), while TMDS uses CML (current-mode logic) open-collector drivers and individual 50Ω terminations to +3.3V. The Spartan-3E IOBs do not directly support CML.
Then there's the question of TMDS coding. The Spartan-3E IOBs have support for DDR, with data rates up to 628 Mb/s, but no dedicated high-speed SERDES logic. You would have to do the TMDS encoding and decoding in the FPGA fabric, using the DDR support in the IOBs to get the final bitstreams. This would limit you to pixel rates of 62.8 Mp/s or less.
In a practical sense, I am wondering if I can simply wire an HDMI breakout board directly to the input pins of my FPGA, configure those pins to the LVDS IO standard and expect it to work
No, not on the input side, at least not without some effort to terminate the TMDS properly and then AC-couple it with proper bias to the LVDS receivers on the FPGA (all of this while maintaining an accurate 100Ω differential impedance). Note that the sample projects you link to are all output-only examples. Driving DVI/HDMI from an LVDS output seems to be much more forgiving; they don't seem to have added any bias or termination resistors to their PCBs.
Your best bet would be to use external DVI/HDMI input and output chips, and make the connection to the FPGA via their parallel buses. I have used Analog Devices parts in the past. |
H: Do they make triangle-shaped headers?
I've been working with some PIR sensors from Panasonic, and I was wondering if there are any types of female headers/connectors that I could use to wire the three pins of the sensor without directly soldering wires to the connector. I've been looking, but I haven't been able to find any types of connectors which would fit.
Off the top of your head, are there any types of connectors which could be used to easily wire this?
If it helps, the sensor fits into a standard breadboard as in the image below:
For some more information, here's a link to the digikey part (MFG P/N:)
http://www.digikey.com/product-detail/en/AMN41121/255-1808-ND/735391
And here is a link to the datasheet. All sensors have the same pins at the bottom:
http://www3.panasonic.biz/ac/e_download/control/sensor/human/catalog/bltn_eng_mp.pdf
Thanks!
AI: TE Connectivity's 8058-1G23 is a PCB-mount TO-5 socket that should either fit the sensor or be very, very close. The -1G29 is the same but with solder pockets instead. |
H: Given a load, how do you calculate whether it is capacitive or inductive?
If the impedance at the load has the form of \$Z = R + jX\$, where \$R\$ and \$X\$ are positive real numbers, then then network is called inductive. If \$Z = R - jX\$, then the network is called capacitive.
Why is this the case and what do we do when there is both capacitance and inductance present at the load (i.e. \$RLC\$ network)?
AI: A capacitance \$C\$ has impedance
$$Z_{C} = \frac{1}{j\omega C}$$
But note that
$$\frac{1}{j} = -j$$
so equivalently
$$Z_{C} = -j\frac{1}{\omega C}$$
A capacitor's impedance therefore has a negative imaginary part.
An inductor \$L\$ has impedance
$$Z_{L} = j\omega L$$
and therefore has a positive imaginary part.
So if the load has a positive imaginary part then it behaves more like an inductor, and if it has a negative imaginary part then it behaves more like a capacitor.
If both inductors and capacitors are present then simply find the equivalent impedance of the load network. If the imaginary part of the equivalent impedance is positive then the load is inductive, if it is negative then it is capacitive, and if it is zero then it is resistive. An inductive load network has an overall higher impedance as the frequency increases even if there are capacitor(s) in the network, and a capacitive load network has an overall lower impedance as the frequency increases even if there are inductor(s) in the network.
It can be important to distinguish between the two cases in order to understand the frequency response of a circuit. For example, if a voltage amplifier has an inductive load then the amplifier will perform better at higher frequencies where the load has a higher impedance (the ideal load for a voltage amplifier is infinite in order to maximize the voltage gain). However, if the voltage amplifier's load is capacitive then it will perform better at lower frequencies since the load will then have a higher impedance at lower frequencies. |
H: Image Sensor sensitivity
I am not sure what really the term "sensitivity" means when characterizing image sensors, so I will describe what I am looking for in the sensor at the following conditions:
the exposure time is very short
the intensity if light is very low
Therefore, I need a sensor that will allow me to "see" very dim light at short exposure times. To compare the sensors (assuming equal spectral responses, exposure times), I decided that the most sensitive one will be the one that will "see" the dimmest light.
EDIT:
One problem is that different manufacturers provide different information/specs for their product, so it is difficult to compare them and choose the best one for application. I took one example and tried to calculate it's minimum amount that must reach the pixel before it can be detected. Please, correct me if I am wrong:
I use "Output due to dark current" and "Conversion Gain" values to determine how many electrons converted from light are needed to reach the threshold above which they will become "detected": 6mV/3.4uV/e = 1765 electrons.
I find conversion efficiency at a desired wavelength (let it be 700nm): Given that the QE(675nm) is 60%, I find that at the 700nm QE=60% * 0.87 = 52.2%
Thus, the minimum amount of photons that must strike the pixel before they become detected is 1765e/.522e/ph= 3381 photons
Now, I wish to compare this sensor to S11639, however, there is not information to calculate the number of photons as in the first example:
- The amount of electrons needed is: 0.4mV/25uV/e= 16 electrons! That is 110x less than for the first sensor. Now, there is no QE plot for this sensor. The only thing I can do is assume that at 700nm it has a low QE value, say 20%. But even with this bad QE value the number of photons needed to reach detectable range is 16e/.2e/ph= 80 photons - muuuch less than in the first case. Thus is it right to assume that the second sensor is much more suitable for my application with very low light intensities and exposure times because it needs less photons to reach the detection threshold? Are my calculations correct? Anything that I am missing?
AI: For your conditions what is the most important factors will be NEE (Noise Equivalent Exposure, QE = Quantum efficiency).
The ratio \$\dfrac{SEE}{NEE}\$ is your Dynamic Range (DR) where SEE = saturation Equivalent Exposure.
You need to understand what is meant by exposure, this is the integral of the photon flux over time. In other words the # of photons collected in a time period.
Unfortunately, most sensor manufacturers Quote NEE and SEE in electrons (after the conversion of Photons to carriers - here electrons) rather than actual photons so you will need to bring in the QE to calculate the actual light levels. These numbers are often implied with a saturation level being quoted, in that case the QE is implied.
In your low light high speed application you need a sensor with as small a NEE as possible, and you will need to see in the data-sheet some mention of CDS (Correlated Double Sampling) or kTC noise removal.
After update with datasheet: *****
Using nominal Vsat with conversion gain:
\$FW = \dfrac{V_{sat}}{G_{conversion}}=\dfrac{2.7}{3.4*10^{-6}} [\dfrac{V}{\dfrac{V}{e^{-}}}] = 274,118 [e^{-}]\$ FW= Full Well
This is close enough to the 800 \$ke^{-}\$ in the data-sheet. SO the SEE = 800 \$ke^{-}\$.
Dynamic range is 71 dB which is 3548:1.
\$ NEE = \dfrac{800,000}{3548}=225 [e^-]\$
Using your dark current calculation of 1765 electrons being generated in 1 second, the noise associated with that is:
\$ \sqrt{1765} = 42 [e^-] \$
Ideally the dark current contributes a variable baseline with temperature and the noise associated with that baseline shift is the shot noise of the leakage current.
The dark shot noise and the amplifier noise being independent of each other add in quadrature:
\$ Noise_{total} = \sqrt{225^2 + 42^2} = 229[e^-]\$
Using your QE calculation from above, the NEE is \$ \dfrac{229}{0.522} = 439 \gamma\$
You can do the same with the Hamamatsu S11639.
However, you still cannot directly compare the two because you have omitted an very important datapoint. What is the area of a pixel?
What is important is that to compare these two sensors in the same conditions. You need to understand the irradiance required to meet NEE, which has units of \$\dfrac[W][m^2]\$ but \$\dfrac{\gamma}{m^2}\$ is comparable if you are using a single wavelength. Here \$\gamma\$ means photons.
Your next step in the comparison is look at the optical setup, f/#, resolution etc. |
H: Can avrdude address individual usbtiny programmers?
I'm envisioning a panel programming jig. In my mind, it consists of a Raspberry Pi, a powered USB hub, and a collection of usbtiny clones each connected to a pogo jig and a target on a panel.
The only question I haven't yet worked out is, when invoking avrdude, I can use -c to tell it to use usbtiny... but how can I tell it which usbtiny I want it to use? The plan is to use a script to go through them all one at a time, and IMHO just attaching a bunch of programmers is easier than trying to come up with a bolt-on to multiplex the SPI bus from one programmer to all the targets.
AI: Multiple USBasp or USBtinyISP devices can be identified by their connection information. From the AVRDUDE manual, appendix B, "Troubleshooting":
Problem: Multiple USBasp or USBtinyISP programmers connected simultaneously are not found.
Solution: The USBtinyISP code supports distinguishing multiple programmers based on their bus:device connection tuple that describes their place in the USB hierarchy on a specific host. This tuple can be added to the -P usb option, similar to adding a serial number on other USB-based programmers.
The actual naming convention for the bus and device names is operating-system dependant; AVRDUDE will print out what it found on the bus when running it with (at least) one -v option. By specifying a string that cannot match any existing device (for example, -P usb:xxx), the scan will list all possible candidate devices found on the bus.
Examples:
avrdude -c usbtiny -p atmega8 -P usb:003:025 (Linux)
avrdude -c usbtiny -p atmega8 -P usb:/dev/usb:/dev/ugen1.3 (FreeBSD 8+)
avrdude -c usbtiny -p atmega8 \
-P usb:bus-0:\\.\libusb0-0001--0x1781-0x0c9f (Windows) |
H: Automatically switching from 9V battery to DC wall adapter on insertion
I have a simple circuit that runs off of a 9V battery. I'm re-designing it so that it can also run off of an external 12V DC source (ie: a wall adapter). I want to design the circuit so that if both the battery and the wall adapter are connected simultaneously, the wall adapter is used, and the battery is effectively disconnected from the circuit.
I've found a few circuits online that might work, but they unfortunately might allow a trickle of current into the battery, and since it could be a non-rechargeable (ie: alkaline) cell, this could be disastrous.
I've considered the using a barrel jack with a normally-closed three-terminal contact configuration, but I'm not quite sure how to start. How would I go about designing such a circuit?
AI: The NC (normally closed) terminals (2 & 3 in the sheet) must connect the battery. When you plug in the adapter, this terminals opens. Try to determine on which pin (in addition to pin 1) the adapter connects (i can't determine the number from the sheet).
Edit: The battery connects between pins 1 & 2.
simulate this circuit – Schematic created using CircuitLab |
H: Low battery level circuit - Changing "trigger" level
I am re-creating a simple low-battery level circuit that turns on a low-power LED to indicate that the battery needs to be changed. The circuit is shown below.
There are two things I would like to change on this circuit.
The cutoff voltage is approximately 6.9V. Based on my initial analysis, all I need to do to change this is to swap out the zener diode. The cutoff voltage is the sume of Vz (the zener knee voltage) and the 0.7V drop across the diode, Vd. So, if I want to have the cutoff be sooner during the discharge cycle (ie: 7.5V), my assumption is that I just need to swap out the 6.2V Zener diode with a 6.8V Zener diode. Is this assumption correct? Do any of the resistor values need to change?
I want to remove the green LED from the circuit, and the left-most Bc547 NPN BJT, and just have a "low battery" indicator. How do I reduce the existing circuit to just this?
AI: You should also change the 10k resistor to limit the maximum current flowing through the zener diode (increase the value if using lower voltage zener). For 6.8 V zener, the current will get smaller so the 10k resistor is ok.
You can replace it with a resistor. 1 k or more should work. |
H: Low noise voltage regulation
I have a circuit which currently runs off of either a 12VDC wall wart adapter, or it falls back to a 9V battery if the wall wart adapter is not connected. My circuit currently uses a chip which requires a clean 8VDC source in order to run.
Right now, I just have an 8V LDO regulator burning off the excess power as heat, but I've just realized that my 9V cells can drop as low as 7.8, and still have 50% capacity (mAh) remaining, and my LDO requires that the supply power be at least 0.2V greater than the output voltage, or it just shuts off.
What would be the best approach to constantly having an 8V low-noise output assuming a potential input voltage swinging between 7V and 12V? My initial guess would be to use a flyback or buck-boost switching transformer, which could handle the input swing being so large and the undesired circumstances where Vi < Vo.
However, I can't seem to find any 8V fixed output buck-boost regulators. Also, one thing that has me confused is that both fixed-output and variable-output regulators both require external components (diode, capacitor, inductor). Why do both require external components?
AI: What would be the best approach to constantly having an 8V low-noise output assuming a potential input voltage swinging between 7V and 12V? My initial guess would be to use a flyback or buck-boost switching transformer
It's a good approach. A buck-boost regulator can be implemented in a small area with a minimum component count (no isolation).
both fixed-output and variable-output regulators both require external components (diode, capacitor, inductor). Why do both require external components?
The reason is that components such as capacitors and inductors occupy too much volume when they are integrated into an IC. For this reason, they are left as external components. |
H: What happened when I join two different materials?
It is noob question cause I am noob, but if I have two different materials with different amount of electrons and I join them (just in hand if you know what I mean), why there is no electric current? They should try to balance the electrical potential or?
AI: There is no electric current because there is no potential pushing charges around one way or the other. When you touch two conductors, such as metals, the electrons that can normally hop between atoms of each material can now hop between atoms between the materials. As before, at the macro level no current flows because there is no potential that is pushing the electrons in any particular net direction. |
H: Wheel speed from Shimano dyamo hub using arduino
I'm trying to figure out a way to extrapolate wheel speed from the Dynamo hub I just purchased. I outputs 6V 3W AC, and I would like to potentially measure it using an arduino if possible, I' assuming I would have to measure the sinewave somehow. Any ideas?
AI: The dynamo usually outputs a simple full sine-wave, this means you can just measure the frequency by looking only at the positive peaks, by rectifying the power and then feeding the raw AC voltage with a sufficiently large resistor and a single diode to an I/O pin.
You may want to add an extra zener diode from the I/O pin to ground at 4.7V or 5.1V, to protect from transients. An extra capacitor on the I/O pin could help to catch some transient noise.
If Arduino still uses Atmels and they support the Analog Comparator, you could use an I/O pin that uses that to create even more noise immunity. Compare the signal with 1.1V reference and you'll get very little noise. As such:
EDIT1: Added a pull-down resistor to the schematics to make sure it fully turns off
simulate this circuit – Schematic created using CircuitLab
EDIT3: Added the capacitor I mentioned, but forgot to draw.
If they use an Atmel capable of Input Capture in their board design you can do the same with an external transistor on the input capture module to decode the signal frequency with maximum hardware support.
simulate this circuit
EDIT2:
Then, of course, finish the exercise with some exercises, to determine the number of pulses per wheel rotation. |
H: How to make valid harness port when generate sub-sheet from vhdl
I have an VHDL file (a block) with huge count of the different port that can't combined into the one bus because they have different names. These signals will be further connected to different parts of the circuit. I want to "create sheet symbol from HDL" but Altium add each signal separately (not in harness). I'll try to make sheet symbol manually and add port with the right (predefined) harness type. But in the result Altium doesn't understand that VHDL signals included in harness that placed in the "sheet symbol" (green block). How can I link VHDL signals with the harness?
P.S. All signals in VHDL block named with similar prefix e.g. HARN_SIGN_*
AI: It sounds like you have no connectivity between your VHDL design and your manually created sheet symbol.
The issue here sounds like that VHDL doesn't have 'signal harness' 'pins' (ports). While you can have a port that's a composite (record) type, all it's elements are required to have the same mode (in, out, inout). Array type have the same name and mode.
Altium appears not to have a mechanism to associate the underlying VHDL design represented by a sheet symbol you create with a signal harness pin - it doesn't match your VHDL entity declaration.
You could overcome this by using Altium's generated symbol in a sub sheet represented by your new symbol with any nets connected from the VHDL generated symbol to signal harnesses, also allowing a name change from the connected nets.
This represents a 'mapping' from the underlying VHDL model represented by Altium's generated symbol to a new symbol with signal harness pins.
Back in the day when schematic editors had textual representations for their schematics and symbols (or could at least import them) we'd write tools to generate portions of schematics and symbols representing this sort of thing, to save the manual work.
addendum
The file formats Altium uses are Microsoft Compound Document File Format, and appear to be readily reverse engineering eligible with access to Altium's tools to make simple files used to correlate size and length accuracy (units). It should be possible to programmatically generate information that's so onerous to enter by hand. It wouldn't be a small task, but appears manageable.
There are lots of potential pitfalls, if I recall correctly The geometry used for schematics and schematic symbols (inherited from Protel) is fixed precision, that infers a maximum symbol size, not to mention sheet drawing outline. You'd likely have to break really large FPGA symbols into sub elements.
I recall in ViewDraw breaking the rules and generating a table format, with pin boxes, short wires with signal names, essentially making really big symbols equivalents of component centric net list views. I doubt if Altium's formats are so forgiving.
You could also look for formats that Altium can import. Cadence's Allegro tools have easy symbol and net list formats, although I'd suspect Altium wold want to import .brd files themselves.
It turns out Altuim imports a myriad of foreign design file formats including the Allegro ASCII brd file format (See Importing and Exporting Design Files ). Somewhere I have the Allegro Training Manuals describing file formats, it used to be common as I said to manipulate design files with other tools. |
H: Reliable connectors for digital sensors
I have designed a data collection device which is mounted on a moving vehicle. Is there any recommended connectors that can survive high vibrations for digital sensors?
AI: Delphi Connection Systems has some great products that are designed for automotive applications and some are waterproof. Mouser carries them. Eg. their Weather-pak series. They're used for pressure sensors and such like.
You can also use military-style circular connectors or M8, and some of the Lemo connectors are very good. |
H: Calculating DC Brushless Motor Position
I am using a brush-less motor in one of my projects and I need a decent method of sensing the motor position so I know what coils to turn on and off. I looked a bit into sensing Back-EMF, but I did not find anything that would suit my needs. I thought about a method to monitor the current so when the magnets finish moving toward the active coil, there should be a spike in current being drawn since the magnet is no longer running around the coil and is no longer acting as a generator.
I am using an Arduino, so is there any way I would be able to sense this spike in current? Is there a better method (excluding Hall Effect Sensors) then the one I just described? Would my method allow for the motor to function properly?
Thanks
AI: The most reliable way for phase controlling the windings on DC Brushless motors is to use Hall Effect Sensors. Most of your better industrial motors come with these built right into the motor.
Your desire to avoid Hall Effect Sensors is an attempt at bucking against a proven reliable scheme. The schemes that you have mentioned thinking are are fraught with problems of noise, signal tolerances and current/voltage level changes with speed/temperature/load of the motor. |
H: Monostable and Astable 555 Timer
To begin with, I must say this is kind of a "homework" but I tried to do it on my own and I haven't succeed maybe someone can help me out with this matter.
We're learning about digital systems, circuits and so on. Therefore, our next laboratoy is going to be about Monostable and Astable circuits (Using the timer 555). Being proactive I decided to have a look to the topic before having the class so I would understand better, the video showed the following circuit (which is a Monostable):
It was made in the software Circuit Wizard and I understood what are their differences and how those circuit work. However, when I tried to do it by myself I couldn't. The only little difference is that I used Circuit Maker and the elements seem to be different from the others used in the video. Here's what I got:
I hope you can see the unseen to make it work. I keep getting a message which says "the selected elements may not work in this simulation mode", is there a special "simulation mode" for this circuit? Thanks in advance.
AI: 1) Your LED current limiting resistors should be 300 ohms instead of 330k ohms.
2) DIS should be connected to THR, not to TRG.
3) VS1 should be a voltmeter, not a voltage source.
4) The connection to the junction of R4 and C1 should be made at the dot.
5) There needs to be 0.1µF between U1 pins 1 and 8. (Real World)
6) Why is the battery a MOSFET? |
H: What are similarities between RTC DS1374 and RTC DS1307
I mostly work in software and not good in reading Hardware data sheets.
I need help in understanding the similarities between RTC DS1374 and RTC DS1307,From below link I could make out that both share the same address on I2C bus and have same set of registers but still few doubts would like to ask.
http://spellfoundry.com/arduino/ds1374-rtc-arduino-library-2/
1) Do both DS1307 and DS1374 have exactly same copy of register set?
2). Do both stores times as year-month-day-hours-minutes-seconds?
3). Do both have have their registers mapped to NVRAM of equal size?
How much DS1307 code can be reused on DS1374?
Any comment would be useful.
Thanks.
AI: These two parts are dissimilar in many many ways.
The block diagrams alone tell much of the story.
DS1374
DS1307
Similarities are limited to the basic functionality of the I/O pins:
X1
X2
VCC
VBACKUP
GND
SCL
SDA
SQW
Internally the parts diverge greatly.
The '1374 simply uses a 32-bit counter to keep track of the passage of seconds. The software that reads the counter has to translate the count into the normal clock date/time components. On the other hand the '1307 keeps track of the individual date/time components as BCD (binary coded decimal) values in individual registers.
Beyond the basic RTC features the '1374 offers a 24-bit counter that can serve as a WDT (watch dog timer) with an interrupt output and a reset output.
On the other hand the '1307 offers 56 bytes of battery backed up RAM for user data.
In a simple nutshell - you cannot use common software to support these two parts. The register maps are completely different. |
H: Setup Time, Hold Time - What is the underlying principle for having them?
I'm learning about setup time and hold time of a FF connected to a bus. But the textbook fails to explain exactly why are those needed in an operation. Isn't a FF always powered on and attentive to bus signal changes? How does turning on the clock signal dozens nanoseconds later after the signal went live on the bus help the FF capture it reliably? Does the FF actually sample a continuous segment of signal on the bus, instead of just one instant?(Or is it a difference between theory and reality). If yes, how does that work in reality?
Thanks.
AI: You're forgetting a couple of important facts:
A flip-flop isn't a single atomic gate, but made up of multiple gates.
It takes time for a signal to pass through a gate (or propagate).
There is no such thing as a pure square wave.
Take this diagram of a transparent latch:
Assume each gate requires one "time unit" to propagate the signal.
The D signal arrives at the input to one NAND gate at \$T_0\$. It also arrives at the NOT gate at \$T_0\$. It then leaves the NOT gate and arrives at the second (lower) NAND gate at \$T_1\$. So the shortest time before the CLK signal can have any effect on the input NAND gates will be \$T_1\$ since that is when the D signal has propagated to them. SO then the output of those NAND gates will be propagated as stable at \$T_1\$ for the upper one, and \$T_2\$ for the lower one. Then it's on to the next two NAND gates. Those again add 1 time unit to each of the signals. On top of that, the outputs of those then feed back into each other's inputs, so as they change they propagate a new signal through themselves, each adding another time unit.
Only when the outputs have stopped sorting themselves out will the gate be "stable", and that is when it's in the "hold" state. It could be many time units.
Then of course you have the "square" wave, which is far from square. Each change from low-to-high or high-to-low takes time. Only once a signal passes a certain threshold will it be seen as either high or low. Different factors affect how long those transitions take, including the gate capacitance of the MOSFETs in the logic gate, the actual switching time of the MOSFETs, etc.
So you can see there is a certain amount of time taken for a flip-flop to change from one state to another, and at different points during that time different things happen with the gate. |
H: Splitting DC power supply risk?
I am looking into taking the power supply 12V output of my PrintrBot and plugging a very simple parallel circuit with some LEDs.
I know I can connect a parallel circuit similar to this Splitting a power supply between two circuits. And it would be particularly easy if they use the same voltage.
I also know that I could put 4 3V LEDs in series without a resistor (or add a resistor if the LEDs are rated for less voltage), and they should work properly with a 12V input... and I believe my power supply has enough juice for this (it is a 6A power supply).
My question is:
How to minimize the risks to my printrbot circuit? (I guess there is always a risk that an issue in my LED circuit would affect my printrbot circuit).
While a 4 LEDs in series circuit sounds like the most simple circuit in the world, I know little about electronics (and my experience is very limited). For instance, I am concerned that things like a short in my LED circuit would ruin my PrintrBot circuit or that a LED getting burnt while the printrbot is printing would cause an issue.
Note: I know some people powers the LEDs out of the BED port in the board, but that's too risky for me.
UPDATE after getting answers (2014-09-28).
As explained in the 3 answers so far, some of the asumptions related to the LEDs made by me in the question above are plain wrong. Please read the answers below and do not let my asumptions mislead you.
AI: You need resistors to limit the current. This circuit should meet your needs:
simulate this circuit – Schematic created using CircuitLab
The resistors limit the current through each pair of LEDs to about 15 mA. The total current draw can be easily handled by your 6A supply. Provided you construct the circuit correctly, there will be no risk to your printrbot circuit. |
H: How to calculate current going through an LED
I'm a beginner to electronics. I want to find out how to calculate the current in the following circuit. (I know how to calculate total resister value in serial and parallel resisters in order to calculate the current, but is it possible to calculate without knowing the resister value of LED?)
simulate this circuit – Schematic created using CircuitLab
AI: You can use another technique that uses just circuit observation. For a simple circuit like this, I think it's easier than Thevenin.
The LED has a characteristic forward voltage, Vf. It varies with current, but the resistance in this circuit will keep the drop across the LED very close to the reported value in the datasheet. Let's use Vf = 2V for convenience.
Since the LED is parallel to R1, the voltage across R1 is also Vf. That must mean the drop across R2 is what's left over:
$$V_{R2} = 5V-V_f = 5V-2V=3V$$
Using Ohm's Law on R2:
$$I_{R2}=V_{R2}/100=30ma$$
Since R2 is in series with the source, that 30ma is the total current going into the circuit and is being split between R1 and the LED. We can figure out how much is going through R1 using Ohm's again.
$$I_{R1} = V_f/75= 2V/75 = 26.67ma$$
There's only 30ma going through the whole circuit and 26.67ma of it is going through the resistor. Therefore, only 3.3ma is left to go through the LED:
$$I_{LED} = 30ma - 26.67ma = 3.3ma$$ |
H: My voltage multiplier (cockroft-walton) will not charge my capacitor bank past 150v. How can I fix this?
I got 5 free 450v 4700uf capacitors that I put in parallel to form a 23500uf 450v capacitor bank (2.4kJ) in hopes of building a can crusher and later a railgun. I built a voltage tripler from four 350v 10uf capacitors and 4 400v 6A diodes. It outputs 500v (which is okay because the capacitors have a surge of 550v), but the capacitor bank still won't charge past 150v. I assume this is because the charger is not outputting enough current to compensate for the capacitors' leak rate. When I try to test how much current it is outputting with my multimeter, the first capacitor in the charger dies, so I don't have any way to measure the current (and my scope maxes out at 400v).
Is there a simple fix for this? Or am I better off using a different charger design? What other charger designs could I use? Thanks.
AI: I'm going to do a little bit of copying and pasting from Wikipedia which as we all know is the fount of all knowledge:
In practice, the CW has a number of drawbacks. As the number of stages is increased, the voltages of the higher stages begin to "sag", primarily due to the electrical impedance of the capacitors in the lower stages. And, when supplying an output current, the voltage ripple rapidly increases as the number of stages is increased. For these reasons, CW multipliers with large number of stages are used only where relatively low output current is required.
So yes, you can expect it to not provide much current, and maybe the capacitors are trying to draw too much which is making the output sag too much (and the ripple become a real problem). The article goes on to say:
These effects can be partially compensated by increasing the capacitance in the lower stages, by increasing the frequency of the input power and by using an AC power source with a square or triangular shaped waveform.
Another thing it says is:
The biggest advantage of such circuits is that the voltage across each stage of the cascade is equal to only twice the peak input voltage in a half wave rectifier. In a full wave rectifier it is three times the input voltage.
So switching to a full-wave design instead of a half-wave design would reduce the number of stages for the same output voltage, and thus should also allow an increased current.
(Wikipedia, we worship you :) ) |
H: Replace potentiometer with digital version (Speakers)
I am trying to get my PC speakers to be controlled by my arduino. I've taken apart the control and it seems very straight forward, just need a few questions about subbing the manual pots for digital ones.
Volume circuit looks like this (R/L for right and left channels)
R Aux -> Pot Leg 1 -> Out Pot Leg 3 -> R Audio Out
L Aux -> Pot Leg 2 -> Out Pot Leg 4 -> L Audio Out
All other POT contacts are grounded and it's a B10K pot.
Why are these split by channel? Isn't a standard 3 terminal pot the same? Or is it to keep the audio in R and L channel's seperate?
Is there any weird issue I'll run into subbing out this pot for a digital one? Or would another 4/6 contact digital 10K pot do just fine? Are their power requirements (voltage/heat dissipation) i need to watch out for?
Thank you! Just learning speaker wiring.
AI: You ought to consider that the volume pot is logarithmic and this might mean that the digipot's resolution needs to be quite high to get a non granular change in volume when you control it. |
H: Apple iPod 30pin to micro usb
Not sure if this is off topic. I have an old ipod dock with a 30 pin male connect and I want to switch it out to a male micro usb. So that I can use the dock. I don't want to use an adapter as I want it to look natural.
I was simply going to rewire old connector to the micro usb.
Ipod Dock pinouts
I have found the pinouts for both.
http://pinouts.ru/PortableDevices/ipod_pinout.shtml
Micro usb.
http://pinouts.ru/PortableDevices/mini-USB_pinout.shtml
It looks like I can simply connect up the 16, 23, 25 and 27 on the ipod connector to 4, 3,2,1 respectively on the micro usb side.
Just wanna make sure before I do anything.
AI: You can do that, since it's USB which is standard protocol.
But you can't use speaker because dock's speaker is connected to pin 3 & 4.
If you want to use it, you can solder an audio cable to pin 2, 3 & 4. |
H: Understanding Transistors
I'm relatively new to electronics and I'm trying to understand how to use transistors, but I seem to be misunderstanding something.
I'm trying to implement a transistor switch as described in Electronic Formulas, Symbols & Circuits on p 118. The diagram above is based on my understanding of how the circuit should look if I want the LED on when the switch is high.
Based on my understanding of the first diagram, and the diagram shown in the book, I think this second schematic should turn the LED on when the switch is low. But I also see a basic LED driver with the battery, resistor and led, which seems odd to me. When I actually wire this up on a breadboard, I see that the LED is on for either position of the switch, and that it's actually brighter when I turn the switch on high.
Do these schematics actually function as I believe they should thus I am failing to implement it correctly, or am I misunderstanding something fundamental?
EDIT
The resistors should read 1K in the diagrams, not 100.
AI: There are many errors in the diagrams. How you connect these transistor, is called Common Emitter, and is one of the three ways in which you can connect a transistor.
For common emitter configuration, it is usually considered that the load is connected in the collector circuit. To light a led, the basic circuit would be:
simulate this circuit – Schematic created using CircuitLab
When the source \$V_b\$ is applied, the LED ligths on.
The LED is connected in the output circuit. The LKV for this:
$$
V_{CC} = I_C\,R_C + V_{D1} + V_{CEsat}
$$
For example, if \$V_{D1} = 1.2\,\mathrm{V}\$ (like common red LED), \$V_{CEsat}= 0.8\,\mathrm{V}\$ (Collector-emmiter saturation voltage) and \$V_{CC}=9\,\mathrm{V}\$
$$
I_C\,R_C = 7\,\mathrm{V}
$$
for a common red LED, we can suppose 15 mA, then
$$
R_C = \dfrac{7\,\mathrm{V}}{15\,\mathrm{mA}} = 466.66\,\Omega\approx 470\,\Omega
$$
The input circuit is on the base terminal. For a current collector of 15 mA and a factor \$h_{FE}=100\$ (typical)
$$
I_B = \dfrac{I_C}{h_{FE}} = \dfrac{15\,\mathrm{mA}}{100} = 150\,\mu\mathrm{A}
$$
If \$V_b = 3.3\,\mathrm{V}\$ (typical for a \$\mu\$C) and \$V_{BE}=0.7\,\mathrm{V}\$ (Base-emmiter voltage for a silicon transistor, typical)
$$
R_{b} = \dfrac{V_b - V_{BE}}{I_B} = \dfrac{3.3 - 0.7}{150\times 10^{-6}} = 17.333\,k\Omega\approx 18\,k\Omega
$$ |
H: Is it possible to control many microcontrollers using a single microcontroller/microprocessor?
I am presently working on Home Automation Projects, having no of home appliances. I would like to know the ways that I can control many micro-controllers using a central micro-controller/micro-processor(wired/wireless)?
AI: Attention - this answer is not correct.
I2C is a protocol that applies for a distributed system INSIDE THE SAME BOARD, no distributed in a house.
The old (incorrect) answer:
One of the basics and proved method is the \$I^2C\$ protocol. Many microcontrollers implements it and this protocol is designed for velocity and few lines of transmission (only needs 2 lines).
To implement this protocol, you should define a device as master (the main microcontroller) and the rest of the devices as slaves (auxiliary microcontrollers). |
H: Class A power amplifier: voltage and current
I am always having problems knowing the difference between providing a load with a voltage and providing the load with power.
So we have a Class A common emitter amplifier with a load resistor connected to the connector. As long as the transistor is in the linear region, there's voltage across it and current through it meaning it's getting power.
Now, we have another class A amplifier, only that its Q point is centered on the load line, but called a power amplifier. The question is why? Then, what is amplifier that I first described called? If there a line that can be drawn where an amplifier is a power amplifier, a current amplifier or a voltage amplifier?
I am familiar with Ohms law!
AI: It may be helpful to separate two usages of the term power.
The first is the technical usage. According to Ohm's Law, this is current multiplied by voltage: \$IE\$. (Or \$I^2R\$, or \$\frac{E^2}{R}\$.)
The second is the common misuse of the word in everyday speech. People say things like, "It's not plugged in, I need power!" or "Power up that amplifier." It's a convenient expression compared to "It's not plugged in, I need electrical energy."
Power is a rate: how quickly something uses energy. In electrical terms, it's measured in watts. Watts, in turn, are Joules (energy) per second. If a circuit uses 2 watts, it's using 2 joules per second. If the circuit requires 1 ampere of current, we can know (using Ohm's law) that the voltage must be (E = P / I) 2 volts. Another way to look at it might be to say that it is using 1 ampere at 2 volts every second, but that is cumbersome and more easily stated using watts.
Energy is a quantity of something. In electronics, a joule is a the energy required to produce one watt of power for one second. More specifically, it's how much work is required to move one coulomb (a lot of electrons) of electric charge at one volt.
Energy doesn't necessarily have to be electric in nature. It can also be thermal, gravitational, kinetic, acoustic, etc. For example, you could move an object on a table by using sound waves to vibrate it.
You can have some amount of available energy that, when delivered (or consumed) in a short duration, produces a high amount of power. Delivered or consumed slowly, produces a small amount of power.
A battery stores energy, in chemical form, which can be used at different rates. A remote control for a television, for example, draws very little current. Batteries in such a device last a very long time. You could say that a remote is a low power device. By comparison, a small electric motor using the same battery would be a high power device, because it consumes energy more quickly.
Keep in mind, power is still watts, and watts are a defined unit (joules per second). So when we say something is high or low power, we are speaking relatively. That same electric motor would be considered a low power device, if you were comparing it to a much larger motor.
A 100 watt light bulb requires more power than a 50 watt bulb. It doesn't really matter whether it is low voltage and high current, or high current and low voltage. The wattage is a product of the two, however it is arrived at.
So, circling back to the first part of your question: You're never supplying a load with power, technically. You supply energy and it consumes it at some rate, which in turn is power. But as previously mentioned, people tend to use power as a substitute for other concepts.
So what is the difference between an amplifier and a power amplifier?
Amplifier is a very general term. It is simply a category of circuit or device that increases the magnitude of a signal. It might be an operational (differential) amplifier, an audio amplifier (microphone, instrument, headphones, etc.), radio frequency amplifier, and so on. (To say nothing of amplifiers non-electrical in nature, like fluid or mechanical. A jack to raise your vehicle could be considered a type of amplifier).
The answer is "it depends." Remember how the term "power" gets thrown around inappropriately?
If you're talking about an operational amplifier in terms of the portion of a circuit, it only amplifies voltage. It's definitely not a power amplifier.
Any amplifier that amplifies audio, is technically an audio power amplifier. The output from such an amplifier has both voltage (amplitude) and current. Since P = IE, increasing either voltage or current will, by definition, increase power.
Class A amplifiers, are always power amplifiers. If you encounter one labeled only as an "amplifier," it is just someone taking a shortcut and not calling it an "audio power amplifier." (Similar to how we might say "fill up the car with gas" instead of "fill up the car with unleaded gasoline.") The specifics have simply been omitted. |
H: Mutual inductance of two loops
I got to measure inductance of circuit with two loops connected like this:
simulate this circuit – Schematic created using CircuitLab
simulate this circuit
The box measures \$L\$. I have this formula $$M=\frac{L_1-L_2}{4}$$ and when I compute \$M\$, it's negative. Is that ok? What does it mean? Should I make the result absolute?
In one measurement, I got \$L_1=-1394~ \mu H\$ and \$L_2=-1392~ \mu H\$. That seems wierd. I measured like 10m long cables. Isn't that suspicious? What could make the result wrong like this?
Additional information:
I was measuring with frequency \$200 kHz\$ and cables are flat. PNLY and Twist. One loop was made by connecting two nearest wires in the cable.
AI: A negative value of inductance tells me the net impedance you measured is capacitive. If you are measuring cable inductance try measuring end to end rather than across one end. This answer presumes it is a multicore or coax cable you are trying to measure.
If your measurement system uses 1 kHz to determine impedance, an apparent inductance of 1.39 H would be an impedance of 8734 ohms and an 18.2 nF capacitor would produce the same "value" but phase shifted by 180 degrees hence giving you a minus sign for inductance - try switching the measurement equipment to "capacitance" to confirm this.
10m of cable would therefore have a capacitance of 1820 pF per metre. This sounds a little high so maybe the test frequency used by your measurement equipment is more like 3 kHz. |
H: Important Parameters to Check while Chosing a GSM/GPRS Antenna
what technical parameters decide the performance of a GSM/GPRS antenna? (excluding power consumption and size)
I have found out several antennas that have 3dBi gain. And I want to chose between them. Some are PCB antennas, some are external antennas and some are ceramic.
What other technical factors (polarisation pattern, VSWR etc) should I consider? And can someone please explain the combinational effect of such parameters?
P.S : Some technical terms given in antenna data sheets are very difficult to understand. But I am sort of certain that antenna performance may be not fully judged by dBi figure. Am I right to think a 2.5dBi antenna may be able to perform better than a 5 dBi antenna in a forest or harsh environments when such technical factors come into play?
AI: Here are a couple of things to consider.
An antenna with gain means it has some directionality. For instance, take the example of the satellite dish - it has a gain of many dB but needs to be pointing at the transmit antenna fairly precisely to receive the best signal. A few degrees out can mean barely receiving a signal at all. It works both ways - transmitting and receiving are governed by the directionality of the antenna. More directionality means more gain compared to the theoretical isotropic antenna (that has a gain of 0dBi and transmits equally in all directions.
An antenna with lower gain may perform better in some environments than an antenna with higher gain because the higher directional antenna may be difficult to align.
VSWR ulitmately informs you what the impedance mismatch betweeen antenna and coax might be - a high VSWR usually means either wrong impedance feeder cable or the antenna presents a complex to the feeder and some form of matching circuit is needed. |
H: Why are 5 Volt 7-8 Amps chargers not available for charging phones quickly?
Available phone s chargers have either 0.5, 1, 2 Amps rating depending on the batteries (varied capacity) used. Why is it that 7, 8 Amps chargers are not available ?
if the limitation is in the Lithium Ion batteries we use... then what's the maximum possible current to charge them without damaging.... to design a portable charger for phones.
AI: Lithium-ion cells can be made to handle charging rates of up to 5 times their capacity, so theoretically you could charge a 1600mAh battery at 8A. However its lifespan may be reduced, and the chances of something going wrong and causing a fire are greater. All the associated circuitry in the phone (including charge controller, battery protection circuit, wiring, connectors) would have to be beefed up to handle the higher current safely. That is bound to make the phone (and its power supply) bulkier, heavier, and more expensive.
The other problem is that it wouldn't charge that much faster anyway. The battery's internal resistance limits how long it can be charged for at maximum rate. Topping off then takes almost as long as it would at a lower rate. So while you might think that at 8A your 1600mAh battery would reach full charge in just 12 minutes, in practice it might take 30 minutes or more.
Also, as a Lithium-ion battery ages its internal resistance increases, causing it to reach peak voltage sooner and take longer to charge. So to keep getting the faster charging time the battery would have to be replaced more often. That is a recipe for customer dissatisfaction. |
H: Gerber - is my understanding of solder mask layer (GTS / GBS) correct?
I've just had a PCB manufactured for me, but it seems like the solder mask is only applied to where the copper is.
I'm trying to figure out if it's my fault or not.
According to my understanding there supposed to be solder mask everywhere on the board except the places in red (pads/vias ect...).
Am I correct ?
Here is how the GTS layer file looks like:
EDIT:
Note that yellow solder mask was chosen. I haven't seen the PCBs in person but it sure looks like no solder mask to me.
But perhaps I'm just stupid/blind.
Here are photos the pcb:
AI: That looks correct.
Whether it's your fault or not depends on what you told the manufacturer the file names represent- the names in your title are standard for Altium, but other EDA software uses different names. Even so, I would expect the people at most suppliers to flag it and ask questions, but some folks are doing some pretty weird PCBs these days and the automated front end software requires you to spoon feed correct files to it.
Suggest you check your readme file (or if it was a file-by-file upload to a web site try to find if you uploaded the same file in two places).
Can you post a photo of the PCB? It sounds amusing-- did they at least subtract the mask from the pads? Otherwise it's pretty much useless.
Edit: Now that I see your photos-- the yellow solder mask I've gotten looks about exactly like that- it's almost transparent. |
H: PIC18F2550 Loop Counter Overwritten by sprintf
I have the following code compiled with Microchip's MPLab and XC8 compiler and running on a PIC18F2550 which is doing something rather odd:
char output[20];
int i = 0;
char currentStatus = readShiftReg();
for (i = 0; i < 8; i++) {
if ((currentStatus & (1 << i)) == (1 << i))
sprintf(output, "Sensor %d is currently on \r\n", i + 1);
else
sprintf(output, "Sensor %d is currently off \r\n", i + 1);
putsUSART(output);
}
The for loop only ever iterates once and during that one iteration it correctly runs the second sprintf, but after it runs it, the value of i is something random (26154, 8294, ...). I've tried swapping i out for another variable j assigning the value of i to j at the beginning of the loop, but the same thing still happens to i.
It seems like it's something with sprintf because when I use the debugger, the value of i isn't changed until after sprint runs. One thing to note is that the value in output is correct (i.e. "Sensor 0 is currently off \r\n") which makes this even more perplexing.
This should be a very simple piece of code, but it's not working and I'm sure there's a simple explanation. Where should I be looking?
AI: Your problem is this line:
char output[20];
You are allocating 20 characters for the buffer to hold your string, then calling sprintf() to fill it.
However your format string is too long, even before the decimal value is included. Remembering that the last array element will always need to be \x00 (a NUL character) you have 19 characters to use for your message.
Count the number of characters in this string:
Sensor %d is currently off \r\n
There are 29 characters (assuming a two digit number). This results in a buffer overflow, which will start to clobber other variables and may cause your program to operate in an unexpected manner. It is one common type of security issue in C.
Increase the size of your buffer so it is large enough to contain:
all of the fixed letters from your message.
the largest number the variable i will ever hold.
the trailing \r\n.
the terminating NUL byte. |
H: Setting MSP-430 toolchain in linux
Can anybody please guide procedure to setup tool-chain for MSP430 in Linux (particularly Ubuntu)? I am using MSP430 launchpad (MSP-EXP430G2), and I need to setup compiler/build tools and debugger drivers.
AI: All the tools are in your apt repository:
$ sudo apt-get install gcc-msp430 msp430-libc mspdebug msp430mcu
And if you want to do debugging:
$ sudo apt-get install gdb-msp430
Better still, install either Energia (the "official" IDE for the Launchpad) or the more advanced UECIDE. |
H: Does changing the gap between plates change the capacitor voltage?
Consider an ideal capacitor which has a length of \$\ell_1\$ between its plates. The capacitor terminals are open; they are not connected to any finite valued impedance. Its capacity is \$C_1\$ and it has an initial voltage of \$V_1\$.
What happens to the capacitor voltage if we make the gap between the plates \$\ell_2=2\ell_1\$ without changing the amount of charge on the plates?
My thoughts on this:
Increasing the gap will decrease the capacitance.
$$ C_2 = \dfrac{C_1}{2} $$
Since the amount of charge is unchanged, the new capacitor voltage will be
$$ V_2 = \dfrac{Q}{C_2} = \dfrac{Q}{\dfrac{C_1}{2}} = 2\dfrac{Q}{C_1} = 2V_1. $$
Is this true? Can we change the capacitor voltage just by moving its plates? For example, suppose that I'm wearing plastic shoes and I have some amount of charge on my body. This will naturally cause a static voltage, since my body and the ground act as capacitor plates. Now, if I climb a perfect insulator building (e.g.; a dry tree), will the static voltage on my body increase?
AI: A Wimshurst machine works by that process.
It puts charge on plates which are close together, then moves the plates apart to generate a high voltage.
When I was at school, in the '70s, a kid made one using PCB material for the disks, and gramophone needles to create the initial charge. The 'work' was done by an electric motor. Based on the length of spark it generated, I think it produced over 200,000V.
His dad took it work, where they designed telephones, and tested early electronic telephones with it. |
H: Is IRFD 014 an appropriate FET for switching an array of (about 40) UV LEDs?
We have an array of UV LEDs. The LEDs are rated at 3.2 V – 3.4 V at 20 mA, and we plan to use a 5 V supply for simplicity. We will be using a dedicated 100 Ω resistor for each LED (the power dissipated at each resistor is at max. 40 mW, so no issues here).
The LEDs will be wired in parallel and thus will drain a total current of up to 720 mA (or 900 mA, depending on the actual number of LEDs we’ll use).
simulate this circuit – Schematic created using CircuitLab
To switch the LEDs using a microcontroller (probably ATtiny2313A), we are about to pick IRFD 014. We have no fast switching requirements. Switching time can be well over 10ms, ≤100ms would be desirable.
Now the question: Is the IRFD 014 a suitable part for this purpose? From the datasheet, I think it should be fine to use:
\$I_D\$ max at 100°C is 1.2 A, which is at least 20% more than we need.
\$R_{ΘJA}\$ is 120°C/W. We’re expecting an absolute maximum of 1A Drain-to-Source, so with the \$R_{DS(on)}\$ of 0.2Ω, this gives a temperature rise of 24 K. As the device will be operated at room temperature, for not longer than one minute and there will be lots of free space, we don’t see this even remotely as an issue.
\$V_{GS(th)}\$ is 4.0 V max, which is great for driving it with an ATtiny at 5 V operating voltage, and the diagram suggests that we can expect \$I_{DS}\$ currents above 1 A when driving the gate with 5 V.
Have we overlooked anything? A remaining concern I have is that most of the current and temperature ratings in the datasheet are given at \$V_{GS}\$ of 10 V. Do we have to expect any problems when driving the gate with less than that?
This is a one-off design, and for assembly simplicity we would prefer through-hole (and not SMT) devices.
AI: Is there are strong reason for using that part?
For simplicity, I would use a part specified with an Rds(on) for a Vgs of 4.5V, or lower. Typically the datasheet is much simpler to interpret.
Further the part is clearly specified by the manufacturer to work in that region.
There are quite a few parts which are specifically rated at 4.5V or below, though a lot of them are Surface Mount Devices. Is there plenty of space? If through-hole is important, it might be easier to get a physically larger package, like an IPAK.
If this is a one off, or small volume system, I would make a 'no-brain' assumption, to make life easier, and, at least, double the required current to get a minimum device current. For small volumes the difference in part cost is likely a small fraction of an hour of my time. Hence it isn't worth designing something close to an edge which might use time later to check and debug it. |
H: Bluetooth headset button replacement
I have a Samsung HM1300 headset and want to emulate the call button signal via a microcontroller.
Here is a pic of the inside of the headset:
(Original)
The gold button is the call button. I see the solder points (the 4 points around the button). Do you think it's plausible to solder other wires to those points? I would like to simulate a button press via an Arduino to the Bluetooth headset by soldering wires to the current button circuitry.
What do you think? If I am not clear on the question, please let me know.
AI: It looks plausible.
Measure the button size, and try to find some at a distributer, look at their datasheet to ensure their is nothing weird happening (like a hidden order connection). That will also tell you the pins configuration.
You might get more confident by practicing on similar buttons, so order some. .
If they are big enough, tack-solder them onto some stripboard/veroboard and practice the modification on them, as well as driving the signal. At least hold them with blutak or hot glue. Practice on them to get a feel for what you are doing. Too much heat might damage the PCB, so try to enue you can do the job with a few seconds on heat.
Use a voltmeter, very carefully, to figure out what the switch is doing. It will either be 'high' (say 3.3V), and when pushed goes 'low' (say 0V), or vice versa.
If it is a simple signal pull-up or pull-down, then you could do that with either an N-Channle or P-Channel MOSFET, which are easy to drive from an Arduino pin, or an NPN/PNP transistor. |
H: Should I assign currents to voltage sources in my circuit analysis
Mortals! I apologize if my question may seem, foolish, but I have a need of understanding a process in analyzing circuits. You see, when we are looking at resistors (non-sense, my lightning never meets such "resistance") in a circuit, and trying to solve for some unknown variable, we often times assign currents to the resistors, such that they can be used in our KCL equations. However, I am wondering if it is wise, unwise, or irrelevant, to assign such currents to voltage sources. Let me give you humans an example. https://i.stack.imgur.com/p1VaO.jpg
You see, in the above example, my KCL equations for a node would be different if I assigned currents to the 2 voltage sources shown. I know that, since voltage sources do not supply current, they do not really have a current "of their own," and thus, any current running through them would be one of the currents drawn for the resistors or from a current source. However, am I allowed to do this and still be okay in my analysis. MORTALS, I hope you are able to provide me an answer, as Kratos draws near, and I have not perfectly understood the nature of this power coming out of my hands. If I am to destroy him, I will need to know the answers!
AI: Yes, Zeus, it is correct to assign currents to voltage sources. |
H: Ethernet UDP diode
I want to create a device of some sort where I am absolutely positive that only UDP traffic can pass one way. Of course I could setup whatever old router I might have, the thing is I want to make it as small as possible and with as little power consumption as needed. What components could or should I use for such an application?
AI: You need a device with two ethernet ports and filtering capability. Such as an advanced router. Or if you posses the ability to program it, a micro-controller with two Ethernet interfaces or two interface chips and a lot software work.
UDP is a principle that has to be filtered out by a level of package inspection at least, at any lower level it's just bits passing through.
A router "certified" for UDP package filtering (there are plenty, if you pay attention) is probably the more affordable ready-made option you have, where you only need to click a few check boxes. |
H: can SOT883B package BJT transistor switch a relay with 21.1mA coil current?
I am planning to use miniature BJT in a circuit , but I haven't used them before, The specs of NXP BC847BMB TRANS, NPN, 45V, 0.1A, SOT883B shows 100mA as collector current, I am worried if it can switch a G6K-2G-Y-DC5 relay.
The relay mentions 21.1mA as col current. I would be using a 3.8V value for VCC. Please help in understanding how to do the calculations and determine if this will work or not.
AI: The link to the relay is broken, but it's for you to look up anyway.
You already know the transistor can handle 100 mA, so the question is whether the relay will require more than that. You say the relay only requires about 21 mA, which is obviously less than 100 mA by a good margin, so I don't see what you are actually asking.
You say you'd be powering the relay from 3.8 V. The transistor can handle 45 V, so that is clearly within its capabilities. That is again so obvious it's hard to see what you are actually asking.
You have to make sure that your relay can really operate from 3.6 V (the transistor will eat up about 200 mV when on) coil voltage, and that it really does draw less than 100 mA when it does. This again should be obvious, coming directly from the relay datasheet.
Two things that are less obvious to watch out for are: 1 - make sure to put a reverse polarity diode across the relay coil. 2 - Make sure the transistor can dissipate the power. That should be a no-brainer if all the current thru it comes when it is saturated. Since that can't be more than 100 mA and saturation is probably (your job to check) 200 mV or less, it can't dissipate more than 20 mW in that case. |
H: Voltage Regulation: Cascading vs. Individual
Consider my design:
Input power is either 8.4V (VBAT) or 15V (Wall Wart).
From there I need several voltages to power all the components on that board. Here is a list of voltages:
5, 3.3, 2.5, 1.85, 1.8, 1.5, 1.25, 1.2, 1.0 and 0.75.
Without going into the merits of what is required for each one of those voltages (current, noise, and etc), is there an intrinsic advantage in cascading switchers versus tying them all to one front end switcher (in this case a 5V output)? I'm mainly talking about overall efficiency, but I'm interested on other considerations.
AI: Some, especially if the current is relatively low, might be better served by cascaded linear or LDO linear regulators with a switching regulator. Cascading has a negative effect on efficiency typically (two 80% efficient regulators cascaded have only 64% efficiency) but usually it's overall efficiency and cost that matters.
Maybe you can combine some- for example 1.80 and 1.85V.
Another consideration is any sequencing that may be required- cascading could affect that by guaranteeing some voltages sequence in a desirable order, without the need for extra supervisory circuitry. |
H: Are NTSC and PAL affecting display rate
I understand that the NTSC TV signal is 30hz and PAL is 25hz, but if NTSC and PAL are TV signal standards how could they affect display rate(Hz) for input devices e.g. when you connected and old game console (signal goes from console to TV). If I am not wrong analog input was the same in USA and Europe. Sow how come that there were consoles(or games) for NTSC and PAL ?
I know it may not be entirely electrical question but since signal coding is closely related to electronics I decided to post it here.
AI: Not only do the two TV systems run at a different frequency, but the difference in frequency also dictates a difference in frame size. PAL is 625 lines, whereas NTSC is 525 lines. That means that games (and the consoles) have to account for that difference in size in their graphics and playfields.
And then, on top of that, the two systems both use a different colour coding scheme1. The hardware in the console has to be able to do the right colour encoding to be able to display on the right kind of screen. You can't just plug a PAL console into an NTSC screen and expect it to have a clue what is going on - the same the other way around.
Most games consoles tied the action to the video output frequency. Frames were calculated and drawn at the same frequency as the screen, so the gameplay was often quicker on an NTCS console than on a PAL console. The internals of the console had to account for that change in speed, and so they would usually have a different core clock (and different crystal value) for NTCS devices as compared to PAL devices.
So you see, the TV standard the console is designed to work with affects a lot more than just the frequency of the TV signal.
1 NTSC used to be known as "Never The Same Colour" as the colour coding system used in it was quite poor by comparison to PAL. You could never quite trust how the colours would be represented from one device or broadcast to the next. |
H: Potentials at terminals of battery connected to ground
If we have a battery connected like so:
simulate this circuit – Schematic created using CircuitLab
Am I correct in thinking voltage on the positive terminal relative to ground is +9V and on the negative terminal is -9V?
AI: Trying to build this circuit in real life can cause an electrical fire (depending on exactly how it is connected and the battery's internal state of charge). The wire and battery could get very hot, the insulation around the wire could melt or vaporize as smoke, nearby surfaces could be scorched, and it's even possible that a combustion fire could be triggered.
The ideal 9V battery makes a voltage difference of 9V between its (+) and (-) terminals, regardless of where ground is. If the (-) terminal is at ground (0V) then the (+) terminal is at +9V. If the (+) terminal is at 0V then the (-) terminal is at -9V. If the (-) terminal is at 1000V then the (+) terminal is at 1009V. But it's impossible for the (+) terminal to be +9V while the (-) terminal is at -9V, because then the total (algebraic sum) voltage would be 18V instead of 9V.
A practical battery has some internal source resistance distributed throughout the connection terminals, electrodes, and electrolyte -- this can be modeled with a single resistor in series with the ideal voltage source. The lower the battery's internal state of charge, the greater this equivalent internal source resistance becomes.
Real wires also have some non-zero resistance as well as some inductance.
If you click on the "simulate this circuit" link (underneath the schematic picture) you can see the results for yourself. The simulation shows 0V at both ends and 4.5A of current flowing through the loop. (This circuitlab simulator treats a 9V battery as a practical component rather than an ideal voltage source, so the simulator knows there is an upper limit on the current the battery can provide.) |
H: Building "AND" and "OR" gates from tri-state drivers & inverters
I'm working on a digital circuits assignment which asks me to prove that if you have tri-state buffers and inverters, you can build any combinational logic circuit.
My attempt at doing so would be to create an "and" gate and an "or" gate, because "and", "or", and "not" are logically complete, if I'm correct.
My design for an "and" gate was to have two tri-state drivers, with two inputs (A and B) and they would come together with one output (C). "A" would be the selector for driver two and "B" would be the selector for driver one, then "A" would be the input for driver one and "B" would be the input for driver two, then the outputs of those drivers would come together at "C".
My concern is that this design leaves a "Hi-Z" in the truth table:
A | B | C
1 | 1 | 1
1 | 0 | 0
0 | 1 | 0
0 | 0 | Hi-Z
How would I go about fixing this? Or do I need a new design entirely?
AI: The High-Z is a problem (unless you're doing wired-OR, which I think you're not).
To make an AND gate you need to implement this truth table:
B A Out
0 0 0
0 1 0
1 0 0 <--
1 1 1 <--
So suppose you connect A and /B to the input and tristate input of a buffer. That gives you the two last entries but the first two will be high-Z because /B is high. You'll need another tristate buffer tied to the first buffer, and the two cannot 'fight' nor can they both go high-Z at the same time. This should be enough of a hint. |
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