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0 | static int usb_qdev_init(DeviceState *qdev) { USBDevice *dev = USB_DEVICE(qdev); int rc; pstrcpy(dev->product_desc, sizeof(dev->product_desc), usb_device_get_product_desc(dev)); dev->auto_attach = 1; QLIST_INIT(&dev->strings); usb_ep_init(dev); rc = usb_claim_port(dev); if (rc != 0) { return rc; } rc = usb_device_init(dev); if (rc != 0) { usb_release_port(dev); return rc; } if (dev->auto_attach) { rc = usb_device_attach(dev); if (rc != 0) { usb_qdev_exit(qdev); return rc; } } return 0; } | 12,717 |
0 | static void free_test_data(test_data *data) { AcpiSdtTable *temp; int i; if (data->rsdt_tables_addr) { g_free(data->rsdt_tables_addr); } for (i = 0; i < data->tables->len; ++i) { temp = &g_array_index(data->tables, AcpiSdtTable, i); if (temp->aml) { g_free(temp->aml); } if (temp->aml_file) { if (!temp->tmp_files_retain && g_strstr_len(temp->aml_file, -1, "aml-")) { unlink(temp->aml_file); } g_free(temp->aml_file); } if (temp->asl) { g_free(temp->asl); } if (temp->asl_file) { if (!temp->tmp_files_retain) { unlink(temp->asl_file); } g_free(temp->asl_file); } } g_array_free(data->tables, false); } | 12,719 |
0 | static QObject *parse_value(JSONParserContext *ctxt, QList **tokens, va_list *ap) { QObject *obj; obj = parse_object(ctxt, tokens, ap); if (obj == NULL) { obj = parse_array(ctxt, tokens, ap); } if (obj == NULL) { obj = parse_escape(ctxt, tokens, ap); } if (obj == NULL) { obj = parse_keyword(ctxt, tokens); } if (obj == NULL) { obj = parse_literal(ctxt, tokens); } return obj; } | 12,720 |
0 | static void ich_ahci_register(void) { type_register_static(&ich_ahci_info); type_register_static_alias(&ich_ahci_info, "ahci"); } | 12,721 |
0 | static QCowAIOCB *qcow_aio_setup(BlockDriverState *bs, int64_t sector_num, QEMUIOVector *qiov, int nb_sectors, BlockDriverCompletionFunc *cb, void *opaque, int is_write) { QCowAIOCB *acb; acb = qemu_aio_get(&qcow_aio_pool, bs, cb, opaque); if (!acb) return NULL; acb->hd_aiocb = NULL; acb->sector_num = sector_num; acb->qiov = qiov; if (qiov->niov > 1) { acb->buf = acb->orig_buf = qemu_blockalign(bs, qiov->size); if (is_write) qemu_iovec_to_buffer(qiov, acb->buf); } else { acb->buf = (uint8_t *)qiov->iov->iov_base; } acb->nb_sectors = nb_sectors; acb->n = 0; acb->cluster_offset = 0; acb->l2meta.nb_clusters = 0; LIST_INIT(&acb->l2meta.dependent_requests); return acb; } | 12,722 |
0 | static inline uint64_t vtd_iova_limit(VTDContextEntry *ce) { uint32_t ce_agaw = vtd_ce_get_agaw(ce); return 1ULL << MIN(ce_agaw, VTD_MGAW); } | 12,723 |
0 | MigrationInfo *qmp_query_migrate(Error **errp) { MigrationInfo *info = g_malloc0(sizeof(*info)); MigrationState *s = migrate_get_current(); switch (s->state) { case MIGRATION_STATUS_NONE: /* no migration has happened ever */ break; case MIGRATION_STATUS_SETUP: info->has_status = true; info->status = MIGRATION_STATUS_SETUP; info->has_total_time = false; break; case MIGRATION_STATUS_ACTIVE: case MIGRATION_STATUS_CANCELLING: info->has_status = true; info->status = MIGRATION_STATUS_ACTIVE; info->has_total_time = true; info->total_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME) - s->total_time; info->has_expected_downtime = true; info->expected_downtime = s->expected_downtime; info->has_setup_time = true; info->setup_time = s->setup_time; info->has_ram = true; info->ram = g_malloc0(sizeof(*info->ram)); info->ram->transferred = ram_bytes_transferred(); info->ram->remaining = ram_bytes_remaining(); info->ram->total = ram_bytes_total(); info->ram->duplicate = dup_mig_pages_transferred(); info->ram->skipped = skipped_mig_pages_transferred(); info->ram->normal = norm_mig_pages_transferred(); info->ram->normal_bytes = norm_mig_bytes_transferred(); info->ram->dirty_pages_rate = s->dirty_pages_rate; info->ram->mbps = s->mbps; info->ram->dirty_sync_count = s->dirty_sync_count; if (blk_mig_active()) { info->has_disk = true; info->disk = g_malloc0(sizeof(*info->disk)); info->disk->transferred = blk_mig_bytes_transferred(); info->disk->remaining = blk_mig_bytes_remaining(); info->disk->total = blk_mig_bytes_total(); } get_xbzrle_cache_stats(info); break; case MIGRATION_STATUS_COMPLETED: get_xbzrle_cache_stats(info); info->has_status = true; info->status = MIGRATION_STATUS_COMPLETED; info->has_total_time = true; info->total_time = s->total_time; info->has_downtime = true; info->downtime = s->downtime; info->has_setup_time = true; info->setup_time = s->setup_time; info->has_ram = true; info->ram = g_malloc0(sizeof(*info->ram)); info->ram->transferred = ram_bytes_transferred(); info->ram->remaining = 0; info->ram->total = ram_bytes_total(); info->ram->duplicate = dup_mig_pages_transferred(); info->ram->skipped = skipped_mig_pages_transferred(); info->ram->normal = norm_mig_pages_transferred(); info->ram->normal_bytes = norm_mig_bytes_transferred(); info->ram->mbps = s->mbps; info->ram->dirty_sync_count = s->dirty_sync_count; break; case MIGRATION_STATUS_FAILED: info->has_status = true; info->status = MIGRATION_STATUS_FAILED; break; case MIGRATION_STATUS_CANCELLED: info->has_status = true; info->status = MIGRATION_STATUS_CANCELLED; break; } return info; } | 12,725 |
0 | static void do_sendkey(Monitor *mon, const QDict *qdict) { char keyname_buf[16]; char *separator; int keyname_len, keycode, i, idx; const char *keys = qdict_get_str(qdict, "keys"); int has_hold_time = qdict_haskey(qdict, "hold-time"); int hold_time = qdict_get_try_int(qdict, "hold-time", -1); if (nb_pending_keycodes > 0) { qemu_del_timer(key_timer); release_keys(NULL); } if (!has_hold_time) hold_time = 100; i = 0; while (1) { separator = strchr(keys, '-'); keyname_len = separator ? separator - keys : strlen(keys); if (keyname_len > 0) { pstrcpy(keyname_buf, sizeof(keyname_buf), keys); if (keyname_len > sizeof(keyname_buf) - 1) { monitor_printf(mon, "invalid key: '%s...'\n", keyname_buf); return; } if (i == MAX_KEYCODES) { monitor_printf(mon, "too many keys\n"); return; } /* Be compatible with old interface, convert user inputted "<" */ if (!strncmp(keyname_buf, "<", 1) && keyname_len == 1) { pstrcpy(keyname_buf, sizeof(keyname_buf), "less"); keyname_len = 4; } keyname_buf[keyname_len] = 0; idx = index_from_key(keyname_buf); if (idx == Q_KEY_CODE_MAX) { monitor_printf(mon, "invalid parameter: %s\n", keyname_buf); return; } keycode = key_defs[idx]; if (keycode < 0) { monitor_printf(mon, "unknown key: '%s'\n", keyname_buf); return; } keycodes[i++] = keycode; } if (!separator) break; keys = separator + 1; } nb_pending_keycodes = i; /* key down events */ for (i = 0; i < nb_pending_keycodes; i++) { keycode = keycodes[i]; if (keycode & 0x80) kbd_put_keycode(0xe0); kbd_put_keycode(keycode & 0x7f); } /* delayed key up events */ qemu_mod_timer(key_timer, qemu_get_clock_ns(vm_clock) + muldiv64(get_ticks_per_sec(), hold_time, 1000)); } | 12,726 |
0 | static void qemu_rdma_dump_id(const char *who, struct ibv_context *verbs) { struct ibv_port_attr port; if (ibv_query_port(verbs, 1, &port)) { error_report("Failed to query port information"); return; } printf("%s RDMA Device opened: kernel name %s " "uverbs device name %s, " "infiniband_verbs class device path %s, " "infiniband class device path %s, " "transport: (%d) %s\n", who, verbs->device->name, verbs->device->dev_name, verbs->device->dev_path, verbs->device->ibdev_path, port.link_layer, (port.link_layer == IBV_LINK_LAYER_INFINIBAND) ? "Infiniband" : ((port.link_layer == IBV_LINK_LAYER_ETHERNET) ? "Ethernet" : "Unknown")); } | 12,728 |
0 | void ff_biweight_h264_pixels8_8_msa(uint8_t *dst, uint8_t *src, int stride, int height, int log2_denom, int weight_dst, int weight_src, int offset) { avc_biwgt_8width_msa(src, stride, dst, stride, height, log2_denom, weight_src, weight_dst, offset); } | 12,729 |
0 | static av_cold int raw_init_decoder(AVCodecContext *avctx) { RawVideoContext *context = avctx->priv_data; const AVPixFmtDescriptor *desc; ff_bswapdsp_init(&context->bbdsp); if ( avctx->codec_tag == MKTAG('r','a','w',' ') || avctx->codec_tag == MKTAG('N','O','1','6')) avctx->pix_fmt = avpriv_find_pix_fmt(avpriv_pix_fmt_bps_mov, avctx->bits_per_coded_sample); else if (avctx->codec_tag == MKTAG('W', 'R', 'A', 'W')) avctx->pix_fmt = avpriv_find_pix_fmt(avpriv_pix_fmt_bps_avi, avctx->bits_per_coded_sample); else if (avctx->codec_tag && (avctx->codec_tag & 0xFFFFFF) != MKTAG('B','I','T', 0)) avctx->pix_fmt = avpriv_find_pix_fmt(ff_raw_pix_fmt_tags, avctx->codec_tag); else if (avctx->pix_fmt == AV_PIX_FMT_NONE && avctx->bits_per_coded_sample) avctx->pix_fmt = avpriv_find_pix_fmt(avpriv_pix_fmt_bps_avi, avctx->bits_per_coded_sample); desc = av_pix_fmt_desc_get(avctx->pix_fmt); if (!desc) { av_log(avctx, AV_LOG_ERROR, "Invalid pixel format.\n"); return AVERROR(EINVAL); } if (desc->flags & (AV_PIX_FMT_FLAG_PAL | AV_PIX_FMT_FLAG_PSEUDOPAL)) { context->palette = av_buffer_alloc(AVPALETTE_SIZE); if (!context->palette) return AVERROR(ENOMEM); if (desc->flags & AV_PIX_FMT_FLAG_PSEUDOPAL) avpriv_set_systematic_pal2((uint32_t*)context->palette->data, avctx->pix_fmt); else memset(context->palette->data, 0, AVPALETTE_SIZE); } if ((avctx->extradata_size >= 9 && !memcmp(avctx->extradata + avctx->extradata_size - 9, "BottomUp", 9)) || avctx->codec_tag == MKTAG('c','y','u','v') || avctx->codec_tag == MKTAG(3, 0, 0, 0) || avctx->codec_tag == MKTAG('W','R','A','W')) context->flip = 1; if (avctx->codec_tag == AV_RL32("yuv2") && avctx->pix_fmt == AV_PIX_FMT_YUYV422) context->is_yuv2 = 1; return 0; } | 12,731 |
0 | static void gen_rfe(DisasContext *s, TCGv_i32 pc, TCGv_i32 cpsr) { gen_set_cpsr(cpsr, CPSR_ERET_MASK); tcg_temp_free_i32(cpsr); store_reg(s, 15, pc); s->is_jmp = DISAS_JUMP; } | 12,732 |
0 | void bdrv_drain_all_end(void) { BlockDriverState *bs; BdrvNextIterator it; BlockJob *job = NULL; for (bs = bdrv_first(&it); bs; bs = bdrv_next(&it)) { AioContext *aio_context = bdrv_get_aio_context(bs); aio_context_acquire(aio_context); aio_enable_external(aio_context); bdrv_io_unplugged_end(bs); bdrv_parent_drained_end(bs); aio_context_release(aio_context); } while ((job = block_job_next(job))) { AioContext *aio_context = blk_get_aio_context(job->blk); aio_context_acquire(aio_context); block_job_resume(job); aio_context_release(aio_context); } } | 12,733 |
0 | int qemu_set_fd_handler(int fd, IOHandler *fd_read, IOHandler *fd_write, void *opaque) { return qemu_set_fd_handler2(fd, NULL, fd_read, fd_write, opaque); } | 12,734 |
0 | int float32_lt( float32 a, float32 b STATUS_PARAM ) { flag aSign, bSign; if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) ) || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) ) ) { float_raise( float_flag_invalid STATUS_VAR); return 0; } aSign = extractFloat32Sign( a ); bSign = extractFloat32Sign( b ); if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 ); return ( a != b ) && ( aSign ^ ( a < b ) ); } | 12,735 |
0 | build_spcr(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info) { AcpiSerialPortConsoleRedirection *spcr; const MemMapEntry *uart_memmap = &guest_info->memmap[VIRT_UART]; int irq = guest_info->irqmap[VIRT_UART] + ARM_SPI_BASE; spcr = acpi_data_push(table_data, sizeof(*spcr)); spcr->interface_type = 0x3; /* ARM PL011 UART */ spcr->base_address.space_id = AML_SYSTEM_MEMORY; spcr->base_address.bit_width = 8; spcr->base_address.bit_offset = 0; spcr->base_address.access_width = 1; spcr->base_address.address = cpu_to_le64(uart_memmap->base); spcr->interrupt_types = (1 << 3); /* Bit[3] ARMH GIC interrupt */ spcr->gsi = cpu_to_le32(irq); /* Global System Interrupt */ spcr->baud = 3; /* Baud Rate: 3 = 9600 */ spcr->parity = 0; /* No Parity */ spcr->stopbits = 1; /* 1 Stop bit */ spcr->flowctrl = (1 << 1); /* Bit[1] = RTS/CTS hardware flow control */ spcr->term_type = 0; /* Terminal Type: 0 = VT100 */ spcr->pci_device_id = 0xffff; /* PCI Device ID: not a PCI device */ spcr->pci_vendor_id = 0xffff; /* PCI Vendor ID: not a PCI device */ build_header(linker, table_data, (void *)spcr, "SPCR", sizeof(*spcr), 2, NULL); } | 12,736 |
0 | static SocketAddressLegacy *sd_server_config(QDict *options, Error **errp) { QDict *server = NULL; QObject *crumpled_server = NULL; Visitor *iv = NULL; SocketAddress *saddr_flat = NULL; SocketAddressLegacy *saddr = NULL; Error *local_err = NULL; qdict_extract_subqdict(options, &server, "server."); crumpled_server = qdict_crumple(server, errp); if (!crumpled_server) { goto done; } /* * FIXME .numeric, .to, .ipv4 or .ipv6 don't work with -drive * server.type=inet. .to doesn't matter, it's ignored anyway. * That's because when @options come from -blockdev or * blockdev_add, members are typed according to the QAPI schema, * but when they come from -drive, they're all QString. The * visitor expects the former. */ iv = qobject_input_visitor_new(crumpled_server); visit_type_SocketAddress(iv, NULL, &saddr_flat, &local_err); if (local_err) { error_propagate(errp, local_err); goto done; } saddr = socket_address_crumple(saddr_flat); done: qapi_free_SocketAddress(saddr_flat); visit_free(iv); qobject_decref(crumpled_server); QDECREF(server); return saddr; } | 12,737 |
0 | static void tosa_init(ram_addr_t ram_size, int vga_ram_size, const char *boot_device, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model) { struct pxa2xx_state_s *cpu; struct tc6393xb_s *tmio; struct scoop_info_s *scp0, *scp1; if (ram_size < (TOSA_RAM + TOSA_ROM + PXA2XX_INTERNAL_SIZE + TC6393XB_RAM)) { fprintf(stderr, "This platform requires %i bytes of memory\n", TOSA_RAM + TOSA_ROM + PXA2XX_INTERNAL_SIZE); exit(1); } if (!cpu_model) cpu_model = "pxa255"; cpu = pxa255_init(tosa_binfo.ram_size); cpu_register_physical_memory(0, TOSA_ROM, qemu_ram_alloc(TOSA_ROM) | IO_MEM_ROM); tmio = tc6393xb_init(0x10000000, pxa2xx_gpio_in_get(cpu->gpio)[TOSA_GPIO_TC6393XB_INT]); scp0 = scoop_init(cpu, 0, 0x08800000); scp1 = scoop_init(cpu, 1, 0x14800040); tosa_gpio_setup(cpu, scp0, scp1, tmio); tosa_microdrive_attach(cpu); tosa_tg_init(cpu); /* Setup initial (reset) machine state */ cpu->env->regs[15] = tosa_binfo.loader_start; tosa_binfo.kernel_filename = kernel_filename; tosa_binfo.kernel_cmdline = kernel_cmdline; tosa_binfo.initrd_filename = initrd_filename; tosa_binfo.board_id = 0x208; arm_load_kernel(cpu->env, &tosa_binfo); sl_bootparam_write(SL_PXA_PARAM_BASE); } | 12,738 |
0 | static inline uint8_t fat_chksum(const direntry_t* entry) { uint8_t chksum=0; int i; for(i=0;i<11;i++) { unsigned char c; c = (i < 8) ? entry->name[i] : entry->extension[i-8]; chksum=(((chksum&0xfe)>>1)|((chksum&0x01)?0x80:0)) + c; } return chksum; } | 12,739 |
0 | static void event_notifier_ready(EventNotifier *notifier) { ThreadPool *pool = container_of(notifier, ThreadPool, notifier); ThreadPoolElement *elem, *next; event_notifier_test_and_clear(notifier); restart: QLIST_FOREACH_SAFE(elem, &pool->head, all, next) { if (elem->state != THREAD_CANCELED && elem->state != THREAD_DONE) { continue; } if (elem->state == THREAD_DONE) { trace_thread_pool_complete(pool, elem, elem->common.opaque, elem->ret); } if (elem->state == THREAD_DONE && elem->common.cb) { QLIST_REMOVE(elem, all); /* Read state before ret. */ smp_rmb(); elem->common.cb(elem->common.opaque, elem->ret); qemu_aio_release(elem); goto restart; } else { /* remove the request */ QLIST_REMOVE(elem, all); qemu_aio_release(elem); } } } | 12,740 |
0 | static int gxf_write_packet(AVFormatContext *s, AVPacket *pkt) { GXFContext *gxf = s->priv_data; AVIOContext *pb = s->pb; AVStream *st = s->streams[pkt->stream_index]; int64_t pos = avio_tell(pb); int padding = 0; int packet_start_offset = avio_tell(pb) / 1024; gxf_write_packet_header(pb, PKT_MEDIA); if (st->codec->codec_id == AV_CODEC_ID_MPEG2VIDEO && pkt->size % 4) /* MPEG-2 frames must be padded */ padding = 4 - pkt->size % 4; else if (st->codec->codec_type == AVMEDIA_TYPE_AUDIO) padding = GXF_AUDIO_PACKET_SIZE - pkt->size; gxf_write_media_preamble(s, pkt, pkt->size + padding); avio_write(pb, pkt->data, pkt->size); gxf_write_padding(pb, padding); if (st->codec->codec_type == AVMEDIA_TYPE_VIDEO) { if (!(gxf->flt_entries_nb % 500)) { int err; if ((err = av_reallocp_array(&gxf->flt_entries, gxf->flt_entries_nb + 500, sizeof(*gxf->flt_entries))) < 0) { gxf->flt_entries_nb = 0; av_log(s, AV_LOG_ERROR, "could not reallocate flt entries\n"); return err; } } gxf->flt_entries[gxf->flt_entries_nb++] = packet_start_offset; gxf->nb_fields += 2; // count fields } updatePacketSize(pb, pos); gxf->packet_count++; if (gxf->packet_count == 100) { gxf_write_map_packet(s, 0); gxf->packet_count = 0; } return 0; } | 12,742 |
0 | static CharDriverState *qmp_chardev_open_parallel(const char *id, ChardevBackend *backend, ChardevReturn *ret, Error **errp) { ChardevHostdev *parallel = backend->u.parallel; int fd; fd = qmp_chardev_open_file_source(parallel->device, O_RDWR, errp); if (fd < 0) { return NULL; } return qemu_chr_open_pp_fd(fd, errp); } | 12,743 |
0 | void qemu_peer_using_vnet_hdr(NetClientState *nc, bool enable) { if (!nc->peer || !nc->peer->info->using_vnet_hdr) { return; } nc->peer->info->using_vnet_hdr(nc->peer, enable); } | 12,744 |
0 | static int scsi_block_initfn(SCSIDevice *dev) { SCSIDiskState *s = DO_UPCAST(SCSIDiskState, qdev, dev); int sg_version; int rc; if (!s->qdev.conf.bs) { error_report("drive property not set"); return -1; } /* check we are using a driver managing SG_IO (version 3 and after) */ rc = bdrv_ioctl(s->qdev.conf.bs, SG_GET_VERSION_NUM, &sg_version); if (rc < 0) { error_report("cannot get SG_IO version number: %s. " "Is this a SCSI device?", strerror(-rc)); return -1; } if (sg_version < 30000) { error_report("scsi generic interface too old"); return -1; } /* get device type from INQUIRY data */ rc = get_device_type(s); if (rc < 0) { error_report("INQUIRY failed"); return -1; } /* Make a guess for the block size, we'll fix it when the guest sends. * READ CAPACITY. If they don't, they likely would assume these sizes * anyway. (TODO: check in /sys). */ if (s->qdev.type == TYPE_ROM || s->qdev.type == TYPE_WORM) { s->qdev.blocksize = 2048; } else { s->qdev.blocksize = 512; } /* Makes the scsi-block device not removable by using HMP and QMP eject * command. */ s->features |= (1 << SCSI_DISK_F_NO_REMOVABLE_DEVOPS); return scsi_initfn(&s->qdev); } | 12,746 |
0 | static int vga_initfn(ISADevice *dev) { ISACirrusVGAState *d = DO_UPCAST(ISACirrusVGAState, dev, dev); VGACommonState *s = &d->cirrus_vga.vga; vga_common_init(s); cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0, isa_address_space(dev), isa_address_space_io(dev)); s->con = graphic_console_init(s->update, s->invalidate, s->screen_dump, s->text_update, s); rom_add_vga(VGABIOS_CIRRUS_FILENAME); /* XXX ISA-LFB support */ /* FIXME not qdev yet */ return 0; } | 12,747 |
0 | void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n) { if (mr->iommu_ops->notify_started && QLIST_EMPTY(&mr->iommu_notify.notifiers)) { mr->iommu_ops->notify_started(mr); } notifier_list_add(&mr->iommu_notify, n); } | 12,748 |
0 | static void pc_init1(MachineState *machine) { PCMachineState *pc_machine = PC_MACHINE(machine); MemoryRegion *system_memory = get_system_memory(); MemoryRegion *system_io = get_system_io(); int i; ram_addr_t below_4g_mem_size, above_4g_mem_size; PCIBus *pci_bus; ISABus *isa_bus; PCII440FXState *i440fx_state; int piix3_devfn = -1; qemu_irq *cpu_irq; qemu_irq *gsi; qemu_irq *i8259; qemu_irq *smi_irq; GSIState *gsi_state; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; BusState *idebus[MAX_IDE_BUS]; ISADevice *rtc_state; ISADevice *floppy; MemoryRegion *ram_memory; MemoryRegion *pci_memory; MemoryRegion *rom_memory; DeviceState *icc_bridge; FWCfgState *fw_cfg = NULL; PcGuestInfo *guest_info; ram_addr_t lowmem; /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory). * If it doesn't, we need to split it in chunks below and above 4G. * In any case, try to make sure that guest addresses aligned at * 1G boundaries get mapped to host addresses aligned at 1G boundaries. * For old machine types, use whatever split we used historically to avoid * breaking migration. */ if (machine->ram_size >= 0xe0000000) { lowmem = gigabyte_align ? 0xc0000000 : 0xe0000000; } else { lowmem = 0xe0000000; } /* Handle the machine opt max-ram-below-4g. It is basically doing * min(qemu limit, user limit). */ if (lowmem > pc_machine->max_ram_below_4g) { lowmem = pc_machine->max_ram_below_4g; if (machine->ram_size - lowmem > lowmem && lowmem & ((1ULL << 30) - 1)) { error_report("Warning: Large machine and max_ram_below_4g(%"PRIu64 ") not a multiple of 1G; possible bad performance.", pc_machine->max_ram_below_4g); } } if (machine->ram_size >= lowmem) { above_4g_mem_size = machine->ram_size - lowmem; below_4g_mem_size = lowmem; } else { above_4g_mem_size = 0; below_4g_mem_size = machine->ram_size; } if (xen_enabled() && xen_hvm_init(&below_4g_mem_size, &above_4g_mem_size, &ram_memory) != 0) { fprintf(stderr, "xen hardware virtual machine initialisation failed\n"); exit(1); } icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE); object_property_add_child(qdev_get_machine(), "icc-bridge", OBJECT(icc_bridge), NULL); pc_cpus_init(machine->cpu_model, icc_bridge); if (kvm_enabled() && kvmclock_enabled) { kvmclock_create(); } if (pci_enabled) { pci_memory = g_new(MemoryRegion, 1); memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; } else { pci_memory = NULL; rom_memory = system_memory; } guest_info = pc_guest_info_init(below_4g_mem_size, above_4g_mem_size); guest_info->has_acpi_build = has_acpi_build; guest_info->legacy_acpi_table_size = legacy_acpi_table_size; guest_info->isapc_ram_fw = !pci_enabled; guest_info->has_reserved_memory = has_reserved_memory; guest_info->rsdp_in_ram = rsdp_in_ram; if (smbios_defaults) { MachineClass *mc = MACHINE_GET_CLASS(machine); /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", mc->name, smbios_legacy_mode, smbios_uuid_encoded); } /* allocate ram and load rom/bios */ if (!xen_enabled()) { fw_cfg = pc_memory_init(machine, system_memory, below_4g_mem_size, above_4g_mem_size, rom_memory, &ram_memory, guest_info); } else if (machine->kernel_filename != NULL) { /* For xen HVM direct kernel boot, load linux here */ fw_cfg = xen_load_linux(machine->kernel_filename, machine->kernel_cmdline, machine->initrd_filename, below_4g_mem_size, guest_info); } gsi_state = g_malloc0(sizeof(*gsi_state)); if (kvm_irqchip_in_kernel()) { kvm_pc_setup_irq_routing(pci_enabled); gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, GSI_NUM_PINS); } else { gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); } if (pci_enabled) { pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi, system_memory, system_io, machine->ram_size, below_4g_mem_size, above_4g_mem_size, pci_memory, ram_memory); } else { pci_bus = NULL; i440fx_state = NULL; isa_bus = isa_bus_new(NULL, get_system_memory(), system_io); no_hpet = 1; } isa_bus_irqs(isa_bus, gsi); if (kvm_irqchip_in_kernel()) { i8259 = kvm_i8259_init(isa_bus); } else if (xen_enabled()) { i8259 = xen_interrupt_controller_init(); } else { cpu_irq = pc_allocate_cpu_irq(); i8259 = i8259_init(isa_bus, cpu_irq[0]); } for (i = 0; i < ISA_NUM_IRQS; i++) { gsi_state->i8259_irq[i] = i8259[i]; } if (pci_enabled) { ioapic_init_gsi(gsi_state, "i440fx"); } qdev_init_nofail(icc_bridge); pc_register_ferr_irq(gsi[13]); pc_vga_init(isa_bus, pci_enabled ? pci_bus : NULL); assert(pc_machine->vmport != ON_OFF_AUTO_MAX); if (pc_machine->vmport == ON_OFF_AUTO_AUTO) { pc_machine->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; } /* init basic PC hardware */ pc_basic_device_init(isa_bus, gsi, &rtc_state, true, &floppy, (pc_machine->vmport != ON_OFF_AUTO_ON), 0x4); pc_nic_init(isa_bus, pci_bus); ide_drive_get(hd, ARRAY_SIZE(hd)); if (pci_enabled) { PCIDevice *dev; if (xen_enabled()) { dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); } else { dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); } idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); } else { for(i = 0; i < MAX_IDE_BUS; i++) { ISADevice *dev; char busname[] = "ide.0"; dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); /* * The ide bus name is ide.0 for the first bus and ide.1 for the * second one. */ busname[4] = '0' + i; idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); } } pc_cmos_init(below_4g_mem_size, above_4g_mem_size, machine->boot_order, machine, floppy, idebus[0], idebus[1], rtc_state); if (pci_enabled && usb_enabled()) { pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); } if (pci_enabled && acpi_enabled) { DeviceState *piix4_pm; I2CBus *smbus; smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1); /* TODO: Populate SPD eeprom data. */ smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, gsi[9], *smi_irq, kvm_enabled(), fw_cfg, &piix4_pm); smbus_eeprom_init(smbus, 8, NULL, 0); object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, TYPE_HOTPLUG_HANDLER, (Object **)&pc_machine->acpi_dev, object_property_allow_set_link, OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); } if (pci_enabled) { pc_pci_device_init(pci_bus); } } | 12,749 |
0 | static int get_int32_le(QEMUFile *f, void *pv, size_t size) { int32_t *old = pv; int32_t new; qemu_get_sbe32s(f, &new); if (*old <= new) { return 0; } return -EINVAL; } | 12,750 |
0 | static void load_asl(GArray *sdts, AcpiSdtTable *sdt) { AcpiSdtTable *temp; GError *error = NULL; GString *command_line = g_string_new("'iasl' "); gint fd; gchar *out, *out_err; gboolean ret; int i; fd = g_file_open_tmp("asl-XXXXXX.dsl", &sdt->asl_file, &error); g_assert_no_error(error); close(fd); /* build command line */ g_string_append_printf(command_line, "-p %s ", sdt->asl_file); for (i = 0; i < 2; ++i) { /* reference DSDT and SSDT */ temp = &g_array_index(sdts, AcpiSdtTable, i); g_string_append_printf(command_line, "-e %s ", temp->aml_file); } g_string_append_printf(command_line, "-d %s", sdt->aml_file); /* pass 'out' and 'out_err' in order to be redirected */ g_spawn_command_line_sync(command_line->str, &out, &out_err, NULL, &error); g_assert_no_error(error); ret = g_file_get_contents(sdt->asl_file, (gchar **)&sdt->asl, &sdt->asl_len, &error); g_assert(ret); g_assert_no_error(error); g_assert(sdt->asl_len); g_free(out); g_free(out_err); g_string_free(command_line, true); } | 12,751 |
0 | static void gen_advance_ccount(DisasContext *dc) { if (dc->ccount_delta > 0) { TCGv_i32 tmp = tcg_const_i32(dc->ccount_delta); dc->ccount_delta = 0; gen_helper_advance_ccount(cpu_env, tmp); tcg_temp_free(tmp); } } | 12,752 |
0 | static av_cold int libgsm_close(AVCodecContext *avctx) { av_freep(&avctx->coded_frame); gsm_destroy(avctx->priv_data); avctx->priv_data = NULL; return 0; } | 12,753 |
0 | static void uhci_ioport_writel(void *opaque, uint32_t addr, uint32_t val) { UHCIState *s = opaque; addr &= 0x1f; #ifdef DEBUG printf("uhci writel port=0x%04x val=0x%08x\n", addr, val); #endif switch(addr) { case 0x08: s->fl_base_addr = val & ~0xfff; break; } } | 12,754 |
0 | hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) { X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; target_ulong pde_addr, pte_addr; uint64_t pte; hwaddr paddr; uint32_t page_offset; int page_size; if (env->cr[4] & CR4_PAE_MASK) { target_ulong pdpe_addr; uint64_t pde, pdpe; #ifdef TARGET_X86_64 if (env->hflags & HF_LMA_MASK) { uint64_t pml4e_addr, pml4e; int32_t sext; /* test virtual address sign extension */ sext = (int64_t)addr >> 47; if (sext != 0 && sext != -1) return -1; pml4e_addr = ((env->cr[3] & ~0xfff) + (((addr >> 39) & 0x1ff) << 3)) & env->a20_mask; pml4e = ldq_phys(pml4e_addr); if (!(pml4e & PG_PRESENT_MASK)) return -1; pdpe_addr = ((pml4e & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) + (((addr >> 30) & 0x1ff) << 3)) & env->a20_mask; pdpe = ldq_phys(pdpe_addr); if (!(pdpe & PG_PRESENT_MASK)) return -1; } else #endif { pdpe_addr = ((env->cr[3] & ~0x1f) + ((addr >> 27) & 0x18)) & env->a20_mask; pdpe = ldq_phys(pdpe_addr); if (!(pdpe & PG_PRESENT_MASK)) return -1; } pde_addr = ((pdpe & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) + (((addr >> 21) & 0x1ff) << 3)) & env->a20_mask; pde = ldq_phys(pde_addr); if (!(pde & PG_PRESENT_MASK)) { return -1; } if (pde & PG_PSE_MASK) { /* 2 MB page */ page_size = 2048 * 1024; pte = pde & ~( (page_size - 1) & ~0xfff); /* align to page_size */ } else { /* 4 KB page */ pte_addr = ((pde & ~0xfff & ~(PG_NX_MASK | PG_HI_USER_MASK)) + (((addr >> 12) & 0x1ff) << 3)) & env->a20_mask; page_size = 4096; pte = ldq_phys(pte_addr); } pte &= ~(PG_NX_MASK | PG_HI_USER_MASK); if (!(pte & PG_PRESENT_MASK)) return -1; } else { uint32_t pde; if (!(env->cr[0] & CR0_PG_MASK)) { pte = addr; page_size = 4096; } else { /* page directory entry */ pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask; pde = ldl_phys(pde_addr); if (!(pde & PG_PRESENT_MASK)) return -1; if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { pte = pde & ~0x003ff000; /* align to 4MB */ page_size = 4096 * 1024; } else { /* page directory entry */ pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask; pte = ldl_phys(pte_addr); if (!(pte & PG_PRESENT_MASK)) return -1; page_size = 4096; } } pte = pte & env->a20_mask; } page_offset = (addr & TARGET_PAGE_MASK) & (page_size - 1); paddr = (pte & TARGET_PAGE_MASK) + page_offset; return paddr; } | 12,755 |
0 | static int hda_audio_init(HDACodecDevice *hda, const struct desc_codec *desc) { HDAAudioState *a = HDA_AUDIO(hda); HDAAudioStream *st; const desc_node *node; const desc_param *param; uint32_t i, type; a->desc = desc; a->name = object_get_typename(OBJECT(a)); dprint(a, 1, "%s: cad %d\n", __FUNCTION__, a->hda.cad); AUD_register_card("hda", &a->card); for (i = 0; i < a->desc->nnodes; i++) { node = a->desc->nodes + i; param = hda_codec_find_param(node, AC_PAR_AUDIO_WIDGET_CAP); if (param == NULL) { continue; } type = (param->val & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT; switch (type) { case AC_WID_AUD_OUT: case AC_WID_AUD_IN: assert(node->stindex < ARRAY_SIZE(a->st)); st = a->st + node->stindex; st->state = a; st->node = node; if (type == AC_WID_AUD_OUT) { /* unmute output by default */ st->gain_left = QEMU_HDA_AMP_STEPS; st->gain_right = QEMU_HDA_AMP_STEPS; st->bpos = sizeof(st->buf); st->output = true; } else { st->output = false; } st->format = AC_FMT_TYPE_PCM | AC_FMT_BITS_16 | (1 << AC_FMT_CHAN_SHIFT); hda_codec_parse_fmt(st->format, &st->as); hda_audio_setup(st); break; } } return 0; } | 12,756 |
0 | static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid, unsigned int epid, unsigned int streamid) { XHCIStreamContext *stctx; XHCIEPContext *epctx; XHCIRing *ring; USBEndpoint *ep = NULL; uint64_t mfindex; int length; int i; trace_usb_xhci_ep_kick(slotid, epid, streamid); assert(slotid >= 1 && slotid <= xhci->numslots); assert(epid >= 1 && epid <= 31); if (!xhci->slots[slotid-1].enabled) { DPRINTF("xhci: xhci_kick_ep for disabled slot %d\n", slotid); return; } epctx = xhci->slots[slotid-1].eps[epid-1]; if (!epctx) { DPRINTF("xhci: xhci_kick_ep for disabled endpoint %d,%d\n", epid, slotid); return; } /* If the device has been detached, but the guest has not noticed this yet the 2 above checks will succeed, but we must NOT continue */ if (!xhci->slots[slotid - 1].uport || !xhci->slots[slotid - 1].uport->dev || !xhci->slots[slotid - 1].uport->dev->attached) { return; } if (epctx->retry) { XHCITransfer *xfer = epctx->retry; trace_usb_xhci_xfer_retry(xfer); assert(xfer->running_retry); if (xfer->timed_xfer) { /* time to kick the transfer? */ mfindex = xhci_mfindex_get(xhci); xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex); if (xfer->running_retry) { return; } xfer->timed_xfer = 0; xfer->running_retry = 1; } if (xfer->iso_xfer) { /* retry iso transfer */ if (xhci_setup_packet(xfer) < 0) { return; } usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); assert(xfer->packet.status != USB_RET_NAK); xhci_complete_packet(xfer); } else { /* retry nak'ed transfer */ if (xhci_setup_packet(xfer) < 0) { return; } usb_handle_packet(xfer->packet.ep->dev, &xfer->packet); if (xfer->packet.status == USB_RET_NAK) { return; } xhci_complete_packet(xfer); } assert(!xfer->running_retry); epctx->retry = NULL; } if (epctx->state == EP_HALTED) { DPRINTF("xhci: ep halted, not running schedule\n"); return; } if (epctx->nr_pstreams) { uint32_t err; stctx = xhci_find_stream(epctx, streamid, &err); if (stctx == NULL) { return; } ring = &stctx->ring; xhci_set_ep_state(xhci, epctx, stctx, EP_RUNNING); } else { ring = &epctx->ring; streamid = 0; xhci_set_ep_state(xhci, epctx, NULL, EP_RUNNING); } assert(ring->dequeue != 0); while (1) { XHCITransfer *xfer = &epctx->transfers[epctx->next_xfer]; if (xfer->running_async || xfer->running_retry) { break; } length = xhci_ring_chain_length(xhci, ring); if (length < 0) { break; } else if (length == 0) { break; } if (xfer->trbs && xfer->trb_alloced < length) { xfer->trb_count = 0; xfer->trb_alloced = 0; g_free(xfer->trbs); xfer->trbs = NULL; } if (!xfer->trbs) { xfer->trbs = g_new(XHCITRB, length); xfer->trb_alloced = length; } xfer->trb_count = length; for (i = 0; i < length; i++) { TRBType type; type = xhci_ring_fetch(xhci, ring, &xfer->trbs[i], NULL); assert(type); } xfer->streamid = streamid; if (epid == 1) { if (xhci_fire_ctl_transfer(xhci, xfer) >= 0) { epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; } else { DPRINTF("xhci: error firing CTL transfer\n"); } } else { if (xhci_fire_transfer(xhci, xfer, epctx) >= 0) { epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE; } else { if (!xfer->timed_xfer) { DPRINTF("xhci: error firing data transfer\n"); } } } if (epctx->state == EP_HALTED) { break; } if (xfer->running_retry) { DPRINTF("xhci: xfer nacked, stopping schedule\n"); epctx->retry = xfer; break; } } ep = xhci_epid_to_usbep(xhci, slotid, epid); if (ep) { usb_device_flush_ep_queue(ep->dev, ep); } } | 12,757 |
0 | static int pl181_init(SysBusDevice *sbd) { DeviceState *dev = DEVICE(sbd); PL181State *s = PL181(dev); DriveInfo *dinfo; memory_region_init_io(&s->iomem, OBJECT(s), &pl181_ops, s, "pl181", 0x1000); sysbus_init_mmio(sbd, &s->iomem); sysbus_init_irq(sbd, &s->irq[0]); sysbus_init_irq(sbd, &s->irq[1]); qdev_init_gpio_out(dev, s->cardstatus, 2); dinfo = drive_get_next(IF_SD); s->card = sd_init(dinfo ? blk_bs(blk_by_legacy_dinfo(dinfo)) : NULL, false); if (s->card == NULL) { return -1; } return 0; } | 12,758 |
0 | static void curl_readv_bh_cb(void *p) { CURLState *state; CURLAIOCB *acb = p; BDRVCURLState *s = acb->common.bs->opaque; qemu_bh_delete(acb->bh); acb->bh = NULL; size_t start = acb->sector_num * SECTOR_SIZE; size_t end; // In case we have the requested data already (e.g. read-ahead), // we can just call the callback and be done. switch (curl_find_buf(s, start, acb->nb_sectors * SECTOR_SIZE, acb)) { case FIND_RET_OK: qemu_aio_release(acb); // fall through case FIND_RET_WAIT: return; default: break; } // No cache found, so let's start a new request state = curl_init_state(s); if (!state) { acb->common.cb(acb->common.opaque, -EIO); qemu_aio_release(acb); return; } acb->start = 0; acb->end = (acb->nb_sectors * SECTOR_SIZE); state->buf_off = 0; if (state->orig_buf) g_free(state->orig_buf); state->buf_start = start; state->buf_len = acb->end + s->readahead_size; end = MIN(start + state->buf_len, s->len) - 1; state->orig_buf = g_malloc(state->buf_len); state->acb[0] = acb; snprintf(state->range, 127, "%zd-%zd", start, end); DPRINTF("CURL (AIO): Reading %d at %zd (%s)\n", (acb->nb_sectors * SECTOR_SIZE), start, state->range); curl_easy_setopt(state->curl, CURLOPT_RANGE, state->range); curl_multi_add_handle(s->multi, state->curl); curl_multi_do(s); } | 12,759 |
0 | static void kvm_arm_gic_put(GICState *s) { uint32_t reg; int i; int cpu; int num_cpu; int num_irq; if (!kvm_arm_gic_can_save_restore(s)) { DPRINTF("Cannot put kernel gic state, no kernel interface"); return; } /* Note: We do the restore in a slightly different order than the save * (where the order doesn't matter and is simply ordered according to the * register offset values */ /***************************************************************** * Distributor State */ /* s->enabled -> GICD_CTLR */ reg = s->enabled; kvm_gicd_access(s, 0x0, 0, ®, true); /* Sanity checking on GICD_TYPER and s->num_irq, s->num_cpu */ kvm_gicd_access(s, 0x4, 0, ®, false); num_irq = ((reg & 0x1f) + 1) * 32; num_cpu = ((reg & 0xe0) >> 5) + 1; if (num_irq < s->num_irq) { fprintf(stderr, "Restoring %u IRQs, but kernel supports max %d\n", s->num_irq, num_irq); abort(); } else if (num_cpu != s->num_cpu) { fprintf(stderr, "Restoring %u CPU interfaces, kernel only has %d\n", s->num_cpu, num_cpu); /* Did we not create the VCPUs in the kernel yet? */ abort(); } /* TODO: Consider checking compatibility with the IIDR ? */ /* irq_state[n].enabled -> GICD_ISENABLERn */ kvm_dist_put(s, 0x180, 1, s->num_irq, translate_clear); kvm_dist_put(s, 0x100, 1, s->num_irq, translate_enabled); /* irq_state[n].group -> GICD_IGROUPRn */ kvm_dist_put(s, 0x80, 1, s->num_irq, translate_group); /* s->irq_target[irq] -> GICD_ITARGETSRn * (restore targets before pending to ensure the pending state is set on * the appropriate CPU interfaces in the kernel) */ kvm_dist_put(s, 0x800, 8, s->num_irq, translate_targets); /* irq_state[n].trigger -> GICD_ICFGRn * (restore configuration registers before pending IRQs so we treat * level/edge correctly) */ kvm_dist_put(s, 0xc00, 2, s->num_irq, translate_trigger); /* irq_state[n].pending + irq_state[n].level -> GICD_ISPENDRn */ kvm_dist_put(s, 0x280, 1, s->num_irq, translate_clear); kvm_dist_put(s, 0x200, 1, s->num_irq, translate_pending); /* irq_state[n].active -> GICD_ISACTIVERn */ kvm_dist_put(s, 0x380, 1, s->num_irq, translate_clear); kvm_dist_put(s, 0x300, 1, s->num_irq, translate_active); /* s->priorityX[irq] -> ICD_IPRIORITYRn */ kvm_dist_put(s, 0x400, 8, s->num_irq, translate_priority); /* s->sgi_pending -> ICD_CPENDSGIRn */ kvm_dist_put(s, 0xf10, 8, GIC_NR_SGIS, translate_clear); kvm_dist_put(s, 0xf20, 8, GIC_NR_SGIS, translate_sgisource); /***************************************************************** * CPU Interface(s) State */ for (cpu = 0; cpu < s->num_cpu; cpu++) { /* s->cpu_enabled[cpu] -> GICC_CTLR */ reg = s->cpu_enabled[cpu]; kvm_gicc_access(s, 0x00, cpu, ®, true); /* s->priority_mask[cpu] -> GICC_PMR */ reg = (s->priority_mask[cpu] & 0xff); kvm_gicc_access(s, 0x04, cpu, ®, true); /* s->bpr[cpu] -> GICC_BPR */ reg = (s->bpr[cpu] & 0x7); kvm_gicc_access(s, 0x08, cpu, ®, true); /* s->abpr[cpu] -> GICC_ABPR */ reg = (s->abpr[cpu] & 0x7); kvm_gicc_access(s, 0x1c, cpu, ®, true); /* s->apr[n][cpu] -> GICC_APRn */ for (i = 0; i < 4; i++) { reg = s->apr[i][cpu]; kvm_gicc_access(s, 0xd0 + i * 4, cpu, ®, true); } } } | 12,760 |
0 | void readline_handle_byte(ReadLineState *rs, int ch) { switch(rs->esc_state) { case IS_NORM: switch(ch) { case 1: readline_bol(rs); break; case 4: readline_delete_char(rs); break; case 5: readline_eol(rs); break; case 9: readline_completion(rs); break; case 10: case 13: rs->cmd_buf[rs->cmd_buf_size] = '\0'; if (!rs->read_password) readline_hist_add(rs, rs->cmd_buf); monitor_printf(rs->mon, "\n"); rs->cmd_buf_index = 0; rs->cmd_buf_size = 0; rs->last_cmd_buf_index = 0; rs->last_cmd_buf_size = 0; rs->readline_func(rs->mon, rs->cmd_buf, rs->readline_opaque); break; case 23: /* ^W */ readline_backword(rs); break; case 27: rs->esc_state = IS_ESC; break; case 127: case 8: readline_backspace(rs); break; case 155: rs->esc_state = IS_CSI; break; default: if (ch >= 32) { readline_insert_char(rs, ch); } break; } break; case IS_ESC: if (ch == '[') { rs->esc_state = IS_CSI; rs->esc_param = 0; } else if (ch == 'O') { rs->esc_state = IS_SS3; rs->esc_param = 0; } else { rs->esc_state = IS_NORM; } break; case IS_CSI: switch(ch) { case 'A': case 'F': readline_up_char(rs); break; case 'B': case 'E': readline_down_char(rs); break; case 'D': readline_backward_char(rs); break; case 'C': readline_forward_char(rs); break; case '0' ... '9': rs->esc_param = rs->esc_param * 10 + (ch - '0'); goto the_end; case '~': switch(rs->esc_param) { case 1: readline_bol(rs); break; case 3: readline_delete_char(rs); break; case 4: readline_eol(rs); break; } break; default: break; } rs->esc_state = IS_NORM; the_end: break; case IS_SS3: switch(ch) { case 'F': readline_eol(rs); break; case 'H': readline_bol(rs); break; } rs->esc_state = IS_NORM; break; } readline_update(rs); } | 12,761 |
0 | static void ats_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { hwaddr phys_addr; target_ulong page_size; int prot; int ret, is_user = ri->opc2 & 2; int access_type = ri->opc2 & 1; ret = get_phys_addr(env, value, access_type, is_user, &phys_addr, &prot, &page_size); if (extended_addresses_enabled(env)) { /* ret is a DFSR/IFSR value for the long descriptor * translation table format, but with WnR always clear. * Convert it to a 64-bit PAR. */ uint64_t par64 = (1 << 11); /* LPAE bit always set */ if (ret == 0) { par64 |= phys_addr & ~0xfffULL; /* We don't set the ATTR or SH fields in the PAR. */ } else { par64 |= 1; /* F */ par64 |= (ret & 0x3f) << 1; /* FS */ /* Note that S2WLK and FSTAGE are always zero, because we don't * implement virtualization and therefore there can't be a stage 2 * fault. */ } env->cp15.par_el1 = par64; } else { /* ret is a DFSR/IFSR value for the short descriptor * translation table format (with WnR always clear). * Convert it to a 32-bit PAR. */ if (ret == 0) { /* We do not set any attribute bits in the PAR */ if (page_size == (1 << 24) && arm_feature(env, ARM_FEATURE_V7)) { env->cp15.par_el1 = (phys_addr & 0xff000000) | 1 << 1; } else { env->cp15.par_el1 = phys_addr & 0xfffff000; } } else { env->cp15.par_el1 = ((ret & (1 << 10)) >> 5) | ((ret & (1 << 12)) >> 6) | ((ret & 0xf) << 1) | 1; } } } | 12,763 |
0 | static void test_hybrid_analysis(void) { LOCAL_ALIGNED_16(INTFLOAT, dst0, [BUF_SIZE], [2]); LOCAL_ALIGNED_16(INTFLOAT, dst1, [BUF_SIZE], [2]); LOCAL_ALIGNED_16(INTFLOAT, in, [12], [2]); LOCAL_ALIGNED_16(INTFLOAT, filter, [N], [8][2]); declare_func(void, INTFLOAT (*out)[2], INTFLOAT (*in)[2], const INTFLOAT (*filter)[8][2], ptrdiff_t stride, int n); randomize((INTFLOAT *)in, 12 * 2); randomize((INTFLOAT *)filter, N * 8 * 2); randomize((INTFLOAT *)dst0, BUF_SIZE * 2); memcpy(dst1, dst0, BUF_SIZE * 2 * sizeof(INTFLOAT)); call_ref(dst0, in, filter, STRIDE, N); call_new(dst1, in, filter, STRIDE, N); if (!float_near_abs_eps_array((float *)dst0, (float *)dst1, EPS, BUF_SIZE * 2)) fail(); bench_new(dst1, in, filter, STRIDE, N); } | 12,764 |
0 | static void test_qemu_strtoul_full_max(void) { char *str = g_strdup_printf("%lu", ULONG_MAX); unsigned long res = 999; int err; err = qemu_strtoul(str, NULL, 0, &res); g_assert_cmpint(err, ==, 0); g_assert_cmpint(res, ==, ULONG_MAX); g_free(str); } | 12,766 |
0 | static uint64_t assigned_dev_ioport_read(void *opaque, target_phys_addr_t addr, unsigned size) { return assigned_dev_ioport_rw(opaque, addr, size, NULL); } | 12,767 |
0 | int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr) { RAMBlock *block; uint8_t *host = ptr; if (xen_enabled()) { *ram_addr = xen_ram_addr_from_mapcache(ptr); return 0; } QTAILQ_FOREACH(block, &ram_list.blocks, next) { /* This case append when the block is not mapped. */ if (block->host == NULL) { continue; } if (host - block->host < block->length) { *ram_addr = block->offset + (host - block->host); return 0; } } return -1; } | 12,768 |
0 | static void address_space_update_topology_pass(AddressSpace *as, const FlatView *old_view, const FlatView *new_view, bool adding) { unsigned iold, inew; FlatRange *frold, *frnew; /* Generate a symmetric difference of the old and new memory maps. * Kill ranges in the old map, and instantiate ranges in the new map. */ iold = inew = 0; while (iold < old_view->nr || inew < new_view->nr) { if (iold < old_view->nr) { frold = &old_view->ranges[iold]; } else { frold = NULL; } if (inew < new_view->nr) { frnew = &new_view->ranges[inew]; } else { frnew = NULL; } if (frold && (!frnew || int128_lt(frold->addr.start, frnew->addr.start) || (int128_eq(frold->addr.start, frnew->addr.start) && !flatrange_equal(frold, frnew)))) { /* In old but not in new, or in both but attributes changed. */ if (!adding) { MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del); } ++iold; } else if (frold && frnew && flatrange_equal(frold, frnew)) { /* In both and unchanged (except logging may have changed) */ if (adding) { MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop); if (frold->dirty_log_mask && !frnew->dirty_log_mask) { MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop); } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) { MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start); } } ++iold; ++inew; } else { /* In new */ if (adding) { MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add); } ++inew; } } } | 12,769 |
0 | static void pxb_dev_exitfn(PCIDevice *pci_dev) { PXBDev *pxb = PXB_DEV(pci_dev); pxb_dev_list = g_list_remove(pxb_dev_list, pxb); } | 12,770 |
0 | static void ne2000_write(void *opaque, target_phys_addr_t addr, uint64_t data, unsigned size) { NE2000State *s = opaque; if (addr < 0x10 && size == 1) { ne2000_ioport_write(s, addr, data); } else if (addr == 0x10) { if (size <= 2) { ne2000_asic_ioport_write(s, addr, data); } else { ne2000_asic_ioport_writel(s, addr, data); } } else if (addr == 0x1f && size == 1) { ne2000_reset_ioport_write(s, addr, data); } } | 12,771 |
0 | static void cuda_writew (void *opaque, target_phys_addr_t addr, uint32_t value) { } | 12,772 |
0 | void smbios_set_defaults(const char *manufacturer, const char *product, const char *version) { SMBIOS_SET_DEFAULT(type1.manufacturer, manufacturer); SMBIOS_SET_DEFAULT(type1.product, product); SMBIOS_SET_DEFAULT(type1.version, version); } | 12,773 |
0 | void qio_channel_socket_dgram_async(QIOChannelSocket *ioc, SocketAddressLegacy *localAddr, SocketAddressLegacy *remoteAddr, QIOTaskFunc callback, gpointer opaque, GDestroyNotify destroy) { QIOTask *task = qio_task_new( OBJECT(ioc), callback, opaque, destroy); struct QIOChannelSocketDGramWorkerData *data = g_new0( struct QIOChannelSocketDGramWorkerData, 1); data->localAddr = QAPI_CLONE(SocketAddressLegacy, localAddr); data->remoteAddr = QAPI_CLONE(SocketAddressLegacy, remoteAddr); trace_qio_channel_socket_dgram_async(ioc, localAddr, remoteAddr); qio_task_run_in_thread(task, qio_channel_socket_dgram_worker, data, qio_channel_socket_dgram_worker_free); } | 12,774 |
0 | static void spawn_thread_bh_fn(void *opaque) { ThreadPool *pool = opaque; qemu_mutex_lock(&pool->lock); do_spawn_thread(pool); qemu_mutex_unlock(&pool->lock); } | 12,776 |
1 | static void ppc_prep_init(MachineState *machine) { ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; const char *initrd_filename = machine->initrd_filename; const char *boot_device = machine->boot_order; MemoryRegion *sysmem = get_system_memory(); PowerPCCPU *cpu = NULL; CPUPPCState *env = NULL; Nvram *m48t59; #if 0 MemoryRegion *xcsr = g_new(MemoryRegion, 1); #endif int linux_boot, i, nb_nics1; MemoryRegion *ram = g_new(MemoryRegion, 1); uint32_t kernel_base, initrd_base; long kernel_size, initrd_size; DeviceState *dev; PCIHostState *pcihost; PCIBus *pci_bus; PCIDevice *pci; ISABus *isa_bus; ISADevice *isa; int ppc_boot_device; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; sysctrl = g_malloc0(sizeof(sysctrl_t)); linux_boot = (kernel_filename != NULL); /* init CPUs */ if (machine->cpu_model == NULL) machine->cpu_model = "602"; for (i = 0; i < smp_cpus; i++) { cpu = POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_model)); if (cpu == NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); } env = &cpu->env; if (env->flags & POWERPC_FLAG_RTC_CLK) { /* POWER / PowerPC 601 RTC clock frequency is 7.8125 MHz */ cpu_ppc_tb_init(env, 7812500UL); } else { /* Set time-base frequency to 100 Mhz */ cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); } qemu_register_reset(ppc_prep_reset, cpu); } /* allocate RAM */ memory_region_allocate_system_memory(ram, NULL, "ppc_prep.ram", ram_size); memory_region_add_subregion(sysmem, 0, ram); if (linux_boot) { kernel_base = KERNEL_LOAD_ADDR; /* now we can load the kernel */ kernel_size = load_image_targphys(kernel_filename, kernel_base, ram_size - kernel_base); if (kernel_size < 0) { error_report("could not load kernel '%s'", kernel_filename); exit(1); } /* load initrd */ if (initrd_filename) { initrd_base = INITRD_LOAD_ADDR; initrd_size = load_image_targphys(initrd_filename, initrd_base, ram_size - initrd_base); if (initrd_size < 0) { error_report("could not load initial ram disk '%s'", initrd_filename); exit(1); } } else { initrd_base = 0; initrd_size = 0; } ppc_boot_device = 'm'; } else { kernel_base = 0; kernel_size = 0; initrd_base = 0; initrd_size = 0; ppc_boot_device = '\0'; /* For now, OHW cannot boot from the network. */ for (i = 0; boot_device[i] != '\0'; i++) { if (boot_device[i] >= 'a' && boot_device[i] <= 'f') { ppc_boot_device = boot_device[i]; break; } } if (ppc_boot_device == '\0') { fprintf(stderr, "No valid boot device for Mac99 machine\n"); exit(1); } } if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { error_report("Only 6xx bus is supported on PREP machine"); exit(1); } dev = qdev_create(NULL, "raven-pcihost"); if (bios_name == NULL) { bios_name = BIOS_FILENAME; } qdev_prop_set_string(dev, "bios-name", bios_name); qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE); pcihost = PCI_HOST_BRIDGE(dev); object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev), NULL); qdev_init_nofail(dev); pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci.0"); if (pci_bus == NULL) { fprintf(stderr, "Couldn't create PCI host controller.\n"); exit(1); } sysctrl->contiguous_map_irq = qdev_get_gpio_in(dev, 0); /* PCI -> ISA bridge */ pci = pci_create_simple(pci_bus, PCI_DEVFN(1, 0), "i82378"); cpu = POWERPC_CPU(first_cpu); qdev_connect_gpio_out(&pci->qdev, 0, cpu->env.irq_inputs[PPC6xx_INPUT_INT]); sysbus_connect_irq(&pcihost->busdev, 0, qdev_get_gpio_in(&pci->qdev, 9)); sysbus_connect_irq(&pcihost->busdev, 1, qdev_get_gpio_in(&pci->qdev, 11)); sysbus_connect_irq(&pcihost->busdev, 2, qdev_get_gpio_in(&pci->qdev, 9)); sysbus_connect_irq(&pcihost->busdev, 3, qdev_get_gpio_in(&pci->qdev, 11)); isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci), "isa.0")); /* Super I/O (parallel + serial ports) */ isa = isa_create(isa_bus, TYPE_PC87312); dev = DEVICE(isa); qdev_prop_set_uint8(dev, "config", 13); /* fdc, ser0, ser1, par0 */ qdev_init_nofail(dev); /* init basic PC hardware */ pci_vga_init(pci_bus); nb_nics1 = nb_nics; if (nb_nics1 > NE2000_NB_MAX) nb_nics1 = NE2000_NB_MAX; for(i = 0; i < nb_nics1; i++) { if (nd_table[i].model == NULL) { nd_table[i].model = g_strdup("ne2k_isa"); } if (strcmp(nd_table[i].model, "ne2k_isa") == 0) { isa_ne2000_init(isa_bus, ne2000_io[i], ne2000_irq[i], &nd_table[i]); } else { pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); } } ide_drive_get(hd, ARRAY_SIZE(hd)); for(i = 0; i < MAX_IDE_BUS; i++) { isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], hd[2 * i], hd[2 * i + 1]); } isa_create_simple(isa_bus, "i8042"); cpu = POWERPC_CPU(first_cpu); sysctrl->reset_irq = cpu->env.irq_inputs[PPC6xx_INPUT_HRESET]; portio_list_init(&prep_port_list, NULL, prep_portio_list, sysctrl, "prep"); portio_list_add(&prep_port_list, isa_address_space_io(isa), 0x0); /* PowerPC control and status register group */ #if 0 memory_region_init_io(xcsr, NULL, &PPC_XCSR_ops, NULL, "ppc-xcsr", 0x1000); memory_region_add_subregion(sysmem, 0xFEFF0000, xcsr); #endif if (machine_usb(machine)) { pci_create_simple(pci_bus, -1, "pci-ohci"); } m48t59 = m48t59_init_isa(isa_bus, 0x0074, NVRAM_SIZE, 2000, 59); if (m48t59 == NULL) return; sysctrl->nvram = m48t59; /* Initialise NVRAM */ PPC_NVRAM_set_params(m48t59, NVRAM_SIZE, "PREP", ram_size, ppc_boot_device, kernel_base, kernel_size, kernel_cmdline, initrd_base, initrd_size, /* XXX: need an option to load a NVRAM image */ 0, graphic_width, graphic_height, graphic_depth); } | 12,779 |
1 | gen_set_condexec (DisasContext *s) { if (s->condexec_mask) { uint32_t val = (s->condexec_cond << 4) | (s->condexec_mask >> 1); TCGv tmp = new_tmp(); tcg_gen_movi_i32(tmp, val); store_cpu_field(tmp, condexec_bits); } } | 12,781 |
1 | void *mcf_uart_init(qemu_irq irq, CharDriverState *chr) { mcf_uart_state *s; s = g_malloc0(sizeof(mcf_uart_state)); s->chr = chr; s->irq = irq; if (chr) { qemu_chr_add_handlers(chr, mcf_uart_can_receive, mcf_uart_receive, mcf_uart_event, s); } mcf_uart_reset(s); return s; } | 12,782 |
1 | static void parse_waveformatex(AVIOContext *pb, AVCodecParameters *par) { ff_asf_guid subformat; par->bits_per_coded_sample = avio_rl16(pb); par->channel_layout = avio_rl32(pb); /* dwChannelMask */ ff_get_guid(pb, &subformat); if (!memcmp(subformat + 4, (const uint8_t[]){ FF_MEDIASUBTYPE_BASE_GUID }, 12)) { par->codec_tag = AV_RL32(subformat); par->codec_id = ff_wav_codec_get_id(par->codec_tag, par->bits_per_coded_sample); } else { par->codec_id = ff_codec_guid_get_id(ff_codec_wav_guids, subformat); if (!par->codec_id) av_log(pb, AV_LOG_WARNING, "unknown subformat:"FF_PRI_GUID"\n", FF_ARG_GUID(subformat)); } } | 12,783 |
1 | static void ict_int(void *_src0, void *_src1, void *_src2, int csize) { int32_t *src0 = _src0, *src1 = _src1, *src2 = _src2; int32_t i0, i1, i2; int i; for (i = 0; i < csize; i++) { i0 = *src0 + (((i_ict_params[0] * *src2) + (1 << 15)) >> 16); i1 = *src0 - (((i_ict_params[1] * *src1) + (1 << 15)) >> 16) - (((i_ict_params[2] * *src2) + (1 << 15)) >> 16); i2 = *src0 + (((i_ict_params[3] * *src1) + (1 << 15)) >> 16); *src0++ = i0; *src1++ = i1; *src2++ = i2; } } | 12,784 |
1 | static int local_unlinkat_common(FsContext *ctx, int dirfd, const char *name, int flags) { int ret = -1; if (ctx->export_flags & V9FS_SM_MAPPED_FILE) { int map_dirfd; if (flags == AT_REMOVEDIR) { int fd; fd = openat(dirfd, name, O_RDONLY | O_DIRECTORY | O_PATH); if (fd == -1) { goto err_out; } /* * If directory remove .virtfs_metadata contained in the * directory */ ret = unlinkat(fd, VIRTFS_META_DIR, AT_REMOVEDIR); close_preserve_errno(fd); if (ret < 0 && errno != ENOENT) { /* * We didn't had the .virtfs_metadata file. May be file created * in non-mapped mode ?. Ignore ENOENT. */ goto err_out; } } /* * Now remove the name from parent directory * .virtfs_metadata directory. */ map_dirfd = openat_dir(dirfd, VIRTFS_META_DIR); ret = unlinkat(map_dirfd, name, 0); close_preserve_errno(map_dirfd); if (ret < 0 && errno != ENOENT) { /* * We didn't had the .virtfs_metadata file. May be file created * in non-mapped mode ?. Ignore ENOENT. */ goto err_out; } } ret = unlinkat(dirfd, name, flags); err_out: return ret; } | 12,788 |
1 | static void vc1_mc_4mv_luma(VC1Context *v, int n, int dir) { MpegEncContext *s = &v->s; DSPContext *dsp = &v->s.dsp; uint8_t *srcY; int dxy, mx, my, src_x, src_y; int off; int fieldmv = (v->fcm == ILACE_FRAME) ? v->blk_mv_type[s->block_index[n]] : 0; int v_edge_pos = s->v_edge_pos >> v->field_mode; if ((!v->field_mode || (v->ref_field_type[dir] == 1 && v->cur_field_type == 1)) && !v->s.last_picture.f.data[0]) mx = s->mv[dir][n][0]; my = s->mv[dir][n][1]; if (!dir) { if (v->field_mode) { if ((v->cur_field_type != v->ref_field_type[dir]) && v->second_field) srcY = s->current_picture.f.data[0]; else srcY = s->last_picture.f.data[0]; } else srcY = s->last_picture.f.data[0]; } else srcY = s->next_picture.f.data[0]; if (v->field_mode) { if (v->cur_field_type != v->ref_field_type[dir]) my = my - 2 + 4 * v->cur_field_type; } if (s->pict_type == AV_PICTURE_TYPE_P && n == 3 && v->field_mode) { int same_count = 0, opp_count = 0, k; int chosen_mv[2][4][2], f; int tx, ty; for (k = 0; k < 4; k++) { f = v->mv_f[0][s->block_index[k] + v->blocks_off]; chosen_mv[f][f ? opp_count : same_count][0] = s->mv[0][k][0]; chosen_mv[f][f ? opp_count : same_count][1] = s->mv[0][k][1]; opp_count += f; same_count += 1 - f; } f = opp_count > same_count; switch (f ? opp_count : same_count) { case 4: tx = median4(chosen_mv[f][0][0], chosen_mv[f][1][0], chosen_mv[f][2][0], chosen_mv[f][3][0]); ty = median4(chosen_mv[f][0][1], chosen_mv[f][1][1], chosen_mv[f][2][1], chosen_mv[f][3][1]); break; case 3: tx = mid_pred(chosen_mv[f][0][0], chosen_mv[f][1][0], chosen_mv[f][2][0]); ty = mid_pred(chosen_mv[f][0][1], chosen_mv[f][1][1], chosen_mv[f][2][1]); break; case 2: tx = (chosen_mv[f][0][0] + chosen_mv[f][1][0]) / 2; ty = (chosen_mv[f][0][1] + chosen_mv[f][1][1]) / 2; break; default: av_assert2(0); } s->current_picture.f.motion_val[1][s->block_index[0] + v->blocks_off][0] = tx; s->current_picture.f.motion_val[1][s->block_index[0] + v->blocks_off][1] = ty; for (k = 0; k < 4; k++) v->mv_f[1][s->block_index[k] + v->blocks_off] = f; } if (v->fcm == ILACE_FRAME) { // not sure if needed for other types of picture int qx, qy; int width = s->avctx->coded_width; int height = s->avctx->coded_height >> 1; qx = (s->mb_x * 16) + (mx >> 2); qy = (s->mb_y * 8) + (my >> 3); if (qx < -17) mx -= 4 * (qx + 17); else if (qx > width) mx -= 4 * (qx - width); if (qy < -18) my -= 8 * (qy + 18); else if (qy > height + 1) my -= 8 * (qy - height - 1); } if ((v->fcm == ILACE_FRAME) && fieldmv) off = ((n > 1) ? s->linesize : 0) + (n & 1) * 8; else off = s->linesize * 4 * (n & 2) + (n & 1) * 8; if (v->field_mode && v->second_field) off += s->current_picture_ptr->f.linesize[0]; src_x = s->mb_x * 16 + (n & 1) * 8 + (mx >> 2); if (!fieldmv) src_y = s->mb_y * 16 + (n & 2) * 4 + (my >> 2); else src_y = s->mb_y * 16 + ((n > 1) ? 1 : 0) + (my >> 2); if (v->profile != PROFILE_ADVANCED) { src_x = av_clip(src_x, -16, s->mb_width * 16); src_y = av_clip(src_y, -16, s->mb_height * 16); } else { src_x = av_clip(src_x, -17, s->avctx->coded_width); if (v->fcm == ILACE_FRAME) { if (src_y & 1) src_y = av_clip(src_y, -17, s->avctx->coded_height + 1); else src_y = av_clip(src_y, -18, s->avctx->coded_height); } else { src_y = av_clip(src_y, -18, s->avctx->coded_height + 1); } } srcY += src_y * s->linesize + src_x; if (v->field_mode && v->ref_field_type[dir]) srcY += s->current_picture_ptr->f.linesize[0]; if (fieldmv && !(src_y & 1)) v_edge_pos--; if (fieldmv && (src_y & 1) && src_y < 4) src_y--; if (v->rangeredfrm || (v->mv_mode == MV_PMODE_INTENSITY_COMP) || s->h_edge_pos < 13 || v_edge_pos < 23 || (unsigned)(src_x - s->mspel) > s->h_edge_pos - (mx & 3) - 8 - s->mspel * 2 || (unsigned)(src_y - (s->mspel << fieldmv)) > v_edge_pos - (my & 3) - ((8 + s->mspel * 2) << fieldmv)) { srcY -= s->mspel * (1 + (s->linesize << fieldmv)); /* check emulate edge stride and offset */ s->dsp.emulated_edge_mc(s->edge_emu_buffer, srcY, s->linesize, 9 + s->mspel * 2, (9 + s->mspel * 2) << fieldmv, src_x - s->mspel, src_y - (s->mspel << fieldmv), s->h_edge_pos, v_edge_pos); srcY = s->edge_emu_buffer; /* if we deal with range reduction we need to scale source blocks */ if (v->rangeredfrm) { int i, j; uint8_t *src; src = srcY; for (j = 0; j < 9 + s->mspel * 2; j++) { for (i = 0; i < 9 + s->mspel * 2; i++) src[i] = ((src[i] - 128) >> 1) + 128; src += s->linesize << fieldmv; } } /* if we deal with intensity compensation we need to scale source blocks */ if (v->mv_mode == MV_PMODE_INTENSITY_COMP) { int i, j; uint8_t *src; src = srcY; for (j = 0; j < 9 + s->mspel * 2; j++) { for (i = 0; i < 9 + s->mspel * 2; i++) src[i] = v->luty[src[i]]; src += s->linesize << fieldmv; } } srcY += s->mspel * (1 + (s->linesize << fieldmv)); } if (s->mspel) { dxy = ((my & 3) << 2) | (mx & 3); v->vc1dsp.put_vc1_mspel_pixels_tab[dxy](s->dest[0] + off, srcY, s->linesize << fieldmv, v->rnd); } else { // hpel mc - always used for luma dxy = (my & 2) | ((mx & 2) >> 1); if (!v->rnd) dsp->put_pixels_tab[1][dxy](s->dest[0] + off, srcY, s->linesize, 8); else dsp->put_no_rnd_pixels_tab[1][dxy](s->dest[0] + off, srcY, s->linesize, 8); } } | 12,790 |
1 | int main(int argc, char **argv) { int ret = EXIT_SUCCESS; GAState *s = g_new0(GAState, 1); GAConfig *config = g_new0(GAConfig, 1); config->log_level = G_LOG_LEVEL_ERROR | G_LOG_LEVEL_CRITICAL; module_call_init(MODULE_INIT_QAPI); init_dfl_pathnames(); config_load(config); config_parse(config, argc, argv); if (config->pid_filepath == NULL) { config->pid_filepath = g_strdup(dfl_pathnames.pidfile); if (config->state_dir == NULL) { config->state_dir = g_strdup(dfl_pathnames.state_dir); if (config->method == NULL) { config->method = g_strdup("virtio-serial"); if (config->channel_path == NULL) { if (strcmp(config->method, "virtio-serial") == 0) { /* try the default path for the virtio-serial port */ config->channel_path = g_strdup(QGA_VIRTIO_PATH_DEFAULT); } else if (strcmp(config->method, "isa-serial") == 0) { /* try the default path for the serial port - COM1 */ config->channel_path = g_strdup(QGA_SERIAL_PATH_DEFAULT); } else { g_critical("must specify a path for this channel"); ret = EXIT_FAILURE; goto end; s->log_level = config->log_level; s->log_file = stderr; #ifdef CONFIG_FSFREEZE s->fsfreeze_hook = config->fsfreeze_hook; #endif s->pstate_filepath = g_strdup_printf("%s/qga.state", config->state_dir); s->state_filepath_isfrozen = g_strdup_printf("%s/qga.state.isfrozen", config->state_dir); s->frozen = check_is_frozen(s); if (config->dumpconf) { config_dump(config); goto end; ret = run_agent(s, config); end: if (s->command_state) { ga_command_state_cleanup_all(s->command_state); ga_command_state_free(s->command_state); json_message_parser_destroy(&s->parser); if (s->channel) { ga_channel_free(s->channel); g_free(s->pstate_filepath); g_free(s->state_filepath_isfrozen); if (config->daemonize) { unlink(config->pid_filepath); config_free(config); return ret; | 12,791 |
1 | static int gen_rp_interrupts_init(PCIDevice *d, Error **errp) { int rc; rc = msix_init_exclusive_bar(d, GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR, 0); if (rc < 0) { assert(rc == -ENOTSUP); error_setg(errp, "Unable to init msix vectors"); } else { msix_vector_use(d, 0); } return rc; } | 12,792 |
0 | static int vaapi_decode_make_config(AVCodecContext *avctx) { VAAPIDecodeContext *ctx = avctx->internal->hwaccel_priv_data; AVVAAPIHWConfig *hwconfig = NULL; AVHWFramesConstraints *constraints = NULL; VAStatus vas; int err, i, j; const AVCodecDescriptor *codec_desc; VAProfile profile, *profile_list = NULL; int profile_count, exact_match, alt_profile; const AVPixFmtDescriptor *sw_desc, *desc; codec_desc = avcodec_descriptor_get(avctx->codec_id); if (!codec_desc) { err = AVERROR(EINVAL); goto fail; } profile_count = vaMaxNumProfiles(ctx->hwctx->display); profile_list = av_malloc_array(profile_count, sizeof(VAProfile)); if (!profile_list) { err = AVERROR(ENOMEM); goto fail; } vas = vaQueryConfigProfiles(ctx->hwctx->display, profile_list, &profile_count); if (vas != VA_STATUS_SUCCESS) { av_log(avctx, AV_LOG_ERROR, "Failed to query profiles: " "%d (%s).\n", vas, vaErrorStr(vas)); err = AVERROR(ENOSYS); goto fail; } profile = VAProfileNone; exact_match = 0; for (i = 0; i < FF_ARRAY_ELEMS(vaapi_profile_map); i++) { int profile_match = 0; if (avctx->codec_id != vaapi_profile_map[i].codec_id) continue; if (avctx->profile == vaapi_profile_map[i].codec_profile || vaapi_profile_map[i].codec_profile == FF_PROFILE_UNKNOWN) profile_match = 1; profile = vaapi_profile_map[i].va_profile; for (j = 0; j < profile_count; j++) { if (profile == profile_list[j]) { exact_match = profile_match; break; } } if (j < profile_count) { if (exact_match) break; alt_profile = vaapi_profile_map[i].codec_profile; } } av_freep(&profile_list); if (profile == VAProfileNone) { av_log(avctx, AV_LOG_ERROR, "No support for codec %s " "profile %d.\n", codec_desc->name, avctx->profile); err = AVERROR(ENOSYS); goto fail; } if (!exact_match) { if (avctx->hwaccel_flags & AV_HWACCEL_FLAG_ALLOW_PROFILE_MISMATCH) { av_log(avctx, AV_LOG_VERBOSE, "Codec %s profile %d not " "supported for hardware decode.\n", codec_desc->name, avctx->profile); av_log(avctx, AV_LOG_WARNING, "Using possibly-" "incompatible profile %d instead.\n", alt_profile); } else { av_log(avctx, AV_LOG_VERBOSE, "Codec %s profile %d not " "supported for hardware decode.\n", codec_desc->name, avctx->profile); err = AVERROR(EINVAL); goto fail; } } ctx->va_profile = profile; ctx->va_entrypoint = VAEntrypointVLD; vas = vaCreateConfig(ctx->hwctx->display, ctx->va_profile, ctx->va_entrypoint, NULL, 0, &ctx->va_config); if (vas != VA_STATUS_SUCCESS) { av_log(avctx, AV_LOG_ERROR, "Failed to create decode " "configuration: %d (%s).\n", vas, vaErrorStr(vas)); err = AVERROR(EIO); goto fail; } hwconfig = av_hwdevice_hwconfig_alloc(avctx->hw_device_ctx ? avctx->hw_device_ctx : ctx->frames->device_ref); if (!hwconfig) { err = AVERROR(ENOMEM); goto fail; } hwconfig->config_id = ctx->va_config; constraints = av_hwdevice_get_hwframe_constraints(avctx->hw_device_ctx ? avctx->hw_device_ctx : ctx->frames->device_ref, hwconfig); if (!constraints) { err = AVERROR(ENOMEM); goto fail; } if (avctx->coded_width < constraints->min_width || avctx->coded_height < constraints->min_height || avctx->coded_width > constraints->max_width || avctx->coded_height > constraints->max_height) { av_log(avctx, AV_LOG_ERROR, "Hardware does not support image " "size %dx%d (constraints: width %d-%d height %d-%d).\n", avctx->coded_width, avctx->coded_height, constraints->min_width, constraints->max_width, constraints->min_height, constraints->max_height); err = AVERROR(EINVAL); goto fail; } if (!constraints->valid_sw_formats || constraints->valid_sw_formats[0] == AV_PIX_FMT_NONE) { av_log(avctx, AV_LOG_ERROR, "Hardware does not offer any " "usable surface formats.\n"); err = AVERROR(EINVAL); goto fail; } // Find the first format in the list which matches the expected // bit depth and subsampling. If none are found (this can happen // when 10-bit streams are decoded to 8-bit surfaces, for example) // then just take the first format on the list. ctx->surface_format = constraints->valid_sw_formats[0]; sw_desc = av_pix_fmt_desc_get(avctx->sw_pix_fmt); for (i = 0; constraints->valid_sw_formats[i] != AV_PIX_FMT_NONE; i++) { desc = av_pix_fmt_desc_get(constraints->valid_sw_formats[i]); if (desc->nb_components != sw_desc->nb_components || desc->log2_chroma_w != sw_desc->log2_chroma_w || desc->log2_chroma_h != sw_desc->log2_chroma_h) continue; for (j = 0; j < desc->nb_components; j++) { if (desc->comp[j].depth != sw_desc->comp[j].depth) break; } if (j < desc->nb_components) continue; ctx->surface_format = constraints->valid_sw_formats[i]; break; } // Start with at least four surfaces. ctx->surface_count = 4; // Add per-codec number of surfaces used for storing reference frames. switch (avctx->codec_id) { case AV_CODEC_ID_H264: case AV_CODEC_ID_HEVC: ctx->surface_count += 16; break; case AV_CODEC_ID_VP9: ctx->surface_count += 8; break; case AV_CODEC_ID_VP8: ctx->surface_count += 3; break; default: ctx->surface_count += 2; } // Add an additional surface per thread is frame threading is enabled. if (avctx->active_thread_type & FF_THREAD_FRAME) ctx->surface_count += avctx->thread_count; av_hwframe_constraints_free(&constraints); av_freep(&hwconfig); return 0; fail: av_hwframe_constraints_free(&constraints); av_freep(&hwconfig); if (ctx->va_config != VA_INVALID_ID) { vaDestroyConfig(ctx->hwctx->display, ctx->va_config); ctx->va_config = VA_INVALID_ID; } av_freep(&profile_list); return err; } | 12,793 |
1 | static int parse_sandbox(void *opaque, QemuOpts *opts, Error **errp) { if (qemu_opt_get_bool(opts, "enable", false)) { #ifdef CONFIG_SECCOMP uint32_t seccomp_opts = QEMU_SECCOMP_SET_DEFAULT | QEMU_SECCOMP_SET_OBSOLETE; const char *value = NULL; value = qemu_opt_get(opts, "obsolete"); if (g_str_equal(value, "allow")) { seccomp_opts &= ~QEMU_SECCOMP_SET_OBSOLETE; } else if (g_str_equal(value, "deny")) { /* this is the default option, this if is here * to provide a little bit of consistency for * the command line */ error_report("invalid argument for obsolete"); if (seccomp_start(seccomp_opts) < 0) { error_report("failed to install seccomp syscall filter " "in the kernel"); #else error_report("seccomp support is disabled"); #endif return 0; | 12,794 |
1 | static const char *search_keyval(const TiffGeoTagKeyName *keys, int n, int id) { return ((TiffGeoTagKeyName*)bsearch(&id, keys, n, sizeof(keys[0]), cmp_id_key))->name; } | 12,795 |
1 | static int wm8750_tx(I2CSlave *i2c, uint8_t data) { WM8750State *s = (WM8750State *) i2c; uint8_t cmd; uint16_t value; if (s->i2c_len >= 2) { printf("%s: long message (%i bytes)\n", __FUNCTION__, s->i2c_len); #ifdef VERBOSE return 1; #endif } s->i2c_data[s->i2c_len ++] = data; if (s->i2c_len != 2) return 0; cmd = s->i2c_data[0] >> 1; value = ((s->i2c_data[0] << 8) | s->i2c_data[1]) & 0x1ff; switch (cmd) { case WM8750_LADCIN: /* ADC Signal Path Control (Left) */ s->diff[0] = (((value >> 6) & 3) == 3); /* LINSEL */ if (s->diff[0]) s->in[0] = &s->adc_voice[0 + s->ds * 1]; else s->in[0] = &s->adc_voice[((value >> 6) & 3) * 1 + 0]; break; case WM8750_RADCIN: /* ADC Signal Path Control (Right) */ s->diff[1] = (((value >> 6) & 3) == 3); /* RINSEL */ if (s->diff[1]) s->in[1] = &s->adc_voice[0 + s->ds * 1]; else s->in[1] = &s->adc_voice[((value >> 6) & 3) * 1 + 0]; break; case WM8750_ADCIN: /* ADC Input Mode */ s->ds = (value >> 8) & 1; /* DS */ if (s->diff[0]) s->in[0] = &s->adc_voice[0 + s->ds * 1]; if (s->diff[1]) s->in[1] = &s->adc_voice[0 + s->ds * 1]; s->monomix[0] = (value >> 6) & 3; /* MONOMIX */ break; case WM8750_ADCTL1: /* Additional Control (1) */ s->monomix[1] = (value >> 1) & 1; /* DMONOMIX */ break; case WM8750_PWR1: /* Power Management (1) */ s->enable = ((value >> 6) & 7) == 3; /* VMIDSEL, VREF */ wm8750_set_format(s); break; case WM8750_LINVOL: /* Left Channel PGA */ s->invol[0] = value & 0x3f; /* LINVOL */ s->inmute[0] = (value >> 7) & 1; /* LINMUTE */ wm8750_vol_update(s); break; case WM8750_RINVOL: /* Right Channel PGA */ s->invol[1] = value & 0x3f; /* RINVOL */ s->inmute[1] = (value >> 7) & 1; /* RINMUTE */ wm8750_vol_update(s); break; case WM8750_ADCDAC: /* ADC and DAC Control */ s->pol = (value >> 5) & 3; /* ADCPOL */ s->mute = (value >> 3) & 1; /* DACMU */ wm8750_vol_update(s); break; case WM8750_ADCTL3: /* Additional Control (3) */ break; case WM8750_LADC: /* Left ADC Digital Volume */ s->invol[2] = value & 0xff; /* LADCVOL */ wm8750_vol_update(s); break; case WM8750_RADC: /* Right ADC Digital Volume */ s->invol[3] = value & 0xff; /* RADCVOL */ wm8750_vol_update(s); break; case WM8750_ALC1: /* ALC Control (1) */ s->alc = (value >> 7) & 3; /* ALCSEL */ break; case WM8750_NGATE: /* Noise Gate Control */ case WM8750_3D: /* 3D enhance */ break; case WM8750_LDAC: /* Left Channel Digital Volume */ s->outvol[0] = value & 0xff; /* LDACVOL */ wm8750_vol_update(s); break; case WM8750_RDAC: /* Right Channel Digital Volume */ s->outvol[1] = value & 0xff; /* RDACVOL */ wm8750_vol_update(s); break; case WM8750_BASS: /* Bass Control */ break; case WM8750_LOUTM1: /* Left Mixer Control (1) */ s->path[0] = (value >> 8) & 1; /* LD2LO */ /* TODO: mute/unmute respective paths */ wm8750_vol_update(s); break; case WM8750_LOUTM2: /* Left Mixer Control (2) */ s->path[1] = (value >> 8) & 1; /* RD2LO */ /* TODO: mute/unmute respective paths */ wm8750_vol_update(s); break; case WM8750_ROUTM1: /* Right Mixer Control (1) */ s->path[2] = (value >> 8) & 1; /* LD2RO */ /* TODO: mute/unmute respective paths */ wm8750_vol_update(s); break; case WM8750_ROUTM2: /* Right Mixer Control (2) */ s->path[3] = (value >> 8) & 1; /* RD2RO */ /* TODO: mute/unmute respective paths */ wm8750_vol_update(s); break; case WM8750_MOUTM1: /* Mono Mixer Control (1) */ s->mpath[0] = (value >> 8) & 1; /* LD2MO */ /* TODO: mute/unmute respective paths */ wm8750_vol_update(s); break; case WM8750_MOUTM2: /* Mono Mixer Control (2) */ s->mpath[1] = (value >> 8) & 1; /* RD2MO */ /* TODO: mute/unmute respective paths */ wm8750_vol_update(s); break; case WM8750_LOUT1V: /* LOUT1 Volume */ s->outvol[2] = value & 0x7f; /* LOUT1VOL */ wm8750_vol_update(s); break; case WM8750_LOUT2V: /* LOUT2 Volume */ s->outvol[4] = value & 0x7f; /* LOUT2VOL */ wm8750_vol_update(s); break; case WM8750_ROUT1V: /* ROUT1 Volume */ s->outvol[3] = value & 0x7f; /* ROUT1VOL */ wm8750_vol_update(s); break; case WM8750_ROUT2V: /* ROUT2 Volume */ s->outvol[5] = value & 0x7f; /* ROUT2VOL */ wm8750_vol_update(s); break; case WM8750_MOUTV: /* MONOOUT Volume */ s->outvol[6] = value & 0x7f; /* MONOOUTVOL */ wm8750_vol_update(s); break; case WM8750_ADCTL2: /* Additional Control (2) */ break; case WM8750_PWR2: /* Power Management (2) */ s->power = value & 0x7e; /* TODO: mute/unmute respective paths */ wm8750_vol_update(s); break; case WM8750_IFACE: /* Digital Audio Interface Format */ s->format = value; s->master = (value >> 6) & 1; /* MS */ wm8750_clk_update(s, s->master); break; case WM8750_SRATE: /* Clocking and Sample Rate Control */ s->rate = &wm_rate_table[(value >> 1) & 0x1f]; wm8750_clk_update(s, 0); break; case WM8750_RESET: /* Reset */ wm8750_reset(&s->i2c); break; #ifdef VERBOSE default: printf("%s: unknown register %02x\n", __FUNCTION__, cmd); #endif } return 0; } | 12,797 |
1 | static QDict *qmp_dispatch_check_obj(const QObject *request, Error **errp) { const QDictEntry *ent; const char *arg_name; const QObject *arg_obj; bool has_exec_key = false; QDict *dict = NULL; dict = qobject_to_qdict(request); if (!dict) { error_setg(errp, QERR_QMP_BAD_INPUT_OBJECT, "request is not a dictionary"); return NULL; } for (ent = qdict_first(dict); ent; ent = qdict_next(dict, ent)) { arg_name = qdict_entry_key(ent); arg_obj = qdict_entry_value(ent); if (!strcmp(arg_name, "execute")) { if (qobject_type(arg_obj) != QTYPE_QSTRING) { error_setg(errp, QERR_QMP_BAD_INPUT_OBJECT_MEMBER, "execute", "string"); return NULL; } has_exec_key = true; } else if (!strcmp(arg_name, "arguments")) { if (qobject_type(arg_obj) != QTYPE_QDICT) { error_setg(errp, QERR_QMP_BAD_INPUT_OBJECT_MEMBER, "arguments", "object"); return NULL; } } else { error_setg(errp, QERR_QMP_EXTRA_MEMBER, arg_name); return NULL; } } if (!has_exec_key) { error_setg(errp, QERR_QMP_BAD_INPUT_OBJECT, "execute"); return NULL; } return dict; } | 12,798 |
1 | static void j2k_flush(J2kDecoderContext *s) { if (*s->buf == 0xff) s->buf++; s->bit_index = 8; s->buf++; } | 12,800 |
1 | av_cold int ff_ac3_encode_close(AVCodecContext *avctx) { int blk, ch; AC3EncodeContext *s = avctx->priv_data; av_freep(&s->windowed_samples); for (ch = 0; ch < s->channels; ch++) av_freep(&s->planar_samples[ch]); av_freep(&s->planar_samples); av_freep(&s->bap_buffer); av_freep(&s->bap1_buffer); av_freep(&s->mdct_coef_buffer); av_freep(&s->fixed_coef_buffer); av_freep(&s->exp_buffer); av_freep(&s->grouped_exp_buffer); av_freep(&s->psd_buffer); av_freep(&s->band_psd_buffer); av_freep(&s->mask_buffer); av_freep(&s->qmant_buffer); av_freep(&s->cpl_coord_exp_buffer); av_freep(&s->cpl_coord_mant_buffer); for (blk = 0; blk < s->num_blocks; blk++) { AC3Block *block = &s->blocks[blk]; av_freep(&block->mdct_coef); av_freep(&block->fixed_coef); av_freep(&block->exp); av_freep(&block->grouped_exp); av_freep(&block->psd); av_freep(&block->band_psd); av_freep(&block->mask); av_freep(&block->qmant); av_freep(&block->cpl_coord_exp); av_freep(&block->cpl_coord_mant); } s->mdct_end(s); return 0; } | 12,802 |
1 | static uint64_t pit_ioport_read(void *opaque, hwaddr addr, unsigned size) { PITCommonState *pit = opaque; int ret, count; PITChannelState *s; addr &= 3; s = &pit->channels[addr]; if (s->status_latched) { s->status_latched = 0; ret = s->status; } else if (s->count_latched) { switch(s->count_latched) { default: case RW_STATE_LSB: ret = s->latched_count & 0xff; s->count_latched = 0; break; case RW_STATE_MSB: ret = s->latched_count >> 8; s->count_latched = 0; break; case RW_STATE_WORD0: ret = s->latched_count & 0xff; s->count_latched = RW_STATE_MSB; break; } else { switch(s->read_state) { default: case RW_STATE_LSB: count = pit_get_count(s); ret = count & 0xff; break; case RW_STATE_MSB: count = pit_get_count(s); ret = (count >> 8) & 0xff; break; case RW_STATE_WORD0: count = pit_get_count(s); ret = count & 0xff; s->read_state = RW_STATE_WORD1; break; case RW_STATE_WORD1: count = pit_get_count(s); ret = (count >> 8) & 0xff; s->read_state = RW_STATE_WORD0; break; return ret; | 12,803 |
1 | static int ff_asf_parse_packet(AVFormatContext *s, AVIOContext *pb, AVPacket *pkt) { ASFContext *asf = s->priv_data; ASFStream *asf_st = 0; for (;;) { int ret; if(pb->eof_reached) return AVERROR_EOF; if (asf->packet_size_left < FRAME_HEADER_SIZE || asf->packet_segments < 1) { //asf->packet_size_left <= asf->packet_padsize) { int ret = asf->packet_size_left + asf->packet_padsize; //printf("PacketLeftSize:%d Pad:%d Pos:%"PRId64"\n", asf->packet_size_left, asf->packet_padsize, avio_tell(pb)); assert(ret>=0); /* fail safe */ avio_skip(pb, ret); asf->packet_pos= avio_tell(pb); if (asf->data_object_size != (uint64_t)-1 && (asf->packet_pos - asf->data_object_offset >= asf->data_object_size)) return AVERROR_EOF; /* Do not exceed the size of the data object */ return 1; } if (asf->packet_time_start == 0) { if(asf_read_frame_header(s, pb) < 0){ asf->packet_segments= 0; continue; } if (asf->stream_index < 0 || s->streams[asf->stream_index]->discard >= AVDISCARD_ALL || (!asf->packet_key_frame && s->streams[asf->stream_index]->discard >= AVDISCARD_NONKEY) ) { asf->packet_time_start = 0; /* unhandled packet (should not happen) */ avio_skip(pb, asf->packet_frag_size); asf->packet_size_left -= asf->packet_frag_size; if(asf->stream_index < 0) av_log(s, AV_LOG_ERROR, "ff asf skip %d (unknown stream)\n", asf->packet_frag_size); continue; } asf->asf_st = s->streams[asf->stream_index]->priv_data; } asf_st = asf->asf_st; if (asf->packet_replic_size == 1) { // frag_offset is here used as the beginning timestamp asf->packet_frag_timestamp = asf->packet_time_start; asf->packet_time_start += asf->packet_time_delta; asf->packet_obj_size = asf->packet_frag_size = avio_r8(pb); asf->packet_size_left--; asf->packet_multi_size--; if (asf->packet_multi_size < asf->packet_obj_size) { asf->packet_time_start = 0; avio_skip(pb, asf->packet_multi_size); asf->packet_size_left -= asf->packet_multi_size; continue; } asf->packet_multi_size -= asf->packet_obj_size; //printf("COMPRESS size %d %d %d ms:%d\n", asf->packet_obj_size, asf->packet_frag_timestamp, asf->packet_size_left, asf->packet_multi_size); } if( /*asf->packet_frag_size == asf->packet_obj_size*/ asf_st->frag_offset + asf->packet_frag_size <= asf_st->pkt.size && asf_st->frag_offset + asf->packet_frag_size > asf->packet_obj_size){ av_log(s, AV_LOG_INFO, "ignoring invalid packet_obj_size (%d %d %d %d)\n", asf_st->frag_offset, asf->packet_frag_size, asf->packet_obj_size, asf_st->pkt.size); asf->packet_obj_size= asf_st->pkt.size; } if ( asf_st->pkt.size != asf->packet_obj_size || asf_st->frag_offset + asf->packet_frag_size > asf_st->pkt.size) { //FIXME is this condition sufficient? if(asf_st->pkt.data){ av_log(s, AV_LOG_INFO, "freeing incomplete packet size %d, new %d\n", asf_st->pkt.size, asf->packet_obj_size); asf_st->frag_offset = 0; av_free_packet(&asf_st->pkt); } /* new packet */ av_new_packet(&asf_st->pkt, asf->packet_obj_size); asf_st->seq = asf->packet_seq; asf_st->pkt.dts = asf->packet_frag_timestamp - asf->hdr.preroll; asf_st->pkt.stream_index = asf->stream_index; asf_st->pkt.pos = asf_st->packet_pos= asf->packet_pos; if (asf_st->pkt.data && asf_st->palette_changed) { uint8_t *pal; pal = av_packet_new_side_data(&asf_st->pkt, AV_PKT_DATA_PALETTE, AVPALETTE_SIZE); if (!pal) { av_log(s, AV_LOG_ERROR, "Cannot append palette to packet\n"); } else { memcpy(pal, asf_st->palette, AVPALETTE_SIZE); asf_st->palette_changed = 0; } } //printf("new packet: stream:%d key:%d packet_key:%d audio:%d size:%d\n", //asf->stream_index, asf->packet_key_frame, asf_st->pkt.flags & AV_PKT_FLAG_KEY, //s->streams[asf->stream_index]->codec->codec_type == AVMEDIA_TYPE_AUDIO, asf->packet_obj_size); if (s->streams[asf->stream_index]->codec->codec_type == AVMEDIA_TYPE_AUDIO) asf->packet_key_frame = 1; if (asf->packet_key_frame) asf_st->pkt.flags |= AV_PKT_FLAG_KEY; } /* read data */ //printf("READ PACKET s:%d os:%d o:%d,%d l:%d DATA:%p\n", // s->packet_size, asf_st->pkt.size, asf->packet_frag_offset, // asf_st->frag_offset, asf->packet_frag_size, asf_st->pkt.data); asf->packet_size_left -= asf->packet_frag_size; if (asf->packet_size_left < 0) continue; if( asf->packet_frag_offset >= asf_st->pkt.size || asf->packet_frag_size > asf_st->pkt.size - asf->packet_frag_offset){ av_log(s, AV_LOG_ERROR, "packet fragment position invalid %u,%u not in %u\n", asf->packet_frag_offset, asf->packet_frag_size, asf_st->pkt.size); continue; } ret = avio_read(pb, asf_st->pkt.data + asf->packet_frag_offset, asf->packet_frag_size); if (ret != asf->packet_frag_size) { if (ret < 0 || asf->packet_frag_offset + ret == 0) return ret < 0 ? ret : AVERROR_EOF; if (asf_st->ds_span > 1) { // scrambling, we can either drop it completely or fill the remainder // TODO: should we fill the whole packet instead of just the current // fragment? memset(asf_st->pkt.data + asf->packet_frag_offset + ret, 0, asf->packet_frag_size - ret); ret = asf->packet_frag_size; } else // no scrambling, so we can return partial packets av_shrink_packet(&asf_st->pkt, asf->packet_frag_offset + ret); } if (s->key && s->keylen == 20) ff_asfcrypt_dec(s->key, asf_st->pkt.data + asf->packet_frag_offset, ret); asf_st->frag_offset += ret; /* test if whole packet is read */ if (asf_st->frag_offset == asf_st->pkt.size) { //workaround for macroshit radio DVR-MS files if( s->streams[asf->stream_index]->codec->codec_id == CODEC_ID_MPEG2VIDEO && asf_st->pkt.size > 100){ int i; for(i=0; i<asf_st->pkt.size && !asf_st->pkt.data[i]; i++); if(i == asf_st->pkt.size){ av_log(s, AV_LOG_DEBUG, "discarding ms fart\n"); asf_st->frag_offset = 0; av_free_packet(&asf_st->pkt); continue; } } /* return packet */ if (asf_st->ds_span > 1) { if(asf_st->pkt.size != asf_st->ds_packet_size * asf_st->ds_span){ av_log(s, AV_LOG_ERROR, "pkt.size != ds_packet_size * ds_span (%d %d %d)\n", asf_st->pkt.size, asf_st->ds_packet_size, asf_st->ds_span); }else{ /* packet descrambling */ uint8_t *newdata = av_malloc(asf_st->pkt.size + FF_INPUT_BUFFER_PADDING_SIZE); if (newdata) { int offset = 0; memset(newdata + asf_st->pkt.size, 0, FF_INPUT_BUFFER_PADDING_SIZE); while (offset < asf_st->pkt.size) { int off = offset / asf_st->ds_chunk_size; int row = off / asf_st->ds_span; int col = off % asf_st->ds_span; int idx = row + col * asf_st->ds_packet_size / asf_st->ds_chunk_size; //printf("off:%d row:%d col:%d idx:%d\n", off, row, col, idx); assert(offset + asf_st->ds_chunk_size <= asf_st->pkt.size); assert(idx+1 <= asf_st->pkt.size / asf_st->ds_chunk_size); memcpy(newdata + offset, asf_st->pkt.data + idx * asf_st->ds_chunk_size, asf_st->ds_chunk_size); offset += asf_st->ds_chunk_size; } av_free(asf_st->pkt.data); asf_st->pkt.data = newdata; } } } asf_st->frag_offset = 0; *pkt= asf_st->pkt; //printf("packet %d %d\n", asf_st->pkt.size, asf->packet_frag_size); asf_st->pkt.size = 0; asf_st->pkt.data = 0; break; // packet completed } } return 0; } | 12,804 |
1 | static int h264_slice_header_init(H264Context *h, int reinit) { MpegEncContext *const s = &h->s; int i, ret; if( FFALIGN(s->avctx->width , 16 ) == s->width && FFALIGN(s->avctx->height, 16*(2 - h->sps.frame_mbs_only_flag)) == s->height && !h->sps.crop_right && !h->sps.crop_bottom && (s->avctx->width != s->width || s->avctx->height && s->height) ) { av_log(h->s.avctx, AV_LOG_DEBUG, "Using externally provided dimensions\n"); s->avctx->coded_width = s->width; s->avctx->coded_height = s->height; } else{ avcodec_set_dimensions(s->avctx, s->width, s->height); s->avctx->width -= (2>>CHROMA444)*FFMIN(h->sps.crop_right, (8<<CHROMA444)-1); s->avctx->height -= (1<<s->chroma_y_shift)*FFMIN(h->sps.crop_bottom, (16>>s->chroma_y_shift)-1) * (2 - h->sps.frame_mbs_only_flag); } s->avctx->sample_aspect_ratio = h->sps.sar; av_assert0(s->avctx->sample_aspect_ratio.den); if (h->sps.timing_info_present_flag) { int64_t den = h->sps.time_scale; if (h->x264_build < 44U) den *= 2; av_reduce(&s->avctx->time_base.num, &s->avctx->time_base.den, h->sps.num_units_in_tick, den, 1 << 30); } s->avctx->hwaccel = ff_find_hwaccel(s->avctx->codec->id, s->avctx->pix_fmt); if (reinit) { free_tables(h, 0); if ((ret = ff_MPV_common_frame_size_change(s)) < 0) { av_log(h->s.avctx, AV_LOG_ERROR, "ff_MPV_common_frame_size_change() failed.\n"); return ret; } } else { if ((ret = ff_MPV_common_init(s) < 0)) { av_log(h->s.avctx, AV_LOG_ERROR, "ff_MPV_common_init() failed.\n"); return ret; } } s->first_field = 0; h->prev_interlaced_frame = 1; init_scan_tables(h); if (ff_h264_alloc_tables(h) < 0) { av_log(h->s.avctx, AV_LOG_ERROR, "Could not allocate memory for h264\n"); return AVERROR(ENOMEM); } if (!HAVE_THREADS || !(s->avctx->active_thread_type & FF_THREAD_SLICE)) { if (context_init(h) < 0) { av_log(h->s.avctx, AV_LOG_ERROR, "context_init() failed.\n"); return -1; } } else { for (i = 1; i < s->slice_context_count; i++) { H264Context *c; c = h->thread_context[i] = av_malloc(sizeof(H264Context)); memcpy(c, h->s.thread_context[i], sizeof(MpegEncContext)); memset(&c->s + 1, 0, sizeof(H264Context) - sizeof(MpegEncContext)); c->h264dsp = h->h264dsp; c->sps = h->sps; c->pps = h->pps; c->pixel_shift = h->pixel_shift; c->cur_chroma_format_idc = h->cur_chroma_format_idc; init_scan_tables(c); clone_tables(c, h, i); } for (i = 0; i < s->slice_context_count; i++) if (context_init(h->thread_context[i]) < 0) { av_log(h->s.avctx, AV_LOG_ERROR, "context_init() failed.\n"); return -1; } } return 0; } | 12,806 |
1 | void qpci_io_writeb(QPCIDevice *dev, void *data, uint8_t value) { uintptr_t addr = (uintptr_t)data; if (addr < QPCI_PIO_LIMIT) { dev->bus->pio_writeb(dev->bus, addr, value); } else { dev->bus->memwrite(dev->bus, addr, &value, sizeof(value)); } } | 12,807 |
1 | static inline void RENAME(hyscale)(uint16_t *dst, long dstWidth, uint8_t *src, int srcW, int xInc, int flags, int canMMX2BeUsed, int16_t *hLumFilter, int16_t *hLumFilterPos, int hLumFilterSize, void *funnyYCode, int srcFormat, uint8_t *formatConvBuffer, int16_t *mmx2Filter, int32_t *mmx2FilterPos, uint8_t *pal) { if(srcFormat==PIX_FMT_YUYV422 || srcFormat==PIX_FMT_GRAY16BE) { RENAME(yuy2ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_UYVY422 || srcFormat==PIX_FMT_GRAY16LE) { RENAME(uyvyToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_RGB32) { RENAME(bgr32ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_BGR24) { RENAME(bgr24ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_BGR565) { RENAME(bgr16ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_BGR555) { RENAME(bgr15ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_BGR32) { RENAME(rgb32ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_RGB24) { RENAME(rgb24ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_RGB565) { RENAME(rgb16ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_RGB555) { RENAME(rgb15ToY)(formatConvBuffer, src, srcW); src= formatConvBuffer; } else if(srcFormat==PIX_FMT_RGB8 || srcFormat==PIX_FMT_BGR8 || srcFormat==PIX_FMT_PAL8 || srcFormat==PIX_FMT_BGR4_BYTE || srcFormat==PIX_FMT_RGB4_BYTE) { RENAME(palToY)(formatConvBuffer, src, srcW, pal); src= formatConvBuffer; } #ifdef HAVE_MMX // use the new MMX scaler if the mmx2 can't be used (its faster than the x86asm one) if(!(flags&SWS_FAST_BILINEAR) || (!canMMX2BeUsed)) #else if(!(flags&SWS_FAST_BILINEAR)) #endif { RENAME(hScale)(dst, dstWidth, src, srcW, xInc, hLumFilter, hLumFilterPos, hLumFilterSize); } else // Fast Bilinear upscale / crap downscale { #if defined(ARCH_X86) #ifdef HAVE_MMX2 int i; #if defined(PIC) uint64_t ebxsave __attribute__((aligned(8))); #endif if(canMMX2BeUsed) { asm volatile( #if defined(PIC) "mov %%"REG_b", %5 \n\t" #endif "pxor %%mm7, %%mm7 \n\t" "mov %0, %%"REG_c" \n\t" "mov %1, %%"REG_D" \n\t" "mov %2, %%"REG_d" \n\t" "mov %3, %%"REG_b" \n\t" "xor %%"REG_a", %%"REG_a" \n\t" // i PREFETCH" (%%"REG_c") \n\t" PREFETCH" 32(%%"REG_c") \n\t" PREFETCH" 64(%%"REG_c") \n\t" #ifdef ARCH_X86_64 #define FUNNY_Y_CODE \ "movl (%%"REG_b"), %%esi \n\t"\ "call *%4 \n\t"\ "movl (%%"REG_b", %%"REG_a"), %%esi\n\t"\ "add %%"REG_S", %%"REG_c" \n\t"\ "add %%"REG_a", %%"REG_D" \n\t"\ "xor %%"REG_a", %%"REG_a" \n\t"\ #else #define FUNNY_Y_CODE \ "movl (%%"REG_b"), %%esi \n\t"\ "call *%4 \n\t"\ "addl (%%"REG_b", %%"REG_a"), %%"REG_c"\n\t"\ "add %%"REG_a", %%"REG_D" \n\t"\ "xor %%"REG_a", %%"REG_a" \n\t"\ #endif FUNNY_Y_CODE FUNNY_Y_CODE FUNNY_Y_CODE FUNNY_Y_CODE FUNNY_Y_CODE FUNNY_Y_CODE FUNNY_Y_CODE FUNNY_Y_CODE #if defined(PIC) "mov %5, %%"REG_b" \n\t" #endif :: "m" (src), "m" (dst), "m" (mmx2Filter), "m" (mmx2FilterPos), "m" (funnyYCode) #if defined(PIC) ,"m" (ebxsave) #endif : "%"REG_a, "%"REG_c, "%"REG_d, "%"REG_S, "%"REG_D #if !defined(PIC) ,"%"REG_b #endif ); for(i=dstWidth-1; (i*xInc)>>16 >=srcW-1; i--) dst[i] = src[srcW-1]*128; } else { #endif long xInc_shr16 = xInc >> 16; uint16_t xInc_mask = xInc & 0xffff; //NO MMX just normal asm ... asm volatile( "xor %%"REG_a", %%"REG_a" \n\t" // i "xor %%"REG_d", %%"REG_d" \n\t" // xx "xorl %%ecx, %%ecx \n\t" // 2*xalpha ASMALIGN(4) "1: \n\t" "movzbl (%0, %%"REG_d"), %%edi \n\t" //src[xx] "movzbl 1(%0, %%"REG_d"), %%esi \n\t" //src[xx+1] "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx] "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha "shll $16, %%edi \n\t" "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha) "mov %1, %%"REG_D" \n\t" "shrl $9, %%esi \n\t" "movw %%si, (%%"REG_D", %%"REG_a", 2)\n\t" "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF "adc %3, %%"REG_d" \n\t" //xx+= xInc>>8 + carry "movzbl (%0, %%"REG_d"), %%edi \n\t" //src[xx] "movzbl 1(%0, %%"REG_d"), %%esi \n\t" //src[xx+1] "subl %%edi, %%esi \n\t" //src[xx+1] - src[xx] "imull %%ecx, %%esi \n\t" //(src[xx+1] - src[xx])*2*xalpha "shll $16, %%edi \n\t" "addl %%edi, %%esi \n\t" //src[xx+1]*2*xalpha + src[xx]*(1-2*xalpha) "mov %1, %%"REG_D" \n\t" "shrl $9, %%esi \n\t" "movw %%si, 2(%%"REG_D", %%"REG_a", 2)\n\t" "addw %4, %%cx \n\t" //2*xalpha += xInc&0xFF "adc %3, %%"REG_d" \n\t" //xx+= xInc>>8 + carry "add $2, %%"REG_a" \n\t" "cmp %2, %%"REG_a" \n\t" " jb 1b \n\t" :: "r" (src), "m" (dst), "m" (dstWidth), "m" (xInc_shr16), "m" (xInc_mask) : "%"REG_a, "%"REG_d, "%ecx", "%"REG_D, "%esi" ); #ifdef HAVE_MMX2 } //if MMX2 can't be used #endif #else int i; unsigned int xpos=0; for(i=0;i<dstWidth;i++) { register unsigned int xx=xpos>>16; register unsigned int xalpha=(xpos&0xFFFF)>>9; dst[i]= (src[xx]<<7) + (src[xx+1] - src[xx])*xalpha; xpos+=xInc; } #endif } } | 12,808 |
1 | static void ich9_smb_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); k->vendor_id = PCI_VENDOR_ID_INTEL; k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6; k->revision = ICH9_A2_SMB_REVISION; k->class_id = PCI_CLASS_SERIAL_SMBUS; dc->no_user = 1; dc->vmsd = &vmstate_ich9_smbus; dc->desc = "ICH9 SMBUS Bridge"; k->init = ich9_smbus_initfn; k->config_write = ich9_smbus_write_config; } | 12,811 |
1 | bool qemu_file_mode_is_not_valid(const char *mode) { if (mode == NULL || (mode[0] != 'r' && mode[0] != 'w') || mode[1] != 'b' || mode[2] != 0) { fprintf(stderr, "qemu_fopen: Argument validity check failed\n"); return true; } return false; } | 12,812 |
1 | void qemu_mutex_unlock(QemuMutex *mutex) { assert(mutex->owner == GetCurrentThreadId()); mutex->owner = 0; LeaveCriticalSection(&mutex->lock); } | 12,813 |
1 | void register_watchdogs(void) { wdt_ib700_init(); wdt_i6300esb_init(); } | 12,815 |
1 | static int rtmp_write(URLContext *s, const uint8_t *buf, int size) { RTMPContext *rt = s->priv_data; int size_temp = size; int pktsize, pkttype; uint32_t ts; const uint8_t *buf_temp = buf; uint8_t c; int ret; do { if (rt->skip_bytes) { int skip = FFMIN(rt->skip_bytes, size_temp); buf_temp += skip; size_temp -= skip; rt->skip_bytes -= skip; continue; if (rt->flv_header_bytes < 11) { const uint8_t *header = rt->flv_header; int copy = FFMIN(11 - rt->flv_header_bytes, size_temp); bytestream_get_buffer(&buf_temp, rt->flv_header + rt->flv_header_bytes, copy); rt->flv_header_bytes += copy; size_temp -= copy; if (rt->flv_header_bytes < 11) break; pkttype = bytestream_get_byte(&header); pktsize = bytestream_get_be24(&header); ts = bytestream_get_be24(&header); ts |= bytestream_get_byte(&header) << 24; bytestream_get_be24(&header); rt->flv_size = pktsize; //force 12bytes header if (((pkttype == RTMP_PT_VIDEO || pkttype == RTMP_PT_AUDIO) && ts == 0) || pkttype == RTMP_PT_NOTIFY) { if (pkttype == RTMP_PT_NOTIFY) pktsize += 16; rt->prev_pkt[1][RTMP_SOURCE_CHANNEL].channel_id = 0; //this can be a big packet, it's better to send it right here if ((ret = ff_rtmp_packet_create(&rt->out_pkt, RTMP_SOURCE_CHANNEL, pkttype, ts, pktsize)) < 0) rt->out_pkt.extra = rt->main_channel_id; rt->flv_data = rt->out_pkt.data; if (pkttype == RTMP_PT_NOTIFY) ff_amf_write_string(&rt->flv_data, "@setDataFrame"); if (rt->flv_size - rt->flv_off > size_temp) { bytestream_get_buffer(&buf_temp, rt->flv_data + rt->flv_off, size_temp); rt->flv_off += size_temp; size_temp = 0; } else { bytestream_get_buffer(&buf_temp, rt->flv_data + rt->flv_off, rt->flv_size - rt->flv_off); size_temp -= rt->flv_size - rt->flv_off; rt->flv_off += rt->flv_size - rt->flv_off; if (rt->flv_off == rt->flv_size) { rt->skip_bytes = 4; if ((ret = ff_rtmp_packet_write(rt->stream, &rt->out_pkt, rt->chunk_size, rt->prev_pkt[1])) < 0) ff_rtmp_packet_destroy(&rt->out_pkt); rt->flv_size = 0; rt->flv_off = 0; rt->flv_header_bytes = 0; } while (buf_temp - buf < size); | 12,816 |
1 | void ff_thread_flush(AVCodecContext *avctx) { FrameThreadContext *fctx = avctx->thread_opaque; if (!avctx->thread_opaque) return; park_frame_worker_threads(fctx, avctx->thread_count); if (fctx->prev_thread) update_context_from_thread(fctx->threads->avctx, fctx->prev_thread->avctx, 0); fctx->next_decoding = fctx->next_finished = 0; fctx->delaying = 1; fctx->prev_thread = NULL; } | 12,818 |
1 | static int check_strtox_error(const char **next, char *endptr, int err) { if (!next && *endptr) { return -EINVAL; } if (next) { *next = endptr; } return -err; } | 12,819 |
1 | static void pc_init1(MachineState *machine, const char *host_type, const char *pci_type) { PCMachineState *pcms = PC_MACHINE(machine); PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms); MemoryRegion *system_memory = get_system_memory(); MemoryRegion *system_io = get_system_io(); int i; PCIBus *pci_bus; ISABus *isa_bus; PCII440FXState *i440fx_state; int piix3_devfn = -1; qemu_irq *gsi; qemu_irq *i8259; qemu_irq smi_irq; GSIState *gsi_state; DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; BusState *idebus[MAX_IDE_BUS]; ISADevice *rtc_state; MemoryRegion *ram_memory; MemoryRegion *pci_memory; MemoryRegion *rom_memory; ram_addr_t lowmem; /* * Calculate ram split, for memory below and above 4G. It's a bit * complicated for backward compatibility reasons ... * * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the * default value for max_ram_below_4g now. * * - Then, to gigabyte align the memory, we move the split to 3G * (lowmem = 0xc0000000). But only in case we have to split in * the first place, i.e. ram_size is larger than (traditional) * lowmem. And for new machine types (gigabyte_align = true) * only, for live migration compatibility reasons. * * - Next the max-ram-below-4g option was added, which allowed to * reduce lowmem to a smaller value, to allow a larger PCI I/O * window below 4G. qemu doesn't enforce gigabyte alignment here, * but prints a warning. * * - Finally max-ram-below-4g got updated to also allow raising lowmem, * so legacy non-PAE guests can get as much memory as possible in * the 32bit address space below 4G. * * - Note that Xen has its own ram setp code in xen_ram_init(), * called via xen_hvm_init(). * * Examples: * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M) */ if (xen_enabled()) { xen_hvm_init(pcms, &ram_memory); } else { if (!pcms->max_ram_below_4g) { pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */ } lowmem = pcms->max_ram_below_4g; if (machine->ram_size >= pcms->max_ram_below_4g) { if (pcmc->gigabyte_align) { if (lowmem > 0xc0000000) { lowmem = 0xc0000000; } if (lowmem & ((1ULL << 30) - 1)) { error_report("Warning: Large machine and max_ram_below_4g " "(%" PRIu64 ") not a multiple of 1G; " "possible bad performance.", pcms->max_ram_below_4g); } } } if (machine->ram_size >= lowmem) { pcms->above_4g_mem_size = machine->ram_size - lowmem; pcms->below_4g_mem_size = lowmem; } else { pcms->above_4g_mem_size = 0; pcms->below_4g_mem_size = machine->ram_size; } } pc_cpus_init(pcms); if (kvm_enabled() && pcmc->kvmclock_enabled) { kvmclock_create(); } if (pcmc->pci_enabled) { pci_memory = g_new(MemoryRegion, 1); memory_region_init(pci_memory, NULL, "pci", UINT64_MAX); rom_memory = pci_memory; } else { pci_memory = NULL; rom_memory = system_memory; } pc_guest_info_init(pcms); if (pcmc->smbios_defaults) { MachineClass *mc = MACHINE_GET_CLASS(machine); /* These values are guest ABI, do not change */ smbios_set_defaults("QEMU", "Standard PC (i440FX + PIIX, 1996)", mc->name, pcmc->smbios_legacy_mode, pcmc->smbios_uuid_encoded, SMBIOS_ENTRY_POINT_21); } /* allocate ram and load rom/bios */ if (!xen_enabled()) { pc_memory_init(pcms, system_memory, rom_memory, &ram_memory); } else if (machine->kernel_filename != NULL) { /* For xen HVM direct kernel boot, load linux here */ xen_load_linux(pcms); } gsi_state = g_malloc0(sizeof(*gsi_state)); if (kvm_ioapic_in_kernel()) { kvm_pc_setup_irq_routing(pcmc->pci_enabled); gsi = qemu_allocate_irqs(kvm_pc_gsi_handler, gsi_state, GSI_NUM_PINS); } else { gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS); } if (pcmc->pci_enabled) { pci_bus = i440fx_init(host_type, pci_type, &i440fx_state, &piix3_devfn, &isa_bus, gsi, system_memory, system_io, machine->ram_size, pcms->below_4g_mem_size, pcms->above_4g_mem_size, pci_memory, ram_memory); pcms->bus = pci_bus; } else { pci_bus = NULL; i440fx_state = NULL; isa_bus = isa_bus_new(NULL, get_system_memory(), system_io, &error_abort); no_hpet = 1; } isa_bus_irqs(isa_bus, gsi); if (kvm_pic_in_kernel()) { i8259 = kvm_i8259_init(isa_bus); } else if (xen_enabled()) { i8259 = xen_interrupt_controller_init(); } else { i8259 = i8259_init(isa_bus, pc_allocate_cpu_irq()); } for (i = 0; i < ISA_NUM_IRQS; i++) { gsi_state->i8259_irq[i] = i8259[i]; } g_free(i8259); if (pcmc->pci_enabled) { ioapic_init_gsi(gsi_state, "i440fx"); } pc_register_ferr_irq(gsi[13]); pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL); assert(pcms->vmport != ON_OFF_AUTO__MAX); if (pcms->vmport == ON_OFF_AUTO_AUTO) { pcms->vmport = xen_enabled() ? ON_OFF_AUTO_OFF : ON_OFF_AUTO_ON; } /* init basic PC hardware */ pc_basic_device_init(isa_bus, gsi, &rtc_state, true, (pcms->vmport != ON_OFF_AUTO_ON), 0x4); pc_nic_init(isa_bus, pci_bus); ide_drive_get(hd, ARRAY_SIZE(hd)); if (pcmc->pci_enabled) { PCIDevice *dev; if (xen_enabled()) { dev = pci_piix3_xen_ide_init(pci_bus, hd, piix3_devfn + 1); } else { dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1); } idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0"); idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1"); } else { for(i = 0; i < MAX_IDE_BUS; i++) { ISADevice *dev; char busname[] = "ide.0"; dev = isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); /* * The ide bus name is ide.0 for the first bus and ide.1 for the * second one. */ busname[4] = '0' + i; idebus[i] = qdev_get_child_bus(DEVICE(dev), busname); } } pc_cmos_init(pcms, idebus[0], idebus[1], rtc_state); if (pcmc->pci_enabled && machine_usb(machine)) { pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci"); } if (pcmc->pci_enabled && acpi_enabled) { DeviceState *piix4_pm; I2CBus *smbus; smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0); /* TODO: Populate SPD eeprom data. */ smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, gsi[9], smi_irq, pc_machine_is_smm_enabled(pcms), &piix4_pm); smbus_eeprom_init(smbus, 8, NULL, 0); object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP, TYPE_HOTPLUG_HANDLER, (Object **)&pcms->acpi_dev, object_property_allow_set_link, OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); object_property_set_link(OBJECT(machine), OBJECT(piix4_pm), PC_MACHINE_ACPI_DEVICE_PROP, &error_abort); } if (pcmc->pci_enabled) { pc_pci_device_init(pci_bus); } if (pcms->acpi_nvdimm_state.is_enabled) { nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io, pcms->fw_cfg, OBJECT(pcms)); } } | 12,820 |
1 | static int do_cont(Monitor *mon, const QDict *qdict, QObject **ret_data) { struct bdrv_iterate_context context = { mon, 0 }; bdrv_iterate(encrypted_bdrv_it, &context); /* only resume the vm if all keys are set and valid */ if (!context.err) { vm_start(); return 0; } else { | 12,821 |
1 | static void colo_old_packet_check(void *opaque) { CompareState *s = opaque; g_queue_foreach(&s->conn_list, colo_old_packet_check_one_conn, NULL); } | 12,822 |
1 | int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t offset, uint8_t size) { int ret; Error *local_err = NULL; ret = pci_add_capability2(pdev, cap_id, offset, size, &local_err); if (local_err) { assert(ret < 0); error_report_err(local_err); } else { /* success implies a positive offset in config space */ assert(ret > 0); } return ret; } | 12,824 |
1 | static void write_bootloader(uint8_t *base, int64_t run_addr, int64_t kernel_entry) { uint32_t *p; /* Small bootloader */ p = (uint32_t *)base; stl_p(p++, 0x08000000 | /* j 0x1fc00580 */ ((run_addr + 0x580) & 0x0fffffff) >> 2); stl_p(p++, 0x00000000); /* nop */ /* YAMON service vector */ stl_p(base + 0x500, run_addr + 0x0580); /* start: */ stl_p(base + 0x504, run_addr + 0x083c); /* print_count: */ stl_p(base + 0x520, run_addr + 0x0580); /* start: */ stl_p(base + 0x52c, run_addr + 0x0800); /* flush_cache: */ stl_p(base + 0x534, run_addr + 0x0808); /* print: */ stl_p(base + 0x538, run_addr + 0x0800); /* reg_cpu_isr: */ stl_p(base + 0x53c, run_addr + 0x0800); /* unred_cpu_isr: */ stl_p(base + 0x540, run_addr + 0x0800); /* reg_ic_isr: */ stl_p(base + 0x544, run_addr + 0x0800); /* unred_ic_isr: */ stl_p(base + 0x548, run_addr + 0x0800); /* reg_esr: */ stl_p(base + 0x54c, run_addr + 0x0800); /* unreg_esr: */ stl_p(base + 0x550, run_addr + 0x0800); /* getchar: */ stl_p(base + 0x554, run_addr + 0x0800); /* syscon_read: */ /* Second part of the bootloader */ p = (uint32_t *) (base + 0x580); if (semihosting_get_argc()) { /* Preserve a0 content as arguments have been passed */ stl_p(p++, 0x00000000); /* nop */ } else { stl_p(p++, 0x24040002); /* addiu a0, zero, 2 */ } stl_p(p++, 0x3c1d0000 | (((ENVP_ADDR - 64) >> 16) & 0xffff)); /* lui sp, high(ENVP_ADDR) */ stl_p(p++, 0x37bd0000 | ((ENVP_ADDR - 64) & 0xffff)); /* ori sp, sp, low(ENVP_ADDR) */ stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */ stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a1, low(ENVP_ADDR) */ stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */ stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */ stl_p(p++, 0x3c070000 | (loaderparams.ram_low_size >> 16)); /* lui a3, high(ram_low_size) */ stl_p(p++, 0x34e70000 | (loaderparams.ram_low_size & 0xffff)); /* ori a3, a3, low(ram_low_size) */ /* Load BAR registers as done by YAMON */ stl_p(p++, 0x3c09b400); /* lui t1, 0xb400 */ #ifdef TARGET_WORDS_BIGENDIAN stl_p(p++, 0x3c08df00); /* lui t0, 0xdf00 */ #else stl_p(p++, 0x340800df); /* ori t0, r0, 0x00df */ #endif stl_p(p++, 0xad280068); /* sw t0, 0x0068(t1) */ stl_p(p++, 0x3c09bbe0); /* lui t1, 0xbbe0 */ #ifdef TARGET_WORDS_BIGENDIAN stl_p(p++, 0x3c08c000); /* lui t0, 0xc000 */ #else stl_p(p++, 0x340800c0); /* ori t0, r0, 0x00c0 */ #endif stl_p(p++, 0xad280048); /* sw t0, 0x0048(t1) */ #ifdef TARGET_WORDS_BIGENDIAN stl_p(p++, 0x3c084000); /* lui t0, 0x4000 */ #else stl_p(p++, 0x34080040); /* ori t0, r0, 0x0040 */ #endif stl_p(p++, 0xad280050); /* sw t0, 0x0050(t1) */ #ifdef TARGET_WORDS_BIGENDIAN stl_p(p++, 0x3c088000); /* lui t0, 0x8000 */ #else stl_p(p++, 0x34080080); /* ori t0, r0, 0x0080 */ #endif stl_p(p++, 0xad280058); /* sw t0, 0x0058(t1) */ #ifdef TARGET_WORDS_BIGENDIAN stl_p(p++, 0x3c083f00); /* lui t0, 0x3f00 */ #else stl_p(p++, 0x3408003f); /* ori t0, r0, 0x003f */ #endif stl_p(p++, 0xad280060); /* sw t0, 0x0060(t1) */ #ifdef TARGET_WORDS_BIGENDIAN stl_p(p++, 0x3c08c100); /* lui t0, 0xc100 */ #else stl_p(p++, 0x340800c1); /* ori t0, r0, 0x00c1 */ #endif stl_p(p++, 0xad280080); /* sw t0, 0x0080(t1) */ #ifdef TARGET_WORDS_BIGENDIAN stl_p(p++, 0x3c085e00); /* lui t0, 0x5e00 */ #else stl_p(p++, 0x3408005e); /* ori t0, r0, 0x005e */ #endif stl_p(p++, 0xad280088); /* sw t0, 0x0088(t1) */ /* Jump to kernel code */ stl_p(p++, 0x3c1f0000 | ((kernel_entry >> 16) & 0xffff)); /* lui ra, high(kernel_entry) */ stl_p(p++, 0x37ff0000 | (kernel_entry & 0xffff)); /* ori ra, ra, low(kernel_entry) */ stl_p(p++, 0x03e00009); /* jalr ra */ stl_p(p++, 0x00000000); /* nop */ /* YAMON subroutines */ p = (uint32_t *) (base + 0x800); stl_p(p++, 0x03e00009); /* jalr ra */ stl_p(p++, 0x24020000); /* li v0,0 */ /* 808 YAMON print */ stl_p(p++, 0x03e06821); /* move t5,ra */ stl_p(p++, 0x00805821); /* move t3,a0 */ stl_p(p++, 0x00a05021); /* move t2,a1 */ stl_p(p++, 0x91440000); /* lbu a0,0(t2) */ stl_p(p++, 0x254a0001); /* addiu t2,t2,1 */ stl_p(p++, 0x10800005); /* beqz a0,834 */ stl_p(p++, 0x00000000); /* nop */ stl_p(p++, 0x0ff0021c); /* jal 870 */ stl_p(p++, 0x00000000); /* nop */ stl_p(p++, 0x08000205); /* j 814 */ stl_p(p++, 0x00000000); /* nop */ stl_p(p++, 0x01a00009); /* jalr t5 */ stl_p(p++, 0x01602021); /* move a0,t3 */ /* 0x83c YAMON print_count */ stl_p(p++, 0x03e06821); /* move t5,ra */ stl_p(p++, 0x00805821); /* move t3,a0 */ stl_p(p++, 0x00a05021); /* move t2,a1 */ stl_p(p++, 0x00c06021); /* move t4,a2 */ stl_p(p++, 0x91440000); /* lbu a0,0(t2) */ stl_p(p++, 0x0ff0021c); /* jal 870 */ stl_p(p++, 0x00000000); /* nop */ stl_p(p++, 0x254a0001); /* addiu t2,t2,1 */ stl_p(p++, 0x258cffff); /* addiu t4,t4,-1 */ stl_p(p++, 0x1580fffa); /* bnez t4,84c */ stl_p(p++, 0x00000000); /* nop */ stl_p(p++, 0x01a00009); /* jalr t5 */ stl_p(p++, 0x01602021); /* move a0,t3 */ /* 0x870 */ stl_p(p++, 0x3c08b800); /* lui t0,0xb400 */ stl_p(p++, 0x350803f8); /* ori t0,t0,0x3f8 */ stl_p(p++, 0x91090005); /* lbu t1,5(t0) */ stl_p(p++, 0x00000000); /* nop */ stl_p(p++, 0x31290040); /* andi t1,t1,0x40 */ stl_p(p++, 0x1120fffc); /* beqz t1,878 <outch+0x8> */ stl_p(p++, 0x00000000); /* nop */ stl_p(p++, 0x03e00009); /* jalr ra */ stl_p(p++, 0xa1040000); /* sb a0,0(t0) */ } | 12,825 |
1 | static int tcp_set_msgfds(CharDriverState *chr, int *fds, int num) { TCPCharDriver *s = chr->opaque; /* clear old pending fd array */ g_free(s->write_msgfds); if (num) { s->write_msgfds = g_malloc(num * sizeof(int)); memcpy(s->write_msgfds, fds, num * sizeof(int)); } s->write_msgfds_num = num; return 0; } | 12,826 |
1 | void ff_j2k_cleanup(Jpeg2000Component *comp, Jpeg2000CodingStyle *codsty) { int reslevelno, bandno, precno; for (reslevelno = 0; reslevelno < codsty->nreslevels; reslevelno++) { Jpeg2000ResLevel *reslevel = comp->reslevel + reslevelno; for (bandno = 0; bandno < reslevel->nbands; bandno++) { Jpeg2000Band *band = reslevel->band + bandno; for (precno = 0; precno < reslevel->num_precincts_x * reslevel->num_precincts_y; precno++) { Jpeg2000Prec *prec = band->prec + precno; av_freep(&prec->zerobits); av_freep(&prec->cblkincl); av_freep(&prec->cblk); } av_freep(&band->prec); } av_freep(&reslevel->band); } ff_dwt_destroy(&comp->dwt); av_freep(&comp->reslevel); av_freep(&comp->data); } | 12,827 |
0 | static int get_physical_address(CPUState *env, target_phys_addr_t *physical, int *prot, int *access_index, target_ulong address, int rw, int mmu_idx) { int is_user = mmu_idx == MMU_USER_IDX; if (rw == 2) return get_physical_address_code(env, physical, prot, address, is_user); else return get_physical_address_data(env, physical, prot, address, rw, is_user); } | 12,831 |
0 | void op_flush_icache_all(void) { CALL_FROM_TB1(tb_flush, env); RETURN(); } | 12,832 |
0 | static void test_visitor_in_struct_nested(TestInputVisitorData *data, const void *unused) { UserDefTwo *udp = NULL; Visitor *v; v = visitor_input_test_init(data, "{ 'string0': 'string0', " "'dict1': { 'string1': 'string1', " "'dict2': { 'userdef': { 'integer': 42, " "'string': 'string' }, 'string': 'string2'}}}"); visit_type_UserDefTwo(v, NULL, &udp, &error_abort); g_assert_cmpstr(udp->string0, ==, "string0"); g_assert_cmpstr(udp->dict1->string1, ==, "string1"); g_assert_cmpint(udp->dict1->dict2->userdef->integer, ==, 42); g_assert_cmpstr(udp->dict1->dict2->userdef->string, ==, "string"); g_assert_cmpstr(udp->dict1->dict2->string, ==, "string2"); g_assert(udp->dict1->has_dict3 == false); qapi_free_UserDefTwo(udp); } | 12,833 |
0 | static void qxl_log_cmd_draw_compat(PCIQXLDevice *qxl, QXLCompatDrawable *draw, int group_id) { fprintf(stderr, ": type %s effect %s", qxl_name(qxl_draw_type, draw->type), qxl_name(qxl_draw_effect, draw->effect)); if (draw->bitmap_offset) { fprintf(stderr, ": bitmap %d", draw->bitmap_offset); qxl_log_rect(&draw->bitmap_area); } switch (draw->type) { case QXL_DRAW_COPY: qxl_log_cmd_draw_copy(qxl, &draw->u.copy, group_id); break; } } | 12,834 |
0 | int apic_init(CPUState *env) { APICState *s; if (last_apic_idx >= MAX_APICS) return -1; s = qemu_mallocz(sizeof(APICState)); env->apic_state = s; s->idx = last_apic_idx++; s->id = env->cpuid_apic_id; s->cpu_env = env; apic_reset(s); msix_supported = 1; /* XXX: mapping more APICs at the same memory location */ if (apic_io_memory == 0) { /* NOTE: the APIC is directly connected to the CPU - it is not on the global memory bus. */ apic_io_memory = cpu_register_io_memory(apic_mem_read, apic_mem_write, NULL); /* XXX: what if the base changes? */ cpu_register_physical_memory(MSI_ADDR_BASE, MSI_ADDR_SIZE, apic_io_memory); } s->timer = qemu_new_timer(vm_clock, apic_timer, s); vmstate_register(s->idx, &vmstate_apic, s); qemu_register_reset(apic_reset, s); local_apics[s->idx] = s; return 0; } | 12,835 |
0 | static Visitor *visitor_input_test_init_internal(TestInputVisitorData *data, const char *json_string, va_list *ap) { visitor_input_teardown(data, NULL); data->obj = qobject_from_jsonv(json_string, ap); g_assert(data->obj); data->qiv = qmp_input_visitor_new(data->obj, false); g_assert(data->qiv); return data->qiv; } | 12,836 |
0 | target_ulong helper_rdhwr_cc(CPUMIPSState *env) { if ((env->hflags & MIPS_HFLAG_CP0) || (env->CP0_HWREna & (1 << 2))) { #ifdef CONFIG_USER_ONLY return env->CP0_Count; #else return (int32_t)cpu_mips_get_count(env); #endif } else { do_raise_exception(env, EXCP_RI, GETPC()); } return 0; } | 12,837 |
0 | static void prstatfs_to_statfs(struct statfs *stfs, ProxyStatFS *prstfs) { memset(stfs, 0, sizeof(*stfs)); stfs->f_type = prstfs->f_type; stfs->f_bsize = prstfs->f_bsize; stfs->f_blocks = prstfs->f_blocks; stfs->f_bfree = prstfs->f_bfree; stfs->f_bavail = prstfs->f_bavail; stfs->f_files = prstfs->f_files; stfs->f_ffree = prstfs->f_ffree; stfs->f_fsid.__val[0] = prstfs->f_fsid[0] & 0xFFFFFFFFU; stfs->f_fsid.__val[1] = prstfs->f_fsid[1] >> 32 & 0xFFFFFFFFU; stfs->f_namelen = prstfs->f_namelen; stfs->f_frsize = prstfs->f_frsize; } | 12,838 |
0 | static int decode_picture_header(AVCodecContext *avctx, const uint8_t *buf, const int buf_size) { ProresContext *ctx = avctx->priv_data; int i, hdr_size, slice_count; unsigned pic_data_size; int log2_slice_mb_width, log2_slice_mb_height; int slice_mb_count, mb_x, mb_y; const uint8_t *data_ptr, *index_ptr; hdr_size = buf[0] >> 3; if (hdr_size < 8 || hdr_size > buf_size) { av_log(avctx, AV_LOG_ERROR, "error, wrong picture header size\n"); return -1; } pic_data_size = AV_RB32(buf + 1); if (pic_data_size > buf_size) { av_log(avctx, AV_LOG_ERROR, "error, wrong picture data size\n"); return -1; } log2_slice_mb_width = buf[7] >> 4; log2_slice_mb_height = buf[7] & 0xF; if (log2_slice_mb_width > 3 || log2_slice_mb_height) { av_log(avctx, AV_LOG_ERROR, "unsupported slice resolution: %dx%d\n", 1 << log2_slice_mb_width, 1 << log2_slice_mb_height); return -1; } ctx->mb_width = (avctx->width + 15) >> 4; ctx->mb_height = (avctx->height + 15) >> 4; slice_count = AV_RB16(buf + 5); if (ctx->slice_count != slice_count || !ctx->slices) { av_freep(&ctx->slices); ctx->slices = av_mallocz(slice_count * sizeof(*ctx->slices)); if (!ctx->slices) return AVERROR(ENOMEM); ctx->slice_count = slice_count; } if (!slice_count) return AVERROR(EINVAL); if (hdr_size + slice_count*2 > buf_size) { av_log(avctx, AV_LOG_ERROR, "error, wrong slice count\n"); return -1; } // parse slice information index_ptr = buf + hdr_size; data_ptr = index_ptr + slice_count*2; slice_mb_count = 1 << log2_slice_mb_width; mb_x = 0; mb_y = 0; for (i = 0; i < slice_count; i++) { SliceContext *slice = &ctx->slices[i]; slice->data = data_ptr; data_ptr += AV_RB16(index_ptr + i*2); while (ctx->mb_width - mb_x < slice_mb_count) slice_mb_count >>= 1; slice->mb_x = mb_x; slice->mb_y = mb_y; slice->mb_count = slice_mb_count; slice->data_size = data_ptr - slice->data; if (slice->data_size < 6) { av_log(avctx, AV_LOG_ERROR, "error, wrong slice data size\n"); return -1; } mb_x += slice_mb_count; if (mb_x == ctx->mb_width) { slice_mb_count = 1 << log2_slice_mb_width; mb_x = 0; mb_y++; } if (data_ptr > buf + buf_size) { av_log(avctx, AV_LOG_ERROR, "error, slice out of bounds\n"); return -1; } } return pic_data_size; } | 12,839 |
0 | static SCSIRequest *scsi_new_request(SCSIDevice *d, uint32_t tag, uint32_t lun, uint8_t *buf, void *hba_private) { SCSIRequest *req; req = scsi_req_alloc(&scsi_generic_req_ops, d, tag, lun, hba_private); return req; } | 12,840 |
0 | static int kvm_get_xcrs(CPUState *env) { #ifdef KVM_CAP_XCRS int i, ret; struct kvm_xcrs xcrs; if (!kvm_has_xcrs()) return 0; ret = kvm_vcpu_ioctl(env, KVM_GET_XCRS, &xcrs); if (ret < 0) return ret; for (i = 0; i < xcrs.nr_xcrs; i++) /* Only support xcr0 now */ if (xcrs.xcrs[0].xcr == 0) { env->xcr0 = xcrs.xcrs[0].value; break; } return 0; #else return 0; #endif } | 12,841 |
0 | static int is_dup_page(uint8_t *page) { VECTYPE *p = (VECTYPE *)page; VECTYPE val = SPLAT(page); int i; for (i = 0; i < TARGET_PAGE_SIZE / sizeof(VECTYPE); i++) { if (!ALL_EQ(val, p[i])) { return 0; } } return 1; } | 12,842 |
0 | static void spapr_phb_realize(DeviceState *dev, Error **errp) { sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); SysBusDevice *s = SYS_BUS_DEVICE(dev); sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s); PCIHostState *phb = PCI_HOST_BRIDGE(s); char *namebuf; int i; PCIBus *bus; uint64_t msi_window_size = 4096; sPAPRTCETable *tcet; const unsigned windows_supported = sphb->ddw_enabled ? SPAPR_PCI_DMA_MAX_WINDOWS : 1; if (sphb->index != (uint32_t)-1) { sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr); Error *local_err = NULL; if ((sphb->buid != (uint64_t)-1) || (sphb->dma_liobn[0] != (uint32_t)-1) || (sphb->dma_liobn[1] != (uint32_t)-1 && windows_supported == 2) || (sphb->mem_win_addr != (hwaddr)-1) || (sphb->mem64_win_addr != (hwaddr)-1) || (sphb->io_win_addr != (hwaddr)-1)) { error_setg(errp, "Either \"index\" or other parameters must" " be specified for PAPR PHB, not both"); return; } smc->phb_placement(spapr, sphb->index, &sphb->buid, &sphb->io_win_addr, &sphb->mem_win_addr, &sphb->mem64_win_addr, windows_supported, sphb->dma_liobn, &local_err); if (local_err) { error_propagate(errp, local_err); return; } } if (sphb->buid == (uint64_t)-1) { error_setg(errp, "BUID not specified for PHB"); return; } if ((sphb->dma_liobn[0] == (uint32_t)-1) || ((sphb->dma_liobn[1] == (uint32_t)-1) && (windows_supported > 1))) { error_setg(errp, "LIOBN(s) not specified for PHB"); return; } if (sphb->mem_win_addr == (hwaddr)-1) { error_setg(errp, "Memory window address not specified for PHB"); return; } if (sphb->io_win_addr == (hwaddr)-1) { error_setg(errp, "IO window address not specified for PHB"); return; } if (sphb->mem64_win_size != 0) { if (sphb->mem64_win_addr == (hwaddr)-1) { error_setg(errp, "64-bit memory window address not specified for PHB"); return; } if (sphb->mem_win_size > SPAPR_PCI_MEM32_WIN_SIZE) { error_setg(errp, "32-bit memory window of size 0x%"HWADDR_PRIx " (max 2 GiB)", sphb->mem_win_size); return; } if (sphb->mem64_win_pciaddr == (hwaddr)-1) { /* 64-bit window defaults to identity mapping */ sphb->mem64_win_pciaddr = sphb->mem64_win_addr; } } else if (sphb->mem_win_size > SPAPR_PCI_MEM32_WIN_SIZE) { /* * For compatibility with old configuration, if no 64-bit MMIO * window is specified, but the ordinary (32-bit) memory * window is specified as > 2GiB, we treat it as a 2GiB 32-bit * window, with a 64-bit MMIO window following on immediately * afterwards */ sphb->mem64_win_size = sphb->mem_win_size - SPAPR_PCI_MEM32_WIN_SIZE; sphb->mem64_win_addr = sphb->mem_win_addr + SPAPR_PCI_MEM32_WIN_SIZE; sphb->mem64_win_pciaddr = SPAPR_PCI_MEM_WIN_BUS_OFFSET + SPAPR_PCI_MEM32_WIN_SIZE; sphb->mem_win_size = SPAPR_PCI_MEM32_WIN_SIZE; } if (spapr_pci_find_phb(spapr, sphb->buid)) { error_setg(errp, "PCI host bridges must have unique BUIDs"); return; } if (sphb->numa_node != -1 && (sphb->numa_node >= MAX_NODES || !numa_info[sphb->numa_node].present)) { error_setg(errp, "Invalid NUMA node ID for PCI host bridge"); return; } sphb->dtbusname = g_strdup_printf("pci@%" PRIx64, sphb->buid); /* Initialize memory regions */ namebuf = g_strdup_printf("%s.mmio", sphb->dtbusname); memory_region_init(&sphb->memspace, OBJECT(sphb), namebuf, UINT64_MAX); g_free(namebuf); namebuf = g_strdup_printf("%s.mmio32-alias", sphb->dtbusname); memory_region_init_alias(&sphb->mem32window, OBJECT(sphb), namebuf, &sphb->memspace, SPAPR_PCI_MEM_WIN_BUS_OFFSET, sphb->mem_win_size); g_free(namebuf); memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr, &sphb->mem32window); if (sphb->mem64_win_pciaddr != (hwaddr)-1) { namebuf = g_strdup_printf("%s.mmio64-alias", sphb->dtbusname); memory_region_init_alias(&sphb->mem64window, OBJECT(sphb), namebuf, &sphb->memspace, sphb->mem64_win_pciaddr, sphb->mem64_win_size); g_free(namebuf); if (sphb->mem64_win_addr != (hwaddr)-1) { memory_region_add_subregion(get_system_memory(), sphb->mem64_win_addr, &sphb->mem64window); } } /* Initialize IO regions */ namebuf = g_strdup_printf("%s.io", sphb->dtbusname); memory_region_init(&sphb->iospace, OBJECT(sphb), namebuf, SPAPR_PCI_IO_WIN_SIZE); g_free(namebuf); namebuf = g_strdup_printf("%s.io-alias", sphb->dtbusname); memory_region_init_alias(&sphb->iowindow, OBJECT(sphb), namebuf, &sphb->iospace, 0, SPAPR_PCI_IO_WIN_SIZE); g_free(namebuf); memory_region_add_subregion(get_system_memory(), sphb->io_win_addr, &sphb->iowindow); bus = pci_register_bus(dev, NULL, pci_spapr_set_irq, pci_spapr_map_irq, sphb, &sphb->memspace, &sphb->iospace, PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS); phb->bus = bus; qbus_set_hotplug_handler(BUS(phb->bus), DEVICE(sphb), NULL); /* * Initialize PHB address space. * By default there will be at least one subregion for default * 32bit DMA window. * Later the guest might want to create another DMA window * which will become another memory subregion. */ namebuf = g_strdup_printf("%s.iommu-root", sphb->dtbusname); memory_region_init(&sphb->iommu_root, OBJECT(sphb), namebuf, UINT64_MAX); g_free(namebuf); address_space_init(&sphb->iommu_as, &sphb->iommu_root, sphb->dtbusname); /* * As MSI/MSIX interrupts trigger by writing at MSI/MSIX vectors, * we need to allocate some memory to catch those writes coming * from msi_notify()/msix_notify(). * As MSIMessage:addr is going to be the same and MSIMessage:data * is going to be a VIRQ number, 4 bytes of the MSI MR will only * be used. * * For KVM we want to ensure that this memory is a full page so that * our memory slot is of page size granularity. */ #ifdef CONFIG_KVM if (kvm_enabled()) { msi_window_size = getpagesize(); } #endif memory_region_init_io(&sphb->msiwindow, OBJECT(sphb), &spapr_msi_ops, spapr, "msi", msi_window_size); memory_region_add_subregion(&sphb->iommu_root, SPAPR_PCI_MSI_WINDOW, &sphb->msiwindow); pci_setup_iommu(bus, spapr_pci_dma_iommu, sphb); pci_bus_set_route_irq_fn(bus, spapr_route_intx_pin_to_irq); QLIST_INSERT_HEAD(&spapr->phbs, sphb, list); /* Initialize the LSI table */ for (i = 0; i < PCI_NUM_PINS; i++) { uint32_t irq; Error *local_err = NULL; irq = spapr_ics_alloc_block(spapr->ics, 1, true, false, &local_err); if (local_err) { error_propagate(errp, local_err); error_prepend(errp, "can't allocate LSIs: "); return; } sphb->lsi_table[i].irq = irq; } /* allocate connectors for child PCI devices */ if (sphb->dr_enabled) { for (i = 0; i < PCI_SLOT_MAX * 8; i++) { spapr_dr_connector_new(OBJECT(phb), TYPE_SPAPR_DRC_PCI, (sphb->index << 16) | i); } } /* DMA setup */ if (((sphb->page_size_mask & qemu_getrampagesize()) == 0) && kvm_enabled()) { error_report("System page size 0x%lx is not enabled in page_size_mask " "(0x%"PRIx64"). Performance may be slow", qemu_getrampagesize(), sphb->page_size_mask); } for (i = 0; i < windows_supported; ++i) { tcet = spapr_tce_new_table(DEVICE(sphb), sphb->dma_liobn[i]); if (!tcet) { error_setg(errp, "Creating window#%d failed for %s", i, sphb->dtbusname); return; } memory_region_add_subregion(&sphb->iommu_root, 0, spapr_tce_get_iommu(tcet)); } sphb->msi = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); } | 12,843 |
0 | static inline int is_sector_in_chunk(BDRVDMGState* s, uint32_t chunk_num,int sector_num) { if(chunk_num>=s->n_chunks || s->sectors[chunk_num]>sector_num || s->sectors[chunk_num]+s->sectorcounts[chunk_num]<=sector_num) return 0; else return -1; } | 12,844 |
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