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1 | void ff_jpeg2000_cleanup(Jpeg2000Component *comp, Jpeg2000CodingStyle *codsty) { int reslevelno, bandno, precno; for (reslevelno = 0; comp->reslevel && reslevelno < codsty->nreslevels; reslevelno++) { Jpeg2000ResLevel *reslevel; if (!comp->reslevel) continue; reslevel = comp->reslevel + reslevelno; for (bandno = 0; bandno < reslevel->nbands; bandno++) { Jpeg2000Band *band; if (!reslevel->band) continue; band = reslevel->band + bandno; for (precno = 0; precno < reslevel->num_precincts_x * reslevel->num_precincts_y; precno++) { if (band->prec) { Jpeg2000Prec *prec = band->prec + precno; av_freep(&prec->zerobits); av_freep(&prec->cblkincl); av_freep(&prec->cblk); } } av_freep(&band->prec); } av_freep(&reslevel->band); } ff_dwt_destroy(&comp->dwt); av_freep(&comp->reslevel); av_freep(&comp->i_data); av_freep(&comp->f_data); } | 13,089 |
1 | SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, BlockBackend *blk, int unit, bool removable, int bootindex, const char *serial, Error **errp) { const char *driver; char *name; DeviceState *dev; Error *err = NULL; driver = blk_is_sg(blk) ? "scsi-generic" : "scsi-disk"; dev = qdev_create(&bus->qbus, driver); name = g_strdup_printf("legacy[%d]", unit); object_property_add_child(OBJECT(bus), name, OBJECT(dev), NULL); g_free(name); qdev_prop_set_uint32(dev, "scsi-id", unit); if (bootindex >= 0) { object_property_set_int(OBJECT(dev), bootindex, "bootindex", &error_abort); } if (object_property_find(OBJECT(dev), "removable", NULL)) { qdev_prop_set_bit(dev, "removable", removable); } if (serial && object_property_find(OBJECT(dev), "serial", NULL)) { qdev_prop_set_string(dev, "serial", serial); } qdev_prop_set_drive(dev, "drive", blk, &err); if (err) { qerror_report_err(err); error_free(err); error_setg(errp, "Setting drive property failed"); object_unparent(OBJECT(dev)); return NULL; } object_property_set_bool(OBJECT(dev), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); object_unparent(OBJECT(dev)); return NULL; } return SCSI_DEVICE(dev); } | 13,090 |
1 | static int smacker_decode_header_tree(SmackVContext *smk, BitstreamContext *bc, int **recodes, int *last, int size) { int res; HuffContext huff; HuffContext tmp1, tmp2; VLC vlc[2] = { { 0 } }; int escapes[3]; DBCtx ctx; int err = 0; if(size >= UINT_MAX>>4){ // (((size + 3) >> 2) + 3) << 2 must not overflow av_log(smk->avctx, AV_LOG_ERROR, "size too large\n"); return AVERROR_INVALIDDATA; } tmp1.length = 256; tmp1.maxlength = 0; tmp1.current = 0; tmp1.bits = av_mallocz(256 * 4); tmp1.lengths = av_mallocz(256 * sizeof(int)); tmp1.values = av_mallocz(256 * sizeof(int)); tmp2.length = 256; tmp2.maxlength = 0; tmp2.current = 0; tmp2.bits = av_mallocz(256 * 4); tmp2.lengths = av_mallocz(256 * sizeof(int)); tmp2.values = av_mallocz(256 * sizeof(int)); if (!tmp1.bits || !tmp1.lengths || !tmp1.values || !tmp2.bits || !tmp2.lengths || !tmp2.values) { err = AVERROR(ENOMEM); goto error; } if (bitstream_read_bit(bc)) { smacker_decode_tree(bc, &tmp1, 0, 0); bitstream_skip(bc, 1); res = init_vlc(&vlc[0], SMKTREE_BITS, tmp1.length, tmp1.lengths, sizeof(int), sizeof(int), tmp1.bits, sizeof(uint32_t), sizeof(uint32_t), INIT_VLC_LE); if(res < 0) { av_log(smk->avctx, AV_LOG_ERROR, "Cannot build VLC table\n"); err = res; goto error; } } else { av_log(smk->avctx, AV_LOG_ERROR, "Skipping low bytes tree\n"); } if (bitstream_read_bit(bc)) { smacker_decode_tree(bc, &tmp2, 0, 0); bitstream_skip(bc, 1); res = init_vlc(&vlc[1], SMKTREE_BITS, tmp2.length, tmp2.lengths, sizeof(int), sizeof(int), tmp2.bits, sizeof(uint32_t), sizeof(uint32_t), INIT_VLC_LE); if(res < 0) { av_log(smk->avctx, AV_LOG_ERROR, "Cannot build VLC table\n"); err = res; goto error; } } else { av_log(smk->avctx, AV_LOG_ERROR, "Skipping high bytes tree\n"); } escapes[0] = bitstream_read(bc, 8); escapes[0] |= bitstream_read(bc, 8) << 8; escapes[1] = bitstream_read(bc, 8); escapes[1] |= bitstream_read(bc, 8) << 8; escapes[2] = bitstream_read(bc, 8); escapes[2] |= bitstream_read(bc, 8) << 8; last[0] = last[1] = last[2] = -1; ctx.escapes[0] = escapes[0]; ctx.escapes[1] = escapes[1]; ctx.escapes[2] = escapes[2]; ctx.v1 = &vlc[0]; ctx.v2 = &vlc[1]; ctx.recode1 = tmp1.values; ctx.recode2 = tmp2.values; ctx.last = last; huff.length = ((size + 3) >> 2) + 4; huff.maxlength = 0; huff.current = 0; huff.values = av_mallocz(huff.length * sizeof(int)); if (!huff.values) { err = AVERROR(ENOMEM); goto error; } if ((res = smacker_decode_bigtree(bc, &huff, &ctx)) < 0) err = res; bitstream_skip(bc, 1); if(ctx.last[0] == -1) ctx.last[0] = huff.current++; if(ctx.last[1] == -1) ctx.last[1] = huff.current++; if(ctx.last[2] == -1) ctx.last[2] = huff.current++; if (ctx.last[0] >= huff.length || ctx.last[1] >= huff.length || ctx.last[2] >= huff.length) { av_log(smk->avctx, AV_LOG_ERROR, "Huffman codes out of range\n"); err = AVERROR_INVALIDDATA; } *recodes = huff.values; error: if(vlc[0].table) ff_free_vlc(&vlc[0]); if(vlc[1].table) ff_free_vlc(&vlc[1]); av_free(tmp1.bits); av_free(tmp1.lengths); av_free(tmp1.values); av_free(tmp2.bits); av_free(tmp2.lengths); av_free(tmp2.values); return err; } | 13,092 |
1 | static BlockAIOCB *hdev_aio_ioctl(BlockDriverState *bs, unsigned long int req, void *buf, BlockCompletionFunc *cb, void *opaque) { BDRVRawState *s = bs->opaque; RawPosixAIOData *acb; ThreadPool *pool; if (fd_open(bs) < 0) return NULL; acb = g_new(RawPosixAIOData, 1); acb->bs = bs; acb->aio_type = QEMU_AIO_IOCTL; acb->aio_fildes = s->fd; acb->aio_offset = 0; acb->aio_ioctl_buf = buf; acb->aio_ioctl_cmd = req; pool = aio_get_thread_pool(bdrv_get_aio_context(bs)); return thread_pool_submit_aio(pool, aio_worker, acb, cb, opaque); | 13,093 |
1 | static int blkdebug_debug_remove_breakpoint(BlockDriverState *bs, const char *tag) { BDRVBlkdebugState *s = bs->opaque; BlkdebugSuspendedReq *r, *r_next; BlkdebugRule *rule, *next; int i, ret = -ENOENT; for (i = 0; i < BLKDBG__MAX; i++) { QLIST_FOREACH_SAFE(rule, &s->rules[i], next, next) { if (rule->action == ACTION_SUSPEND && !strcmp(rule->options.suspend.tag, tag)) { remove_rule(rule); ret = 0; } } } QLIST_FOREACH_SAFE(r, &s->suspended_reqs, next, r_next) { if (!strcmp(r->tag, tag)) { qemu_coroutine_enter(r->co, NULL); ret = 0; } } return ret; } | 13,094 |
1 | static int ram_save_target_page(MigrationState *ms, QEMUFile *f, RAMBlock *block, ram_addr_t offset, bool last_stage, uint64_t *bytes_transferred, ram_addr_t dirty_ram_abs) { int res = 0; /* Check the pages is dirty and if it is send it */ if (migration_bitmap_clear_dirty(dirty_ram_abs)) { unsigned long *unsentmap; if (compression_switch && migrate_use_compression()) { res = ram_save_compressed_page(f, block, offset, last_stage, bytes_transferred); } else { res = ram_save_page(f, block, offset, last_stage, bytes_transferred); } if (res < 0) { return res; } unsentmap = atomic_rcu_read(&migration_bitmap_rcu)->unsentmap; if (unsentmap) { clear_bit(dirty_ram_abs >> TARGET_PAGE_BITS, unsentmap); } last_sent_block = block; } return res; } | 13,095 |
1 | static inline void RENAME(yuv2rgb565_1)(SwsContext *c, const uint16_t *buf0, const uint16_t *ubuf0, const uint16_t *ubuf1, const uint16_t *vbuf0, const uint16_t *vbuf1, const uint16_t *abuf0, uint8_t *dest, int dstW, int uvalpha, enum PixelFormat dstFormat, int flags, int y) { x86_reg uv_off = c->uv_off << 1; const uint16_t *buf1= buf0; //FIXME needed for RGB1/BGR1 if (uvalpha < 2048) { // note this is not correct (shifts chrominance by 0.5 pixels) but it is a bit faster __asm__ volatile( "mov %%"REG_b", "ESP_OFFSET"(%5) \n\t" "mov %4, %%"REG_b" \n\t" "push %%"REG_BP" \n\t" YSCALEYUV2RGB1(%%REGBP, %5, %6) "pxor %%mm7, %%mm7 \n\t" /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ #ifdef DITHER1XBPP "paddusb "BLUE_DITHER"(%5), %%mm2 \n\t" "paddusb "GREEN_DITHER"(%5), %%mm4 \n\t" "paddusb "RED_DITHER"(%5), %%mm5 \n\t" #endif WRITERGB16(%%REGb, 8280(%5), %%REGBP) "pop %%"REG_BP" \n\t" "mov "ESP_OFFSET"(%5), %%"REG_b" \n\t" :: "c" (buf0), "d" (buf1), "S" (ubuf0), "D" (ubuf1), "m" (dest), "a" (&c->redDither), "m"(uv_off) ); } else { __asm__ volatile( "mov %%"REG_b", "ESP_OFFSET"(%5) \n\t" "mov %4, %%"REG_b" \n\t" "push %%"REG_BP" \n\t" YSCALEYUV2RGB1b(%%REGBP, %5, %6) "pxor %%mm7, %%mm7 \n\t" /* mm2=B, %%mm4=G, %%mm5=R, %%mm7=0 */ #ifdef DITHER1XBPP "paddusb "BLUE_DITHER"(%5), %%mm2 \n\t" "paddusb "GREEN_DITHER"(%5), %%mm4 \n\t" "paddusb "RED_DITHER"(%5), %%mm5 \n\t" #endif WRITERGB16(%%REGb, 8280(%5), %%REGBP) "pop %%"REG_BP" \n\t" "mov "ESP_OFFSET"(%5), %%"REG_b" \n\t" :: "c" (buf0), "d" (buf1), "S" (ubuf0), "D" (ubuf1), "m" (dest), "a" (&c->redDither), "m"(uv_off) ); } } | 13,096 |
1 | static void coroutine_enter_cb(void *opaque, int ret) { Coroutine *co = opaque; qemu_coroutine_enter(co, NULL); } | 13,098 |
1 | static int ppc6xx_tlb_check (CPUState *env, mmu_ctx_t *ctx, target_ulong eaddr, int rw, int access_type) { ppc_tlb_t *tlb; int nr, best, way; int ret; best = -1; ret = -1; /* No TLB found */ for (way = 0; way < env->nb_ways; way++) { nr = ppc6xx_tlb_getnum(env, eaddr, way, access_type == ACCESS_CODE ? 1 : 0); tlb = &env->tlb[nr]; /* This test "emulates" the PTE index match for hardware TLBs */ if ((eaddr & TARGET_PAGE_MASK) != tlb->EPN) { #if defined (DEBUG_SOFTWARE_TLB) if (loglevel != 0) { fprintf(logfile, "TLB %d/%d %s [%08x %08x] <> %08x\n", nr, env->nb_tlb, pte_is_valid(tlb->pte0) ? "valid" : "inval", tlb->EPN, tlb->EPN + TARGET_PAGE_SIZE, eaddr); } #endif continue; } #if defined (DEBUG_SOFTWARE_TLB) if (loglevel != 0) { fprintf(logfile, "TLB %d/%d %s %08x <> %08x %08x %c %c\n", nr, env->nb_tlb, pte_is_valid(tlb->pte0) ? "valid" : "inval", tlb->EPN, eaddr, tlb->pte1, rw ? 'S' : 'L', access_type == ACCESS_CODE ? 'I' : 'D'); } #endif switch (pte_check(ctx, tlb->pte0, tlb->pte1, 0, rw)) { case -3: /* TLB inconsistency */ return -1; case -2: /* Access violation */ ret = -2; best = nr; break; case -1: default: /* No match */ break; case 0: /* access granted */ /* XXX: we should go on looping to check all TLBs consistency * but we can speed-up the whole thing as the * result would be undefined if TLBs are not consistent. */ ret = 0; best = nr; goto done; } } if (best != -1) { done: #if defined (DEBUG_SOFTWARE_TLB) if (loglevel > 0) { fprintf(logfile, "found TLB at addr 0x%08lx prot=0x%01x ret=%d\n", ctx->raddr & TARGET_PAGE_MASK, ctx->prot, ret); } #endif /* Update page flags */ pte_update_flags(ctx, &env->tlb[best].pte1, ret, rw); } return ret; } | 13,099 |
1 | int bdrv_all_goto_snapshot(const char *name, BlockDriverState **first_bad_bs) { int err = 0; BlockDriverState *bs; BdrvNextIterator *it = NULL; while (err == 0 && (it = bdrv_next(it, &bs))) { AioContext *ctx = bdrv_get_aio_context(bs); aio_context_acquire(ctx); if (bdrv_can_snapshot(bs)) { err = bdrv_snapshot_goto(bs, name); } aio_context_release(ctx); } *first_bad_bs = bs; return err; } | 13,101 |
1 | int RENAME(swri_resample)(ResampleContext *c, DELEM *dst, const DELEM *src, int *consumed, int src_size, int dst_size, int update_ctx){ int dst_index, i; int index= c->index; int frac= c->frac; int dst_incr_frac= c->dst_incr % c->src_incr; int dst_incr= c->dst_incr / c->src_incr; int compensation_distance= c->compensation_distance; av_assert1(c->filter_shift == FILTER_SHIFT); av_assert1(c->felem_size == sizeof(FELEM)); if(compensation_distance == 0 && c->filter_length == 1 && c->phase_shift==0){ int64_t index2= (1LL<<32)*c->frac/c->src_incr + (1LL<<32)*index; int64_t incr= (1LL<<32) * c->dst_incr / c->src_incr; int new_size = (src_size * (int64_t)c->src_incr - frac + c->dst_incr - 1) / c->dst_incr; dst_size= FFMIN(dst_size, new_size); for(dst_index=0; dst_index < dst_size; dst_index++){ dst[dst_index] = src[index2>>32]; index2 += incr; } index += dst_index * dst_incr; index += (frac + dst_index * (int64_t)dst_incr_frac) / c->src_incr; frac = (frac + dst_index * (int64_t)dst_incr_frac) % c->src_incr; av_assert2(index >= 0); *consumed= index; index = 0; } else if (compensation_distance == 0 && index >= 0) { int64_t end_index = (1 + src_size - c->filter_length) << c->phase_shift; int64_t delta_frac = (end_index - index) * c->src_incr - c->frac; int delta_n = (delta_frac + c->dst_incr - 1) / c->dst_incr; int n = FFMIN(dst_size, delta_n); int sample_index; if (!c->linear) { sample_index = index >> c->phase_shift; index &= c->phase_mask; for (dst_index = 0; dst_index < n; dst_index++) { FELEM *filter = ((FELEM *) c->filter_bank) + c->filter_alloc * index; #ifdef COMMON_CORE COMMON_CORE #else FELEM2 val=0; for (i = 0; i < c->filter_length; i++) { val += src[sample_index + i] * (FELEM2)filter[i]; } OUT(dst[dst_index], val); #endif frac += dst_incr_frac; index += dst_incr; if (frac >= c->src_incr) { frac -= c->src_incr; index++; } sample_index += index >> c->phase_shift; index &= c->phase_mask; } } else { sample_index = index >> c->phase_shift; index &= c->phase_mask; for (dst_index = 0; dst_index < n; dst_index++) { FELEM *filter = ((FELEM *) c->filter_bank) + c->filter_alloc * index; FELEM2 val=0, v2 = 0; #ifdef LINEAR_CORE LINEAR_CORE #else for (i = 0; i < c->filter_length; i++) { val += src[sample_index + i] * (FELEM2)filter[i]; v2 += src[sample_index + i] * (FELEM2)filter[i + c->filter_alloc]; } #endif val += (v2 - val) * (FELEML) frac / c->src_incr; OUT(dst[dst_index], val); frac += dst_incr_frac; index += dst_incr; if (frac >= c->src_incr) { frac -= c->src_incr; index++; } sample_index += index >> c->phase_shift; index &= c->phase_mask; } } *consumed = sample_index; } else { int sample_index = 0; for(dst_index=0; dst_index < dst_size; dst_index++){ FELEM *filter; FELEM2 val=0; sample_index += index >> c->phase_shift; index &= c->phase_mask; filter = ((FELEM*)c->filter_bank) + c->filter_alloc*index; if(sample_index + c->filter_length > src_size || -sample_index >= src_size){ break; }else if(sample_index < 0){ for(i=0; i<c->filter_length; i++) val += src[FFABS(sample_index + i)] * (FELEM2)filter[i]; OUT(dst[dst_index], val); }else if(c->linear){ FELEM2 v2=0; #ifdef LINEAR_CORE LINEAR_CORE #else for(i=0; i<c->filter_length; i++){ val += src[sample_index + i] * (FELEM2)filter[i]; v2 += src[sample_index + i] * (FELEM2)filter[i + c->filter_alloc]; } #endif val+=(v2-val)*(FELEML)frac / c->src_incr; OUT(dst[dst_index], val); }else{ #ifdef COMMON_CORE COMMON_CORE #else for(i=0; i<c->filter_length; i++){ val += src[sample_index + i] * (FELEM2)filter[i]; } OUT(dst[dst_index], val); #endif } frac += dst_incr_frac; index += dst_incr; if(frac >= c->src_incr){ frac -= c->src_incr; index++; } if(dst_index + 1 == compensation_distance){ compensation_distance= 0; dst_incr_frac= c->ideal_dst_incr % c->src_incr; dst_incr= c->ideal_dst_incr / c->src_incr; } } *consumed= FFMAX(sample_index, 0); index += FFMIN(sample_index, 0) << c->phase_shift; if(compensation_distance){ compensation_distance -= dst_index; av_assert1(compensation_distance > 0); } } if(update_ctx){ c->frac= frac; c->index= index; c->dst_incr= dst_incr_frac + c->src_incr*dst_incr; c->compensation_distance= compensation_distance; } return dst_index; } | 13,102 |
1 | static void gen_rdhwr(DisasContext *ctx, int rt, int rd, int sel) { TCGv t0; #if !defined(CONFIG_USER_ONLY) /* The Linux kernel will emulate rdhwr if it's not supported natively. Therefore only check the ISA in system mode. */ check_insn(ctx, ISA_MIPS32R2); #endif t0 = tcg_temp_new(); switch (rd) { case 0: gen_helper_rdhwr_cpunum(t0, cpu_env); gen_store_gpr(t0, rt); break; case 1: gen_helper_rdhwr_synci_step(t0, cpu_env); gen_store_gpr(t0, rt); break; case 2: if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_rdhwr_cc(t0, cpu_env); if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } gen_store_gpr(t0, rt); /* Break the TB to be able to take timer interrupts immediately after reading count. BS_STOP isn't sufficient, we need to ensure we break completely out of translated code. */ gen_save_pc(ctx->pc + 4); ctx->bstate = BS_EXCP; break; case 3: gen_helper_rdhwr_ccres(t0, cpu_env); gen_store_gpr(t0, rt); break; case 4: check_insn(ctx, ISA_MIPS32R6); if (sel != 0) { /* Performance counter registers are not implemented other than * control register 0. */ generate_exception(ctx, EXCP_RI); } gen_helper_rdhwr_performance(t0, cpu_env); gen_store_gpr(t0, rt); break; case 5: check_insn(ctx, ISA_MIPS32R6); gen_helper_rdhwr_xnp(t0, cpu_env); gen_store_gpr(t0, rt); break; case 29: #if defined(CONFIG_USER_ONLY) tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); gen_store_gpr(t0, rt); break; #else if ((ctx->hflags & MIPS_HFLAG_CP0) || (ctx->hflags & MIPS_HFLAG_HWRENA_ULR)) { tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUMIPSState, active_tc.CP0_UserLocal)); gen_store_gpr(t0, rt); } else { generate_exception_end(ctx, EXCP_RI); } break; #endif default: /* Invalid */ MIPS_INVAL("rdhwr"); generate_exception_end(ctx, EXCP_RI); break; } tcg_temp_free(t0); } | 13,103 |
1 | static int dca_subframe_footer(DCAContext *s, int base_channel) { int in, out, aux_data_count, aux_data_end, reserved; uint32_t nsyncaux; /* * Unpack optional information */ /* presumably optional information only appears in the core? */ if (!base_channel) { if (s->timestamp) skip_bits_long(&s->gb, 32); if (s->aux_data) { aux_data_count = get_bits(&s->gb, 6); // align (32-bit) skip_bits_long(&s->gb, (-get_bits_count(&s->gb)) & 31); aux_data_end = 8 * aux_data_count + get_bits_count(&s->gb); if ((nsyncaux = get_bits_long(&s->gb, 32)) != DCA_NSYNCAUX) { av_log(s->avctx, AV_LOG_ERROR, "nSYNCAUX mismatch %#"PRIx32"\n", nsyncaux); return AVERROR_INVALIDDATA; } if (get_bits1(&s->gb)) { // bAUXTimeStampFlag avpriv_request_sample(s->avctx, "Auxiliary Decode Time Stamp Flag"); // align (4-bit) skip_bits(&s->gb, (-get_bits_count(&s->gb)) & 4); // 44 bits: nMSByte (8), nMarker (4), nLSByte (28), nMarker (4) skip_bits_long(&s->gb, 44); } if ((s->core_downmix = get_bits1(&s->gb))) { int am = get_bits(&s->gb, 3); switch (am) { case 0: s->core_downmix_amode = DCA_MONO; break; case 1: s->core_downmix_amode = DCA_STEREO; break; case 2: s->core_downmix_amode = DCA_STEREO_TOTAL; break; case 3: s->core_downmix_amode = DCA_3F; break; case 4: s->core_downmix_amode = DCA_2F1R; break; case 5: s->core_downmix_amode = DCA_2F2R; break; case 6: s->core_downmix_amode = DCA_3F1R; break; default: av_log(s->avctx, AV_LOG_ERROR, "Invalid mode %d for embedded downmix coefficients\n", am); return AVERROR_INVALIDDATA; } for (out = 0; out < ff_dca_channels[s->core_downmix_amode]; out++) { for (in = 0; in < s->audio_header.prim_channels + !!s->lfe; in++) { uint16_t tmp = get_bits(&s->gb, 9); if ((tmp & 0xFF) > 241) { av_log(s->avctx, AV_LOG_ERROR, "Invalid downmix coefficient code %"PRIu16"\n", tmp); return AVERROR_INVALIDDATA; } s->core_downmix_codes[in][out] = tmp; } } } align_get_bits(&s->gb); // byte align skip_bits(&s->gb, 16); // nAUXCRC16 // additional data (reserved, cf. ETSI TS 102 114 V1.4.1) if ((reserved = (aux_data_end - get_bits_count(&s->gb))) < 0) { av_log(s->avctx, AV_LOG_ERROR, "Overread auxiliary data by %d bits\n", -reserved); return AVERROR_INVALIDDATA; } else if (reserved) { avpriv_request_sample(s->avctx, "Core auxiliary data reserved content"); skip_bits_long(&s->gb, reserved); } } if (s->crc_present && s->dynrange) get_bits(&s->gb, 16); } return 0; } | 13,104 |
1 | static void pred_temp_direct_motion(const H264Context *const h, H264SliceContext *sl, int *mb_type) { int b8_stride = 2; int b4_stride = h->b_stride; int mb_xy = sl->mb_xy, mb_y = sl->mb_y; int mb_type_col[2]; const int16_t (*l1mv0)[2], (*l1mv1)[2]; const int8_t *l1ref0, *l1ref1; const int is_b8x8 = IS_8X8(*mb_type); unsigned int sub_mb_type; int i8, i4; assert(sl->ref_list[1][0].reference & 3); await_reference_mb_row(h, sl->ref_list[1][0].parent, sl->mb_y + !!IS_INTERLACED(*mb_type)); if (IS_INTERLACED(sl->ref_list[1][0].parent->mb_type[mb_xy])) { // AFL/AFR/FR/FL -> AFL/FL if (!IS_INTERLACED(*mb_type)) { // AFR/FR -> AFL/FL mb_y = (sl->mb_y & ~1) + sl->col_parity; mb_xy = sl->mb_x + ((sl->mb_y & ~1) + sl->col_parity) * h->mb_stride; b8_stride = 0; } else { mb_y += sl->col_fieldoff; mb_xy += h->mb_stride * sl->col_fieldoff; // non-zero for FL -> FL & differ parity } goto single_col; } else { // AFL/AFR/FR/FL -> AFR/FR if (IS_INTERLACED(*mb_type)) { // AFL /FL -> AFR/FR mb_y = sl->mb_y & ~1; mb_xy = sl->mb_x + (sl->mb_y & ~1) * h->mb_stride; mb_type_col[0] = sl->ref_list[1][0].parent->mb_type[mb_xy]; mb_type_col[1] = sl->ref_list[1][0].parent->mb_type[mb_xy + h->mb_stride]; b8_stride = 2 + 4 * h->mb_stride; b4_stride *= 6; if (IS_INTERLACED(mb_type_col[0]) != IS_INTERLACED(mb_type_col[1])) { mb_type_col[0] &= ~MB_TYPE_INTERLACED; mb_type_col[1] &= ~MB_TYPE_INTERLACED; } sub_mb_type = MB_TYPE_16x16 | MB_TYPE_P0L0 | MB_TYPE_P0L1 | MB_TYPE_DIRECT2; /* B_SUB_8x8 */ if ((mb_type_col[0] & MB_TYPE_16x16_OR_INTRA) && (mb_type_col[1] & MB_TYPE_16x16_OR_INTRA) && !is_b8x8) { *mb_type |= MB_TYPE_16x8 | MB_TYPE_L0L1 | MB_TYPE_DIRECT2; /* B_16x8 */ } else { *mb_type |= MB_TYPE_8x8 | MB_TYPE_L0L1; } } else { // AFR/FR -> AFR/FR single_col: mb_type_col[0] = mb_type_col[1] = sl->ref_list[1][0].parent->mb_type[mb_xy]; sub_mb_type = MB_TYPE_16x16 | MB_TYPE_P0L0 | MB_TYPE_P0L1 | MB_TYPE_DIRECT2; /* B_SUB_8x8 */ if (!is_b8x8 && (mb_type_col[0] & MB_TYPE_16x16_OR_INTRA)) { *mb_type |= MB_TYPE_16x16 | MB_TYPE_P0L0 | MB_TYPE_P0L1 | MB_TYPE_DIRECT2; /* B_16x16 */ } else if (!is_b8x8 && (mb_type_col[0] & (MB_TYPE_16x8 | MB_TYPE_8x16))) { *mb_type |= MB_TYPE_L0L1 | MB_TYPE_DIRECT2 | (mb_type_col[0] & (MB_TYPE_16x8 | MB_TYPE_8x16)); } else { if (!h->ps.sps->direct_8x8_inference_flag) { /* FIXME: save sub mb types from previous frames (or derive * from MVs) so we know exactly what block size to use */ sub_mb_type = MB_TYPE_8x8 | MB_TYPE_P0L0 | MB_TYPE_P0L1 | MB_TYPE_DIRECT2; /* B_SUB_4x4 */ } *mb_type |= MB_TYPE_8x8 | MB_TYPE_L0L1; } } } await_reference_mb_row(h, sl->ref_list[1][0].parent, mb_y); l1mv0 = &sl->ref_list[1][0].parent->motion_val[0][h->mb2b_xy[mb_xy]]; l1mv1 = &sl->ref_list[1][0].parent->motion_val[1][h->mb2b_xy[mb_xy]]; l1ref0 = &sl->ref_list[1][0].parent->ref_index[0][4 * mb_xy]; l1ref1 = &sl->ref_list[1][0].parent->ref_index[1][4 * mb_xy]; if (!b8_stride) { if (sl->mb_y & 1) { l1ref0 += 2; l1ref1 += 2; l1mv0 += 2 * b4_stride; l1mv1 += 2 * b4_stride; } } { const int *map_col_to_list0[2] = { sl->map_col_to_list0[0], sl->map_col_to_list0[1] }; const int *dist_scale_factor = sl->dist_scale_factor; int ref_offset; if (FRAME_MBAFF(h) && IS_INTERLACED(*mb_type)) { map_col_to_list0[0] = sl->map_col_to_list0_field[sl->mb_y & 1][0]; map_col_to_list0[1] = sl->map_col_to_list0_field[sl->mb_y & 1][1]; dist_scale_factor = sl->dist_scale_factor_field[sl->mb_y & 1]; } ref_offset = (sl->ref_list[1][0].parent->mbaff << 4) & (mb_type_col[0] >> 3); if (IS_INTERLACED(*mb_type) != IS_INTERLACED(mb_type_col[0])) { int y_shift = 2 * !IS_INTERLACED(*mb_type); assert(h->ps.sps->direct_8x8_inference_flag); for (i8 = 0; i8 < 4; i8++) { const int x8 = i8 & 1; const int y8 = i8 >> 1; int ref0, scale; const int16_t (*l1mv)[2] = l1mv0; if (is_b8x8 && !IS_DIRECT(sl->sub_mb_type[i8])) continue; sl->sub_mb_type[i8] = sub_mb_type; fill_rectangle(&sl->ref_cache[1][scan8[i8 * 4]], 2, 2, 8, 0, 1); if (IS_INTRA(mb_type_col[y8])) { fill_rectangle(&sl->ref_cache[0][scan8[i8 * 4]], 2, 2, 8, 0, 1); fill_rectangle(&sl->mv_cache[0][scan8[i8 * 4]], 2, 2, 8, 0, 4); fill_rectangle(&sl->mv_cache[1][scan8[i8 * 4]], 2, 2, 8, 0, 4); continue; } ref0 = l1ref0[x8 + y8 * b8_stride]; if (ref0 >= 0) ref0 = map_col_to_list0[0][ref0 + ref_offset]; else { ref0 = map_col_to_list0[1][l1ref1[x8 + y8 * b8_stride] + ref_offset]; l1mv = l1mv1; } scale = dist_scale_factor[ref0]; fill_rectangle(&sl->ref_cache[0][scan8[i8 * 4]], 2, 2, 8, ref0, 1); { const int16_t *mv_col = l1mv[x8 * 3 + y8 * b4_stride]; int my_col = (mv_col[1] << y_shift) / 2; int mx = (scale * mv_col[0] + 128) >> 8; int my = (scale * my_col + 128) >> 8; fill_rectangle(&sl->mv_cache[0][scan8[i8 * 4]], 2, 2, 8, pack16to32(mx, my), 4); fill_rectangle(&sl->mv_cache[1][scan8[i8 * 4]], 2, 2, 8, pack16to32(mx - mv_col[0], my - my_col), 4); } } return; } /* one-to-one mv scaling */ if (IS_16X16(*mb_type)) { int ref, mv0, mv1; fill_rectangle(&sl->ref_cache[1][scan8[0]], 4, 4, 8, 0, 1); if (IS_INTRA(mb_type_col[0])) { ref = mv0 = mv1 = 0; } else { const int ref0 = l1ref0[0] >= 0 ? map_col_to_list0[0][l1ref0[0] + ref_offset] : map_col_to_list0[1][l1ref1[0] + ref_offset]; const int scale = dist_scale_factor[ref0]; const int16_t *mv_col = l1ref0[0] >= 0 ? l1mv0[0] : l1mv1[0]; int mv_l0[2]; mv_l0[0] = (scale * mv_col[0] + 128) >> 8; mv_l0[1] = (scale * mv_col[1] + 128) >> 8; ref = ref0; mv0 = pack16to32(mv_l0[0], mv_l0[1]); mv1 = pack16to32(mv_l0[0] - mv_col[0], mv_l0[1] - mv_col[1]); } fill_rectangle(&sl->ref_cache[0][scan8[0]], 4, 4, 8, ref, 1); fill_rectangle(&sl->mv_cache[0][scan8[0]], 4, 4, 8, mv0, 4); fill_rectangle(&sl->mv_cache[1][scan8[0]], 4, 4, 8, mv1, 4); } else { for (i8 = 0; i8 < 4; i8++) { const int x8 = i8 & 1; const int y8 = i8 >> 1; int ref0, scale; const int16_t (*l1mv)[2] = l1mv0; if (is_b8x8 && !IS_DIRECT(sl->sub_mb_type[i8])) continue; sl->sub_mb_type[i8] = sub_mb_type; fill_rectangle(&sl->ref_cache[1][scan8[i8 * 4]], 2, 2, 8, 0, 1); if (IS_INTRA(mb_type_col[0])) { fill_rectangle(&sl->ref_cache[0][scan8[i8 * 4]], 2, 2, 8, 0, 1); fill_rectangle(&sl->mv_cache[0][scan8[i8 * 4]], 2, 2, 8, 0, 4); fill_rectangle(&sl->mv_cache[1][scan8[i8 * 4]], 2, 2, 8, 0, 4); continue; } assert(b8_stride == 2); ref0 = l1ref0[i8]; if (ref0 >= 0) ref0 = map_col_to_list0[0][ref0 + ref_offset]; else { ref0 = map_col_to_list0[1][l1ref1[i8] + ref_offset]; l1mv = l1mv1; } scale = dist_scale_factor[ref0]; fill_rectangle(&sl->ref_cache[0][scan8[i8 * 4]], 2, 2, 8, ref0, 1); if (IS_SUB_8X8(sub_mb_type)) { const int16_t *mv_col = l1mv[x8 * 3 + y8 * 3 * b4_stride]; int mx = (scale * mv_col[0] + 128) >> 8; int my = (scale * mv_col[1] + 128) >> 8; fill_rectangle(&sl->mv_cache[0][scan8[i8 * 4]], 2, 2, 8, pack16to32(mx, my), 4); fill_rectangle(&sl->mv_cache[1][scan8[i8 * 4]], 2, 2, 8, pack16to32(mx - mv_col[0], my - mv_col[1]), 4); } else { for (i4 = 0; i4 < 4; i4++) { const int16_t *mv_col = l1mv[x8 * 2 + (i4 & 1) + (y8 * 2 + (i4 >> 1)) * b4_stride]; int16_t *mv_l0 = sl->mv_cache[0][scan8[i8 * 4 + i4]]; mv_l0[0] = (scale * mv_col[0] + 128) >> 8; mv_l0[1] = (scale * mv_col[1] + 128) >> 8; AV_WN32A(sl->mv_cache[1][scan8[i8 * 4 + i4]], pack16to32(mv_l0[0] - mv_col[0], mv_l0[1] - mv_col[1])); } } } } } } | 13,105 |
1 | static void ff_mpeg4_init_direct_mv(MpegEncContext *s){ //FIXME table is stored in MpegEncContext for thread-safety, // but a static array would be faster static const int tab_size = sizeof(s->direct_scale_mv[0])/sizeof(int16_t); static const int tab_bias = (tab_size/2); int i; for(i=0; i<tab_size; i++){ s->direct_scale_mv[0][i] = (i-tab_bias)*s->pb_time/s->pp_time; s->direct_scale_mv[1][i] = (i-tab_bias)*(s->pb_time-s->pp_time)/s->pp_time; } } | 13,106 |
0 | static void video_image_display(VideoState *is) { Frame *vp; Frame *sp; AVPicture pict; SDL_Rect rect; int i; vp = frame_queue_peek(&is->pictq); if (vp->bmp) { if (is->subtitle_st) { if (frame_queue_nb_remaining(&is->subpq) > 0) { sp = frame_queue_peek(&is->subpq); if (vp->pts >= sp->pts + ((float) sp->sub.start_display_time / 1000)) { SDL_LockYUVOverlay (vp->bmp); pict.data[0] = vp->bmp->pixels[0]; pict.data[1] = vp->bmp->pixels[2]; pict.data[2] = vp->bmp->pixels[1]; pict.linesize[0] = vp->bmp->pitches[0]; pict.linesize[1] = vp->bmp->pitches[2]; pict.linesize[2] = vp->bmp->pitches[1]; for (i = 0; i < sp->sub.num_rects; i++) blend_subrect(&pict, sp->sub.rects[i], vp->bmp->w, vp->bmp->h); SDL_UnlockYUVOverlay (vp->bmp); } } } calculate_display_rect(&rect, is->xleft, is->ytop, is->width, is->height, vp->width, vp->height, vp->sar); SDL_DisplayYUVOverlay(vp->bmp, &rect); if (rect.x != is->last_display_rect.x || rect.y != is->last_display_rect.y || rect.w != is->last_display_rect.w || rect.h != is->last_display_rect.h || is->force_refresh) { int bgcolor = SDL_MapRGB(screen->format, 0x00, 0x00, 0x00); fill_border(is->xleft, is->ytop, is->width, is->height, rect.x, rect.y, rect.w, rect.h, bgcolor, 1); is->last_display_rect = rect; } } } | 13,107 |
0 | static int pad_count(const AVFilterPad *pads) { int count; if (!pads) return 0; for(count = 0; pads->name; count ++) pads ++; return count; } | 13,108 |
0 | rtsp_read_reply (AVFormatContext *s, RTSPMessageHeader *reply, unsigned char **content_ptr, int return_on_interleaved_data) { RTSPState *rt = s->priv_data; char buf[4096], buf1[1024], *q; unsigned char ch; const char *p; int ret, content_length, line_count = 0; unsigned char *content = NULL; memset(reply, 0, sizeof(*reply)); /* parse reply (XXX: use buffers) */ rt->last_reply[0] = '\0'; for(;;) { q = buf; for(;;) { ret = url_read_complete(rt->rtsp_hd, &ch, 1); #ifdef DEBUG_RTP_TCP dprintf(s, "ret=%d c=%02x [%c]\n", ret, ch, ch); #endif if (ret != 1) return -1; if (ch == '\n') break; if (ch == '$') { /* XXX: only parse it if first char on line ? */ if (return_on_interleaved_data) { return 1; } else rtsp_skip_packet(s); } else if (ch != '\r') { if ((q - buf) < sizeof(buf) - 1) *q++ = ch; } } *q = '\0'; dprintf(s, "line='%s'\n", buf); /* test if last line */ if (buf[0] == '\0') break; p = buf; if (line_count == 0) { /* get reply code */ get_word(buf1, sizeof(buf1), &p); get_word(buf1, sizeof(buf1), &p); reply->status_code = atoi(buf1); } else { rtsp_parse_line(reply, p); av_strlcat(rt->last_reply, p, sizeof(rt->last_reply)); av_strlcat(rt->last_reply, "\n", sizeof(rt->last_reply)); } line_count++; } if (rt->session_id[0] == '\0' && reply->session_id[0] != '\0') av_strlcpy(rt->session_id, reply->session_id, sizeof(rt->session_id)); content_length = reply->content_length; if (content_length > 0) { /* leave some room for a trailing '\0' (useful for simple parsing) */ content = av_malloc(content_length + 1); (void)url_read_complete(rt->rtsp_hd, content, content_length); content[content_length] = '\0'; } if (content_ptr) *content_ptr = content; else av_free(content); /* EOS */ if (reply->notice == 2101 /* End-of-Stream Reached */ || reply->notice == 2104 /* Start-of-Stream Reached */ || reply->notice == 2306 /* Continuous Feed Terminated */) rt->state = RTSP_STATE_IDLE; else if (reply->notice >= 4400 && reply->notice < 5500) return AVERROR(EIO); /* data or server error */ else if (reply->notice == 2401 /* Ticket Expired */ || (reply->notice >= 5500 && reply->notice < 5600) /* end of term */ ) return AVERROR(EPERM); return 0; } | 13,109 |
0 | int av_fifo_generic_write(AVFifoBuffer *f, void *src, int size, int (*func)(void*, void*, int)) { int total = size; do { int len = FFMIN(f->end - f->wptr, size); if (func) { if (func(src, f->wptr, len) <= 0) break; } else { memcpy(f->wptr, src, len); src = (uint8_t*)src + len; } // Write memory barrier needed for SMP here in theory f->wptr += len; if (f->wptr >= f->end) f->wptr = f->buffer; f->wndx += len; size -= len; } while (size > 0); return total - size; } | 13,111 |
0 | int av_image_get_linesize(enum AVPixelFormat pix_fmt, int width, int plane) { const AVPixFmtDescriptor *desc = av_pix_fmt_desc_get(pix_fmt); int max_step [4]; /* max pixel step for each plane */ int max_step_comp[4]; /* the component for each plane which has the max pixel step */ if ((unsigned)pix_fmt >= AV_PIX_FMT_NB || desc->flags & AV_PIX_FMT_FLAG_HWACCEL) return AVERROR(EINVAL); av_image_fill_max_pixsteps(max_step, max_step_comp, desc); return image_get_linesize(width, plane, max_step[plane], max_step_comp[plane], desc); } | 13,112 |
0 | static int encode_slice(AVCodecContext *c, void *arg) { FFV1Context *fs = *(void **)arg; FFV1Context *f = fs->avctx->priv_data; int width = fs->slice_width; int height = fs->slice_height; int x = fs->slice_x; int y = fs->slice_y; const AVFrame *const p = f->frame; const int ps = (av_pix_fmt_desc_get(c->pix_fmt)->flags & AV_PIX_FMT_FLAG_PLANAR) ? (f->bits_per_raw_sample > 8) + 1 : 4; if (f->key_frame) ffv1_clear_slice_state(f, fs); if (f->version > 2) { encode_slice_header(f, fs); } if (!fs->ac) { if (f->version > 2) put_rac(&fs->c, (uint8_t[]) { 129 }, 0); fs->ac_byte_count = f->version > 2 || (!x && !y) ? ff_rac_terminate( &fs->c) : 0; init_put_bits(&fs->pb, fs->c.bytestream_start + fs->ac_byte_count, fs->c.bytestream_end - fs->c.bytestream_start - fs->ac_byte_count); } if (f->colorspace == 0) { const int chroma_width = -((-width) >> f->chroma_h_shift); const int chroma_height = -((-height) >> f->chroma_v_shift); const int cx = x >> f->chroma_h_shift; const int cy = y >> f->chroma_v_shift; encode_plane(fs, p->data[0] + ps * x + y * p->linesize[0], width, height, p->linesize[0], 0); if (f->chroma_planes) { encode_plane(fs, p->data[1] + ps * cx + cy * p->linesize[1], chroma_width, chroma_height, p->linesize[1], 1); encode_plane(fs, p->data[2] + ps * cx + cy * p->linesize[2], chroma_width, chroma_height, p->linesize[2], 1); } if (fs->transparency) encode_plane(fs, p->data[3] + ps * x + y * p->linesize[3], width, height, p->linesize[3], 2); } else { const uint8_t *planes[3] = { p->data[0] + ps * x + y * p->linesize[0], p->data[1] + ps * x + y * p->linesize[1], p->data[2] + ps * x + y * p->linesize[2] }; encode_rgb_frame(fs, planes, width, height, p->linesize); } emms_c(); return 0; } | 13,113 |
1 | static int qemu_rbd_open(BlockDriverState *bs, const char *filename, int flags) { BDRVRBDState *s = bs->opaque; char pool[RBD_MAX_POOL_NAME_SIZE]; char snap_buf[RBD_MAX_SNAP_NAME_SIZE]; char conf[RBD_MAX_CONF_SIZE]; char clientname_buf[RBD_MAX_CONF_SIZE]; char *clientname; int r; if (qemu_rbd_parsename(filename, pool, sizeof(pool), snap_buf, sizeof(snap_buf), s->name, sizeof(s->name), conf, sizeof(conf)) < 0) { return -EINVAL; } s->snap = NULL; if (snap_buf[0] != '\0') { s->snap = g_strdup(snap_buf); } clientname = qemu_rbd_parse_clientname(conf, clientname_buf); r = rados_create(&s->cluster, clientname); if (r < 0) { error_report("error initializing"); return r; } if (strstr(conf, "conf=") == NULL) { r = rados_conf_read_file(s->cluster, NULL); if (r < 0) { error_report("error reading config file"); rados_shutdown(s->cluster); return r; } } if (conf[0] != '\0') { r = qemu_rbd_set_conf(s->cluster, conf); if (r < 0) { error_report("error setting config options"); rados_shutdown(s->cluster); return r; } } r = rados_connect(s->cluster); if (r < 0) { error_report("error connecting"); rados_shutdown(s->cluster); return r; } r = rados_ioctx_create(s->cluster, pool, &s->io_ctx); if (r < 0) { error_report("error opening pool %s", pool); rados_shutdown(s->cluster); return r; } r = rbd_open(s->io_ctx, s->name, &s->image, s->snap); if (r < 0) { error_report("error reading header from %s", s->name); rados_ioctx_destroy(s->io_ctx); rados_shutdown(s->cluster); return r; } bs->read_only = (s->snap != NULL); s->event_reader_pos = 0; r = qemu_pipe(s->fds); if (r < 0) { error_report("error opening eventfd"); goto failed; } fcntl(s->fds[0], F_SETFL, O_NONBLOCK); fcntl(s->fds[1], F_SETFL, O_NONBLOCK); qemu_aio_set_fd_handler(s->fds[RBD_FD_READ], qemu_rbd_aio_event_reader, NULL, qemu_rbd_aio_flush_cb, NULL, s); return 0; failed: rbd_close(s->image); rados_ioctx_destroy(s->io_ctx); rados_shutdown(s->cluster); return r; } | 13,115 |
1 | static inline int coupling_strategy(AC3DecodeContext *s, int blk, uint8_t *bit_alloc_stages) { GetBitContext *bc = &s->gbc; int fbw_channels = s->fbw_channels; int channel_mode = s->channel_mode; int ch; memset(bit_alloc_stages, 3, AC3_MAX_CHANNELS); if (!s->eac3) s->cpl_in_use[blk] = get_bits1(bc); if (s->cpl_in_use[blk]) { /* coupling in use */ int cpl_start_subband, cpl_end_subband; if (channel_mode < AC3_CHMODE_STEREO) { av_log(s->avctx, AV_LOG_ERROR, "coupling not allowed in mono or dual-mono\n"); return AVERROR_INVALIDDATA; } /* check for enhanced coupling */ if (s->eac3 && get_bits1(bc)) { /* TODO: parse enhanced coupling strategy info */ avpriv_request_sample(s->avctx, "Enhanced coupling"); return AVERROR_PATCHWELCOME; } /* determine which channels are coupled */ if (s->eac3 && s->channel_mode == AC3_CHMODE_STEREO) { s->channel_in_cpl[1] = 1; s->channel_in_cpl[2] = 1; } else { for (ch = 1; ch <= fbw_channels; ch++) s->channel_in_cpl[ch] = get_bits1(bc); } /* phase flags in use */ if (channel_mode == AC3_CHMODE_STEREO) s->phase_flags_in_use = get_bits1(bc); /* coupling frequency range */ cpl_start_subband = get_bits(bc, 4); cpl_end_subband = s->spx_in_use ? (s->spx_src_start_freq - 37) / 12 : get_bits(bc, 4) + 3; if (cpl_start_subband >= cpl_end_subband) { av_log(s->avctx, AV_LOG_ERROR, "invalid coupling range (%d >= %d)\n", cpl_start_subband, cpl_end_subband); return AVERROR_INVALIDDATA; } s->start_freq[CPL_CH] = cpl_start_subband * 12 + 37; s->end_freq[CPL_CH] = cpl_end_subband * 12 + 37; decode_band_structure(bc, blk, s->eac3, 0, cpl_start_subband, cpl_end_subband, ff_eac3_default_cpl_band_struct, &s->num_cpl_bands, s->cpl_band_sizes); } else { /* coupling not in use */ for (ch = 1; ch <= fbw_channels; ch++) { s->channel_in_cpl[ch] = 0; s->first_cpl_coords[ch] = 1; } s->first_cpl_leak = s->eac3; s->phase_flags_in_use = 0; } return 0; } | 13,116 |
0 | static int tiff_decode_tag(TiffContext *s, const uint8_t *start, const uint8_t *buf, const uint8_t *end_buf) { int tag, type, count, off, value = 0; int i, j; uint32_t *pal; const uint8_t *rp, *gp, *bp; tag = tget_short(&buf, s->le); type = tget_short(&buf, s->le); count = tget_long(&buf, s->le); off = tget_long(&buf, s->le); if(count == 1){ switch(type){ case TIFF_BYTE: case TIFF_SHORT: buf -= 4; value = tget(&buf, type, s->le); buf = NULL; break; case TIFF_LONG: value = off; buf = NULL; break; case TIFF_STRING: if(count <= 4){ buf -= 4; break; } default: value = -1; buf = start + off; } }else if(type_sizes[type] * count <= 4){ buf -= 4; }else{ buf = start + off; } if(buf && (buf < start || buf > end_buf)){ av_log(s->avctx, AV_LOG_ERROR, "Tag referencing position outside the image\n"); return -1; } switch(tag){ case TIFF_WIDTH: s->width = value; break; case TIFF_HEIGHT: s->height = value; break; case TIFF_BPP: if(count == 1) s->bpp = value; else{ switch(type){ case TIFF_BYTE: s->bpp = (off & 0xFF) + ((off >> 8) & 0xFF) + ((off >> 16) & 0xFF) + ((off >> 24) & 0xFF); break; case TIFF_SHORT: case TIFF_LONG: s->bpp = 0; for(i = 0; i < count; i++) s->bpp += tget(&buf, type, s->le); break; default: s->bpp = -1; } } switch(s->bpp){ case 1: s->avctx->pix_fmt = PIX_FMT_MONOBLACK; break; case 8: s->avctx->pix_fmt = PIX_FMT_PAL8; break; case 24: s->avctx->pix_fmt = PIX_FMT_RGB24; break; case 16: if(count == 1){ s->avctx->pix_fmt = PIX_FMT_GRAY16BE; }else{ av_log(s->avctx, AV_LOG_ERROR, "This format is not supported (bpp=%i)\n", s->bpp); return -1; } break; case 32: if(count == 4){ s->avctx->pix_fmt = PIX_FMT_RGBA; }else{ av_log(s->avctx, AV_LOG_ERROR, "This format is not supported (bpp=%d, %d components)\n", s->bpp, count); return -1; } break; default: av_log(s->avctx, AV_LOG_ERROR, "This format is not supported (bpp=%d, %d components)\n", s->bpp, count); return -1; } if(s->width != s->avctx->width || s->height != s->avctx->height){ if(avcodec_check_dimensions(s->avctx, s->width, s->height)) return -1; avcodec_set_dimensions(s->avctx, s->width, s->height); } if(s->picture.data[0]) s->avctx->release_buffer(s->avctx, &s->picture); if(s->avctx->get_buffer(s->avctx, &s->picture) < 0){ av_log(s->avctx, AV_LOG_ERROR, "get_buffer() failed\n"); return -1; } if(s->bpp == 8){ /* make default grayscale pal */ pal = (uint32_t *) s->picture.data[1]; for(i = 0; i < 256; i++) pal[i] = i * 0x010101; } break; case TIFF_COMPR: s->compr = value; s->predictor = 0; switch(s->compr){ case TIFF_RAW: case TIFF_PACKBITS: case TIFF_LZW: case TIFF_CCITT_RLE: break; case TIFF_G3: case TIFF_G4: s->fax_opts = 0; break; case TIFF_DEFLATE: case TIFF_ADOBE_DEFLATE: #if CONFIG_ZLIB break; #else av_log(s->avctx, AV_LOG_ERROR, "Deflate: ZLib not compiled in\n"); return -1; #endif case TIFF_JPEG: case TIFF_NEWJPEG: av_log(s->avctx, AV_LOG_ERROR, "JPEG compression is not supported\n"); return -1; default: av_log(s->avctx, AV_LOG_ERROR, "Unknown compression method %i\n", s->compr); return -1; } break; case TIFF_ROWSPERSTRIP: if(type == TIFF_LONG && value == -1) value = s->avctx->height; if(value < 1){ av_log(s->avctx, AV_LOG_ERROR, "Incorrect value of rows per strip\n"); return -1; } s->rps = value; break; case TIFF_STRIP_OFFS: if(count == 1){ s->stripdata = NULL; s->stripoff = value; }else s->stripdata = start + off; s->strips = count; if(s->strips == 1) s->rps = s->height; s->sot = type; if(s->stripdata > end_buf){ av_log(s->avctx, AV_LOG_ERROR, "Tag referencing position outside the image\n"); return -1; } break; case TIFF_STRIP_SIZE: if(count == 1){ s->stripsizes = NULL; s->stripsize = value; s->strips = 1; }else{ s->stripsizes = start + off; } s->strips = count; s->sstype = type; if(s->stripsizes > end_buf){ av_log(s->avctx, AV_LOG_ERROR, "Tag referencing position outside the image\n"); return -1; } break; case TIFF_PREDICTOR: s->predictor = value; break; case TIFF_INVERT: switch(value){ case 0: s->invert = 1; break; case 1: s->invert = 0; break; case 2: case 3: break; default: av_log(s->avctx, AV_LOG_ERROR, "Color mode %d is not supported\n", value); return -1; } break; case TIFF_PAL: if(s->avctx->pix_fmt != PIX_FMT_PAL8){ av_log(s->avctx, AV_LOG_ERROR, "Palette met but this is not palettized format\n"); return -1; } pal = (uint32_t *) s->picture.data[1]; off = type_sizes[type]; rp = buf; gp = buf + count / 3 * off; bp = buf + count / 3 * off * 2; off = (type_sizes[type] - 1) << 3; for(i = 0; i < count / 3; i++){ j = (tget(&rp, type, s->le) >> off) << 16; j |= (tget(&gp, type, s->le) >> off) << 8; j |= tget(&bp, type, s->le) >> off; pal[i] = j; } break; case TIFF_PLANAR: if(value == 2){ av_log(s->avctx, AV_LOG_ERROR, "Planar format is not supported\n"); return -1; } break; case TIFF_T4OPTIONS: case TIFF_T6OPTIONS: s->fax_opts = value; break; } return 0; } | 13,117 |
1 | static int slirp_hostfwd(SlirpState *s, const char *redir_str, int legacy_format) { struct in_addr host_addr = { .s_addr = INADDR_ANY }; struct in_addr guest_addr = { .s_addr = 0 }; int host_port, guest_port; const char *p; char buf[256]; int is_udp; char *end; p = redir_str; if (!p || get_str_sep(buf, sizeof(buf), &p, ':') < 0) { goto fail_syntax; } if (!strcmp(buf, "tcp") || buf[0] == '\0') { is_udp = 0; } else if (!strcmp(buf, "udp")) { is_udp = 1; } else { goto fail_syntax; } if (!legacy_format) { if (get_str_sep(buf, sizeof(buf), &p, ':') < 0) { goto fail_syntax; } if (buf[0] != '\0' && !inet_aton(buf, &host_addr)) { goto fail_syntax; } } if (get_str_sep(buf, sizeof(buf), &p, legacy_format ? ':' : '-') < 0) { goto fail_syntax; } host_port = strtol(buf, &end, 0); if (*end != '\0' || host_port < 0 || host_port > 65535) { goto fail_syntax; } if (get_str_sep(buf, sizeof(buf), &p, ':') < 0) { goto fail_syntax; } if (buf[0] != '\0' && !inet_aton(buf, &guest_addr)) { goto fail_syntax; } guest_port = strtol(p, &end, 0); if (*end != '\0' || guest_port < 1 || guest_port > 65535) { goto fail_syntax; } if (slirp_add_hostfwd(s->slirp, is_udp, host_addr, host_port, guest_addr, guest_port) < 0) { error_report("could not set up host forwarding rule '%s'", redir_str); return -1; } return 0; fail_syntax: error_report("invalid host forwarding rule '%s'", redir_str); return -1; } | 13,119 |
1 | int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len) { if (dma_has_iommu(dma)) { return iommu_dma_memory_set(dma, addr, c, len); } do_dma_memory_set(addr, c, len); return 0; } | 13,120 |
1 | static int loadvm_postcopy_handle_run(MigrationIncomingState *mis) { PostcopyState ps = postcopy_state_set(POSTCOPY_INCOMING_RUNNING); trace_loadvm_postcopy_handle_run(); if (ps != POSTCOPY_INCOMING_LISTENING) { error_report("CMD_POSTCOPY_RUN in wrong postcopy state (%d)", ps); return -1; } mis->bh = qemu_bh_new(loadvm_postcopy_handle_run_bh, NULL); qemu_bh_schedule(mis->bh); /* We need to finish reading the stream from the package * and also stop reading anything more from the stream that loaded the * package (since it's now being read by the listener thread). * LOADVM_QUIT will quit all the layers of nested loadvm loops. */ return LOADVM_QUIT; } | 13,122 |
1 | int attribute_align_arg avcodec_encode_audio(AVCodecContext *avctx, uint8_t *buf, int buf_size, const short *samples) { AVPacket pkt; AVFrame *frame; int ret, samples_size, got_packet; av_init_packet(&pkt); pkt.data = buf; pkt.size = buf_size; if (samples) { frame = av_frame_alloc(); if (avctx->frame_size) { frame->nb_samples = avctx->frame_size; } else { /* if frame_size is not set, the number of samples must be * calculated from the buffer size */ int64_t nb_samples; if (!av_get_bits_per_sample(avctx->codec_id)) { av_log(avctx, AV_LOG_ERROR, "avcodec_encode_audio() does not " "support this codec\n"); av_frame_free(&frame); return AVERROR(EINVAL); } nb_samples = (int64_t)buf_size * 8 / (av_get_bits_per_sample(avctx->codec_id) * avctx->channels); if (nb_samples >= INT_MAX) { av_frame_free(&frame); return AVERROR(EINVAL); } frame->nb_samples = nb_samples; } /* it is assumed that the samples buffer is large enough based on the * relevant parameters */ samples_size = av_samples_get_buffer_size(NULL, avctx->channels, frame->nb_samples, avctx->sample_fmt, 1); if ((ret = avcodec_fill_audio_frame(frame, avctx->channels, avctx->sample_fmt, (const uint8_t *)samples, samples_size, 1)) < 0) { av_frame_free(&frame); return ret; } /* fabricate frame pts from sample count. * this is needed because the avcodec_encode_audio() API does not have * a way for the user to provide pts */ if (avctx->sample_rate && avctx->time_base.num) frame->pts = ff_samples_to_time_base(avctx, avctx->internal->sample_count); else frame->pts = AV_NOPTS_VALUE; avctx->internal->sample_count += frame->nb_samples; } else { frame = NULL; } got_packet = 0; ret = avcodec_encode_audio2(avctx, &pkt, frame, &got_packet); if (!ret && got_packet && avctx->coded_frame) { avctx->coded_frame->pts = pkt.pts; avctx->coded_frame->key_frame = !!(pkt.flags & AV_PKT_FLAG_KEY); } /* free any side data since we cannot return it */ av_packet_free_side_data(&pkt); if (frame && frame->extended_data != frame->data) av_freep(&frame->extended_data); av_frame_free(&frame); return ret ? ret : pkt.size; } | 13,123 |
1 | void main_loop_wait(int nonblocking) { IOHandlerRecord *ioh; fd_set rfds, wfds, xfds; int ret, nfds; struct timeval tv; int timeout; if (nonblocking) timeout = 0; else { timeout = qemu_calculate_timeout(); qemu_bh_update_timeout(&timeout); } os_host_main_loop_wait(&timeout); /* poll any events */ /* XXX: separate device handlers from system ones */ nfds = -1; FD_ZERO(&rfds); FD_ZERO(&wfds); FD_ZERO(&xfds); QLIST_FOREACH(ioh, &io_handlers, next) { if (ioh->deleted) continue; if (ioh->fd_read && (!ioh->fd_read_poll || ioh->fd_read_poll(ioh->opaque) != 0)) { FD_SET(ioh->fd, &rfds); if (ioh->fd > nfds) nfds = ioh->fd; } if (ioh->fd_write) { FD_SET(ioh->fd, &wfds); if (ioh->fd > nfds) nfds = ioh->fd; } } tv.tv_sec = timeout / 1000; tv.tv_usec = (timeout % 1000) * 1000; slirp_select_fill(&nfds, &rfds, &wfds, &xfds); qemu_mutex_unlock_iothread(); ret = select(nfds + 1, &rfds, &wfds, &xfds, &tv); qemu_mutex_lock_iothread(); if (ret > 0) { IOHandlerRecord *pioh; QLIST_FOREACH_SAFE(ioh, &io_handlers, next, pioh) { if (ioh->deleted) { QLIST_REMOVE(ioh, next); qemu_free(ioh); continue; } if (ioh->fd_read && FD_ISSET(ioh->fd, &rfds)) { ioh->fd_read(ioh->opaque); } if (ioh->fd_write && FD_ISSET(ioh->fd, &wfds)) { ioh->fd_write(ioh->opaque); } } } slirp_select_poll(&rfds, &wfds, &xfds, (ret < 0)); qemu_run_all_timers(); /* Check bottom-halves last in case any of the earlier events triggered them. */ qemu_bh_poll(); } | 13,124 |
1 | static void gen_lswx(DisasContext *ctx) { TCGv t0; TCGv_i32 t1, t2, t3; gen_set_access_type(ctx, ACCESS_INT); /* NIP cannot be restored if the memory exception comes from an helper */ gen_update_nip(ctx, ctx->nip - 4); t0 = tcg_temp_new(); gen_addr_reg_index(ctx, t0); t1 = tcg_const_i32(rD(ctx->opcode)); t2 = tcg_const_i32(rA(ctx->opcode)); t3 = tcg_const_i32(rB(ctx->opcode)); gen_helper_lswx(cpu_env, t0, t1, t2, t3); tcg_temp_free(t0); tcg_temp_free_i32(t1); tcg_temp_free_i32(t2); tcg_temp_free_i32(t3); } | 13,125 |
1 | static void get_sensor_reading(IPMIBmcSim *ibs, uint8_t *cmd, unsigned int cmd_len, uint8_t *rsp, unsigned int *rsp_len, unsigned int max_rsp_len) { IPMISensor *sens; IPMI_CHECK_CMD_LEN(3); if ((cmd[2] > MAX_SENSORS) || !IPMI_SENSOR_GET_PRESENT(ibs->sensors + cmd[2])) { rsp[2] = IPMI_CC_REQ_ENTRY_NOT_PRESENT; return; } sens = ibs->sensors + cmd[2]; IPMI_ADD_RSP_DATA(sens->reading); IPMI_ADD_RSP_DATA(IPMI_SENSOR_GET_RET_STATUS(sens)); IPMI_ADD_RSP_DATA(sens->states & 0xff); if (IPMI_SENSOR_IS_DISCRETE(sens)) { IPMI_ADD_RSP_DATA((sens->states >> 8) & 0xff); } } | 13,126 |
1 | int spapr_tce_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, void *buf, uint32_t size) { #ifdef DEBUG_TCE fprintf(stderr, "spapr_tce_dma_write taddr=0x%llx size=0x%x\n", (unsigned long long)taddr, size); #endif while (size) { uint64_t tce; uint32_t lsize; uint64_t txaddr; /* Check if we are in bound */ if (taddr >= dev->rtce_window_size) { #ifdef DEBUG_TCE fprintf(stderr, "spapr_tce_dma_read out of bounds\n"); #endif return H_DEST_PARM; tce = dev->rtce_table[taddr >> SPAPR_VIO_TCE_PAGE_SHIFT].tce; /* How much til end of page ? */ lsize = MIN(size, ((~taddr) & SPAPR_VIO_TCE_PAGE_MASK) + 1); /* Check TCE */ if (!(tce & 1)) { return H_DEST_PARM; /* Translate */ txaddr = (tce & ~SPAPR_VIO_TCE_PAGE_MASK) | (taddr & SPAPR_VIO_TCE_PAGE_MASK); #ifdef DEBUG_TCE fprintf(stderr, " -> write to txaddr=0x%llx, size=0x%x\n", (unsigned long long)txaddr, lsize); #endif /* Do it */ cpu_physical_memory_read(txaddr, buf, lsize); buf += lsize; taddr += lsize; size -= lsize; return H_SUCCESS; | 13,127 |
1 | static inline void RENAME(rgb32tobgr15)(const uint8_t *src, uint8_t *dst, int src_size) { const uint8_t *s = src; const uint8_t *end; const uint8_t *mm_end; uint16_t *d = (uint16_t *)dst; end = s + src_size; __asm__ volatile(PREFETCH" %0"::"m"(*src):"memory"); __asm__ volatile( "movq %0, %%mm7 \n\t" "movq %1, %%mm6 \n\t" ::"m"(red_15mask),"m"(green_15mask)); mm_end = end - 15; while (s < mm_end) { __asm__ volatile( PREFETCH" 32%1 \n\t" "movd %1, %%mm0 \n\t" "movd 4%1, %%mm3 \n\t" "punpckldq 8%1, %%mm0 \n\t" "punpckldq 12%1, %%mm3 \n\t" "movq %%mm0, %%mm1 \n\t" "movq %%mm0, %%mm2 \n\t" "movq %%mm3, %%mm4 \n\t" "movq %%mm3, %%mm5 \n\t" "psllq $7, %%mm0 \n\t" "psllq $7, %%mm3 \n\t" "pand %%mm7, %%mm0 \n\t" "pand %%mm7, %%mm3 \n\t" "psrlq $6, %%mm1 \n\t" "psrlq $6, %%mm4 \n\t" "pand %%mm6, %%mm1 \n\t" "pand %%mm6, %%mm4 \n\t" "psrlq $19, %%mm2 \n\t" "psrlq $19, %%mm5 \n\t" "pand %2, %%mm2 \n\t" "pand %2, %%mm5 \n\t" "por %%mm1, %%mm0 \n\t" "por %%mm4, %%mm3 \n\t" "por %%mm2, %%mm0 \n\t" "por %%mm5, %%mm3 \n\t" "psllq $16, %%mm3 \n\t" "por %%mm3, %%mm0 \n\t" MOVNTQ" %%mm0, %0 \n\t" :"=m"(*d):"m"(*s),"m"(blue_15mask):"memory"); d += 4; s += 16; } __asm__ volatile(SFENCE:::"memory"); __asm__ volatile(EMMS:::"memory"); while (s < end) { register int rgb = *(const uint32_t*)s; s += 4; *d++ = ((rgb&0xF8)<<7) + ((rgb&0xF800)>>6) + ((rgb&0xF80000)>>19); } } | 13,128 |
1 | void usb_test_hotplug(const char *hcd_id, const int port, void (*port_check)(void)) { QDict *response; char *cmd; cmd = g_strdup_printf("{'execute': 'device_add'," " 'arguments': {" " 'driver': 'usb-tablet'," " 'port': '%d'," " 'bus': '%s.0'," " 'id': 'usbdev%d'" "}}", port, hcd_id, port); response = qmp(cmd); g_free(cmd); g_assert(response); g_assert(!qdict_haskey(response, "error")); if (port_check) { port_check(); } cmd = g_strdup_printf("{'execute': 'device_del'," " 'arguments': {" " 'id': 'usbdev%d'" "}}", port); response = qmp(cmd); g_free(cmd); g_assert(response); g_assert(qdict_haskey(response, "event")); g_assert(!strcmp(qdict_get_str(response, "event"), "DEVICE_DELETED")); } | 13,129 |
1 | static inline int target_to_host_errno(int err) { if (target_to_host_errno_table[err]) return target_to_host_errno_table[err]; return err; } | 13,131 |
1 | int pcistb_service_call(S390CPU *cpu, uint8_t r1, uint8_t r3, uint64_t gaddr, uint8_t ar) { CPUS390XState *env = &cpu->env; S390PCIBusDevice *pbdev; MemoryRegion *mr; int i; uint32_t fh; uint8_t pcias; uint8_t len; uint8_t buffer[128]; if (env->psw.mask & PSW_MASK_PSTATE) { program_interrupt(env, PGM_PRIVILEGED, 6); return 0; } fh = env->regs[r1] >> 32; pcias = (env->regs[r1] >> 16) & 0xf; len = env->regs[r1] & 0xff; if (pcias > 5) { DPRINTF("pcistb invalid space\n"); setcc(cpu, ZPCI_PCI_LS_ERR); s390_set_status_code(env, r1, ZPCI_PCI_ST_INVAL_AS); return 0; } switch (len) { case 16: case 32: case 64: case 128: break; default: program_interrupt(env, PGM_SPECIFICATION, 6); return 0; } pbdev = s390_pci_find_dev_by_fh(fh); if (!pbdev) { DPRINTF("pcistb no pci dev fh 0x%x\n", fh); setcc(cpu, ZPCI_PCI_LS_INVAL_HANDLE); return 0; } switch (pbdev->state) { case ZPCI_FS_RESERVED: case ZPCI_FS_STANDBY: case ZPCI_FS_DISABLED: case ZPCI_FS_PERMANENT_ERROR: setcc(cpu, ZPCI_PCI_LS_INVAL_HANDLE); return 0; case ZPCI_FS_ERROR: setcc(cpu, ZPCI_PCI_LS_ERR); s390_set_status_code(env, r1, ZPCI_PCI_ST_BLOCKED); return 0; default: break; } mr = pbdev->pdev->io_regions[pcias].memory; if (!memory_region_access_valid(mr, env->regs[r3], len, true)) { program_interrupt(env, PGM_ADDRESSING, 6); return 0; } if (s390_cpu_virt_mem_read(cpu, gaddr, ar, buffer, len)) { return 0; } for (i = 0; i < len / 8; i++) { memory_region_dispatch_write(mr, env->regs[r3] + i * 8, ldq_p(buffer + i * 8), 8, MEMTXATTRS_UNSPECIFIED); } setcc(cpu, ZPCI_PCI_LS_OK); return 0; } | 13,132 |
1 | static void disas_sparc_insn(DisasContext * dc, unsigned int insn) { unsigned int opc, rs1, rs2, rd; TCGv cpu_src1, cpu_src2, cpu_tmp1, cpu_tmp2; TCGv_i32 cpu_src1_32, cpu_src2_32, cpu_dst_32; TCGv_i64 cpu_src1_64, cpu_src2_64, cpu_dst_64; target_long simm; if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { tcg_gen_debug_insn_start(dc->pc); } opc = GET_FIELD(insn, 0, 1); rd = GET_FIELD(insn, 2, 6); cpu_tmp1 = cpu_src1 = tcg_temp_new(); cpu_tmp2 = cpu_src2 = tcg_temp_new(); switch (opc) { case 0: /* branches/sethi */ { unsigned int xop = GET_FIELD(insn, 7, 9); int32_t target; switch (xop) { #ifdef TARGET_SPARC64 case 0x1: /* V9 BPcc */ { int cc; target = GET_FIELD_SP(insn, 0, 18); target = sign_extend(target, 19); target <<= 2; cc = GET_FIELD_SP(insn, 20, 21); if (cc == 0) do_branch(dc, target, insn, 0); else if (cc == 2) do_branch(dc, target, insn, 1); else goto illegal_insn; goto jmp_insn; } case 0x3: /* V9 BPr */ { target = GET_FIELD_SP(insn, 0, 13) | (GET_FIELD_SP(insn, 20, 21) << 14); target = sign_extend(target, 16); target <<= 2; cpu_src1 = get_src1(dc, insn); do_branch_reg(dc, target, insn, cpu_src1); goto jmp_insn; } case 0x5: /* V9 FBPcc */ { int cc = GET_FIELD_SP(insn, 20, 21); if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } target = GET_FIELD_SP(insn, 0, 18); target = sign_extend(target, 19); target <<= 2; do_fbranch(dc, target, insn, cc); goto jmp_insn; } #else case 0x7: /* CBN+x */ { goto ncp_insn; } #endif case 0x2: /* BN+x */ { target = GET_FIELD(insn, 10, 31); target = sign_extend(target, 22); target <<= 2; do_branch(dc, target, insn, 0); goto jmp_insn; } case 0x6: /* FBN+x */ { if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } target = GET_FIELD(insn, 10, 31); target = sign_extend(target, 22); target <<= 2; do_fbranch(dc, target, insn, 0); goto jmp_insn; } case 0x4: /* SETHI */ /* Special-case %g0 because that's the canonical nop. */ if (rd) { uint32_t value = GET_FIELD(insn, 10, 31); TCGv t = gen_dest_gpr(dc, rd); tcg_gen_movi_tl(t, value << 10); gen_store_gpr(dc, rd, t); } break; case 0x0: /* UNIMPL */ default: goto illegal_insn; } break; } break; case 1: /*CALL*/ { target_long target = GET_FIELDs(insn, 2, 31) << 2; TCGv o7 = gen_dest_gpr(dc, 15); tcg_gen_movi_tl(o7, dc->pc); gen_store_gpr(dc, 15, o7); target += dc->pc; gen_mov_pc_npc(dc); #ifdef TARGET_SPARC64 if (unlikely(AM_CHECK(dc))) { target &= 0xffffffffULL; } #endif dc->npc = target; } goto jmp_insn; case 2: /* FPU & Logical Operations */ { unsigned int xop = GET_FIELD(insn, 7, 12); if (xop == 0x3a) { /* generate trap */ int cond = GET_FIELD(insn, 3, 6); TCGv_i32 trap; int l1 = -1, mask; if (cond == 0) { /* Trap never. */ break; } save_state(dc); if (cond != 8) { /* Conditional trap. */ DisasCompare cmp; #ifdef TARGET_SPARC64 /* V9 icc/xcc */ int cc = GET_FIELD_SP(insn, 11, 12); if (cc == 0) { gen_compare(&cmp, 0, cond, dc); } else if (cc == 2) { gen_compare(&cmp, 1, cond, dc); } else { goto illegal_insn; } #else gen_compare(&cmp, 0, cond, dc); #endif l1 = gen_new_label(); tcg_gen_brcond_tl(tcg_invert_cond(cmp.cond), cmp.c1, cmp.c2, l1); free_compare(&cmp); } mask = ((dc->def->features & CPU_FEATURE_HYPV) && supervisor(dc) ? UA2005_HTRAP_MASK : V8_TRAP_MASK); /* Don't use the normal temporaries, as they may well have gone out of scope with the branch above. While we're doing that we might as well pre-truncate to 32-bit. */ trap = tcg_temp_new_i32(); rs1 = GET_FIELD_SP(insn, 14, 18); if (IS_IMM) { rs2 = GET_FIELD_SP(insn, 0, 6); if (rs1 == 0) { tcg_gen_movi_i32(trap, (rs2 & mask) + TT_TRAP); /* Signal that the trap value is fully constant. */ mask = 0; } else { TCGv t1 = gen_load_gpr(dc, rs1); tcg_gen_trunc_tl_i32(trap, t1); tcg_gen_addi_i32(trap, trap, rs2); } } else { TCGv t1, t2; rs2 = GET_FIELD_SP(insn, 0, 4); t1 = gen_load_gpr(dc, rs1); t2 = gen_load_gpr(dc, rs2); tcg_gen_add_tl(t1, t1, t2); tcg_gen_trunc_tl_i32(trap, t1); } if (mask != 0) { tcg_gen_andi_i32(trap, trap, mask); tcg_gen_addi_i32(trap, trap, TT_TRAP); } gen_helper_raise_exception(cpu_env, trap); tcg_temp_free_i32(trap); if (cond == 8) { /* An unconditional trap ends the TB. */ dc->is_br = 1; goto jmp_insn; } else { /* A conditional trap falls through to the next insn. */ gen_set_label(l1); break; } } else if (xop == 0x28) { rs1 = GET_FIELD(insn, 13, 17); switch(rs1) { case 0: /* rdy */ #ifndef TARGET_SPARC64 case 0x01 ... 0x0e: /* undefined in the SPARCv8 manual, rdy on the microSPARC II */ case 0x0f: /* stbar in the SPARCv8 manual, rdy on the microSPARC II */ case 0x10 ... 0x1f: /* implementation-dependent in the SPARCv8 manual, rdy on the microSPARC II */ /* Read Asr17 */ if (rs1 == 0x11 && dc->def->features & CPU_FEATURE_ASR17) { TCGv t = gen_dest_gpr(dc, rd); /* Read Asr17 for a Leon3 monoprocessor */ tcg_gen_movi_tl(t, (1 << 8) | (dc->def->nwindows - 1)); gen_store_gpr(dc, rd, t); break; } #endif gen_store_gpr(dc, rd, cpu_y); break; #ifdef TARGET_SPARC64 case 0x2: /* V9 rdccr */ update_psr(dc); gen_helper_rdccr(cpu_dst, cpu_env); gen_store_gpr(dc, rd, cpu_dst); break; case 0x3: /* V9 rdasi */ tcg_gen_ext_i32_tl(cpu_dst, cpu_asi); gen_store_gpr(dc, rd, cpu_dst); break; case 0x4: /* V9 rdtick */ { TCGv_ptr r_tickptr; r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, tick)); gen_helper_tick_get_count(cpu_dst, r_tickptr); tcg_temp_free_ptr(r_tickptr); gen_store_gpr(dc, rd, cpu_dst); } break; case 0x5: /* V9 rdpc */ { TCGv t = gen_dest_gpr(dc, rd); if (unlikely(AM_CHECK(dc))) { tcg_gen_movi_tl(t, dc->pc & 0xffffffffULL); } else { tcg_gen_movi_tl(t, dc->pc); } gen_store_gpr(dc, rd, t); } break; case 0x6: /* V9 rdfprs */ tcg_gen_ext_i32_tl(cpu_dst, cpu_fprs); gen_store_gpr(dc, rd, cpu_dst); break; case 0xf: /* V9 membar */ break; /* no effect */ case 0x13: /* Graphics Status */ if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } gen_store_gpr(dc, rd, cpu_gsr); break; case 0x16: /* Softint */ tcg_gen_ext_i32_tl(cpu_dst, cpu_softint); gen_store_gpr(dc, rd, cpu_dst); break; case 0x17: /* Tick compare */ gen_store_gpr(dc, rd, cpu_tick_cmpr); break; case 0x18: /* System tick */ { TCGv_ptr r_tickptr; r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, stick)); gen_helper_tick_get_count(cpu_dst, r_tickptr); tcg_temp_free_ptr(r_tickptr); gen_store_gpr(dc, rd, cpu_dst); } break; case 0x19: /* System tick compare */ gen_store_gpr(dc, rd, cpu_stick_cmpr); break; case 0x10: /* Performance Control */ case 0x11: /* Performance Instrumentation Counter */ case 0x12: /* Dispatch Control */ case 0x14: /* Softint set, WO */ case 0x15: /* Softint clear, WO */ #endif default: goto illegal_insn; } #if !defined(CONFIG_USER_ONLY) } else if (xop == 0x29) { /* rdpsr / UA2005 rdhpr */ #ifndef TARGET_SPARC64 if (!supervisor(dc)) { goto priv_insn; } update_psr(dc); gen_helper_rdpsr(cpu_dst, cpu_env); #else CHECK_IU_FEATURE(dc, HYPV); if (!hypervisor(dc)) goto priv_insn; rs1 = GET_FIELD(insn, 13, 17); switch (rs1) { case 0: // hpstate // gen_op_rdhpstate(); break; case 1: // htstate // gen_op_rdhtstate(); break; case 3: // hintp tcg_gen_mov_tl(cpu_dst, cpu_hintp); break; case 5: // htba tcg_gen_mov_tl(cpu_dst, cpu_htba); break; case 6: // hver tcg_gen_mov_tl(cpu_dst, cpu_hver); break; case 31: // hstick_cmpr tcg_gen_mov_tl(cpu_dst, cpu_hstick_cmpr); break; default: goto illegal_insn; } #endif gen_store_gpr(dc, rd, cpu_dst); break; } else if (xop == 0x2a) { /* rdwim / V9 rdpr */ if (!supervisor(dc)) goto priv_insn; #ifdef TARGET_SPARC64 rs1 = GET_FIELD(insn, 13, 17); switch (rs1) { case 0: // tpc { TCGv_ptr r_tsptr; r_tsptr = tcg_temp_new_ptr(); gen_load_trap_state_at_tl(r_tsptr, cpu_env); tcg_gen_ld_tl(cpu_tmp0, r_tsptr, offsetof(trap_state, tpc)); tcg_temp_free_ptr(r_tsptr); } break; case 1: // tnpc { TCGv_ptr r_tsptr; r_tsptr = tcg_temp_new_ptr(); gen_load_trap_state_at_tl(r_tsptr, cpu_env); tcg_gen_ld_tl(cpu_tmp0, r_tsptr, offsetof(trap_state, tnpc)); tcg_temp_free_ptr(r_tsptr); } break; case 2: // tstate { TCGv_ptr r_tsptr; r_tsptr = tcg_temp_new_ptr(); gen_load_trap_state_at_tl(r_tsptr, cpu_env); tcg_gen_ld_tl(cpu_tmp0, r_tsptr, offsetof(trap_state, tstate)); tcg_temp_free_ptr(r_tsptr); } break; case 3: // tt { TCGv_ptr r_tsptr; r_tsptr = tcg_temp_new_ptr(); gen_load_trap_state_at_tl(r_tsptr, cpu_env); tcg_gen_ld_i32(cpu_tmp32, r_tsptr, offsetof(trap_state, tt)); tcg_temp_free_ptr(r_tsptr); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); } break; case 4: // tick { TCGv_ptr r_tickptr; r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, tick)); gen_helper_tick_get_count(cpu_tmp0, r_tickptr); tcg_temp_free_ptr(r_tickptr); } break; case 5: // tba tcg_gen_mov_tl(cpu_tmp0, cpu_tbr); break; case 6: // pstate tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, pstate)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 7: // tl tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, tl)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 8: // pil tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, psrpil)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 9: // cwp gen_helper_rdcwp(cpu_tmp0, cpu_env); break; case 10: // cansave tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, cansave)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 11: // canrestore tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, canrestore)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 12: // cleanwin tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, cleanwin)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 13: // otherwin tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, otherwin)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 14: // wstate tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, wstate)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 16: // UA2005 gl CHECK_IU_FEATURE(dc, GL); tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, gl)); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_tmp32); break; case 26: // UA2005 strand status CHECK_IU_FEATURE(dc, HYPV); if (!hypervisor(dc)) goto priv_insn; tcg_gen_mov_tl(cpu_tmp0, cpu_ssr); break; case 31: // ver tcg_gen_mov_tl(cpu_tmp0, cpu_ver); break; case 15: // fq default: goto illegal_insn; } #else tcg_gen_ext_i32_tl(cpu_tmp0, cpu_wim); #endif gen_store_gpr(dc, rd, cpu_tmp0); break; } else if (xop == 0x2b) { /* rdtbr / V9 flushw */ #ifdef TARGET_SPARC64 save_state(dc); gen_helper_flushw(cpu_env); #else if (!supervisor(dc)) goto priv_insn; gen_store_gpr(dc, rd, cpu_tbr); #endif break; #endif } else if (xop == 0x34) { /* FPU Operations */ if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } gen_op_clear_ieee_excp_and_FTT(); rs1 = GET_FIELD(insn, 13, 17); rs2 = GET_FIELD(insn, 27, 31); xop = GET_FIELD(insn, 18, 26); save_state(dc); switch (xop) { case 0x1: /* fmovs */ cpu_src1_32 = gen_load_fpr_F(dc, rs2); gen_store_fpr_F(dc, rd, cpu_src1_32); break; case 0x5: /* fnegs */ gen_ne_fop_FF(dc, rd, rs2, gen_helper_fnegs); break; case 0x9: /* fabss */ gen_ne_fop_FF(dc, rd, rs2, gen_helper_fabss); break; case 0x29: /* fsqrts */ CHECK_FPU_FEATURE(dc, FSQRT); gen_fop_FF(dc, rd, rs2, gen_helper_fsqrts); break; case 0x2a: /* fsqrtd */ CHECK_FPU_FEATURE(dc, FSQRT); gen_fop_DD(dc, rd, rs2, gen_helper_fsqrtd); break; case 0x2b: /* fsqrtq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QQ(dc, rd, rs2, gen_helper_fsqrtq); break; case 0x41: /* fadds */ gen_fop_FFF(dc, rd, rs1, rs2, gen_helper_fadds); break; case 0x42: /* faddd */ gen_fop_DDD(dc, rd, rs1, rs2, gen_helper_faddd); break; case 0x43: /* faddq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QQQ(dc, rd, rs1, rs2, gen_helper_faddq); break; case 0x45: /* fsubs */ gen_fop_FFF(dc, rd, rs1, rs2, gen_helper_fsubs); break; case 0x46: /* fsubd */ gen_fop_DDD(dc, rd, rs1, rs2, gen_helper_fsubd); break; case 0x47: /* fsubq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QQQ(dc, rd, rs1, rs2, gen_helper_fsubq); break; case 0x49: /* fmuls */ CHECK_FPU_FEATURE(dc, FMUL); gen_fop_FFF(dc, rd, rs1, rs2, gen_helper_fmuls); break; case 0x4a: /* fmuld */ CHECK_FPU_FEATURE(dc, FMUL); gen_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmuld); break; case 0x4b: /* fmulq */ CHECK_FPU_FEATURE(dc, FLOAT128); CHECK_FPU_FEATURE(dc, FMUL); gen_fop_QQQ(dc, rd, rs1, rs2, gen_helper_fmulq); break; case 0x4d: /* fdivs */ gen_fop_FFF(dc, rd, rs1, rs2, gen_helper_fdivs); break; case 0x4e: /* fdivd */ gen_fop_DDD(dc, rd, rs1, rs2, gen_helper_fdivd); break; case 0x4f: /* fdivq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QQQ(dc, rd, rs1, rs2, gen_helper_fdivq); break; case 0x69: /* fsmuld */ CHECK_FPU_FEATURE(dc, FSMULD); gen_fop_DFF(dc, rd, rs1, rs2, gen_helper_fsmuld); break; case 0x6e: /* fdmulq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_QDD(dc, rd, rs1, rs2, gen_helper_fdmulq); break; case 0xc4: /* fitos */ gen_fop_FF(dc, rd, rs2, gen_helper_fitos); break; case 0xc6: /* fdtos */ gen_fop_FD(dc, rd, rs2, gen_helper_fdtos); break; case 0xc7: /* fqtos */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_FQ(dc, rd, rs2, gen_helper_fqtos); break; case 0xc8: /* fitod */ gen_ne_fop_DF(dc, rd, rs2, gen_helper_fitod); break; case 0xc9: /* fstod */ gen_ne_fop_DF(dc, rd, rs2, gen_helper_fstod); break; case 0xcb: /* fqtod */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_DQ(dc, rd, rs2, gen_helper_fqtod); break; case 0xcc: /* fitoq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_ne_fop_QF(dc, rd, rs2, gen_helper_fitoq); break; case 0xcd: /* fstoq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_ne_fop_QF(dc, rd, rs2, gen_helper_fstoq); break; case 0xce: /* fdtoq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_ne_fop_QD(dc, rd, rs2, gen_helper_fdtoq); break; case 0xd1: /* fstoi */ gen_fop_FF(dc, rd, rs2, gen_helper_fstoi); break; case 0xd2: /* fdtoi */ gen_fop_FD(dc, rd, rs2, gen_helper_fdtoi); break; case 0xd3: /* fqtoi */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_FQ(dc, rd, rs2, gen_helper_fqtoi); break; #ifdef TARGET_SPARC64 case 0x2: /* V9 fmovd */ cpu_src1_64 = gen_load_fpr_D(dc, rs2); gen_store_fpr_D(dc, rd, cpu_src1_64); break; case 0x3: /* V9 fmovq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_move_Q(rd, rs2); break; case 0x6: /* V9 fnegd */ gen_ne_fop_DD(dc, rd, rs2, gen_helper_fnegd); break; case 0x7: /* V9 fnegq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_ne_fop_QQ(dc, rd, rs2, gen_helper_fnegq); break; case 0xa: /* V9 fabsd */ gen_ne_fop_DD(dc, rd, rs2, gen_helper_fabsd); break; case 0xb: /* V9 fabsq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_ne_fop_QQ(dc, rd, rs2, gen_helper_fabsq); break; case 0x81: /* V9 fstox */ gen_fop_DF(dc, rd, rs2, gen_helper_fstox); break; case 0x82: /* V9 fdtox */ gen_fop_DD(dc, rd, rs2, gen_helper_fdtox); break; case 0x83: /* V9 fqtox */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_fop_DQ(dc, rd, rs2, gen_helper_fqtox); break; case 0x84: /* V9 fxtos */ gen_fop_FD(dc, rd, rs2, gen_helper_fxtos); break; case 0x88: /* V9 fxtod */ gen_fop_DD(dc, rd, rs2, gen_helper_fxtod); break; case 0x8c: /* V9 fxtoq */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_ne_fop_QD(dc, rd, rs2, gen_helper_fxtoq); break; #endif default: goto illegal_insn; } } else if (xop == 0x35) { /* FPU Operations */ #ifdef TARGET_SPARC64 int cond; #endif if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } gen_op_clear_ieee_excp_and_FTT(); rs1 = GET_FIELD(insn, 13, 17); rs2 = GET_FIELD(insn, 27, 31); xop = GET_FIELD(insn, 18, 26); save_state(dc); #ifdef TARGET_SPARC64 #define FMOVR(sz) \ do { \ DisasCompare cmp; \ cond = GET_FIELD_SP(insn, 14, 17); \ cpu_src1 = get_src1(dc, insn); \ gen_compare_reg(&cmp, cond, cpu_src1); \ gen_fmov##sz(dc, &cmp, rd, rs2); \ free_compare(&cmp); \ } while (0) if ((xop & 0x11f) == 0x005) { /* V9 fmovsr */ FMOVR(s); break; } else if ((xop & 0x11f) == 0x006) { // V9 fmovdr FMOVR(d); break; } else if ((xop & 0x11f) == 0x007) { // V9 fmovqr CHECK_FPU_FEATURE(dc, FLOAT128); FMOVR(q); break; } #undef FMOVR #endif switch (xop) { #ifdef TARGET_SPARC64 #define FMOVCC(fcc, sz) \ do { \ DisasCompare cmp; \ cond = GET_FIELD_SP(insn, 14, 17); \ gen_fcompare(&cmp, fcc, cond); \ gen_fmov##sz(dc, &cmp, rd, rs2); \ free_compare(&cmp); \ } while (0) case 0x001: /* V9 fmovscc %fcc0 */ FMOVCC(0, s); break; case 0x002: /* V9 fmovdcc %fcc0 */ FMOVCC(0, d); break; case 0x003: /* V9 fmovqcc %fcc0 */ CHECK_FPU_FEATURE(dc, FLOAT128); FMOVCC(0, q); break; case 0x041: /* V9 fmovscc %fcc1 */ FMOVCC(1, s); break; case 0x042: /* V9 fmovdcc %fcc1 */ FMOVCC(1, d); break; case 0x043: /* V9 fmovqcc %fcc1 */ CHECK_FPU_FEATURE(dc, FLOAT128); FMOVCC(1, q); break; case 0x081: /* V9 fmovscc %fcc2 */ FMOVCC(2, s); break; case 0x082: /* V9 fmovdcc %fcc2 */ FMOVCC(2, d); break; case 0x083: /* V9 fmovqcc %fcc2 */ CHECK_FPU_FEATURE(dc, FLOAT128); FMOVCC(2, q); break; case 0x0c1: /* V9 fmovscc %fcc3 */ FMOVCC(3, s); break; case 0x0c2: /* V9 fmovdcc %fcc3 */ FMOVCC(3, d); break; case 0x0c3: /* V9 fmovqcc %fcc3 */ CHECK_FPU_FEATURE(dc, FLOAT128); FMOVCC(3, q); break; #undef FMOVCC #define FMOVCC(xcc, sz) \ do { \ DisasCompare cmp; \ cond = GET_FIELD_SP(insn, 14, 17); \ gen_compare(&cmp, xcc, cond, dc); \ gen_fmov##sz(dc, &cmp, rd, rs2); \ free_compare(&cmp); \ } while (0) case 0x101: /* V9 fmovscc %icc */ FMOVCC(0, s); break; case 0x102: /* V9 fmovdcc %icc */ FMOVCC(0, d); break; case 0x103: /* V9 fmovqcc %icc */ CHECK_FPU_FEATURE(dc, FLOAT128); FMOVCC(0, q); break; case 0x181: /* V9 fmovscc %xcc */ FMOVCC(1, s); break; case 0x182: /* V9 fmovdcc %xcc */ FMOVCC(1, d); break; case 0x183: /* V9 fmovqcc %xcc */ CHECK_FPU_FEATURE(dc, FLOAT128); FMOVCC(1, q); break; #undef FMOVCC #endif case 0x51: /* fcmps, V9 %fcc */ cpu_src1_32 = gen_load_fpr_F(dc, rs1); cpu_src2_32 = gen_load_fpr_F(dc, rs2); gen_op_fcmps(rd & 3, cpu_src1_32, cpu_src2_32); break; case 0x52: /* fcmpd, V9 %fcc */ cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_op_fcmpd(rd & 3, cpu_src1_64, cpu_src2_64); break; case 0x53: /* fcmpq, V9 %fcc */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_op_fcmpq(rd & 3); break; case 0x55: /* fcmpes, V9 %fcc */ cpu_src1_32 = gen_load_fpr_F(dc, rs1); cpu_src2_32 = gen_load_fpr_F(dc, rs2); gen_op_fcmpes(rd & 3, cpu_src1_32, cpu_src2_32); break; case 0x56: /* fcmped, V9 %fcc */ cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_op_fcmped(rd & 3, cpu_src1_64, cpu_src2_64); break; case 0x57: /* fcmpeq, V9 %fcc */ CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT0(QFPREG(rs1)); gen_op_load_fpr_QT1(QFPREG(rs2)); gen_op_fcmpeq(rd & 3); break; default: goto illegal_insn; } } else if (xop == 0x2) { TCGv dst = gen_dest_gpr(dc, rd); rs1 = GET_FIELD(insn, 13, 17); if (rs1 == 0) { /* clr/mov shortcut : or %g0, x, y -> mov x, y */ if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 19, 31); tcg_gen_movi_tl(dst, simm); gen_store_gpr(dc, rd, dst); } else { /* register */ rs2 = GET_FIELD(insn, 27, 31); if (rs2 == 0) { tcg_gen_movi_tl(dst, 0); gen_store_gpr(dc, rd, dst); } else { cpu_src2 = gen_load_gpr(dc, rs2); gen_store_gpr(dc, rd, cpu_src2); } } } else { cpu_src1 = get_src1(dc, insn); if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 19, 31); tcg_gen_ori_tl(dst, cpu_src1, simm); gen_store_gpr(dc, rd, dst); } else { /* register */ rs2 = GET_FIELD(insn, 27, 31); if (rs2 == 0) { /* mov shortcut: or x, %g0, y -> mov x, y */ gen_store_gpr(dc, rd, cpu_src1); } else { cpu_src2 = gen_load_gpr(dc, rs2); tcg_gen_or_tl(dst, cpu_src1, cpu_src2); gen_store_gpr(dc, rd, dst); } } } #ifdef TARGET_SPARC64 } else if (xop == 0x25) { /* sll, V9 sllx */ cpu_src1 = get_src1(dc, insn); if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 20, 31); if (insn & (1 << 12)) { tcg_gen_shli_i64(cpu_dst, cpu_src1, simm & 0x3f); } else { tcg_gen_shli_i64(cpu_dst, cpu_src1, simm & 0x1f); } } else { /* register */ rs2 = GET_FIELD(insn, 27, 31); cpu_src2 = gen_load_gpr(dc, rs2); if (insn & (1 << 12)) { tcg_gen_andi_i64(cpu_tmp0, cpu_src2, 0x3f); } else { tcg_gen_andi_i64(cpu_tmp0, cpu_src2, 0x1f); } tcg_gen_shl_i64(cpu_dst, cpu_src1, cpu_tmp0); } gen_store_gpr(dc, rd, cpu_dst); } else if (xop == 0x26) { /* srl, V9 srlx */ cpu_src1 = get_src1(dc, insn); if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 20, 31); if (insn & (1 << 12)) { tcg_gen_shri_i64(cpu_dst, cpu_src1, simm & 0x3f); } else { tcg_gen_andi_i64(cpu_dst, cpu_src1, 0xffffffffULL); tcg_gen_shri_i64(cpu_dst, cpu_dst, simm & 0x1f); } } else { /* register */ rs2 = GET_FIELD(insn, 27, 31); cpu_src2 = gen_load_gpr(dc, rs2); if (insn & (1 << 12)) { tcg_gen_andi_i64(cpu_tmp0, cpu_src2, 0x3f); tcg_gen_shr_i64(cpu_dst, cpu_src1, cpu_tmp0); } else { tcg_gen_andi_i64(cpu_tmp0, cpu_src2, 0x1f); tcg_gen_andi_i64(cpu_dst, cpu_src1, 0xffffffffULL); tcg_gen_shr_i64(cpu_dst, cpu_dst, cpu_tmp0); } } gen_store_gpr(dc, rd, cpu_dst); } else if (xop == 0x27) { /* sra, V9 srax */ cpu_src1 = get_src1(dc, insn); if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 20, 31); if (insn & (1 << 12)) { tcg_gen_sari_i64(cpu_dst, cpu_src1, simm & 0x3f); } else { tcg_gen_ext32s_i64(cpu_dst, cpu_src1); tcg_gen_sari_i64(cpu_dst, cpu_dst, simm & 0x1f); } } else { /* register */ rs2 = GET_FIELD(insn, 27, 31); cpu_src2 = gen_load_gpr(dc, rs2); if (insn & (1 << 12)) { tcg_gen_andi_i64(cpu_tmp0, cpu_src2, 0x3f); tcg_gen_sar_i64(cpu_dst, cpu_src1, cpu_tmp0); } else { tcg_gen_andi_i64(cpu_tmp0, cpu_src2, 0x1f); tcg_gen_ext32s_i64(cpu_dst, cpu_src1); tcg_gen_sar_i64(cpu_dst, cpu_dst, cpu_tmp0); } } gen_store_gpr(dc, rd, cpu_dst); #endif } else if (xop < 0x36) { if (xop < 0x20) { cpu_src1 = get_src1(dc, insn); cpu_src2 = get_src2(dc, insn); switch (xop & ~0x10) { case 0x0: /* add */ if (xop & 0x10) { gen_op_add_cc(cpu_dst, cpu_src1, cpu_src2); tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADD); dc->cc_op = CC_OP_ADD; } else { tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); } break; case 0x1: /* and */ tcg_gen_and_tl(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC); dc->cc_op = CC_OP_LOGIC; } break; case 0x2: /* or */ tcg_gen_or_tl(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC); dc->cc_op = CC_OP_LOGIC; } break; case 0x3: /* xor */ tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC); dc->cc_op = CC_OP_LOGIC; } break; case 0x4: /* sub */ if (xop & 0x10) { gen_op_sub_cc(cpu_dst, cpu_src1, cpu_src2); tcg_gen_movi_i32(cpu_cc_op, CC_OP_SUB); dc->cc_op = CC_OP_SUB; } else { tcg_gen_sub_tl(cpu_dst, cpu_src1, cpu_src2); } break; case 0x5: /* andn */ tcg_gen_andc_tl(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC); dc->cc_op = CC_OP_LOGIC; } break; case 0x6: /* orn */ tcg_gen_orc_tl(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC); dc->cc_op = CC_OP_LOGIC; } break; case 0x7: /* xorn */ tcg_gen_eqv_tl(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC); dc->cc_op = CC_OP_LOGIC; } break; case 0x8: /* addx, V9 addc */ gen_op_addx_int(dc, cpu_dst, cpu_src1, cpu_src2, (xop & 0x10)); break; #ifdef TARGET_SPARC64 case 0x9: /* V9 mulx */ tcg_gen_mul_i64(cpu_dst, cpu_src1, cpu_src2); break; #endif case 0xa: /* umul */ CHECK_IU_FEATURE(dc, MUL); gen_op_umul(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC); dc->cc_op = CC_OP_LOGIC; } break; case 0xb: /* smul */ CHECK_IU_FEATURE(dc, MUL); gen_op_smul(cpu_dst, cpu_src1, cpu_src2); if (xop & 0x10) { tcg_gen_mov_tl(cpu_cc_dst, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_LOGIC); dc->cc_op = CC_OP_LOGIC; } break; case 0xc: /* subx, V9 subc */ gen_op_subx_int(dc, cpu_dst, cpu_src1, cpu_src2, (xop & 0x10)); break; #ifdef TARGET_SPARC64 case 0xd: /* V9 udivx */ gen_helper_udivx(cpu_dst, cpu_env, cpu_src1, cpu_src2); break; #endif case 0xe: /* udiv */ CHECK_IU_FEATURE(dc, DIV); if (xop & 0x10) { gen_helper_udiv_cc(cpu_dst, cpu_env, cpu_src1, cpu_src2); dc->cc_op = CC_OP_DIV; } else { gen_helper_udiv(cpu_dst, cpu_env, cpu_src1, cpu_src2); } break; case 0xf: /* sdiv */ CHECK_IU_FEATURE(dc, DIV); if (xop & 0x10) { gen_helper_sdiv_cc(cpu_dst, cpu_env, cpu_src1, cpu_src2); dc->cc_op = CC_OP_DIV; } else { gen_helper_sdiv(cpu_dst, cpu_env, cpu_src1, cpu_src2); } break; default: goto illegal_insn; } gen_store_gpr(dc, rd, cpu_dst); } else { cpu_src1 = get_src1(dc, insn); cpu_src2 = get_src2(dc, insn); switch (xop) { case 0x20: /* taddcc */ gen_op_add_cc(cpu_dst, cpu_src1, cpu_src2); gen_store_gpr(dc, rd, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_TADD); dc->cc_op = CC_OP_TADD; break; case 0x21: /* tsubcc */ gen_op_sub_cc(cpu_dst, cpu_src1, cpu_src2); gen_store_gpr(dc, rd, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_TSUB); dc->cc_op = CC_OP_TSUB; break; case 0x22: /* taddcctv */ gen_helper_taddcctv(cpu_dst, cpu_env, cpu_src1, cpu_src2); gen_store_gpr(dc, rd, cpu_dst); dc->cc_op = CC_OP_TADDTV; break; case 0x23: /* tsubcctv */ gen_helper_tsubcctv(cpu_dst, cpu_env, cpu_src1, cpu_src2); gen_store_gpr(dc, rd, cpu_dst); dc->cc_op = CC_OP_TSUBTV; break; case 0x24: /* mulscc */ update_psr(dc); gen_op_mulscc(cpu_dst, cpu_src1, cpu_src2); gen_store_gpr(dc, rd, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_ADD); dc->cc_op = CC_OP_ADD; break; #ifndef TARGET_SPARC64 case 0x25: /* sll */ if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 20, 31); tcg_gen_shli_tl(cpu_dst, cpu_src1, simm & 0x1f); } else { /* register */ tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f); tcg_gen_shl_tl(cpu_dst, cpu_src1, cpu_tmp0); } gen_store_gpr(dc, rd, cpu_dst); break; case 0x26: /* srl */ if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 20, 31); tcg_gen_shri_tl(cpu_dst, cpu_src1, simm & 0x1f); } else { /* register */ tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f); tcg_gen_shr_tl(cpu_dst, cpu_src1, cpu_tmp0); } gen_store_gpr(dc, rd, cpu_dst); break; case 0x27: /* sra */ if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 20, 31); tcg_gen_sari_tl(cpu_dst, cpu_src1, simm & 0x1f); } else { /* register */ tcg_gen_andi_tl(cpu_tmp0, cpu_src2, 0x1f); tcg_gen_sar_tl(cpu_dst, cpu_src1, cpu_tmp0); } gen_store_gpr(dc, rd, cpu_dst); break; #endif case 0x30: { switch(rd) { case 0: /* wry */ tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); tcg_gen_andi_tl(cpu_y, cpu_tmp0, 0xffffffff); break; #ifndef TARGET_SPARC64 case 0x01 ... 0x0f: /* undefined in the SPARCv8 manual, nop on the microSPARC II */ case 0x10 ... 0x1f: /* implementation-dependent in the SPARCv8 manual, nop on the microSPARC II */ break; #else case 0x2: /* V9 wrccr */ tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); gen_helper_wrccr(cpu_env, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS); dc->cc_op = CC_OP_FLAGS; break; case 0x3: /* V9 wrasi */ tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); tcg_gen_andi_tl(cpu_dst, cpu_dst, 0xff); tcg_gen_trunc_tl_i32(cpu_asi, cpu_dst); break; case 0x6: /* V9 wrfprs */ tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); tcg_gen_trunc_tl_i32(cpu_fprs, cpu_dst); save_state(dc); gen_op_next_insn(); tcg_gen_exit_tb(0); dc->is_br = 1; break; case 0xf: /* V9 sir, nop if user */ #if !defined(CONFIG_USER_ONLY) if (supervisor(dc)) { ; // XXX } #endif break; case 0x13: /* Graphics Status */ if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } tcg_gen_xor_tl(cpu_gsr, cpu_src1, cpu_src2); break; case 0x14: /* Softint set */ if (!supervisor(dc)) goto illegal_insn; tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); gen_helper_set_softint(cpu_env, cpu_tmp64); break; case 0x15: /* Softint clear */ if (!supervisor(dc)) goto illegal_insn; tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); gen_helper_clear_softint(cpu_env, cpu_tmp64); break; case 0x16: /* Softint write */ if (!supervisor(dc)) goto illegal_insn; tcg_gen_xor_tl(cpu_tmp64, cpu_src1, cpu_src2); gen_helper_write_softint(cpu_env, cpu_tmp64); break; case 0x17: /* Tick compare */ #if !defined(CONFIG_USER_ONLY) if (!supervisor(dc)) goto illegal_insn; #endif { TCGv_ptr r_tickptr; tcg_gen_xor_tl(cpu_tick_cmpr, cpu_src1, cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, tick)); gen_helper_tick_set_limit(r_tickptr, cpu_tick_cmpr); tcg_temp_free_ptr(r_tickptr); } break; case 0x18: /* System tick */ #if !defined(CONFIG_USER_ONLY) if (!supervisor(dc)) goto illegal_insn; #endif { TCGv_ptr r_tickptr; tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, stick)); gen_helper_tick_set_count(r_tickptr, cpu_dst); tcg_temp_free_ptr(r_tickptr); } break; case 0x19: /* System tick compare */ #if !defined(CONFIG_USER_ONLY) if (!supervisor(dc)) goto illegal_insn; #endif { TCGv_ptr r_tickptr; tcg_gen_xor_tl(cpu_stick_cmpr, cpu_src1, cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, stick)); gen_helper_tick_set_limit(r_tickptr, cpu_stick_cmpr); tcg_temp_free_ptr(r_tickptr); } break; case 0x10: /* Performance Control */ case 0x11: /* Performance Instrumentation Counter */ case 0x12: /* Dispatch Control */ #endif default: goto illegal_insn; } } break; #if !defined(CONFIG_USER_ONLY) case 0x31: /* wrpsr, V9 saved, restored */ { if (!supervisor(dc)) goto priv_insn; #ifdef TARGET_SPARC64 switch (rd) { case 0: gen_helper_saved(cpu_env); break; case 1: gen_helper_restored(cpu_env); break; case 2: /* UA2005 allclean */ case 3: /* UA2005 otherw */ case 4: /* UA2005 normalw */ case 5: /* UA2005 invalw */ // XXX default: goto illegal_insn; } #else tcg_gen_xor_tl(cpu_dst, cpu_src1, cpu_src2); gen_helper_wrpsr(cpu_env, cpu_dst); tcg_gen_movi_i32(cpu_cc_op, CC_OP_FLAGS); dc->cc_op = CC_OP_FLAGS; save_state(dc); gen_op_next_insn(); tcg_gen_exit_tb(0); dc->is_br = 1; #endif } break; case 0x32: /* wrwim, V9 wrpr */ { if (!supervisor(dc)) goto priv_insn; tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); #ifdef TARGET_SPARC64 switch (rd) { case 0: // tpc { TCGv_ptr r_tsptr; r_tsptr = tcg_temp_new_ptr(); gen_load_trap_state_at_tl(r_tsptr, cpu_env); tcg_gen_st_tl(cpu_tmp0, r_tsptr, offsetof(trap_state, tpc)); tcg_temp_free_ptr(r_tsptr); } break; case 1: // tnpc { TCGv_ptr r_tsptr; r_tsptr = tcg_temp_new_ptr(); gen_load_trap_state_at_tl(r_tsptr, cpu_env); tcg_gen_st_tl(cpu_tmp0, r_tsptr, offsetof(trap_state, tnpc)); tcg_temp_free_ptr(r_tsptr); } break; case 2: // tstate { TCGv_ptr r_tsptr; r_tsptr = tcg_temp_new_ptr(); gen_load_trap_state_at_tl(r_tsptr, cpu_env); tcg_gen_st_tl(cpu_tmp0, r_tsptr, offsetof(trap_state, tstate)); tcg_temp_free_ptr(r_tsptr); } break; case 3: // tt { TCGv_ptr r_tsptr; r_tsptr = tcg_temp_new_ptr(); gen_load_trap_state_at_tl(r_tsptr, cpu_env); tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_st_i32(cpu_tmp32, r_tsptr, offsetof(trap_state, tt)); tcg_temp_free_ptr(r_tsptr); } break; case 4: // tick { TCGv_ptr r_tickptr; r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, tick)); gen_helper_tick_set_count(r_tickptr, cpu_tmp0); tcg_temp_free_ptr(r_tickptr); } break; case 5: // tba tcg_gen_mov_tl(cpu_tbr, cpu_tmp0); break; case 6: // pstate save_state(dc); gen_helper_wrpstate(cpu_env, cpu_tmp0); dc->npc = DYNAMIC_PC; break; case 7: // tl save_state(dc); tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, tl)); dc->npc = DYNAMIC_PC; break; case 8: // pil gen_helper_wrpil(cpu_env, cpu_tmp0); break; case 9: // cwp gen_helper_wrcwp(cpu_env, cpu_tmp0); break; case 10: // cansave tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, cansave)); break; case 11: // canrestore tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, canrestore)); break; case 12: // cleanwin tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, cleanwin)); break; case 13: // otherwin tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, otherwin)); break; case 14: // wstate tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, wstate)); break; case 16: // UA2005 gl CHECK_IU_FEATURE(dc, GL); tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); tcg_gen_st_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, gl)); break; case 26: // UA2005 strand status CHECK_IU_FEATURE(dc, HYPV); if (!hypervisor(dc)) goto priv_insn; tcg_gen_mov_tl(cpu_ssr, cpu_tmp0); break; default: goto illegal_insn; } #else tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); if (dc->def->nwindows != 32) tcg_gen_andi_tl(cpu_tmp32, cpu_tmp32, (1 << dc->def->nwindows) - 1); tcg_gen_mov_i32(cpu_wim, cpu_tmp32); #endif } break; case 0x33: /* wrtbr, UA2005 wrhpr */ { #ifndef TARGET_SPARC64 if (!supervisor(dc)) goto priv_insn; tcg_gen_xor_tl(cpu_tbr, cpu_src1, cpu_src2); #else CHECK_IU_FEATURE(dc, HYPV); if (!hypervisor(dc)) goto priv_insn; tcg_gen_xor_tl(cpu_tmp0, cpu_src1, cpu_src2); switch (rd) { case 0: // hpstate // XXX gen_op_wrhpstate(); save_state(dc); gen_op_next_insn(); tcg_gen_exit_tb(0); dc->is_br = 1; break; case 1: // htstate // XXX gen_op_wrhtstate(); break; case 3: // hintp tcg_gen_mov_tl(cpu_hintp, cpu_tmp0); break; case 5: // htba tcg_gen_mov_tl(cpu_htba, cpu_tmp0); break; case 31: // hstick_cmpr { TCGv_ptr r_tickptr; tcg_gen_mov_tl(cpu_hstick_cmpr, cpu_tmp0); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, hstick)); gen_helper_tick_set_limit(r_tickptr, cpu_hstick_cmpr); tcg_temp_free_ptr(r_tickptr); } break; case 6: // hver readonly default: goto illegal_insn; } #endif } break; #endif #ifdef TARGET_SPARC64 case 0x2c: /* V9 movcc */ { int cc = GET_FIELD_SP(insn, 11, 12); int cond = GET_FIELD_SP(insn, 14, 17); DisasCompare cmp; TCGv dst; if (insn & (1 << 18)) { if (cc == 0) { gen_compare(&cmp, 0, cond, dc); } else if (cc == 2) { gen_compare(&cmp, 1, cond, dc); } else { goto illegal_insn; } } else { gen_fcompare(&cmp, cc, cond); } /* The get_src2 above loaded the normal 13-bit immediate field, not the 11-bit field we have in movcc. But it did handle the reg case. */ if (IS_IMM) { simm = GET_FIELD_SPs(insn, 0, 10); tcg_gen_movi_tl(cpu_src2, simm); } dst = gen_load_gpr(dc, rd); tcg_gen_movcond_tl(cmp.cond, dst, cmp.c1, cmp.c2, cpu_src2, dst); free_compare(&cmp); gen_store_gpr(dc, rd, dst); break; } case 0x2d: /* V9 sdivx */ gen_helper_sdivx(cpu_dst, cpu_env, cpu_src1, cpu_src2); gen_store_gpr(dc, rd, cpu_dst); break; case 0x2e: /* V9 popc */ gen_helper_popc(cpu_dst, cpu_src2); gen_store_gpr(dc, rd, cpu_dst); break; case 0x2f: /* V9 movr */ { int cond = GET_FIELD_SP(insn, 10, 12); DisasCompare cmp; TCGv dst; gen_compare_reg(&cmp, cond, cpu_src1); /* The get_src2 above loaded the normal 13-bit immediate field, not the 10-bit field we have in movr. But it did handle the reg case. */ if (IS_IMM) { simm = GET_FIELD_SPs(insn, 0, 9); tcg_gen_movi_tl(cpu_src2, simm); } dst = gen_load_gpr(dc, rd); tcg_gen_movcond_tl(cmp.cond, dst, cmp.c1, cmp.c2, cpu_src2, dst); free_compare(&cmp); gen_store_gpr(dc, rd, dst); break; } #endif default: goto illegal_insn; } } } else if (xop == 0x36) { /* UltraSparc shutdown, VIS, V8 CPop1 */ #ifdef TARGET_SPARC64 int opf = GET_FIELD_SP(insn, 5, 13); rs1 = GET_FIELD(insn, 13, 17); rs2 = GET_FIELD(insn, 27, 31); if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } switch (opf) { case 0x000: /* VIS I edge8cc */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 8, 1, 0); gen_store_gpr(dc, rd, cpu_dst); break; case 0x001: /* VIS II edge8n */ CHECK_FPU_FEATURE(dc, VIS2); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 8, 0, 0); gen_store_gpr(dc, rd, cpu_dst); break; case 0x002: /* VIS I edge8lcc */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 8, 1, 1); gen_store_gpr(dc, rd, cpu_dst); break; case 0x003: /* VIS II edge8ln */ CHECK_FPU_FEATURE(dc, VIS2); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 8, 0, 1); gen_store_gpr(dc, rd, cpu_dst); break; case 0x004: /* VIS I edge16cc */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 16, 1, 0); gen_store_gpr(dc, rd, cpu_dst); break; case 0x005: /* VIS II edge16n */ CHECK_FPU_FEATURE(dc, VIS2); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 16, 0, 0); gen_store_gpr(dc, rd, cpu_dst); break; case 0x006: /* VIS I edge16lcc */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 16, 1, 1); gen_store_gpr(dc, rd, cpu_dst); break; case 0x007: /* VIS II edge16ln */ CHECK_FPU_FEATURE(dc, VIS2); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 16, 0, 1); gen_store_gpr(dc, rd, cpu_dst); break; case 0x008: /* VIS I edge32cc */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 32, 1, 0); gen_store_gpr(dc, rd, cpu_dst); break; case 0x009: /* VIS II edge32n */ CHECK_FPU_FEATURE(dc, VIS2); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 32, 0, 0); gen_store_gpr(dc, rd, cpu_dst); break; case 0x00a: /* VIS I edge32lcc */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 32, 1, 1); gen_store_gpr(dc, rd, cpu_dst); break; case 0x00b: /* VIS II edge32ln */ CHECK_FPU_FEATURE(dc, VIS2); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_edge(dc, cpu_dst, cpu_src1, cpu_src2, 32, 0, 1); gen_store_gpr(dc, rd, cpu_dst); break; case 0x010: /* VIS I array8 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_helper_array8(cpu_dst, cpu_src1, cpu_src2); gen_store_gpr(dc, rd, cpu_dst); break; case 0x012: /* VIS I array16 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_helper_array8(cpu_dst, cpu_src1, cpu_src2); tcg_gen_shli_i64(cpu_dst, cpu_dst, 1); gen_store_gpr(dc, rd, cpu_dst); break; case 0x014: /* VIS I array32 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_helper_array8(cpu_dst, cpu_src1, cpu_src2); tcg_gen_shli_i64(cpu_dst, cpu_dst, 2); gen_store_gpr(dc, rd, cpu_dst); break; case 0x018: /* VIS I alignaddr */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_alignaddr(cpu_dst, cpu_src1, cpu_src2, 0); gen_store_gpr(dc, rd, cpu_dst); break; case 0x01a: /* VIS I alignaddrl */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); gen_alignaddr(cpu_dst, cpu_src1, cpu_src2, 1); gen_store_gpr(dc, rd, cpu_dst); break; case 0x019: /* VIS II bmask */ CHECK_FPU_FEATURE(dc, VIS2); cpu_src1 = gen_load_gpr(dc, rs1); cpu_src2 = gen_load_gpr(dc, rs2); tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); tcg_gen_deposit_tl(cpu_gsr, cpu_gsr, cpu_dst, 32, 32); gen_store_gpr(dc, rd, cpu_dst); break; case 0x020: /* VIS I fcmple16 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_helper_fcmple16(cpu_dst, cpu_src1_64, cpu_src2_64); gen_store_gpr(dc, rd, cpu_dst); break; case 0x022: /* VIS I fcmpne16 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_helper_fcmpne16(cpu_dst, cpu_src1_64, cpu_src2_64); gen_store_gpr(dc, rd, cpu_dst); break; case 0x024: /* VIS I fcmple32 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_helper_fcmple32(cpu_dst, cpu_src1_64, cpu_src2_64); gen_store_gpr(dc, rd, cpu_dst); break; case 0x026: /* VIS I fcmpne32 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_helper_fcmpne32(cpu_dst, cpu_src1_64, cpu_src2_64); gen_store_gpr(dc, rd, cpu_dst); break; case 0x028: /* VIS I fcmpgt16 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_helper_fcmpgt16(cpu_dst, cpu_src1_64, cpu_src2_64); gen_store_gpr(dc, rd, cpu_dst); break; case 0x02a: /* VIS I fcmpeq16 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_helper_fcmpeq16(cpu_dst, cpu_src1_64, cpu_src2_64); gen_store_gpr(dc, rd, cpu_dst); break; case 0x02c: /* VIS I fcmpgt32 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_helper_fcmpgt32(cpu_dst, cpu_src1_64, cpu_src2_64); gen_store_gpr(dc, rd, cpu_dst); break; case 0x02e: /* VIS I fcmpeq32 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); cpu_src2_64 = gen_load_fpr_D(dc, rs2); gen_helper_fcmpeq32(cpu_dst, cpu_src1_64, cpu_src2_64); gen_store_gpr(dc, rd, cpu_dst); break; case 0x031: /* VIS I fmul8x16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmul8x16); break; case 0x033: /* VIS I fmul8x16au */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmul8x16au); break; case 0x035: /* VIS I fmul8x16al */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmul8x16al); break; case 0x036: /* VIS I fmul8sux16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmul8sux16); break; case 0x037: /* VIS I fmul8ulx16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmul8ulx16); break; case 0x038: /* VIS I fmuld8sux16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmuld8sux16); break; case 0x039: /* VIS I fmuld8ulx16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fmuld8ulx16); break; case 0x03a: /* VIS I fpack32 */ CHECK_FPU_FEATURE(dc, VIS1); gen_gsr_fop_DDD(dc, rd, rs1, rs2, gen_helper_fpack32); break; case 0x03b: /* VIS I fpack16 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs2); cpu_dst_32 = gen_dest_fpr_F(); gen_helper_fpack16(cpu_dst_32, cpu_gsr, cpu_src1_64); gen_store_fpr_F(dc, rd, cpu_dst_32); break; case 0x03d: /* VIS I fpackfix */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs2); cpu_dst_32 = gen_dest_fpr_F(); gen_helper_fpackfix(cpu_dst_32, cpu_gsr, cpu_src1_64); gen_store_fpr_F(dc, rd, cpu_dst_32); break; case 0x03e: /* VIS I pdist */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDDD(dc, rd, rs1, rs2, gen_helper_pdist); break; case 0x048: /* VIS I faligndata */ CHECK_FPU_FEATURE(dc, VIS1); gen_gsr_fop_DDD(dc, rd, rs1, rs2, gen_faligndata); break; case 0x04b: /* VIS I fpmerge */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fpmerge); break; case 0x04c: /* VIS II bshuffle */ CHECK_FPU_FEATURE(dc, VIS2); gen_gsr_fop_DDD(dc, rd, rs1, rs2, gen_helper_bshuffle); break; case 0x04d: /* VIS I fexpand */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fexpand); break; case 0x050: /* VIS I fpadd16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fpadd16); break; case 0x051: /* VIS I fpadd16s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, gen_helper_fpadd16s); break; case 0x052: /* VIS I fpadd32 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fpadd32); break; case 0x053: /* VIS I fpadd32s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_add_i32); break; case 0x054: /* VIS I fpsub16 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fpsub16); break; case 0x055: /* VIS I fpsub16s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, gen_helper_fpsub16s); break; case 0x056: /* VIS I fpsub32 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, gen_helper_fpsub32); break; case 0x057: /* VIS I fpsub32s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_sub_i32); break; case 0x060: /* VIS I fzero */ CHECK_FPU_FEATURE(dc, VIS1); cpu_dst_64 = gen_dest_fpr_D(); tcg_gen_movi_i64(cpu_dst_64, 0); gen_store_fpr_D(dc, rd, cpu_dst_64); break; case 0x061: /* VIS I fzeros */ CHECK_FPU_FEATURE(dc, VIS1); cpu_dst_32 = gen_dest_fpr_F(); tcg_gen_movi_i32(cpu_dst_32, 0); gen_store_fpr_F(dc, rd, cpu_dst_32); break; case 0x062: /* VIS I fnor */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, tcg_gen_nor_i64); break; case 0x063: /* VIS I fnors */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_nor_i32); break; case 0x064: /* VIS I fandnot2 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, tcg_gen_andc_i64); break; case 0x065: /* VIS I fandnot2s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_andc_i32); break; case 0x066: /* VIS I fnot2 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DD(dc, rd, rs2, tcg_gen_not_i64); break; case 0x067: /* VIS I fnot2s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FF(dc, rd, rs2, tcg_gen_not_i32); break; case 0x068: /* VIS I fandnot1 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs2, rs1, tcg_gen_andc_i64); break; case 0x069: /* VIS I fandnot1s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs2, rs1, tcg_gen_andc_i32); break; case 0x06a: /* VIS I fnot1 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DD(dc, rd, rs1, tcg_gen_not_i64); break; case 0x06b: /* VIS I fnot1s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FF(dc, rd, rs1, tcg_gen_not_i32); break; case 0x06c: /* VIS I fxor */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, tcg_gen_xor_i64); break; case 0x06d: /* VIS I fxors */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_xor_i32); break; case 0x06e: /* VIS I fnand */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, tcg_gen_nand_i64); break; case 0x06f: /* VIS I fnands */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_nand_i32); break; case 0x070: /* VIS I fand */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, tcg_gen_and_i64); break; case 0x071: /* VIS I fands */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_and_i32); break; case 0x072: /* VIS I fxnor */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, tcg_gen_eqv_i64); break; case 0x073: /* VIS I fxnors */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_eqv_i32); break; case 0x074: /* VIS I fsrc1 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs1); gen_store_fpr_D(dc, rd, cpu_src1_64); break; case 0x075: /* VIS I fsrc1s */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_32 = gen_load_fpr_F(dc, rs1); gen_store_fpr_F(dc, rd, cpu_src1_32); break; case 0x076: /* VIS I fornot2 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, tcg_gen_orc_i64); break; case 0x077: /* VIS I fornot2s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_orc_i32); break; case 0x078: /* VIS I fsrc2 */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_64 = gen_load_fpr_D(dc, rs2); gen_store_fpr_D(dc, rd, cpu_src1_64); break; case 0x079: /* VIS I fsrc2s */ CHECK_FPU_FEATURE(dc, VIS1); cpu_src1_32 = gen_load_fpr_F(dc, rs2); gen_store_fpr_F(dc, rd, cpu_src1_32); break; case 0x07a: /* VIS I fornot1 */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs2, rs1, tcg_gen_orc_i64); break; case 0x07b: /* VIS I fornot1s */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs2, rs1, tcg_gen_orc_i32); break; case 0x07c: /* VIS I for */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_DDD(dc, rd, rs1, rs2, tcg_gen_or_i64); break; case 0x07d: /* VIS I fors */ CHECK_FPU_FEATURE(dc, VIS1); gen_ne_fop_FFF(dc, rd, rs1, rs2, tcg_gen_or_i32); break; case 0x07e: /* VIS I fone */ CHECK_FPU_FEATURE(dc, VIS1); cpu_dst_64 = gen_dest_fpr_D(); tcg_gen_movi_i64(cpu_dst_64, -1); gen_store_fpr_D(dc, rd, cpu_dst_64); break; case 0x07f: /* VIS I fones */ CHECK_FPU_FEATURE(dc, VIS1); cpu_dst_32 = gen_dest_fpr_F(); tcg_gen_movi_i32(cpu_dst_32, -1); gen_store_fpr_F(dc, rd, cpu_dst_32); break; case 0x080: /* VIS I shutdown */ case 0x081: /* VIS II siam */ // XXX goto illegal_insn; default: goto illegal_insn; } #else goto ncp_insn; #endif } else if (xop == 0x37) { /* V8 CPop2, V9 impdep2 */ #ifdef TARGET_SPARC64 goto illegal_insn; #else goto ncp_insn; #endif #ifdef TARGET_SPARC64 } else if (xop == 0x39) { /* V9 return */ TCGv_i32 r_const; save_state(dc); cpu_src1 = get_src1(dc, insn); if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 19, 31); tcg_gen_addi_tl(cpu_dst, cpu_src1, simm); } else { /* register */ rs2 = GET_FIELD(insn, 27, 31); if (rs2) { cpu_src2 = gen_load_gpr(dc, rs2); tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); } else { tcg_gen_mov_tl(cpu_dst, cpu_src1); } } gen_helper_restore(cpu_env); gen_mov_pc_npc(dc); r_const = tcg_const_i32(3); gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const); tcg_gen_mov_tl(cpu_npc, cpu_dst); dc->npc = DYNAMIC_PC; goto jmp_insn; #endif } else { cpu_src1 = get_src1(dc, insn); if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 19, 31); tcg_gen_addi_tl(cpu_dst, cpu_src1, simm); } else { /* register */ rs2 = GET_FIELD(insn, 27, 31); if (rs2) { cpu_src2 = gen_load_gpr(dc, rs2); tcg_gen_add_tl(cpu_dst, cpu_src1, cpu_src2); } else { tcg_gen_mov_tl(cpu_dst, cpu_src1); } } switch (xop) { case 0x38: /* jmpl */ { TCGv t; TCGv_i32 r_const; t = gen_dest_gpr(dc, rd); tcg_gen_movi_tl(t, dc->pc); gen_store_gpr(dc, rd, t); gen_mov_pc_npc(dc); r_const = tcg_const_i32(3); gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const); gen_address_mask(dc, cpu_dst); tcg_gen_mov_tl(cpu_npc, cpu_dst); dc->npc = DYNAMIC_PC; } goto jmp_insn; #if !defined(CONFIG_USER_ONLY) && !defined(TARGET_SPARC64) case 0x39: /* rett, V9 return */ { TCGv_i32 r_const; if (!supervisor(dc)) goto priv_insn; gen_mov_pc_npc(dc); r_const = tcg_const_i32(3); gen_helper_check_align(cpu_env, cpu_dst, r_const); tcg_temp_free_i32(r_const); tcg_gen_mov_tl(cpu_npc, cpu_dst); dc->npc = DYNAMIC_PC; gen_helper_rett(cpu_env); } goto jmp_insn; #endif case 0x3b: /* flush */ if (!((dc)->def->features & CPU_FEATURE_FLUSH)) goto unimp_flush; /* nop */ break; case 0x3c: /* save */ save_state(dc); gen_helper_save(cpu_env); gen_store_gpr(dc, rd, cpu_dst); break; case 0x3d: /* restore */ save_state(dc); gen_helper_restore(cpu_env); gen_store_gpr(dc, rd, cpu_dst); break; #if !defined(CONFIG_USER_ONLY) && defined(TARGET_SPARC64) case 0x3e: /* V9 done/retry */ { switch (rd) { case 0: if (!supervisor(dc)) goto priv_insn; dc->npc = DYNAMIC_PC; dc->pc = DYNAMIC_PC; gen_helper_done(cpu_env); goto jmp_insn; case 1: if (!supervisor(dc)) goto priv_insn; dc->npc = DYNAMIC_PC; dc->pc = DYNAMIC_PC; gen_helper_retry(cpu_env); goto jmp_insn; default: goto illegal_insn; } } break; #endif default: goto illegal_insn; } } break; } break; case 3: /* load/store instructions */ { unsigned int xop = GET_FIELD(insn, 7, 12); cpu_src1 = get_src1(dc, insn); if (xop == 0x3c || xop == 0x3e) { // V9 casa/casxa rs2 = GET_FIELD(insn, 27, 31); cpu_src2 = gen_load_gpr(dc, rs2); tcg_gen_mov_tl(cpu_addr, cpu_src1); } else if (IS_IMM) { /* immediate */ simm = GET_FIELDs(insn, 19, 31); tcg_gen_addi_tl(cpu_addr, cpu_src1, simm); } else { /* register */ rs2 = GET_FIELD(insn, 27, 31); if (rs2 != 0) { cpu_src2 = gen_load_gpr(dc, rs2); tcg_gen_add_tl(cpu_addr, cpu_src1, cpu_src2); } else { tcg_gen_mov_tl(cpu_addr, cpu_src1); } } if (xop < 4 || (xop > 7 && xop < 0x14 && xop != 0x0e) || (xop > 0x17 && xop <= 0x1d ) || (xop > 0x2c && xop <= 0x33) || xop == 0x1f || xop == 0x3d) { TCGv cpu_val = gen_dest_gpr(dc, rd); switch (xop) { case 0x0: /* ld, V9 lduw, load unsigned word */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld32u(cpu_val, cpu_addr, dc->mem_idx); break; case 0x1: /* ldub, load unsigned byte */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld8u(cpu_val, cpu_addr, dc->mem_idx); break; case 0x2: /* lduh, load unsigned halfword */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld16u(cpu_val, cpu_addr, dc->mem_idx); break; case 0x3: /* ldd, load double word */ if (rd & 1) goto illegal_insn; else { TCGv_i32 r_const; save_state(dc); r_const = tcg_const_i32(7); /* XXX remove alignment check */ gen_helper_check_align(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld64(cpu_tmp64, cpu_addr, dc->mem_idx); tcg_gen_trunc_i64_tl(cpu_tmp0, cpu_tmp64); tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0xffffffffULL); gen_store_gpr(dc, rd + 1, cpu_tmp0); tcg_gen_shri_i64(cpu_tmp64, cpu_tmp64, 32); tcg_gen_trunc_i64_tl(cpu_val, cpu_tmp64); tcg_gen_andi_tl(cpu_val, cpu_val, 0xffffffffULL); } break; case 0x9: /* ldsb, load signed byte */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld8s(cpu_val, cpu_addr, dc->mem_idx); break; case 0xa: /* ldsh, load signed halfword */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld16s(cpu_val, cpu_addr, dc->mem_idx); break; case 0xd: /* ldstub -- XXX: should be atomically */ { TCGv r_const; gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld8s(cpu_val, cpu_addr, dc->mem_idx); r_const = tcg_const_tl(0xff); tcg_gen_qemu_st8(r_const, cpu_addr, dc->mem_idx); tcg_temp_free(r_const); } break; case 0x0f: /* swap, swap register with memory. Also atomically */ CHECK_IU_FEATURE(dc, SWAP); cpu_src1 = gen_load_gpr(dc, rd); gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld32u(cpu_tmp0, cpu_addr, dc->mem_idx); tcg_gen_qemu_st32(cpu_src1, cpu_addr, dc->mem_idx); tcg_gen_mov_tl(cpu_val, cpu_tmp0); break; #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) case 0x10: /* lda, V9 lduwa, load word alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_ld_asi(cpu_val, cpu_addr, insn, 4, 0); break; case 0x11: /* lduba, load unsigned byte alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_ld_asi(cpu_val, cpu_addr, insn, 1, 0); break; case 0x12: /* lduha, load unsigned halfword alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_ld_asi(cpu_val, cpu_addr, insn, 2, 0); break; case 0x13: /* ldda, load double word alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif if (rd & 1) goto illegal_insn; save_state(dc); gen_ldda_asi(dc, cpu_val, cpu_addr, insn, rd); goto skip_move; case 0x19: /* ldsba, load signed byte alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_ld_asi(cpu_val, cpu_addr, insn, 1, 1); break; case 0x1a: /* ldsha, load signed halfword alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_ld_asi(cpu_val, cpu_addr, insn, 2, 1); break; case 0x1d: /* ldstuba -- XXX: should be atomically */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_ldstub_asi(cpu_val, cpu_addr, insn); break; case 0x1f: /* swapa, swap reg with alt. memory. Also atomically */ CHECK_IU_FEATURE(dc, SWAP); #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); cpu_src1 = gen_load_gpr(dc, rd); gen_swap_asi(cpu_val, cpu_src1, cpu_addr, insn); break; #ifndef TARGET_SPARC64 case 0x30: /* ldc */ case 0x31: /* ldcsr */ case 0x33: /* lddc */ goto ncp_insn; #endif #endif #ifdef TARGET_SPARC64 case 0x08: /* V9 ldsw */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld32s(cpu_val, cpu_addr, dc->mem_idx); break; case 0x0b: /* V9 ldx */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld64(cpu_val, cpu_addr, dc->mem_idx); break; case 0x18: /* V9 ldswa */ save_state(dc); gen_ld_asi(cpu_val, cpu_addr, insn, 4, 1); break; case 0x1b: /* V9 ldxa */ save_state(dc); gen_ld_asi(cpu_val, cpu_addr, insn, 8, 0); break; case 0x2d: /* V9 prefetch, no effect */ goto skip_move; case 0x30: /* V9 ldfa */ if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } save_state(dc); gen_ldf_asi(cpu_addr, insn, 4, rd); gen_update_fprs_dirty(rd); goto skip_move; case 0x33: /* V9 lddfa */ if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } save_state(dc); gen_ldf_asi(cpu_addr, insn, 8, DFPREG(rd)); gen_update_fprs_dirty(DFPREG(rd)); goto skip_move; case 0x3d: /* V9 prefetcha, no effect */ goto skip_move; case 0x32: /* V9 ldqfa */ CHECK_FPU_FEATURE(dc, FLOAT128); if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } save_state(dc); gen_ldf_asi(cpu_addr, insn, 16, QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); goto skip_move; #endif default: goto illegal_insn; } gen_store_gpr(dc, rd, cpu_val); #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) skip_move: ; #endif } else if (xop >= 0x20 && xop < 0x24) { if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } save_state(dc); switch (xop) { case 0x20: /* ldf, load fpreg */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_ld32u(cpu_tmp0, cpu_addr, dc->mem_idx); cpu_dst_32 = gen_dest_fpr_F(); tcg_gen_trunc_tl_i32(cpu_dst_32, cpu_tmp0); gen_store_fpr_F(dc, rd, cpu_dst_32); break; case 0x21: /* ldfsr, V9 ldxfsr */ #ifdef TARGET_SPARC64 gen_address_mask(dc, cpu_addr); if (rd == 1) { tcg_gen_qemu_ld64(cpu_tmp64, cpu_addr, dc->mem_idx); gen_helper_ldxfsr(cpu_env, cpu_tmp64); } else { tcg_gen_qemu_ld32u(cpu_tmp0, cpu_addr, dc->mem_idx); tcg_gen_trunc_tl_i32(cpu_tmp32, cpu_tmp0); gen_helper_ldfsr(cpu_env, cpu_tmp32); } #else { tcg_gen_qemu_ld32u(cpu_tmp32, cpu_addr, dc->mem_idx); gen_helper_ldfsr(cpu_env, cpu_tmp32); } #endif break; case 0x22: /* ldqf, load quad fpreg */ { TCGv_i32 r_const; CHECK_FPU_FEATURE(dc, FLOAT128); r_const = tcg_const_i32(dc->mem_idx); gen_address_mask(dc, cpu_addr); gen_helper_ldqf(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_op_store_QT0_fpr(QFPREG(rd)); gen_update_fprs_dirty(QFPREG(rd)); } break; case 0x23: /* lddf, load double fpreg */ gen_address_mask(dc, cpu_addr); cpu_dst_64 = gen_dest_fpr_D(); tcg_gen_qemu_ld64(cpu_dst_64, cpu_addr, dc->mem_idx); gen_store_fpr_D(dc, rd, cpu_dst_64); break; default: goto illegal_insn; } } else if (xop < 8 || (xop >= 0x14 && xop < 0x18) || xop == 0xe || xop == 0x1e) { TCGv cpu_val = gen_load_gpr(dc, rd); switch (xop) { case 0x4: /* st, store word */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_st32(cpu_val, cpu_addr, dc->mem_idx); break; case 0x5: /* stb, store byte */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_st8(cpu_val, cpu_addr, dc->mem_idx); break; case 0x6: /* sth, store halfword */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_st16(cpu_val, cpu_addr, dc->mem_idx); break; case 0x7: /* std, store double word */ if (rd & 1) goto illegal_insn; else { TCGv_i32 r_const; TCGv lo; save_state(dc); gen_address_mask(dc, cpu_addr); r_const = tcg_const_i32(7); /* XXX remove alignment check */ gen_helper_check_align(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); lo = gen_load_gpr(dc, rd + 1); tcg_gen_concat_tl_i64(cpu_tmp64, lo, cpu_val); tcg_gen_qemu_st64(cpu_tmp64, cpu_addr, dc->mem_idx); } break; #if !defined(CONFIG_USER_ONLY) || defined(TARGET_SPARC64) case 0x14: /* sta, V9 stwa, store word alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_st_asi(cpu_val, cpu_addr, insn, 4); dc->npc = DYNAMIC_PC; break; case 0x15: /* stba, store byte alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_st_asi(cpu_val, cpu_addr, insn, 1); dc->npc = DYNAMIC_PC; break; case 0x16: /* stha, store halfword alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif save_state(dc); gen_st_asi(cpu_val, cpu_addr, insn, 2); dc->npc = DYNAMIC_PC; break; case 0x17: /* stda, store double word alternate */ #ifndef TARGET_SPARC64 if (IS_IMM) goto illegal_insn; if (!supervisor(dc)) goto priv_insn; #endif if (rd & 1) goto illegal_insn; else { save_state(dc); gen_stda_asi(dc, cpu_val, cpu_addr, insn, rd); } break; #endif #ifdef TARGET_SPARC64 case 0x0e: /* V9 stx */ gen_address_mask(dc, cpu_addr); tcg_gen_qemu_st64(cpu_val, cpu_addr, dc->mem_idx); break; case 0x1e: /* V9 stxa */ save_state(dc); gen_st_asi(cpu_val, cpu_addr, insn, 8); dc->npc = DYNAMIC_PC; break; #endif default: goto illegal_insn; } } else if (xop > 0x23 && xop < 0x28) { if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } save_state(dc); switch (xop) { case 0x24: /* stf, store fpreg */ gen_address_mask(dc, cpu_addr); cpu_src1_32 = gen_load_fpr_F(dc, rd); tcg_gen_ext_i32_tl(cpu_tmp0, cpu_src1_32); tcg_gen_qemu_st32(cpu_tmp0, cpu_addr, dc->mem_idx); break; case 0x25: /* stfsr, V9 stxfsr */ #ifdef TARGET_SPARC64 gen_address_mask(dc, cpu_addr); tcg_gen_ld_i64(cpu_tmp64, cpu_env, offsetof(CPUSPARCState, fsr)); if (rd == 1) tcg_gen_qemu_st64(cpu_tmp64, cpu_addr, dc->mem_idx); else tcg_gen_qemu_st32(cpu_tmp64, cpu_addr, dc->mem_idx); #else tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, fsr)); tcg_gen_qemu_st32(cpu_tmp32, cpu_addr, dc->mem_idx); #endif break; case 0x26: #ifdef TARGET_SPARC64 /* V9 stqf, store quad fpreg */ { TCGv_i32 r_const; CHECK_FPU_FEATURE(dc, FLOAT128); gen_op_load_fpr_QT0(QFPREG(rd)); r_const = tcg_const_i32(dc->mem_idx); gen_address_mask(dc, cpu_addr); gen_helper_stqf(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); } break; #else /* !TARGET_SPARC64 */ /* stdfq, store floating point queue */ #if defined(CONFIG_USER_ONLY) goto illegal_insn; #else if (!supervisor(dc)) goto priv_insn; if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } goto nfq_insn; #endif #endif case 0x27: /* stdf, store double fpreg */ gen_address_mask(dc, cpu_addr); cpu_src1_64 = gen_load_fpr_D(dc, rd); tcg_gen_qemu_st64(cpu_src1_64, cpu_addr, dc->mem_idx); break; default: goto illegal_insn; } } else if (xop > 0x33 && xop < 0x3f) { save_state(dc); switch (xop) { #ifdef TARGET_SPARC64 case 0x34: /* V9 stfa */ if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } gen_stf_asi(cpu_addr, insn, 4, rd); break; case 0x36: /* V9 stqfa */ { TCGv_i32 r_const; CHECK_FPU_FEATURE(dc, FLOAT128); if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } r_const = tcg_const_i32(7); gen_helper_check_align(cpu_env, cpu_addr, r_const); tcg_temp_free_i32(r_const); gen_stf_asi(cpu_addr, insn, 16, QFPREG(rd)); } break; case 0x37: /* V9 stdfa */ if (gen_trap_ifnofpu(dc)) { goto jmp_insn; } gen_stf_asi(cpu_addr, insn, 8, DFPREG(rd)); break; case 0x3c: /* V9 casa */ gen_cas_asi(dc, cpu_addr, cpu_src2, insn, rd); break; case 0x3e: /* V9 casxa */ gen_casx_asi(dc, cpu_addr, cpu_src2, insn, rd); break; #else case 0x34: /* stc */ case 0x35: /* stcsr */ case 0x36: /* stdcq */ case 0x37: /* stdc */ goto ncp_insn; #endif default: goto illegal_insn; } } else goto illegal_insn; } break; } /* default case for non jump instructions */ if (dc->npc == DYNAMIC_PC) { dc->pc = DYNAMIC_PC; gen_op_next_insn(); } else if (dc->npc == JUMP_PC) { /* we can do a static jump */ gen_branch2(dc, dc->jump_pc[0], dc->jump_pc[1], cpu_cond); dc->is_br = 1; } else { dc->pc = dc->npc; dc->npc = dc->npc + 4; } jmp_insn: goto egress; illegal_insn: { TCGv_i32 r_const; save_state(dc); r_const = tcg_const_i32(TT_ILL_INSN); gen_helper_raise_exception(cpu_env, r_const); tcg_temp_free_i32(r_const); dc->is_br = 1; } goto egress; unimp_flush: { TCGv_i32 r_const; save_state(dc); r_const = tcg_const_i32(TT_UNIMP_FLUSH); gen_helper_raise_exception(cpu_env, r_const); tcg_temp_free_i32(r_const); dc->is_br = 1; } goto egress; #if !defined(CONFIG_USER_ONLY) priv_insn: { TCGv_i32 r_const; save_state(dc); r_const = tcg_const_i32(TT_PRIV_INSN); gen_helper_raise_exception(cpu_env, r_const); tcg_temp_free_i32(r_const); dc->is_br = 1; } goto egress; #endif nfpu_insn: save_state(dc); gen_op_fpexception_im(FSR_FTT_UNIMPFPOP); dc->is_br = 1; goto egress; #if !defined(CONFIG_USER_ONLY) && !defined(TARGET_SPARC64) nfq_insn: save_state(dc); gen_op_fpexception_im(FSR_FTT_SEQ_ERROR); dc->is_br = 1; goto egress; #endif #ifndef TARGET_SPARC64 ncp_insn: { TCGv r_const; save_state(dc); r_const = tcg_const_i32(TT_NCP_INSN); gen_helper_raise_exception(cpu_env, r_const); tcg_temp_free(r_const); dc->is_br = 1; } goto egress; #endif egress: tcg_temp_free(cpu_tmp1); tcg_temp_free(cpu_tmp2); if (dc->n_t32 != 0) { int i; for (i = dc->n_t32 - 1; i >= 0; --i) { tcg_temp_free_i32(dc->t32[i]); } dc->n_t32 = 0; } if (dc->n_ttl != 0) { int i; for (i = dc->n_ttl - 1; i >= 0; --i) { tcg_temp_free(dc->ttl[i]); } dc->n_ttl = 0; } } | 13,133 |
1 | MigrationState *migrate_init(const MigrationParams *params) { MigrationState *s = migrate_get_current(); int64_t bandwidth_limit = s->bandwidth_limit; bool enabled_capabilities[MIGRATION_CAPABILITY_MAX]; int64_t xbzrle_cache_size = s->xbzrle_cache_size; int compress_level = s->parameters[MIGRATION_PARAMETER_COMPRESS_LEVEL]; int compress_thread_count = s->parameters[MIGRATION_PARAMETER_COMPRESS_THREADS]; int decompress_thread_count = s->parameters[MIGRATION_PARAMETER_DECOMPRESS_THREADS]; int x_cpu_throttle_initial = s->parameters[MIGRATION_PARAMETER_X_CPU_THROTTLE_INITIAL]; int x_cpu_throttle_increment = s->parameters[MIGRATION_PARAMETER_X_CPU_THROTTLE_INCREMENT]; memcpy(enabled_capabilities, s->enabled_capabilities, sizeof(enabled_capabilities)); memset(s, 0, sizeof(*s)); s->params = *params; memcpy(s->enabled_capabilities, enabled_capabilities, sizeof(enabled_capabilities)); s->xbzrle_cache_size = xbzrle_cache_size; s->parameters[MIGRATION_PARAMETER_COMPRESS_LEVEL] = compress_level; s->parameters[MIGRATION_PARAMETER_COMPRESS_THREADS] = compress_thread_count; s->parameters[MIGRATION_PARAMETER_DECOMPRESS_THREADS] = decompress_thread_count; s->parameters[MIGRATION_PARAMETER_X_CPU_THROTTLE_INITIAL] = x_cpu_throttle_initial; s->parameters[MIGRATION_PARAMETER_X_CPU_THROTTLE_INCREMENT] = x_cpu_throttle_increment; s->bandwidth_limit = bandwidth_limit; migrate_set_state(s, MIGRATION_STATUS_NONE, MIGRATION_STATUS_SETUP); QSIMPLEQ_INIT(&s->src_page_requests); s->total_time = qemu_clock_get_ms(QEMU_CLOCK_REALTIME); return s; } | 13,134 |
0 | static void vc1_put_ver_16b_shift2_mmx(int16_t *dst, const uint8_t *src, x86_reg stride, int rnd, int64_t shift) { __asm__ volatile( "mov $3, %%"REG_c" \n\t" LOAD_ROUNDER_MMX("%5") "movq "MANGLE(ff_pw_9)", %%mm6 \n\t" "1: \n\t" "movd (%0), %%mm2 \n\t" "add %2, %0 \n\t" "movd (%0), %%mm3 \n\t" "punpcklbw %%mm0, %%mm2 \n\t" "punpcklbw %%mm0, %%mm3 \n\t" SHIFT2_LINE( 0, 1, 2, 3, 4) SHIFT2_LINE( 24, 2, 3, 4, 1) SHIFT2_LINE( 48, 3, 4, 1, 2) SHIFT2_LINE( 72, 4, 1, 2, 3) SHIFT2_LINE( 96, 1, 2, 3, 4) SHIFT2_LINE(120, 2, 3, 4, 1) SHIFT2_LINE(144, 3, 4, 1, 2) SHIFT2_LINE(168, 4, 1, 2, 3) "sub %6, %0 \n\t" "add $8, %1 \n\t" "dec %%"REG_c" \n\t" "jnz 1b \n\t" : "+r"(src), "+r"(dst) : "r"(stride), "r"(-2*stride), "m"(shift), "m"(rnd), "r"(9*stride-4) NAMED_CONSTRAINTS_ADD(ff_pw_9) : "%"REG_c, "memory" ); } | 13,138 |
1 | static int mov_read_custom(MOVContext *c, AVIOContext *pb, MOVAtom atom) { int64_t end = avio_tell(pb) + atom.size; uint8_t *key = NULL, *val = NULL, *mean = NULL; int i; AVStream *st; MOVStreamContext *sc; if (c->fc->nb_streams < 1) return 0; st = c->fc->streams[c->fc->nb_streams-1]; sc = st->priv_data; for (i = 0; i < 3; i++) { uint8_t **p; uint32_t len, tag; int ret; if (end - avio_tell(pb) <= 12) break; len = avio_rb32(pb); tag = avio_rl32(pb); avio_skip(pb, 4); // flags if (len < 12 || len - 12 > end - avio_tell(pb)) break; len -= 12; if (tag == MKTAG('m', 'e', 'a', 'n')) p = &mean; else if (tag == MKTAG('n', 'a', 'm', 'e')) p = &key; else if (tag == MKTAG('d', 'a', 't', 'a') && len > 4) { avio_skip(pb, 4); len -= 4; p = &val; } else break; *p = av_malloc(len + 1); if (!*p) break; ret = ffio_read_size(pb, *p, len); if (ret < 0) { av_freep(p); return ret; } (*p)[len] = 0; } if (mean && key && val) { if (strcmp(key, "iTunSMPB") == 0) { int priming, remainder, samples; if(sscanf(val, "%*X %X %X %X", &priming, &remainder, &samples) == 3){ if(priming>0 && priming<16384) sc->start_pad = priming; } } if (strcmp(key, "cdec") != 0) { av_dict_set(&c->fc->metadata, key, val, AV_DICT_DONT_STRDUP_KEY | AV_DICT_DONT_STRDUP_VAL); key = val = NULL; } } else { av_log(c->fc, AV_LOG_VERBOSE, "Unhandled or malformed custom metadata of size %"PRId64"\n", atom.size); } avio_seek(pb, end, SEEK_SET); av_freep(&key); av_freep(&val); av_freep(&mean); return 0; } | 13,139 |
1 | static AVBufferRef *dxva2_pool_alloc(void *opaque, int size) { AVHWFramesContext *ctx = (AVHWFramesContext*)opaque; DXVA2FramesContext *s = ctx->internal->priv; AVDXVA2FramesContext *hwctx = ctx->hwctx; if (s->nb_surfaces_used < hwctx->nb_surfaces) { s->nb_surfaces_used++; return av_buffer_create((uint8_t*)s->surfaces_internal[s->nb_surfaces_used - 1], sizeof(*hwctx->surfaces), NULL, 0, 0); } return NULL; } | 13,141 |
1 | void put_string(PutBitContext * pbc, char *s) { while(*s){ put_bits(pbc, 8, *s); s++; } put_bits(pbc, 8, 0); } | 13,142 |
1 | static void mp_decode_frame_helper(MotionPixelsContext *mp, GetBitContext *gb) { YuvPixel p; int y, y0; for (y = 0; y < mp->avctx->height; ++y) { if (mp->changes_map[y * mp->avctx->width] != 0) { memset(mp->gradient_scale, 1, sizeof(mp->gradient_scale)); p = mp_get_yuv_from_rgb(mp, 0, y); } else { p.y += mp_gradient(mp, 0, mp_get_vlc(mp, gb)); p.y = av_clip(p.y, 0, 31); if ((y & 3) == 0) { p.v += mp_gradient(mp, 1, mp_get_vlc(mp, gb)); p.v = av_clip(p.v, -32, 31); p.u += mp_gradient(mp, 2, mp_get_vlc(mp, gb)); p.u = av_clip(p.u, -32, 31); } mp->vpt[y] = p; mp_set_rgb_from_yuv(mp, 0, y, &p); } } for (y0 = 0; y0 < 2; ++y0) for (y = y0; y < mp->avctx->height; y += 2) mp_decode_line(mp, gb, y); } | 13,143 |
1 | static int find_start_code(const uint8_t **pbuf_ptr, const uint8_t *buf_end) { const uint8_t *buf_ptr= *pbuf_ptr; buf_ptr++; //gurantees that -1 is within the array buf_end -= 2; // gurantees that +2 is within the array while (buf_ptr < buf_end) { if(*buf_ptr==0){ while(buf_ptr < buf_end && buf_ptr[1]==0) buf_ptr++; if(buf_ptr[-1] == 0 && buf_ptr[1] == 1){ *pbuf_ptr = buf_ptr+3; return buf_ptr[2] + 0x100; } } buf_ptr += 2; } buf_end += 2; //undo the hack above *pbuf_ptr = buf_end; return -1; } | 13,144 |
1 | static void pc_q35_2_4_machine_options(MachineClass *m) { PCMachineClass *pcmc = PC_MACHINE_CLASS(m); pc_q35_2_5_machine_options(m); m->alias = NULL; pcmc->broken_reserved_end = true; pcmc->inter_dimm_gap = false; SET_MACHINE_COMPAT(m, PC_COMPAT_2_4); } | 13,145 |
0 | av_cold int ff_nvenc_encode_init(AVCodecContext *avctx) { int ret; if ((ret = nvenc_load_libraries(avctx)) < 0) return ret; if ((ret = nvenc_setup_device(avctx)) < 0) return ret; if ((ret = nvenc_setup_encoder(avctx)) < 0) return ret; if ((ret = nvenc_setup_surfaces(avctx)) < 0) return ret; if (avctx->flags & CODEC_FLAG_GLOBAL_HEADER) { if ((ret = nvenc_setup_extradata(avctx)) < 0) return ret; } avctx->coded_frame = av_frame_alloc(); if (!avctx->coded_frame) return AVERROR(ENOMEM); return 0; } | 13,146 |
1 | static int qemu_rdma_exchange_get_response(RDMAContext *rdma, RDMAControlHeader *head, int expecting, int idx) { uint32_t byte_len; int ret = qemu_rdma_block_for_wrid(rdma, RDMA_WRID_RECV_CONTROL + idx, &byte_len); if (ret < 0) { fprintf(stderr, "rdma migration: recv polling control error!\n"); return ret; } network_to_control((void *) rdma->wr_data[idx].control); memcpy(head, rdma->wr_data[idx].control, sizeof(RDMAControlHeader)); DDDPRINTF("CONTROL: %s receiving...\n", control_desc[expecting]); if (expecting == RDMA_CONTROL_NONE) { DDDPRINTF("Surprise: got %s (%d)\n", control_desc[head->type], head->type); } else if (head->type != expecting || head->type == RDMA_CONTROL_ERROR) { fprintf(stderr, "Was expecting a %s (%d) control message" ", but got: %s (%d), length: %d\n", control_desc[expecting], expecting, control_desc[head->type], head->type, head->len); return -EIO; } if (head->len > RDMA_CONTROL_MAX_BUFFER - sizeof(*head)) { fprintf(stderr, "too long length: %d\n", head->len); return -EINVAL; } if (sizeof(*head) + head->len != byte_len) { fprintf(stderr, "Malformed length: %d byte_len %d\n", head->len, byte_len); return -EINVAL; } return 0; } | 13,148 |
0 | static inline void kqemu_load_seg(struct kqemu_segment_cache *ksc, const SegmentCache *sc) { ksc->selector = sc->selector; ksc->flags = sc->flags; ksc->limit = sc->limit; ksc->base = sc->base; } | 13,150 |
0 | int avcodec_decode_audio2(AVCodecContext *avctx, int16_t *samples, int *frame_size_ptr, uint8_t *buf, int buf_size) { int ret; //FIXME remove the check below _after_ ensuring that all audio check that the available space is enough if(*frame_size_ptr < AVCODEC_MAX_AUDIO_FRAME_SIZE){ av_log(avctx, AV_LOG_ERROR, "buffer smaller than AVCODEC_MAX_AUDIO_FRAME_SIZE\n"); return -1; } if(*frame_size_ptr < FF_MIN_BUFFER_SIZE || *frame_size_ptr < avctx->channels * avctx->frame_size * sizeof(int16_t) || *frame_size_ptr < buf_size){ av_log(avctx, AV_LOG_ERROR, "buffer %d too small\n", *frame_size_ptr); return -1; } if((avctx->codec->capabilities & CODEC_CAP_DELAY) || buf_size){ ret = avctx->codec->decode(avctx, samples, frame_size_ptr, buf, buf_size); avctx->frame_number++; }else{ ret= 0; *frame_size_ptr=0; } return ret; } | 13,151 |
0 | static int64_t ffm_read_write_index(int fd) { uint8_t buf[8]; lseek(fd, 8, SEEK_SET); if (read(fd, buf, 8) != 8) return AVERROR(EIO); return AV_RB64(buf); } | 13,152 |
0 | static void virtio_net_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq) { VirtIONet *n = VIRTIO_NET(vdev); struct virtio_net_ctrl_hdr ctrl; virtio_net_ctrl_ack status = VIRTIO_NET_ERR; VirtQueueElement elem; size_t s; struct iovec *iov, *iov2; unsigned int iov_cnt; while (virtqueue_pop(vq, &elem)) { if (iov_size(elem.in_sg, elem.in_num) < sizeof(status) || iov_size(elem.out_sg, elem.out_num) < sizeof(ctrl)) { error_report("virtio-net ctrl missing headers"); exit(1); } iov_cnt = elem.out_num; iov2 = iov = g_memdup(elem.out_sg, sizeof(struct iovec) * elem.out_num); s = iov_to_buf(iov, iov_cnt, 0, &ctrl, sizeof(ctrl)); iov_discard_front(&iov, &iov_cnt, sizeof(ctrl)); if (s != sizeof(ctrl)) { status = VIRTIO_NET_ERR; } else if (ctrl.class == VIRTIO_NET_CTRL_RX) { status = virtio_net_handle_rx_mode(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_MAC) { status = virtio_net_handle_mac(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_VLAN) { status = virtio_net_handle_vlan_table(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_ANNOUNCE) { status = virtio_net_handle_announce(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_MQ) { status = virtio_net_handle_mq(n, ctrl.cmd, iov, iov_cnt); } else if (ctrl.class == VIRTIO_NET_CTRL_GUEST_OFFLOADS) { status = virtio_net_handle_offloads(n, ctrl.cmd, iov, iov_cnt); } s = iov_from_buf(elem.in_sg, elem.in_num, 0, &status, sizeof(status)); assert(s == sizeof(status)); virtqueue_push(vq, &elem, sizeof(status)); virtio_notify(vdev, vq); g_free(iov2); } } | 13,153 |
0 | void cpu_exec_realizefn(CPUState *cpu, Error **errp) { CPUClass *cc = CPU_GET_CLASS(cpu); cpu_list_add(cpu); if (tcg_enabled() && !cc->tcg_initialized) { cc->tcg_initialized = true; cc->tcg_initialize(); } #ifndef CONFIG_USER_ONLY if (qdev_get_vmsd(DEVICE(cpu)) == NULL) { vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu); } if (cc->vmsd != NULL) { vmstate_register(NULL, cpu->cpu_index, cc->vmsd, cpu); } #endif } | 13,157 |
0 | float32 helper_fitos(CPUSPARCState *env, int32_t src) { /* Inexact error possible converting int to float. */ float32 ret; clear_float_exceptions(env); ret = int32_to_float32(src, &env->fp_status); check_ieee_exceptions(env); return ret; } | 13,158 |
0 | static void test_wait_event_notifier(void) { EventNotifierTestData data = { .n = 0, .active = 1 }; event_notifier_init(&data.e, false); aio_set_event_notifier(ctx, &data.e, event_ready_cb); g_assert(!aio_poll(ctx, false)); g_assert_cmpint(data.n, ==, 0); g_assert_cmpint(data.active, ==, 1); event_notifier_set(&data.e); g_assert(aio_poll(ctx, false)); g_assert_cmpint(data.n, ==, 1); g_assert_cmpint(data.active, ==, 0); g_assert(!aio_poll(ctx, false)); g_assert_cmpint(data.n, ==, 1); g_assert_cmpint(data.active, ==, 0); aio_set_event_notifier(ctx, &data.e, NULL); g_assert(!aio_poll(ctx, false)); g_assert_cmpint(data.n, ==, 1); event_notifier_cleanup(&data.e); } | 13,159 |
0 | static void bswap_shdr(struct elf_shdr *shdr) { bswap32s(&shdr->sh_name); bswap32s(&shdr->sh_type); bswaptls(&shdr->sh_flags); bswaptls(&shdr->sh_addr); bswaptls(&shdr->sh_offset); bswaptls(&shdr->sh_size); bswap32s(&shdr->sh_link); bswap32s(&shdr->sh_info); bswaptls(&shdr->sh_addralign); bswaptls(&shdr->sh_entsize); } | 13,160 |
0 | void fdt_build_clock_node(void *host_fdt, void *guest_fdt, uint32_t host_phandle, uint32_t guest_phandle) { char *node_path = NULL; char *nodename; const void *r; int ret, node_offset, prop_len, path_len = 16; node_offset = fdt_node_offset_by_phandle(host_fdt, host_phandle); if (node_offset <= 0) { error_setg(&error_fatal, "not able to locate clock handle %d in host device tree", host_phandle); } node_path = g_malloc(path_len); while ((ret = fdt_get_path(host_fdt, node_offset, node_path, path_len)) == -FDT_ERR_NOSPACE) { path_len += 16; node_path = g_realloc(node_path, path_len); } if (ret < 0) { error_setg(&error_fatal, "not able to retrieve node path for clock handle %d", host_phandle); } r = qemu_fdt_getprop(host_fdt, node_path, "compatible", &prop_len, &error_fatal); if (strcmp(r, "fixed-clock")) { error_setg(&error_fatal, "clock handle %d is not a fixed clock", host_phandle); } nodename = strrchr(node_path, '/'); qemu_fdt_add_subnode(guest_fdt, nodename); copy_properties_from_host(clock_copied_properties, ARRAY_SIZE(clock_copied_properties), host_fdt, guest_fdt, node_path, nodename); qemu_fdt_setprop_cell(guest_fdt, nodename, "phandle", guest_phandle); g_free(node_path); } | 13,161 |
0 | static always_inline int _find_pte (mmu_ctx_t *ctx, int is_64b, int h, int rw) { target_ulong base, pte0, pte1; int i, good = -1; int ret, r; ret = -1; /* No entry found */ base = ctx->pg_addr[h]; for (i = 0; i < 8; i++) { #if defined(TARGET_PPC64) if (is_64b) { pte0 = ldq_phys(base + (i * 16)); pte1 = ldq_phys(base + (i * 16) + 8); r = pte64_check(ctx, pte0, pte1, h, rw); #if defined (DEBUG_MMU) if (loglevel != 0) { fprintf(logfile, "Load pte from 0x" ADDRX " => 0x" ADDRX " 0x" ADDRX " %d %d %d 0x" ADDRX "\n", base + (i * 16), pte0, pte1, (int)(pte0 & 1), h, (int)((pte0 >> 1) & 1), ctx->ptem); } #endif } else #endif { pte0 = ldl_phys(base + (i * 8)); pte1 = ldl_phys(base + (i * 8) + 4); r = pte32_check(ctx, pte0, pte1, h, rw); #if defined (DEBUG_MMU) if (loglevel != 0) { fprintf(logfile, "Load pte from 0x" ADDRX " => 0x" ADDRX " 0x" ADDRX " %d %d %d 0x" ADDRX "\n", base + (i * 8), pte0, pte1, (int)(pte0 >> 31), h, (int)((pte0 >> 6) & 1), ctx->ptem); } #endif } switch (r) { case -3: /* PTE inconsistency */ return -1; case -2: /* Access violation */ ret = -2; good = i; break; case -1: default: /* No PTE match */ break; case 0: /* access granted */ /* XXX: we should go on looping to check all PTEs consistency * but if we can speed-up the whole thing as the * result would be undefined if PTEs are not consistent. */ ret = 0; good = i; goto done; } } if (good != -1) { done: #if defined (DEBUG_MMU) if (loglevel != 0) { fprintf(logfile, "found PTE at addr 0x" PADDRX " prot=0x%01x " "ret=%d\n", ctx->raddr, ctx->prot, ret); } #endif /* Update page flags */ pte1 = ctx->raddr; if (pte_update_flags(ctx, &pte1, ret, rw) == 1) { #if defined(TARGET_PPC64) if (is_64b) { stq_phys_notdirty(base + (good * 16) + 8, pte1); } else #endif { stl_phys_notdirty(base + (good * 8) + 4, pte1); } } } return ret; } | 13,162 |
0 | static void x86_cpu_register_feature_bit_props(X86CPU *cpu, FeatureWord w, int bitnr) { Object *obj = OBJECT(cpu); int i; char **names; FeatureWordInfo *fi = &feature_word_info[w]; if (!fi->feat_names[bitnr]) { return; } names = g_strsplit(fi->feat_names[bitnr], "|", 0); feat2prop(names[0]); x86_cpu_register_bit_prop(cpu, names[0], &cpu->env.features[w], bitnr); for (i = 1; names[i]; i++) { feat2prop(names[i]); object_property_add_alias(obj, names[i], obj, names[0], &error_abort); } g_strfreev(names); } | 13,164 |
0 | static void reschedule_dma(void *opaque) { DMAAIOCB *dbs = (DMAAIOCB *)opaque; qemu_bh_delete(dbs->bh); dbs->bh = NULL; dma_bdrv_cb(dbs, 0); } | 13,165 |
0 | static inline void gen_lookup_tb(DisasContext *s) { tcg_gen_movi_i32(cpu_R[15], s->pc & ~1); s->is_jmp = DISAS_JUMP; } | 13,166 |
0 | int kvm_arch_init_vcpu(CPUState *env) { struct { struct kvm_cpuid2 cpuid; struct kvm_cpuid_entry2 entries[100]; } __attribute__((packed)) cpuid_data; uint32_t limit, i, j, cpuid_i; uint32_t unused; struct kvm_cpuid_entry2 *c; uint32_t signature[3]; env->cpuid_features &= kvm_arch_get_supported_cpuid(env, 1, 0, R_EDX); i = env->cpuid_ext_features & CPUID_EXT_HYPERVISOR; env->cpuid_ext_features &= kvm_arch_get_supported_cpuid(env, 1, 0, R_ECX); env->cpuid_ext_features |= i; env->cpuid_ext2_features &= kvm_arch_get_supported_cpuid(env, 0x80000001, 0, R_EDX); env->cpuid_ext3_features &= kvm_arch_get_supported_cpuid(env, 0x80000001, 0, R_ECX); env->cpuid_svm_features &= kvm_arch_get_supported_cpuid(env, 0x8000000A, 0, R_EDX); cpuid_i = 0; /* Paravirtualization CPUIDs */ memcpy(signature, "KVMKVMKVM\0\0\0", 12); c = &cpuid_data.entries[cpuid_i++]; memset(c, 0, sizeof(*c)); c->function = KVM_CPUID_SIGNATURE; c->eax = 0; c->ebx = signature[0]; c->ecx = signature[1]; c->edx = signature[2]; c = &cpuid_data.entries[cpuid_i++]; memset(c, 0, sizeof(*c)); c->function = KVM_CPUID_FEATURES; c->eax = env->cpuid_kvm_features & kvm_arch_get_supported_cpuid(env, KVM_CPUID_FEATURES, 0, R_EAX); has_msr_async_pf_en = c->eax & (1 << KVM_FEATURE_ASYNC_PF); cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused); for (i = 0; i <= limit; i++) { c = &cpuid_data.entries[cpuid_i++]; switch (i) { case 2: { /* Keep reading function 2 till all the input is received */ int times; c->function = i; c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC | KVM_CPUID_FLAG_STATE_READ_NEXT; cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); times = c->eax & 0xff; for (j = 1; j < times; ++j) { c = &cpuid_data.entries[cpuid_i++]; c->function = i; c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC; cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); } break; } case 4: case 0xb: case 0xd: for (j = 0; ; j++) { c->function = i; c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; c->index = j; cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); if (i == 4 && c->eax == 0) { break; } if (i == 0xb && !(c->ecx & 0xff00)) { break; } if (i == 0xd && c->eax == 0) { break; } c = &cpuid_data.entries[cpuid_i++]; } break; default: c->function = i; c->flags = 0; cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); break; } } cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused); for (i = 0x80000000; i <= limit; i++) { c = &cpuid_data.entries[cpuid_i++]; c->function = i; c->flags = 0; cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); } /* Call Centaur's CPUID instructions they are supported. */ if (env->cpuid_xlevel2 > 0) { env->cpuid_ext4_features &= kvm_arch_get_supported_cpuid(env, 0xC0000001, 0, R_EDX); cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused); for (i = 0xC0000000; i <= limit; i++) { c = &cpuid_data.entries[cpuid_i++]; c->function = i; c->flags = 0; cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); } } cpuid_data.cpuid.nent = cpuid_i; if (((env->cpuid_version >> 8)&0xF) >= 6 && (env->cpuid_features&(CPUID_MCE|CPUID_MCA)) == (CPUID_MCE|CPUID_MCA) && kvm_check_extension(env->kvm_state, KVM_CAP_MCE) > 0) { uint64_t mcg_cap; int banks; int ret; ret = kvm_get_mce_cap_supported(env->kvm_state, &mcg_cap, &banks); if (ret < 0) { fprintf(stderr, "kvm_get_mce_cap_supported: %s", strerror(-ret)); return ret; } if (banks > MCE_BANKS_DEF) { banks = MCE_BANKS_DEF; } mcg_cap &= MCE_CAP_DEF; mcg_cap |= banks; ret = kvm_vcpu_ioctl(env, KVM_X86_SETUP_MCE, &mcg_cap); if (ret < 0) { fprintf(stderr, "KVM_X86_SETUP_MCE: %s", strerror(-ret)); return ret; } env->mcg_cap = mcg_cap; } qemu_add_vm_change_state_handler(cpu_update_state, env); return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data); } | 13,168 |
0 | static int pci_bridge_initfn(PCIDevice *dev) { PCIBridge *s = DO_UPCAST(PCIBridge, dev, dev); pci_config_set_vendor_id(s->dev.config, s->vid); pci_config_set_device_id(s->dev.config, s->did); s->dev.config[0x04] = 0x06; // command = bus master, pci mem s->dev.config[0x05] = 0x00; s->dev.config[0x06] = 0xa0; // status = fast back-to-back, 66MHz, no error s->dev.config[0x07] = 0x00; // status = fast devsel s->dev.config[0x08] = 0x00; // revision s->dev.config[0x09] = 0x00; // programming i/f pci_config_set_class(s->dev.config, PCI_CLASS_BRIDGE_PCI); s->dev.config[0x0D] = 0x10; // latency_timer s->dev.config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_MULTI_FUNCTION | PCI_HEADER_TYPE_BRIDGE; // header_type s->dev.config[0x1E] = 0xa0; // secondary status return 0; } | 13,169 |
0 | static void write_palette(const char *key, QObject *obj, void *opaque) { struct palette_cb_priv *priv = opaque; VncState *vs = priv->vs; uint32_t bytes = vs->clientds.pf.bytes_per_pixel; uint8_t idx = qint_get_int(qobject_to_qint(obj)); if (bytes == 4) { uint32_t color = tight_palette_buf2rgb(32, (uint8_t *)key); ((uint32_t*)priv->header)[idx] = color; } else { uint16_t color = tight_palette_buf2rgb(16, (uint8_t *)key); ((uint16_t*)priv->header)[idx] = color; } } | 13,170 |
0 | static void rtas_get_xive(sPAPREnvironment *spapr, uint32_t token, uint32_t nargs, target_ulong args, uint32_t nret, target_ulong rets) { struct ics_state *ics = spapr->icp->ics; uint32_t nr; if ((nargs != 1) || (nret != 3)) { rtas_st(rets, 0, -3); return; } nr = rtas_ld(args, 0); if (!ics_valid_irq(ics, nr)) { rtas_st(rets, 0, -3); return; } rtas_st(rets, 0, 0); /* Success */ rtas_st(rets, 1, ics->irqs[nr - ics->offset].server); rtas_st(rets, 2, ics->irqs[nr - ics->offset].priority); } | 13,171 |
0 | VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_WARNING) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_WARNING_RET_CORUPT) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_WARNING_BUF_END_BEFORE_LE) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_WARNING_INVALID_FILE_SELECTED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_WARNING_FCI_FORMAT_INVALID) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_WARNING_CHANGE) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_WARNING_FILE_FILLED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_EXC_ERROR) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_EXC_ERROR_CHANGE) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_EXC_ERROR_MEMORY_FAILURE) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_WRONG_LENGTH) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_CLA_NOT_SUPPORTED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_CHANNEL_NOT_SUPPORTED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_SECURE_NOT_SUPPORTED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_COMMAND_NOT_SUPPORTED) VCARD_RESPONSE_NEW_STATIC_STATUS( VCARD7816_STATUS_ERROR_COMMAND_INCOMPATIBLE_WITH_FILE) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_SECURITY_NOT_SATISFIED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_AUTHENTICATION_BLOCKED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_DATA_INVALID) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_CONDITION_NOT_SATISFIED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_DATA_NO_EF) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_SM_OBJECT_MISSING) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_SM_OBJECT_INCORRECT) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_WRONG_PARAMETERS) VCARD_RESPONSE_NEW_STATIC_STATUS( VCARD7816_STATUS_ERROR_WRONG_PARAMETERS_IN_DATA) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_FUNCTION_NOT_SUPPORTED) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_FILE_NOT_FOUND) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_RECORD_NOT_FOUND) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_NO_SPACE_FOR_FILE) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_LC_TLV_INCONSISTENT) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_P1_P2_INCORRECT) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_LC_P1_P2_INCONSISTENT) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_DATA_NOT_FOUND) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_WRONG_PARAMETERS_2) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_INS_CODE_INVALID) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_CLA_INVALID) VCARD_RESPONSE_NEW_STATIC_STATUS(VCARD7816_STATUS_ERROR_GENERAL) /* * return a single response code. This function cannot fail. It will always * return a response. */ VCardResponse * vcard_make_response(vcard_7816_status_t status) { VCardResponse *response = NULL; switch (status) { /* known 7816 response codes */ case VCARD7816_STATUS_SUCCESS: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_SUCCESS); case VCARD7816_STATUS_WARNING: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_WARNING); case VCARD7816_STATUS_WARNING_RET_CORUPT: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_WARNING_RET_CORUPT); case VCARD7816_STATUS_WARNING_BUF_END_BEFORE_LE: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_WARNING_BUF_END_BEFORE_LE); case VCARD7816_STATUS_WARNING_INVALID_FILE_SELECTED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_WARNING_INVALID_FILE_SELECTED); case VCARD7816_STATUS_WARNING_FCI_FORMAT_INVALID: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_WARNING_FCI_FORMAT_INVALID); case VCARD7816_STATUS_WARNING_CHANGE: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_WARNING_CHANGE); case VCARD7816_STATUS_WARNING_FILE_FILLED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_WARNING_FILE_FILLED); case VCARD7816_STATUS_EXC_ERROR: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_EXC_ERROR); case VCARD7816_STATUS_EXC_ERROR_CHANGE: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_EXC_ERROR_CHANGE); case VCARD7816_STATUS_EXC_ERROR_MEMORY_FAILURE: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_EXC_ERROR_MEMORY_FAILURE); case VCARD7816_STATUS_ERROR_WRONG_LENGTH: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_WRONG_LENGTH); case VCARD7816_STATUS_ERROR_CLA_NOT_SUPPORTED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_CLA_NOT_SUPPORTED); case VCARD7816_STATUS_ERROR_CHANNEL_NOT_SUPPORTED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_CHANNEL_NOT_SUPPORTED); case VCARD7816_STATUS_ERROR_SECURE_NOT_SUPPORTED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_SECURE_NOT_SUPPORTED); case VCARD7816_STATUS_ERROR_COMMAND_NOT_SUPPORTED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_COMMAND_NOT_SUPPORTED); case VCARD7816_STATUS_ERROR_COMMAND_INCOMPATIBLE_WITH_FILE: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_COMMAND_INCOMPATIBLE_WITH_FILE); case VCARD7816_STATUS_ERROR_SECURITY_NOT_SATISFIED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_SECURITY_NOT_SATISFIED); case VCARD7816_STATUS_ERROR_AUTHENTICATION_BLOCKED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_AUTHENTICATION_BLOCKED); case VCARD7816_STATUS_ERROR_DATA_INVALID: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_DATA_INVALID); case VCARD7816_STATUS_ERROR_CONDITION_NOT_SATISFIED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_CONDITION_NOT_SATISFIED); case VCARD7816_STATUS_ERROR_DATA_NO_EF: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_DATA_NO_EF); case VCARD7816_STATUS_ERROR_SM_OBJECT_MISSING: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_SM_OBJECT_MISSING); case VCARD7816_STATUS_ERROR_SM_OBJECT_INCORRECT: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_SM_OBJECT_INCORRECT); case VCARD7816_STATUS_ERROR_WRONG_PARAMETERS: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_WRONG_PARAMETERS); case VCARD7816_STATUS_ERROR_WRONG_PARAMETERS_IN_DATA: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_WRONG_PARAMETERS_IN_DATA); case VCARD7816_STATUS_ERROR_FUNCTION_NOT_SUPPORTED: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_FUNCTION_NOT_SUPPORTED); case VCARD7816_STATUS_ERROR_FILE_NOT_FOUND: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_FILE_NOT_FOUND); case VCARD7816_STATUS_ERROR_RECORD_NOT_FOUND: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_RECORD_NOT_FOUND); case VCARD7816_STATUS_ERROR_NO_SPACE_FOR_FILE: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_NO_SPACE_FOR_FILE); case VCARD7816_STATUS_ERROR_LC_TLV_INCONSISTENT: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_LC_TLV_INCONSISTENT); case VCARD7816_STATUS_ERROR_P1_P2_INCORRECT: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_P1_P2_INCORRECT); case VCARD7816_STATUS_ERROR_LC_P1_P2_INCONSISTENT: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_LC_P1_P2_INCONSISTENT); case VCARD7816_STATUS_ERROR_DATA_NOT_FOUND: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_DATA_NOT_FOUND); case VCARD7816_STATUS_ERROR_WRONG_PARAMETERS_2: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_WRONG_PARAMETERS_2); case VCARD7816_STATUS_ERROR_INS_CODE_INVALID: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_INS_CODE_INVALID); case VCARD7816_STATUS_ERROR_CLA_INVALID: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_CLA_INVALID); case VCARD7816_STATUS_ERROR_GENERAL: return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_ERROR_GENERAL); default: /* we don't know this status code, create a response buffer to * hold it */ response = vcard_response_new_status(status); if (response == NULL) { /* couldn't allocate the buffer, return memmory error */ return VCARD_RESPONSE_GET_STATIC( VCARD7816_STATUS_EXC_ERROR_MEMORY_FAILURE); } } assert(response); return response; } | 13,173 |
0 | static inline void dv_decode_video_segment(DVVideoContext *s, uint8_t *buf_ptr1, const uint16_t *mb_pos_ptr) { int quant, dc, dct_mode, class1, j; int mb_index, mb_x, mb_y, v, last_index; DCTELEM *block, *block1; int c_offset; uint8_t *y_ptr; void (*idct_put)(uint8_t *dest, int line_size, DCTELEM *block); uint8_t *buf_ptr; PutBitContext pb, vs_pb; GetBitContext gb; BlockInfo mb_data[5 * 6], *mb, *mb1; DCTELEM sblock[5*6][64] __align8; uint8_t mb_bit_buffer[80 + 4]; /* allow some slack */ uint8_t vs_bit_buffer[5 * 80 + 4]; /* allow some slack */ memset(sblock, 0, sizeof(sblock)); /* pass 1 : read DC and AC coefficients in blocks */ buf_ptr = buf_ptr1; block1 = &sblock[0][0]; mb1 = mb_data; init_put_bits(&vs_pb, vs_bit_buffer, 5 * 80); for(mb_index = 0; mb_index < 5; mb_index++, mb1 += 6, block1 += 6 * 64) { /* skip header */ quant = buf_ptr[3] & 0x0f; buf_ptr += 4; init_put_bits(&pb, mb_bit_buffer, 80); mb = mb1; block = block1; for(j = 0;j < 6; j++) { last_index = block_sizes[j]; init_get_bits(&gb, buf_ptr, last_index); /* get the dc */ dc = get_sbits(&gb, 9); dct_mode = get_bits1(&gb); mb->dct_mode = dct_mode; mb->scan_table = s->dv_zigzag[dct_mode]; class1 = get_bits(&gb, 2); mb->shift_table = s->dv_idct_shift[class1 == 3][dct_mode] [quant + dv_quant_offset[class1]]; dc = dc << 2; /* convert to unsigned because 128 is not added in the standard IDCT */ dc += 1024; block[0] = dc; buf_ptr += last_index >> 3; mb->pos = 0; mb->partial_bit_count = 0; #ifdef VLC_DEBUG printf("MB block: %d, %d ", mb_index, j); #endif dv_decode_ac(&gb, mb, block); /* write the remaining bits in a new buffer only if the block is finished */ if (mb->pos >= 64) bit_copy(&pb, &gb); block += 64; mb++; } /* pass 2 : we can do it just after */ #ifdef VLC_DEBUG printf("***pass 2 size=%d MB#=%d\n", put_bits_count(&pb), mb_index); #endif block = block1; mb = mb1; init_get_bits(&gb, mb_bit_buffer, put_bits_count(&pb)); flush_put_bits(&pb); for(j = 0;j < 6; j++, block += 64, mb++) { if (mb->pos < 64 && get_bits_left(&gb) > 0) { dv_decode_ac(&gb, mb, block); /* if still not finished, no need to parse other blocks */ if (mb->pos < 64) break; } } /* all blocks are finished, so the extra bytes can be used at the video segment level */ if (j >= 6) bit_copy(&vs_pb, &gb); } /* we need a pass other the whole video segment */ #ifdef VLC_DEBUG printf("***pass 3 size=%d\n", put_bits_count(&vs_pb)); #endif block = &sblock[0][0]; mb = mb_data; init_get_bits(&gb, vs_bit_buffer, put_bits_count(&vs_pb)); flush_put_bits(&vs_pb); for(mb_index = 0; mb_index < 5; mb_index++) { for(j = 0;j < 6; j++) { if (mb->pos < 64) { #ifdef VLC_DEBUG printf("start %d:%d\n", mb_index, j); #endif dv_decode_ac(&gb, mb, block); } if (mb->pos >= 64 && mb->pos < 127) av_log(NULL, AV_LOG_ERROR, "AC EOB marker is absent pos=%d\n", mb->pos); block += 64; mb++; } } /* compute idct and place blocks */ block = &sblock[0][0]; mb = mb_data; for(mb_index = 0; mb_index < 5; mb_index++) { v = *mb_pos_ptr++; mb_x = v & 0xff; mb_y = v >> 8; y_ptr = s->picture.data[0] + (mb_y * s->picture.linesize[0] * 8) + (mb_x * 8); if (s->sys->pix_fmt == PIX_FMT_YUV411P) c_offset = (mb_y * s->picture.linesize[1] * 8) + ((mb_x >> 2) * 8); else c_offset = ((mb_y >> 1) * s->picture.linesize[1] * 8) + ((mb_x >> 1) * 8); for(j = 0;j < 6; j++) { idct_put = s->idct_put[mb->dct_mode]; if (j < 4) { if (s->sys->pix_fmt == PIX_FMT_YUV411P && mb_x < (704 / 8)) { /* NOTE: at end of line, the macroblock is handled as 420 */ idct_put(y_ptr + (j * 8), s->picture.linesize[0], block); } else { idct_put(y_ptr + ((j & 1) * 8) + ((j >> 1) * 8 * s->picture.linesize[0]), s->picture.linesize[0], block); } } else { if (s->sys->pix_fmt == PIX_FMT_YUV411P && mb_x >= (704 / 8)) { uint64_t aligned_pixels[64/8]; uint8_t *pixels= (uint8_t*)aligned_pixels; uint8_t *c_ptr, *c_ptr1, *ptr; int y, linesize; /* NOTE: at end of line, the macroblock is handled as 420 */ idct_put(pixels, 8, block); linesize = s->picture.linesize[6 - j]; c_ptr = s->picture.data[6 - j] + c_offset; ptr = pixels; for(y = 0;y < 8; y++) { /* convert to 411P */ c_ptr1 = c_ptr + 8*linesize; c_ptr[0]= ptr[0]; c_ptr1[0]= ptr[4]; c_ptr[1]= ptr[1]; c_ptr1[1]= ptr[5]; c_ptr[2]= ptr[2]; c_ptr1[2]= ptr[6]; c_ptr[3]= ptr[3]; c_ptr1[3]= ptr[7]; c_ptr += linesize; ptr += 8; } } else { /* don't ask me why they inverted Cb and Cr ! */ idct_put(s->picture.data[6 - j] + c_offset, s->picture.linesize[6 - j], block); } } block += 64; mb++; } } } | 13,174 |
0 | BlockDeviceInfo *bdrv_block_device_info(BlockDriverState *bs, Error **errp) { ImageInfo **p_image_info; BlockDriverState *bs0; BlockDeviceInfo *info = g_malloc0(sizeof(*info)); info->file = g_strdup(bs->filename); info->ro = bs->read_only; info->drv = g_strdup(bs->drv->format_name); info->encrypted = bs->encrypted; info->encryption_key_missing = bdrv_key_required(bs); info->cache = g_new(BlockdevCacheInfo, 1); *info->cache = (BlockdevCacheInfo) { .writeback = bdrv_enable_write_cache(bs), .direct = !!(bs->open_flags & BDRV_O_NOCACHE), .no_flush = !!(bs->open_flags & BDRV_O_NO_FLUSH), }; if (bs->node_name[0]) { info->has_node_name = true; info->node_name = g_strdup(bs->node_name); } if (bs->backing_file[0]) { info->has_backing_file = true; info->backing_file = g_strdup(bs->backing_file); } info->backing_file_depth = bdrv_get_backing_file_depth(bs); info->detect_zeroes = bs->detect_zeroes; if (bs->io_limits_enabled) { ThrottleConfig cfg; throttle_group_get_config(bs, &cfg); info->bps = cfg.buckets[THROTTLE_BPS_TOTAL].avg; info->bps_rd = cfg.buckets[THROTTLE_BPS_READ].avg; info->bps_wr = cfg.buckets[THROTTLE_BPS_WRITE].avg; info->iops = cfg.buckets[THROTTLE_OPS_TOTAL].avg; info->iops_rd = cfg.buckets[THROTTLE_OPS_READ].avg; info->iops_wr = cfg.buckets[THROTTLE_OPS_WRITE].avg; info->has_bps_max = cfg.buckets[THROTTLE_BPS_TOTAL].max; info->bps_max = cfg.buckets[THROTTLE_BPS_TOTAL].max; info->has_bps_rd_max = cfg.buckets[THROTTLE_BPS_READ].max; info->bps_rd_max = cfg.buckets[THROTTLE_BPS_READ].max; info->has_bps_wr_max = cfg.buckets[THROTTLE_BPS_WRITE].max; info->bps_wr_max = cfg.buckets[THROTTLE_BPS_WRITE].max; info->has_iops_max = cfg.buckets[THROTTLE_OPS_TOTAL].max; info->iops_max = cfg.buckets[THROTTLE_OPS_TOTAL].max; info->has_iops_rd_max = cfg.buckets[THROTTLE_OPS_READ].max; info->iops_rd_max = cfg.buckets[THROTTLE_OPS_READ].max; info->has_iops_wr_max = cfg.buckets[THROTTLE_OPS_WRITE].max; info->iops_wr_max = cfg.buckets[THROTTLE_OPS_WRITE].max; info->has_iops_size = cfg.op_size; info->iops_size = cfg.op_size; info->has_group = true; info->group = g_strdup(throttle_group_get_name(bs)); } info->write_threshold = bdrv_write_threshold_get(bs); bs0 = bs; p_image_info = &info->image; while (1) { Error *local_err = NULL; bdrv_query_image_info(bs0, p_image_info, &local_err); if (local_err) { error_propagate(errp, local_err); qapi_free_BlockDeviceInfo(info); return NULL; } if (bs0->drv && bs0->backing) { bs0 = bs0->backing->bs; (*p_image_info)->has_backing_image = true; p_image_info = &((*p_image_info)->backing_image); } else { break; } } return info; } | 13,175 |
0 | void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size) { s->frame_start = start; s->frame_end = start + size; s->frame_reg = reg; } | 13,177 |
0 | static int target_to_host_fcntl_cmd(int cmd) { switch(cmd) { case TARGET_F_DUPFD: case TARGET_F_GETFD: case TARGET_F_SETFD: case TARGET_F_GETFL: case TARGET_F_SETFL: return cmd; case TARGET_F_GETLK: return F_GETLK; case TARGET_F_SETLK: return F_SETLK; case TARGET_F_SETLKW: return F_SETLKW; case TARGET_F_GETOWN: return F_GETOWN; case TARGET_F_SETOWN: return F_SETOWN; case TARGET_F_GETSIG: return F_GETSIG; case TARGET_F_SETSIG: return F_SETSIG; #if TARGET_ABI_BITS == 32 case TARGET_F_GETLK64: return F_GETLK64; case TARGET_F_SETLK64: return F_SETLK64; case TARGET_F_SETLKW64: return F_SETLKW64; #endif case TARGET_F_SETLEASE: return F_SETLEASE; case TARGET_F_GETLEASE: return F_GETLEASE; #ifdef F_DUPFD_CLOEXEC case TARGET_F_DUPFD_CLOEXEC: return F_DUPFD_CLOEXEC; #endif case TARGET_F_NOTIFY: return F_NOTIFY; #ifdef F_GETOWN_EX case TARGET_F_GETOWN_EX: return F_GETOWN_EX; #endif #ifdef F_SETOWN_EX case TARGET_F_SETOWN_EX: return F_SETOWN_EX; #endif default: return -TARGET_EINVAL; } return -TARGET_EINVAL; } | 13,178 |
0 | static void test_io_channel_ipv6(bool async) { SocketAddress *listen_addr = g_new0(SocketAddress, 1); SocketAddress *connect_addr = g_new0(SocketAddress, 1); listen_addr->type = SOCKET_ADDRESS_KIND_INET; listen_addr->u.inet = g_new(InetSocketAddress, 1); *listen_addr->u.inet = (InetSocketAddress) { .host = g_strdup("::1"), .port = NULL, /* Auto-select */ }; connect_addr->type = SOCKET_ADDRESS_KIND_INET; connect_addr->u.inet = g_new(InetSocketAddress, 1); *connect_addr->u.inet = (InetSocketAddress) { .host = g_strdup("::1"), .port = NULL, /* Filled in later */ }; test_io_channel(async, listen_addr, connect_addr, false); qapi_free_SocketAddress(listen_addr); qapi_free_SocketAddress(connect_addr); } | 13,179 |
0 | ssize_t nbd_receive_reply(QIOChannel *ioc, NBDReply *reply) { uint8_t buf[NBD_REPLY_SIZE]; uint32_t magic; ssize_t ret; ret = read_sync(ioc, buf, sizeof(buf)); if (ret <= 0) { return ret; } if (ret != sizeof(buf)) { LOG("read failed"); return -EINVAL; } /* Reply [ 0 .. 3] magic (NBD_REPLY_MAGIC) [ 4 .. 7] error (0 == no error) [ 7 .. 15] handle */ magic = ldl_be_p(buf); reply->error = ldl_be_p(buf + 4); reply->handle = ldq_be_p(buf + 8); reply->error = nbd_errno_to_system_errno(reply->error); if (reply->error == ESHUTDOWN) { /* This works even on mingw which lacks a native ESHUTDOWN */ LOG("server shutting down"); return -EINVAL; } TRACE("Got reply: { magic = 0x%" PRIx32 ", .error = % " PRId32 ", handle = %" PRIu64" }", magic, reply->error, reply->handle); if (magic != NBD_REPLY_MAGIC) { LOG("invalid magic (got 0x%" PRIx32 ")", magic); return -EINVAL; } return 0; } | 13,181 |
0 | void qemu_map_cache_init(void) { unsigned long size; struct rlimit rlimit_as; mapcache = qemu_mallocz(sizeof (MapCache)); QTAILQ_INIT(&mapcache->locked_entries); mapcache->last_address_index = -1; getrlimit(RLIMIT_AS, &rlimit_as); rlimit_as.rlim_cur = rlimit_as.rlim_max; setrlimit(RLIMIT_AS, &rlimit_as); mapcache->max_mcache_size = rlimit_as.rlim_max; mapcache->nr_buckets = (((mapcache->max_mcache_size >> XC_PAGE_SHIFT) + (1UL << (MCACHE_BUCKET_SHIFT - XC_PAGE_SHIFT)) - 1) >> (MCACHE_BUCKET_SHIFT - XC_PAGE_SHIFT)); size = mapcache->nr_buckets * sizeof (MapCacheEntry); size = (size + XC_PAGE_SIZE - 1) & ~(XC_PAGE_SIZE - 1); DPRINTF("qemu_map_cache_init, nr_buckets = %lx size %lu\n", mapcache->nr_buckets, size); mapcache->entry = qemu_mallocz(size); } | 13,183 |
0 | static inline void gen_op_fcmpes(int fccno, TCGv_i32 r_rs1, TCGv_i32 r_rs2) { switch (fccno) { case 0: gen_helper_fcmpes(cpu_env, r_rs1, r_rs2); break; case 1: gen_helper_fcmpes_fcc1(cpu_env, r_rs1, r_rs2); break; case 2: gen_helper_fcmpes_fcc2(cpu_env, r_rs1, r_rs2); break; case 3: gen_helper_fcmpes_fcc3(cpu_env, r_rs1, r_rs2); break; } } | 13,184 |
0 | static inline int decode_bytes(const uint8_t* inbuffer, uint8_t* out, int bytes){ int i, off; uint32_t c; const uint32_t* buf; uint32_t* obuf = (uint32_t*) out; /* FIXME: 64 bit platforms would be able to do 64 bits at a time. * I'm too lazy though, should be something like * for(i=0 ; i<bitamount/64 ; i++) * (int64_t)out[i] = 0x37c511f237c511f2^av_be2ne64(int64_t)in[i]); * Buffer alignment needs to be checked. */ off = (intptr_t)inbuffer & 3; buf = (const uint32_t*) (inbuffer - off); c = av_be2ne32((0x37c511f2 >> (off*8)) | (0x37c511f2 << (32-(off*8)))); bytes += 3 + off; for (i = 0; i < bytes/4; i++) obuf[i] = c ^ buf[i]; return off; } | 13,185 |
1 | int net_init_socket(const Netdev *netdev, const char *name, NetClientState *peer, Error **errp) { /* FIXME error_setg(errp, ...) on failure */ Error *err = NULL; const NetdevSocketOptions *sock; assert(netdev->type == NET_CLIENT_DRIVER_SOCKET); sock = &netdev->u.socket; if (sock->has_fd + sock->has_listen + sock->has_connect + sock->has_mcast + sock->has_udp != 1) { error_report("exactly one of fd=, listen=, connect=, mcast= or udp=" " is required"); return -1; } if (sock->has_localaddr && !sock->has_mcast && !sock->has_udp) { error_report("localaddr= is only valid with mcast= or udp="); return -1; } if (sock->has_fd) { int fd; fd = monitor_fd_param(cur_mon, sock->fd, &err); if (fd == -1) { error_report_err(err); return -1; } qemu_set_nonblock(fd); if (!net_socket_fd_init(peer, "socket", name, fd, 1)) { return -1; } return 0; } if (sock->has_listen) { if (net_socket_listen_init(peer, "socket", name, sock->listen) == -1) { return -1; } return 0; } if (sock->has_connect) { if (net_socket_connect_init(peer, "socket", name, sock->connect) == -1) { return -1; } return 0; } if (sock->has_mcast) { /* if sock->localaddr is missing, it has been initialized to "all bits * zero" */ if (net_socket_mcast_init(peer, "socket", name, sock->mcast, sock->localaddr) == -1) { return -1; } return 0; } assert(sock->has_udp); if (!sock->has_localaddr) { error_report("localaddr= is mandatory with udp="); return -1; } if (net_socket_udp_init(peer, "socket", name, sock->udp, sock->localaddr) == -1) { return -1; } return 0; } | 13,187 |
1 | static void isabus_fdc_realize(DeviceState *dev, Error **errp) { ISADevice *isadev = ISA_DEVICE(dev); FDCtrlISABus *isa = ISA_FDC(dev); FDCtrl *fdctrl = &isa->state; Error *err = NULL; isa_register_portio_list(isadev, isa->iobase, fdc_portio_list, fdctrl, "fdc"); isa_init_irq(isadev, &fdctrl->irq, isa->irq); fdctrl->dma_chann = isa->dma; if (fdctrl->dma_chann != -1) { fdctrl->dma = isa_get_dma(isa_bus_from_device(isadev), isa->dma); assert(fdctrl->dma); } qdev_set_legacy_instance_id(dev, isa->iobase, 2); fdctrl_realize_common(fdctrl, &err); if (err != NULL) { error_propagate(errp, err); return; } } | 13,188 |
1 | static void network_to_register(RDMARegister *reg) { reg->key.current_addr = ntohll(reg->key.current_addr); reg->current_index = ntohl(reg->current_index); reg->chunks = ntohll(reg->chunks); } | 13,189 |
1 | ogg_get_length (AVFormatContext * s) { ogg_t *ogg = s->priv_data; int idx = -1, i; offset_t size, end; if(s->pb.is_streamed) return 0; // already set if (s->duration != AV_NOPTS_VALUE) return 0; size = url_fsize(&s->pb); if(size < 0) return 0; end = size > MAX_PAGE_SIZE? size - MAX_PAGE_SIZE: size; ogg_save (s); url_fseek (&s->pb, end, SEEK_SET); while (!ogg_read_page (s, &i)){ if (ogg->streams[i].granule != -1 && ogg->streams[i].granule != 0) idx = i; } if (idx != -1){ s->streams[idx]->duration = ogg_gptopts (s, idx, ogg->streams[idx].granule); } ogg->size = size; ogg_restore (s, 0); ogg_save (s); while (!ogg_read_page (s, &i)) { if (i == idx && ogg->streams[i].granule != -1 && ogg->streams[i].granule != 0) break; } if (i == idx) { s->streams[idx]->start_time = ogg_gptopts (s, idx, ogg->streams[idx].granule); s->streams[idx]->duration -= s->streams[idx]->start_time; } ogg_restore (s, 0); return 0; } | 13,190 |
1 | static void qemu_event_increment(void) { SetEvent(qemu_event_handle); } | 13,191 |
1 | static int qemu_balloon(ram_addr_t target, MonitorCompletion cb, void *opaque) { if (!balloon_event_fn) { return 0; } trace_balloon_event(balloon_opaque, target); balloon_event_fn(balloon_opaque, target, cb, opaque); return 1; } | 13,192 |
1 | void helper_wrmsr(void) { uint64_t val; helper_svm_check_intercept_param(SVM_EXIT_MSR, 1); val = ((uint32_t)EAX) | ((uint64_t)((uint32_t)EDX) << 32); switch((uint32_t)ECX) { case MSR_IA32_SYSENTER_CS: env->sysenter_cs = val & 0xffff; case MSR_IA32_SYSENTER_ESP: env->sysenter_esp = val; case MSR_IA32_SYSENTER_EIP: env->sysenter_eip = val; case MSR_IA32_APICBASE: cpu_set_apic_base(env, val); case MSR_EFER: { uint64_t update_mask; update_mask = 0; if (env->cpuid_ext2_features & CPUID_EXT2_SYSCALL) update_mask |= MSR_EFER_SCE; if (env->cpuid_ext2_features & CPUID_EXT2_LM) update_mask |= MSR_EFER_LME; if (env->cpuid_ext2_features & CPUID_EXT2_FFXSR) update_mask |= MSR_EFER_FFXSR; if (env->cpuid_ext2_features & CPUID_EXT2_NX) update_mask |= MSR_EFER_NXE; if (env->cpuid_ext3_features & CPUID_EXT3_SVM) update_mask |= MSR_EFER_SVME; cpu_load_efer(env, (env->efer & ~update_mask) | (val & update_mask)); } case MSR_STAR: env->star = val; case MSR_PAT: env->pat = val; case MSR_VM_HSAVE_PA: env->vm_hsave = val; #ifdef TARGET_X86_64 case MSR_LSTAR: env->lstar = val; case MSR_CSTAR: env->cstar = val; case MSR_FMASK: env->fmask = val; case MSR_FSBASE: env->segs[R_FS].base = val; case MSR_GSBASE: env->segs[R_GS].base = val; case MSR_KERNELGSBASE: env->kernelgsbase = val; #endif default: /* XXX: exception ? */ } } | 13,193 |
1 | static int rm_write_header(AVFormatContext *s) { RMMuxContext *rm = s->priv_data; StreamInfo *stream; int n; AVCodecContext *codec; for(n=0;n<s->nb_streams;n++) { s->streams[n]->id = n; codec = s->streams[n]->codec; stream = &rm->streams[n]; memset(stream, 0, sizeof(StreamInfo)); stream->num = n; stream->bit_rate = codec->bit_rate; stream->enc = codec; switch(codec->codec_type) { case AVMEDIA_TYPE_AUDIO: rm->audio_stream = stream; stream->frame_rate = (float)codec->sample_rate / (float)codec->frame_size; /* XXX: dummy values */ stream->packet_max_size = 1024; stream->nb_packets = 0; stream->total_frames = stream->nb_packets; break; case AVMEDIA_TYPE_VIDEO: rm->video_stream = stream; stream->frame_rate = (float)codec->time_base.den / (float)codec->time_base.num; /* XXX: dummy values */ stream->packet_max_size = 4096; stream->nb_packets = 0; stream->total_frames = stream->nb_packets; break; default: return -1; if (rv10_write_header(s, 0, 0)) return AVERROR_INVALIDDATA; avio_flush(s->pb); return 0; | 13,194 |
0 | static inline void mix_stereo_to_mono(AC3DecodeContext *ctx) { int i; float (*output)[256] = ctx->audio_block.block_output; for (i = 0; i < 256; i++) output[1][i] += output[2][i]; memset(output[2], 0, sizeof(output[2])); } | 13,195 |
0 | static int msmpeg4_decode_dc(MpegEncContext * s, int n, int *dir_ptr) { int level, pred; if(s->msmpeg4_version<=2){ if (n < 4) { level = get_vlc2(&s->gb, v2_dc_lum_vlc.table, DC_VLC_BITS, 3); } else { level = get_vlc2(&s->gb, v2_dc_chroma_vlc.table, DC_VLC_BITS, 3); } if (level < 0) return -1; level-=256; }else{ //FIXME optimize use unified tables & index if (n < 4) { level = get_vlc2(&s->gb, ff_msmp4_dc_luma_vlc[s->dc_table_index].table, DC_VLC_BITS, 3); } else { level = get_vlc2(&s->gb, ff_msmp4_dc_chroma_vlc[s->dc_table_index].table, DC_VLC_BITS, 3); } if (level < 0){ av_log(s->avctx, AV_LOG_ERROR, "illegal dc vlc\n"); return -1; } if (level == DC_MAX) { level = get_bits(&s->gb, 8); if (get_bits1(&s->gb)) level = -level; } else if (level != 0) { if (get_bits1(&s->gb)) level = -level; } } if(s->msmpeg4_version==1){ int32_t *dc_val; pred = msmpeg4v1_pred_dc(s, n, &dc_val); level += pred; /* update predictor */ *dc_val= level; }else{ int16_t *dc_val; pred = ff_msmpeg4_pred_dc(s, n, &dc_val, dir_ptr); level += pred; /* update predictor */ if (n < 4) { *dc_val = level * s->y_dc_scale; } else { *dc_val = level * s->c_dc_scale; } } return level; } | 13,196 |
0 | void ff_put_h264_qpel16_mc21_msa(uint8_t *dst, const uint8_t *src, ptrdiff_t stride) { avc_luma_midv_qrt_16w_msa(src - (2 * stride) - 2, stride, dst, stride, 16, 0); } | 13,197 |
0 | av_cold int ff_ivi_init_tiles(IVIPlaneDesc *planes, int tile_width, int tile_height) { int p, b, x, y, x_tiles, y_tiles, t_width, t_height; IVIBandDesc *band; IVITile *tile, *ref_tile; for (p = 0; p < 3; p++) { t_width = !p ? tile_width : (tile_width + 3) >> 2; t_height = !p ? tile_height : (tile_height + 3) >> 2; if (!p && planes[0].num_bands == 4) { t_width >>= 1; t_height >>= 1; } if(t_width<=0 || t_height<=0) return AVERROR(EINVAL); for (b = 0; b < planes[p].num_bands; b++) { band = &planes[p].bands[b]; x_tiles = IVI_NUM_TILES(band->width, t_width); y_tiles = IVI_NUM_TILES(band->height, t_height); band->num_tiles = x_tiles * y_tiles; av_freep(&band->tiles); band->tiles = av_mallocz(band->num_tiles * sizeof(IVITile)); if (!band->tiles) return AVERROR(ENOMEM); tile = band->tiles; /* use the first luma band as reference for motion vectors * and quant */ ref_tile = planes[0].bands[0].tiles; for (y = 0; y < band->height; y += t_height) { for (x = 0; x < band->width; x += t_width) { tile->xpos = x; tile->ypos = y; tile->mb_size = band->mb_size; tile->width = FFMIN(band->width - x, t_width); tile->height = FFMIN(band->height - y, t_height); tile->is_empty = tile->data_size = 0; /* calculate number of macroblocks */ tile->num_MBs = IVI_MBs_PER_TILE(tile->width, tile->height, band->mb_size); av_freep(&tile->mbs); tile->mbs = av_malloc(tile->num_MBs * sizeof(IVIMbInfo)); if (!tile->mbs) return AVERROR(ENOMEM); tile->ref_mbs = 0; if (p || b) { tile->ref_mbs = ref_tile->mbs; ref_tile++; } tile++; } } }// for b }// for p return 0; } | 13,198 |
1 | static int mxf_read_content_storage(void *arg, AVIOContext *pb, int tag, int size, UID uid) { MXFContext *mxf = arg; switch (tag) { case 0x1901: mxf->packages_count = avio_rb32(pb); if (mxf->packages_count >= UINT_MAX / sizeof(UID)) return -1; mxf->packages_refs = av_malloc(mxf->packages_count * sizeof(UID)); if (!mxf->packages_refs) return -1; avio_skip(pb, 4); /* useless size of objects, always 16 according to specs */ avio_read(pb, (uint8_t *)mxf->packages_refs, mxf->packages_count * sizeof(UID)); break; } return 0; } | 13,199 |
1 | int64_t av_rescale_rnd(int64_t a, int64_t b, int64_t c, enum AVRounding rnd) { int64_t r = 0; av_assert2(c > 0); av_assert2(b >=0); av_assert2((unsigned)(rnd&~AV_ROUND_PASS_MINMAX)<=5 && (rnd&~AV_ROUND_PASS_MINMAX)!=4); if (c <= 0 || b < 0 || !((unsigned)(rnd&~AV_ROUND_PASS_MINMAX)<=5 && (rnd&~AV_ROUND_PASS_MINMAX)!=4)) return INT64_MIN; if (rnd & AV_ROUND_PASS_MINMAX) { if (a == INT64_MIN || a == INT64_MAX) return a; rnd -= AV_ROUND_PASS_MINMAX; } if (a < 0) return -(uint64_t)av_rescale_rnd(-FFMAX(a, -INT64_MAX), b, c, rnd ^ ((rnd >> 1) & 1)); if (rnd == AV_ROUND_NEAR_INF) r = c / 2; else if (rnd & 1) r = c - 1; if (b <= INT_MAX && c <= INT_MAX) { if (a <= INT_MAX) return (a * b + r) / c; else { int64_t ad = a / c; int64_t a2 = (a % c * b + r) / c; if (ad >= INT32_MAX && ad > (INT64_MAX - a2) / b) return INT64_MIN; return ad * b + a2; } } else { #if 1 uint64_t a0 = a & 0xFFFFFFFF; uint64_t a1 = a >> 32; uint64_t b0 = b & 0xFFFFFFFF; uint64_t b1 = b >> 32; uint64_t t1 = a0 * b1 + a1 * b0; uint64_t t1a = t1 << 32; int i; a0 = a0 * b0 + t1a; a1 = a1 * b1 + (t1 >> 32) + (a0 < t1a); a0 += r; a1 += a0 < r; for (i = 63; i >= 0; i--) { a1 += a1 + ((a0 >> i) & 1); t1 += t1; if (c <= a1) { a1 -= c; t1++; } } if (t1 > INT64_MAX) return INT64_MIN; return t1; } #else AVInteger ai; ai = av_mul_i(av_int2i(a), av_int2i(b)); ai = av_add_i(ai, av_int2i(r)); return av_i2int(av_div_i(ai, av_int2i(c))); } #endif } | 13,200 |
1 | static void gen_check_cpenable(DisasContext *dc, unsigned cp) { if (option_enabled(dc, XTENSA_OPTION_COPROCESSOR) && !(dc->cpenable & (1 << cp))) { gen_exception_cause(dc, COPROCESSOR0_DISABLED + cp); dc->is_jmp = DISAS_UPDATE; } } | 13,201 |
1 | static void gen_write_xer(TCGv src) { tcg_gen_andi_tl(cpu_xer, src, ~((1u << XER_SO) | (1u << XER_OV) | (1u << XER_CA))); tcg_gen_extract_tl(cpu_so, src, XER_SO, 1); tcg_gen_extract_tl(cpu_ov, src, XER_OV, 1); tcg_gen_extract_tl(cpu_ca, src, XER_CA, 1); } | 13,202 |
1 | void decode_mvs(VP8Context *s, VP8Macroblock *mb, int mb_x, int mb_y, int layout) { VP8Macroblock *mb_edge[3] = { 0 /* top */, mb - 1 /* left */, 0 /* top-left */ }; enum { CNT_ZERO, CNT_NEAREST, CNT_NEAR, CNT_SPLITMV }; enum { VP8_EDGE_TOP, VP8_EDGE_LEFT, VP8_EDGE_TOPLEFT }; int idx = CNT_ZERO; int cur_sign_bias = s->sign_bias[mb->ref_frame]; int8_t *sign_bias = s->sign_bias; VP56mv near_mv[4]; uint8_t cnt[4] = { 0 }; VP56RangeCoder *c = &s->c; if (!layout) { // layout is inlined (s->mb_layout is not) mb_edge[0] = mb + 2; mb_edge[2] = mb + 1; } else { mb_edge[0] = mb - s->mb_width - 1; mb_edge[2] = mb - s->mb_width - 2; } AV_ZERO32(&near_mv[0]); AV_ZERO32(&near_mv[1]); AV_ZERO32(&near_mv[2]); /* Process MB on top, left and top-left */ #define MV_EDGE_CHECK(n) \ { \ VP8Macroblock *edge = mb_edge[n]; \ int edge_ref = edge->ref_frame; \ if (edge_ref != VP56_FRAME_CURRENT) { \ uint32_t mv = AV_RN32A(&edge->mv); \ if (mv) { \ if (cur_sign_bias != sign_bias[edge_ref]) { \ /* SWAR negate of the values in mv. */ \ mv = ~mv; \ mv = ((mv & 0x7fff7fff) + \ 0x00010001) ^ (mv & 0x80008000); \ } \ if (!n || mv != AV_RN32A(&near_mv[idx])) \ AV_WN32A(&near_mv[++idx], mv); \ cnt[idx] += 1 + (n != 2); \ } else \ cnt[CNT_ZERO] += 1 + (n != 2); \ } \ } MV_EDGE_CHECK(0) MV_EDGE_CHECK(1) MV_EDGE_CHECK(2) mb->partitioning = VP8_SPLITMVMODE_NONE; if (vp56_rac_get_prob_branchy(c, vp8_mode_contexts[cnt[CNT_ZERO]][0])) { mb->mode = VP8_MVMODE_MV; /* If we have three distinct MVs, merge first and last if they're the same */ if (cnt[CNT_SPLITMV] && AV_RN32A(&near_mv[1 + VP8_EDGE_TOP]) == AV_RN32A(&near_mv[1 + VP8_EDGE_TOPLEFT])) cnt[CNT_NEAREST] += 1; /* Swap near and nearest if necessary */ if (cnt[CNT_NEAR] > cnt[CNT_NEAREST]) { FFSWAP(uint8_t, cnt[CNT_NEAREST], cnt[CNT_NEAR]); FFSWAP( VP56mv, near_mv[CNT_NEAREST], near_mv[CNT_NEAR]); } if (vp56_rac_get_prob_branchy(c, vp8_mode_contexts[cnt[CNT_NEAREST]][1])) { if (vp56_rac_get_prob_branchy(c, vp8_mode_contexts[cnt[CNT_NEAR]][2])) { /* Choose the best mv out of 0,0 and the nearest mv */ clamp_mv(s, &mb->mv, &near_mv[CNT_ZERO + (cnt[CNT_NEAREST] >= cnt[CNT_ZERO])]); cnt[CNT_SPLITMV] = ((mb_edge[VP8_EDGE_LEFT]->mode == VP8_MVMODE_SPLIT) + (mb_edge[VP8_EDGE_TOP]->mode == VP8_MVMODE_SPLIT)) * 2 + (mb_edge[VP8_EDGE_TOPLEFT]->mode == VP8_MVMODE_SPLIT); if (vp56_rac_get_prob_branchy(c, vp8_mode_contexts[cnt[CNT_SPLITMV]][3])) { mb->mode = VP8_MVMODE_SPLIT; mb->mv = mb->bmv[decode_splitmvs(s, c, mb, layout) - 1]; } else { mb->mv.y += read_mv_component(c, s->prob->mvc[0]); mb->mv.x += read_mv_component(c, s->prob->mvc[1]); mb->bmv[0] = mb->mv; } } else { clamp_mv(s, &mb->mv, &near_mv[CNT_NEAR]); mb->bmv[0] = mb->mv; } } else { clamp_mv(s, &mb->mv, &near_mv[CNT_NEAREST]); mb->bmv[0] = mb->mv; } } else { mb->mode = VP8_MVMODE_ZERO; AV_ZERO32(&mb->mv); mb->bmv[0] = mb->mv; } } | 13,203 |
1 | static void fw_cfg_initfn(Object *obj) { SysBusDevice *sbd = SYS_BUS_DEVICE(obj); FWCfgState *s = FW_CFG(obj); memory_region_init_io(&s->ctl_iomem, OBJECT(s), &fw_cfg_ctl_mem_ops, s, "fwcfg.ctl", FW_CFG_SIZE); sysbus_init_mmio(sbd, &s->ctl_iomem); memory_region_init_io(&s->data_iomem, OBJECT(s), &fw_cfg_data_mem_ops, s, "fwcfg.data", FW_CFG_DATA_SIZE); sysbus_init_mmio(sbd, &s->data_iomem); /* In case ctl and data overlap: */ memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops, s, "fwcfg", FW_CFG_SIZE); } | 13,206 |
1 | int av_get_cpu_flags(void) { int flags = cpu_flags; if (flags == -1) { flags = get_cpu_flags(); cpu_flags = flags; } return flags; } | 13,207 |
1 | static ExitStatus trans_fop_weww_0c(DisasContext *ctx, uint32_t insn, const DisasInsn *di) { unsigned rt = extract32(insn, 0, 5); unsigned rb = extract32(insn, 16, 5); unsigned ra = extract32(insn, 21, 5); return do_fop_weww(ctx, rt, ra, rb, di->f_weww); } | 13,208 |
1 | static int inc_refcounts(BlockDriverState *bs, BdrvCheckResult *res, void **refcount_table, int64_t *refcount_table_size, int64_t offset, int64_t size) { BDRVQcow2State *s = bs->opaque; uint64_t start, last, cluster_offset, k, refcount; int ret; if (size <= 0) { return 0; } start = start_of_cluster(s, offset); last = start_of_cluster(s, offset + size - 1); for(cluster_offset = start; cluster_offset <= last; cluster_offset += s->cluster_size) { k = cluster_offset >> s->cluster_bits; if (k >= *refcount_table_size) { ret = realloc_refcount_array(s, refcount_table, refcount_table_size, k + 1); if (ret < 0) { res->check_errors++; return ret; } } refcount = s->get_refcount(*refcount_table, k); if (refcount == s->refcount_max) { fprintf(stderr, "ERROR: overflow cluster offset=0x%" PRIx64 "\n", cluster_offset); res->corruptions++; continue; } s->set_refcount(*refcount_table, k, refcount + 1); } return 0; } | 13,209 |
1 | static int gdb_get_avr_reg(CPUState *env, uint8_t *mem_buf, int n) { if (n < 32) { #ifdef WORDS_BIGENDIAN stq_p(mem_buf, env->avr[n].u64[0]); stq_p(mem_buf+8, env->avr[n].u64[1]); #else stq_p(mem_buf, env->avr[n].u64[1]); stq_p(mem_buf+8, env->avr[n].u64[0]); #endif return 16; } if (n == 33) { stl_p(mem_buf, env->vscr); return 4; } if (n == 34) { stl_p(mem_buf, (uint32_t)env->spr[SPR_VRSAVE]); return 4; } return 0; } | 13,210 |
1 | static void tpm_backend_worker_thread(gpointer data, gpointer user_data) { TPMBackend *s = TPM_BACKEND(user_data); TPMBackendClass *k = TPM_BACKEND_GET_CLASS(s); assert(k->handle_request != NULL); k->handle_request(s, (TPMBackendCmd *)data); qemu_bh_schedule(s->bh); } | 13,211 |
1 | static uint_fast8_t vorbis_floor0_decode(vorbis_context *vc, vorbis_floor_data *vfu, float *vec) { vorbis_floor0 *vf = &vfu->t0; float *lsp = vf->lsp; uint_fast32_t amplitude; uint_fast32_t book_idx; uint_fast8_t blockflag = vc->modes[vc->mode_number].blockflag; amplitude = get_bits(&vc->gb, vf->amplitude_bits); if (amplitude > 0) { float last = 0; uint_fast16_t lsp_len = 0; uint_fast16_t idx; vorbis_codebook codebook; book_idx = get_bits(&vc->gb, ilog(vf->num_books)); if (book_idx >= vf->num_books) { av_log(vc->avccontext, AV_LOG_ERROR, "floor0 dec: booknumber too high!\n"); book_idx = 0; //FIXME: look above } AV_DEBUG("floor0 dec: booknumber: %u\n", book_idx); codebook = vc->codebooks[vf->book_list[book_idx]]; while (lsp_len<vf->order) { int vec_off; AV_DEBUG("floor0 dec: book dimension: %d\n", codebook.dimensions); AV_DEBUG("floor0 dec: maximum depth: %d\n", codebook.maxdepth); /* read temp vector */ vec_off = get_vlc2(&vc->gb, codebook.vlc.table, codebook.nb_bits, codebook.maxdepth) * codebook.dimensions; AV_DEBUG("floor0 dec: vector offset: %d\n", vec_off); /* copy each vector component and add last to it */ for (idx = 0; idx < codebook.dimensions; ++idx) lsp[lsp_len+idx] = codebook.codevectors[vec_off+idx] + last; last = lsp[lsp_len+idx-1]; /* set last to last vector component */ lsp_len += codebook.dimensions; } #ifdef V_DEBUG /* DEBUG: output lsp coeffs */ { int idx; for (idx = 0; idx < lsp_len; ++idx) AV_DEBUG("floor0 dec: coeff at %d is %f\n", idx, lsp[idx]); } #endif /* synthesize floor output vector */ { int i; int order = vf->order; float wstep = M_PI / vf->bark_map_size; for (i = 0; i < order; i++) lsp[i] = 2.0f * cos(lsp[i]); AV_DEBUG("floor0 synth: map_size = %d; m = %d; wstep = %f\n", vf->map_size, order, wstep); i = 0; while (i < vf->map_size[blockflag]) { int j, iter_cond = vf->map[blockflag][i]; float p = 0.5f; float q = 0.5f; float two_cos_w = 2.0f * cos(wstep * iter_cond); // needed all times /* similar part for the q and p products */ for (j = 0; j + 1 < order; j += 2) { q *= lsp[j] - two_cos_w; p *= lsp[j + 1] - two_cos_w; } if (j == order) { // even order p *= p * (2.0f - two_cos_w); q *= q * (2.0f + two_cos_w); } else { // odd order q *= two_cos_w-lsp[j]; // one more time for q /* final step and square */ p *= p * (4.f - two_cos_w * two_cos_w); q *= q; } /* calculate linear floor value */ { q = exp((((amplitude*vf->amplitude_offset) / (((1 << vf->amplitude_bits) - 1) * sqrt(p + q))) - vf->amplitude_offset) * .11512925f); } /* fill vector */ do { vec[i] = q; ++i; } while (vf->map[blockflag][i] == iter_cond); } } } else { /* this channel is unused */ return 1; } AV_DEBUG(" Floor0 decoded\n"); return 0; } | 13,212 |
0 | static void add_entry(TiffEncoderContext *s, enum TiffTags tag, enum TiffTypes type, int count, const void *ptr_val) { uint8_t *entries_ptr = s->entries + 12 * s->num_entries; assert(s->num_entries < TIFF_MAX_ENTRY); bytestream_put_le16(&entries_ptr, tag); bytestream_put_le16(&entries_ptr, type); bytestream_put_le32(&entries_ptr, count); if (type_sizes[type] * count <= 4) { tnput(&entries_ptr, count, ptr_val, type, 0); } else { bytestream_put_le32(&entries_ptr, *s->buf - s->buf_start); check_size(s, count * type_sizes2[type]); tnput(s->buf, count, ptr_val, type, 0); } s->num_entries++; } | 13,214 |
1 | static int set_hwframe_ctx(AVCodecContext *ctx, AVBufferRef *hw_device_ctx) { AVBufferRef *hw_frames_ref; AVHWFramesContext *frames_ctx = NULL; int err = 0; if (!(hw_frames_ref = av_hwframe_ctx_alloc(hw_device_ctx))) { fprintf(stderr, "Failed to create VAAPI frame context.\n"); return -1; } frames_ctx = (AVHWFramesContext *)(hw_frames_ref->data); frames_ctx->format = AV_PIX_FMT_VAAPI; frames_ctx->sw_format = AV_PIX_FMT_NV12; frames_ctx->width = width; frames_ctx->height = height; frames_ctx->initial_pool_size = 20; if ((err = av_hwframe_ctx_init(hw_frames_ref)) < 0) { fprintf(stderr, "Failed to initialize VAAPI frame context." "Error code: %s\n",av_err2str(err)); return err; } ctx->hw_frames_ctx = av_buffer_ref(hw_frames_ref); if (!ctx->hw_frames_ctx) err = AVERROR(ENOMEM); return err; } | 13,215 |
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