plateform
stringclasses 1
value | repo_name
stringlengths 13
113
| name
stringlengths 3
74
| ext
stringclasses 1
value | path
stringlengths 12
229
| size
int64 23
843k
| source_encoding
stringclasses 9
values | md5
stringlengths 32
32
| text
stringlengths 23
843k
|
|---|---|---|---|---|---|---|---|---|
github
|
mstrader/mlib_devel-master
|
dds_init.m
|
.m
|
mlib_devel-master/casper_library/dds_init.m
| 5,191 |
utf_8
|
8cff883aba91024d1bce2d6c0804b478
|
% dds_init(blk, varargin)
%
% blk = The block to initialize.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% freq_div = The (power of 2) denominator of the mixing frequency.
% freq = The numerator of the mixing frequency
% num_lo = The number of parallel streams provided
% n_bits = The bitwidth of samples out
% latency = The latency of sine/cos lookup table
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function dds_init(blk,varargin)
% Declare any default values for arguments you might like.
defaults = {'num_lo', 1, 'n_bits', 8, 'latency', 2};
check_mask_type(blk, 'dds');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
freq_div = get_var('freq_div','defaults', defaults, varargin{:});
freq = get_var('freq','defaults', defaults, varargin{:});
num_lo = get_var('num_lo','defaults', defaults, varargin{:});
n_bits = get_var('n_bits','defaults', defaults, varargin{:});
latency = get_var('latency','defaults', defaults, varargin{:});
delete_lines(blk);
%default for storing in the library
if num_lo == 0,
clean_blocks(blk);
set_param(blk,'AttributesFormatString','');
save_state(blk, 'defaults', defaults, varargin{:});
return;
end
counter_width = log2(freq_div);
counter_step = mod(num_lo*freq,freq_div);
if num_lo < 1 || log2(num_lo) ~= round(log2(num_lo))
error_string = 'The number of parallel LOs must be a power of 2 no less than 1';
errordlg(error_string);
end
if freq < 0 || freq ~= round(freq)
error_string = 'The frequency factor must be a positive integer';
errordlg(error_string);
end
if freq_div <= 0 || freq_div < num_lo || freq_div ~= round(freq_div) || freq_div/num_lo ~= round(freq_div/num_lo) || log2(freq_div) ~= round(log2(freq_div))
error_string = 'The frequency factor must be a positive power of 2 integer multiples of the number of LOs';
errordlg(error_string);
end
for i = 0 : num_lo - 1,
sin_name = ['sin',num2str(i)];
cos_name = ['cos',num2str(i)];
% Add ports
reuse_block(blk, sin_name, 'built-in/outport', 'Position', [175 45+i*100 205 60+100*i]);
reuse_block(blk, cos_name, 'built-in/outport', 'Position', [175 70+i*100 205 85+100*i]);
% Add LOs
if counter_step == 0,
lo_name = ['lo_const',num2str(i)];
reuse_block(blk, lo_name, 'casper_library_downconverter/lo_const', 'Position', [100 i*100+50 140 i*100+90], ...
'n_bits', num2str(n_bits), 'phase', num2str(2*pi*freq*i/freq_div));
else
lo_name = ['lo_osc',num2str(i)];
reuse_block(blk, 'sync', 'built-in/inport', 'Position', [30 100 60 115]);
reuse_block(blk, lo_name, 'casper_library_downconverter/lo_osc', 'Position', [100 i*100+50 140 i*100+90], ...
'n_bits', num2str(n_bits), 'latency', num2str(latency), ...
'counter_width', num2str(counter_width), 'counter_start', num2str(mod(i*freq,freq_div)), ...
'counter_step', num2str(counter_step));
add_line(blk,['sync','/1'],[lo_name,'/1']);
end
add_line(blk,[lo_name,'/1'],[sin_name,'/1']);
add_line(blk,[lo_name,'/2'],[cos_name,'/1']);
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
% Set attribute format string (block annotation)
annotation=sprintf('lo at -%d/%d',freq, freq_div);
set_param(blk,'AttributesFormatString',annotation);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
bus_create_init.m
|
.m
|
mlib_devel-master/casper_library/bus_create_init.m
| 4,385 |
utf_8
|
50ffeaa6f812e06e4f70d6e21762adee
|
% Create a 'bus' of similar signals
%
% bus_create_init(blk, varargin)
%
% blk = The block to be configured.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% inputNum = Number of inputs
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Meerkat radio telescope project %
% www.kat.ac.za %
% Copyright (C) Paul Prozesky 2011 %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Create a 'bus' of similar signals.
function bus_create_init(blk, varargin)
clog('entering bus_create_init','trace');
check_mask_type(blk, 'bus_create');
defaults = {'inputNum', 2};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
% check the params
inputNum = get_var('inputNum', 'defaults', defaults, varargin{:});
if (isnan(inputNum) || (~isnumeric(inputNum))),
errordlg('Number of inputs must be natural number'); error('Number of inputs must be natural number'); end;
munge_block(blk, varargin{:});
% delete all the lines
delete_lines(blk);
% add the inputs, outputs and gateway out blocks, drawing lines between them
xSize = 100;
ySize = 20;
xStart = 100;
xPos = xStart + (xSize * 2);
yPos = 100;
% one output for the bus
reuse_block(blk, 'bus_out', 'built-in/outport', ...
'Position', [xStart + (xSize * 3 * 2), yPos + (ySize * (inputNum - 0.5)), xStart + (xSize * 3 * 2) + (xSize/2), yPos + (ySize * (inputNum + 0.5))]);
concatSize = ySize * inputNum;
if inputNum > 1,
reuse_block(blk, 'concatenate', 'xbsIndex_r4/Concat', ...
'Position', [xStart + (xSize * 2 * 2), yPos, xStart + (xSize * 2 * 2) + (xSize/2), yPos + (2 * ySize * inputNum) - ySize], ...
'num_inputs', num2str(inputNum));
add_line(blk, ['concatenate', '/1'], ['bus_out', '/1'], 'autorouting', 'on');
end
% draw the inputs and convert blocks
for p = 1 : inputNum,
xPos = xStart;
% the output block
inName = sprintf('in%i', p);
reuse_block(blk, inName, 'built-in/inport', 'Position', [xPos, yPos, xPos + (xSize/2), yPos + ySize]);
xPos = xPos + (xSize * 2);
% the cast block
reinterpretName = sprintf('reinterpret%i', p);
reuse_block(blk, reinterpretName, 'xbsIndex_r4/Reinterpret', ...
'Position', [xPos, yPos, xPos + (xSize/2), yPos + ySize], ...
'force_arith_type', 'on', 'arith_type', 'Unsigned', ...
'force_bin_pt', 'on', 'bin_pt', '0');
yPos = yPos + (ySize * 2);
% connect up the blocks
add_line(blk, [inName, '/1'], [reinterpretName, '/1'], 'autorouting', 'on');
if inputNum > 1,
add_line(blk, [reinterpretName, '/1'], ['concatenate', '/', num2str(p)], 'autorouting', 'on');
else
add_line(blk, [reinterpretName, '/1'], 'bus_out/1', 'autorouting', 'on');
end
end;
% remove unconnected blocks
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_create_init','trace');
|
github
|
mstrader/mlib_devel-master
|
delete_lines.m
|
.m
|
mlib_devel-master/casper_library/delete_lines.m
| 1,962 |
utf_8
|
74821081e848af88f2fd32cc3221a25d
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function delete_lines(cursys)
% Remove all lines from a system.
%
% delete_lines(cursys)
try
lines = get_param(cursys, 'Lines');
for k=1:length(lines),
delete_line(lines(k).Handle);
end
catch ex
dump_and_rethrow(ex);
end
|
github
|
mstrader/mlib_devel-master
|
munge_block.m
|
.m
|
mlib_devel-master/casper_library/munge_block.m
| 3,319 |
utf_8
|
bbdc399735f88a8da2ad5cc7c1f1387e
|
% Performs various munges on a block.
%
% munge_block(blk,varargin)
%
% blk - The block whose mask will be dumbed down or turned off
% varargin - A cell array of strings indicating the munges to do.
%
% Supported munges:
%
% 'dumbdown'
%
% Dumbing down a block's mask makes the block's mask informative only;
% the mask can no longer be used to configure the subsystem. Here is
% a list of what happens to a mask that is dumbed down...
%
% o MaskInitialization code is deleted.
% o All mask parameters are marked as disabled, non-tunable, and
% do-not-evaluate.
%
% 'unmask'
%
% Turns off the block's mask.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function munge_block(blk, varargin)
try
% Don't munge if blk lives in a library
if is_library_block(blk), return, end
% Disable link
set_param(blk,'LinkStatus', 'inactive');
% Take appropriate munge action
switch get_var('munge', varargin{:})
case 'dumbdown'
% Nuke any mask initialization code
set_param(blk, 'MaskInitialization','');
% Make mask params disabled
mes=get_param(blk, 'MaskEnableString');
mes=strrep(mes, 'on','off');
set_param(blk, 'MaskEnableString',mes);
% Make mask params non-tunable
mtvs=get_param(blk, 'MaskTunableValueString');
mtvs=strrep(mtvs, 'on', 'off');
set_param(blk, 'MaskTunableValueString', mtvs);
% Make mask params literal (non-evaluated)
mv=get_param(blk, 'MaskVariables');
mv=strrep(mv, '@', '&');
set_param(blk, 'MaskVariables', mv);
case 'unmask'
set_param(blk, 'Mask', 'off');
end
catch ex
dump_and_rethrow(ex);
end
|
github
|
mstrader/mlib_devel-master
|
fir_col_async_init.m
|
.m
|
mlib_devel-master/casper_library/fir_col_async_init.m
| 12,037 |
utf_8
|
7219a4b6b5ce61f2bd46ac804d22514e
|
% fir_col_init(blk, varargin)
%
% blk = The block to initialize.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% n_inputs = The number of parallel input samples.
% coeff = The FIR coefficients, top-to-bottom.
% add_latency = The latency of adders.
% mult_latency = The latency of multipliers.
% coeff_bit_width = The number of bits used for coefficients
% coeff_bin_pt = The number of fractional bits in the coefficients
% first_stage_hdl = Whether to implement the first stage in adder trees
% as behavioral HDL so that adders are absorbed into DSP slices used for
% multipliers where this is possible.
% adder_imp = adder implementation (Fabric, behavioral HDL, DSP48)
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function fir_col_async_init(blk)
clog('entering fir_col_async_init', 'trace');
showname = 'on';
sizey_goto = 15;
varargin = make_varargin(blk);
% declare any default values for arguments you might like.
defaults = {'n_inputs', 0, 'coeff', 0.1, 'add_latency', 2, ...
'mult_latency', 3, 'coeff_bit_width', 25, 'coeff_bin_pt', 24, ...
'first_stage_hdl', 'off', 'adder_imp', 'Fabric', 'async', 'off', ...
'bus_input', 'off', 'dbl', 'off', 'input_width', 16, ...
'input_bp', 0, 'input_type', 'Unsigned'};
check_mask_type(blk, 'fir_col_async');
% if same_state(blk, 'defaults', defaults, varargin{:}),
% clog('fir_col_async_init same state', 'trace');
% return;
% end
clog('fir_col_async_init post same_state', 'trace');
munge_block(blk, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
coeff = get_var('coeff', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
coeff_bit_width = get_var('coeff_bit_width', 'defaults', defaults, varargin{:});
coeff_bin_pt = get_var('coeff_bin_pt', 'defaults', defaults, varargin{:});
first_stage_hdl = get_var('first_stage_hdl', 'defaults', defaults, varargin{:});
adder_imp = get_var('adder_imp', 'defaults', defaults, varargin{:});
async_ops = strcmp('on', get_var('async', 'defaults', defaults, varargin{:}));
bus_input = strcmp('on', get_var('bus_input', 'defaults', defaults, varargin{:}));
double_blk = strcmp('on', get_var('dbl', 'defaults', defaults, varargin{:}));
% default library state
if n_inputs == 0,
clog('fir_col_async_init no inputs', 'trace');
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting fir_col_async_init', 'trace');
return;
end
% async_ops = false;
% bus_input = false;
% double_blk = false;
% hand off to the double script if this is a doubled-up FIR
if double_blk,
fir_dbl_col_async_init(blk, varargin{:});
else
if bus_input,
input_width = get_var('input_width','defaults', defaults, varargin{:});
input_bp = get_var('input_bp','defaults', defaults, varargin{:});
input_type = get_var('input_type','defaults', defaults, varargin{:});
if strcmp(input_type, 'Signed'),
input_type_num = 1;
else
input_type_num = 0;
end
end
delete_lines(blk);
if length(coeff) ~= n_inputs,
clog('number of coefficients must be the same as the number of inputs', {'fir_col_async_init_debug', 'error'});
error('number of coefficients must be the same as the number of inputs');
end
% draw the inputs differently depending on whether we're taking a bus input or not
if bus_input,
reuse_block(blk, 'dbus_in', 'built-in/inport', 'Position', [0 30 30 46], 'Port', '1');
reuse_block(blk, 'inbus', 'casper_library_flow_control/bus_expand', 'Position', [80 30 150 30+(n_inputs*sizey_goto*3)]);
set_param([blk, '/inbus'], ...
'mode', 'divisions of equal size', ...
'outputNum', num2str(2*n_inputs), ...
'outputWidth', num2str(input_width), ...
'outputBinaryPt', num2str(input_bp), ...
'outputArithmeticType', num2str(input_type_num), ...
'show_format', 'off', ...
'outputToWorkspace', 'off');
add_line(blk, 'dbus_in/1', 'inbus/1');
port_num = 2;
else
port_num = 1;
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
reuse_block(blk, ['real', ctrstr], 'built-in/inport', 'Position', [30 ctr*80 60 15+80*ctr]);
reuse_block(blk, ['imag', ctrstr], 'built-in/inport', 'Position', [30 ctr*80+30 60 45+80*ctr]);
port_num = port_num + 2;
end
end
if async_ops,
reuse_block(blk, 'dv', 'built-in/inport', 'Position', [0 0 30 16], 'Port', num2str(port_num));
reuse_block(blk, 'dv_in', 'built-in/goto', ...
'GotoTag', 'dv_in', 'showname', showname, ...
'Position', [50 0 120 16]);
add_line(blk, 'dv/1', 'dv_in/1');
end
% tap blocks
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
blkname = ['fir_tap', ctrstr];
full_blkname = [blk, '/', blkname];
tap_ypos = ctr*160 - 160;
reuse_block(blk, blkname, 'casper_library_downconverter/fir_tap_async', ...
'Position', [400 tap_ypos 470 tap_ypos+120], ...
'add_latency', num2str(add_latency), ...
'mult_latency', num2str(mult_latency), ...
'factor', num2str(coeff(ctr)), ...
'coeff_bit_width', num2str(coeff_bit_width), ...
'coeff_bin_pt', num2str(coeff_bin_pt), 'dbl', 'off');
if async_ops,
set_param(full_blkname, 'async', 'on');
else
set_param(full_blkname, 'async', 'off');
end
% connection to inputs
if async_ops,
reuse_block(blk, ['dv_in', ctrstr], 'built-in/from', 'GotoTag', 'dv_in', 'showname', showname, 'Position', [280 tap_ypos+104 360 tap_ypos+120]);
add_line(blk, ['dv_in', ctrstr, '/1'], [blkname, '/3']);
end
if bus_input,
pos = ((ctr-1)*2)+1;
add_line(blk, ['inbus/', num2str(pos+0)], [blkname, '/1']);
add_line(blk, ['inbus/', num2str(pos+1)], [blkname, '/2']);
else
add_line(blk, ['real', ctrstr, '/1'], [blkname, '/1']);
add_line(blk, ['imag', ctrstr, '/1'], [blkname, '/2']);
end
end
% output ports
if bus_input,
reuse_block(blk, 'outbus', 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(n_inputs*2), ...
'Position', [600 30 650 30+(n_inputs*sizey_goto*3)]);
reuse_block(blk, 'dbus_out', 'built-in/outport', 'Position', [700 30 730 46], 'Port', '1');
add_line(blk, 'outbus/1', 'dbus_out/1');
end
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
tapname = ['fir_tap', ctrstr];
tap_ypos = ctr*160 - 160;
if bus_input,
pos = ((ctr-1)*2)+1;
add_line(blk, [tapname, '/1'], ['outbus/', num2str(pos+0)]);
add_line(blk, [tapname, '/2'], ['outbus/', num2str(pos+1)]);
else
reuse_block(blk, ['real_out',ctrstr], 'built-in/outport', 'Position', [550 tap_ypos 580 tap_ypos+16], 'Port', num2str(2*ctr-1));
reuse_block(blk, ['imag_out',ctrstr], 'built-in/outport', 'Position', [550 tap_ypos+30 580 tap_ypos+46], 'Port', num2str(2*ctr));
add_line(blk, [tapname, '/1'], ['real_out', ctrstr, '/1']);
add_line(blk, [tapname, '/2'], ['imag_out', ctrstr, '/1']);
end
end
% the output sum blocks
if bus_input,
reuse_block(blk, 'real_sum', 'built-in/outport', 'Position', [900 100+20*n_inputs 930 116+20*n_inputs], 'Port', '2');
reuse_block(blk, 'imag_sum', 'built-in/outport', 'Position', [900 200+20*n_inputs 930 216+20*n_inputs], 'Port', '3');
else
reuse_block(blk, 'real_sum', 'built-in/outport', 'Position', [900 100+20*n_inputs 930 116+20*n_inputs], 'Port', num2str(n_inputs*2+1));
reuse_block(blk, 'imag_sum', 'built-in/outport', 'Position', [900 200+20*n_inputs 930 216+20*n_inputs], 'Port', num2str(n_inputs*2+2));
end
% the adder trees
if n_inputs > 1,
reuse_block(blk, 'adder_tree1', 'casper_library_misc/adder_tree', ...
'Position', [800 100 850 100+20*n_inputs], 'n_inputs', num2str(n_inputs),...
'latency', num2str(add_latency), 'first_stage_hdl', first_stage_hdl, 'adder_imp', adder_imp);
reuse_block(blk, 'adder_tree2', 'casper_library_misc/adder_tree', ...
'Position', [800 200+20*n_inputs 850 200+20*n_inputs+20*n_inputs], 'n_inputs', num2str(n_inputs),...
'latency', num2str(add_latency), 'first_stage_hdl', first_stage_hdl, 'adder_imp', adder_imp);
reuse_block(blk, 'c1', 'xbsIndex_r4/Constant', ...
'explicit_period', 'on', 'Position', [750 100 780 110]);
reuse_block(blk, 'c2', 'xbsIndex_r4/Constant', ...
'explicit_period', 'on', 'Position', [750 200+20*n_inputs 780 210+20*n_inputs]);
reuse_block(blk, 'term1','built-in/Terminator', 'Position', [1000 100 1015 115]);
add_line(blk, 'adder_tree1/1', 'term1/1');
reuse_block(blk, 'term2','built-in/Terminator', 'Position', [1000 200+20*n_inputs 1015 215+20*n_inputs]);
add_line(blk, 'adder_tree2/1', 'term2/1');
add_line(blk, 'c1/1', 'adder_tree1/1');
add_line(blk, 'c2/1', 'adder_tree2/1');
add_line(blk,'adder_tree1/2','real_sum/1');
add_line(blk,'adder_tree2/2','imag_sum/1');
for ctr=1:n_inputs,
add_line(blk, ['fir_tap', num2str(ctr), '/3'], ['adder_tree1/', num2str(ctr+1)]);
add_line(blk, ['fir_tap', num2str(ctr), '/4'], ['adder_tree2/', num2str(ctr+1)]);
end
else
add_line(blk, 'fir_tap1/3', 'real_sum/1');
add_line(blk, 'fir_tap1/4', 'imag_sum/1');
end
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting fir_col_async_init', 'trace');
|
github
|
mstrader/mlib_devel-master
|
mdl2m.m
|
.m
|
mlib_devel-master/casper_library/mdl2m.m
| 32,302 |
utf_8
|
3e9f0d85e5d3324b03bc488c41f12b93
|
%generate script to draw system specified
%
%usage: function mdl2m(mdl, varargin)
%mdl - model to convert
%varargin - 'name', value pairs where name can be;
% script_name - name of initialization script ([.../casper_library/<model_name>_init.m])
% mode - mode to open initialization script in ('a'-append, ['w']-overwrite)
% file - pass file pointer (created with fopen) directly
% subsystem - the system is a subsystem (so don't generate system parameters etc) ('on', ['off'])
% reuse - generated script uses reuse_block instead of add_block for more efficient drawing
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% MeerKAT Radio Telescope Project %
% www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens (meerKAT) %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function mdl2m(mdl, varargin)
base = 'getenv(''MLIB_DEVEL_PATH''), ''/casper_library/''';
name = get_param(mdl, 'name');
defaults = { ...
'script_name', [eval(['[',base,']']), name, '_init'], ...
'mode', 'w', ...
'subsystem', 'off', ...
'file', -1, ...
};
script_name = get_var('script_name', 'defaults', defaults, varargin{:});
m = get_var('mode', 'defaults', defaults, varargin{:});
fp = get_var('file', 'defaults', defaults, varargin{:});
mdl_name = [base, ', ''', name, ''''];
library = get_var('library', 'defaults', defaults, varargin{:});
subsystem = get_var('subsystem', 'defaults', defaults, varargin{:});
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% get necessary system parameters %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
if strcmp(subsystem, 'off'),
lt = get_param(mdl, 'LibraryType');
if strcmp(lt, 'BlockLibrary'),
library = 'on';
else
library = 'off';
end
clog(['getting system parameter values for ''',mdl,''''],'mdl2m_debug');
required_sys_params = ...
{ ...
'Name', ...
'LibraryType', ... %is this a library?
'Lock', ... %locked library
'PreSaveFcn', ... %things to do before saving
'SolverName', ... %simulation type
'SolverMode', ... %
'StartTime', ... %simulation start time
'StopTime', ... %simulation stop time
};
sys_params = get_params(mdl, required_sys_params);
else,
library = 'off';
clog(['skipping getting parameter values for ''',mdl,''''],'mdl2m_debug');
end
%%%%%%%%%%%%%
% open file %
%%%%%%%%%%%%%
if fp == -1,
ntc = 1; %need to close file after
clog(['opening ''',script_name,''''],'mdl2m_debug');
fp = fopen([script_name,'.m'],m);
if fp == -1,
clog(['error opening ''',script_name,''''],{'error', 'mdl2m_debug'});
error(['error opening ''',script_name,'''']);
return;
end
else
ntc = 0;
end
tokens = regexp(script_name, '/', 'split');
f_name = tokens{length(tokens)};
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% set up top level function %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
if strcmp(subsystem, 'off'),
fprintf(fp,'function %s()\n',f_name);
else,
fprintf(fp,'function %s(blk)\n',f_name);
end
fprintf(fp, '\n');
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% generate creation of new system %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
if strcmp(subsystem, 'off'),
clog(['setting up creation of new system ''',mdl,''''],'mdl2m_debug');
if strcmp(library, 'on'), sys_type = 'Library'; else, sys_type = 'Model'; end
fprintf(fp,'\twarning off Simulink:Engine:MdlFileShadowing;\n');
fprintf(fp,'\tclose_system(''%s'', 0);\n', name); % close system if it's open
fprintf(fp,'\tmdl = new_system(''%s'', ''%s'');\n', name, sys_type); %create a new system
fprintf(fp,'\tblk = get(mdl,''Name'');\n'); %get the name for future use
fprintf(fp,'\twarning on Simulink:Engine:MdlFileShadowing;\n');
fprintf(fp,'\n');
else,
clog(['configuring ''',mdl,'''...'],'mdl2m_debug');
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% generate logic to draw blocks in system %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%find all blocks in top level of system
blks = find_system(mdl, 'SearchDepth', 1, 'LookUnderMasks', 'on', 'FollowLinks', 'on', 'type', 'block');
%if a subsystem have to exclude first entry
if strcmp(subsystem,'on'),
if length(blks) > 1,
clog(['excluding top block as subsystem'],'mdl2m_debug');
blks = blks(2:length(blks));
else,
%empty blocks
blks = {};
end
end
%place in order of processing (will determine order of blocks in text file)
[blks, indices] = sort_blocks(blks, 'default');
clog(['adding block generation logic for ',num2str(length(blks)),' blocks'],'mdl2m_debug');
if strcmp(library,'on'), reuse = 'off';
else reuse = 'on';
end
add_blocks(blks, fp, reuse);
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% generate logic to draw lines in system %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
sys_lines = get_param(mdl, 'Lines');
[sys_lines, indices] = sort_lines(sys_lines, 'default');
clog(['adding line generation logic for ',num2str(length(sys_lines)),' lines'],'mdl2m_debug');
for line_index = 1:length(sys_lines),
line = sys_lines(line_index);
add_line(line, fp);
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% generate logic to set up system parameters %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
if strcmp(subsystem, 'off'),
clog(['adding system parameters for ',mdl],'mdl2m_debug');
set_params(fp, 'blk', sys_params, 'no_empty');
else,
clog(['skipping addition of system parameters for ',mdl,' as a subsystem'],'mdl2m_debug');
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% finalise generation logic %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%if a library, must be saved somewhere before can be used
if strcmp(library, 'on'),
fprintf(fp, '\tfilename = save_system(mdl,[%s]);\n', mdl_name);
% Make sure other's can overwrite so we can share mlib_devel working copy
% between users.
fprintf(fp, '\tif iscell(filename), filename = filename{1}; end;\n');
fprintf(fp, '\tfileattrib(filename, ''+w'');\n');
end
fprintf(fp,'end %% %s\n\n',f_name);
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% generate functions to generate blocks %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
clog(['appending block generation functions'],'mdl2m_debug');
gen_blocks('blks', blks, 'file', fp);
if ntc == 1,
result = fclose(fp);
if result ~= 0, clog(['error closing file ',script_name],{'mdl2m_debug', 'error'}); end
% Make sure other's can overwrite so we can share mlib_devel working copy
% between users.
fileattrib([script_name,'.m'], '+w');
end
end %mdl2m
%function to sort blocks into order they will appear in system generation script
%strategy can be 'name', 'default'
function[blocks, indices] = sort_blocks(blocks_in, strategy)
%default is input ports first, then position from top left corner, then output ports
if strcmp(strategy,'default'),
%go through finding inports, outports, and position info
inports = {}; outports = {}; remainder = {};
inport_indices = []; outport_indices = []; remainder_indices = [];
remainder_distances = [];
for index = 1:length(blocks_in),
blk = blocks_in{index};
type = get_param(blk, 'BlockType');
if strcmp(type, 'Inport'),
inport_indices = [inport_indices, index];
elseif strcmp(type, 'Outport'),
outport_indices = [outport_indices, index];
else,
remainder_indices = [remainder_indices, index];
position = get_param(blk, 'Position');
%distance from top left to centre of block
remainder_distances = [remainder_distances, sqrt(((position(3) + position(1))/2)^2+((position(4) + position(2))/2)^2)];
end %if
end %for
%now sort remainder_distances, finding indices
[temp, sorted_indices] = sort(remainder_distances);
%construct final vector of blocks and indices
indices = [inport_indices, remainder_indices(sorted_indices), outport_indices];
blocks = {blocks_in{indices}};
%alphabetically by name
elseif strcmp(strategy, 'name'),
blocks = sort(blocks_in);
else,
clog(['unknown sort strategy ''',strategy,''''],{'mdl2m_debug','sort_blocks_debug', 'error'});
error(['unknown sort strategy ''',strategy,'''']);
end
end %sort_blocks
%function to sort lines into order they will appear in system generation script
%strategy can be 'default', 'name' and is based on line source
function[lines_out, indices] = sort_lines(lines_in, strategy)
%go through all lines finding blocks associated with source of lines
blocks_in = {};
for index = 1:length(lines_in),
line = lines_in(index);
srcblk = line.SrcBlock;
%sanity check
if isempty(srcblk),
clog(['sanity check error: no SrcBlk for start of line!'],{'mdl2m_debug','sort_lines_debug', 'error'});
error(['sanity check error: no SrcBlk for start of line!']);
end %if
blocks_in = {blocks_in{:}, srcblk};
end %for
%sort source blocks with specified strategy
[blocks, indices] = sort_blocks(blocks_in, strategy);
%rearrange lines according to sort results
lines_out = lines_in(indices);
end %sort_lines
%logic to add block to system
%blks = blocks to be added, fp = file pointer, reuse = use reuse_block instead of add_block
function add_blocks(blks, fp, reuse)
%go through and process all blocks
for index = 1:length(blks),
blk = blks{index};
name = get_param(blk, 'Name');
sls = get_param(blk, 'StaticLinkStatus'); %library block or not (and does not update out-of-date linked blocks)
block_type = get_param(blk, 'BlockType'); %for built-in blocks
anc_block = get_param(blk, 'AncestorBlock'); %AncestorBlock (for disabled library links)
position = get_param(blk, 'Position'); %once added, we put the block in the correct place
tag = get_param(blk, 'Tag');
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% block not from any library (i.e built-in), %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
if strcmp(sls, 'none'),
src = ['built-in/',block_type];
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% contained in a library block %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
elseif strcmp(sls, 'implicit'),
%if we are generating a library block, then the link to itself is not useful so ignore ReferenceBlock
%asssume use of original library block (AncestorBlock) if implicit library block with AncestorBlock
if ~isempty(anc_block)
src = anc_block;
clog(['assuming ok to use ', src,' for ',name,' with disabled link'],{'add_lib_blocks_debug', 'mdl2m_debug'});
else,
src = ['built-in/',block_type];
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% library block, link resolved %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
elseif strcmp(sls, 'resolved'),
src = get_param(blk, 'ReferenceBlock'); %for library blocks without disabled links
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% library block, link disabled %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
elseif strcmp(sls, 'inactive'),
src = anc_block; %for library blocks with disabled (but not broken) links
clog(['assuming ok to use ', src,' for ',name,' with disabled link'],{'add_lib_blocks_debug', 'mdl2m_debug'});
% link to library block that we can't figure out
elseif strcmp(sls, 'unresolved'),
clog(['can''t find library source for ',name,' with ''unresolved'' StaticLinkStatus'],{'error', 'add_blocks_debug', 'mdl2m_debug'});
error(['can''t find library source for ',name,' with ''unresolved'' StaticLinkStatus']);
return;
else,
clog(['don''t know what to do with a ',sls,' StaticLinkStatus for ',name],{'error', 'add_blocks_debug', 'mdl2m_debug'});
error(['don''t know what to do with a ',sls,' StaticLinkStatus for ',name]);
return;
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% make block of required type %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
clog(['instantiating ',name,' of type ''',src,''''], {'add_blocks_debug', 'mdl2m_debug'});
if strcmp(reuse, 'on'),
func = sprintf('reuse_block(blk, ''%s'', ''%s'');',name, src);
else
func = sprintf('add_block(''%s'', [blk,''/%s'']);', src, name);
end
fprintf(fp, '\t%s\n', func);
dialog_param_strategy = 'default'; %by default look at differences and include/exclude certain parameters
%built-in or (implicit library block but not from original library block)
if strcmp(sls, 'none') || (strcmp(sls, 'implicit') && isempty(anc_block)),
%block is of type SubSystem so needs to be generated
if strcmp(block_type,'SubSystem'),
if strcmp(get_param(blk, 'Mask'), 'on'),
dialog_param_strategy = 'all'; %take all dialog parameters if subsystem to be generated has a mask
else,
dialog_param_strategy = 'none';
end
clog(['generating logic to generate ''',name,''' block from SubSystem base'], {'add_blocks_debug', 'mdl2m_debug'});
fprintf(fp, '\t%s_gen([blk,''/%s'']);\n', name, name); %call block generation logic
end
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% set up mask parameter values %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
required_params = determine_dialog_params(blk, src, dialog_param_strategy);
clog(['setting up required dialog parameters for ',name], {'add_blocks_debug', 'mdl2m_debug'});
params = get_params(blk, required_params);
set_params(fp, ['[blk,''/',name,''']'], {params{:}, 'Position', position, 'Tag', tag}, 'all'); %appending Position guarantees at least one param
fprintf(fp,'\n');
end %for index
end %add_blocks
%determine which dialog parameters need to be set up for the specified block
%strategy can be 'default', 'all', 'delta', 'none'
function[params] = determine_dialog_params(blk, src, strategy)
dp = get_param(blk, 'DialogParameters');
if ~isempty(dp),
all_params = fieldnames(dp);
else
all_params = {};
end
%set parameter values for all parameters
if strcmp(strategy,'none'),
params = {};
elseif strcmp(strategy,'all'),
params = all_params;
%get default mask parameter values, block mask parameter values and look for differences
else,
%look up parameters we need and ones that are unnecessary based on block type
[required_params, unnecessary_params] = filter_dialog_parameters(src);
params = {};
blk_params = get_params(blk, all_params);
src_params = get_params(src, all_params);
%sanity check
if(length(blk_params) ~= length(src_params)),
clog(['block parameter length does not match source for ',blk],{'error', 'determine_dialog_params_debug', 'mdl2m_debug'});
error(['block parameter length does not match source for ',blk]);
return;
end
%go through comparing names and values
for index = 1:2:length(blk_params),
blk_name = blk_params{index}; blk_value = blk_params{index+1};
src_name = src_params{index}; src_value = src_params{index+1};
%sanity check
if ~strcmp(blk_name, src_name),
clog(['block param name (''',blk_name,'''),does not match source param name (''',src_name,''') for ',blk],{'error', 'determine_dialog_params_debug', 'mdl2m_debug'});
error(['block param name (''',blk_name,'''),does not match source param name (''',src_name,''') for ',blk]);
return;
end
unnecessary = (sum(strcmp(blk_name, unnecessary_params)) > 0);
required = (sum(strcmp(blk_name, required_params)) > 0);
diff = (~strcmp(to_string(blk_value), to_string(src_value)));
clog(['block param (''',blk_name,''') for ',blk,' unnecessary: ',num2str(unnecessary),' required: ',num2str(required),' diff: ',num2str(diff)],{'determine_dialog_params_debug', 'mdl2m_debug'});
%include if (default strategy and not unnecessary and (required or if different from default) or (delta strategy and difference from default)
if ((strcmp(strategy, 'default') && ~unnecessary) && (required || diff)) || (strcmp(strategy, 'delta') && diff),
clog(['block param (''',blk_name,'''), included for ',blk],{'determine_dialog_params_debug', 'mdl2m_debug'});
params = {params{:}, blk_name};
else,
clog(['block param (''',blk_name,'''), not included'],{'determine_dialog_params_debug', 'mdl2m_debug'});
end
end %for
end %if
end %determine_dialog_params
%forces addition and removal of certain parameters based on block source
function[force_include, force_exclude] = filter_dialog_parameters(src)
tokens = regexp(src, '/', 'split');
blk = tokens{length(tokens)};
base_lib = tokens{1};
force_include = {}; force_exclude = {};
%Xilinx System Generator blockset
if length(base_lib > 8) && strcmp(base_lib(1:8), 'xbsIndex'),
clog(['including/excluding parameters for System Generator block ''',blk,''''], {'mdl2m_debug', 'filter_dialog_parameters_debug'});
%exclude parameter values that are generated by other scripts
force_exclude = {force_exclude{:}, ...
'infoedit', ...
'block_version', ...
'sg_icon_stat', ...
'sg_mask_display', ...
'sg_list_contents', ...
'sggui_pos', ...
'xl_area', ...
};
%casper block
elseif length(base_lib >= 6) && strcmp(base_lib(1:6), 'casper'),
clog(['including/excluding parameters for casper block ''',blk,''''], {'mdl2m_debug', 'filter_dialog_parameters_debug'});
force_include = {force_include{:}, ...
%TODO
% 'UserData', ... %UserData contains state and mask struct values
% 'UserDataPersistent', ...
};
elseif length(base_lib >= 8) && strcmp(base_lib(1:8), 'built-in'),
clog(['including/excluding parameters for built-in block ''',blk,''''], {'mdl2m_debug', 'filter_dialog_parameters_debug'});
if strcmp(blk, 'Outport') || strcmp(blk, 'Inport'),
force_include = {force_include{:}, 'Port'};
end %if
else,
clog(['including/excluding parameters for unknown block ''',blk,''''], {'mdl2m_debug', 'filter_dialog_parameters_debug'});
%don't know so include everything
force_exclude = {}; force_include = {};
end %if
include_str = [''];
for index = 1:length(force_include),
if index ~= 1, include_str = [include_str, ', ']; end
include_str = [include_str, '''', force_include{index}, ''''];
end
clog(['required parameters for block ''',blk,''': {',include_str,'}'], {'mdl2m_debug', 'filter_dialog_parameters_debug'});
exclude_str = [''];
for index = 1:length(force_exclude),
if index ~= 1, exclude_str = [exclude_str, ', ']; end
exclude_str = [exclude_str, '''', force_exclude{index}, ''''];
end
clog(['unnecessary parameters for block ''',blk,''': {',exclude_str,'}'], {'mdl2m_debug', 'filter_dialog_parameters_debug'});
end %filter_dialog_parameters
%add block generation logic
function gen_blocks(varargin)
defaults = {};
blks = get_var('blks', 'defaults', defaults, varargin{:});
fp = get_var('file', 'defaults', defaults, varargin{:});
%generate functions for blocks that require it
for index = 1:length(blks),
blk = blks{index};
name = get_param(blk, 'Name');
bt = get_param(blk, 'BlockType'); %block type
sls = get_param(blk, 'StaticLinkStatus'); %library block or not (and does not update out-of-date linked blocks)
% need to generate logic for non-library blocks that are subsystems
if (strcmp(sls, 'none') || strcmp(sls, 'implicit')) && strcmp(bt, 'SubSystem'),
clog(['appending generation functions for ',blk],{'gen_blocks_debug','mdl2m_debug'});
blk2m(blk, 'file', fp); %append generation functions to same file
else,
%do nothing as don't need to generate this block
end
end %for
end %gen_blocks
%logic to generate lines for system
function add_line(line, fp)
%determine line parameters
branches = get_line_parameters([], line);
%sanity check
if isempty(branches),
srcport = line.SrcPort; srcblk = line.SrcBlock;
clog(['Error determining parameters for line starting at ',get(srcblk,'Name'),'/',num2str(srcport)], {'error', 'mdl2m_debug', 'add_line_debug'});
error(['Error determining parameters for line starting at ',get(srcblk,'Name'),'/',num2str(srcport)]);
else,
for branch_index = 1:length(branches),
branch = branches(branch_index);
srcblk = branch.SrcBlock; srcport = branch.SrcPort;
destblk = branch.DstBlock; destport = branch.DstPort;
points = branch.Points;
% fprintf(fp, '\t%% %s/%s -> %s/%s\n', srcblk, srcport, destblk, destport);
% fprintf(fp, '\tadd_line(blk,%s);\n',mat2str(points));
fprintf(fp, '\tadd_line(blk,''%s/%s'',''%s/%s'', ''autorouting'', ''on'');\n', srcblk, srcport, destblk, destport);
end %for
end %if
end %add_line
function[params] = get_line_parameters(src, line)
params = [];
srcport = line.SrcPort; srcblk = get(line.SrcBlock,'Name');
dstport = line.DstPort; dstblk = get(line.DstBlock,'Name');
points = line.Points;
%if we have a source block then a line starts here
if ~isempty(srcblk),
clog(['line commencement at ',srcblk,'/',srcport,' found'], {'mdl2m_debug', 'get_line_parameters_debug'});
%otherwise use passed in parameters
else,
if ~isempty(src),
srcport = src.SrcPort; srcblk = src.SrcBlock;
else,
clog(['sanity error: empty source block and no src info passed in'], {'error', 'mdl2m_debug', 'get_line_parameters_debug'});
error(['sanity error: empty source block and no src info passed in']);
end
end %if
dst.SrcPort = srcport; dst.SrcBlock = srcblk;
dst.DstPort = dstport; dst.DstBlock = dstblk;
if ~isempty(src),
dst.Points = [src.Points; points];
else
dst.Points = points;
end
%if we have a destination then this line terminates
if ~isempty(dstblk),
params = [dst];
clog(['line termination at ',dstblk,'/',dstport,' found'], {'mdl2m_debug', 'get_line_parameters_debug'});
return;
%otherwise this line has one or more branches
else,
branches = line.Branch;
clog([num2str(length(branches)), ' branches found'], {'mdl2m_debug', 'get_line_parameters_debug'});
for branch_index = 1:length(branches),
branch = branches(branch_index);
branch_params = get_line_parameters(dst, branch);
params = [params; branch_params];
end %for
end %if
end %get_line_parameters
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% block generation functions %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%generates functions that will set up the mask etc of the block
function blk2m(blk, varargin)
defaults = { ...
'filename', [get_param(blk,'Name'),'_gen'], ... %filename for generator script
'mode', 'a', ... %mode to open file ('a'-append, 'w'-overwrite)
};
fn = get_var('filename', 'defaults', defaults, varargin{:});
m = get_var('mode', 'defaults', defaults, varargin{:});
fp = get_var('file', 'defaults', defaults, varargin{:});
%%%%%%%%%%%%%
% open file %
%%%%%%%%%%%%%
%open file if no file pointer
if fp == NaN,
ntc = 1; %remember that we need to close
clog(['opening ',fn],'blk2m_debug');
fp_init = fopen([fn,'.m'],m);
if fp == -1,
clog(['error opening ',fn, ' in mode ''',m,''''],{'mdl2m_debug', 'blk2m_debug', 'error'});
return
end %if
else,
ntc = 0;
end %if
name = get_param(blk, 'Name');
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% block generation function %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
clog(['block generation function for ',name],{'mdl2m_debug', 'blk2m_debug'});
blk_gen(blk, fp);
%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% mask generation function %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%
clog(['mask generation function for ',name],{'mdl2m_debug', 'blk2m_debug'});
mask_gen(blk, fp);
%%%%%%%%%%%%%%%%%
% init function %
%%%%%%%%%%%%%%%%%
clog(['init function for ',name],{'mdl2m_debug', 'blk2m_debug', 'error'});
mdl2m(blk, 'file', fp, 'subsystem', 'on'); %call generation logic to generate init
%%%%%%%%%%%%%%
% close file %
%%%%%%%%%%%%%%
if ntc == 1,
result = fclose(fp);
if result ~= 0, clog(['error closing file ',fn],{'blk2m_debug', 'mdl2m_debug', 'error'}); end
% Make sure other's can overwrite so we can share mlib_devel working
% copy between users.
fileattrib([fn,'.m'], '+w');
end %if
end %blk2m
%generate function that calls other functions to generate block
function blk_gen(blk, file)
name = get_param(blk, 'Name');
%initialise block generator function
clog(['adding block generation function for ',name],{'mdl2m_debug', 'blk_gen_debug'});
%setup function
fprintf(file,'function %s_gen(blk)\n',name);
fprintf(file, '\n');
fprintf(file, '\t%s_mask(blk);\n',name); %logic to generate the mask
fprintf(file, '\t%s_init(blk);\n',name); %logic to generate the internal logic
params = get_params(blk, {'MaskInitialization'});
set_params(file, 'blk', params, 'no_empty');
fprintf(file, '\n');
%finalising
clog(['finalising block generator function'],{'mdl2m_debug','blk_gen_debug'});
fprintf(file, 'end %% %s_gen\n\n',name);
end %blk_gen
%generate logic to generate block mask
function mask_gen(blk, file)
mask_params = ...
{ ...
'Mask', ... %is the block masked
'MaskSelfModifiable', ... %whether library blocks can modify themselves
...% 'MaskInitialization', ... %initialization commands
'MaskType', ... %library block or not
'MaskDescription', ... %description of block
'MaskHelp', ... %help for block
'MaskPromptString', ... %prompts for parameters
'MaskStyleString', ... %type of parameters
'MaskTabNameString', ... %tab names for parameters
'MaskCallbackString', ... %callback commands for parameters
'MaskEnableString', ... %whether parameters are enabled
'MaskVisibilityString', ... %whether parameters are visible
'MaskToolTipString', ... %tips for parameters
'MaskVariables', ... %variable names attached to parameters
'MaskValueString', ... %values attached to parameters
'BackgroundColor', ... %background colour of block
'MaskDisplay', ... %appearance of block
'Tag', ... %the block tag
};
params = get_params(blk, mask_params);
if mod(length(params),2) ~= 0,
clog(['parameters must be ''name'', value pairs'],{'mdl2m_debug','mask_gen_debug','error'});
return;
end
blk_name = get_param(blk, 'Name');
%initialise mask generator function
clog(['adding mask function for ',blk_name],{'mask_gen_debug','mdl2m_debug'});
%setup function
fprintf(file,'function %s_mask(blk)\n',blk_name);
fprintf(file, '\n');
%set up mask parameters
set_params(file, 'blk', params, 'no_empty');
fprintf(file, '\n');
%finalising
clog(['finalising mask generation function'],{'mask_gen_debug', 'mdl2m_debug'});
fprintf(file, 'end %% %s_mask\n\n',blk_name);
end %mask_gen
%%%%%%%%%%%%%%%%%%%%
% helper functions %
%%%%%%%%%%%%%%%%%%%%
%add logic to set up parameters
%strategy can be 'all' or 'no_empty'
function set_params(fp, target, params, strategy)
if mod(length(params),2) ~= 0,
clog(['parameters must be ''name'', value pairs'],{'error', 'set_params_debug', 'mdl2m_debug'});
return;
end
init = 0;
for index = 1:2:length(params),
clog(['processing ',params{index}],{'set_params_debug', 'mdl2m_debug'});
value = params{index+1};
name = params{index};
if strcmp(strategy, 'all') || (~isempty(value) && strcmp(strategy, 'no_empty')),
[value_s, result] = to_string(value);
if (result ~= 0),
clog(['error while converting ',name,' to string'],{'set_params_debug', 'mdl2m_debug', 'error'});
return;
end
%start the function call if we have something
if (init == 0),
fprintf(fp, '\tset_param(%s',target);
init = 1;
end
fprintf(fp, ', ...\n\t\t''%s'', sprintf(''%s'')', name, value_s);
else,
clog(['skipping ',name],{'set_params_debug', 'mdl2m_debug'});
end
end
%close the function call if we started
if (init == 1), fprintf(fp, ');\n'); end
end %set_params
%determine values of all mask parameters we care about when generating a block
function[params] = get_params(target, required_params)
params = {};
for param_index = 1:length(required_params),
param = required_params{param_index};
clog(['getting ',param],{'get_params_debug', 'mdl2m_debug'});
value = get_param(target, param);
params = {params{:}, param, value};
end %for
end %get_params
% converts items into strings that can be used to generate other strings
function[output, result] = to_string(var)
result = -1;
output = '';
if isempty(var),
result = 0;
return;
end
% if a cell array then iteratively convert
if isa(var, 'cell'),
[r,c] = size(var);
output = '{';
for row_index = 1:r,
for col_index = 1:c,
[sub, result] = to_string(var{row_index,col_index});
if result == -1,
return;
end
if c > 1, output = [output, ','];
end
end %col
if r > 1, output = [output, ';'];
end
end %row
output = [output,'}'];
elseif isa(var, 'numeric'),
output = ['',mat2str(var),''];
result = 0;
elseif isa(var, 'char'),
var = regexprep(var, '''', ''''''); %make quotes double
var = regexprep(var, '\n', '\\n'); %escape new lines
var = regexprep(var, '%', '%%'); %escape percentage symbols
output = ['',var,''];
result = 0;
else
clog(['don''t know how to convert variable of class ',class(var),' to string'], 'error');
end
end %to_string
|
github
|
mstrader/mlib_devel-master
|
fir_tap_async_init.m
|
.m
|
mlib_devel-master/casper_library/fir_tap_async_init.m
| 6,431 |
utf_8
|
329f21d0e0b37dced1f66aa7235f550b
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% MeerKAT Radio Telescope Project %
% www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens (meerKAT) %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function fir_tap_async_init(blk)
clog('entering fir_tap_async_init', 'trace');
varargin = make_varargin(blk);
defaults = {};
check_mask_type(blk, 'fir_tap_async');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('fir_tap_async_init post same_state', 'trace');
munge_block(blk, varargin{:});
% factor = get_var('factor','defaults', defaults, varargin{:});
% mult_latency = get_var('mult_latency','defaults', defaults, varargin{:});
coeff_bit_width = get_var('coeff_bit_width','defaults', defaults, varargin{:});
% coeff_bin_pt = get_var('coeff_bin_pt','defaults', defaults, varargin{:});
async_ops = strcmp('on', get_var('async','defaults', defaults, varargin{:}));
double_blk = strcmp('on', get_var('dbl','defaults', defaults, varargin{:}));
% hand off to the double script if this is a doubled-up FIR
if double_blk,
fir_dbl_tap_async_init(blk);
return;
end
delete_lines(blk);
% default state in library
if coeff_bit_width == 0,
clog('fir_tap_async_init saving library state', 'trace');
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
return;
end
% inputs
reuse_block(blk, 'a', 'built-in/Inport', 'Port', '1', ...
'Position', '[205 68 235 82]');
reuse_block(blk, 'b', 'built-in/Inport', 'Port', '2', ...
'Position', '[205 158 235 172]');
if async_ops,
reuse_block(blk, 'dv_in', 'built-in/Inport', 'Port', '3', ...
'Position', '[205 0 235 14]');
end
reuse_block(blk, 'Constant', 'xbsIndex_r4/Constant', ...
'const', 'factor', ...
'n_bits', 'coeff_bit_width', ...
'bin_pt', 'coeff_bin_pt', ...
'explicit_period', 'on', ...
'Position', '[25 36 150 64]');
reuse_block(blk, 'Mult0', 'xbsIndex_r4/Mult', ...
'n_bits', '18', ...
'bin_pt', '17', ...
'latency', 'mult_latency', ...
'use_behavioral_HDL', 'on', ...
'use_rpm', 'off', ...
'placement_style', 'Rectangular shape', ...
'Position', '[280 37 330 88]');
reuse_block(blk, 'Mult1', 'xbsIndex_r4/Mult', ...
'n_bits', '18', ...
'bin_pt', '17', ...
'latency', 'mult_latency', ...
'use_behavioral_HDL', 'on', ...
'use_rpm', 'off', ...
'placement_style', 'Rectangular shape', ...
'Position', '[280 127 330 178]');
reuse_block(blk, 'Register0', 'xbsIndex_r4/Register', ...
'Position', '[410 86 455 134]');
reuse_block(blk, 'Register1', 'xbsIndex_r4/Register', ...
'Position', '[410 181 455 229]');
if async_ops,
set_param([blk, '/Register0'], 'en', 'on');
set_param([blk, '/Register1'], 'en', 'on');
else
set_param([blk, '/Register0'], 'en', 'off');
set_param([blk, '/Register1'], 'en', 'off');
end
reuse_block(blk, 'a_out', 'built-in/Outport', ...
'Port', '1', ...
'Position', '[495 103 525 117]');
reuse_block(blk, 'b_out', 'built-in/Outport', ...
'Port', '2', ...
'Position', '[495 198 525 212]');
reuse_block(blk, 'real', 'built-in/Outport', ...
'Port', '3', ...
'Position', '[355 58 385 72]');
reuse_block(blk, 'imag', 'built-in/Outport', ...
'Port', '4', ...
'Position', '[355 148 385 162]');
if async_ops,
add_line(blk, 'dv_in/1', 'Register0/2', 'autorouting', 'on');
add_line(blk, 'dv_in/1', 'Register1/2', 'autorouting', 'on');
end
add_line(blk,'b/1','Mult1/2', 'autorouting', 'on');
add_line(blk,'b/1','Register1/1', 'autorouting', 'on');
add_line(blk,'a/1','Mult0/2', 'autorouting', 'on');
add_line(blk,'a/1','Register0/1', 'autorouting', 'on');
add_line(blk,'Constant/1','Mult1/1', 'autorouting', 'on');
add_line(blk,'Constant/1','Mult0/1', 'autorouting', 'on');
add_line(blk,'Mult0/1','real/1', 'autorouting', 'on');
add_line(blk,'Mult1/1','imag/1', 'autorouting', 'on');
add_line(blk,'Register0/1','a_out/1', 'autorouting', 'on');
add_line(blk,'Register1/1','b_out/1', 'autorouting', 'on');
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting fir_tap_async_init', 'trace');
end % fir_tap_async_init
|
github
|
mstrader/mlib_devel-master
|
fir_dbl_col_async_init.m
|
.m
|
mlib_devel-master/casper_library/fir_dbl_col_async_init.m
| 15,223 |
utf_8
|
8490f221752a9908a2c844ae5827d275
|
% fir_dbl_col_init(blk, varargin)
%
% blk = The block to initialize.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% n_inputs = The number of parallel input samples.
% coeff = The FIR coefficients, top-to-bottom.
% add_latency = The latency of adders.
% mult_latency = The latency of multipliers.
% coeff_bit_width = The number of bits used for coefficients
% coeff_bin_pt = The number of fractional bits in the coefficients
% first_stage_hdl = Whether to implement the first stage in adder trees
% as behavioral HDL so that adders are absorbed into DSP slices used for
% multipliers where this is possible.
% adder_imp = adder implementation (Fabric, behavioral HDL, DSP48)
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function fir_dbl_col_async_init(blk, varargin)
clog('entering fir_dbl_col_async_init', 'trace');
showname = 'on';
sizey_goto = 15;
% varargin = make_varargin(blk);
%
% % declare any default values for arguments you might like.
% defaults = {'n_inputs', 0, 'coeff', 0.1, 'add_latency', 2, ...
% 'mult_latency', 3, 'coeff_bit_width', 25, 'coeff_bin_pt', 24, ...
% 'first_stage_hdl', 'off', 'adder_imp', 'Fabric', 'async', 'off', ...
% 'bus_input', 'off', 'dbl', 'off', 'input_width', 16, ...
% 'input_bp', 0, 'input_type', 'Unsigned'};
%
% check_mask_type(blk, 'fir_col_async');
% if same_state(blk, 'defaults', defaults, varargin{:}), return, end
% clog('fir_dbl_col_async_init post same_state', 'trace');
% munge_block(blk, varargin{:});
% n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
% coeff = get_var('coeff', 'defaults', defaults, varargin{:});
% add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
% mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
% coeff_bit_width = get_var('coeff_bit_width', 'defaults', defaults, varargin{:});
% coeff_bin_pt = get_var('coeff_bin_pt', 'defaults', defaults, varargin{:});
% first_stage_hdl = get_var('first_stage_hdl', 'defaults', defaults, varargin{:});
% adder_imp = get_var('adder_imp', 'defaults', defaults, varargin{:});
% async_ops = strcmp('on', get_var('async', 'defaults', defaults, varargin{:}));
% bus_input = strcmp('on', get_var('bus_input', 'defaults', defaults, varargin{:}));
% double_blk = strcmp('on', get_var('dbl', 'defaults', defaults, varargin{:}));
n_inputs = get_var('n_inputs', varargin{:});
coeff = get_var('coeff', varargin{:});
add_latency = get_var('add_latency', varargin{:});
mult_latency = get_var('mult_latency', varargin{:});
coeff_bit_width = get_var('coeff_bit_width', varargin{:});
coeff_bin_pt = get_var('coeff_bin_pt', varargin{:});
first_stage_hdl = get_var('first_stage_hdl', varargin{:});
adder_imp = get_var('adder_imp', varargin{:});
async_ops = strcmp('on', get_var('async', varargin{:}));
bus_input = strcmp('on', get_var('bus_input', varargin{:}));
double_blk = strcmp('on', get_var('dbl', varargin{:}));
% async_ops = false;
% bus_input = false;
% double_blk = false;
% this should be a double block
if ~double_blk,
error('This script should only be called on a doubled-up tap block.');
end
if bus_input,
input_width = get_var('input_width',varargin{:});
input_bp = get_var('input_bp',varargin{:});
input_type = get_var('input_type',varargin{:});
if strcmp(input_type, 'Signed'),
input_type_num = 1;
else
input_type_num = 0;
end
end
delete_lines(blk);
% % default library state
% if n_inputs == 0,
% clog('fir_dbl_col_async_init no inputs', 'trace');
% clean_blocks(blk);
% save_state(blk, 'defaults', defaults, varargin{:});
% clog('exiting fir_dbl_col_async_init', 'trace');
% return;
% end
if length(coeff) ~= n_inputs,
clog('number of coefficients must be the same as the number of inputs', {'fir_dbl_col_async_init_debug', 'error'});
error('number of coefficients must be the same as the number of inputs');
end
% draw the inputs differently depending on whether we're taking a bus input or not
if bus_input,
reuse_block(blk, 'dbus_in', 'built-in/inport', 'Position', [0 30 30 46], 'Port', '1');
reuse_block(blk, 'inbus', 'casper_library_flow_control/bus_expand', ...
'Position', [80 30 150 30+(n_inputs*sizey_goto*3)]);
set_param([blk, '/inbus'], ...
'mode', 'divisions of equal size', ...
'outputNum', num2str(2*n_inputs), ...
'outputWidth', num2str(input_width), ...
'outputBinaryPt', num2str(input_bp), ...
'outputArithmeticType', num2str(input_type_num), ...
'show_format', 'off', ...
'outputToWorkspace', 'off');
add_line(blk, 'dbus_in/1', 'inbus/1');
reuse_block(blk, 'dbus_back_in', 'built-in/inport', 'Position', [0 500 30 516], 'Port', '2');
reuse_block(blk, 'inbus_back', 'casper_library_flow_control/bus_expand', ...
'Position', [80 500 150 500+(n_inputs*sizey_goto*3)]);
set_param([blk, '/inbus_back'], ...
'mode', 'divisions of equal size', ...
'outputNum', num2str(2*n_inputs), ...
'outputWidth', num2str(input_width), ...
'outputBinaryPt', num2str(input_bp), ...
'outputArithmeticType', num2str(input_type_num), ...
'show_format', 'off', ...
'outputToWorkspace', 'off');
add_line(blk, 'dbus_back_in/1', 'inbus_back/1');
port_num = 3;
else
port_num = 1;
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
reuse_block(blk, ['real', ctrstr], 'built-in/inport', ...
'Position', [30 ctr*80 60 15+80*ctr], ...
'Port', num2str(port_num));
reuse_block(blk, ['imag', ctrstr], 'built-in/inport', ...
'Position', [30 ctr*80+30 60 45+80*ctr], ...
'Port', num2str(port_num+1));
port_num = port_num + 2;
end
offset = n_inputs*50*2;
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
reuse_block(blk, ['real_back', ctrstr], 'built-in/inport', ...
'Position', [30 offset+ctr*80 60 offset+15+80*ctr], ...
'Port', num2str(port_num));
reuse_block(blk, ['imag_back', ctrstr], 'built-in/inport', ...
'Position', [30 offset+ctr*80+30 60 offset+45+80*ctr], ...
'Port', num2str(port_num+1));
port_num = port_num + 2;
end
end
if async_ops,
reuse_block(blk, 'dv', 'built-in/inport', 'Position', [0 0 30 16]);
set_param([blk, '/dv'], 'Port', num2str(port_num));
reuse_block(blk, 'dv_in', 'built-in/goto', ...
'GotoTag', 'dv_in', 'showname', showname, ...
'Position', [50 0 120 16]);
add_line(blk, 'dv/1', 'dv_in/1');
end
% tap blocks and connections to the inputs
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
blkname = ['fir_tap', ctrstr];
full_blkname = [blk, '/', blkname];
tap_ypos = ctr*160 - 160;
reuse_block(blk, blkname, 'casper_library_downconverter/fir_tap_async', ...
'Position', [400 tap_ypos 470 tap_ypos+120], ...
'add_latency', num2str(add_latency), ...
'mult_latency', num2str(mult_latency), ...
'factor', num2str(coeff(ctr)), ...
'coeff_bit_width', num2str(coeff_bit_width), ...
'coeff_bin_pt', num2str(coeff_bin_pt), 'dbl', 'on');
if async_ops,
set_param(full_blkname, 'async', 'on');
else
set_param(full_blkname, 'async', 'off');
end
% connection to inputs
if async_ops,
reuse_block(blk, ['dv_in', ctrstr], 'built-in/from', 'GotoTag', 'dv_in', 'showname', showname, 'Position', [280 tap_ypos+104 360 tap_ypos+120]);
if double_blk,
add_line(blk, ['dv_in', ctrstr, '/1'], [blkname, '/5']);
else
add_line(blk, ['dv_in', ctrstr, '/1'], [blkname, '/3']);
end
end
if bus_input,
pos = ((ctr-1)*2)+1;
add_line(blk, ['inbus/', num2str(pos+0)], [blkname, '/1']);
add_line(blk, ['inbus/', num2str(pos+1)], [blkname, '/2']);
add_line(blk, ['inbus_back/', num2str(n_inputs*2-pos)], [blkname, '/3']);
add_line(blk, ['inbus_back/', num2str(n_inputs*2-pos+1)], [blkname, '/4']);
else
add_line(blk, ['real', ctrstr, '/1'], [blkname, '/1']);
add_line(blk, ['imag', ctrstr, '/1'], [blkname, '/2']);
add_line(blk, ['real_back', num2str(n_inputs-ctr+1), '/1'], [blkname, '/3']);
add_line(blk, ['imag_back', num2str(n_inputs-ctr+1), '/1'], [blkname, '/4']);
end
end
% output ports
if bus_input,
reuse_block(blk, 'outbus', 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(n_inputs*2), ...
'Position', [600 30 650 30+(n_inputs*sizey_goto*3)]);
reuse_block(blk, 'dbus_out', 'built-in/outport', 'Position', [700 30 730 46], 'Port', '1');
add_line(blk, 'outbus/1', 'dbus_out/1');
reuse_block(blk, 'outbus_back', 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(n_inputs*2), ...
'Position', [600 500 650 500+(n_inputs*sizey_goto*3)]);
reuse_block(blk, 'dbus_back_out', 'built-in/outport', 'Position', [700 500 730 516], 'Port', '2');
add_line(blk, 'outbus_back/1', 'dbus_back_out/1');
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
tapname = ['fir_tap', ctrstr];
pos = ((ctr-1)*2)+1;
add_line(blk, [tapname, '/1'], ['outbus/', num2str(pos+0)]);
add_line(blk, [tapname, '/2'], ['outbus/', num2str(pos+1)]);
add_line(blk, [tapname, '/3'], ['outbus_back/', num2str(n_inputs*2-pos)]);
add_line(blk, [tapname, '/4'], ['outbus_back/', num2str(n_inputs*2-pos+1)]);
end
else
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
reuse_block(blk, ['real_out', ctrstr], 'built-in/outport', 'Position', [550 ctr*80 580 15+80*ctr], 'Port', num2str(ctr*2-1));
reuse_block(blk, ['imag_out', ctrstr], 'built-in/outport', 'Position', [550 ctr*80+30 580 45+80*ctr], 'Port', num2str(ctr*2));
end
offset = n_inputs*50*2;
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
reuse_block(blk, ['real_back_out', ctrstr], 'built-in/outport', 'Position', [550 offset+ctr*80 580 offset+15+80*ctr], 'Port', num2str(ctr*2-1+n_inputs*2));
reuse_block(blk, ['imag_back_out', ctrstr], 'built-in/outport', 'Position', [550 offset+ctr*80+30 580 offset+45+80*ctr], 'Port', num2str(ctr*2+n_inputs*2));
end
for ctr = 1 : n_inputs,
ctrstr = num2str(ctr);
blkname = ['fir_tap', ctrstr];
add_line(blk, [blkname, '/1'], ['real_out', ctrstr,'/1']);
add_line(blk, [blkname, '/2'], ['imag_out', ctrstr,'/1']);
add_line(blk, [blkname, '/3'], ['real_back_out', num2str(n_inputs+1-ctr),'/1']);
add_line(blk, [blkname, '/4'], ['imag_back_out', num2str(n_inputs+1-ctr),'/1']);
end
end
% the output sum blocks
if bus_input,
reuse_block(blk, 'real_sum', 'built-in/outport', 'Position', [900 100+20*n_inputs 930 116+20*n_inputs], 'Port', '3');
reuse_block(blk, 'imag_sum', 'built-in/outport', 'Position', [900 200+20*n_inputs 930 216+20*n_inputs], 'Port', '4');
else
reuse_block(blk, 'real_sum', 'built-in/outport', 'Position', [900 100+20*n_inputs 930 116+20*n_inputs], 'Port', num2str(n_inputs*4+1));
reuse_block(blk, 'imag_sum', 'built-in/outport', 'Position', [900 200+20*n_inputs 930 216+20*n_inputs], 'Port', num2str(n_inputs*4+2));
end
% the adder trees
if n_inputs > 1,
reuse_block(blk, 'adder_tree1', 'casper_library_misc/adder_tree', ...
'Position', [800 100 850 100+20*n_inputs], 'n_inputs', num2str(n_inputs),...
'latency', num2str(add_latency), 'first_stage_hdl', first_stage_hdl, 'adder_imp', adder_imp);
reuse_block(blk, 'adder_tree2', 'casper_library_misc/adder_tree', ...
'Position', [800 200+20*n_inputs 850 200+20*n_inputs+20*n_inputs], 'n_inputs', num2str(n_inputs),...
'latency', num2str(add_latency), 'first_stage_hdl', first_stage_hdl, 'adder_imp', adder_imp);
reuse_block(blk, 'c1', 'xbsIndex_r4/Constant', ...
'explicit_period', 'on', 'Position', [750 100 780 110]);
reuse_block(blk, 'c2', 'xbsIndex_r4/Constant', ...
'explicit_period', 'on', 'Position', [750 200+20*n_inputs 780 210+20*n_inputs]);
reuse_block(blk, 'term1','built-in/Terminator', 'Position', [1000 100 1015 115]);
add_line(blk, 'adder_tree1/1', 'term1/1');
reuse_block(blk, 'term2','built-in/Terminator', 'Position', [1000 200+20*n_inputs 1015 215+20*n_inputs]);
add_line(blk, 'adder_tree2/1', 'term2/1');
add_line(blk, 'c1/1', 'adder_tree1/1');
add_line(blk, 'c2/1', 'adder_tree2/1');
add_line(blk,'adder_tree1/2','real_sum/1');
add_line(blk,'adder_tree2/2','imag_sum/1');
for ctr=1:n_inputs,
add_line(blk, ['fir_tap', num2str(ctr), '/5'], ['adder_tree1/', num2str(ctr+1)]);
add_line(blk, ['fir_tap', num2str(ctr), '/6'], ['adder_tree2/', num2str(ctr+1)]);
end
else
add_line(blk, 'fir_tap1/5', 'real_sum/1');
add_line(blk, 'fir_tap1/6', 'imag_sum/1');
end
% When finished drawing blocks and lines, remove all unused blocks.
% clean_blocks(blk);
% save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting fir_dbl_col_async_init', 'trace');
|
github
|
mstrader/mlib_devel-master
|
pfb_fir_real_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_fir_real_init.m
| 17,083 |
utf_8
|
081d3ad0b9f353455f4b0251083d0c83
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_fir_real_init(blk, varargin)
% Initialize and configure the Real Polyphase Filter Bank.
%
% pfb_fir_real_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% PFBSize = The size of the PFB
% TotalTaps = Total number of taps in the PFB
% WindowType = The type of windowing function to use.
% n_inputs = The number of parallel inputs
% MakeBiplex = Double up the PFB to feed a biplex FFT
% BitWidthIn = Input Bitwidth
% BitWidthOut = Output Bitwidth (0 == as needed)
% CoeffBitWidth = Bitwidth of Coefficients.
% CoeffDistMem = Implement coefficients in distributed memory
% add_latency = Latency through each adder.
% mult_latency = Latency through each multiplier
% bram_latency = Latency through each BRAM.
% conv_latency = Latency through the convert (cast) blocks. Essential if you're doing saturate/rouding logic.
% quantization = 'Truncate', 'Round (unbiased: +/- Inf)', or 'Round
% (unbiased: Even Values)'
% fwidth = Scaling of the width of each PFB channel
% coeffs_share = Both polarizations will share coefficients.
clog('entering pfb_fir_real_init','trace');
% Declare any default values for arguments you might like.
defaults = {'PFBSize', 5, 'TotalTaps', 2, ...
'WindowType', 'hamming', 'n_inputs', 1, 'MakeBiplex', 'off', ...
'BitWidthIn', 8, 'BitWidthOut', 0, 'CoeffBitWidth', 18, ...
'CoeffDistMem', 'off', 'add_latency', 1, 'mult_latency', 2, ...
'bram_latency', 2, 'conv_latency', 1, ...
'quantization', 'Round (unbiased: +/- Inf)', ...
'fwidth', 1, 'mult_spec', [2 2], ...
'adder_folding', 'on', 'adder_imp', 'Fabric', ...
'coeffs_share', 'off', 'coeffs_fold', 'off'};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('pfb_fir_real_init post same_state','trace');
check_mask_type(blk, 'pfb_fir_real');
munge_block(blk, varargin{:});
PFBSize = get_var('PFBSize', 'defaults', defaults, varargin{:});
TotalTaps = get_var('TotalTaps', 'defaults', defaults, varargin{:});
WindowType = get_var('WindowType', 'defaults', defaults, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
MakeBiplex = get_var('MakeBiplex', 'defaults', defaults, varargin{:});
BitWidthIn = get_var('BitWidthIn', 'defaults', defaults, varargin{:});
BitWidthOut = get_var('BitWidthOut', 'defaults', defaults, varargin{:});
CoeffBitWidth = get_var('CoeffBitWidth', 'defaults', defaults, varargin{:});
CoeffDistMem = get_var('CoeffDistMem', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
fan_latency = get_var('fan_latency', 'defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency', 'defaults', defaults, varargin{:});
conv_latency = get_var('conv_latency', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
fwidth = get_var('fwidth', 'defaults', defaults, varargin{:});
mult_spec = get_var('mult_spec', 'defaults', defaults, varargin{:});
adder_folding = get_var('adder_folding', 'defaults', defaults, varargin{:});
adder_imp = get_var('adder_imp', 'defaults', defaults, varargin{:});
coeffs_share = get_var('coeffs_share', 'defaults', defaults, varargin{:});
% check the multiplier specifications first off
tap_multipliers = multiplier_specification(mult_spec, TotalTaps, blk);
% share coeffs in a 2-pol setup?
pols = 1;
share_coefficients = false;
if strcmp(MakeBiplex, 'on'),
pols = 2;
if strcmp(coeffs_share, 'on')
share_coefficients = true;
end
end
% Compute the maximum gain through all of the 2^PFBSize sub-filters. This is
% used to determine how much bit growth is really needed. The gain of each
% filter is the sum of the absolute values of its coefficients. The maximum of
% these gains sets the upper bound on bit growth through the pfb_fir. The
% products, partial sums, and final sum throughout the pfb_fir (including the
% adder tree) need not accomodate any more bit growth than the absolute maximum
% gain requires, provided that any "overflow" is ignored (i.e. set to "Wrap").
% This works thanks to the wonders of modulo math. Note that the "gain" for
% typical signals will be different (less) than the absolute maximum gain of
% each filter. For Gaussian noise, the gain of a filter is the square root of
% the sum of the squares of the coefficients (aka root-sum-squares or RSS).
% Get all coefficients of the pfb_fir in one vector (by passing -1 for a)
all_coeffs = pfb_coeff_gen_calc(PFBSize, TotalTaps, WindowType, n_inputs, 0, fwidth, -1, false);
% Rearrange into matrix with 2^PFBSize rows and TotalTaps columns.
% Each row contains coefficients for one sub-filter.
all_filters = reshape(all_coeffs, 2^PFBSize, TotalTaps);
% Compute max gain (make sure it is at least 1).
% NB: sum rows, not columns!
max_gain = max(sum(abs(all_filters), 2));
if max_gain < 1; max_gain = 1; end
% Compute bit growth
bit_growth = nextpow2(max_gain);
% Compute adder output width and binary point. We know that the adders in the
% adder tree need to have (bit_growth+1) non-fractional bits to accommodate the
% maximum gain. The products from the taps will have
% (BitWidthIn+CoeffBitWidth-2) fractional bits. We will preserve them through
% the adder tree.
adder_bin_pt_out = BitWidthIn+CoeffBitWidth-2;
adder_n_bits_out = bit_growth + 1 + adder_bin_pt_out;
% If BitWidthOut is 0, set it to accomodate bit growth in the
% non-fractional part and full-precision of the fractional part.
if BitWidthOut == 0
BitWidthOut = adder_n_bits_out;
end
delete_lines(blk);
% Add ports
clog('adding inports and outports','pfb_fir_real_init_debug');
portnum = 1;
reuse_block(blk, 'sync', 'built-in/inport', ...
'Position', [0 50 30 50+15], 'Port', num2str(portnum));
reuse_block(blk, 'sync_out', 'built-in/outport', ...
'Position', [150*(TotalTaps+5) 50*portnum*TotalTaps 150*(TotalTaps+5)+30 50*portnum*TotalTaps+15], 'Port', num2str(portnum));
for p=1:pols,
for n=1:2^n_inputs,
portnum = portnum + 1; % Skip one to allow sync & sync_out to be 1
in_name = ['pol',tostring(p),'_in',tostring(n)];
out_name = ['pol',tostring(p),'_out',tostring(n)];
reuse_block(blk, in_name, 'built-in/inport', ...
'Position', [0 50*portnum*TotalTaps 30 50*portnum*TotalTaps+15], 'Port', tostring(portnum));
reuse_block(blk, out_name, 'built-in/outport', ...
'Position', [150*(TotalTaps+5) 50*portnum*TotalTaps 150*(TotalTaps+5)+30 50*portnum*TotalTaps+15], 'Port', tostring(portnum));
end
end
% Add blocks
portnum = 0;
for p=1:pols,
for n=1:2^n_inputs,
portnum = portnum + 1;
in_name = ['pol',num2str(p),'_in',num2str(n)];
% add the coefficient generators
if (p == 2) && (share_coefficients == true)
blk_name = [in_name,'_delay'];
reuse_block(blk, blk_name, 'xbsIndex_r4/Delay', ...
'latency', 'bram_latency+1+fan_latency', 'Position', [150 50*portnum*TotalTaps 150+100 50*portnum*TotalTaps+30]);
add_line(blk, [in_name,'/1'], [blk_name,'/1']);
else
blk_name = [in_name,'_coeffs'];
reuse_block(blk, blk_name, 'casper_library_pfbs/pfb_coeff_gen', ...
'nput', num2str(n-1), 'CoeffDistMem', CoeffDistMem, 'Position', [150 50*portnum*TotalTaps 150+100 50*portnum*TotalTaps+30]);
propagate_vars([blk,'/',blk_name], 'defaults', defaults, varargin{:});
add_line(blk, [in_name,'/1'], [blk_name,'/1']);
add_line(blk, 'sync/1', [blk_name,'/2']);
end
clog(['adding taps for pol ', num2str(p),' input ', num2str(n)],'pfb_fir_real_init_debug');
for t = 1:TotalTaps,
% first tap
if t==1,
blk_name = [in_name,'_first_tap'];
reuse_block(blk, blk_name, 'casper_library_pfbs/first_tap_real', ...
'use_hdl', tap_multipliers(t).use_hdl, 'use_embedded', tap_multipliers(t).use_embedded, ...
'Position', [150*(t+1) 50*portnum*TotalTaps 150*(t+1)+100 50*portnum*TotalTaps+30]);
propagate_vars([blk, '/', blk_name],'defaults', defaults, varargin{:});
if (p == 2) && (share_coefficients == true)
src_block = [strrep(in_name,'pol2','pol1'),'_coeffs'];
data_source = [in_name,'_delay/1'];
else
src_block = [in_name,'_coeffs'];
data_source = [src_block,'/1'];
end
add_line(blk, data_source, [blk_name,'/1']);
add_line(blk, 'pol1_in1_coeffs/2', [blk_name,'/2']);
add_line(blk, [src_block,'/3'], [blk_name,'/3']);
% last tap
elseif t==TotalTaps,
blk_name = [in_name,'_last_tap'];
reuse_block(blk, blk_name, 'casper_library_pfbs/last_tap_real', ...
'use_hdl', tap_multipliers(t).use_hdl, 'use_embedded', tap_multipliers(t).use_embedded, ...
'Position', [150*(t+1) 50*portnum*TotalTaps 150*(t+1)+100 50*portnum*TotalTaps+30]);
propagate_vars([blk, '/', blk_name],'defaults', defaults, varargin{:});
% intermediary taps
else
blk_name = [in_name,'_tap',tostring(t)];
reuse_block(blk, blk_name, 'casper_library_pfbs/tap_real', ...
'use_hdl', tap_multipliers(t).use_hdl, 'use_embedded', tap_multipliers(t).use_embedded, ...
'bram_latency', tostring(bram_latency), ...
'mult_latency', tostring(mult_latency), ...
'data_width', tostring(BitWidthIn), ...
'coeff_width', tostring(CoeffBitWidth), ...
'coeff_frac_width', tostring(CoeffBitWidth-1), ...
'delay', tostring(2^(PFBSize-n_inputs)), ...
'Position', [150*(t+1) 50*portnum*TotalTaps 150*(t+1)+100 50*portnum*TotalTaps+30]);
end
end
% add adder tree
clog(['adder tree, scale and convert blocks for pol ',num2str(p),' input ',num2str(n)],'pfb_fir_real_init_debug');
reuse_block(blk, ['adder_', tostring(p), '_' ,tostring(n)], 'casper_library_misc/adder_tree', ...
'n_inputs', tostring(TotalTaps), 'latency', tostring(add_latency), ...
'first_stage_hdl', adder_folding, 'adder_imp', adder_imp, ...
'Position', [150*(TotalTaps+2) 50*portnum*TotalTaps 150*(TotalTaps+2)+100 50*(portnum+1)*TotalTaps-20]);
% Update adder blocks in the adder tree using our knowledge of maximum
% bit growth.
adders = find_system([blk, '/adder_', tostring(p), '_' ,tostring(n)], ...
'LookUnderMasks','all', 'FollowLinks','on', ...
'SearchDepth',1, 'RegExp','on', 'Name','^addr');
for k=1:length(adders)
set_param(adders{k}, ...
'precision', 'User Defined', ...
'arith_type', 'Signed (2''s comp)', ...
'n_bits', tostring(adder_n_bits_out), ...
'bin_pt', tostring(adder_bin_pt_out), ...
'quantization', 'Truncate', ...
'overflow', 'Wrap');
end
% add shift, convert blocks
% Adder tree output has bit_growth more non-fractional bits than
% BitWidthIn, but we want to keep the same number of non-fractional
% bits, so we must scale by 2^(-bit_growth).
scale_factor = -bit_growth;
reuse_block(blk, ['scale_',tostring(p),'_',tostring(n)], 'xbsIndex_r4/Scale', ...
'scale_factor', tostring(scale_factor), ...
'Position', [150*(TotalTaps+3) 50*(portnum+1)*TotalTaps-50 150*(TotalTaps+3)+30 50*(portnum+1)*TotalTaps-25]);
% Because we have handled bit growth for maximum gain, there can be no
% overflow so it can be set to "Wrap" to avoid unnecessary logic. If
% BitWidthOut is greater than adder_bin_pt_out, set quantization to
% "Truncate" since there is no need to quantize.
if BitWidthOut > adder_bin_pt_out
quantization = 'Truncate';
end
reuse_block(blk, ['convert_', tostring(p),'_', tostring(n)], 'xbsIndex_r4/Convert', ...
'arith_type', 'Signed (2''s comp)', 'n_bits', tostring(BitWidthOut), ...
'bin_pt', tostring(BitWidthOut-1), 'quantization', quantization, ...
'overflow', 'Wrap', 'latency', tostring(add_latency), ...
'latency',tostring(conv_latency), 'pipeline', 'on', ...
'Position', [150*(TotalTaps+3)+60 50*(portnum+1)*TotalTaps-50 150*(TotalTaps+3)+90 50*(portnum+1)*TotalTaps-25]);
end
end
clog('joining in ports to blocks','pfb_fir_real_init_debug');
for p=1:pols,
for n=1:2^n_inputs,
out_name = ['pol',tostring(p),'_out',tostring(n)];
adder_name = ['adder_',tostring(p),'_',tostring(n)];
convert_name = ['convert_',tostring(p), '_',tostring(n)];
scale_name = ['scale_',tostring(p), '_',tostring(n)];
% sync gets a delay before it is output
if n==1 && p==1,
reuse_block(blk, 'delay1', 'xbsIndex_r4/Delay', ...
'latency', tostring(conv_latency), ...
'Position', [150*(TotalTaps+3)+60 50 150*(TotalTaps+3)+90 80]);
add_line(blk, [adder_name,'/1'], 'delay1/1');
add_line(blk, 'delay1/1', 'sync_out/1');
end
add_line(blk, [adder_name,'/2'], [scale_name,'/1']);
add_line(blk, [scale_name,'/1'], [convert_name,'/1']);
add_line(blk, [convert_name,'/1'], [out_name,'/1']);
end
end
% add other lines
clog('joining blocks to outports','pfb_fir_real_init_debug');
for p=1:pols,
for n=1:2^n_inputs,
adder_name = ['adder_',tostring(p),'_',tostring(n)];
for t=2:TotalTaps,
blk_name = ['pol',tostring(p),'_in',tostring(n),'_tap',tostring(t)];
if t == TotalTaps,
blk_name = ['pol',tostring(p),'_in',tostring(n),'_last_tap'];
add_line(blk, [blk_name,'/2'], [adder_name,'/1']);
add_line(blk, [blk_name,'/1'], [adder_name,'/',tostring(t+1)]);
end
if t==2,
prev_blk_name = ['pol',tostring(p),'_in',tostring(n),'_first_tap'];
else
prev_blk_name = ['pol',tostring(p),'_in',tostring(n),'_tap',tostring(t-1)];
end
for port=1:3, add_line(blk, [prev_blk_name,'/',tostring(port)], [blk_name,'/',tostring(port)]);
end
add_line (blk, [prev_blk_name,'/4'],[adder_name,'/',tostring(t)]);
end
end
end
clean_blocks(blk);
fmtstr = sprintf('taps=%d, add_latency=%d', TotalTaps, add_latency);
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting pfb_fir_real_init','trace');
|
github
|
mstrader/mlib_devel-master
|
lo_osc_init.m
|
.m
|
mlib_devel-master/casper_library/lo_osc_init.m
| 3,905 |
utf_8
|
b45be18480995fe17cc30e48cdf4c94e
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function lo_osc_init(blk,varargin)
defaults = {};
check_mask_type(blk, 'lo_osc');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
n_bits = get_var('n_bits','defaults', defaults, varargin{:});
counter_width = get_var('counter_width','defaults', defaults, varargin{:});
counter_start = get_var('counter_start','defaults', defaults, varargin{:});
counter_step = get_var('counter_step','defaults', defaults, varargin{:});
latency = get_var('latency','defaults', defaults, varargin{:});
delete_lines(blk);
%default state in library
if n_bits == 0,
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
return;
end
reuse_block(blk, 'sync', 'built-in/Inport', ...
'Port', '1', ...
'Position', [20 63 50 77]);
reuse_block(blk, 'counter', 'xbsIndex_r4/Counter', ...
'rst', 'on', ...
'use_rpm', 'off', ...
'Position', [80 42 125 98]);
%forces counter to be larger than 3 bits so
%that RAM has more than 2 bit address to prevent error
if(counter_width < 3),
count = 'counter_width+2';
set_param([blk,'/counter'], 'n_bits', count, ...
'start_count', 'counter_start*4', 'cnt_by_val', 'counter_step*4');
else
count = 'counter_width';
set_param([blk,'/counter'],'n_bits', count, ...
'start_count','counter_start', 'cnt_by_val', 'counter_step');
end
reuse_block(blk, 'sincos', 'casper_library_downconverter/sincos', ...
'func', 'sine and cosine', 'neg_sin', 'on', ...
'neg_cos', 'off', 'symmetric', 'off', ...
'handle_sync', 'off', 'depth_bits', count, ...
'bit_width', 'n_bits', 'bram_latency', 'latency', ...
'Position', [150 42 200 98]);
reuse_block(blk, 'sin', 'built-in/Outport', ...
'Port', '1', ...
'Position', [235 48 265 62]);
reuse_block(blk, 'cos', 'built-in/Outport', ...
'Port', '2', ...
'Position', [235 78 265 92]);
add_line(blk,'sync/1','counter/1');
add_line(blk,'counter/1','sincos/1');
add_line(blk,'sincos/2','cos/1');
add_line(blk,'sincos/1','sin/1');
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
bus_maddsub_init.m
|
.m
|
mlib_devel-master/casper_library/bus_maddsub_init.m
| 24,374 |
utf_8
|
12cd9855df23575af61e36645d547570
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% SKA Africa %
% http://www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function bus_maddsub_init(blk, varargin)
log_group = 'bus_maddsub_init_debug';
clog('entering bus_maddsub_init', {log_group, 'trace'});
defaults = { ...
'n_bits_a', [8 8 8 8], 'bin_pt_a', 3, 'type_a', 1, 'cmplx_a', 'off', ...
'n_bits_b', [4], 'bin_pt_b', 3, 'type_b', 1, 'replicate_ab', 'on', ...
'mult_latency', 3, ...
'multiplier_implementation', 'behavioral HDL', ... 'embedded multiplier core' 'standard core' ...
'opmode', 'Addition', ...
'n_bits_c', [4 4 4 4], 'bin_pt_c', 3, 'type_c', 1, 'replicate_c', 'off', ...
'add_implementation', 'fabric core', ... 'behavioral HDL' 'DSP48 core'
'add_latency', 1, 'async_add', 'on', 'align_c', 'off', ...
'n_bits_out', 12, 'bin_pt_out', 7, 'type_out', 1, ...
'quantization', 0, 'overflow', 0, 'max_fanout', 2};
check_mask_type(blk, 'bus_maddsub');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
xpos = 50; xinc = 80;
ypos = 50; yinc = 50;
port_w = 30; port_d = 14;
rep_w = 50; rep_d = 30;
bus_expand_w = 50;
bus_create_w = 50;
mult_w = 50; mult_d = 60;
add_w = 50; add_d = 60;
del_w = 30; del_d = 20;
n_bits_a = get_var('n_bits_a', 'defaults', defaults, varargin{:});
bin_pt_a = get_var('bin_pt_a', 'defaults', defaults, varargin{:});
type_a = get_var('type_a', 'defaults', defaults, varargin{:});
cmplx_a = get_var('cmplx_a', 'defaults', defaults, varargin{:});
n_bits_b = get_var('n_bits_b', 'defaults', defaults, varargin{:});
bin_pt_b = get_var('bin_pt_b', 'defaults', defaults, varargin{:});
type_b = get_var('type_b', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
multiplier_implementation = get_var('multiplier_implementation', 'defaults', defaults, varargin{:});
replicate_ab = get_var('replicate_ab', 'defaults', defaults, varargin{:});
opmode = get_var('opmode', 'defaults', defaults, varargin{:});
n_bits_c = get_var('n_bits_c', 'defaults', defaults, varargin{:});
bin_pt_c = get_var('bin_pt_c', 'defaults', defaults, varargin{:});
type_c = get_var('type_c', 'defaults', defaults, varargin{:});
add_implementation = get_var('add_implementation', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
async_add = get_var('async_add', 'defaults', defaults, varargin{:});
align_c = get_var('align_c', 'defaults', defaults, varargin{:});
replicate_c = get_var('replicate_c', 'defaults', defaults, varargin{:});
n_bits_out = get_var('n_bits_out', 'defaults', defaults, varargin{:});
bin_pt_out = get_var('bin_pt_out', 'defaults', defaults, varargin{:});
type_out = get_var('type_out', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
overflow = get_var('overflow', 'defaults', defaults, varargin{:});
max_fanout = get_var('max_fanout', 'defaults', defaults, varargin{:});
delete_lines(blk);
%default state, do nothing
if (~isempty(find([n_bits_a, n_bits_b, n_bits_c] == 0))),
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_maddsub_init', {'trace', log_group});
return;
end
%%%%%%%%%%%%%%%%%%%%%%
% parameter checking %
%%%%%%%%%%%%%%%%%%%%%%
if max_fanout < 1,
clog('Maximum fanout must be 1 or greater', {'error', log_group});
error('Maximum fanout must be 1 or greater');
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% check input lists for consistency %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
lenba = length(n_bits_a); lenpa = length(bin_pt_a); lenta = length(type_a);
a = [lenba, lenpa, lenta];
unique_a = unique(a);
compa = unique_a(length(unique_a));
lenbb = length(n_bits_b); lenpb = length(bin_pt_b); lentb = length(type_b);
b = [lenbb, lenpb, lentb];
unique_b = unique(b);
compb = unique_b(length(unique_b));
lenbc = length(n_bits_c); lenpc = length(bin_pt_c); lentc = length(type_c);
c = [lenbc, lenpc, lentc];
unique_c = unique(c);
compc = unique_c(length(unique_c));
lenbo = length(n_bits_out); lenpo = length(bin_pt_out); lento = length(type_out);
lenq = length(quantization); leno = length(overflow);
o = [lenbo, lenpo, lento, lenq, leno];
unique_o = unique(o);
compo = unique_o(length(unique_o));
too_many_a = length(unique_a) > 2;
conflict_a = (length(unique_a) == 2) && (unique_a(1) ~= 1);
if too_many_a | conflict_a,
error('conflicting component number for bus a');
clog('conflicting component number for bus a', {'error', log_group});
end
too_many_b = length(unique_b) > 2;
conflict_b = (length(unique_b) == 2) && (unique_b(1) ~= 1);
if too_many_b | conflict_b,
error('conflicting component number for bus b');
clog('conflicting component number for bus b', {'error', log_group});
end
too_many_c = length(unique_c) > 2;
conflict_c = (length(unique_c) == 2) && (unique_c(1) ~= 1);
if too_many_c | conflict_c,
error('conflicting component number for bus c');
clog('conflicting component number for bus c', {'error', log_group});
end
too_many_o = length(unique_o) > 2;
conflict_o = (length(unique_o) == 2) && (unique_o(1) ~= 1);
if too_many_o | conflict_o,
error('conflicting component number for output bus');
clog('conflicting component number for output bus', {'error', log_group});
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% autocomplete input lists where necessary %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
comp = max([compa, compb, compc]);
%replicate items if needed for a input
n_bits_a = repmat(n_bits_a, 1, compa/lenba);
bin_pt_a = repmat(bin_pt_a, 1, compa/lenpa);
type_a = repmat(type_a, 1, compa/lenta);
%replicate items if needed for b input
n_bits_b = repmat(n_bits_b, 1, compb/lenbb);
bin_pt_b = repmat(bin_pt_b, 1, compb/lenpb);
type_b = repmat(type_b, 1, compb/lentb);
%replicate items if needed for c input
n_bits_c = repmat(n_bits_c, 1, compc/lenbc);
bin_pt_c = repmat(bin_pt_c, 1, compc/lenpc);
type_c = repmat(type_c, 1, compc/lentc);
%replicate items if needed for output
compo = comp;
n_bits_out = repmat(n_bits_out, 1, comp/lenbo);
bin_pt_out = repmat(bin_pt_out, 1, comp/lenpo);
type_out = repmat(type_out, 1, comp/lento);
overflow = repmat(overflow, 1, comp/leno);
quantization = repmat(quantization, 1, comp/lenq);
%%%%%%%%%%%%%%%%%%
% fanout control %
%%%%%%%%%%%%%%%%%%
fa = compo/compa;
max_fanouta = max_fanout;
dupa = ceil(fa/max_fanouta);
compa = compa*dupa; type_a = repmat(type_a, 1, dupa) ;
n_bits_a = repmat(n_bits_a, 1, dupa); bin_pt_a = repmat(bin_pt_a, 1, dupa);
a_src = repmat([1:compa], 1, ceil(compo/compa));
fb = compo/compb;
max_fanoutb = max_fanout;
dupb = ceil(fb/max_fanoutb);
compb = compb*dupb; type_b = repmat(type_b, 1, dupb) ;
n_bits_b = repmat(n_bits_b, 1, dupb); bin_pt_b = repmat(bin_pt_b, 1, dupb);
if strcmp(cmplx_a, 'on'),
b_src = repmat(reshape([[1:compb];[1:compb]], 1, compb*2), 1, ceil(compo/(compb*2)));
else,
b_src = repmat([1:compb], 1, ceil(compo/compb));
end
fc = compo/compc;
max_fanoutc = max_fanout;
dupc = ceil(fc/max_fanoutc);
compc = compc*dupc; type_c = repmat(type_c, 1, dupc) ;
n_bits_c = repmat(n_bits_c, 1, dupc); bin_pt_c = repmat(bin_pt_c, 1, dupc);
c_src = repmat([1:compc], 1, ceil(compo/compc));
%required fanout of en
fanout = ceil(comp/max_fanout);
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% at this point all a, b, c, output lists should match %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
clog(['n_bits_a = ', mat2str(n_bits_a)], log_group);
clog(['n_bits_b = ', mat2str(n_bits_b)], log_group);
clog(['n_bits_c = ', mat2str(n_bits_c)], log_group);
clog(['n_bits_out = ', mat2str(n_bits_out)], log_group);
clog(['bin_pt_out = ', mat2str(bin_pt_out)], log_group);
clog(['type_out = ', mat2str(type_out)], log_group);
clog(['overflow = ', mat2str(overflow)], log_group);
clog(['quantization = ', mat2str(quantization)], log_group);
clog(['duplication factors => a: ', num2str(dupa),' b: ', num2str(dupb),' c: ', num2str(dupc)], log_group);
clog(['compa = ', num2str(compa), ' compb = ', num2str(compb), ' compc = ', num2str(compc),' compo = ', num2str(compo)], log_group);
clog(['connection vector for port a = ', mat2str(a_src)], log_group);
clog(['connection vector for port b = ', mat2str(b_src)], log_group);
clog(['connection vector for port c = ', mat2str(c_src)], log_group);
%%%%%%%%%%%%%%%
% input ports %
%%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compa/2;
reuse_block(blk, 'a', 'built-in/inport', ...
'Port', '1', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
ypos_tmp = ypos_tmp + yinc + mult_d*(compa/2 + compb/2);
reuse_block(blk, 'b', 'built-in/inport', ...
'Port', '2', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
ypos_tmp = ypos_tmp + yinc + mult_d*(compb/2 + compc/2);
reuse_block(blk, 'c', 'built-in/inport', ...
'Port', '3', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
ypos_tmp = ypos_tmp + yinc + mult_d*(compc/2);
port_offset = 4;
if strcmp(async_add, 'on'),
ypos_tmp = ypos_tmp + yinc + mult_d*fanout;
reuse_block(blk, 'en', 'built-in/inport', ...
'Port', num2str(port_offset), 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
ypos_tmp = ypos_tmp + yinc;
port_offset = port_offset + 1;
end
xpos = xpos + xinc + port_w/2 + rep_w/2;
%%%%%%%%%%%%%%%%%%%%%%%%%%%
% a,b replication control %
%%%%%%%%%%%%%%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compa/2;
%replicate busses
if strcmp(replicate_ab, 'on'),
reuse_block(blk, 'repa', 'casper_library_bus/bus_replicate', ...
'replication', num2str(dupa), 'latency', '1', 'misc', 'off', ...
'Position', [xpos-rep_w/2 ypos_tmp-rep_d/2 xpos+rep_w/2 ypos_tmp+rep_d/2]);
add_line(blk, 'a/1', 'repa/1');
end
ypos_tmp = ypos_tmp + yinc + mult_d*(compa/2 + compb/2);
if strcmp(replicate_ab, 'on'),
reuse_block(blk, 'repb', 'casper_library_bus/bus_replicate', ...
'replication', num2str(dupb), 'latency', '1', 'misc', 'off', ...
'Position', [xpos-rep_w/2 ypos_tmp-rep_d/2 xpos+rep_w/2 ypos_tmp+rep_d/2]);
add_line(blk, 'b/1', 'repb/1');
end
ypos_tmp = ypos_tmp + yinc + mult_d*(compb/2 + compc/2);
ypos_tmp = ypos_tmp + 2*yinc + mult_d*(compc/2 + fanout);
xpos = xpos + xinc + rep_w/2 + bus_expand_w/2;
%%%%%%%%%%%%%%
% bus expand %
%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compa/2; %reset ypos
outputWidth = mat2str(n_bits_a);
outputBinaryPt = mat2str(bin_pt_a);
outputArithmeticType = mat2str(type_a);
reuse_block(blk, 'a_debus', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of arbitrary size', ...
'outputWidth', outputWidth, ...
'outputBinaryPt', outputBinaryPt, ...
'outputArithmeticType', outputArithmeticType, ...
'show_format', 'on', 'outputToWorkspace', 'off', ...
'variablePrefix', '', 'outputToModelAsWell', 'on', ...
'Position', [xpos-bus_expand_w/2 ypos_tmp-mult_d*compa/2 xpos+bus_expand_w/2 ypos_tmp+mult_d*compa/2]);
if strcmp(replicate_ab, 'on'), add_line(blk, 'repa/1', 'a_debus/1');
else, add_line(blk, 'a/1', 'a_debus/1');
end
ypos_tmp = ypos_tmp + mult_d*(compa/2+compb/2) + yinc;
outputWidth = mat2str(n_bits_b);
outputBinaryPt = mat2str(bin_pt_b);
outputArithmeticType = mat2str(type_b);
reuse_block(blk, 'b_debus', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of arbitrary size', ...
'outputWidth', outputWidth, ...
'outputBinaryPt', outputBinaryPt, ...
'outputArithmeticType', outputArithmeticType, ...
'show_format', 'on', 'outputToWorkspace', 'off', ...
'variablePrefix', '', 'outputToModelAsWell', 'on', ...
'Position', [xpos-bus_expand_w/2 ypos_tmp-mult_d*compb/2 xpos+bus_expand_w/2 ypos_tmp+mult_d*compb/2]);
if strcmp(replicate_ab, 'on'), add_line(blk, 'repb/1', 'b_debus/1');
else, add_line(blk, 'b/1', 'b_debus/1');
end
ypos_tmp = ypos_tmp + mult_d*(compb/2+compc/2) + yinc;
ypos_tmp = ypos_tmp + mult_d*(compc/2 + fanout/2)+ yinc;
xpos = xpos + xinc + bus_expand_w/2 + mult_w/2;
%%%%%%%%%%%%%%%%%%
% multiplication %
%%%%%%%%%%%%%%%%%%
ypos_tmp = ypos; %reset ypos
if strcmp(replicate_ab, 'on'), latency = mult_latency - 1;
else, latency = mult_latency;
end
for index = 1:compo,
clog([num2str(index),': type = ', num2str(type_out(index)), ...
' quantization = ', num2str(quantization(index)), ...
' overflow = ',num2str(overflow(index))], log_group);
switch type_out(index),
case 0,
arith_type = 'Unsigned';
case 1,
arith_type = 'Signed';
otherwise,
clog(['unknown arithmetic type ',num2str(arith_type)], {'error', log_group});
error(['bus_mult_init: unknown arithmetic type ',num2str(arith_type)]);
end
switch quantization(index),
case 0,
quant = 'Truncate';
case 1,
quant = 'Round (unbiased: +/- Inf)';
end
switch overflow(index),
case 0,
of = 'Wrap';
case 1,
of = 'Saturate';
case 2,
of = 'Flag as error';
end
clog(['output ',num2str(index),': (',num2str(n_bits_out(index)), ' ', ...
num2str(bin_pt_out(index)),') ', arith_type,' ',quant,' ', of], ...
log_group);
mult_name = ['mult',num2str(index)];
clog(['drawing ',mult_name], log_group);
%standard multiplication
if strcmp(multiplier_implementation, 'behavioral HDL'),
use_behavioral_HDL = 'on';
use_embedded = 'off';
else
use_behavioral_HDL = 'off';
if strcmp(multiplier_implementation, 'embedded multiplier core'),
use_embedded = 'on';
elseif strcmp(multiplier_implementation, 'standard core'),
use_embedded = 'off';
else,
end
end
reuse_block(blk, mult_name, 'xbsIndex_r4/Mult', ...
'latency', num2str(latency), 'precision', 'Full', ...
'use_behavioral_HDL', use_behavioral_HDL, 'use_embedded', use_embedded, ...
'Position', [xpos-mult_w/2 ypos_tmp xpos+mult_w/2 ypos_tmp+mult_d-20]);
ypos_tmp = ypos_tmp + mult_d;
clog(['done'], log_group);
add_line(blk, ['a_debus/', num2str(a_src(index))], [mult_name, '/1']);
add_line(blk, ['b_debus/', num2str(b_src(index))], [mult_name, '/2']);
end %for
ypos_tmp = ypos + mult_d*(compb+compa+compc+fanout) + 4*yinc;
if strcmp(async_add, 'on'),
%en
reuse_block(blk, 'den0', 'xbsIndex_r4/Delay', ...
'latency', num2str(mult_latency-1), 'reg_retiming', 'on', ...
'Position', [xpos-del_w/2 ypos_tmp-del_d/2 xpos+del_w/2 ypos_tmp+del_d/2]);
add_line(blk, 'en/1', 'den0/1');
end
xpos = xpos + xinc + mult_w/2 + rep_w/2;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% replication of enable for add/sub %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ypos_tmp = ypos + yinc*2 + mult_d*(compa+compb+compc/2);
if strcmp(replicate_c, 'on'),
latency = 1;
reuse_block(blk, 'repc', 'casper_library_bus/bus_replicate', ...
'replication', num2str(dupc), 'latency', '1', 'misc', 'off', ...
'Position', [xpos-rep_w/2 ypos_tmp-rep_d/2 xpos+rep_w/2 ypos_tmp+rep_d/2]);
add_line(blk, 'c/1', 'repc/1');
end
ypos_tmp = ypos_tmp + yinc + mult_d*compc/2;
if strcmp(async_add, 'on'),
ypos_tmp = ypos_tmp + mult_d*fanout/2;
reuse_block(blk, 'repen1', 'casper_library_bus/bus_replicate', ...
'replication', num2str(fanout), 'latency', num2str(mult_latency), 'misc', 'off', ...
'Position', [xpos-rep_w/2 ypos_tmp-rep_d/2 xpos+rep_w/2 ypos_tmp+rep_d/2]);
add_line(blk, 'en/1', 'repen1/1');
ypos_tmp = ypos_tmp + yinc + mult_d*fanout/2;
%en
reuse_block(blk, 'den1', 'xbsIndex_r4/Delay', ...
'latency', '1', 'reg_retiming', 'on', ...
'Position', [xpos-del_w/2 ypos_tmp-del_d/2 xpos+del_w/2 ypos_tmp+del_d/2]);
add_line(blk, 'den0/1', 'den1/1');
end
xpos = xpos + xinc + rep_w/2 + bus_expand_w/2;
%%%%%%%%%%%%%%%%%%%%
% debus for addsub %
%%%%%%%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*(compa + compb + compc/2) + yinc*2;
outputWidth = mat2str(n_bits_c);
outputBinaryPt = mat2str(bin_pt_c);
outputArithmeticType = mat2str(type_c);
reuse_block(blk, 'c_debus', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of arbitrary size', ...
'outputWidth', outputWidth, ...
'outputBinaryPt', outputBinaryPt, ...
'outputArithmeticType', outputArithmeticType, ...
'show_format', 'on', 'outputToWorkspace', 'off', ...
'variablePrefix', '', 'outputToModelAsWell', 'on', ...
'Position', [xpos-bus_expand_w/2 ypos_tmp-mult_d*compc/2 xpos+bus_expand_w/2 ypos_tmp+mult_d*compc/2]);
if strcmp(replicate_c, 'on'), add_line(blk, 'repc/1', 'c_debus/1');
else, add_line(blk, 'c/1', 'c_debus/1');
end
ypos_tmp = ypos_tmp + mult_d*compc/2 + yinc;
if strcmp(async_add, 'on'),
ypos_tmp = ypos_tmp + mult_d*fanout/2;
reuse_block(blk, 'en_debus1', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of equal size', ...
'outputNum', num2str(fanout), ...
'outputWidth', '1', 'outputBinaryPt', '0', 'outputArithmeticType', '2', ...
'show_format', 'on', 'outputToWorkspace', 'off', ...
'variablePrefix', '', 'outputToModelAsWell', 'on', ...
'Position', [xpos-bus_expand_w/2 ypos_tmp-mult_d*fanout/2 xpos+bus_expand_w/2 ypos_tmp+mult_d*fanout/2]);
add_line(blk, 'repen1/1', 'en_debus1/1');
end %if
xpos = xpos + xinc + bus_expand_w/2 + add_w/2;
%%%%%%%%%%%%%%%%%%%%%%%%
% addition/subtraction %
%%%%%%%%%%%%%%%%%%%%%%%%
%addsub
ypos_tmp = ypos; %reset ypos
clog(['making ',num2str(compo),' AddSubs'], log_group);
for index = 1:compo
switch type_out(index),
case 0,
arith_type = 'Unsigned';
case 1,
arith_type = 'Signed';
end
switch quantization(index),
case 0,
quant = 'Truncate';
case 1,
quant = 'Round (unbiased: +/- Inf)';
end
switch overflow(index),
case 0,
of = 'Wrap';
case 1,
of = 'Saturate';
case 2,
of = 'Flag as error';
end
if strcmp(opmode, 'Addition'),
symbol = '+';
else,
symbol = '-';
end
clog(['output ',num2str(index),': ', ...
' a[',num2str(a_src(index)),'] ',symbol,' b[',num2str(b_src(index)),'] = ', ...
'(',num2str(n_bits_out(index)), ' ', num2str(bin_pt_out(index)),') ' ...
,arith_type,' ',quant,' ', of], log_group);
if strcmp(add_implementation, 'behavioral HDL'),
use_behavioral_HDL = 'on';
hw_selection = 'Fabric';
elseif strcmp(add_implementation, 'fabric core'),
use_behavioral_HDL = 'off';
hw_selection = 'Fabric';
elseif strcmp(add_implementation, 'DSP48 core'),
use_behavioral_HDL = 'off';
hw_selection = 'DSP48';
end
add_name = ['addsub',num2str(index)];
reuse_block(blk, add_name, 'xbsIndex_r4/AddSub', ...
'mode', opmode, 'latency', num2str(add_latency), ...
'en', async_add, 'precision', 'User Defined', ...
'n_bits', num2str(n_bits_out(index)), 'bin_pt', num2str(bin_pt_out(index)), ...
'arith_type', arith_type, 'quantization', quant, 'overflow', of, ...
'pipelined', 'on', 'use_behavioral_HDL', use_behavioral_HDL, 'hw_selection', hw_selection, ...
'Position', [xpos-add_w/2 ypos_tmp xpos+add_w/2 ypos_tmp+add_d-20]);
ypos_tmp = ypos_tmp + add_d;
mult_name = ['mult',num2str(index)];
add_line(blk, [mult_name, '/1'], [add_name,'/1']);
add_line(blk, ['c_debus/',num2str(c_src(index))], [add_name,'/2']);
if strcmp(async_add, 'on')
add_line(blk, ['en_debus1/', num2str(floor((index-1)/max_fanout)+1)], [add_name,'/3']);
end
end %for
ypos_tmp = ypos + mult_d*(compa+compb+compc+fanout) + yinc*4;
if strcmp(async_add, 'on'),
%en
reuse_block(blk, 'den2', 'xbsIndex_r4/Delay', ...
'latency', num2str(add_latency), 'reg_retiming', 'on', ...
'Position', [xpos-del_w/2 ypos_tmp-del_d/2 xpos+del_w/2 ypos_tmp+del_d/2]);
add_line(blk, 'den1/1', 'den2/1');
end
xpos = xpos + xinc + add_w/2 + bus_create_w/2;
%%%%%%%%%%%%%%
% bus create %
%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compo/2; %reset ypos
if strcmp(opmode, 'Addition'), op = '+';
else, op = '-';
end
reuse_block(blk, ['a*b', op, 'c_bussify'], 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(compo), ...
'Position', [xpos-bus_create_w/2 ypos_tmp-mult_d*compo/2 xpos+bus_create_w/2 ypos_tmp+mult_d*compo/2]);
for index = 1:compo, add_line(blk, ['addsub',num2str(index),'/1'], ['a*b', op, 'c_bussify/',num2str(index)]); end
xpos = xpos + xinc + bus_create_w/2 + port_w/2;
%%%%%%%%%%%%%%%%%
% output port/s %
%%%%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compo/2;
reuse_block(blk, ['a*b', op, 'c'], 'built-in/outport', ...
'Port', '1', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
add_line(blk, ['a*b', op, 'c_bussify/1'], ['a*b', op, 'c/1']);
ypos_tmp = ypos + mult_d*(compb+compa+compc+fanout) + 4*yinc;
if strcmp(async_add, 'on'),
reuse_block(blk, 'dvalid', 'built-in/outport', ...
'Port', '2', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
add_line(blk, 'den2/1', 'dvalid/1');
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_maddsub_init', {'trace', log_group});
end %function bus_maddsub_init
|
github
|
mstrader/mlib_devel-master
|
update_casper_block.m
|
.m
|
mlib_devel-master/casper_library/update_casper_block.m
| 7,668 |
utf_8
|
0c9ce424ff0d01d5bb93ee081b9b2647
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2013 David MacMahon
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% This function updates oldblk using the most recent library version.
% Mask parameters are copied over whenever possible.
function update_casper_block(oldblk)
% Clear last dumped exception to ensure that all exceptions are shown.
dump_exception([]);
% Check link status
link_status = get_param(oldblk, 'StaticLinkStatus');
% Inactive link (link disabled but not broken) so get AncestorBlock
if strcmp(link_status, 'inactive'),
srcblk = get_param(oldblk, 'AncestorBlock');
% Resolved link (link in place) so get ReferenceBlock
elseif strcmp(link_status, 'resolved'),
srcblk = get_param(oldblk, 'ReferenceBlock');
% Else, not supported
else
fprintf('%s is not a linked library block\n', oldblk);
return;
end
% Map srcblk through casper_library_forwarding_table in case it's a really
% old name.
srcblk = casper_library_forwarding_table(srcblk);
% Special handling for deprecated "edge" blocks
switch srcblk
case {'casper_library_misc/edge', ...
'casper_library_misc/negedge', ...
'casper_library_misc/posedge'}
% Get mask params for edge_detect block
switch srcblk
case 'casper_library_misc/edge'
params = {'edge', 'Both', 'polarity', 'Active High'};
case 'casper_library_misc/negedge'
params = {'edge', 'Falling', 'polarity', 'Active High'};
case 'casper_library_misc/posedge'
params = {'edge', 'Rising', 'polarity', 'Active High'};
end
% Make sure casper_library_misc block diagram is loaded
if ~bdIsLoaded('casper_library_misc')
fprintf('loading library casper_library_misc\n');
load_system('casper_library_misc');
end
% Get position and orientation of oldblk
p = get_param(oldblk, 'position');
o = get_param(oldblk, 'orientation');
% Delete oldblk
delete_block(oldblk);
% Add edge detect block using oldblk's name
add_block('casper_library_misc/edge_detect', oldblk, ...
'orientation', o, ...
'position', p, ...
params{:});
% Done!
return
end % special deprecated handling
% Make sure srcblk's block diagram is loaded
srcblk_bd = regexprep(srcblk, '/.*', '');
if ~bdIsLoaded(srcblk_bd)
fprintf('loading library %s\n', srcblk_bd);
load_system(srcblk_bd);
end
% Get old and new mask names
oldblk_mask_names = get_param(oldblk, 'MaskNames');
newblk_mask_names = get_param(srcblk, 'MaskNames');
% Save warning backtrace state then disable backtrace
bt_state = warning('query', 'backtrace');
warning off backtrace;
% Try to populate newblk's mask parameters from oldblk
newblk_params = {};
for k = 1:length(newblk_mask_names)
% If oldblk has the same mask parameter name
if find(strcmp(oldblk_mask_names, newblk_mask_names{k}))
% Add to new block parameters
newblk_params{end+1} = newblk_mask_names{k};
newblk_params{end+1} = get_param(oldblk, newblk_mask_names{k});
else
type = get_param(oldblk, 'MaskType');
if ~isempty(type)
type = [type ' '];
end
link = sprintf('<a href="matlab:hilite_system(''%s'')">%s</a>', ...
oldblk, oldblk);
warning('old %sblock %s did not have mask parameter %s', ...
type, link, newblk_mask_names{k});
end
end
% Restore warning backtrace state
warning(bt_state);
% In addition to copying the mask parameters, we also copy the UserData
% parameter, if it looks like it was set by save_state. We clear the state
% field to ensure that the block gets re-initialized by the mask init script.
ud = get_param(oldblk, 'UserData');
if isstruct(ud) && isfield(ud, 'state') && isfield(ud, 'parameters')
ud.state = [];
newblk_params{end+1} = 'UserData';
newblk_params{end+1} = ud;
end
% Get position and orientation of oldblk.
p = get_param(oldblk, 'position');
o = get_param(oldblk, 'orientation');
% The new block must be added directly to the same parent subsystem since
% some of its mask parameter values might use variable names that only exist
% in the scope of the parent subsystem's mask. Adding a block to the parent
% subsystem can cause the parent subsystem's mask initialization code to run
% which may call "clean_blocks" which would see the block we're adding as
% unconnected and delete it! To avoid this, we temporarily set the parent
% subsystem's mask initialization parameter to an empty string, then restore
% the original setting after adding the block.
parent_mask_init = '';
parent = get_param(oldblk, 'Parent');
% If parent is a block (i.e. NOT a block diagram)
if strcmp(get_param(parent, 'Type'), 'block')
try
parent_mask_init = get_param(parent, 'MaskInitialization');
set_param(parent, 'MaskInitialization', '');
end
end
% Delete old block
delete_block(oldblk);
% Add source block using new params. Note that we position the new block at
% (0,0) with size of (0,0) to minimize the possibility of it connecting to
% stray unconnected lines before the mask init script runs (which may change
% the number of ports).
add_block(srcblk, oldblk, ...
'position', [0,0,0,0], ...
'orientation', o, ...
newblk_params{:});
% Move block into position. Some blocks (e.g. software register blocks) need
% to be resized to get port spacing correct and sometimes the block needs a
% little nudge one way or the other to connect to existing lines. That's why
% we set the position multiple times.
set_param(oldblk, ...
'position', p, ...
'position', p + [-1, 0, 0, 0], ...
'position', p, ...
'position', p + [ 1, 0, 0, 0], ...
'position', p, ...
'position', p + [ 0, -1, 0, 0], ...
'position', p, ...
'position', p + [ 0, 1, 0, 0], ...
'position', p, ...
'position', p + [-1, -1, 2, 2], ...
'position', p);
% Restore parent's mask init setting
if ~isempty(parent_mask_init)
set_param(parent, 'MaskInitialization', parent_mask_init);
end
end
|
github
|
mstrader/mlib_devel-master
|
pfb_coeff_gen_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_coeff_gen_init.m
| 7,916 |
utf_8
|
3a8b8de3b410dded0593336d7521f5b0
|
% Initialize and configure the Polyphase Filter Bank coefficient generator.
%
% pfb_coeff_gen_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% PFBSize = Size of the FFT (2^FFTSize points).
% CoeffBitWidth = Bit width of coefficients.
% TotalTaps = Total number of taps in the PFB
% CoeffDistMem = Implement coefficients in distributed memory
% WindowType = The type of windowing function to use.
% bram_latency = The latency of BRAM in the system.
% n_inputs = Number of parallel input streams
% nput = Which input this is (of the n_inputs parallel).
% fwidth = The scaling of the bin width (1 is normal).
% debug_mode = true or false, is the block being used in debug mode or not. Changes the coefficients.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_coeff_gen_init(blk, varargin)
% declare any default values for arguments you might like.
defaults = {};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'pfb_coeff_gen');
munge_block(blk, varargin{:});
PFBSize = get_var('PFBSize', 'defaults', defaults, varargin{:});
CoeffBitWidth = get_var('CoeffBitWidth', 'defaults', defaults, varargin{:});
TotalTaps = get_var('TotalTaps', 'defaults', defaults, varargin{:});
CoeffDistMem = get_var('CoeffDistMem', 'defaults', defaults, varargin{:});
WindowType = get_var('WindowType', 'defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency', 'defaults', defaults, varargin{:});
fan_latency = get_var('fan_latency', 'defaults', defaults, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
nput = get_var('nput', 'defaults', defaults, varargin{:});
fwidth = get_var('fwidth', 'defaults', defaults, varargin{:});
debug_mode = get_var('debug_mode', 'defaults', defaults, varargin{:});
% Set coefficient vector
try
window('hamming',1024);
catch
disp('pfb_coeff_gen_init:Signal Processing Library absent or not working correctly');
error('pfb_coeff_gen_init:Signal Processing Library absent or not working correctly');
end
%alltaps = TotalTaps*2^PFBSize;
%windowval = transpose(window(WindowType, alltaps));
%total_coeffs = windowval .* sinc(fwidth*([0:alltaps-1]/(2^PFBSize)-TotalTaps/2));
%for i=1:alltaps/2^n_inputs,
% buf(i)=total_coeffs((i-1)*2^n_inputs + nput + 1);
%end
delete_lines(blk);
% Add Ports
reuse_block(blk, 'din', 'built-in/inport', 'Position', [235 28 265 42], 'Port', '1');
reuse_block(blk, 'sync', 'built-in/inport', 'Position', [15 93 45 107], 'Port', '2');
reuse_block(blk, 'dout', 'built-in/outport', 'Position', [360 28 390 42], 'Port', '1');
reuse_block(blk, 'sync_out', 'built-in/outport', 'Position', [130 28 160 42], 'Port', '2');
reuse_block(blk, 'coeff', 'built-in/outport', 'Position', [500 343 530 357], 'Port', '3');
% Add Static Blocks
reuse_block(blk, 'Delay', 'xbsIndex_r4/Delay', ...
'latency', 'bram_latency+1+fan_latency', 'Position', [65 12 110 58]);
reuse_block(blk, 'Counter', 'xbsIndex_r4/Counter', ...
'cnt_type', 'Free Running', 'n_bits', tostring(PFBSize-n_inputs), 'arith_type', 'Unsigned', ...
'rst', 'on', 'explicit_period', 'on', 'Position', [65 75 115 125]);
reuse_block(blk, 'Delay1', 'xbsIndex_r4/Delay', ...
'latency', 'bram_latency+1+fan_latency', 'Position', [290 12 335 58]);
reuse_block(blk, 'Concat', 'xbsIndex_r4/Concat', ...
'num_inputs', tostring(TotalTaps), 'Position', [360 97 415 643]);
reuse_block(blk, 'Register', 'xbsIndex_r4/Register', ...
'Position', [435 325 480 375]);
add_line(blk, 'din/1', 'Delay1/1');
add_line(blk, 'Delay1/1', 'dout/1');
add_line(blk, 'sync/1', 'Counter/1');
add_line(blk, 'sync/1', 'Delay/1');
add_line(blk, 'Delay/1', 'sync_out/1');
add_line(blk, 'Concat/1', 'Register/1');
add_line(blk, 'Register/1', 'coeff/1');
% Add Dynamic Blocks
for a=1:TotalTaps,
dblkname = ['fan_delay', tostring(a)];
reuse_block(blk, dblkname, 'xbsIndex_r4/Delay', ...
'latency', 'fan_latency', 'Position', [150 65*(a-1)+74 180 65*(a-1)+126]);
add_line(blk, 'Counter/1', [dblkname, '/1']);
if strcmp(debug_mode, 'on'),
atype = 'Unsigned';
binpt = '0';
debug_option = 'true';
else
atype = 'Signed (2''s comp)';
binpt = tostring(CoeffBitWidth-1);
debug_option = 'false';
end
vector_str = ['pfb_coeff_gen_calc(', tostring(PFBSize), ', ', ...
tostring(TotalTaps), ',''', tostring(WindowType), ''',', ...
tostring(n_inputs), ', ', tostring(nput), ',', ...
tostring(fwidth), ',', tostring(a), ',', debug_option, ')'];
blkname = ['ROM', tostring(a)];
reuse_block(blk, blkname, 'xbsIndex_r4/ROM', ...
'depth', tostring(2^(PFBSize-n_inputs)), 'initVector', vector_str, 'arith_type', atype, ...
'n_bits', tostring(CoeffBitWidth), 'bin_pt', binpt, ...
'latency', 'bram_latency', 'use_rpm','on', 'Position', [200 65*(a-1)+74 250 65*(a-1)+126]);
add_line(blk, [dblkname, '/1'], [blkname, '/1']);
reintname = ['Reinterpret', tostring(a)];
reuse_block(blk, reintname, 'xbsIndex_r4/Reinterpret', 'force_arith_type', 'On', ...
'force_bin_pt','On',...
'Position', [270 65*(a-1)+84 310 65*(a-1)+116]);
set_param([blk,'/',reintname],'arith_type','Unsigned','bin_pt','0');
add_line(blk, [blkname, '/1'], [reintname, '/1']);
add_line(blk, [reintname, '/1'], ['Concat/', tostring(a)]);
end
% Set coefficient ROMs to use distribute memory (or not).
for a=1:TotalTaps,
blkname = ['ROM', tostring(a)];
if strcmp(CoeffDistMem, 'on'),
set_param([blk,'/',blkname], 'distributed_mem', 'Distributed memory');
else
set_param([blk,'/',blkname], 'distributed_mem', 'Block RAM');
end
end
clean_blocks(blk);
fmtstr = sprintf('PFBSize=%d, n_inputs=%d,\ntaps=%d, input=%d', PFBSize, n_inputs, TotalTaps, nput);
if strcmp(debug_mode, 'on'),
fmtstr = [fmtstr, '\nDEBUG MODE!'];
end
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
munge_init.m
|
.m
|
mlib_devel-master/casper_library/munge_init.m
| 7,733 |
utf_8
|
54b730d57a4d8adbb957c2c2ac448aff
|
% Break input bus into divisions and reorder as specified.
%
% munge_init(blk, varargin)
%
% blk = The block to be configured.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% divisions = number of divisions
% div_size = size in bits of each division
% order = ouput order of divisions (referenced to input order)
% arith_type_out = reinterpret resultant vector
% bin_pt_out = output binary point
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% MeerKAT Radio Telescope Project %
% www.kat.ac.za %
% Copyright (C) 2010 Andrew Martens (meerKAT) %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function munge_init(blk,varargin)
log_group = 'munge_init_debug';
clog('entering munge_init', {log_group, 'trace'});
check_mask_type(blk, 'munge');
defaults = {'divisions', 4, 'div_size', [32 0 16 16], 'order', [3 0 1 2], 'arith_type_out', 'Unsigned', 'bin_pt_out', 0};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('munge_init: post same_state', {log_group, 'trace'});
munge_block(blk, varargin{:});
divisions = get_var('divisions', 'defaults', defaults, varargin{:});
div_size = get_var('div_size', 'defaults', defaults, varargin{:});
output_order = get_var('order', 'defaults', defaults, varargin{:});
arith_type_out = get_var('arith_type_out', 'defaults', defaults, varargin{:});
bin_pt_out = get_var('bin_pt_out', 'defaults', defaults, varargin{:});
%default empty state
if divisions < 1,
delete_lines(blk);
clean_blocks(blk);
set_param(blk,'AttributesFormatString','');
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting munge_init', {log_group, 'trace'});
return;
end
if divisions > 1 && length(find(div_size >= 1)) == 0,
clog(['Some divisions must have non-zero size'], {log_group, 'error'});
error(['Some divisions must have non-zero size']);
return;
end
if length(div_size) ~= 1 && length(div_size) ~= divisions,
clog(['Reported number of divisions, ',num2str(divisions),' does not match division description length ',num2str(length(div_size))], {log_group, 'error'});
error(['Reported number of divisions, ',num2str(divisions),' does not match division description length ',num2str(length(div_size))]);
return;
end
if length(find(output_order < 0)) ~= 0 || ...
length(find(output_order > divisions-1)) ~= 0,
clog(['Output order elements must be in range 0->',num2str(divisions-1)], {log_group, 'error'});
error(['Output order elements must be in range 0->',num2str(divisions-1)]);
return;
end
%remove 0 division sizes from div_size
nzero_i = find(div_size ~= 0);
div_size_mod = div_size(nzero_i);
divisions_mod = length(div_size_mod);
%adjust output_order based on zeros found in div_size
zero_i = find(div_size == 0);
output_order_mod = output_order;
for n = 1:length(zero_i),
indices = find(output_order >= (zero_i(n) - 1));
if ~isempty(indices),
output_order_mod(indices) = output_order_mod(indices) - 1;
end %if
end %for
for m = 1:length(zero_i),
indices = find(output_order == (zero_i(m)-1));
output_order_mod(indices) = [];
end
%calculate resultant word size
n_bits_out = 0;
for index = 1:length(output_order_mod),
if length(div_size_mod) == 1,
n_bits_out = n_bits_out+div_size_mod*(output_order_mod(index)+1);
else
n_bits_out = n_bits_out+div_size_mod(output_order_mod(index)+1);
end
end
if n_bits_out < bin_pt_out,
clog(['binary point position ',num2str(bin_pt_out),' greater than number of bits ',num2str(n_bits_out)], {log_group, 'error'});
error(['binary point position ',num2str(bin_pt_out),' greater than number of bits ',num2str(n_bits_out)]);
return;
end
delete_lines(blk);
ytick = 20;
if length(div_size_mod) == 1,
mode = 'divisions of equal size';
inputNum = divisions_mod;
else,
mode = 'divisions of arbitrary size';
inputNum = length(output_order_mod);
end
%input
reuse_block(blk, 'din', 'built-in/inport', 'Position', [40 10+ytick*(divisions_mod+1)/2 70 30+ytick*(divisions_mod+1)/2], 'Port', '1');
%output
reuse_block(blk, 'reinterpret_out', 'xbsIndex_r4/Reinterpret', ...
'force_arith_type', 'on', 'arith_type', arith_type_out, ...
'force_bin_pt', 'on', 'bin_pt', mat2str(bin_pt_out), ...
'Position', [655 10+ytick*(inputNum+1)/2 710 30+ytick*(inputNum+1)/2]);
reuse_block(blk, 'dout', 'built-in/outport', 'Position', [780 10+ytick*(inputNum+1)/2 810 30+ytick*(inputNum+1)/2], 'Port', '1');
add_line(blk, 'reinterpret_out/1', 'dout/1');
if divisions < 2,
add_line(blk, 'din/1', 'reinterpret_out/1');
else
%reinterpret
reuse_block(blk, 'reinterpret', 'xbsIndex_r4/Reinterpret', ...
'force_arith_type', 'on', 'arith_type', 'Unsigned', ...
'force_bin_pt', 'on', 'bin_pt', '0', ...
'Position', [95 12+ytick*(divisions_mod+1)/2 160 28+ytick*(divisions_mod+1)/2]);
add_line(blk, 'din/1', 'reinterpret/1');
%bus expand
reuse_block(blk, 'split', 'casper_library_flow_control/bus_expand', ...
'mode', mode, ...
'outputNum', num2str(divisions_mod), ...
'outputWidth', mat2str(div_size_mod), ...
'outputBinaryPt', mat2str(zeros(1, divisions_mod)), ...
'outputArithmeticType', mat2str(zeros(1, divisions_mod)), ...
'outputToWorkSpace', 'off', ...
'Position', [190 10 270 30+ytick*divisions_mod]);
add_line(blk, 'reinterpret/1', 'split/1');
%bus create
reuse_block(blk, 'join', 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(inputNum), ...
'Position', [550 10 630 30+ytick*inputNum]);
add_line(blk, 'join/1', 'reinterpret_out/1');
%join
for div = 1:length(output_order_mod),
add_line(blk, ['split/',num2str(output_order_mod(div)+1)], ['join/',num2str(div)]);
end
end %if
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
% Set attribute format string (block annotation)
annotation=sprintf('split:%s\njoin:%s\n%s [%d,%d]',mat2str(div_size), mat2str(output_order), arith_type_out, n_bits_out, bin_pt_out);
set_param(blk,'AttributesFormatString',annotation);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting munge_init', {log_group, 'trace'});
|
github
|
mstrader/mlib_devel-master
|
pfb_add_tree_async_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_add_tree_async_init.m
| 8,718 |
utf_8
|
9960463e3d72db5bcf7525cfe8d935aa
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_add_tree_async_init(blk, varargin)
% Initialize and configure the Polyphase Filter Bank final summing tree.
%
% pfb_add_tree_async_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% total_taps = Total number of taps in the PFB
% data_in_bits = Input Bitwidth
% data_out_bits = Output Bitwidth
% coeff_bits = Bitwidth of Coefficients.
% add_latency = Latency through each adder.
% quantization = 'Truncate', 'Round (unbiased: +/- Inf)', or 'Round
% (unbiased: Even Values)'
% Declare any default values for arguments you might like.
defaults = {};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'pfb_add_tree_async');
munge_block(blk, varargin{:});
input_num = get_var('input_num', 'defaults', defaults, varargin{:});
total_taps = get_var('total_taps', 'defaults', defaults, varargin{:});
data_in_bits = get_var('data_in_bits', 'defaults', defaults, varargin{:});
coeff_bits = get_var('coeff_bits', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
debug_mode = get_var('debug_mode', 'defaults', defaults, varargin{:});
delete_lines(blk);
% ports
reuse_block(blk, 'din', 'built-in/inport', 'Position', [15 123 45 137], 'Port', '1');
reuse_block(blk, 'sync', 'built-in/inport', 'Position', [15 28 45 42], 'Port', '2');
reuse_block(blk, 'dout', 'built-in/outport', 'Position', [600 25*total_taps+100 630 25*total_taps+115], 'Port', '1');
reuse_block(blk, 'sync_out', 'built-in/outport', 'Position', [600 28 630 42], 'Port', '2');
% dv path
reuse_block(blk, 'dv', 'built-in/inport', 'Position', [30 668 60 682], 'Port', '3');
reuse_block(blk, 'dv_out', 'built-in/outport', 'Position', [875 668 905 682], 'Port', '3');
add_stages = ceil(log2(total_taps));
dv_latency = (add_latency * add_stages) + 1;
reuse_block(blk, 'delay_dv', 'xbsIndex_r4/Delay', ...
'latency', num2str(dv_latency), ...
'Position', [450 660 480 690]);
add_line(blk, 'dv/1', 'delay_dv/1');
add_line(blk, 'delay_dv/1', 'dv_out/1');
% static blocks
reuse_block(blk, 'adder_tree1', 'casper_library_misc/adder_tree', ...
'n_inputs', num2str(total_taps), 'latency', 'add_latency', ...
'Position', [200 114 350 50*total_taps+114]);
reuse_block(blk, 'adder_tree2', 'casper_library_misc/adder_tree', ...
'n_inputs', num2str(total_taps), 'latency', 'add_latency', ...
'Position', [200 164+50*total_taps 350 164+100*total_taps]);
for ctr = 1:2,
if strcmp(debug_mode, 'on'),
ttype = 'Unsigned';
tbinpt = '0';
else
ttype = 'Signed (2''s comp)';
tbinpt = 'data_out_bits-1';
end
reuse_block(blk, ['convert', num2str(ctr)], 'xbsIndex_r4/Convert', ...
'arith_type', ttype, 'n_bits', 'data_out_bits', ...
'bin_pt', tbinpt, 'quantization', quantization, ...
'overflow', 'Saturate', 'latency', 'add_latency', 'pipeline', 'on',...
'Position', [500 25*total_taps+114+(40*(ctr-1)) 530 25*total_taps+128+(40*(ctr-1))]);
end
% delay to compensate for latency of convert blocks
reuse_block(blk, 'delay_convert', 'xbsIndex_r4/Delay', ...
'latency', 'add_latency', ...
'Position', [400 50+25*total_taps 430 80+25*total_taps]);
% Scale Blocks are required before casting to n_(n-1) format
% Input to adder tree seemes to be n_(n-2) format
% each level in the adder tree requires one more shift
% so with just two taps, there is one level in the adder tree
% so we would have, eg, 17_14 format, so we need to shift by 2 to get
% 17_16 which can be converted to 18_17 without overflow.
% There are nextpow2(total_taps) levels in the adder tree.
scale_factor = 1 + add_stages;
reuse_block(blk, 'scale1', 'xbsIndex_r4/Scale', ...
'scale_factor', num2str(-scale_factor), ...
'Position', [400 25*total_taps+114 430 25*total_taps+128]);
reuse_block(blk, 'scale2', 'xbsIndex_r4/Scale', ...
'scale_factor', num2str(-scale_factor), ...
'Position', [400 158+25*total_taps 430 172+25*total_taps]);
% lines
%add_line(blk, 'adder_tree1/2', 'convert1/1');
%add_line(blk, 'adder_tree2/2', 'convert2/1');
add_line(blk, 'adder_tree1/2', 'scale1/1');
add_line(blk, 'scale1/1', 'convert1/1');
add_line(blk, 'adder_tree2/2', 'scale2/1');
add_line(blk, 'scale2/1', 'convert2/1');
reuse_block(blk, 'ri_to_c', 'casper_library_misc/ri_to_c', ...
'Position', [550 114+25*total_taps 580 144+25*total_taps]);
add_line(blk, 'convert1/1', 'ri_to_c/1');
add_line(blk, 'convert2/1', 'ri_to_c/2');
add_line(blk, 'ri_to_c/1', 'dout/1');
add_line(blk, 'sync/1', 'adder_tree1/1');
add_line(blk, 'sync/1', 'adder_tree2/1');
%add_line(blk, 'adder_tree1/1', 'sync_out/1');
add_line(blk, 'adder_tree1/1', 'delay_convert/1');
add_line(blk, 'delay_convert/1', 'sync_out/1');
for p=0:total_taps-1,
for q=1:2,
slice_name = ['Slice', num2str(p),'_',num2str(q)];
reuse_block(blk, slice_name, 'xbsIndex_r4/Slice', ...
'mode', 'Upper Bit Location + Width', 'nbits', 'coeff_bits + data_in_bits', ...
'base0', 'MSB of Input', 'base1', 'MSB of Input', ...
'bit1', num2str(-(2*p+q-1)*(coeff_bits + data_in_bits)), 'Position', [70 50*p+25*q+116 115 50*p+25*q+128]);
add_line(blk, 'din/1', [slice_name, '/1']);
reint_name = ['Reint',num2str(p),'_',num2str(q)];
if strcmp(debug_mode, 'on'),
reuse_block(blk, reint_name, 'xbsIndex_r4/Reinterpret', ...
'force_arith_type', 'on', 'arith_type', 'Unsigned', ...
'force_bin_pt', 'on', 'bin_pt', '0', ...
'Position', [130 50*p+25*q+116 160 50*p+25*q+128]);
else
reuse_block(blk, reint_name, 'xbsIndex_r4/Reinterpret', ...
'force_arith_type', 'on', 'arith_type', 'Signed (2''s comp)', ...
'force_bin_pt', 'on', 'bin_pt', 'coeff_bits + data_in_bits - 2', ...
'Position', [130 50*p+25*q+116 160 50*p+25*q+128]);
end
add_line(blk, [slice_name, '/1'], [reint_name, '/1']);
add_line(blk, [reint_name, '/1'], ['adder_tree',num2str(q),'/',num2str(p+2)]);
end
end
% output data to the matlab workspace in debug mode
if strcmp(debug_mode, 'on'),
reuse_block(blk, 'wrkspc', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of equal size', 'outputNum', 'total_taps * 2', ...
'outputWidth', 'coeff_bits + data_in_bits', 'outputBinaryPt', '0', ...
'outputArithmeticType', '0', 'outputToWorkspace', 'on', ...
'variablePrefix', ['lasttap', num2str(input_num)], 'outputToModelAsWell', 'off', ...
'Position', [200 19 250 66]);
add_line(blk, 'din/1', 'wrkspc/1');
end
clean_blocks(blk);
fmtstr = sprintf('input(%d), taps(%d), add_lat(%d)', input_num, total_taps, add_latency);
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
snapshot_init.m
|
.m
|
mlib_devel-master/casper_library/snapshot_init.m
| 15,200 |
utf_8
|
dbae83f3bd93988157294d3214a625ab
|
% Create a snap block for capturing snapshots in various interesting ways.
%
% snapshot_init(blk, varargin)
%
% blk = The block to be configured.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% nsamples = size of buffer (2^nsamples)
% data_width = the data width [8, 16, 32, 64, 128]
% use_dsp48 = Use DSP48s to implement counters
% circap = support continual capture after trigger until stop seen
% offset = support delaying capture for configurable number of samples
% value = capture value on input port at same time as data capture starts
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Meerkat telescope project %
% http://www.kat.ac.za %
% Copyright 2011 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function snapshot_init(blk, varargin)
clog('entering snapshot_init', 'trace');
check_mask_type(blk, 'snapshot');
munge_block(blk, varargin{:});
defaults = {'storage', 'bram', 'dram_dimm', '1', 'dram_clock', '200', ...
'nsamples', 10, 'data_width', '32', 'offset', 'on', ...
'circap', 'on', 'value', 'off','use_dsp48', 'on'};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('snapshot_init: post same_state', 'trace');
storage = get_var('storage', 'defaults', defaults, varargin{:});
dram_dimm = eval(get_var('dram_dimm', 'defaults', defaults, varargin{:}));
dram_clock = eval(get_var('dram_clock', 'defaults', defaults, varargin{:}));
nsamples = get_var('nsamples', 'defaults', defaults, varargin{:});
data_width = eval(get_var('data_width', 'defaults', defaults, varargin{:})); %value in drop down list
use_dsp48 = get_var('use_dsp48', 'defaults', defaults, varargin{:});
circap = get_var('circap', 'defaults', defaults, varargin{:});
offset = get_var('offset', 'defaults', defaults, varargin{:});
value = get_var('value', 'defaults', defaults, varargin{:});
%we double path width and decimate rate for DRAM
if strcmp(storage,'dram'),
nsamples = nsamples - 1;
data_width = 128;
end
if strcmp(storage,'dram') && ((log2(data_width/8) + nsamples + 1) > 31),
errordlg('snapshot does not support capture of more than 1Gbytes using DRAM');
end
% useful constants
if strcmp(circap,'on'), circ = 1; else circ = 0; end
if strcmp(offset,'on'), off = 1; else off = 0; end
if strcmp(value,'on'), val = 1; else val = 0; end
delete_lines(blk);
% % do the info blocks first
% reuse_block(blk, 'storage', 'casper_library_misc/info_block', 'info', storage, 'Position', [0,0,50,30]);
% reuse_block(blk, 'dram_dimm', 'casper_library_misc/info_block', 'info', num2str(dram_dimm), 'Position', [0,0,50,30]);
% reuse_block(blk, 'dram_clock', 'casper_library_misc/info_block', 'info', num2str(dram_clock), 'Position', [0,0,50,30]);
% reuse_block(blk, 'length', 'casper_library_misc/info_block', 'info', num2str(pow2(nsamples)), 'Position', [0,0,50,30]);
% reuse_block(blk, 'data_width', 'casper_library_misc/info_block', 'info', num2str(data_width), 'Position', [0,0,50,30]);
% reuse_block(blk, 'start_offset', 'casper_library_misc/info_block', 'info', offset, 'Position', [0,0,50,30]);
% reuse_block(blk, 'circular_capture', 'casper_library_misc/info_block', 'info', circap, 'Position', [0,0,50,30]);
% reuse_block(blk, 'extra_value', 'casper_library_misc/info_block', 'info', value, 'Position', [0,0,50,30]);
% reuse_block(blk, 'use_dsp48', 'casper_library_misc/info_block', 'info', use_dsp48, 'Position', [0,0,50,30]);
% basic input ports
reuse_block(blk, 'din', 'built-in/inport', 'Position', [180 122 210 138], 'Port', '1');
reuse_block(blk, 'ri', 'xbsIndex_r4/Reinterpret', ...
'force_arith_type', 'on', 'arith_type', 'Unsigned', ...
'force_bin_pt', 'on', 'bin_pt', '0', ...
'Position', [240 122 300 138]);
add_line(blk, 'din/1', 'ri/1');
reuse_block(blk, 'cast', 'xbsIndex_r4/Convert', ...
'arith_type', 'Unsigned', 'n_bits', num2str(data_width), ...
'bin_pt', '0', 'quantization', 'Truncate', 'overflow', 'Wrap', ...
'Position', [335 122 365 138]);
add_line(blk, 'ri/1', 'cast/1');
reuse_block(blk, 'trig', 'built-in/inport', 'Position', [250 202 280 218], 'Port', '3');
reuse_block(blk, 'we', 'built-in/inport', 'Position', [250 162 280 178], 'Port', '2');
% basic_ctrl
clog('basic_ctrl block', 'snapshot_init_detailed_trace');
if strcmp(storage,'dram'),
dram = 'on';
word_size = 144;
else
dram = 'off';
word_size = data_width;
end
reuse_block(blk, 'basic_ctrl', 'casper_library_scopes/snapshot/basic_ctrl', ...
'dram', dram, 'data_width', num2str(word_size), ...
'Position', [395 73 455 307]);
add_line(blk, 'cast/1', 'basic_ctrl/2');
add_line(blk, 'we/1', 'basic_ctrl/3');
add_line(blk, 'trig/1', 'basic_ctrl/4');
if circ == 1
reuse_block(blk, 'stop', 'built-in/inport', 'Position', [250 282 280 298], 'Port', '4');
add_line(blk, 'stop/1', 'basic_ctrl/6');
else
% constant so that always stop
reuse_block(blk, 'never', 'xbsIndex_r4/Constant', ...
'arith_type', 'Boolean', 'const', '0', 'explicit_period', 'on', 'period', '1', ...
'Position', [250 282 280 298]);
add_line(blk, 'never/1', 'basic_ctrl/6');
end
% ctrl reg
reuse_block(blk, 'const0', 'built-in/Constant', 'Value', '0', 'Position', [180 240 200 260]);
reuse_block(blk, 'ctrl', 'xps_library/software_register', ...
'io_dir', 'From Processor', 'arith_types', '0', ...
'Position', [215 235 315 265]);
add_line(blk, 'const0/1', 'ctrl/1');
add_line(blk, 'ctrl/1', 'basic_ctrl/5');
% delay_block
if off == 1,
clog('delay block', 'snapshot_init_detailed_trace');
% offset register
reuse_block(blk, 'const1', 'built-in/Constant', 'Value', '10', 'Position', [180 320 200 340]);
reuse_block(blk, 'trig_offset', 'xps_library/software_register', ...
'io_dir', 'From Processor', 'arith_types', '0', ...
'Position', [215 314 315 346]);
add_line(blk, 'const1/1', 'trig_offset/1');
% block doing delay
reuse_block(blk, 'delay', 'casper_library_scopes/snapshot/delay', ...
'word_size', num2str(data_width/8), 'use_dsp48', use_dsp48, 'Position', [530 66 590 354]);
add_line(blk, 'basic_ctrl/1', 'delay/1'); %vin
add_line(blk, 'basic_ctrl/2', 'delay/2'); %din
add_line(blk, 'basic_ctrl/3', 'delay/3'); %we
add_line(blk, 'basic_ctrl/4', 'delay/4'); %goi
add_line(blk, 'basic_ctrl/5', 'delay/5'); %stopi
add_line(blk, 'basic_ctrl/6', 'delay/6'); %init
add_line(blk, 'trig_offset/1', 'delay/7'); %delay
else
% don't really have anything to do if no offset
end
% stop_gen block
reuse_block(blk, 'g_tr_en_cnt', 'built-in/Terminator', ...
'Position', [1030 367 1045 383]);
if circ == 1,
clog('stop_gen block', 'snapshot_init_detailed_trace');
reuse_block(blk, 'stop_gen', 'casper_library_scopes/snapshot/stop_gen', ...
'Position', [650 67 710 403]);
%join with delay or basic_ctrl
if off == 1, src = 'delay'; else src = 'basic_ctrl'; end
add_line(blk, [src,'/1'], 'stop_gen/1'); %vin
add_line(blk, [src,'/2'], 'stop_gen/2'); %din
add_line(blk, [src,'/3'], 'stop_gen/3'); %we
add_line(blk, [src,'/4'], 'stop_gen/4'); %go
add_line(blk, [src,'/5'], 'stop_gen/5'); %stop
add_line(blk, [src,'/6'], 'stop_gen/6'); %init
add_line(blk, 'ctrl/1', 'stop_gen/7'); %circ bit
%tr_en_cnt register
reuse_block(blk, 'tr_en_cnt', 'xps_library/software_register', ...
'io_dir', 'To Processor', 'arith_types', '0', ...
'Position', [905 360 1005 390]);
add_line(blk, 'tr_en_cnt/1', 'g_tr_en_cnt/1');
else
end
%add_gen block
% address counter must be full 32 for circular capture
% as used to track offset into vector
if circ == 1,
as = '32';
else
as = [num2str(nsamples),'+',num2str(log2(data_width/8)),'+1'];
end
%if using DRAM, write twice per address
if strcmp(storage,'dram'),
burst_size = 1;
else
burst_size = 0;
end
clog('add_gen block', 'snapshot_init_detailed_trace');
reuse_block(blk, 'add_gen', 'casper_library_scopes/snapshot/add_gen', ...
'nsamples', num2str(nsamples), 'counter_size', as, 'burst_size', num2str(burst_size), ...
'increment', num2str(data_width/8), 'use_dsp48', use_dsp48, ...
'Position', [770 71 830 404]);
% join to stop_gen block
if circ == 1,
src = 'stop_gen';
% join add_gen to: delay block
elseif off == 1,
src = 'delay';
% or basic block
else
src = 'basic_ctrl';
end
add_line(blk, [src,'/1'], 'add_gen/1'); % vin
add_line(blk, [src,'/2'], 'add_gen/2'); % din
add_line(blk, [src,'/3'], 'add_gen/3'); % we
add_line(blk, [src,'/4'], 'add_gen/4'); % go
add_line(blk, [src,'/5'], 'add_gen/5'); % cont
add_line(blk, [src,'/6'], 'add_gen/6'); % init
% status registers
reuse_block(blk, 'status', 'xps_library/software_register', ...
'io_dir', 'To Processor', 'arith_types', '0', ...
'Position', [905 305 1005 335]);
add_line(blk, 'add_gen/5', 'status/1');
reuse_block(blk, 'gstatus', 'built-in/Terminator', ...
'Position', [1030 312 1045 328]);
add_line(blk, 'status/1', 'gstatus/1');
%value in
reuse_block(blk, 'gval', 'built-in/Terminator', ...
'Position', [1030 92 1045 108]);
if val == 1,
clog('value in', 'snapshot_init_detailed_trace');
reuse_block(blk, 'vin', 'built-in/inport', 'Position', [180 82 210 98], 'Port', num2str(3+circ+1));
add_line(blk, 'vin/1', 'basic_ctrl/1');
% register
reuse_block(blk, 'val', 'xps_library/software_register', ...
'io_dir', 'To Processor', 'arith_types', '0', ...
'Position', [905 85 1005 115]);
add_line(blk, 'add_gen/1', 'val/1');
add_line(blk,'val/1', 'gval/1');
else %connect constant and terminate output
reuse_block(blk, 'vin_const', 'xbsIndex_r4/Constant', ...
'arith_type', 'Boolean', 'const', '0', 'explicit_period', 'on', 'period', '1', ...
'Position', [250 82 280 98]);
add_line(blk, 'vin_const/1', 'basic_ctrl/1');
add_line(blk, 'add_gen/1', 'gval/1');
end
if circ == 1,
add_line(blk, 'add_gen/6', 'tr_en_cnt/1');
else
add_line(blk, 'add_gen/6', 'g_tr_en_cnt/1');
end
%storage
clog('storage', 'snapshot_init_detailed_trace');
reuse_block(blk, 'add_del', 'xbsIndex_r4/Delay', ...
'latency', '1', 'Position', [880 145 905 165]);
add_line(blk, 'add_gen/2', 'add_del/1'); %add
reuse_block(blk, 'dat_del', 'xbsIndex_r4/Delay', ...
'latency', '1', 'Position', [880 200 905 220]);
add_line(blk, 'add_gen/3', 'dat_del/1'); %data
reuse_block(blk, 'we_del', 'xbsIndex_r4/Delay', ...
'latency', '1', 'Position', [880 255 905 275]);
add_line(blk, 'add_gen/4', 'we_del/1'); %we
if strcmp(storage, 'dram'),
%DRAM block
reuse_block(blk, 'dram', 'xps_library/dram', ...
'dimm', num2str(dram_dimm), 'ip_clock', num2str(dram_clock), ...
'disable_tag', 'on', 'use_sniffer', 'on', ...
'Position', [1110 108 1190 377]);
%inputs
reuse_block(blk, 'rst', 'xbsIndex_r4/Constant', ...
'arith_type', 'Boolean', 'const', '0', 'explicit_period', 'on', 'period', '1', ...
'Position', [1075 112 1090 128]);
add_line(blk, 'rst/1', 'dram/1');
add_line(blk, 'add_del/1', 'dram/2');
add_line(blk, 'dat_del/1', 'dram/3');
%wr_be
reuse_block(blk, 'w_all', 'xbsIndex_r4/Constant', ...
'arith_type', 'Unsigned', 'const', '2^18-1', ...
'n_bits', '18', 'bin_pt', '0', ...
'explicit_period', 'on', 'period', '1', ...
'Position', [1045 217 1090 233]);
add_line(blk, 'w_all/1', 'dram/4');
%RWn
reuse_block(blk, 'write', 'xbsIndex_r4/Constant', ...
'arith_type', 'Unsigned', 'const', '0', ...
'n_bits', '1', 'bin_pt', '0', ...
'explicit_period', 'on', 'period', '1', ...
'Position', [1075 252 1090 268]);
add_line(blk, 'write/1', 'dram/5');
%cmd_tag
reuse_block(blk, 'tag', 'xbsIndex_r4/Constant', ...
'arith_type', 'Unsigned', 'const', '0', ...
'n_bits', '32', 'bin_pt', '0', ...
'explicit_period', 'on', 'period', '1', ...
'Position', [1075 287 1090 303]);
add_line(blk, 'tag/1', 'dram/6');
%cmd_valid
add_line(blk, 'we_del/1', 'dram/7');
%rd_ack
reuse_block(blk, 'always', 'xbsIndex_r4/Constant', ...
'arith_type', 'Boolean', 'const', '1', ...
'explicit_period', 'on', 'period', '1', ...
'Position', [1075 357 1090 373]);
add_line(blk, 'always/1', 'dram/8');
%terminate outputs
reuse_block(blk, 'gcmd_ack', 'built-in/Terminator', ...
'Position', [1215 127 1230 143]);
add_line(blk, 'dram/1', 'gcmd_ack/1');
reuse_block(blk, 'gdout', 'built-in/Terminator', ...
'Position', [1215 182 1230 198]);
add_line(blk, 'dram/2', 'gdout/1');
reuse_block(blk, 'grd_tag', 'built-in/Terminator', ...
'Position', [1215 237 1230 253]);
add_line(blk, 'dram/3', 'grd_tag/1');
reuse_block(blk, 'grd_valid', 'built-in/Terminator', ...
'Position', [1215 292 1230 308]);
add_line(blk, 'dram/4', 'grd_valid/1');
reuse_block(blk, 'ready', 'built-in/outport', ...
'Port', '1', 'Position', [1210 347 1240 363]);
add_line(blk, 'dram/5', 'ready/1');
else
% shared BRAM
reuse_block(blk, 'bram', 'xps_library/Shared BRAM', ...
'data_width', num2str(data_width), 'addr_width', num2str(nsamples), ...
'Position', [930 129 1005 291]);
add_line(blk, 'add_del/1', 'bram/1');
add_line(blk, 'dat_del/1', 'bram/2');
add_line(blk, 'we_del/1', 'bram/3');
reuse_block(blk, 'gbram', 'built-in/Terminator', ...
'Position', [1030 202 1045 218]);
add_line(blk, 'bram/1', 'gbram/1');
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
% Set attribute format string (block annotation)
annotation=sprintf('');
set_param(blk,'AttributesFormatString',annotation);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting snapshot_init', 'trace');
|
github
|
mstrader/mlib_devel-master
|
clog.m
|
.m
|
mlib_devel-master/casper_library/clog.m
| 3,044 |
utf_8
|
4263071e799ea029e6fa79f05636e726
|
% Output logging information depending on current logging strategy.
%
% clog(msg, groups)
%
% msg = text msg to display
% groups = logging group/s
%
% All log messages contained in the groups specified by 'casper_log_groups' in your
% Workspace will be displayed if they are not in 'casper_nolog_groups'. If casper_log_groups
% is not defined, no log messages will be displayed.
%
% Pre-defined groups;
% 'all': allows all log entries to be displayed
% '<file_name>_debug': low-level debugging log entries for specific file
% 'trace': used to trace flow through files
% 'error': errors
%
% e.g casper_log_groups='trace', casper_nolog_groups={} - only 'trace' messages will be displayed
% e.g casper_log_groups={'all'}, casper_nolog_groups='trace' - log messages from any group except 'trace' will be dispalyed
% e.g casper_log_groups={'trace', 'error', 'adder_tree_init_debug'}, casper_nolog_groups = {'snap_init_debug'} - 'trace', 'error'
% and messages from the 'adder_tree_init_debug' groups will be displayed (where debug messages in 'adder_tree_init.m' are defined
% as belonging to the 'adder_tree_init_debug' group. 'snap_init_debug' messages will not be displayed however.
function clog(msg, groups)
%default names of workspace log-level related variables
sys_log_groups_var = 'casper_log_groups';
sys_nolog_groups_var = 'casper_nolog_groups';
%sys_log_file_var = 'casper_log_file'; %TODO output to file
if ~isa(groups,'cell'), groups = {groups}; end
% if a log level variable of the specified name does not exist in the base
% workspace exit immediately
if evalin('base', ['exist(''',sys_log_groups_var,''')']) == 0 return; end
sys_log_groups = evalin('base',sys_log_groups_var);
if ~isa(sys_log_groups,'cell'), sys_log_groups = {sys_log_groups}; end
sys_nolog_groups = {};
if evalin('base', ['exist(''',sys_nolog_groups_var,''')']) ~= 0,
sys_nolog_groups = evalin('base',sys_nolog_groups_var);
end
if ~isa(sys_nolog_groups,'cell'), sys_nolog_groups = {sys_nolog_groups}; end
loc_all = strmatch('all', sys_log_groups, 'exact');
ex_loc = [];
loc = [];
% convert single element into cell array for comparison
group_string = [];
for n = 1:length(groups),
group = groups{n};
%search for log group in log groups to exclude
ex_loc = strmatch(group, sys_nolog_groups, 'exact');
%bail out first time we find it in the list to exclude
if ~isempty(ex_loc) break; end
%search for log group in log groups to display
if isempty(loc), loc = strmatch(group, sys_log_groups, 'exact'); end
%generate group string as we go
if n ~= 1, group_string = [group_string, ', ']; end
group_string = [group_string, group];
end
%check message for sanity
if ~isa(msg,'char'),
if isa(msg, 'cell') && (length(msg) == 1) && (isa(msg{1}, 'char')),
msg = msg{1};
else,
error('clog: Not passing char arrays as messages');
return;
end
end
%display if found in one of groups to include and not excluded
if ~(isempty(loc) && isempty(loc_all)) && isempty(ex_loc) ,
disp([group_string,': ',msg]);
end
|
github
|
mstrader/mlib_devel-master
|
pfb_bitgrowth_calcs.m
|
.m
|
mlib_devel-master/casper_library/pfb_bitgrowth_calcs.m
| 3,735 |
utf_8
|
087b16438f49f9e0bcde12f162751474
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [max_gain bit_growth adder_n_bits_out adder_bin_pt_out] = pfb_bitgrowth_calcs(window_type, pfb_bits, total_taps, par_input_bits, bin_scaling, data_bitwidth, coeff_bitwidth)
% Compute the maximum gain through all of the 2^PFBSize sub-filters. This is
% used to determine how much bit growth is really needed. The gain of each
% filter is the sum of the absolute values of its coefficients. The maximum of
% these gains sets the upper bound on bit growth through the pfb_fir. The
% products, partial sums, and final sum throughout the pfb_fir (including the
% adder tree) need not accomodate any more bit growth than the absolute maximum
% gain requires, provided that any "overflow" is ignored (i.e. set to "Wrap").
% This works thanks to the wonders of modulo math. Note that the "gain" for
% typical signals will be different (less) than the absolute maximum gain of
% each filter. For Gaussian noise, the gain of a filter is the square root of
% the sum of the squares of the coefficients (aka root-sum-squares or RSS).
% Get all coefficients of the pfb_fir in one vector (by passing -1 for the tap index)
all_coeffs = pfb_coeff_gen_calc(window_type, pfb_bits, total_taps, -1, par_input_bits, 0, bin_scaling, 0, false);
% Rearrange into matrix with 2^PFBSize rows and TotalTaps columns.
% Each row contains coefficients for one sub-filter.
all_filters = reshape(all_coeffs, 2^pfb_bits, total_taps);
% Compute max gain (make sure it is at least 1).
% NB: sum rows, not columns!
max_gain = max(sum(abs(all_filters), 2));
if max_gain < 1
max_gain = 1;
end
% Compute bit growth
bit_growth = nextpow2(max_gain);
% Compute adder output width and binary point. We know that the adders in the
% adder tree need to have (bit_growth+1) non-fractional bits to accommodate the
% maximum gain. The products from the taps will have
% (BitWidthIn+CoeffBitWidth-2) fractional bits. We will preserve them through
% the adder tree.
adder_bin_pt_out = data_bitwidth + coeff_bitwidth - 2;
adder_n_bits_out = bit_growth + 1 + adder_bin_pt_out;
%end
|
github
|
mstrader/mlib_devel-master
|
spead_unpack_init.m
|
.m
|
mlib_devel-master/casper_library/spead_unpack_init.m
| 10,326 |
utf_8
|
7db1b8f64a2e34c641db60fccf6da3f8
|
function spead_unpack_init(block)
function rvname = get_port_name(counter)
if counter == 1,
rvname = 'hdr_heap_id';
elseif counter == 2,
rvname = 'hdr_heap_size';
elseif counter == 3,
rvname = 'hdr_heap_offset';
elseif counter == 4,
rvname = 'hdr_pkt_len';
else
if bitand(header_direct_mask, header_ids(counter)) == 0,
rvname = ['hdr', num2str(counter), '_', sprintf('0x%04x', header_ids(counter))];
else
rvname = ['hdr', num2str(counter), '_', sprintf('0x%04x_DIR', bitand(header_ids(counter), header_direct_mask-1))];
end
end
end
set_param(block, 'LinkStatus', 'inactive');
hdrs = get_param(block, 'header_ids');
hdrs_ind = get_param(block, 'header_ind_ids');
spead_msw = eval(get_param(block, 'spead_msw'));
spead_lsw = eval(get_param(block, 'spead_lsw'));
header_width_bits = spead_msw - spead_lsw;
header_direct_mask = pow2(header_width_bits-1);
% add a ONE on the MSb for the directly addressed headers
header_ids = spead_process_header_string(hdrs);
header_ids = [1,2,3,4,header_ids];
for ctr = 1 : length(header_ids),
thisval = header_ids(ctr);
newval = thisval + header_direct_mask;
%fprintf('%i - %i -> %i\n', ctr, header_ids(ctr), newval);
header_ids(ctr) = newval;
end
% add the indirect ones
header_ind_ids = spead_process_header_string(hdrs_ind);
header_ids = [header_ids, header_ind_ids];
combine_errors = strcmp(get_param(block, 'combine_errors'), 'on');
current_consts = find_system(block, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'RegExp' ,'on', 'name', '.*header_const[0-9]');
num_headers = length(header_ids);
if length(current_consts) == num_headers,
headers_match = true;
for ctr = 1 : num_headers,
val = eval(get_param(current_consts{ctr}, 'const'));
val2 = header_ids(ctr);
if val ~= val2,
headers_match = false;
end
end
else
headers_match = false;
end
% has the error option changed?
error_or_blk = find_system(block, 'LookUnderMasks', 'all', 'name', 'error_or');
error_change = false;
if (~isempty(error_or_blk) && (combine_errors == 0)) || (isempty(error_or_blk) && (combine_errors == 1)),
error_change = true;
end
% everything still the same?
if (headers_match == true) && (error_change == false),
return
end
if num_headers < 5,
error('Must have at least compulsory headers and data!');
end
num_total_hdrs = num2str(num_headers+1);
total_hdrs_bits = num2str(ceil(log2(num_headers+2)));
set_param([block, '/num_item_pts'], 'const', num2str(num_headers));
set_param([block, '/num_headers'], 'const', num_total_hdrs);
set_param([block, '/num_headers'], 'n_bits', total_hdrs_bits);
set_param([block, '/hdr_ctr'], 'n_bits', total_hdrs_bits);
delay = 1;
showname = 'off';
% remove existing header blocks and their lines
header_blks = find_system(block, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'RegExp' ,'on', 'name', '.*(hdr|header_).*[0-9]');
for b = 1 : length(header_blks),
blk = header_blks{b};
delete_block_lines(blk);
delete_block(blk);
end
% delete some lines that will be remade, possibly from other blocks
err_blks = find_system(block, 'LookUnderMasks', 'all', 'RegExp' ,'on', 'name', 'err.*');
for b = 1 : length(err_blks),
blk = err_blks{b};
delete_block_lines(blk);
end
% set the size of the error or block
if combine_errors == 1,
try delete_block([block, '/err_hdr']); catch eid, end
try delete_block([block, '/err_pktlen']); catch eid, end
reuse_block(block, 'error_or', 'xbsIndex_r4/Logical', ...
'showname', showname, 'logical_function', 'OR', ...
'inputs', num2str(2 + num_headers), ...
'Position', [1665, 150 + ((num_headers+1) * 75), 1720, 150 + ((num_headers+1) * 75) + ((num_headers+1) * 10)]);
reuse_block(block, 'eof_out_from', 'built-in/from', ...
'GotoTag', 'eof_out', 'showname', showname, ...
'Position', [1665, 220 + ((num_headers+1) * 75), 1720, 234 + ((num_headers+1) * 75)]);
reuse_block(block, 'error_gate', 'xbsIndex_r4/Logical', ...
'showname', showname, 'logical_function', 'AND', ...
'inputs', '2', ...
'Position', [1760, 150 + ((num_headers+1) * 75), 1800, 190 + ((num_headers+1) * 75)]);
reuse_block(block, 'error', 'built-in/outport', ...
'showname', 'on', 'Port', '5', ...
'Position', [1840, 1143, 1880, 1157]);
add_line(block, 'badpktand/1', 'error_or/1', 'autorouting', 'on');
add_line(block, 'hdr_chk/1', 'error_or/2', 'autorouting', 'on');
add_line(block, 'error_or/1', 'error_gate/1', 'autorouting', 'on');
add_line(block, 'eof_out_from/1', 'error_gate/2', 'autorouting', 'on');
add_line(block, 'error_gate/1', 'error/1', 'autorouting', 'on');
else
try delete_block([block, '/error_or']); catch eid, end
try delete_block([block, '/error']); catch eid, end
try delete_block([block, '/error_gate']); catch eid, end
reuse_block(block, 'err_pktlen', 'built-in/outport', ...
'showname', 'on', 'Port', '6', ...
'Position', [1755, 1143, 1785, 1157]);
reuse_block(block, 'err_hdr', 'built-in/outport', ...
'showname', 'on', 'Port', '5', ...
'Position', [1755, 1103, 1785, 1123]);
add_line(block, 'badpktand/1', 'err_pktlen/1', 'autorouting', 'on');
add_line(block, 'hdr_chk/1', 'err_hdr/1', 'autorouting', 'on');
end
% draw the blocks
for ctr = 1 : num_headers,
this_ctr = num2str(ctr);
name_from = ['header_from', this_ctr];
name_reg = ['header_reg', this_ctr];
name_delay = ['header_delay', this_ctr];
name_slice = ['header_slice', this_ctr];
name_slice2 = ['header_vslice', this_ctr];
name_relational = ['header_rel', this_ctr];
name_error = ['err_hdr', this_ctr];
name_constant = ['header_const', this_ctr];
name_out = get_port_name(ctr);
row_y = 70 + (ctr * 75);
row_x = 1500 - (ctr * 50);
reuse_block(block, name_from, 'built-in/from', ...
'GotoTag', 'hdr_word_change', 'showname', showname, ...
'Position', [row_x, row_y + 25, row_x + 10, row_y + 38]);
reuse_block(block, name_constant, 'xbsIndex_r4/Constant', ...
'showname', showname, 'const', num2str(header_ids(ctr)), ...
'arith_type', 'Unsigned', 'bin_pt', '0', ...
'n_bits', 'spead_msw - spead_lsw', ...
'Position', [row_x + 50, row_y + 50, row_x + 100, row_y + 60]);
reuse_block(block, name_reg, 'xbsIndex_r4/Register', ...
'showname', showname, 'en', 'on', ...
'Position', [row_x + 50, row_y, row_x + 100, row_y + 40]);
reuse_block(block, name_delay, 'xbsIndex_r4/Delay', ...
'showname', showname, 'Latency', num2str(delay+1), ...
'Position', [row_x + 210, row_y, row_x + 230, row_y + 20]);
reuse_block(block, name_slice2, 'xbsIndex_r4/Slice', ...
'showname', showname, 'nbits', 'spead_lsw', ...
'mode', 'Lower Bit Location + Width', ...
'bit0', '0', ...
'Position', [row_x + 150, row_y, row_x + 180, row_y + 20]);
reuse_block(block, name_slice, 'xbsIndex_r4/Slice', ...
'showname', showname, 'nbits', 'spead_msw - spead_lsw', ...
'mode', 'Upper Bit Location + Width', ...
'bit1', '0', ...
'Position', [row_x + 150, row_y + 25, row_x + 180, row_y + 45]);
reuse_block(block, name_relational, 'xbsIndex_r4/Relational', ...
'showname', showname, 'Latency', num2str(delay), ...
'mode', 'a!=b', ...
'Position', [row_x + 210, row_y + 28, row_x + 230, row_y + 48]);
if combine_errors == 1,
try delete_block([block, '/', name_error]); catch eid, end
outportnum = 5 + ctr;
else
reuse_block(block, name_error, 'built-in/outport', ...
'showname', 'on', 'Port', num2str(6 + (ctr*2)), ...
'Position', [1755, row_y+33, 1785, row_y + 47]);
outportnum = 6 + (ctr*2) - 1;
end
reuse_block(block, name_out, 'built-in/outport', ...
'showname', 'on', 'Port', num2str(outportnum), ...
'Position', [1755, row_y+3, 1785, row_y + 17]);
end
% connect them
for ctr = 1 : num_headers,
this_ctr = num2str(ctr);
name_from = ['header_from', this_ctr];
name_reg = ['header_reg', this_ctr];
name_delay = ['header_delay', this_ctr];
name_slice = ['header_slice', this_ctr];
name_slice2 = ['header_vslice', this_ctr];
name_relational = ['header_rel', this_ctr];
name_error = ['err_hdr', this_ctr];
name_constant = ['header_const', this_ctr];
name_out = get_port_name(ctr);
if ctr == num_headers,
add_line(block, ['from_gbe_data', '/1'], [name_reg, '/1'], 'autorouting', 'on');
else
last_reg = ['header_reg', num2str(ctr+1)];
add_line(block, [last_reg, '/1'], [name_reg, '/1'], 'autorouting', 'on');
end
if ctr == 1,
add_line(block, [name_reg, '/1'], 'reg_hdr_one/1', 'autorouting', 'on');
end
add_line(block, [name_from, '/1'], [name_reg, '/2'], 'autorouting', 'on');
add_line(block, [name_reg, '/1'], [name_slice, '/1'], 'autorouting', 'on');
add_line(block, [name_reg, '/1'], [name_slice2, '/1'], 'autorouting', 'on');
add_line(block, [name_slice, '/1'], [name_relational, '/1'], 'autorouting', 'on');
add_line(block, [name_slice2, '/1'], [name_delay, '/1'], 'autorouting', 'on');
add_line(block, [name_constant, '/1'], [name_relational, '/2'], 'autorouting', 'on');
add_line(block, [name_delay, '/1'], [name_out, '/1'], 'autorouting', 'on');
if combine_errors == 1,
add_line(block, [name_relational, '/1'], ['error_or/', num2str(ctr+2)], 'autorouting', 'on');
else
add_line(block, [name_relational, '/1'], [name_error, '/1'], 'autorouting', 'on');
end
ph = get_param([block, '/', name_delay], 'PortHandles');
set_param(ph.Outport(1), 'name', name_out);
ph = get_param([block, '/', name_slice], 'PortHandles');
set_param(ph.Outport(1), 'name', ['spid', this_ctr]);
ph = get_param([block, '/', name_relational], 'PortHandles');
set_param(ph.Outport(1), 'name', ['err', this_ctr]);
ph = get_param([block, '/', name_constant], 'PortHandles');
set_param(ph.Outport(1), 'name', ['exp', this_ctr]);
end
add_line(block, 'header_delay4/1', 'check_datalen/2', 'autorouting', 'on');
clean_blocks(block);
end
|
github
|
mstrader/mlib_devel-master
|
test_init.m
|
.m
|
mlib_devel-master/casper_library/test_init.m
| 3,629 |
utf_8
|
f5bef0cc276440735d97b2beb8941a23
|
% Run unit tests for a particular library
%
% test_init(blk, varargin)
%
% blk = The block to be configured.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% tests_location = location of unit tests and test scripts
% tests_file - The file containing the module components to test
% test_type = Type of test to run ('all', library 'section', individual 'unit')
% section = Name of section when testing library subsection or section containing unit
% block = Name of individual block to run unit tests for
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Karoo Array Telescope Project %
% www.kat.ac.za %
% Copyright (C) 2011 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function test_init(blk, varargin)
clog('entering test_init','trace');
check_mask_type(blk, 'test');
defaults = {'tests_location', '/opt/casper_git_devel/casper_library/Tests', ...
'tests_file', 'tester_input.txt', 'test_type', 'unit', ...
'subsection', 'Misc', 'block', 'adder_tree', 'stop_first_fail', 'on'};
tests_location = get_var('tests_location', 'defaults', defaults, varargin{:});
tests_file = get_var('tests_file', 'defaults', defaults, varargin{:});
test_type = get_var('test_type', 'defaults', defaults, varargin{:});
subsection = get_var('subsection', 'defaults', defaults, varargin{:});
block = get_var('block', 'defaults', defaults, varargin{:});
stop_first_fail = get_var('stop_first_fail', 'defaults', defaults, varargin{:});
clog('got variables','test_init_detailed_trace');
%make tests folder accessible
addpath(tests_location);
clog('added tests_location path','test_init_detailed_trace');
%may not actually be testing casper_library so unpollute namespace
close_system('casper_library',0);
clog('closed casper_library','test_init_detailed_trace');
test_library('tests_file', tests_file, 'test_type', ...
test_type, 'subsection', subsection, 'block', block, ...
'stop_first_fail', stop_first_fail);
%reload casper_library
load_system('casper_library');
rmpath(tests_location);
clog('exiting test_init', 'trace');
|
github
|
mstrader/mlib_devel-master
|
bus_scale_init.m
|
.m
|
mlib_devel-master/casper_library/bus_scale_init.m
| 6,194 |
utf_8
|
9514b9bb28ae88fa484ab1feadca7dde
|
function bus_scale_init(blk, varargin)
clog('entering bus_scale_init', 'trace');
defaults = { ...
'n_bits_in', [9 9 9 9], 'bin_pt_in', 8 , 'type_in', 1, 'cmplx', 'off', ...
'scale_factor', -1, 'misc', 'on', ...
};
check_mask_type(blk, 'bus_scale');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
xpos = 50; xinc = 80;
ypos = 50; yinc = 50;
port_w = 30; port_d = 14;
bus_expand_w = 50;
bus_create_w = 50;
scale_w = 50; scale_d = 60;
del_w = 30; del_d = 20;
n_bits_in = get_var('n_bits_in', 'defaults', defaults, varargin{:});
bin_pt_in = get_var('bin_pt_in', 'defaults', defaults, varargin{:});
type_in = get_var('type_in', 'defaults', defaults, varargin{:});
cmplx = get_var('cmplx', 'defaults', defaults, varargin{:});
scale_factor = get_var('scale_factor', 'defaults', defaults, varargin{:});
misc = get_var('misc', 'defaults', defaults, varargin{:});
delete_lines(blk);
%default state, do nothing
if isempty(n_bits_in),
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_scale_init','trace');
error('exiting bus_scale_init');
return;
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% check input lists for consistency %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
lenbi = length(n_bits_in); lenpi = length(bin_pt_in); lenti = length(type_in); lensf = length(scale_factor);
i = [lenbi, lenpi, lenti, lensf];
unique_i = unique(i);
compi = unique_i(length(unique_i));
too_many_i = length(unique_i) > 2;
conflict_i = (length(unique_i) == 2) && (unique_i(1) ~= 1);
if too_many_i | conflict_i,
error('conflicting component number for input bus');
clog('conflicting component number for input bus', 'error');
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% autocomplete input lists where necessary %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
comp = compi;
%replicate items if needed for a input
n_bits_in = repmat(n_bits_in, 1, compi/lenbi);
bin_pt_in = repmat(bin_pt_in, 1, compi/lenpi);
type_in = repmat(type_in, 1, compi/lenti);
scale_factor = repmat(scale_factor, 1, compi/lensf);
%if complex we need to double down on some of these
if strcmp(cmplx, 'on'),
compi = compi*2;
n_bits_in = reshape([n_bits_in; n_bits_in], 1, compi);
bin_pt_in = reshape([bin_pt_in; bin_pt_in], 1, compi);
type_in = reshape([type_in; type_in], 1, compi);
scale_factor = reshape([scale_factor; scale_factor], 1, compi);
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% at this point all input, output lists should match %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
clog(['n_bits_in = ',mat2str(n_bits_in)],'bus_scale_init_debug');
clog(['compi = ',num2str(compi)],'bus_scale_init_debug');
%%%%%%%%%%%%%%%
% input ports %
%%%%%%%%%%%%%%%
ypos_tmp = ypos + scale_d*compi/2;
reuse_block(blk, 'din', 'built-in/inport', ...
'Port', '1', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
ypos_tmp = ypos_tmp + yinc + scale_d*compi/2;
if strcmp(misc, 'on'),
reuse_block(blk, 'misci', 'built-in/inport', ...
'Port', '2', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
end
xpos = xpos + xinc + port_w/2;
%%%%%%%%%%%%%%
% bus expand %
%%%%%%%%%%%%%%
ypos_tmp = ypos + scale_d*compi/2; %reset ypos
outputWidth = mat2str(n_bits_in);
outputBinaryPt = mat2str(bin_pt_in);
outputArithmeticType = mat2str(type_in);
reuse_block(blk, 'debus', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of arbitrary size', ...
'outputWidth', outputWidth, ...
'outputBinaryPt', outputBinaryPt, ...
'outputArithmeticType', outputArithmeticType, ...
'show_format', 'on', 'outputToWorkspace', 'off', ...
'variablePrefix', '', 'outputToModelAsWell', 'on', ...
'Position', [xpos-bus_expand_w/2 ypos_tmp-scale_d*compi/2 xpos+bus_expand_w/2 ypos_tmp+scale_d*compi/2]);
add_line(blk, 'din/1', 'debus/1');
ypos_tmp = ypos_tmp + scale_d*(compi/2) + yinc;
xpos = xpos + xinc + bus_expand_w/2;
%%%%%%%%%%%%%%%
% scale layer %
%%%%%%%%%%%%%%%
ypos_tmp = ypos; %reset ypos
for index = 1:compi,
scale_name = ['scale',num2str(index)];
reuse_block(blk, scale_name, 'xbsIndex_r4/Scale', ...
'scale_factor', num2str(scale_factor(index)), ...
'Position', [xpos-scale_w/2 ypos_tmp xpos+scale_w/2 ypos_tmp+scale_d-20]);
ypos_tmp = ypos_tmp + scale_d;
add_line(blk, ['debus/',num2str(index)], [scale_name,'/1']);
end
%%%%%%%%%%%%%%%%%%%%
% create bus again %
%%%%%%%%%%%%%%%%%%%%
ypos_tmp = ypos + scale_d*compi/2;
xpos = xpos + xinc + bus_expand_w/2;
reuse_block(blk, 'bussify', 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(compi), ...
'Position', [xpos-bus_create_w/2 ypos_tmp-scale_d*compi/2 xpos+bus_create_w/2 ypos_tmp+scale_d*compi/2]);
for index = 1:compi,
add_line(blk, ['scale',num2str(index),'/1'], ['bussify/',num2str(index)]);
end
%%%%%%%%%%%%%%%%%
% output port/s %
%%%%%%%%%%%%%%%%%
ypos_tmp = ypos + scale_d*compi/2;
xpos = xpos + xinc + bus_create_w/2;
reuse_block(blk, 'dout', 'built-in/outport', ...
'Port', '1', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
add_line(blk, ['bussify/1'], ['dout/1']);
ypos_tmp = ypos + yinc + scale_d*compi;
if strcmp(misc, 'on'),
reuse_block(blk, 'misco', 'built-in/outport', ...
'Port', '2', ...
'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
add_line(blk, 'misci/1', 'misco/1');
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_scale_init','trace');
end %function bus_scale_init
|
github
|
mstrader/mlib_devel-master
|
check_mask_type.m
|
.m
|
mlib_devel-master/casper_library/check_mask_type.m
| 2,206 |
utf_8
|
1ee2b6b19b40afbf86c7824fa268bc7f
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function check_mask_type(blk,typename)
% Dumps/throws exception if mask type is incorrect.
%
% check_mask_type(blk,typename)
%
% blk - The block to check
% typename - A string which should match blk's MaskType
masktype = get_param(blk, 'MaskType');
if ~strcmp(masktype, typename),
ex = MException('casper:MaskTypeMismatch', ...
'Mask type of selected block (%s) does not match expected type (%s)', ...
masktype, typename);
dump_exception(ex);
throw(ex);
end
|
github
|
mstrader/mlib_devel-master
|
flatstrcell.m
|
.m
|
mlib_devel-master/casper_library/flatstrcell.m
| 2,188 |
utf_8
|
a900d5e6c6235ce45404221badf18a90
|
% Flattens a cell array into a string
%
% flatstrcell(c)
%
% c - The cell to flatten
%
% Recursively iterates through cell array provided, converting contents to
% strings and appending to a new string.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function flat = flatstrcell(c)
flat = '';
for i=1:length(c),
if iscell(c{i}),
flat = [flat, flatstrcell(c{i})];
else
flat = [flat, mat2str(c{i})];
% flat = [flat, tostring(c{i})];
end
end
end
|
github
|
mstrader/mlib_devel-master
|
is_library_block.m
|
.m
|
mlib_devel-master/casper_library/is_library_block.m
| 1,986 |
utf_8
|
f65b1f65fb594f6b2f0ceafe078a6eb8
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function tf=is_library_block(blk)
% Returns true if blk resides in a block diagram library.
%
% tf = is_library_block( blk )
%
% blk - The block whose residency is being checked
%
% tf = True is blk lives in a block diagram library
tf = strcmp(get_param(bdroot(blk),'BlockDiagramType'),'library');
end
|
github
|
mstrader/mlib_devel-master
|
lo_const_init.m
|
.m
|
mlib_devel-master/casper_library/lo_const_init.m
| 3,612 |
utf_8
|
e40d8d178b930f56740aa2a7d1cb9758
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% MeerKAT Radio Telescope Project %
% www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens (meerKAT) %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function lo_const_init(blk, varargin)
defaults = {};
check_mask_type(blk, 'lo_const');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
n_bits = get_var('n_bits','defaults', defaults, varargin{:});
phase = get_var('phase','defaults', defaults, varargin{:});
delete_lines(blk);
%default state in library
if n_bits == 0,
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
return;
end
reuse_block(blk, 'const1', 'xbsIndex_r4/Constant');
set_param([blk,'/const1'], ...
'const', sprintf('-imag(exp(phase*1j))'), ...
'n_bits', sprintf('n_bits'), ...
'bin_pt', sprintf('n_bits - 1'), ...
'explicit_period', sprintf('on'), ...
'Position', sprintf('[145 37 205 63]'));
reuse_block(blk, 'const', 'xbsIndex_r4/Constant');
set_param([blk,'/const'], ...
'const', sprintf('real(exp(phase*1j))'), ...
'n_bits', sprintf('n_bits'), ...
'bin_pt', sprintf('n_bits - 1'), ...
'explicit_period', sprintf('on'), ...
'Position', sprintf('[145 77 205 103]'));
reuse_block(blk, 'sin', 'built-in/Outport');
set_param([blk,'/sin'], ...
'Port', sprintf('1'), ...
'Position', sprintf('[235 48 265 62]'));
reuse_block(blk, 'cos', 'built-in/Outport');
set_param([blk,'/cos'], ...
'Port', sprintf('2'), ...
'Position', sprintf('[235 78 265 92]'));
add_line(blk,'const1/1','sin/1', 'autorouting', 'on');
add_line(blk,'const/1','cos/1', 'autorouting', 'on');
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
end % lo_const_init
|
github
|
mstrader/mlib_devel-master
|
pipeline_init.m
|
.m
|
mlib_devel-master/casper_library/pipeline_init.m
| 3,154 |
utf_8
|
36aac4cd87d67b2e508b74dbcf594a34
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pipeline_init(blk, varargin)
% Initialize and configure the pipeline block.
%
% pipeline_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% latency = number of cycles N to delay (z^-N)
% Declare any default values for arguments you might like.
defaults = {};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'pipeline');
munge_block(blk, varargin{:});
latency = get_var('latency', 'defaults', defaults, varargin{:});
delete_lines(blk);
if (latency < 0)
error('pipeline_init.m: Latency setting must be greater than or equal to 0');
return;
end
% Add ports
reuse_block(blk, 'd', 'built-in/inport', 'Position', [15 48 45 62], 'Port', '1');
reuse_block(blk, 'q', 'built-in/outport', 'Position', [latency*100+115 48 latency*100+145 62], 'Port', '1');
% Add register blocks
for z = 0:latency-1
reuse_block(blk, ['Register',num2str(z)], 'xbsIndex_r4/Register', ...
'en', 'off', ...
'Position', [100*z+115 27 100*z+175 83]);
end
% Connect blocks
if (latency == 0)
add_line(blk, 'd/1', 'q/1');
else
for z = 1:latency-1
add_line(blk, ['Register', num2str(z-1), '/1'], ['Register', num2str(z), '/1']);
end
add_line(blk, 'd/1', 'Register0/1');
add_line(blk, ['Register', num2str(latency-1), '/1'], 'q/1');
end
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
get_mask_params.m
|
.m
|
mlib_devel-master/casper_library/get_mask_params.m
| 1,972 |
utf_8
|
cf7a84aeffd958a0789a7f07bb4c8698
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2013 David MacMahon
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Function for building cell array to pass into mask init scripts.
%
% Typical usage:
%
% params = get_mask_params(gcb);
% my_mask_init(gcb, params{:});
function params = get_mask_params(blk)
mask_names = get_param(blk, 'MaskNames');
mask_values = get_param(blk, 'MaskValues');
params = [mask_names, mask_values]';
end
|
github
|
mstrader/mlib_devel-master
|
hashcell.m
|
.m
|
mlib_devel-master/casper_library/hashcell.m
| 2,009 |
utf_8
|
d2ba57dde3c7eea12bc8d3a3ccee1498
|
% Compute a hash of a cell
%
% hashcell(c)
%
% c - The cell array to hash
%
% Converts a cell cell array to a text string using flatstrcell and then
% returns a unique hash of that string using hashcode.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006-2007 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function hash = hashcell(c)
val = flatstrcell(c);
hash = hashcode(val);
end
|
github
|
mstrader/mlib_devel-master
|
bus_constant_init.m
|
.m
|
mlib_devel-master/casper_library/bus_constant_init.m
| 5,237 |
utf_8
|
b6de17f1dcdf17a0002432f983c19bc1
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% SKA Africa %
% http://www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function bus_constant_init(blk, varargin)
log_group = 'bus_constant_init_debug';
clog('entering bus_constant_init', {log_group, 'trace'});
defaults = { ...
'values', [1 1 1], ...
'n_bits', [8 8 1], ...
'bin_pts', [7 0 0], ...
'types', [1 0 2]};
check_mask_type(blk, 'bus_constant');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end %if
munge_block(blk, varargin{:});
xpos = 50; xinc = 80;
ypos = 50; yinc = 50;
port_w = 30; port_d = 14;
con_w = 100; con_d = 25;
bus_create_w = 80;
values = get_var('values', 'defaults', defaults, varargin{:});
n_bits = get_var('n_bits', 'defaults', defaults, varargin{:});
bin_pts = get_var('bin_pts', 'defaults', defaults, varargin{:});
types = get_var('types', 'defaults', defaults, varargin{:});
delete_lines(blk);
%default state, do nothing
if isempty(values),
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_constant_init', {log_group, 'trace'});
return;
end %if
lenv = length(values); lenb = length(n_bits); lenp = length(bin_pts); lent = length(types);
in = [lenv, lenb, lenp, lent];
comps = unique(in);
%if have more than 2 unique components or have two but one isn't 1
if ((length(comps) > 2) | (length(comps) == 2 && comps(1) ~= 1)),
clog('conflicting component sizes',{log_group, 'error'});
return;
end %if
comp_in = max(in);
%replicate items if needed for a input
values = repmat(values, 1, comp_in/lenv);
n_bits = repmat(n_bits, 1, comp_in/lenb);
bin_pts = repmat(bin_pts, 1, comp_in/lenp);
types = repmat(types, 1, comp_in/lent);
len = length(n_bits);
ypos_tmp = ypos + yinc/2;
xpos = xpos + con_w/2;
%constant layer
for index = 1:len,
if types(index) == 0, arith_type = 'Unsigned';
elseif types(index) == 1, arith_type = 'Signed (2''s comp)';
elseif types(index) == 2, arith_type = 'Boolean';
end
reuse_block(blk, ['constant', num2str(index-1)], 'xbsIndex_r4/Constant', ...
'const', num2str(values(index)), 'arith_type', arith_type, ...
'n_bits', num2str(n_bits(index)), 'bin_pt', num2str(bin_pts(index)), ...
'explicit_period', 'on', 'period', '1', ...
'Position', [xpos-con_w/2 ypos_tmp-con_d/2 xpos+con_w/2 ypos_tmp+con_d/2]);
ypos_tmp = ypos_tmp + yinc;
end %for
xpos = xpos + xinc + con_w/2;
%create bus
ypos_tmp = ypos + yinc*len/2;
xpos = xpos + bus_create_w/2;
reuse_block(blk, 'bus_create', 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(len), ...
'Position', [xpos-bus_create_w/2 ypos_tmp-yinc*len/2 xpos+bus_create_w/2 ypos_tmp+yinc*len/2]);
for index = 0:len-1,
add_line(blk, ['constant',num2str(index),'/1'], ['bus_create/',num2str(index+1)]);
end %for
xpos = xpos + xinc + bus_create_w/2;
%output port/s
xpos = xpos + port_w/2;
ypos_tmp = ypos + yinc*len/2;
reuse_block(blk, 'dout', 'built-in/outport', ...
'Port', '1', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
add_line(blk, ['bus_create/1'], ['dout/1']);
ypos_tmp = ypos_tmp + yinc + port_d/2;
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_constant_init', {log_group, 'trace'});
end %function bus_constant_init
|
github
|
mstrader/mlib_devel-master
|
caddsub_dsp48e_init.m
|
.m
|
mlib_devel-master/casper_library/caddsub_dsp48e_init.m
| 6,134 |
utf_8
|
dd07d0bc05e92f71a14f45451d1fe57e
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://casper.berkeley.edu %
% Copyright (C) 2010 William Mallard %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function caddsub_dsp48e_init (blk, varargin)
% Initialize and configure a cmult_dsp48e block.
%
% caddsub_dsp48e_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs.
%
% Valid varnames:
% * n_bits_a
% * bin_pt_a
% * n_bits_b
% * bin_pt_b
% * mode
% Set default vararg values.
defaults = { ...
'mode', 'Addition', ...
'n_bits_a', 18, ...
'bin_pt_a', 17, ...
'n_bits_b', 8, ...
'bin_pt_b', 7, ...
'full_precision', 'on', ...
'n_bits_c', 19, ...
'bin_pt_c', 17, ...
'quantization', 'Truncate', ...
'overflow', 'Wrap', ...
'cast_latency', 0, ...
};
% Skip init script if mask state has not changed.
if same_state(blk, 'defaults', defaults, varargin{:}),
return
end
% Verify that this is the right mask for the block.
check_mask_type(blk, 'caddsub_dsp48e');
% Disable link if state changes from default.
munge_block(blk, varargin{:});
% Retrieve input fields.
mode = get_var('mode', 'defaults', defaults, varargin{:});
n_bits_a = get_var('n_bits_a', 'defaults', defaults, varargin{:});
bin_pt_a = get_var('bin_pt_a', 'defaults', defaults, varargin{:});
n_bits_b = get_var('n_bits_b', 'defaults', defaults, varargin{:});
bin_pt_b = get_var('bin_pt_b', 'defaults', defaults, varargin{:});
full_precision = get_var('full_precision', 'defaults', defaults, varargin{:});
n_bits_c = get_var('n_bits_c', 'defaults', defaults, varargin{:});
bin_pt_c = get_var('bin_pt_c', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
overflow = get_var('overflow', 'defaults', defaults, varargin{:});
cast_latency = get_var('cast_latency', 'defaults', defaults, varargin{:});
% Validate input fields.
if (n_bits_a < 1),
errordlg([blk, ': Input ''a'' bit width must be greater than 0.']);
return
end
if (n_bits_b < 1),
errordlg([blk, ': Input ''b'' bit width must be greater than 0.']);
return
end
if (bin_pt_a < 0),
errordlg([blk, ': Input ''a'' binary point must be greater than 0.']);
return
end
if (bin_pt_b < 0),
errordlg([blk, ': Input ''b'' binary point must be greater than 0.']);
return
end
if (bin_pt_a > n_bits_a),
errordlg([blk, ': Input ''a'' binary point cannot exceed bit width.']);
return
end
if (bin_pt_b > n_bits_b),
errordlg([blk, ': Input ''b'' binary point cannot exceed bit width.']);
return
end
% Calculate bit widths and binary points.
max_non_frac = max(n_bits_a - bin_pt_a, n_bits_b - bin_pt_b);
max_bin_pt = max(bin_pt_a, bin_pt_b);
bin_pt_tmp = 24 - (max_non_frac + 2);
if strcmp(full_precision, 'on'),
n_bits_out = max_non_frac + max_bin_pt + 1;
bin_pt_out = max_bin_pt;
else,
n_bits_out = n_bits_c;
bin_pt_out = bin_pt_c;
end
% Validate derived values.
if (n_bits_out > 24),
errordlg([blk, ': Output bit width cannot exceed 24 bits real/imag. ', ...
'Current settings require ', num2str(n_bits_out), ' bits.']);
return
end
% Update sub-block parameters.
set_param([blk, '/realign_a_re'], ...
'bin_pt', num2str(bin_pt_tmp));
set_param([blk, '/realign_a_im'], ...
'bin_pt', num2str(bin_pt_tmp));
set_param([blk, '/realign_b_re'], ...
'bin_pt', num2str(bin_pt_tmp));
set_param([blk, '/realign_b_im'], ...
'bin_pt', num2str(bin_pt_tmp));
if strcmp(mode, 'Addition'),
set_param([blk, '/alumode'], 'const', '0');
elseif strcmp(mode, 'Subtraction'),
set_param([blk, '/alumode'], 'const', '3');
else,
errordlg([blk, ': Invalid add/sub mode.']);
return
end
set_param([blk, '/reinterp_c_re'], ...
'bin_pt', num2str(bin_pt_tmp));
set_param([blk, '/reinterp_c_im'], ...
'bin_pt', num2str(bin_pt_tmp));
set_param([blk, '/cast_c_re'], ...
'n_bits', num2str(n_bits_out), ...
'bin_pt', num2str(bin_pt_out), ...
'quantization', quantization, ...
'overflow', overflow, ...
'latency', num2str(cast_latency));
set_param([blk, '/cast_c_im'], ...
'n_bits', num2str(n_bits_out), ...
'bin_pt', num2str(bin_pt_out), ...
'quantization', quantization, ...
'overflow', overflow, ...
'latency', num2str(cast_latency));
% Set attribute format string (block annotation).
annotation_fmt = '%d_%d + %d_%d ==> %d_%d\nMode=%s\nLatency=%d';
annotation = sprintf(annotation_fmt, ...
n_bits_a, bin_pt_a, ...
n_bits_b, bin_pt_b, ...
n_bits_out, bin_pt_out, ...
mode, 2+cast_latency);
set_param(blk, 'AttributesFormatString', annotation);
% Save block state to stop repeated init script runs.
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
spead_pack_init.m
|
.m
|
mlib_devel-master/casper_library/spead_pack_init.m
| 9,435 |
utf_8
|
c3efe807cd5bd499908d8a2fc5e6d6cc
|
function spead_pack_init(block)
function rvname = get_port_name(counter)
if counter == 1,
rvname = 'hdr_heap_id';
elseif counter == 2,
rvname = 'hdr_heap_size';
elseif counter == 3,
rvname = 'hdr_heap_offset';
elseif counter == 4,
rvname = 'hdr_pkt_len_words';
else
if bitand(header_direct_mask, header_ids(counter)) == 0,
rvname = ['hdr', num2str(counter), '_', sprintf('0x%04x', header_ids(counter))];
else
rvname = ['hdr', num2str(counter), '_', sprintf('0x%04x_DIR', bitand(header_ids(counter), header_direct_mask-1))];
end
end
end
set_param(block, 'LinkStatus', 'inactive');
hdrs = get_param(block, 'header_ids');
hdrs_ind = get_param(block, 'header_ind_ids');
spead_msw = eval(get_param(block, 'spead_msw'));
spead_lsw = eval(get_param(block, 'spead_lsw'));
header_width_bits = spead_msw - spead_lsw;
header_direct_mask = pow2(header_width_bits-1);
% add a ONE on the MSb for the directly addressed headers
header_ids = spead_process_header_string(hdrs);
header_ids = [1,2,3,4,header_ids];
for ctr = 1 : length(header_ids),
thisval = header_ids(ctr);
newval = thisval + header_direct_mask;
%fprintf('%i - %i -> %i\n', ctr, header_ids(ctr), newval);
header_ids(ctr) = newval;
end
% add the indirect ones
header_ind_ids = spead_process_header_string(hdrs_ind);
header_ids = [header_ids, header_ind_ids];
current_consts = find_system(block, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'RegExp' ,'on', 'name', '.*header_const[0-9]');
num_headers = length(header_ids);
if length(current_consts) == num_headers,
all_match = true;
for ctr = 1 : num_headers,
val = eval(get_param(current_consts{ctr}, 'const'));
val2 = header_ids(ctr);
if val ~= val2,
all_match = false;
end
end
else
all_match = false;
end
if num_headers < 5,
error('Must have at least compulsory headers and data!');
end
num_total_hdrs = num2str(num_headers+1);
total_hdrs_bits = num2str(ceil(log2(num_headers+2)));
set_param([block, '/num_item_pts'], 'const', num2str(num_headers));
set_param([block, '/num_headers'], 'const', num_total_hdrs);
set_param([block, '/num_headers'], 'n_bits', total_hdrs_bits);
set_param([block, '/hdr_ctr'], 'cnt_to', num_total_hdrs, 'n_bits', total_hdrs_bits);
set_param([block, '/delay_data'], 'latency', num_total_hdrs);
set_param([block, '/delay_valid'], 'latency', num_total_hdrs);
% has the number of bytes per word changed?
padbits_new = log2(str2double(get_param(block, 'bytes_per_word')));
padbits_old = str2double(get_param([block, '/header_4const4'], 'n_bits'));
if padbits_new ~= padbits_old,
all_match = false;
%error(sprintf('fack %d %d', padbits_new, padbits_old))
end
% return if the headers were the same, nothing more to do
if all_match == true
return
end
% remove existing header blocks and their lines
header_blks = find_system(block, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'RegExp' ,'on', 'name', '.*(hdr|hdra_|header_).*[0-9]');
for b = 1 : length(header_blks),
blk = header_blks{b};
delete_block_lines(blk);
delete_block(blk);
end
% set the size of the output mux
set_param([block, '/mainmux'], 'inputs', num2str(2 + num_headers));
ph = get_param([block, '/', 'assert_data'], 'PortHandles');
line = get_param(ph.Outport(1), 'Line');
if line > -1,
delete_line(line);
end
% draw the blocks
showname = 'off';
for ctr = 1 : num_headers,
this_ctr = num2str(ctr);
name_in = get_port_name(ctr);
name_assert_in = ['hdra_', this_ctr];
name_delay_in = ['hdrd_', this_ctr];
name_to = ['header_to', this_ctr];
name_constant = ['header_const', this_ctr];
name_from = ['header_from', this_ctr];
name_concat = ['header_cat', this_ctr];
name_assert_id = ['header_assert', this_ctr];
row_y = 150 + (ctr * 30);
row_x = 20;
reuse_block(block, name_in, 'built-in/inport', ...
'showname', 'on', 'Port', num2str(3 + ctr), ...
'Position', [row_x, row_y, row_x + 30, row_y + 14]);
reuse_block(block, name_assert_in, 'xbsIndex_r4/Assert', ...
'showname', showname, 'assert_type', 'on', ...
'type_source', 'Explicitly', 'arith_type', 'Unsigned', ...
'bin_pt', '0', 'gui_display_data_type', 'Fixed-point', ...
'n_bits', 'spead_lsw', ...
'Position', [row_x + 50, row_y, row_x + 80, row_y + 14]);
% reuse_block(block, name_delay_in, 'xbsIndex_r4/Delay', ...
% 'showname', 'on', 'latency', num2str(num_headers + 1), ...
% 'Position', [row_x + 100, row_y, row_x + 120, row_y + 14]);
reuse_block(block, name_delay_in, 'xbsIndex_r4/Delay', ...
'showname', 'on', 'latency', num2str(ctr + 1), ...
'Position', [row_x + 100, row_y, row_x + 120, row_y + 14]);
reuse_block(block, name_to, 'built-in/goto', ...
'GotoTag', ['hdr_', this_ctr], 'showname', showname, ...
'Position', [row_x + 140, row_y, row_x + 160, row_y + 14]);
row_y = 150 + (ctr * 75);
row_x = 1340;
reuse_block(block, name_constant, 'xbsIndex_r4/Constant', ...
'showname', showname, 'const', num2str(header_ids(ctr)), ...
'arith_type', 'Unsigned', 'bin_pt', '0', ...
'n_bits', 'spead_msw - spead_lsw', ...
'Position', [row_x, row_y, row_x + 50, row_y + 14]);
% the pkt len is a special case, we need to convert it to bytes
if ctr == 4,
name_cast = ['header_4cast', this_ctr];
name_concat2 = ['header_4cat', this_ctr];
name_const2 = ['header_4const', this_ctr];
padbits = log2(str2double(get_param(block, 'bytes_per_word')));
reuse_block(block, name_from, 'built-in/from', ...
'GotoTag', ['hdr_', this_ctr], 'showname', showname, ...
'Position', [row_x - 145, row_y + 25, row_x - 95, row_y + 39]);
reuse_block(block, name_cast, 'xbsIndex_r4/Convert', ...
'showname', showname, 'arith_type', 'Unsigned', ...
'n_bits', ['spead_lsw - ', num2str(padbits)], ...
'bin_pt', '0', 'pipeline', 'on', ...
'Position', [row_x - 75, row_y + 25, row_x - 25, row_y + 39]);
reuse_block(block, name_const2, 'xbsIndex_r4/Constant', ...
'showname', showname, 'const', '0', ...
'arith_type', 'Unsigned', 'bin_pt', '0', ...
'n_bits', num2str(padbits), ...
'Position', [row_x - 75, row_y + 25 + 14 + 5, row_x - 25, row_y + 25 + 14 + 5 + 14]);
reuse_block(block, name_concat2, 'xbsIndex_r4/Concat', ...
'showname', showname, ...
'Position', [row_x, row_y + 25, row_x + 50, row_y + 39 + 14]);
else
reuse_block(block, name_from, 'built-in/from', ...
'GotoTag', ['hdr_', this_ctr], 'showname', showname, ...
'Position', [row_x, row_y + 25, row_x + 50, row_y + 39]);
end
reuse_block(block, name_concat, 'xbsIndex_r4/Concat', ...
'showname', showname, ...
'Position', [row_x + 75, row_y, row_x + 115, row_y + 40]);
reuse_block(block, name_assert_id, 'xbsIndex_r4/Assert', ...
'showname', showname, 'assert_type', 'on', ...
'type_source', 'Explicitly', 'arith_type', 'Unsigned', ...
'bin_pt', '0', 'gui_display_data_type', 'Fixed-point', ...
'n_bits', 'spead_msw', ...
'Position', [row_x + 130, row_y, row_x + 160, row_y + 14]);
end
% connect them
for ctr = 1 : num_headers,
this_ctr = num2str(ctr);
name_in = get_port_name(ctr);
name_assert_in = ['hdra_', this_ctr];
name_delay_in = ['hdrd_', this_ctr];
name_to = ['header_to', this_ctr];
name_constant = ['header_const', this_ctr];
name_from = ['header_from', this_ctr];
name_concat = ['header_cat', this_ctr];
name_assert_id = ['header_assert', this_ctr];
add_line(block, [name_in, '/1'], [name_assert_in, '/1'], 'autorouting', 'on');
add_line(block, [name_assert_in, '/1'], [name_delay_in, '/1'], 'autorouting', 'on');
add_line(block, [name_delay_in, '/1'], [name_to, '/1'], 'autorouting', 'on');
add_line(block, [name_constant, '/1'], [name_concat, '/1'], 'autorouting', 'on');
if ctr == 4,
name_cast = ['header_4cast', this_ctr];
name_concat2 = ['header_4cat', this_ctr];
name_const2 = ['header_4const', this_ctr];
add_line(block, [name_from, '/1'], [name_cast, '/1'], 'autorouting', 'on');
add_line(block, [name_cast, '/1'], [name_concat2, '/1'], 'autorouting', 'on');
add_line(block, [name_const2, '/1'], [name_concat2, '/2'], 'autorouting', 'on');
add_line(block, [name_concat2, '/1'], [name_concat, '/2'], 'autorouting', 'on');
else
add_line(block, [name_from, '/1'], [name_concat, '/2'], 'autorouting', 'on');
end
add_line(block, [name_concat, '/1'], [name_assert_id, '/1'], 'autorouting', 'on');
add_line(block, [name_assert_id, '/1'], ['mainmux/', num2str(ctr+2)], 'autorouting', 'on');
ph = get_param([block, '/', name_assert_in], 'PortHandles');
set_param(ph.Outport(1), 'name', name_in);
ph = get_param([block, '/', name_constant], 'PortHandles');
set_param(ph.Outport(1), 'name', ['spid', this_ctr]);
end
add_line(block, 'assert_data/1', ['mainmux/', num2str(3 + num_headers)], 'autorouting', 'on');
ph = get_param([block, '/', 'assert_data'], 'PortHandles');
set_param(ph.Outport(1), 'name', 'pkt_data');
end
|
github
|
mstrader/mlib_devel-master
|
mixer_init.m
|
.m
|
mlib_devel-master/casper_library/mixer_init.m
| 5,274 |
utf_8
|
b01aecded57a35193b273618d271f28b
|
% mixer_init(blk, varargin)
%
% blk = The block to initialize.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% freq_div = The (power of 2) denominator of the mixing frequency.
% freq = The numerator of the mixing frequency
% nstreams = The number of parallel streams provided
% n_bits = The bitwidth of samples out
% bram_latency = The latency of sine/cos lookup table
% mult_latency = The latency of mixer multiplier
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function mixer_init(blk, varargin)
% Declare any default values for arguments you might like.
defaults = {'n_bits', 8, 'bram_latency', 2, 'mult_latency', 3};
check_mask_type(blk, 'mixer');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
freq_div = get_var('freq_div','defaults', defaults, varargin{:});
freq = get_var('freq','defaults', defaults, varargin{:});
nstreams = get_var('nstreams','defaults', defaults, varargin{:});
n_bits = get_var('n_bits','defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency','defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency','defaults', defaults, varargin{:});
if nstreams == 0,
delete_lines(blk);
clean_blocks(blk);
set_param(blk,'AttributesFormatString','');
save_state(blk, 'defaults', defaults, varargin{:});
return;
end
counter_step = mod(nstreams * freq, freq_div);
if log2(nstreams) ~= round(log2(nstreams)),
error_string = 'The number of inputs must be a positive power of 2 integer';
errordlg(error_string);
end
delete_lines(blk);
reuse_block(blk, 'sync', 'built-in/inport', ...
'Position', [50 20 80 35], 'Port', '1');
reuse_block(blk, 'delay', 'xbsIndex_r4/Delay', ...
'latency', num2str(mult_latency), 'Position', [190 20 220 50]);
reuse_block(blk, 'sync_out', 'built-in/outport', ...
'Position', [250 20 280 35], 'Port', '1');
add_line(blk, 'sync/1', 'delay/1');
add_line(blk, 'delay/1', 'sync_out/1');
reuse_block(blk, 'dds', 'casper_library_downconverter/dds', ...
'Position', [20 100 80 100+30*nstreams], 'num_lo', num2str(nstreams), 'freq', num2str(freq),...
'freq_div', num2str(freq_div), 'n_bits', num2str(n_bits), 'latency','2');
if counter_step ~= 0,
add_line(blk, 'sync/1', 'dds/1')
end
for i=1:nstreams,
rcmult = ['rcmult',num2str(i)];
din = ['din',num2str(i)];
real = ['real',num2str(i)];
imag = ['imag',num2str(i)];
reuse_block(blk, din, 'built-in/inport', ...
'Position', [130 i*80-10 160 5+80*i], 'Port', num2str(i+1));
reuse_block(blk, real, 'built-in/outport', ...
'Position', [330 i*80-10 360 5+80*i], 'Port', num2str(2*i));
reuse_block(blk, imag, 'built-in/outport', ...
'Position', [330 i*80+25 360 40+80*i], 'Port', num2str(2*i+1));
reuse_block(blk, rcmult, 'casper_library_downconverter/rcmult', ...
'Position', [230 i*80-10 280 50+80*i], 'latency', num2str(mult_latency));
add_line(blk,[din,'/1'],[rcmult,'/1']);
add_line(blk,['dds/',num2str(i*2-1)],[rcmult,'/2']);
add_line(blk,['dds/',num2str(i*2)],[rcmult,'/3']);
add_line(blk, [rcmult,'/1'], [real,'/1']);
add_line(blk, [rcmult,'/2'], [imag,'/1']);
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
% Set attribute format string (block annotation)
annotation=sprintf('lo at -%d/%d',freq, freq_div);
set_param(blk,'AttributesFormatString',annotation);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
twiddle_general_callback.m
|
.m
|
mlib_devel-master/casper_library/twiddle_general_callback.m
| 2,169 |
utf_8
|
0a9ffa7c12ff0b18463da9b04ee260be
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Meerkat radio telescope project %
% www.kat.ac.za %
% Copyright (C) Andrew Martens 2013 %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function twiddle_general_callback(blk)
check_mask_type(blk, 'twiddle_general');
mask_names = get_param(blk, 'MaskNames');
mask_visibs = get_param(blk, 'MaskVisibilities');
use_hdl = get_param(blk,'use_hdl');
if( strcmp(use_hdl,'on')), use_embedded = 'off';
else, use_embedded = 'on';
end
set_param(blk, 'use_embedded', use_embedded);
mask_visibs{ismember(mask_names,'use_embedded')} = use_embedded;
set_param(blk, 'MaskVisibilities', mask_visibs);
end %function
|
github
|
mstrader/mlib_devel-master
|
last_tap_async_init.m
|
.m
|
mlib_devel-master/casper_library/last_tap_async_init.m
| 3,932 |
utf_8
|
15ca80a0a3975b7caa82a2b0b088e338
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function last_tap_async_init(blk, varargin)
% Initialize and configure the last tap of the Polyphase Filter Bank.
%
% last_tap_async_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% total_taps = Total number of taps in the PFB
% data_in_bits = Input Bitwidth
% data_out_bits = Output Bitwidth
% coeff_bits = Bitwidth of Coefficients.
% add_latency = Latency through each adder.
% mult_latency = Latency through each multiplier
% quantization = 'Truncate', 'Round (unbiased: +/- Inf)', or 'Round (unbiased: Even Values)'
% async - Asynchronous mode
% Declare any default values for arguments you might like.
defaults = {};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'last_tap_async');
munge_block(blk, varargin{:});
propagate_vars([blk,'/pfb_add_tree_async'], 'defaults', defaults, varargin{:});
use_hdl = get_var('use_hdl','defaults', defaults, varargin{:});
use_embedded = get_var('use_embedded','defaults', defaults, varargin{:});
total_taps = get_var('total_taps', 'defaults', defaults, varargin{:});
debug_mode = get_var('debug_mode', 'defaults', defaults, varargin{:});
input_num = get_var('input_num', 'defaults', defaults, varargin{:});
if strcmp(debug_mode, 'on'),
set_param([blk,'/split_data'], 'outputWidth', 'data_in_bits', 'outputBinaryPt', '0', 'outputArithmeticType', '0');
set_param([blk,'/interpret_coeff'], 'arith_type', 'Unsigned', 'bin_pt', '0');
else
set_param([blk,'/split_data'], 'outputWidth', 'data_in_bits', 'outputBinaryPt', 'data_in_bits - 1', 'outputArithmeticType', '1');
set_param([blk,'/interpret_coeff'], 'arith_type', 'Signed (2''s comp)', 'bin_pt', 'coeff_bits - 1');
end
set_param([blk,'/Mult'], 'use_embedded', use_embedded);
set_param([blk,'/Mult'], 'use_behavioral_HDL', use_hdl);
set_param([blk,'/Mult1'], 'use_embedded', use_embedded);
set_param([blk,'/Mult1'], 'use_behavioral_HDL', use_hdl);
fmtstr = sprintf('input(%d), tap(%d,%d)', input_num, total_taps, total_taps);
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
pfb_fir_real_init_old.m
|
.m
|
mlib_devel-master/casper_library/pfb_fir_real_init_old.m
| 7,628 |
utf_8
|
762380f37153b4d1d9b1ea5244879b05
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_fir_real_init(blk, varargin)
% Initialize and configure the Real Polyphase Filter Bank.
%
% pfb_fir_real_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% PFBSize = The size of the PFB
% TotalTaps = Total number of taps in the PFB
% WindowType = The type of windowing function to use.
% n_inputs = The number of parallel inputs
% MakeBiplex = Double up the PFB to feed a biplex FFT
% BitWidthIn = Input Bitwidth
% BitWidthOut = Output Bitwidth
% CoeffBitWidth = Bitwidth of Coefficients.
% CoeffDistMem = Implement coefficients in distributed memory
% add_latency = Latency through each adder.
% mult_latency = Latency through each multiplier
% bram_latency = Latency through each BRAM.
% quantization = 'Truncate', 'Round (unbiased: +/- Inf)', or 'Round
% (unbiased: Even Values)'
% fwidth = Scaling of the width of each PFB channel
% Declare any default values for arguments you might like.
defaults = {};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'pfb_fir_real');
munge_block(blk, varargin{:});
PFBSize = get_var('PFBSize', 'defaults', defaults, varargin{:});
TotalTaps = get_var('TotalTaps', 'defaults', defaults, varargin{:});
WindowType = get_var('WindowType', 'defaults', defaults, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
MakeBiplex = get_var('MakeBiplex', 'defaults', defaults, varargin{:});
BitWidthIn = get_var('BitWidthIn', 'defaults', defaults, varargin{:});
BitWidthOut = get_var('BitWidthOut', 'defaults', defaults, varargin{:});
CoeffBitWidth = get_var('CoeffBitWidth', 'defaults', defaults, varargin{:});
CoeffDistMem = get_var('CoeffDistMem', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
fwidth = get_var('fwidth', 'defaults', defaults, varargin{:});
if MakeBiplex, pols = 2;
else, pols = 1;
end
delete_lines(blk);
% Add ports
portnum = 1;
reuse_block(blk, 'sync', 'built-in/inport', ...
'Position', [0 50*portnum 30 50*portnum+15], 'Port', num2str(portnum));
reuse_block(blk, 'sync_out', 'built-in/outport', ...
'Position', [150*(TotalTaps+1) 50*portnum 150*(TotalTaps+1)+30 50*portnum+15], 'Port', num2str(portnum));
for p=1:pols,
for i=1:2^n_inputs,
portnum = portnum + 1; % Skip one to allow sync & sync_out to be 1
in_name = ['pol',num2str(p),'_in',num2str(i)];
out_name = ['pol',num2str(p),'_out',num2str(i)];
reuse_block(blk, in_name, 'built-in/inport', ...
'Position', [0 50*portnum 30 50*portnum+15], 'Port', num2str(portnum));
reuse_block(blk, out_name, 'built-in/outport', ...
'Position', [150*(TotalTaps+1) 50*portnum 150*(TotalTaps+1)+30 50*portnum+15], 'Port', num2str(portnum));
end
end
% Add Blocks
portnum = 0;
for p=1:pols,
for i=1:2^n_inputs,
portnum = portnum + 1;
for t=1:TotalTaps,
if t==1,
src_blk = 'casper_library/PFBs/first_tap_real';
name = ['pol',num2str(p),'_in',num2str(i),'_first_tap'];
elseif t==TotalTaps,
src_blk = 'casper_library/PFBs/last_tap_real';
name = ['pol',num2str(p),'_in',num2str(i),'_last_tap'];
else,
src_blk = 'casper_library/PFBs/tap_real';
name = ['pol',num2str(p),'_in',num2str(i),'_tap',num2str(t)];
end
reuse_block(blk, name, src_blk, ...
'Position', [150*t 50*portnum 150*t+100 50*portnum+30]);
propagate_vars([blk,'/',name],'defaults', defaults, varargin{:});
if t==1,
set_param([blk,'/',name], 'nput', num2str(i-1));
end
end
end
end
% Add Lines
for p=1:pols,
for i=1:2^n_inputs,
for t=1:TotalTaps,
in_name = ['pol',num2str(p),'_in',num2str(i)];
out_name = ['pol',num2str(p),'_out',num2str(i)];
if t==1,
blk_name = ['pol',num2str(p),'_in',num2str(i),'_first_tap'];
add_line(blk, [in_name,'/1'], [blk_name,'/1']);
add_line(blk, 'sync/1', [blk_name,'/2']);
elseif t==TotalTaps,
blk_name = ['pol',num2str(p),'_in',num2str(i),'_last_tap'];
if t==2,
prev_blk_name = ['pol',num2str(p),'_in',num2str(i),'_first_tap'];
else,
prev_blk_name = ['pol',num2str(p),'_in',num2str(i),'_tap',num2str(t-1)];
end
for n=1:4, add_line(blk, [prev_blk_name,'/',num2str(n)], [blk_name,'/',num2str(n)]);
end
add_line(blk, [blk_name,'/1'], [out_name,'/1']);
if i==1 && p==1, add_line(blk, [blk_name,'/2'], 'sync_out/1');
end
else,
blk_name = ['pol',num2str(p),'_in',num2str(i),'_tap',num2str(t)];
if t==2,
prev_blk_name = ['pol',num2str(p),'_in',num2str(i),'_first_tap'];
else,
prev_blk_name = ['pol',num2str(p),'_in',num2str(i),'_tap',num2str(t-1)];
end
for n=1:4, add_line(blk, [prev_blk_name,'/',num2str(n)], [blk_name,'/',num2str(n)]);
end
end
end
end
end
clean_blocks(blk);
fmtstr = sprintf('taps=%d, add_latency=%d', TotalTaps, add_latency);
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
bitsnap_init.m
|
.m
|
mlib_devel-master/casper_library/bitsnap_init.m
| 11,624 |
utf_8
|
44598ef7357819ba2a6ced2f6042edac
|
% A wrapped snapshot block
%
% bitsnap_init(blk, varargin)
%
% blk = The block to be configured.
% varargin = {'varname', 'value', ...} pairs
%
%
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% % %
% % Meerkat radio telescope project %
% % www.kat.ac.za %
% % Copyright (C) Paul Prozesky 2013 %
% % %
% % This program is free software; you can redistribute it and/or modify %
% % it under the terms of the GNU General Public License as published by %
% % the Free Software Foundation; either version 2 of the License, or %
% % (at your option) any later version. %
% % %
% % This program is distributed in the hope that it will be useful, %
% % but WITHOUT ANY WARRANTY; without even the implied warranty of %
% % MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% % GNU General Public License for more details. %
% % %
% % You should have received a copy of the GNU General Public License along %
% % with this program; if not, write to the Free Software Foundation, Inc., %
% % 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% % %
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%
% Wrap a software_register and specify bit slices to and from the 32-bit
% register. These will automatically be processed by the toolflow.
%
function bitsnap_init(blk)
% get values from the mask
snap_storage = get_param(blk, 'snap_storage');
snap_dram_dimm = eval(get_param(blk, 'snap_dram_dimm'));
snap_dram_clock = eval(get_param(blk, 'snap_dram_clock'));
snap_nsamples = eval(get_param(blk, 'snap_nsamples'));
snap_data_width = eval(get_param(blk, 'snap_data_width'));
snap_circap = get_param(blk, 'snap_circap');
snap_offset = get_param(blk, 'snap_offset');
snap_value = get_param(blk, 'snap_value');
snap_use_dsp48 = get_param(blk, 'snap_use_dsp48');
snap_delay = eval(get_param(blk, 'snap_delay'));
io_names = get_param(blk, 'io_names');
io_widths = eval(get_param(blk, 'io_widths'));
io_bps = eval(get_param(blk, 'io_bps'));
io_types = eval(get_param(blk, 'io_types'));
extra_names = get_param(blk, 'extra_names');
extra_widths = eval(get_param(blk, 'extra_widths'));
extra_bps = eval(get_param(blk, 'extra_bps'));
extra_types = eval(get_param(blk, 'extra_types'));
io_names = textscan(strtrim(strrep(strrep(strrep(strrep(io_names, ']', ''), '[', ''), ',', ' '), ' ', ' ')), '%s');
io_names = io_names{1};
extra_names = textscan(strtrim(strrep(strrep(strrep(strrep(extra_names, ']', ''), '[', ''), ',', ' '), ' ', ' ')), '%s');
extra_names = extra_names{1};
% check lengths and whatnot
if (numel(io_names) ~= numel(io_widths)) || (numel(io_names) ~= numel(io_bps)) || (numel(io_names) ~= numel(io_types)) || (numel(io_names) < 1),
error('Lengths of IO fields must match and be >0.');
end
num_ios = numel(io_names);
% check that the widths of the inputs are not greater than the snap width
if sum(io_widths) > snap_data_width,
error('%i-bit wide snapshot chosen, but %i bit inputs specified.', snap_data_width, sum(io_widths));
end
% extra vars
if (numel(extra_names) ~= numel(extra_widths)) || (numel(extra_names) ~= numel(extra_bps)) || (numel(extra_names) ~= numel(extra_types)) || (numel(extra_names) < 1),
error('Lengths of Extra fields must match and be >0.');
end
num_extras = numel(extra_names);
% check that the widths of the extras are not greater than the extra register width
if sum(extra_widths) > 32,
error('%i bit extras specified do not fit into 32-bit wide extra value register.', sum(extra_widths), 32);
end
munge_block(blk);
delete_lines(blk);
% add the inputs, outputs and gateway out blocks, drawing lines between them
x_size = 100;
y_size = 20;
x_start = 100;
y_pos = 100;
% the bus create block
reuse_block(blk, 'buscreate', 'casper_library_flow_control/bus_create', ...
'Position', [x_start + (x_size * 2), y_pos + (y_size * (num_ios - 0.5)), x_start + (x_size * 2) + x_size, y_pos + (y_size * (num_ios + 5.5))], ...
'inputNum', num2str(num_ios));
if snap_delay > 0,
%reuse_block(blk, 'io_delay', 'xbsIndex_r4/Delay', 'latency', num2str(snap_delay), 'reg_retiming', 'on', ...
% 'Position', [x_start + (x_size * 3.5), y_pos - (y_size * 0.5), x_start + (x_size * 3.5) + x_size, y_pos + (y_size * 0.5)]);
reuse_block(blk, 'io_delay', 'casper_library_delays/pipeline', 'latency', num2str(snap_delay), ...
'Position', [x_start + (x_size * 3.5), y_pos - (y_size * 0.5), x_start + (x_size * 3.5) + x_size, y_pos + (y_size * 0.5)]);
end
% the snapshot block
%'Position', [x_start + (x_size * 5), y_pos + (y_size * (num_ios - 0.5)), x_start + (x_size * 5) + x_size, y_pos + (y_size * 10)], ...
reuse_block(blk, 'ss', 'casper_library_scopes/snapshot', ...
'storage', snap_storage, ...
'dram_dimm', num2str(snap_dram_dimm), ...
'dram_clock', num2str(snap_dram_clock), ...
'nsamples', num2str(snap_nsamples), ...
'data_width', num2str(snap_data_width), ...
'offset', snap_offset, ...
'circap', snap_circap, ...
'value', snap_value, ...
'use_dsp48', snap_use_dsp48);
if snap_delay > 0,
add_line(blk, 'buscreate/1', 'io_delay/1');
add_line(blk, 'io_delay/1', 'ss/1');
else
add_line(blk, 'buscreate/1', 'ss/1');
end
function stype = type_to_string(arith_type)
switch arith_type
case 0
stype = 'Unsigned';
return
case 1
stype = 'Signed (2''s comp)';
return
case 2
stype = 'Boolean';
return
otherwise
error('Unknown type %i', arith_type);
end
end
% io ports and assert blocks
y_pos_row = y_pos;
for p = 1 : num_ios,
x_start = 80;
in_name = sprintf('in_%s', char(io_names(p)));
assert_name = sprintf('assert_%s', char(io_names(p)));
if io_types(p) == 2
gddtype = 'Boolean';
else
gddtype = 'Fixed-point';
end
reuse_block(blk, in_name, 'built-in/inport', ...
'Port', num2str(p), ...
'Position', [x_start, y_pos_row, x_start + (x_size/2), y_pos_row + y_size]);
x_start = x_start + (x_size*1.5);
reuse_block(blk, assert_name, 'xbsIndex_r4/Assert', ...
'showname', 'off', 'assert_type', 'on', ...
'type_source', 'Explicitly', 'arith_type', type_to_string(io_types(p)), ...
'bin_pt', num2str(io_bps(p)), 'gui_display_data_type', gddtype, ...
'n_bits', num2str(io_widths(p)), ...
'Position', [x_start, y_pos_row, x_start + (x_size/2), y_pos_row + y_size]);
add_line(blk, [in_name, '/1'], [assert_name, '/1']);
add_line(blk, [assert_name, '/1'], ['buscreate/', num2str(p)]);
y_pos_row = y_pos_row + (y_size * 2);
end
% we
portnum = num_ios + 1;
snapport = 2;
y1 = 165;
reuse_block(blk, 'we', 'built-in/inport', ...
'Port', num2str(portnum), ...
'Position', [485, y1, 535, y1+y_size]);
if snap_delay > 0,
reuse_block(blk, 'we_delay', 'casper_library_delays/pipeline', 'latency', num2str(snap_delay), ...
'Position', [545, y1, 595, y1+y_size]);
add_line(blk, 'we/1', 'we_delay/1');
add_line(blk, 'we_delay/1', ['ss/', num2str(snapport)]);
else
add_line(blk, 'we/1', ['ss/', num2str(snapport)]);
end
% trigger
portnum = portnum + 1; y1 = y1 + 50; snapport = snapport + 1;
reuse_block(blk, 'trig', 'built-in/inport', ...
'Port', num2str(portnum), ...
'Position', [485, y1, 535, y1+y_size]);
if snap_delay > 0,
reuse_block(blk, 'trig_delay', 'casper_library_delays/pipeline', 'latency', num2str(snap_delay), ...
'Position', [545, y1, 595, y1+y_size]);
add_line(blk, 'trig/1', 'trig_delay/1');
add_line(blk, 'trig_delay/1', ['ss/', num2str(snapport)]);
else
add_line(blk, 'trig/1', ['ss/', num2str(snapport)]);
end
% stop
if strcmp(snap_circap, 'on'),
portnum = portnum + 1; y1 = y1 + 50; snapport = snapport + 1;
reuse_block(blk, 'stop', 'built-in/inport', ...
'Port', num2str(portnum), ...
'Position', [485, y1, 535, y1+y_size]);
if snap_delay > 0,
reuse_block(blk, 'stop_delay', 'casper_library_delays/pipeline', 'latency', num2str(snap_delay), ...
'Position', [545, y1, 595, y1+y_size]);
add_line(blk, 'stop/1', 'stop_delay/1');
add_line(blk, 'stop_delay/1', ['ss/', num2str(snapport)]);
else
add_line(blk, 'stop/1', ['ss/', num2str(snapport)]);
end
end
% extra value
if strcmp(snap_value, 'on'),
% buscreate block
reuse_block(blk, 'extracreate', 'casper_library_flow_control/bus_create', ...
'Position', [x_start + (x_size * 1), y_pos + 500 + (y_size * (num_extras - 0.5)), x_start + (x_size * 1) + x_size, y_pos + 500 + (y_size * (num_extras + 5.5))], ...
'inputNum', num2str(num_extras));
if snap_delay > 0,
reuse_block(blk, 'extra_delay', 'casper_library_delays/pipeline', 'latency', num2str(snap_delay), ...
'Position', [x_start + (x_size * 3.5), y_pos + 500 - (y_size * 0.5), x_start + (x_size * 3.5) + x_size, y_pos + 500 + (y_size * 0.5)]);
end
snapport = snapport + 1;
if snap_delay > 0,
add_line(blk, 'extracreate/1', 'extra_delay/1');
add_line(blk, 'extra_delay/1', ['ss/', num2str(snapport)]);
else
add_line(blk, 'extracreate/1', ['ss/', num2str(snapport)]);
end
% draw an input port for each field for the extra value
for p = 1 : num_extras,
x_start = 100;
in_name = sprintf('extra_%s', char(extra_names(p)));
assert_name = sprintf('assextra_%s', char(extra_names(p)));
if extra_types(p) == 2
gddtype = 'Boolean';
else
gddtype = 'Fixed-point';
end
reuse_block(blk, in_name, 'built-in/inport', ...
'Port', num2str(p + portnum), ...
'Position', [x_start, y_pos_row + 500, x_start + (x_size/2), y_pos_row + 500 + y_size]);
x_start = x_start + (x_size*1.5);
reuse_block(blk, assert_name, 'xbsIndex_r4/Assert', ...
'showname', 'off', 'assert_type', 'on', ...
'type_source', 'Explicitly', 'arith_type', type_to_string(extra_types(p)), ...
'bin_pt', num2str(extra_bps(p)), 'gui_display_data_type', gddtype, ...
'n_bits', num2str(extra_widths(p)), ...
'Position', [x_start, y_pos_row + 500, x_start + (x_size/2), y_pos_row + 500 + y_size]);
add_line(blk, [in_name, '/1'], [assert_name, '/1']);
add_line(blk, [assert_name, '/1'], ['extracreate/', num2str(p)]);
y_pos_row = y_pos_row + (y_size*2.5);
end
end
% remove unconnected blocks
clean_blocks(blk);
%save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bitsnap_init','trace');
% end of main function
end
|
github
|
mstrader/mlib_devel-master
|
hashcode.m
|
.m
|
mlib_devel-master/casper_library/hashcode.m
| 256 |
utf_8
|
5a84c502ade173420a0c7046a083949d
|
%Generates 32-bit hash from character array
%
%hash = hashcode(str)
%
%str = character array
function hash = hashcode(str)
str = uint32(str(:))';
hash = uint32(1234);
for c = str
hash = mod(hash*31 + c, 2^27);
end
end
|
github
|
mstrader/mlib_devel-master
|
pfb_async_tap_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_async_tap_init.m
| 5,403 |
utf_8
|
f143dfbd211110409f57c0c48f541f0b
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_async_tap_init(blk, varargin)
% Initialize and configure the taps of the asynchronous Polyphase Filter Bank.
%
% pfb_async_tap_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% pfb_bits = The size of the PFB
% coeff_bits = Bitwidth of coefficients.
% total_taps = Total number of taps in the PFB
% data_in_bits = Input bitwidth
% mult_latency = Latency through each multiplier
% bram_latency = Latency through each BRAM.
% simul_bits = The number of parallel inputs
% fwidth = Scaling of the width of each PFB channel
% async = Enable the block to take a valid signal
% Declare any default values for arguments you might like.
defaults = {};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'tap_async');
munge_block(blk, varargin{:});
total_taps = get_var('total_taps', 'defaults', defaults, varargin{:});
this_tap = get_var('this_tap', 'defaults', defaults, varargin{:});
use_hdl = get_var('use_hdl','defaults', defaults, varargin{:});
use_embedded = get_var('use_embedded','defaults', defaults, varargin{:});
%async = get_var('async','defaults', defaults, varargin{:});
debug_mode = get_var('debug_mode','defaults', defaults, varargin{:});
if (this_tap == 0) || (this_tap >= total_taps),
error('Tap number must be >0 and <= %d\n', total_taps)
end
eblk = find_system(blk, 'lookUnderMasks', 'all', 'FollowLinks','on', 'SearchDepth', 1, 'Name', 'taps_in');
if this_tap > 1,
if isempty(eblk),
% delete line from ri_to_c to port
delete_line(blk, 'tapout_delay/1', 'taps_out/1');
% the in port
reuse_block(blk, 'taps_in', 'built-in/inport', ...
'Position', [35 247 65 263], 'Port', '5');
% concat block
reuse_block(blk, 'tapcat', 'xbsIndex_r4/Concat', ...
'Position', [985 217 1005 268], 'num_inputs', '2');
% move the out port
reuse_block(blk, 'taps_out', 'built-in/outport', ...
'Position', [1075 238 1105 252], 'Port', '5');
% line from port to concat
add_line(blk, 'taps_in/1', 'tapcat/2');
% line from ri_to_c to concat
add_line(blk, 'tapout_delay/1', 'tapcat/1');
% line from concat to taps outport
add_line(blk, 'tapcat/1', 'taps_out/1');
end
else
if ~isempty(eblk),
delete_line(blk, 'taps_in/1', 'tapcat/2');
delete_line(blk, 'tapout_delay/1', 'tapcat/1');
delete_line(blk, 'tapcat/1', 'taps_out/1');
reuse_block(blk, 'taps_out', 'built-in/outport', ...
'Position', [865 198 895 212], 'Port', '5');
add_line(blk, 'tapout_delay/1', 'taps_out/1');
end
end
if strcmp(debug_mode, 'on'),
set_param([blk,'/split_data'], 'outputWidth', 'data_in_bits', 'outputBinaryPt', '0', 'outputArithmeticType', '0');
set_param([blk,'/interpret_coeff'], 'arith_type', 'Unsigned', 'bin_pt', '0');
else
set_param([blk,'/split_data'], 'outputWidth', 'data_in_bits', 'outputBinaryPt', 'data_in_bits - 1', 'outputArithmeticType', '1');
set_param([blk,'/interpret_coeff'], 'arith_type', 'Signed (2''s comp)', 'bin_pt', 'coeff_bits - 1');
end
set_param([blk,'/Mult'],'use_embedded', use_embedded);
set_param([blk,'/Mult'],'use_behavioral_HDL', use_hdl);
set_param([blk,'/Mult1'],'use_embedded', use_embedded);
set_param([blk,'/Mult1'],'use_behavioral_HDL', use_hdl)
clean_blocks(blk);
fmtstr = sprintf('tap(%d/%d)', this_tap, total_taps);
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
adder_tree_init.m
|
.m
|
mlib_devel-master/casper_library/adder_tree_init.m
| 6,049 |
utf_8
|
bd43ca24bfedee8d7e26d9c130ed1ff6
|
% Create a tree of adders.
%
% adder_tree_init(blk, varargin)
%
% blk = The block to be configured.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% n_inputs = Number of inputs
% latency = Latency per adder
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function adder_tree_init(blk,varargin)
clog('entering adder_tree_init', 'trace');
check_mask_type(blk, 'adder_tree');
defaults = {'n_inputs', 3, 'latency', 1, 'first_stage_hdl', 'off', 'adder_imp', 'Fabric'};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('adder_tree_init: post same_state', 'trace');
munge_block(blk, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
latency = get_var('latency', 'defaults', defaults, varargin{:});
first_stage_hdl = get_var('first_stage_hdl', 'defaults', defaults, varargin{:});
adder_imp = get_var('adder_imp', 'defaults', defaults, varargin{:});
hw_selection = adder_imp;
if strcmp(adder_imp,'on'),
first_stage_hdl = 'on';
end
if strcmp(adder_imp, 'Behavioral'),
behavioral = 'on';
hw_selection = 'Fabric';
else,
behavioral = 'off';
end
stages = ceil(log2(n_inputs));
delete_lines(blk);
% Take care of sync
reuse_block(blk, 'sync', 'built-in/inport', 'Position', [30 10 60 25], 'Port', '1');
reuse_block(blk, 'sync_delay', 'xbsIndex_r4/Delay', ...
'latency', num2str(stages*latency), 'reg_retiming', 'on', ...
'Position', [30+50 10 60+50 40]);
reuse_block(blk, 'sync_out', 'built-in/outport', 'Position', [30+(stages+1)*100 10 60+(stages+1)*100 25], ...
'Port', '1');
add_line(blk, 'sync/1', 'sync_delay/1');
add_line(blk, 'sync_delay/1', 'sync_out/1');
% Take care of adder tree
for i=1:n_inputs,
reuse_block(blk, ['din',num2str(i)], 'built-in/inport', 'Position', [30 i*40+20 60 35+40*i]);
end
reuse_block(blk, 'dout', 'built-in/outport', 'Position', [30+(stages+1)*100 40 60+(stages+1)*100 55]);
% If nothing to add, connect in to out
if stages==0
add_line(blk,'din1/1','dout/1');
else
% Make adder tree
cur_n = n_inputs;
stage = 0;
blk_cnt = 0;
blks = {};
while cur_n > 1,
n_adds = floor(cur_n / 2);
n_dlys = mod(cur_n, 2);
cur_n = n_adds + n_dlys;
prev_blks = blks;
blks = {};
stage = stage + 1;
for j=1:cur_n,
blk_cnt = blk_cnt + 1;
if j <= n_adds,
addr = ['addr',num2str(blk_cnt)];
blks{j} = addr;
reuse_block(blk, addr, 'xbsIndex_r4/AddSub', ...
'latency', num2str(latency), ...
'use_behavioral_HDL', behavioral, 'hw_selection', hw_selection, ...
'pipelined', 'on', 'use_rpm', 'on', ...
'Position', [30+stage*100 j*80-40 70+stage*100 j*80+20]);
if stage == 1,
set_param([blk,'/',addr], 'use_behavioral_HDL', first_stage_hdl);
add_line(blk,['din',num2str((j*2-1)),'/1'],[addr,'/1']);
add_line(blk,['din',num2str((j*2)),'/1'],[addr,'/2']);
else,
add_line(blk,[prev_blks{2*j-1},'/1'],[addr,'/1']);
add_line(blk,[prev_blks{2*j},'/1'],[addr,'/2']);
end
else,
dly = ['dly',num2str(blk_cnt)];
blks{j} = dly;
reuse_block(blk, dly, 'xbsIndex_r4/Delay', ...
'latency', num2str(latency), ...
'reg_retiming', 'on', ...
'Position', [30+stage*100 j*80-40 70+stage*100 j*80+20]);
if stage == 1,
add_line(blk,['din',num2str((j*2-1)),'/1'],[dly,'/1']);
else,
add_line(blk,[prev_blks{2*j-1},'/1'],[dly,'/1']);
end
end
end
end
add_line(blk,[blks{1},'/1'],['dout/1']);
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
% Set attribute format string (block annotation)
annotation=sprintf('latency %d',stages*latency);
set_param(blk,'AttributesFormatString',annotation);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting adder_tree_init', 'trace');
|
github
|
mstrader/mlib_devel-master
|
hilbert_init.m
|
.m
|
mlib_devel-master/casper_library/hilbert_init.m
| 9,507 |
utf_8
|
d921e57eac167cbc024af072c883cc91
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% SKASA %
% www.kat.ac.za %
% Copyright (C) Andrew Martens 2013 %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function hilbert_init(blk, varargin)
clog('entering hilbert_init', {'trace', 'hilbert_init_debug'});
% Set default vararg values.
defaults = { ...
'n_inputs', 1, ...
'BitWidth', 18, ...
'bin_pt_in', 'BitWidth-1', ...
'add_latency', 1, ...
'conv_latency', 1, ...
'misc', 'off', ...
};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'hilbert');
munge_block(blk, varargin{:});
% Retrieve values from mask fields.
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
BitWidth = get_var('BitWidth', 'defaults', defaults, varargin{:});
bin_pt_in = get_var('bin_pt_in', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
conv_latency = get_var('conv_latency', 'defaults', defaults, varargin{:});
misc = get_var('misc', 'defaults', defaults, varargin{:});
delete_lines(blk);
%default setup for library
if n_inputs == 0,
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting hilbert_init',{'trace','hilbert_init_debug'});
return;
end
%
% input ports
%
reuse_block(blk, 'a', 'built-in/Inport', 'Port', '1', 'Position', [25 48 55 62]);
reuse_block(blk, 'b', 'built-in/Inport', 'Port', '2', 'Position', [25 198 55 212]);
%
% rearrange real and imaginary parts of inputs
%
reuse_block(blk, 'munge_a', 'casper_library_flow_control/munge', 'Position', [80 37 120 73]);
reuse_block(blk, 'munge_b', 'casper_library_flow_control/munge', 'Position', [80 187 120 223]);
for name = {'munge_a', 'munge_b'},
set_param([blk, '/', name{1}], ...
'divisions', num2str(2*n_inputs), ...
'div_size', mat2str(repmat(BitWidth, 1, 2*n_inputs)), ...
'order', mat2str([[0:2:(n_inputs-1)*2],[1:2:(n_inputs-1)*2+1]]));
end
add_line(blk,'b/1','munge_b/1');
add_line(blk,'a/1','munge_a/1');
%
% separate real and imaginary parts
%
reuse_block(blk, 'bus_expand_a', 'casper_library_flow_control/bus_expand', 'Position', [140 29 190 76]);
reuse_block(blk, 'bus_expand_b', 'casper_library_flow_control/bus_expand', 'Position', [140 179 190 226]);
for name = {'bus_expand_a', 'bus_expand_b'},
set_param([blk, '/', name{1}], ...
'mode', 'divisions of equal size', ...
'outputNum', '2', 'OutputWidth', num2str(BitWidth*n_inputs), ...
'outputBinaryPt', '0', 'outputArithmeticType', '0');
end
add_line(blk,'munge_a/1','bus_expand_a/1');
add_line(blk,'munge_b/1','bus_expand_b/1');
%
% do the addition and subtraction
%
reuse_block(blk, 'add_even_real', 'casper_library_bus/bus_addsub', 'opmode', '0', 'Position', [255 29 300 76]);
reuse_block(blk, 'sub_odd_imag', 'casper_library_bus/bus_addsub', 'opmode', '1', 'Position', [255 104 300 151]);
reuse_block(blk, 'sub_even_imag', 'casper_library_bus/bus_addsub', 'opmode', '1', 'Position', [255 179 300 226]);
reuse_block(blk, 'add_odd_real', 'casper_library_bus/bus_addsub', 'opmode', '0', 'Position', [255 254 300 301]);
for name = {'add_even_real', 'sub_odd_imag', 'sub_even_imag', 'add_odd_real'};
set_param([blk,'/',name{1}], ...
'n_bits_a', mat2str(repmat(BitWidth, 1, n_inputs)), 'bin_pt_a', num2str(bin_pt_in), 'type_a', '1', ...
'n_bits_b', mat2str(repmat(BitWidth, 1, n_inputs)), 'bin_pt_b', num2str(bin_pt_in), 'type_b', '1', ...
'n_bits_out', mat2str(repmat(BitWidth+1, 1, n_inputs)), 'bin_pt_out', num2str(bin_pt_in), 'type_out', '1', ...
'cmplx', 'off', 'misc', 'off', 'latency', 'add_latency', ...
'quantization', '0', 'overflow', '0');
end
add_line(blk,'bus_expand_a/1','add_even_real/1');
add_line(blk,'bus_expand_b/1','add_even_real/2');
add_line(blk,'bus_expand_a/1','sub_odd_imag/2');
add_line(blk,'bus_expand_b/1','sub_odd_imag/1');
add_line(blk,'bus_expand_a/2','sub_even_imag/1');
add_line(blk,'bus_expand_b/2','sub_even_imag/2');
add_line(blk,'bus_expand_a/2','add_odd_real/1');
add_line(blk,'bus_expand_b/2','add_odd_real/2');
%
% join components for common operations
%
reuse_block(blk, 'Concat', 'xbsIndex_r4/Concat', 'num_inputs', '4', 'Position', [330 20 360 315]);
add_line(blk,'add_even_real/1','Concat/1');
add_line(blk,'sub_odd_imag/1','Concat/2');
add_line(blk,'sub_even_imag/1','Concat/3');
add_line(blk,'add_odd_real/1','Concat/4');
reuse_block(blk, 'bus_scale', 'casper_library_bus/bus_scale', ...
'n_bits_in', mat2str(repmat(BitWidth+1, 1, n_inputs*4)), 'bin_pt_in', 'bin_pt_in', 'type_in', '1', ...
'scale_factor', '-1', 'misc', 'off', 'cmplx', 'off', ...
'Position', [380 156 420 184]);
add_line(blk,'Concat/1','bus_scale/1');
reuse_block(blk, 'bus_convert', 'casper_library_bus/bus_convert', ...
'n_bits_in', mat2str(repmat(BitWidth+1, 1, n_inputs*4)), 'bin_pt_in', 'bin_pt_in+1', ...
'n_bits_out', num2str(BitWidth), 'bin_pt_out', 'bin_pt_in', ...
'quantization', '2', 'overflow', '0', ... %TODO Wrap for overflow?
'cmplx', 'off', 'of', 'off', 'latency', 'conv_latency', 'misc', 'off', ...
'Position', [440 156 480 184]);
add_line(blk,'bus_scale/1','bus_convert/1');
%
% separate components so can put in correct place
%
reuse_block(blk, 'bus_expand', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of equal size', ...
'outputNum', '4', 'OutputWidth', num2str(BitWidth*n_inputs), ...
'outputBinaryPt', '0', 'outputArithmeticType', '0', ...
'Position', [505 107 555 233]);
add_line(blk,'bus_convert/1','bus_expand/1');
reuse_block(blk, 'ri_to_c', 'casper_library_misc/ri_to_c', 'Position', [605 114 645 156]);
add_line(blk,'bus_expand/3','ri_to_c/2');
add_line(blk,'bus_expand/1','ri_to_c/1');
reuse_block(blk, 'ri_to_c1', 'casper_library_misc/ri_to_c', 'Position', [605 204 645 246]);
add_line(blk,'bus_expand/2','ri_to_c1/2');
add_line(blk,'bus_expand/4','ri_to_c1/1');
%
% reorder outputs so that real and imaginary parts are interspersed
%
reuse_block(blk, 'munge_even', 'casper_library_flow_control/munge', ...
'Position', [670 117 710 153]);
reuse_block(blk, 'munge_odd', 'casper_library_flow_control/munge', ...
'Position', [670 207 710 243]);
for name = {'munge_even', 'munge_odd'},
set_param([blk, '/', name{1}], ...
'divisions', num2str(n_inputs*2), ...
'div_size', mat2str(repmat(BitWidth, 1, n_inputs*2)), ...
'order', mat2str(reshape([[0:(n_inputs-1)];[n_inputs:(n_inputs*2)-1]], 1, n_inputs*2)));
end
add_line(blk,'ri_to_c/1','munge_even/1');
add_line(blk,'ri_to_c1/1','munge_odd/1');
%
% output ports
%
reuse_block(blk, 'even', 'built-in/Outport', ...
'Port', sprintf('1'), ...
'Position', sprintf('[735 128 765 142]'));
add_line(blk,'munge_even/1','even/1');
reuse_block(blk, 'odd', 'built-in/Outport', ...
'Port', sprintf('2'), ...
'Position', sprintf('[735 218 765 232]'));
add_line(blk,'munge_odd/1','odd/1');
%
% miscellaneous input
%
if strcmp(misc, 'on'),
reuse_block(blk, 'misci', 'built-in/Inport', 'Port', '3', 'Position', [25 348 55 362]);
reuse_block(blk, 'dmisc', 'xbsIndex_r4/Delay', 'reg_retiming', 'on', ...
'latency', 'add_latency+conv_latency', 'Position', [380 344 420 366]);
add_line(blk,'misci/1', 'dmisc/1');
reuse_block(blk, 'misco', 'built-in/Outport', 'Port', '3', 'Position', [735 348 765 362]);
add_line(blk,'dmisc/1', 'misco/1');
end
% Delete all unconnected blocks.
clean_blocks(blk);
% Save block state to stop repeated init script runs.
save_state(blk, 'defaults', defaults, varargin{:});
end % hilbert_init
|
github
|
mstrader/mlib_devel-master
|
bus_mult_init.m
|
.m
|
mlib_devel-master/casper_library/bus_mult_init.m
| 19,945 |
utf_8
|
5cebaf1b41fe199338001da05207d7b8
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% SKA Africa %
% http://www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function bus_mult_init(blk, varargin)
log_group = 'bus_mult_init_debug';
clog('entering bus_mult_init', {log_group, 'trace'});
% Set default vararg values.
% reg_retiming is not an actual parameter of this block, but it is included
% in defaults so that same_state will return false for blocks drawn prior to
% adding reg_retiming='on' to some of the underlying Delay blocks.
defaults = { ...
'n_bits_a', 0, 'bin_pt_a', 4, 'type_a', 1, 'cmplx_a', 'off', ...
'n_bits_b', [4], 'bin_pt_b', 3, 'type_b', 1, 'cmplx_b', 'on', ...
'n_bits_out', 12 , 'bin_pt_out', 7, 'type_out', 1, ...
'overflow', 0, 'quantization', 0, 'misc', 'on', ...
'mult_latency', 3, 'add_latency', 1 , 'conv_latency', 1, ...
'max_fanout', 2, 'fan_latency', 0, ...
'multiplier_implementation', 'behavioral HDL', ...
'reg_retiming', 'on', ...
};
check_mask_type(blk, 'bus_mult');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
xpos = 50; xinc = 80;
ypos = 50; yinc = 50;
port_w = 30; port_d = 14;
rep_w = 50; rep_d = 30;
bus_expand_w = 50;
bus_create_w = 50;
mult_w = 50; mult_d = 60;
del_w = 30; del_d = 20;
n_bits_a = get_var('n_bits_a', 'defaults', defaults, varargin{:});
bin_pt_a = get_var('bin_pt_a', 'defaults', defaults, varargin{:});
type_a = get_var('type_a', 'defaults', defaults, varargin{:});
cmplx_a = get_var('cmplx_a', 'defaults', defaults, varargin{:});
n_bits_b = get_var('n_bits_b', 'defaults', defaults, varargin{:});
bin_pt_b = get_var('bin_pt_b', 'defaults', defaults, varargin{:});
type_b = get_var('type_b', 'defaults', defaults, varargin{:});
cmplx_b = get_var('cmplx_b', 'defaults', defaults, varargin{:});
n_bits_out = get_var('n_bits_out', 'defaults', defaults, varargin{:});
bin_pt_out = get_var('bin_pt_out', 'defaults', defaults, varargin{:});
type_out = get_var('type_out', 'defaults', defaults, varargin{:});
overflow = get_var('overflow', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
conv_latency = get_var('conv_latency', 'defaults', defaults, varargin{:});
max_fanout = get_var('max_fanout', 'defaults', defaults, varargin{:});
fan_latency = get_var('fan_latency', 'defaults', defaults, varargin{:});
misc = get_var('misc', 'defaults', defaults, varargin{:});
multiplier_implementation = get_var('multiplier_implementation', 'defaults', defaults, varargin{:});
delete_lines(blk);
%default state, do nothing
if (n_bits_a == 0 | n_bits_b == 0),
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_mult_init', {log_group, 'trace'});
return;
end
%%%%%%%%%%%%%%%%%%%%%%
% parameter checking %
%%%%%%%%%%%%%%%%%%%%%%
if max_fanout < 1,
clog('Maximum fanout must be 1 or greater', {'error', log_group});
error('Maximum fanout must be 1 or greater');
end
%need complex multiplication and will reduce fanout by two automatically
if strcmp(cmplx_a, 'on') && strcmp(cmplx_b, 'on'),
dup_latency = fan_latency - 1;
max_fanout = max_fanout*2;
else,
dup_latency = fan_latency;
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% check input lists for consistency %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
lenba = length(n_bits_a); lenpa = length(bin_pt_a); lenta = length(type_a);
a = [lenba, lenpa, lenta];
unique_a = unique(a);
compa = unique_a(length(unique_a));
lenbb = length(n_bits_b); lenpb = length(bin_pt_b); lentb = length(type_b);
b = [lenbb, lenpb, lentb];
unique_b = unique(b);
compb = unique_b(length(unique_b));
lenbo = length(n_bits_out); lenpo = length(bin_pt_out); lento = length(type_out);
lenq = length(quantization); leno = length(overflow);
o = [lenbo, lenpo, lento, lenq, leno];
unique_o = unique(o);
compo = unique_o(length(unique_o));
too_many_a = length(unique_a) > 2;
conflict_a = (length(unique_a) == 2) && (unique_a(1) ~= 1);
if too_many_a | conflict_a,
error('conflicting component number for bus a');
clog('conflicting component number for bus a', {'error', log_group});
end
too_many_b = length(unique_b) > 2;
conflict_b = (length(unique_b) == 2) && (unique_b(1) ~= 1);
if too_many_b | conflict_b,
error('conflicting component number for bus b');
clog('conflicting component number for bus b', {'error', log_group});
end
too_many_o = length(unique_o) > 2;
conflict_o = (length(unique_o) == 2) && (unique_o(1) ~= 1);
if too_many_o | conflict_o,
error('conflicting component number for output bus');
clog('conflicting component number for output bus', {'error', log_group});
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% autocomplete input lists where necessary %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
comp = max(compa, compb);
%replicate items if needed for a input
n_bits_a = repmat(n_bits_a, 1, compa/lenba);
bin_pt_a = repmat(bin_pt_a, 1, compa/lenpa);
type_a = repmat(type_a, 1, compa/lenta);
%if complex we need to double down on some of these
if strcmp(cmplx_a, 'on'),
if ~strcmp(cmplx_b, 'on'),
compa = compa*2;
n_bits_a = reshape([n_bits_a; n_bits_a], 1, compa);
bin_pt_a = reshape([bin_pt_a; bin_pt_a], 1, compa);
type_a = reshape([type_a; type_a], 1, compa);
end
end
%replicate items if needed for b input
n_bits_b = repmat(n_bits_b, 1, compb/lenbb);
bin_pt_b = repmat(bin_pt_b, 1, compb/lenpb);
type_b = repmat(type_b, 1, compb/lentb);
if strcmp(cmplx_b, 'on'),
if ~strcmp(cmplx_a, 'on'), %if only one input complex, then double number outputs
compb = compb*2;
n_bits_b = reshape([n_bits_b; n_bits_b], 1, compb);
bin_pt_b = reshape([bin_pt_b; bin_pt_b], 1, compb);
type_b = reshape([type_b; type_b], 1, compb);
end
end
%replicate items if needed for output
compo = comp;
n_bits_out = repmat(n_bits_out, 1, comp/lenbo);
bin_pt_out = repmat(bin_pt_out, 1, comp/lenpo);
type_out = repmat(type_out, 1, comp/lento);
overflow = repmat(overflow, 1, comp/leno);
quantization = repmat(quantization, 1, comp/lenq);
if (strcmp(cmplx_b, 'on') & ~strcmp(cmplx_a, 'on')) || (strcmp(cmplx_a, 'on') & ~strcmp(cmplx_b, 'on')),
compo = comp*2;
n_bits_out = reshape([n_bits_out; n_bits_out], 1, compo);
bin_pt_out = reshape([bin_pt_out; bin_pt_out], 1, compo);
type_out = reshape([type_out; type_out], 1, compo);
overflow = reshape([overflow; overflow], 1, compo);
quantization= reshape([quantization; quantization], 1, compo);
end
%%%%%%%%%%%%%%%%%%
% fanout control %
%%%%%%%%%%%%%%%%%%
fa = compo/compa; fb = compo/compb;
if strcmp(cmplx_a, 'on'),
fa = fa*2;
%if complex, fanout can only be a multiple of 2 (on the conservative side)
max_fanouta = max(1, floor(max_fanout/2)*2);
else,
max_fanouta = max_fanout;
end
if strcmp(cmplx_b, 'on'),
fb = fb*2;
%if complex, fanout can only be a multiple of 2 (on the conservative side)
max_fanoutb = max(1, floor(max_fanout/2)*2);
else
max_fanoutb = max_fanout;
end
dupa = ceil(fa/max_fanouta); dupb = ceil(fb/max_fanoutb);
%change constants to cater for fanout
compa = compa*dupa; type_a = repmat(type_a, 1, dupa) ;
n_bits_a = repmat(n_bits_a, 1, dupa); bin_pt_a = repmat(bin_pt_a, 1, dupa);
compb = compb*dupb; type_b = repmat(type_b, 1, dupb) ;
n_bits_b = repmat(n_bits_b, 1, dupb); bin_pt_b = repmat(bin_pt_b, 1, dupb);
%initial connection vector
if strcmp(cmplx_b, 'on') && ~strcmp(cmplx_a,'on'),
a_src = reshape(repmat([1:compa], ceil(compo/compa), 1), 1, ceil(compo/compa)*compa);
else,
a_src = repmat([1:compa], 1, ceil(compo/compa));
end
if strcmp(cmplx_a, 'on') && ~strcmp(cmplx_b,'on'),
b_src = reshape(repmat([1:compb], ceil(compo/compb), 1), 1, ceil(compo/compb)*compb);
else,
b_src = repmat([1:compb], 1, ceil(compo/compb));
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% at this point all a, b, output lists should match %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
clog(['n_bits_a = ',mat2str(n_bits_a)], log_group);
clog(['n_bits_b = ',mat2str(n_bits_b)], log_group);
clog(['n_bits_out = ',mat2str(n_bits_out)], log_group);
clog(['bin_pt_out = ',mat2str(bin_pt_out)], log_group);
clog(['type_out = ',mat2str(type_out)], log_group);
clog(['overflow = ',mat2str(overflow)], log_group);
clog(['quantization = ',mat2str(quantization)], log_group);
clog(['duplication factors => a: ',num2str(dupa),' b: ',num2str(dupb)], log_group);
clog(['compa = ',num2str(compa), ' compb = ',num2str(compb), ' compo = ', num2str(compo)], log_group);
clog(['connection vector for port a = ',mat2str(a_src)], log_group);
clog(['connection vector for port b = ',mat2str(b_src)], log_group);
%%%%%%%%%%%%%%%
% input ports %
%%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compa/2;
reuse_block(blk, 'a', 'built-in/inport', ...
'Port', '1', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
ypos_tmp = ypos_tmp + yinc + mult_d*(compa/2 + compb/2);
reuse_block(blk, 'b', 'built-in/inport', ...
'Port', '2', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
ypos_tmp = ypos_tmp + yinc + mult_d*compb/2;
if strcmp(misc, 'on'),
reuse_block(blk, 'misci', 'built-in/inport', ...
'Port', '3', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
end
xpos = xpos + xinc + port_w/2;
%%%%%%%%%%%%%%%%%%
% fanout control %
%%%%%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compa/2;
%replicate busses
reuse_block(blk, 'repa', 'casper_library_bus/bus_replicate', ...
'replication', num2str(dupa), 'latency', num2str(max(0, dup_latency)), 'misc', 'off', ...
'Position', [xpos-rep_w/2 ypos_tmp-rep_d/2 xpos+rep_w/2 ypos_tmp+rep_d/2]);
add_line(blk, 'a/1', 'repa/1');
ypos_tmp = ypos_tmp + yinc + mult_d*(compa/2 + compb/2);
reuse_block(blk, 'repb', 'casper_library_bus/bus_replicate', ...
'replication', num2str(dupb), 'latency', num2str(max(0, dup_latency)), 'misc', 'off', ...
'Position', [xpos-rep_w/2 ypos_tmp-rep_d/2 xpos+rep_w/2 ypos_tmp+rep_d/2]);
add_line(blk, 'b/1', 'repb/1');
xpos = xpos + xinc + rep_d;
%%%%%%%%%%%%%%
% bus expand %
%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compa/2; %reset ypos
if strcmp(cmplx_a, 'on') && strcmp(cmplx_b, 'on'),
outputWidth = mat2str(n_bits_a*2);
outputBinaryPt = mat2str(0*bin_pt_a);
outputArithmeticType = mat2str(0*type_a);
else
outputWidth = mat2str(n_bits_a);
outputBinaryPt = mat2str(bin_pt_a);
outputArithmeticType = mat2str(type_a);
end
reuse_block(blk, 'a_debus', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of arbitrary size', ...
'outputWidth', outputWidth, ...
'outputBinaryPt', outputBinaryPt, ...
'outputArithmeticType', outputArithmeticType, ...
'show_format', 'on', 'outputToWorkspace', 'off', ...
'variablePrefix', '', 'outputToModelAsWell', 'on', ...
'Position', [xpos-bus_expand_w/2 ypos_tmp-mult_d*compa/2 xpos+bus_expand_w/2 ypos_tmp+mult_d*compa/2]);
add_line(blk, 'repa/1', 'a_debus/1');
ypos_tmp = ypos_tmp + mult_d*(compa/2+compb/2) + yinc;
if strcmp(cmplx_a, 'on') && strcmp(cmplx_b, 'on'),
outputWidth = mat2str(n_bits_b*2);
outputBinaryPt = mat2str(0*bin_pt_b);
outputArithmeticType = mat2str(0*type_b);
else
outputWidth = mat2str(n_bits_b);
outputBinaryPt = mat2str(bin_pt_b);
outputArithmeticType = mat2str(type_b);
end
reuse_block(blk, 'b_debus', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of arbitrary size', ...
'outputWidth', outputWidth, ...
'outputBinaryPt', outputBinaryPt, ...
'outputArithmeticType', outputArithmeticType, ...
'show_format', 'on', 'outputToWorkspace', 'off', ...
'variablePrefix', '', 'outputToModelAsWell', 'on', ...
'Position', [xpos-bus_expand_w/2 ypos_tmp-mult_d*compb/2 xpos+bus_expand_w/2 ypos_tmp+mult_d*compb/2]);
add_line(blk, 'repb/1', 'b_debus/1');
ypos_tmp = ypos_tmp + mult_d*compa + yinc;
%%%%%%%%%%%%%%%%%%
% multiplication %
%%%%%%%%%%%%%%%%%%
xpos = xpos + xinc + mult_w/2;
ypos_tmp = ypos; %reset ypos
for index = 1:compo,
clog([num2str(index),': type= ', num2str(type_out(index)), ...
' quantization= ', num2str(quantization(index)), ...
' overflow= ',num2str(overflow(index))], log_group);
switch type_out(index),
case 0,
arith_type = 'Unsigned';
case 1,
arith_type = 'Signed';
otherwise,
clog(['unknown arithmetic type ',num2str(arith_type)], {'error', log_group});
error(['bus_mult_init: unknown arithmetic type ',num2str(arith_type)]);
end
switch quantization(index),
case 0,
quant = 'Truncate';
case 1,
quant = 'Round (unbiased: +/- Inf)';
end
switch overflow(index),
case 0,
of = 'Wrap';
case 1,
of = 'Saturate';
case 2,
of = 'Flag as error';
end
clog(['output ',num2str(index),': (',num2str(n_bits_out(index)), ' ', ...
num2str(bin_pt_out(index)),') ', arith_type,' ',quant,' ', of], log_group);
mult_name = ['mult',num2str(index)];
clog(['drawing ',mult_name], log_group);
if strcmp(cmplx_a, 'on') && strcmp(cmplx_b, 'on'), %need complex multiplication
if dup_latency >= 0, in_latency = 1;
else, in_latency = 0;
end
reuse_block(blk, mult_name, 'casper_library_multipliers/cmult', ...
'n_bits_a', num2str(n_bits_a(a_src(index))), 'bin_pt_a', num2str(bin_pt_a(a_src(index))), ...
'n_bits_b', num2str(n_bits_b(b_src(index))), 'bin_pt_b', num2str(bin_pt_b(b_src(index))), ...
'n_bits_ab', num2str(n_bits_out(index)), 'bin_pt_ab', num2str(bin_pt_out(index)), ...
'quantization', quant, 'overflow', of, 'conjugated', 'off', ...
'multiplier_implementation', multiplier_implementation, ...
'in_latency', num2str(in_latency), 'mult_latency', num2str(mult_latency), ...
'add_latency', num2str(add_latency), 'conv_latency', num2str(conv_latency), ...
'Position', [xpos-mult_w/2 ypos_tmp xpos+mult_w/2 ypos_tmp+mult_d-20] );
else,
%standard multiplication
if strcmp(multiplier_implementation, 'behavioral HDL'),
use_behavioral_HDL = 'on';
use_embedded = 'off';
else
use_behavioral_HDL = 'off';
if strcmp(multiplier_implementation, 'embedded multiplier core'),
use_embedded = 'on';
elseif strcmp(multiplier_implementation, 'standard core'),
use_embedded = 'off';
else,
end
end
reuse_block(blk, mult_name, 'xbsIndex_r4/Mult', ...
'latency', 'mult_latency', 'precision', 'User Defined', ...
'n_bits', num2str(n_bits_out(index)), 'bin_pt', num2str(bin_pt_out(index)), ...
'arith_type', arith_type, 'quantization', quant, 'overflow', of, ...
'use_behavioral_HDL', use_behavioral_HDL, 'use_embedded', use_embedded, ...
'Position', [xpos-mult_w/2 ypos_tmp xpos+mult_w/2 ypos_tmp+mult_d-20]);
end
ypos_tmp = ypos_tmp + mult_d;
clog(['done'], 'bus_mult_init_debug');
add_line(blk, ['a_debus/',num2str(a_src(index))], [mult_name,'/1']);
add_line(blk, ['b_debus/',num2str(b_src(index))], [mult_name,'/2']);
end %for
ypos_tmp = ypos + mult_d*(compb+compa) + 2*yinc;
if strcmp(misc, 'on'),
if strcmp(cmplx_a, 'on') && strcmp(cmplx_b, 'on'),
latency = ['mult_latency+add_latency+conv_latency+fan_latency'];
else,
latency = ['mult_latency+fan_latency'];
end
reuse_block(blk, 'dmisc', 'xbsIndex_r4/Delay', ...
'latency', latency, 'reg_retiming', 'on', ...
'Position', [xpos-del_w/2 ypos_tmp-del_d/2 xpos+del_w/2 ypos_tmp+del_d/2]);
add_line(blk, 'misci/1', 'dmisc/1');
end
xpos = xpos + xinc + mult_d/2;
%%%%%%%%%%%%%%
% bus create %
%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compo/2; %reset ypos
reuse_block(blk, 'a*b_bussify', 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(compo), ...
'Position', [xpos-bus_create_w/2 ypos_tmp-mult_d*compo/2 xpos+bus_create_w/2 ypos_tmp+mult_d*compo/2]);
for index = 1:compo, add_line(blk, ['mult',num2str(index),'/1'], ['a*b_bussify/',num2str(index)]); end
%%%%%%%%%%%%%%%%%
% output port/s %
%%%%%%%%%%%%%%%%%
ypos_tmp = ypos + mult_d*compo/2;
xpos = xpos + xinc + bus_create_w/2;
reuse_block(blk, 'a*b', 'built-in/outport', ...
'Port', '1', 'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
add_line(blk, ['a*b_bussify/1'], ['a*b/1']);
ypos_tmp = ypos_tmp + yinc + port_d;
ypos_tmp = ypos + mult_d*(compb+compa) + 2*yinc;
if strcmp(misc, 'on'),
reuse_block(blk, 'misco', 'built-in/outport', ...
'Port', '2', ...
'Position', [xpos-port_w/2 ypos_tmp-port_d/2 xpos+port_w/2 ypos_tmp+port_d/2]);
add_line(blk, 'dmisc/1', 'misco/1');
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting bus_mult_init', {log_group, 'trace'});
end %function bus_mult_init
|
github
|
mstrader/mlib_devel-master
|
pfb_fir_generic_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_fir_generic_init.m
| 16,352 |
utf_8
|
562351c87034977aab24580adf1fae25
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% SKA Africa %
% http://www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% SKA Africa %
% http://www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens ([email protected]) %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_fir_generic_init(blk, varargin)
clog('entering pfb_fir_generic_init', 'trace');
defaults = { ...
'n_streams', 1, ...
'PFBSize', 5, ...
'TotalTaps', 4, ...
'WindowType', 'hamming', ...
'n_inputs', 0, ...
'BitWidthIn', 8, ...
'BitWidthOut', 18, ...
'CoeffBitWidth', 12, ...
'complex', 'on', ...
'async', 'on', ...
'mult_latency', 2, ...
'add_latency', 1, ...
'bram_latency', 2, ...
'fan_latency', 1, ...
'conv_latency', 1, ...
'quantization', 'Truncate', ...
'fwidth', 1, ...
'fanout', 4, ...
'coeffs_bram_optimization', 'Area', ... %'Speed', 'Area'
'delays_bram_optimization', 'Area', ...%'Speed', 'Area'
};
check_mask_type(blk, 'pfb_fir_generic');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
n_streams = get_var('n_streams', 'defaults', defaults, varargin{:});
PFBSize = get_var('PFBSize', 'defaults', defaults, varargin{:});
TotalTaps = get_var('TotalTaps', 'defaults', defaults, varargin{:});
WindowType = get_var('WindowType', 'defaults', defaults, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
complex = get_var('complex', 'defaults', defaults, varargin{:});
BitWidthIn = get_var('BitWidthIn', 'defaults', defaults, varargin{:});
BitWidthOut = get_var('BitWidthOut', 'defaults', defaults, varargin{:});
CoeffBitWidth = get_var('CoeffBitWidth', 'defaults', defaults, varargin{:});
complex = get_var('complex', 'defaults', defaults, varargin{:});
async = get_var('async', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency', 'defaults', defaults, varargin{:});
fan_latency = get_var('fan_latency', 'defaults', defaults, varargin{:});
conv_latency = get_var('conv_latency', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
fwidth = get_var('fwidth', 'defaults', defaults, varargin{:});
multiplier_implementation = get_var('multiplier_implementation', 'defaults', defaults, varargin{:});
coeffs_bram_optimization = get_var('coeffs_bram_optimization', 'defaults', defaults, varargin{:});
delays_bram_optimization = get_var('delays_bram_optimization', 'defaults', defaults, varargin{:});
delete_lines(blk);
% default empty block for storage in library
if TotalTaps == 0,
clean_blocks(blk);
set_param(blk, 'AttributesFormatString', '');
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting pfb_fir_generic_init','trace');
return;
end
%check parameters
if TotalTaps < 3,
clog('need at least 3 taps', {'error', 'pfb_fir_generic_init_debug'});
error('need at least 3 taps');
return;
end
if strcmp(async, 'on') && fan_latency < 1,
clog('fanout latency must be at least 1 for asynchonrous operation', {'error', 'pfb_fir_generic_init_debug'});
error('fanout latency must be at least 1 for asynchonrous operation');
return;
end
% Compute the maximum gain through all of the 2^PFBSize sub-filters. This is
% used to determine how much bit growth is really needed. The maximum gain of
% each filter is the sum of the absolute values of its coefficients. The
% maximum of these gains sets the upper bound on bit growth through the
% pfb_fir. The products, partial sums, and final sum throughout the pfb_fir
% (including the adder tree) need not accomodate any more bit growth than the
% absolute maximum gain requires, provided that any "overflow" is ignored (i.e.
% set to "Wrap"). This works thanks to the wonders of modulo math. Note that
% the "gain" for typical signals will be different (less) than the absolute
% maximum gain of each filter. For Gaussian noise, the gain of a filter is the
% square root of the sum of the squares of the coefficients (aka
% root-sum-squares or RSS).
% Get all coefficients of the pfb_fir in one vector (by passing -1 for a)
all_coeffs = pfb_coeff_gen_calc(PFBSize, TotalTaps, WindowType, n_inputs, 0, fwidth, -1, false);
% Rearrange into matrix with 2^PFBSize rows and TotalTaps columns.
% Each row contains coefficients for one sub-filter.
all_filters = reshape(all_coeffs, 2^PFBSize, TotalTaps);
% Compute max gain
% NB: sum rows, not columns!
max_gain = max(sum(abs(all_filters), 2));
% Compute bit growth (make sure it is non-negative)
bit_growth = max(0, nextpow2(max_gain));
% Compute adder output width and binary point. We know that the adders in the
% adder tree need to have (bit_growth+1) non-fractional bits to accommodate the
% maximum gain. The products from the taps will have
% (BitWidthIn+CoeffBitWidth-2) fractional bits. We will preserve them through
% the adder tree.
adder_bin_pt_out = BitWidthIn + CoeffBitWidth - 2;
adder_n_bits_out = bit_growth + 1 + adder_bin_pt_out;
%TODO add this optimisation
% If BitWidthOut is 0, set it to accomodate bit growth in the
% non-fractional part and full-precision of the fractional part.
if BitWidthOut == 0
BitWidthOut = adder_n_bits_out;
end
% input data pipeline
yoff = 115;
yinc = 40;
n_inputs_total = n_streams*(2^n_inputs);
reuse_block(blk, 'bus_create', 'casper_library_flow_control/bus_create', ...
'inputNum', num2str(n_inputs_total), 'Position', [80 yoff-15 140 yoff+((n_inputs_total-1)*yinc)+15]);
if strcmp(complex, 'on'),
outputWidth = BitWidthOut*2; outputBinaryPt = 0; outputArithmeticType = 0;
else
outputWidth = BitWidthOut; outputBinaryPt = BitWidthOut-1; outputArithmeticType = 1;
end
reuse_block(blk, 'bus_expand', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of equal size', ...
'outputNum', num2str(n_inputs_total), ...
'outputWidth', num2str(outputWidth), ...
'outputBinaryPt', num2str(outputBinaryPt), ...
'outputArithmeticType', num2str(outputArithmeticType), ...
'Position', [1020 yoff-15 1100 yoff+((n_inputs_total-1)*yinc)+15]);
% data ports
for stream_index = 0:n_streams-1,
for port_index = 0:2^n_inputs-1,
in_port_name = ['pol',num2str(stream_index), '_in', num2str(port_index)];
port_no = stream_index*2^n_inputs + port_index;
port_offset = port_index*n_streams + stream_index;
in_position = [0 yoff+(port_offset*yinc)-8 30 yoff+(port_offset*yinc)+8];
reuse_block(blk, in_port_name, 'built-in/Inport', 'Port', num2str(port_no+1), 'Position', in_position);
add_line(blk,[in_port_name,'/1'], ['bus_create/',num2str(port_offset+1)]);
out_port_name = ['pol',num2str(stream_index), '_out', num2str(port_index)];
out_position = [1155 yoff+(port_offset*yinc)-8 1185 yoff+(port_offset*yinc)+8];
reuse_block(blk, out_port_name, 'built-in/Outport', 'Port', num2str(port_no+1), 'Position', out_position);
add_line(blk, ['bus_expand/',num2str(port_offset+1)], [out_port_name,'/1']);
end %for n_inputs
end %for n_streams
% block to generate basic coefficients
reuse_block(blk, 'pfb_fir_coeff_gen', 'casper_library_pfbs/pfb_fir_coeff_gen', ...
'pfb_size', num2str(PFBSize), ...
'n_taps', num2str(TotalTaps), ...
'n_bits_coeff', num2str(CoeffBitWidth), ...
'WindowType', WindowType, ...
'n_inputs', num2str(n_inputs), ...
'fwidth', num2str(fwidth), ...
'async', async, ...
'bram_latency', num2str(bram_latency), ...
'fan_latency', num2str(fan_latency), ...
'add_latency', num2str(add_latency), ...
'bram_optimization', coeffs_bram_optimization, ...
'Position', [285 33 380 197]);
add_line(blk, 'bus_create/1', 'pfb_fir_coeff_gen/2');
% replicate coefficients and pack them next to each other
% also reverse the order of coefficients ...
n_coeffs = TotalTaps*2^n_inputs;
output_order = reshape([0:n_coeffs-1], 2^n_inputs, TotalTaps);
output_order = output_order(:, TotalTaps:-1:1);
output_order = reshape(repmat(reshape(output_order, 1, n_coeffs), n_streams, 1), 1, n_coeffs*n_streams);
if strcmp(complex, 'on'), output_order = reshape([output_order; output_order], 1, length(output_order)*2);
end
reuse_block(blk, 'coeff_munge', 'casper_library_flow_control/munge', ...
'divisions', num2str(n_coeffs), ...
'div_size', mat2str(repmat(CoeffBitWidth, 1, n_coeffs)), ...
'order', mat2str(output_order), ...
'arith_type_out', 'Unsigned', ...
'bin_pt_out', '0', ...
'Position', [500 199 550 231]);
add_line(blk, 'pfb_fir_coeff_gen/3', 'coeff_munge/1');
reuse_block(blk, 'pfb_fir_taps', 'casper_library_pfbs/pfb_fir_taps', ...
'n_streams', num2str(n_streams), ...
'n_inputs', num2str(n_inputs), ...
'pfb_size', num2str(PFBSize), ...
'n_taps', num2str(TotalTaps), ...
'n_bits_data', num2str(BitWidthIn), ...
'n_bits_coeff', num2str(CoeffBitWidth), ...
'bin_pt_coeff', num2str(CoeffBitWidth-1), ...
'complex', complex, ...
'async', async, ...
'mult_latency', num2str(mult_latency), ...
'add_latency', num2str(add_latency), ...
'bram_latency', num2str(bram_latency), ...
'fan_latency', num2str(fan_latency), ...
'multiplier_implementation', 'behavioral HDL', ...
'bram_optimization', delays_bram_optimization, ...
'Position', [675 32 765 198]);
add_line(blk, 'pfb_fir_coeff_gen/2', 'pfb_fir_taps/2');
add_line(blk, 'coeff_munge/1', 'pfb_fir_taps/3');
n_outputs_total = n_inputs_total;
if strcmp(complex, 'on'),
n_outputs_total = n_outputs_total*2;
end
reuse_block(blk, 'bus_scale', 'casper_library_bus/bus_scale', ...
'n_bits_in', mat2str(repmat(BitWidthIn+CoeffBitWidth+TotalTaps-1, 1, n_outputs_total)), ...
'bin_pt_in', num2str(BitWidthIn-1+CoeffBitWidth-1), ...
'scale_factor', num2str(-bit_growth), ...
'misc', 'off', 'Position', [825 101 865 129]);
add_line(blk, 'pfb_fir_taps/2', 'bus_scale/1');
if strcmp(quantization, 'Truncate'), quant = 0;
elseif strcmp(quantization, 'Round (unbiased: +/- Inf)'), quant = 1;
else quant = 2;
end
reuse_block(blk, 'bus_convert', 'casper_library_bus/bus_convert', ...
'n_bits_in', mat2str(repmat(BitWidthIn+CoeffBitWidth+TotalTaps-1, 1, n_outputs_total)), ...
'bin_pt_in', num2str(BitWidthIn-1+CoeffBitWidth-1+bit_growth), ...
'n_bits_out', num2str(BitWidthOut), 'bin_pt_out', num2str(BitWidthOut-1), ...
'quantization', num2str(quant), 'overflow', '0', ...\
'latency', num2str(conv_latency), 'of', 'off', 'misc', 'off', ...
'Position', [920 101 960 129]);
add_line(blk, 'bus_scale/1', 'bus_convert/1');
add_line(blk, 'bus_convert/1', 'bus_expand/1');
% sync chain
reuse_block(blk, 'sync', 'built-in/Inport', 'Port', '1', 'Position', [0 52 30 68]);
add_line(blk, 'sync/1', 'pfb_fir_coeff_gen/1');
add_line(blk, 'pfb_fir_coeff_gen/1', 'pfb_fir_taps/1');
reuse_block(blk, 'sync_delay','xbsIndex_r4/Delay', 'reg_retiming', 'on', ...
'latency', 'conv_latency', 'Position', [925 52 955 68]);
add_line(blk, 'pfb_fir_taps/1', 'sync_delay/1');
reuse_block(blk, 'sync_out', 'built-in/Outport', 'Port', '1', 'Position', [1155 52 1185 68]);
add_line(blk, 'sync_delay/1', 'sync_out/1');
% asynchronous infrastructure
yoff = 115;
if strcmp(async, 'on'),
reuse_block(blk, 'en', 'built-in/Inport', 'Port', num2str(2+n_inputs_total), ...
'Position', [95 yoff+(n_inputs_total*yinc)-8 125 yoff+(n_inputs_total*yinc)+8]);
add_line(blk, 'en/1', 'pfb_fir_coeff_gen/3');
add_line(blk, 'pfb_fir_coeff_gen/4', 'pfb_fir_taps/4');
reuse_block(blk, 'den', 'xbsIndex_r4/Delay', 'reg_retiming', 'on', ...
'latency', 'conv_latency', 'Position', [925 162 955 178]);
add_line(blk, 'pfb_fir_taps/3', 'den/1');
reuse_block(blk, 'dvalid', 'built-in/Outport', 'Port', num2str(2+n_inputs_total), ...
'Position', [1035 yoff+(n_inputs_total*yinc)-8 1065 yoff+(n_inputs_total*yinc)+8]);
add_line(blk, 'den/1', 'dvalid/1');
end %if async
clean_blocks(blk);
set_param(blk, 'AttributesFormatString', '');
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting pfb_fir_generic_init','trace');
end % pfb_fir_generic_init
|
github
|
mstrader/mlib_devel-master
|
pfb_real_add_tree_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_real_add_tree_init.m
| 7,206 |
utf_8
|
f32400926d004865800cd4799ad96967
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons, Glenn Jones %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_real_add_tree_init(blk, varargin)
% Initialize and configure the Real Polyphase Filter Bank final summing tree.
%
% pfb_real_add_tree_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% TotalTaps = Total number of taps in the PFB
% BitWidthIn = Input Bitwidth
% BitWidthOut = Output Bitwidth
% CoeffBitWidth = Bitwidth of Coefficients.
% add_latency = Latency through each adder.
% quantization = 'Truncate', 'Round (unbiased: +/- Inf)', or 'Round
% (unbiased: Even Values)'
% Declare any default values for arguments you might like.
defaults = {};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'pfb_real_add_tree');
munge_block(blk, varargin{:});
TotalTaps = get_var('TotalTaps', 'defaults', defaults, varargin{:});
BitWidthIn = get_var('BitWidthIn', 'defaults', defaults, varargin{:});
BitWidthOut = get_var('BitWidthOut', 'defaults', defaults, varargin{:});
CoeffBitWidth = get_var('CoeffBitWidth', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
delete_lines(blk);
% Add ports
reuse_block(blk, 'din', 'built-in/inport', 'Position', [15 123 45 137], 'Port', '1');
reuse_block(blk, 'sync', 'built-in/inport', 'Position', [15 28 45 42], 'Port', '2');
%reuse_block(blk, 'dout', 'built-in/outport', 'Position', [500 25*TotalTaps+100 530 25*TotalTaps+115], 'Port', '1');
%reuse_block(blk, 'sync_out', 'built-in/outport', 'Position', [150 28 180 42], 'Port', '2');
reuse_block(blk, 'dout', 'built-in/outport', 'Position', [600 25*TotalTaps+100 630 25*TotalTaps+115], 'Port', '1');
reuse_block(blk, 'sync_out', 'built-in/outport', 'Position', [600 28 630 42], 'Port', '2');
% Add Static Blocks
reuse_block(blk, 'adder_tree1', 'casper_library_misc/adder_tree', ...
'n_inputs', num2str(TotalTaps), 'latency', num2str(add_latency), ...
'Position', [200 114 350 50*TotalTaps+114]);
reuse_block(blk, 'convert1', 'xbsIndex_r4/Convert', ...
'arith_type', 'Signed (2''s comp)', 'n_bits', 'BitWidthOut', ...
'bin_pt', 'BitWidthOut-1', ...
'overflow', 'Saturate', 'latency', 'add_latency', ...
'pipeline', 'on', 'quantization', quantization, ...
'Position', [500 25*TotalTaps+114 530 25*TotalTaps+128]);
% Delay to compensate for latency of convert blocks
reuse_block(blk, 'delay1', 'xbsIndex_r4/Delay', ...
'latency', num2str(add_latency), ...
'Position', [400 50+25*TotalTaps 430 80+25*TotalTaps]);
% Scale Blocks are required before casting to n_(n-1) format
% Input to adder tree seemes to be n_(n-2) format
% each level in the adder tree requires one more shift
% so with just two taps, there is one level in the adder tree
% so we would have, eg, 17_14 format, so we need to shift by 2 to get
% 17_16 which can be converted to 18_17 without overflow.
% There are nextpow2(TotalTaps) levels in the adder tree.
scale_factor = 1 + nextpow2(TotalTaps);
reuse_block(blk, 'scale1', 'xbsIndex_r4/Scale', ...
'scale_factor', num2str(-scale_factor), ...
'Position', [400 25*TotalTaps+114 430 25*TotalTaps+128]);
reuse_block(blk, 'scale2', 'xbsIndex_r4/Scale', ...
'scale_factor', num2str(-scale_factor), ...
'Position', [400 158+25*TotalTaps 430 172+25*TotalTaps]);
% Add lines
%add_line(blk, 'adder_tree1/2', 'convert1/1');
add_line(blk, 'adder_tree1/2', 'scale1/1');
add_line(blk, 'scale1/1', 'convert1/1');
add_line(blk, 'convert1/1', 'dout/1');
% removed by Andrew as causes errors due to latency not working out to an integer,
% causing script to fail even though, especially as the block is never used
% %What is this delay block doing here. it looks like it was
% % the old sync delay circuit
% reuse_block(blk, 'delay', 'xbsIndex_r4/Delay', ...
% 'latency', '(log2(TotalTaps)+1)*add_latency', ...
% 'Position', [80 14 120 56]);
% %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%
add_line(blk, 'sync/1', 'adder_tree1/1');
%add_line(blk, 'adder_tree1/1', 'sync_out/1');
add_line(blk, 'adder_tree1/1', 'delay1/1');
add_line(blk, 'delay1/1', 'sync_out/1');
for i=0:TotalTaps-1,
slice_name = ['Slice', num2str(i)];
reuse_block(blk, slice_name, 'xbsIndex_r4/Slice', ...
'mode', 'Upper Bit Location + Width', 'nbits', 'CoeffBitWidth + BitWidthIn', ...
'base0', 'MSB of Input', 'base1', 'MSB of Input', ...
'bit1', ['-',num2str(i),'*(CoeffBitWidth + BitWidthIn)'], 'Position', [70 50*i+116 115 50*i+128]);
add_line(blk, 'din/1', [slice_name, '/1']);
reint_name = ['Reint',num2str(i)];
reuse_block(blk, reint_name, 'xbsIndex_r4/Reinterpret', ...
'force_arith_type', 'on', 'arith_type', 'Signed (2''s comp)', ...
'force_bin_pt', 'on', 'bin_pt', 'CoeffBitWidth + BitWidthIn - 2', ...
'Position', [130 50*i+116 160 50*i+128]);
add_line(blk, [slice_name, '/1'], [reint_name, '/1']);
add_line(blk, [reint_name, '/1'], ['adder_tree1','/',num2str(i+2)]);
end
% Set dynamic parameters
if ~strcmp(get_param([blk,'/convert1'], 'quantization'), quantization),
set_param([blk,'/convert1'], 'quantization', quantization);
set_param([blk,'/convert2'], 'quantization', quantization);
end
clean_blocks(blk);
fmtstr = sprintf('taps=%d, add_latency=%d', TotalTaps, add_latency);
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
fir_dbl_col_init.m
|
.m
|
mlib_devel-master/casper_library/fir_dbl_col_init.m
| 8,542 |
utf_8
|
a80bb7be6c5ae1fcd8f0d2b0ef46c86c
|
% fir_dbl_col_init(blk, varargin)
%
% blk = The block to initialize.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% n_inputs = The number of parallel input samples.
% coeff = The FIR coefficients, top-to-bottom.
% add_latency = The latency of adders.
% mult_latency = The latency of multipliers.
% coeff_bit_width = The number of bits used for coefficients
% coeff_bin_pt = The number of fractional bits in the coefficients
% first_stage_hdl = Whether to implement the first stage in adder trees
% as behavioral HDL so that adders are absorbed into DSP slices used for
% multipliers where this is possible.
% adder_imp = adder implementation (Fabric, behavioral HDL, DSP48)
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function fir_dbl_col_init(blk,varargin)
clog('entering fir_dbl_col_init', 'trace');
% Declare any default values for arguments you might like.
defaults = {'n_inputs', 1, 'coeff', 0.1, 'add_latency', 2, 'mult_latency', 3, ...
'coeff_bit_width', 25, 'coeff_bin_pt', 24, ...
'first_stage_hdl', 'off', 'adder_imp', 'Fabric'};
check_mask_type(blk, 'fir_dbl_col');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('fir_dbl_col_init post same_state', 'trace');
munge_block(blk, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
coeff = get_var('coeff', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
coeff_bit_width = get_var('coeff_bit_width', 'defaults', defaults, varargin{:});
coeff_bin_pt = get_var('coeff_bin_pt', 'defaults', defaults, varargin{:});
first_stage_hdl = get_var('first_stage_hdl', 'defaults', defaults, varargin{:});
adder_imp = get_var('adder_imp', 'defaults', defaults, varargin{:});
delete_lines(blk);
%default library state
if n_inputs == 0,
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting fir_dbl_col_init', 'trace');
return;
end
if length(coeff) ~= n_inputs,
clog('number of coefficients must be the same as the number of inputs', {'fir_dbl_col_init_debug', 'error'});
error('number of coefficients must be the same as the number of inputs');
end
% Make sure these go through Ports in strictly increasing order, or
% port assignments don't "stick".
for i=1:n_inputs,
reuse_block(blk, ['real',num2str(i)], 'built-in/inport', 'Position', [30 i*80 60 15+80*i], 'Port', num2str(2*i-1));
reuse_block(blk, ['imag',num2str(i)], 'built-in/inport', 'Position', [30 i*80+30 60 45+80*i], 'Port', num2str(2*i));
reuse_block(blk, ['real_out',num2str(i)], 'built-in/outport', 'Position', [350 i*80 380 15+80*i], 'Port', num2str(2*i-1));
reuse_block(blk, ['imag_out',num2str(i)], 'built-in/outport', 'Position', [350 i*80+30 380 45+80*i], 'Port', num2str(2*i));
reuse_block(blk, ['fir_dbl_tap',num2str(i)], 'casper_library_downconverter/fir_dbl_tap', ...
'Position', [180 i*160-70 230 50+160*i], 'mult_latency', 'mult_latency',...
'add_latency', 'add_latency', 'factor', num2str(coeff(i)), ...
'coeff_bit_width', 'coeff_bit_width', 'coeff_bin_pt', 'coeff_bin_pt');
end
for i=1:n_inputs,
reuse_block(blk, ['real_back',num2str(i)], 'built-in/inport', 'Position', [30 n_inputs*80+i*80 60 n_inputs*80+15+80*i], 'Port', num2str(2*i-1+2*n_inputs));
reuse_block(blk, ['imag_back',num2str(i)], 'built-in/inport', 'Position', [30 n_inputs*80+i*80+30 60 n_inputs*80+45+80*i], 'Port', num2str(2*i+2*n_inputs));
reuse_block(blk, ['real_back_out',num2str(i)], 'built-in/outport', 'Position', [350 n_inputs*80+i*80 380 n_inputs*80+15+80*i], 'Port', num2str(2*i-1+2*n_inputs));
reuse_block(blk, ['imag_back_out',num2str(i)], 'built-in/outport', 'Position', [350 n_inputs*80+i*80+30 380 n_inputs*80+45+80*i], 'Port', num2str(2*i+2*n_inputs));
end
reuse_block(blk, 'real_sum', 'built-in/outport', 'Position', [600 10+20*n_inputs 630 30+20*n_inputs], 'Port', num2str(4*n_inputs+1));
reuse_block(blk, 'imag_sum', 'built-in/outport', 'Position', [600 110+20*n_inputs 630 130+20*n_inputs], 'Port', num2str(4*n_inputs+2));
if n_inputs > 1,
reuse_block(blk, 'adder_tree1', 'casper_library_misc/adder_tree', ...
'Position', [500 100 550 100+20*n_inputs], 'n_inputs', num2str(n_inputs),...
'latency', num2str(add_latency), 'first_stage_hdl', first_stage_hdl, 'adder_imp', adder_imp);
reuse_block(blk, 'adder_tree2', 'casper_library_misc/adder_tree', ...
'Position', [500 200+20*n_inputs 550 200+20*n_inputs+20*n_inputs], 'n_inputs', num2str(n_inputs),...
'latency', num2str(add_latency), 'first_stage_hdl', first_stage_hdl, 'adder_imp', adder_imp);
reuse_block(blk, 'c1', 'xbsIndex_r4/Constant', ...
'explicit_period', 'on', 'Position', [450 100 480 110]);
reuse_block(blk, 'c2', 'xbsIndex_r4/Constant', ...
'explicit_period', 'on', 'Position', [450 200+20*n_inputs 480 210+20*n_inputs]);
reuse_block(blk, 'term1','built-in/Terminator', 'Position', [600 100 615 115]);
add_line(blk, 'adder_tree1/1', 'term1/1');
reuse_block(blk, 'term2','built-in/Terminator', 'Position', [600 200+20*n_inputs 615 215+20*n_inputs]);
add_line(blk, 'adder_tree2/1', 'term2/1');
add_line(blk, 'c1/1', 'adder_tree1/1');
add_line(blk, 'c2/1', 'adder_tree2/1');
add_line(blk,'adder_tree1/2','real_sum/1');
add_line(blk,'adder_tree2/2','imag_sum/1');
end
for i=1:n_inputs,
add_line(blk,['real',num2str(i),'/1'],['fir_dbl_tap',num2str(i),'/1']);
add_line(blk,['imag',num2str(i),'/1'],['fir_dbl_tap',num2str(i),'/2']);
add_line(blk,['real_back',num2str(n_inputs+1-i),'/1'],['fir_dbl_tap',num2str(i),'/3']);
add_line(blk,['imag_back',num2str(n_inputs+1-i),'/1'],['fir_dbl_tap',num2str(i),'/4']);
add_line(blk,['fir_dbl_tap',num2str(i),'/1'],['real_out',num2str(i),'/1']);
add_line(blk,['fir_dbl_tap',num2str(i),'/2'],['imag_out',num2str(i),'/1']);
add_line(blk,['fir_dbl_tap',num2str(i),'/3'],['real_back_out',num2str(n_inputs+1-i),'/1']);
add_line(blk,['fir_dbl_tap',num2str(i),'/4'],['imag_back_out',num2str(n_inputs+1-i),'/1']);
if n_inputs > 1
add_line(blk,['fir_dbl_tap',num2str(i),'/5'],['adder_tree1/',num2str(i+1)]);
add_line(blk,['fir_dbl_tap',num2str(i),'/6'],['adder_tree2/',num2str(i+1)]);
else
add_line(blk,['fir_dbl_tap',num2str(i),'/5'],['real_sum/1']);
add_line(blk,['fir_dbl_tap',num2str(i),'/6'],['imag_sum/1']);
end
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting fir_dbl_col_init', 'trace');
|
github
|
mstrader/mlib_devel-master
|
snapshot_callback.m
|
.m
|
mlib_devel-master/casper_library/snapshot_callback.m
| 2,621 |
utf_8
|
a3c539b6ded1703f1f7ff73e99fe8b65
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Meerkat radio telescope project %
% www.kat.ac.za %
% Copyright (C) Andrew Martens 2011 %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function snapshot_callback()
clog('entering bus_expand_callback', 'trace');
blk = gcb;
check_mask_type(blk, 'snapshot');
storage = get_param(blk, 'storage');
mask_names = get_param(blk, 'MaskNames');
mask_enables = get_param(blk, 'MaskEnables');
mask_visibilities = get_param(blk, 'MaskVisibilities');
if strcmp(storage, 'bram'),
mask_visibilities{ismember(mask_names, 'dram_dimm')} = 'off';
mask_visibilities{ismember(mask_names, 'dram_clock')} = 'off';
mask_enables{ismember(mask_names, 'data_width')} = 'on';
elseif strcmp(storage, 'dram'),
mask_visibilities{ismember(mask_names, 'dram_dimm')} = 'on';
mask_visibilities{ismember(mask_names, 'dram_clock')} = 'on';
set_param(blk, 'data_width', '64');
mask_enables{ismember(mask_names, 'data_width')} = 'off';
else,
end
set_param(gcb, 'MaskEnables', mask_enables);
set_param(gcb, 'MaskVisibilities', mask_visibilities);
clog('exiting bus_expand_callback', 'trace');
|
github
|
mstrader/mlib_devel-master
|
pfb_fir_async_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_fir_async_init.m
| 17,536 |
utf_8
|
a4fe60832b27a5f4a905513b944056fe
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version.
% %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_fir_async_init(blk, varargin)
% Initialize and configure the Polyphase Filter Bank.
%
% pfb_fir_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% pfb_bits = The size of the PFB
% total_taps = Total number of taps in the PFB
% window_type = The type of windowing function to use.
% simul_bits = The number of parallel inputs
% make_biplex = Double up the PFB to feed a biplex FFT
% data_in_bits = Input Bitwidth
% data_out_bits = Output Bitwidth (0 == as needed)
% coeff_bits = Bitwidth of Coefficients.
% coeffs_in_distmem = Implement coefficients in distributed memory
% add_latency = Latency through each adder.
% mult_latency = Latency through each multiplier
% bram_latency = Latency through each BRAM.
% quantization = 'Truncate', 'Round (unbiased: +/- Inf)', or 'Round
% (unbiased: Even Values)'
% fwidth = Scaling of the width of each PFB channel
% coeffs_share = Both polarizations will share coefficients.
% async = Should the PFB take a data valid signal so it can function asynchronously?
clog('entering pfb_fir_async_init','trace');
autoroute = 'off';
% Declare any default values for arguments you might like.
defaults = {'pfb_bits', 5, 'total_taps', 2, ...
'window_type', 'hamming', 'simul_bits', 1, 'make_biplex', 'off', ...
'data_in_bits', 8, 'data_out_bits', 0, 'coeff_bits', 18, ...
'coeffs_in_distmem', 'off', 'add_latency', 1, 'mult_latency', 2, ...
'bram_latency', 2, ...
'quantization', 'Round (unbiased: +/- Inf)', ...
'fwidth', 1, 'mult_spec', [2 2], ...
'coeffs_share', 'off', 'async', 'off'};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('pfb_fir_async_init post same_state','trace');
check_mask_type(blk, 'pfb_fir_async');
munge_block(blk, varargin{:});
pfb_bits = get_var('pfb_bits', 'defaults', defaults, varargin{:});
total_taps = get_var('total_taps', 'defaults', defaults, varargin{:});
window_type = get_var('window_type', 'defaults', defaults, varargin{:});
simul_bits = get_var('simul_bits', 'defaults', defaults, varargin{:});
make_biplex = get_var('make_biplex', 'defaults', defaults, varargin{:});
data_in_bits = get_var('data_in_bits', 'defaults', defaults, varargin{:});
data_out_bits = get_var('data_out_bits', 'defaults', defaults, varargin{:});
coeff_bits = get_var('coeff_bits', 'defaults', defaults, varargin{:});
coeffs_in_distmem = get_var('coeffs_in_distmem', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency', 'defaults', defaults, varargin{:});
fan_latency = get_var('fan_latency', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
fwidth = get_var('fwidth', 'defaults', defaults, varargin{:});
mult_spec = get_var('mult_spec', 'defaults', defaults, varargin{:});
coeffs_share = get_var('coeffs_share', 'defaults', defaults, varargin{:});
async = get_var('async', 'defaults', defaults, varargin{:});
debug_mode = get_var('debug_mode', 'defaults', defaults, varargin{:});
% check the multiplier specifications first off
tap_multipliers = multiplier_specification(mult_spec, total_taps, blk);
% async?
make_async = false;
if strcmp(async, 'on'),
make_async = true;
end
% share coeffs in a 2-pol setup?
pols = 1;
share_coefficients = false;
if strcmp(make_biplex, 'on'),
pols = 2;
if strcmp(coeffs_share, 'on')
share_coefficients = true;
end
end
% Compute the maximum gain through all of the 2^pfb_bits sub-filters. This is
% used to determine how much bit growth is really needed. The maximum gain of
% each filter is the sum of the absolute values of its coefficients. The
% maximum of these gains sets the upper bound on bit growth through the
% pfb_fir. The products, partial sums, and final sum throughout the pfb_fir
% (including the adder tree) need not accomodate any more bit growth than the
% absolute maximum gain requires, provided that any "overflow" is ignored (i.e.
% set to "Wrap"). This works thanks to the wonders of modulo math. Note that
% the "gain" for typical signals will be different (less) than the absolute
% maximum gain of each filter. For Gaussian noise, the gain of a filter is the
% square root of the sum of the squares of the coefficients (aka
% root-sum-squares or RSS).
% Get all coefficients of the pfb_fir in one vector (by passing -1 for a)
all_coeffs = pfb_coeff_gen_calc(pfb_bits, total_taps, window_type, simul_bits, 0, fwidth, -1, false);
% Rearrange into matrix with 2^pfb_bits rows and total_taps columns.
% Each row contains coefficients for one sub-filter.
all_filters = reshape(all_coeffs, 2^pfb_bits, total_taps);
% Compute max gain
% NB: sum rows, not columns!
max_gain = max(sum(abs(all_filters), 2));
% Compute bit growth (make sure it is non-negative)
bit_growth = max(0, nextpow2(max_gain));
% Compute adder output width and binary point. We know that the adders in the
% adder tree need to have (bit_growth+1) non-fractional bits to accommodate the
% maximum gain. The products from the taps will have
% (data_in_bits+coeff_bits-2) fractional bits. We will preserve them through
% the adder tree.
adder_bin_pt_out = data_in_bits + coeff_bits - 2;
adder_n_bits_out = bit_growth + 1 + adder_bin_pt_out;
% If data_out_bits is 0, set it to accomodate bit growth in the
% non-fractional part and full-precision of the fractional part.
if data_out_bits == 0
data_out_bits = adder_n_bits_out;
end
delete_lines(blk);
% Add ports
clog('adding inports and outports', 'pfb_fir_init_debug');
portnum = 1;
reuse_block(blk, 'sync', 'built-in/inport', ...
'Position', [0 50*portnum 30 50*portnum+15], 'Port', num2str(portnum));
reuse_block(blk, 'sync_out', 'built-in/outport', ...
'Position', [150*(total_taps+3) 50*portnum 150*(total_taps+3)+30 50*portnum+15], 'Port', num2str(portnum));
if make_async,
portnum = 2;
reuse_block(blk, 'dv', 'built-in/inport', ...
'Position', [0 50*portnum 30 50*portnum+15], 'Port', num2str(portnum));
reuse_block(blk, 'dv_out', 'built-in/outport', ...
'Position', [150*(total_taps+3) 50*portnum 150*(total_taps+3)+30 50*portnum+15], 'Port', num2str(portnum));
reuse_block(blk, 'dv_delay', 'xbsIndex_r4/Delay', ...
'latency', 'bram_latency+1', 'Position', [75 50*portnum 100 50*portnum+15]);
add_line(blk, 'dv/1', 'dv_delay/1', 'autorouting', autoroute);
end
for p=1:pols,
for n=1:2^simul_bits,
portnum = portnum + 1;
in_name = ['pol',num2str(p),'_in',num2str(n)];
out_name = ['pol',num2str(p),'_out',num2str(n)];
reuse_block(blk, in_name, 'built-in/inport', ...
'Position', [0 150*portnum 30 150*portnum+15], 'Port', num2str(portnum));
reuse_block(blk, out_name, 'built-in/outport', ...
'Position', [150*(total_taps+3) 150*portnum 150*(total_taps+3)+30 150*portnum+15], 'Port', num2str(portnum));
end
end
% add the coefficient generators - one per port
portnum = 0;
x_size = 100;
y_size = 100;
for p = 1 : pols,
for n = 1 : 2^simul_bits,
portnum = portnum + 1;
in_name = ['pol',num2str(p),'_in',num2str(n)];
if (p == 2) && (share_coefficients == true)
blk_name = [in_name,'_delay'];
reuse_block(blk, blk_name, 'xbsIndex_r4/Delay', ...
'latency', 'bram_latency+1+fan_latency', 'Position', [150 150*portnum 150+x_size 150*portnum+y_size]);
add_line(blk, [in_name,'/1'], [blk_name,'/1'], 'autorouting', autoroute);
else
blk_name = [in_name,'_coeffs'];
reuse_block(blk, blk_name, 'casper_library_pfbs/pfb_coeff_gen', ...
'PFBSize', tostring(pfb_bits), 'CoeffBitWidth', tostring(coeff_bits), ...
'TotalTaps', tostring(total_taps), ...
'CoeffDistMem', coeffs_in_distmem, ...
'WindowType', window_type, ...
'n_inputs', tostring(simul_bits), ...
'nput', num2str(n-1), ...
'Position', [150 150*portnum 150+x_size 150*portnum+y_size]);
propagate_vars([blk,'/',blk_name], 'defaults', defaults, varargin{:});
add_line(blk, [in_name,'/1'], [blk_name,'/1'], 'autorouting', autoroute);
add_line(blk, 'sync/1', [blk_name,'/2'], 'autorouting', autoroute);
end
end
end
% Add taps and lines
portnum = 0;
for p = 1:pols,
for n = 1:2^simul_bits,
portnum = portnum + 1;
in_name = ['pol',num2str(p),'_in',num2str(n)];
out_name = ['pol',num2str(p),'_out',num2str(n)];
clog(['adding taps for pol ', num2str(p), ' input ',num2str(n)], 'pfb_fir_init_debug');
for t = 1:total_taps,
% not last tap
if t ~= total_taps,
blk_name = [in_name, '_tap', tostring(t)];
reuse_block(blk, blk_name, 'casper_library_pfbs/tap_async', ...
'use_hdl', tap_multipliers(t).use_hdl, 'use_embedded', tap_multipliers(t).use_embedded,...
'this_tap',tostring(t),...
'Position', [150*(t+1) 150*portnum 150*(t+1)+x_size 150*portnum+y_size]);
propagate_vars([blk,'/',blk_name],'defaults', defaults, varargin{:});
if t == 1,
if (p == 2) && (share_coefficients == true)
src_block = [strrep(in_name,'pol2','pol1'),'_coeffs'];
data_source = [in_name,'_delay/1'];
else
src_block = [in_name,'_coeffs'];
data_source = [src_block,'/1'];
end
add_line(blk, data_source, [blk_name,'/1'], 'autorouting', autoroute);
add_line(blk, 'pol1_in1_coeffs/2', [blk_name,'/2'], 'autorouting', autoroute);
add_line(blk, [src_block,'/3'], [blk_name,'/3'], 'autorouting', autoroute);
if make_async,
add_line(blk, 'dv_delay/1', [blk_name,'/4'], 'autorouting', autoroute);
end
end
else
blk_name = [in_name,'_last_tap'];
reuse_block(blk, blk_name, 'casper_library_pfbs/last_tap_async', ...
'use_hdl', tap_multipliers(t).use_hdl, 'use_embedded', tap_multipliers(t).use_embedded,...
'input_num', num2str(portnum), ...
'Position', [150*(t+1) 150*portnum 150*(t+1)+x_size 150*portnum+y_size]);
propagate_vars([blk,'/',blk_name],'defaults', defaults, varargin{:});
% Update innards of the adder trees using our knowledge of
% maximum bit growth. This uses knowledge of the
% implementation of the "last_tap" block. This defeats the
% benefits of encapsulation, but the alternative is to make the
% underlying adder_tree block smarter and then make every block
% that encapsulates or uses an adder_tree smarter. Forcing
% such a global change for one or two specific cases seems a
% greater evil, IMHO.
pfb_add_tree = sprintf('%s/%s/pfb_add_tree_async', blk, blk_name);
for k=1:2
% Update adder blocks in the adder trees using our
% knowledge of maximum bit growth.
adders = find_system( ...
sprintf('%s/adder_tree%d', pfb_add_tree, k), ...
'LookUnderMasks','all', 'FollowLinks','on', ...
'SearchDepth',1, 'RegExp','on', 'Name','^addr');
for kk=1:length(adders)
set_param(adders{kk}, ...
'precision', 'User Defined', ...
'arith_type', 'Signed (2''s comp)', ...
'n_bits', tostring(adder_n_bits_out), ...
'bin_pt', tostring(adder_bin_pt_out), ...
'quantization', 'Truncate', ...
'overflow', 'Wrap');
end
% Adder tree output has bit_growth more non-fractional bits
% than data_in_bits, but we want to keep the same number of
% non-fractional bits, so we must scale by 2^(-bit_growth).
set_param(sprintf('%s/scale%d', pfb_add_tree, k), ...
'scale_factor', tostring(-bit_growth));
% Because we have handled bit growth for maximum gain,
% there can be no overflow so the convert blocks can be set
% to "Wrap" to avoid unnecessary logic. If data_out_bits is
% greater than adder_bin_pt_out, set their quantization to
% "Truncate" since there is no need to quantize.
if data_out_bits > adder_bin_pt_out
conv_quant = 'Truncate';
else
conv_quant = quantization;
end
set_param(sprintf('%s/convert%d', pfb_add_tree, k), ...
'overflow', 'Wrap', 'quantization', conv_quant);
end
% join dataout, dv and sync
add_line(blk, [blk_name,'/1'], [out_name,'/1'], 'autorouting', autoroute);
if n==1 && p==1
add_line(blk, [blk_name,'/2'], 'sync_out/1', 'autorouting', autoroute);
add_line(blk, [blk_name,'/3'], 'dv_out/1', 'autorouting', autoroute);
end
end
% join all the taps together
if t > 1
for ctr = 1 : 5,
add_line(blk, [in_name, '_tap', tostring(t-1), '/', tostring(ctr)], [blk_name, '/', tostring(ctr)], 'autorouting', autoroute);
end
end
end
end
end
% the sync generate block
delete_line(blk, ['pol1_in1_tap', tostring(total_taps-1), '/2'], 'pol1_in1_last_tap/2');
add_line(blk, 'sync_generate/1', 'pol1_in1_last_tap/2', 'autorouting', autoroute);
add_line(blk, 'pol1_in1_coeffs/2', 'sync_generate/1', 'autorouting', autoroute);
add_line(blk, 'dv_delay/1', 'sync_generate/2', 'autorouting', autoroute);
% add the adder trees
%portnum = 0;
%for p = 1 : pols,
% for n = 1 : 2^simul_bits,
% tree_name = ['adder', tostring(n), tostring(p)];
% reuse_block(blk, tree_name, 'casper_library_pfbs/pfb_add_tree', ...
% 'use_hdl', tostring(use_hdl), 'use_embedded', tostring(use_embedded),...
% 'Position', [150*(total_taps+2) 150*portnum 150*(total_taps+2)+x_size 150*portnum+y_size]);
% %propagate_vars([blk,'/',blk_name],'defaults', defaults,
% %varargin{:});
% add_line(blk, [tree_name, '/1'], ['pol',tostring(p),'_out',tostring(n),'/1'], 'autorouting', autoroute);
% end
%end
clean_blocks(blk);
debug_string = '';
if strcmp(debug_mode, 'on'),
debug_string = '\n-*-*-*-*-*-*-*-\nDEBUG MODE!!\n-*-*-*-*-*-*-*-';
end
fmtstr = [sprintf('taps=%d, add_latency=%d\nmax scale %.3f', ...
total_taps, add_latency, max_gain*2^-bit_growth), debug_string];
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting pfb_fir_init','trace');
|
github
|
mstrader/mlib_devel-master
|
dec_fir_init.m
|
.m
|
mlib_devel-master/casper_library/dec_fir_init.m
| 12,519 |
utf_8
|
03f9c9ab6697471c38854b55a82757fc
|
% dec_fir_init(blk, varargin)
%
% blk = The block to initialize.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% n_inputs = The number of parallel input samples.
% coeff = The FIR coefficients, top-to-bottom.
% n_bits = Bit width out.
% n_bits_bp = Binary point of output
% quantization = Quantization behavior [Truncate, Round (unbiased: +/- Inf),
% or Round (unbiased: Even Values)]
% add_latency = The latency of adders.
% mult_latency = The latency of multipliers.
% conv_latency = The latency during bit resolution conversion
% coeff_bit_width = Coefficient resolution
% coeff_bin_pt = Number of bits after binary point in coefficients
% absorb_adders = Attempt to absorb adders following multipliers into DSP
% slices by making them be implemented at behavioral HDL
% pre_conv_shift = How many bits to shift left before final output
% conversion.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% Copyright (C) 2010 Billy Mallard %
% %
% Karoo Array Telescope Project %
% http://www.kat.ac.za %
% Copyright (C) 2011 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function dec_fir_init(blk,varargin)
clog('entering dec_fir_init', 'trace');
% Declare any default values for arguments you might like.
% Added defaults and fixed the quatization default for 10.1 tools AWL
defaults = {'n_inputs', 1, 'n_bits', 8, 'n_bits_bp', 7, ...
'coeff', 0.1, 'lshift', 1, ...
'quantization', 'Round (unbiased: +/- Inf)', ...
'add_latency', 1, 'mult_latency', 2, 'conv_latency', 2, ...
'coeff_bit_width', 25, 'coeff_bin_pt', 24, ...
'absorb_adders', 'on', 'adder_imp', 'DSP48'};
check_mask_type(blk, 'dec_fir');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('dec_fir_init post same_state', 'trace');
munge_block(blk, varargin{:});
n_inputs = get_var('n_inputs','defaults', defaults, varargin{:});
coeff = get_var('coeff', 'defaults', defaults, varargin{:});
n_bits = get_var('n_bits', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
conv_latency = get_var('conv_latency', 'defaults', defaults, varargin{:});
coeff_bit_width = get_var('coeff_bit_width', 'defaults', defaults, varargin{:});
coeff_bin_pt = get_var('coeff_bin_pt', 'defaults', defaults, varargin{:});
absorb_adders = get_var('absorb_adders', 'defaults', defaults, varargin{:});
adder_imp = get_var('adder_imp', 'defaults', defaults, varargin{:});
try
get_param(blk, 'lshift');
lshift = get_var('lshift', 'defaults', defaults, varargin{:});
catch err_inf,
lshift = 1;
end
try
get_param(blk, 'n_bits_bp');
n_bits_bp = get_var('n_bits_bp', 'defaults', defaults, varargin{:});
catch err_inf,
n_bits_bp = n_bits - 1;
end
%default library state
if n_inputs == 0,
delete_lines(blk);
clean_blocks(blk);
set_param(blk,'AttributesFormatString','');
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting dec_fir_init', 'trace');
return;
end
% round coefficients to make sure rounding error doesn't prevent us from
% detecting symmetric coefficients
coeff_round = round(coeff * 1e16) * 1e-16;
% check that the number of inputs and coefficients are compatible
if mod(length(coeff) / n_inputs, 1) ~= 0,
error_string = sprintf('The number of coefficients (%d) must be integer multiples of the number of inputs (%d).', length(coeff), n_inputs);
clog(error_string, 'error');
errordlg(error_string);
end
num_fir_col = length(coeff) / n_inputs;
coeff_sym = 0;
fir_col_type = 'fir_col';
if mod(length(coeff),2) == 0 && mod(num_fir_col, 2)==0
if coeff_round(1:length(coeff)/2) == coeff_round(length(coeff):-1:length(coeff)/2+1),
num_fir_col = num_fir_col / 2;
fir_col_type = 'fir_dbl_col';
coeff_sym = 1;
end
end
delete_lines(blk);
reuse_block(blk, 'sync_in', 'built-in/inport', ...
'Position', [0 90*n_inputs+100 30 90*n_inputs+115], 'Port', '1');
for i=1:n_inputs,
reuse_block(blk, ['real',num2str(i)], 'built-in/inport', ...
'Position', [0 90*i 30 90*i+15], 'Port', num2str(2*i));
reuse_block(blk, ['imag',num2str(i)], 'built-in/inport', ...
'Position', [0 90*i+45 30 90*i+60], 'Port', num2str(2*i+1));
end
% if we have only one input stream, then first stage of adders
% after multipliers are these adder_trees (otherwise inside cols)
if n_inputs == 1,
first_stage_hdl_external = absorb_adders;
else
first_stage_hdl_external = 'off';
end
reuse_block(blk, 'real_sum', 'casper_library_misc/adder_tree', ...
'Position', [200*num_fir_col+400 300 200*num_fir_col+460 num_fir_col*10+300], ...
'n_inputs',num2str(num_fir_col),'latency',num2str(add_latency), ...
'adder_imp', adder_imp, 'first_stage_hdl', first_stage_hdl_external);
reuse_block(blk, 'imag_sum', 'casper_library_misc/adder_tree', ...
'Position', [200*num_fir_col+400 num_fir_col*10+400 200*num_fir_col+460 num_fir_col*20+400], ...
'n_inputs',num2str(num_fir_col),'latency',num2str(add_latency), ...
'adder_imp', adder_imp, 'first_stage_hdl', first_stage_hdl_external);
for i=1:num_fir_col,
blk_name = [fir_col_type,num2str(i)];
prev_blk_name = [fir_col_type,num2str(i-1)];
reuse_block(blk, blk_name, ['casper_library_downconverter/', fir_col_type], ...
'Position', [200*i+200 50 200*i+300 250], 'n_inputs', num2str(n_inputs),...
'coeff', ['[',num2str(coeff(i*n_inputs:-1:(i-1)*n_inputs+1)),']'],...
'mult_latency', num2str(mult_latency), 'add_latency', num2str(add_latency), ...
'coeff_bit_width', num2str(coeff_bit_width), 'coeff_bin_pt', num2str(coeff_bin_pt), ...
'adder_imp', adder_imp, 'first_stage_hdl', absorb_adders);
if i == 1,
for j=1:n_inputs,
add_line(blk, ['real',num2str(j),'/1'], [blk_name,'/',num2str(2*j-1)]);
add_line(blk, ['imag',num2str(j),'/1'], [blk_name,'/',num2str(2*j)]);
end
else,
for j=1:n_inputs,
add_line(blk,[prev_blk_name,'/',num2str(j*2-1)],[blk_name,'/',num2str(j*2-1)]);
add_line(blk,[prev_blk_name,'/',num2str(j*2)],[blk_name,'/',num2str(j*2)]);
end
end
if coeff_sym,
add_line(blk,[blk_name,'/',num2str(n_inputs*4+1)],['real_sum/',num2str(i+1)]);
add_line(blk,[blk_name,'/',num2str(n_inputs*4+2)],['imag_sum/',num2str(i+1)]);
else
add_line(blk,[blk_name,'/',num2str(n_inputs*2+1)],['real_sum/',num2str(i+1)]);
add_line(blk,[blk_name,'/',num2str(n_inputs*2+2)],['imag_sum/',num2str(i+1)]);
end
end
reuse_block(blk, 'shift1', 'xbsIndex_r4/Shift', ...
'shift_dir', 'Left', 'shift_bits', num2str(lshift), ...
'Position', [200*num_fir_col+500 300 200*num_fir_col+530 315]);
reuse_block(blk, 'shift2', 'xbsIndex_r4/Shift', ...
'shift_dir', 'Left', 'shift_bits', num2str(lshift), ...
'Position', [200*num_fir_col+500 500 200*num_fir_col+530 515]);
reuse_block(blk, 'convert1', 'xbsIndex_r4/Convert', ...
'Position', [200*num_fir_col+560 300 200*num_fir_col+590 315], ...
'n_bits', num2str(n_bits), 'bin_pt', num2str(n_bits_bp), 'arith_type', 'Signed (2''s comp)', ...
'latency', num2str(conv_latency), 'quantization', quantization);
reuse_block(blk, 'convert2', 'xbsIndex_r4/Convert', ...
'Position', [200*num_fir_col+560 500 200*num_fir_col+590 515], ...
'n_bits', num2str(n_bits), 'bin_pt', num2str(n_bits-1), 'arith_type', 'Signed (2''s comp)', ...
'latency', num2str(conv_latency), 'quantization', quantization);
reuse_block(blk, 'ri_to_c', 'casper_library_misc/ri_to_c', ...
'Position', [200*num_fir_col+620 400 200*num_fir_col+650 430]);
reuse_block(blk, 'sync_out', 'built-in/outport', ...
'Position', [200*num_fir_col+500 250 200*num_fir_col+530 265], 'Port', '1');
reuse_block(blk, 'dout', 'built-in/outport', ...
'Position', [200*num_fir_col+680 400 200*num_fir_col+710 415], 'Port', '2');
% delay of sync
if coeff_sym,
% y(n) = sum(aix(n-i)) for i=0:N. sync is thus related to x(0)
sync_latency = add_latency + mult_latency + ceil(log2(n_inputs))*add_latency + conv_latency;
else
sync_latency = mult_latency + ceil(log2(n_inputs))*add_latency + conv_latency;
end
% if delay is greater than 17*3 then might as well use logic
% as using more than 3 SRL16s and sync_delay uses approx 3
% (2 comparators, one counter)
if sync_latency > 17*3,
sync_delay_block = 'casper_library_delays/sync_delay';
else
sync_delay_block = 'xbsIndex_r4/Delay';
end
reuse_block(blk, 'delay', sync_delay_block, ...
'Position', [60 90*n_inputs+100 90 90*n_inputs+130], ...
'latency', num2str(sync_latency));
add_line(blk,'real_sum/2','shift1/1');
add_line(blk,'imag_sum/2','shift2/1');
add_line(blk,'shift1/1','convert1/1');
add_line(blk,'shift2/1','convert2/1');
add_line(blk, 'convert1/1', 'ri_to_c/1');
add_line(blk, 'convert2/1', 'ri_to_c/2');
add_line(blk, 'ri_to_c/1', 'dout/1');
add_line(blk,'sync_in/1','delay/1');
add_line(blk,'delay/1','real_sum/1');
add_line(blk,'delay/1','imag_sum/1');
add_line(blk,'real_sum/1','sync_out/1');
% backward links for symmetric coefficients
if coeff_sym,
for i=1:num_fir_col,
blk_name = [fir_col_type,num2str(i)];
prev_blk_name = [fir_col_type,num2str(i-1)];
if i ~= 1
for j=1:n_inputs,
add_line(blk,[blk_name,'/',num2str(2*n_inputs+j*2-1)],[prev_blk_name,'/',num2str(2*n_inputs+j*2-1)]);
add_line(blk,[blk_name,'/',num2str(2*n_inputs+j*2)],[prev_blk_name,'/',num2str(2*n_inputs+j*2)]);
end
end
end
for j=1:n_inputs,
blk_name = [fir_col_type,num2str(num_fir_col)];
add_line(blk,[blk_name,'/',num2str(j*2-1)],[blk_name,'/',num2str(2*n_inputs+j*2-1)]);
add_line(blk,[blk_name,'/',num2str(j*2)],[blk_name,'/',num2str(2*n_inputs+j*2)]);
end
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
% Set attribute format string (block annotation)
annotation=sprintf('%d taps\n%d_%d r/i', length(coeff), n_bits, n_bits_bp);
set_param(blk,'AttributesFormatString',annotation);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting dec_fir_init', 'trace');
|
github
|
mstrader/mlib_devel-master
|
first_tap_real_init.m
|
.m
|
mlib_devel-master/casper_library/first_tap_real_init.m
| 3,081 |
utf_8
|
554eace870023e00d6071b78687d8d51
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function first_tap_real_init(blk, varargin)
% Initialize and configure the first tap of the Real Polyphase Filter Bank.
%
% first_tap_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% PFBSize = The size of the PFB
% CoeffBitWidth = Bitwidth of Coefficients.
% TotalTaps = Total number of taps in the PFB
% BitWidthIn = Input Bitwidth
% WindowType = The type of windowing function to use.
% mult_latency = Latency through each multiplier
% bram_latency = Latency through each BRAM.
% n_inputs = The number of parallel inputs
% fwidth = Scaling of the width of each PFB channel
% Declare any default values for arguments you might like.
defaults = {};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
check_mask_type(blk, 'first_tap_real');
munge_block(blk, varargin{:});
TotalTaps = get_var('TotalTaps', 'defaults', defaults, varargin{:});
use_hdl = get_var('use_hdl','defaults', defaults, varargin{:});
use_embedded = get_var('use_embedded','defaults', defaults, varargin{:});
set_param([blk,'/Mult'],'use_embedded', use_embedded);
set_param([blk,'/Mult'],'use_behavioral_HDL', use_hdl);
fmtstr = sprintf('taps=%d', TotalTaps);
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
|
github
|
mstrader/mlib_devel-master
|
dec_fir_async_init.m
|
.m
|
mlib_devel-master/casper_library/dec_fir_async_init.m
| 16,870 |
utf_8
|
e24a0803411821a299c507db97aaa60b
|
% dec_fir_async_init(blk)
%
% blk = The block to initialize.
%
% The script will pull the required variables from the block mask.
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% Copyright (C) 2010 Billy Mallard %
% %
% Karoo Array Telescope Project %
% http://www.kat.ac.za %
% Copyright (C) 2011 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function dec_fir_async_init(blk)
clog('entering dec_fir_async_init', 'trace');
debug_fullscale_output = false;
varargin = make_varargin(blk);
% Declare any default values for arguments you might like.
% Added defaults and fixed the quatization default for 10.1 tools AWL
defaults = {'n_inputs', 1, 'output_width', 8, 'output_bp', 7, ...
'coeff', 0.1, ...
'quantization', 'Round (unbiased: +/- Inf)', ...
'add_latency', 1, 'mult_latency', 2, 'conv_latency', 2, ...
'lshift', 1, ...
'coeff_bit_width', 25, 'coeff_bin_pt', 24, ...
'absorb_adders', 'on', 'adder_imp', 'DSP48', ...
'async', 'off', 'bus_input', 'off', 'input_width', 16, ...
'input_bp', 0, 'input_type', 'Unsigned'};
check_mask_type(blk, 'dec_fir_async');
if same_state(blk, 'defaults', defaults, varargin{:}),
clog('dec_fir_async_init same state', 'trace');
return;
end
clog('dec_fir_init post same_state', 'trace');
munge_block(blk, varargin{:});
n_inputs = get_var('n_inputs','defaults', defaults, varargin{:});
coeff = get_var('coeff', 'defaults', defaults, varargin{:});
output_width = get_var('output_width', 'defaults', defaults, varargin{:});
output_bp = get_var('output_bp', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
conv_latency = get_var('conv_latency', 'defaults', defaults, varargin{:});
coeff_bit_width = get_var('coeff_bit_width', 'defaults', defaults, varargin{:});
coeff_bin_pt = get_var('coeff_bin_pt', 'defaults', defaults, varargin{:});
lshift = get_var('lshift', 'defaults', defaults, varargin{:});
absorb_adders = get_var('absorb_adders', 'defaults', defaults, varargin{:});
adder_imp = get_var('adder_imp', 'defaults', defaults, varargin{:});
async_ops = strcmp('on', get_var('async','defaults', defaults, varargin{:}));
bus_input = strcmp('on', get_var('bus_input','defaults', defaults, varargin{:}));
input_width = get_var('input_width','defaults', defaults, varargin{:});
input_bp = get_var('input_bp','defaults', defaults, varargin{:});
input_type = get_var('input_type','defaults', defaults, varargin{:});
% async_ops = true;
% bus_input = false;
% default library state
if n_inputs == 0,
clog('no inputs, clearing dec_fir_async block', 'trace');
delete_lines(blk);
clean_blocks(blk);
set_param(blk,'AttributesFormatString','');
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting dec_fir_async_init', 'trace');
return;
end
% round coefficients to make sure rounding error doesn't prevent us from
% detecting symmetric coefficients
coeff_round = round(coeff * 1e16) * 1e-16;
% check that the number of inputs and coefficients are compatible
if mod(length(coeff) / n_inputs, 1) ~= 0,
error_string = sprintf('The number of coefficients (%d) must be integer multiples of the number of inputs (%d).', length(coeff), n_inputs);
clog(error_string, 'error');
errordlg(error_string);
end
% how many tap-groups/columns do we need? are the coeffs symmetrical?
num_fir_col = length(coeff) / n_inputs;
coeff_sym = false;
fir_col_type = 'fir_col_async';
if mod(length(coeff),2) == 0 && mod(num_fir_col, 2)==0
if coeff_round(1:length(coeff)/2) == coeff_round(length(coeff):-1:length(coeff)/2+1),
num_fir_col = num_fir_col / 2;
coeff_sym = true;
end
end
delete_lines(blk);
% sync in
sync_latency = mult_latency + (ceil(log2(n_inputs))*add_latency) + conv_latency;
if coeff_sym,
% y(n) = sum(aix(n-i)) for i=0:N. sync is thus related to x(0)
sync_latency = add_latency + sync_latency;
end
% if delay is greater than 17*3 then might as well use logic as using more than 3 SRL16s and sync_delay uses approx 3 (2 comparators, one counter)
if sync_latency > 17*3,
sync_delay_block = 'casper_library_delays/sync_delay';
parm_name = 'DelayLen';
else
sync_delay_block = 'xbsIndex_r4/Delay';
parm_name = 'latency';
end
reuse_block(blk, 'sync_in', 'built-in/inport', ...
'Position', [0 20 30 36], 'Port', '1');
reuse_block(blk, 'sync_delay', sync_delay_block, ...
'Position', [60 8 100 48], ...
parm_name, num2str(sync_latency));
% reuse_block(blk, 'sync_goto', 'built-in/goto', ...
% 'GotoTag', 'sync_in', 'showname', showname, ...
% 'Position', [130, 20, 130+sizex_goto, 20+sizey_goto]);
add_line(blk, 'sync_in/1', 'sync_delay/1');
% add_line(blk, 'sync_delay/1', 'sync_goto/1');
% dv in
dv_latency = sync_latency + (ceil(log2(num_fir_col))*add_latency);
data_port_start = 2;
if async_ops,
if bus_input,
ypos = 200;
else
ypos = n_inputs*60 + 300;
end
data_port_start = 3;
reuse_block(blk, 'dv_in', 'built-in/inport', ...
'Position', [0 ypos 30 ypos+16], 'Port', '2');
reuse_block(blk, 'dv_delay', 'xbsIndex_r4/Delay', ...
'Position', [60 ypos-8 100 ypos+32], ...
'latency', num2str(dv_latency));
reuse_block(blk, 'dv_out', 'built-in/outport', ...
'Position', [120 ypos 150 ypos+16], 'Port', '3');
add_line(blk, 'dv_in/1', 'dv_delay/1');
add_line(blk, 'dv_delay/1', 'dv_out/1');
% reuse_block(blk, 'dv_goto', 'built-in/goto', ...
% 'GotoTag', 'dv_in', 'showname', showname, ...
% 'Position', [60, 50, 60+sizex_goto, 50+sizey_goto]);
% add_line(blk, 'dv_in/1', 'dv_goto/1');
end
% data bus in
if bus_input,
reuse_block(blk, 'dbus_in', 'built-in/inport', ...
'Position', [0 100 30 116], 'Port', num2str(data_port_start));
% reuse_block(blk, 'dbus_goto', 'built-in/goto', ...
% 'GotoTag', 'dbus_in', 'showname', showname, ...
% 'Position', [60, 100, 60+sizex_goto, 100+sizey_goto]);
% add_line(blk, 'dbus_in/1', 'dbus_goto/1');
else
for ctr = 1:n_inputs,
port_start = data_port_start + ((ctr-1)*2);
reuse_block(blk, ['real',num2str(ctr)], 'built-in/inport', ...
'Position', [0 90*ctr 30 90*ctr+15], 'Port', num2str(port_start));
reuse_block(blk, ['imag',num2str(ctr)], 'built-in/inport', ...
'Position', [0 90*ctr+45 30 90*ctr+60], 'Port', num2str(port_start+1));
end
end
% if we have only one input stream, then first stage of adders
% after multipliers are these adder_trees (otherwise inside cols)
if n_inputs == 1,
first_stage_hdl_external = absorb_adders;
else
first_stage_hdl_external = 'off';
end
reuse_block(blk, 'real_sum', 'casper_library_misc/adder_tree', ...
'Position', [200*num_fir_col+400 300 200*num_fir_col+460 num_fir_col*10+350], ...
'n_inputs',num2str(num_fir_col),'latency',num2str(add_latency), ...
'adder_imp', adder_imp, 'first_stage_hdl', first_stage_hdl_external);
reuse_block(blk, 'imag_sum', 'casper_library_misc/adder_tree', ...
'Position', [200*num_fir_col+400 num_fir_col*10+400 200*num_fir_col+460 num_fir_col*20+450], ...
'n_inputs',num2str(num_fir_col),'latency',num2str(add_latency), ...
'adder_imp', adder_imp, 'first_stage_hdl', first_stage_hdl_external);
% the tap columns
for ctr = 1:num_fir_col,
blk_name = [fir_col_type, num2str(ctr)];
prev_blk_name = [fir_col_type, num2str(ctr-1)];
symmet_str = 'off';
async_str = 'off';
binput_str = 'off';
if coeff_sym,
symmet_str = 'on';
end
if async_ops,
async_str = 'on';
end
if bus_input,
binput_str = 'on';
end
reuse_block(blk, blk_name, ['casper_library_downconverter/', fir_col_type], ...
'Position', [200*ctr+200 50 200*ctr+300 250], 'n_inputs', num2str(n_inputs),...
'coeff', ['[',num2str(coeff(ctr*n_inputs:-1:(ctr-1)*n_inputs+1)),']'],...
'mult_latency', num2str(mult_latency), 'add_latency', num2str(add_latency), ...
'coeff_bit_width', num2str(coeff_bit_width), 'coeff_bin_pt', num2str(coeff_bin_pt), ...
'adder_imp', adder_imp, 'first_stage_hdl', absorb_adders, ...
'async', async_str, 'dbl', symmet_str, 'bus_input', binput_str, ...
'input_width', num2str(input_width), 'input_bp', num2str(input_bp), 'input_type', input_type);
if bus_input,
if ctr == 1,
add_line(blk, 'dbus_in/1', [blk_name, '/1']);
else
add_line(blk, [prev_blk_name, '/1'], [blk_name, '/1']);
end
if coeff_sym,
add_line(blk, [blk_name, '/3'], ['real_sum/', num2str(ctr+1)]);
add_line(blk, [blk_name, '/4'], ['imag_sum/', num2str(ctr+1)]);
else
add_line(blk, [blk_name, '/2'], ['real_sum/', num2str(ctr+1)]);
add_line(blk, [blk_name, '/3'], ['imag_sum/', num2str(ctr+1)]);
end
if async_ops,
if coeff_sym,
add_line(blk, 'dv_in/1', [blk_name, '/3']);
else
add_line(blk, 'dv_in/1', [blk_name, '/2']);
end
end
else
if ctr == 1,
for ctr2 = 1:n_inputs,
add_line(blk, ['real', num2str(ctr2), '/1'], [blk_name, '/', num2str(2*ctr2-1)]);
add_line(blk, ['imag', num2str(ctr2), '/1'], [blk_name, '/', num2str(2*ctr2)]);
end
else
for ctr2 = 1:n_inputs,
add_line(blk, [prev_blk_name, '/', num2str(ctr2*2-1)], [blk_name, '/', num2str(ctr2*2-1)]);
add_line(blk, [prev_blk_name, '/', num2str(ctr2*2)], [blk_name, '/', num2str(ctr2*2)]);
end
end
if coeff_sym,
add_line(blk, [blk_name, '/', num2str(n_inputs*4+1)], ['real_sum/', num2str(ctr+1)]);
add_line(blk, [blk_name, '/', num2str(n_inputs*4+2)], ['imag_sum/', num2str(ctr+1)]);
else
add_line(blk, [blk_name, '/', num2str(n_inputs*2+1)], ['real_sum/', num2str(ctr+1)]);
add_line(blk, [blk_name, '/', num2str(n_inputs*2+2)], ['imag_sum/', num2str(ctr+1)]);
end
if async_ops,
if coeff_sym,
add_line(blk, 'dv_in/1', [blk_name, '/', num2str(n_inputs*4+1)]);
else
add_line(blk, 'dv_in/1', [blk_name, '/', num2str(n_inputs*2+1)]);
end
end
end
end
reuse_block(blk, 'shift1', 'xbsIndex_r4/Shift', ...
'shift_dir', 'Left', 'shift_bits', num2str(lshift), ...
'Position', [200*num_fir_col+500 300 200*num_fir_col+530 315]);
reuse_block(blk, 'shift2', 'xbsIndex_r4/Shift', ...
'shift_dir', 'Left', 'shift_bits', num2str(lshift), ...
'Position', [200*num_fir_col+500 500 200*num_fir_col+530 515]);
reuse_block(blk, 'convert1', 'xbsIndex_r4/Convert', ...
'Position', [200*num_fir_col+560 300 200*num_fir_col+590 315], ...
'n_bits', num2str(output_width), 'bin_pt', num2str(output_bp), 'arith_type', 'Signed (2''s comp)', ...
'latency', num2str(conv_latency), 'quantization', quantization);
reuse_block(blk, 'convert2', 'xbsIndex_r4/Convert', ...
'Position', [200*num_fir_col+560 500 200*num_fir_col+590 515], ...
'n_bits', num2str(output_width), 'bin_pt', num2str(output_bp), 'arith_type', 'Signed (2''s comp)', ...
'latency', num2str(conv_latency), 'quantization', quantization);
reuse_block(blk, 'ri_to_c', 'casper_library_misc/ri_to_c', ...
'Position', [200*num_fir_col+620 400 200*num_fir_col+650 430]);
reuse_block(blk, 'sync_out', 'built-in/outport', ...
'Position', [200*num_fir_col+500 250 200*num_fir_col+530 265], 'Port', '1');
reuse_block(blk, 'dout', 'built-in/outport', ...
'Position', [200*num_fir_col+680 400 200*num_fir_col+710 415], 'Port', '2');
add_line(blk, 'real_sum/2', 'shift1/1');
add_line(blk, 'imag_sum/2', 'shift2/1');
add_line(blk, 'shift1/1', 'convert1/1');
add_line(blk, 'shift2/1', 'convert2/1');
add_line(blk, 'convert1/1', 'ri_to_c/1');
add_line(blk, 'convert2/1', 'ri_to_c/2');
add_line(blk, 'ri_to_c/1', 'dout/1');
add_line(blk, 'sync_delay/1', 'real_sum/1');
add_line(blk, 'sync_delay/1', 'imag_sum/1');
add_line(blk, 'real_sum/1', 'sync_out/1');
% backward links for symmetric coefficients
if coeff_sym,
if bus_input,
for ctr = 2:num_fir_col,
blk_name = [fir_col_type, num2str(ctr)];
prev_blk_name = [fir_col_type, num2str(ctr-1)];
add_line(blk, [blk_name, '/2'], [prev_blk_name, '/2']);
end
% and the last one feeds back to itself
blk_name = [fir_col_type, num2str(num_fir_col)];
add_line(blk, [blk_name, '/1'], [blk_name, '/2']);
else
for ctr = 1:num_fir_col,
if ctr ~= 1
blk_name = [fir_col_type,num2str(ctr)];
prev_blk_name = [fir_col_type,num2str(ctr-1)];
for ctr2=1:n_inputs,
add_line(blk, [blk_name,'/', num2str(2*n_inputs+ctr2*2-1)], [prev_blk_name, '/', num2str(2*n_inputs+ctr2*2-1)]);
add_line(blk, [blk_name,'/', num2str(2*n_inputs+ctr2*2)], [prev_blk_name, '/', num2str(2*n_inputs+ctr2*2)]);
end
end
end
for ctr = 1:n_inputs,
blk_name = [fir_col_type, num2str(num_fir_col)];
add_line(blk,[blk_name, '/', num2str(ctr*2-1)], [blk_name, '/', num2str(2*n_inputs+ctr*2-1)]);
add_line(blk,[blk_name, '/', num2str(ctr*2)], [blk_name, '/', num2str(2*n_inputs+ctr*2)]);
end
end
end
if debug_fullscale_output,
if async_ops,
portnum = 4;
else
portnum = 3;
end
reuse_block(blk, 'real_fs', 'built-in/outport', ...
'Position', [200*num_fir_col+680 370 200*num_fir_col+710 385], 'Port', num2str(portnum));
reuse_block(blk, 'imag_fs', 'built-in/outport', ...
'Position', [200*num_fir_col+680 430 200*num_fir_col+710 445], 'Port', num2str(portnum+1));
add_line(blk,'real_sum/2','real_fs/1');
add_line(blk,'imag_sum/2','imag_fs/1');
end
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
% Set attribute format string (block annotation)
annotation=sprintf('%d taps\n%d_%d r/i', length(coeff), output_width, output_bp);
set_param(blk,'AttributesFormatString',annotation);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting dec_fir_async_init', 'trace');
|
github
|
mstrader/mlib_devel-master
|
pfb_fir_taps_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_fir_taps_init.m
| 15,043 |
utf_8
|
04feaa484e1ef983bbb20f092b49f22e
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% SKA Africa %
% http://www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens ([email protected]) %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%TODO Dave's adder width optimisation
function pfb_fir_taps_init(blk, varargin)
clog('entering pfb_fir_taps_init', 'trace');
defaults = { ...
'n_streams', 2, ...
'n_inputs', 0, ...
'pfb_size', 5, ...
'n_taps', 4, ...
'n_bits_data', 8, ...
'n_bits_coeff', 12, ...
'bin_pt_coeff', 11, ...
'complex', 'on', ...
'async', 'on', ...
'mult_latency', 2, ...
'add_latency', 1, ...
'fan_latency', 7, ... %TODO make a mask parameter
'bram_latency', 1, ...
'multiplier_implementation', 'behavioral HDL', ... 'embedded multiplier core' 'standard core' ...
'bram_optimization', 'Area', ... 'Speed', 'Area'
};
check_mask_type(blk, 'pfb_fir_taps');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
n_streams = get_var('n_streams', 'defaults', defaults, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
pfb_size = get_var('pfb_size', 'defaults', defaults, varargin{:});
n_taps = get_var('n_taps', 'defaults', defaults, varargin{:});
n_bits_data = get_var('n_bits_data', 'defaults', defaults, varargin{:});
n_bits_coeff = get_var('n_bits_coeff', 'defaults', defaults, varargin{:});
bin_pt_coeff = get_var('bin_pt_coeff', 'defaults', defaults, varargin{:});
complex = get_var('complex', 'defaults', defaults, varargin{:});
async = get_var('async', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency', 'defaults', defaults, varargin{:});
fan_latency = get_var('fan_latency', 'defaults', defaults, varargin{:});
multiplier_implementation = get_var('multiplier_implementation', 'defaults', defaults, varargin{:});
bram_optimization = get_var('bram_optimization', 'defaults', defaults, varargin{:});
if strcmp(complex, 'on'), mult_factor = 2;
else, mult_factor = 1;
end
n_outputs = (2^n_inputs)*n_streams;
delete_lines(blk);
%default empty block for storage in library
if n_taps == 0 | n_streams == 0,
clean_blocks(blk);
set_param(blk, 'AttributesFormatString', '');
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting pfb_fir_taps_init','trace');
return;
end
% input ports
reuse_block(blk, 'sync', 'built-in/Inport', 'Port', '1', 'Position', [70 23 100 37]);
reuse_block(blk, 'dsync', 'xbsIndex_r4/Delay', 'reg_retiming', 'on', 'latency', num2str(fan_latency), ...
'Position', [160 20 195 40]);
add_line(blk, 'sync/1', 'dsync/1');
reuse_block(blk, 'din', 'built-in/Inport', 'Port', '2', 'Position', [70 173 100 187]);
% delays to reduce fanout and help timing
reuse_block(blk, 'ddin0', 'xbsIndex_r4/Delay', 'reg_retiming', 'off', 'latency', num2str(fan_latency), ...
'Position', [160 170 195 190]);
add_line(blk, 'din/1', 'ddin0/1');
reuse_block(blk, 'ddin1', 'xbsIndex_r4/Delay', 'reg_retiming', 'off', 'latency', num2str(fan_latency), ...
'Position', [160 320 195 340]);
add_line(blk, 'din/1', 'ddin1/1');
reuse_block(blk, 'coeffs', 'built-in/Inport', 'Port', '3', 'Position', [70 398 100 412]);
reuse_block(blk, 'dcoeffs', 'xbsIndex_r4/Delay', 'reg_retiming', 'on', 'latency', num2str(fan_latency), ...
'Position', [160 395 195 415]);
add_line(blk, 'coeffs/1', 'dcoeffs/1');
if strcmp(async, 'on'),
reuse_block(blk, 'en', 'built-in/Inport', 'Port', '4', 'Position', [70 518 100 532]);
% reduce fanout
reuse_block(blk, 'en_replicate0', 'casper_library_bus/bus_replicate', ...
'replication', num2str(n_streams * 2^n_inputs * (n_taps-1)), ...
'latency', num2str(fan_latency), 'misc', 'off', 'implementation', 'core', ...
'Position', [160 433 195 457]);
add_line(blk, 'en/1', 'en_replicate0/1');
reuse_block(blk, 'en_replicate1', 'casper_library_bus/bus_replicate', ...
'replication', num2str(n_streams * 2^n_inputs * n_taps), ...
'latency', num2str(fan_latency), 'misc', 'off', 'implementation', 'core', ...
'Position', [160 473 195 497]);
add_line(blk, 'en/1', 'en_replicate1/1');
reuse_block(blk, 'en_replicate2', 'casper_library_bus/bus_replicate', ...
'replication', '2', 'latency', num2str(fan_latency), 'implementation', 'core', ...
'misc', 'off', 'Position', [160 513 195 537]);
add_line(blk, 'en/1', 'en_replicate2/1');
reuse_block(blk, 'en_expand', 'casper_library_flow_control/bus_expand', ...
'mode', 'divisions of equal size', 'outputNum', '2', ...
'outputWidth', '1', 'outputBinaryPt', '0', 'outputArithmeticType', '2', ...
'Position', [325 484 375 526]);
add_line(blk, 'en_replicate2/1', 'en_expand/1');
reuse_block(blk, 'den', 'xbsIndex_r4/Delay', 'reg_retiming', 'on', 'latency', '0', ...
'Position', [160 260 195 280]);
add_line(blk, 'en/1', 'den/1');
end
% sync pipeline
if strcmp(async, 'on'), delay_type = 'casper_library_delays/sync_delay_en';
else delay_type = 'casper_library_delays/sync_delay';
end
reuse_block(blk, 'sync_delay', delay_type , ...
'DelayLen', '(2^(pfb_size-n_inputs)+add_latency)*(n_taps-1)', ...
'Position', [425 13 475 82]);
add_line(blk, 'dsync/1', 'sync_delay/1');
if strcmp(async, 'on'), add_line(blk, 'en_expand/1', 'sync_delay/2');
end
reuse_block(blk, 'sync_delay0', 'xbsIndex_r4/Delay', 'reg_retiming', 'on', ...
'latency', 'mult_latency+1+add_latency+1', 'Position', [740 36 785 64]);
add_line(blk, 'sync_delay/1', 'sync_delay0/1');
reuse_block(blk, 'sync_out', 'built-in/Outport', 'Port', '1', 'Position', [1000 43 1030 57]);
add_line(blk, 'sync_delay0/1', 'sync_out/1');
% tap data delays
reuse_block(blk, 'youngest', 'xbsIndex_r4/Slice', ...
'nbits', ['(', num2str(mult_factor), '*' , num2str(n_bits_data), ')*', num2str(n_taps-2), '*', num2str(2^n_inputs), '*', num2str(n_streams)], ...
'mode', 'Upper Bit Location + Width', 'bit1', '0', 'base1', 'MSB of Input', ...
'Position', [70 201 100 219]);
reuse_block(blk, 'ddata0', 'casper_library_bus/bus_delay', ...
'n_bits', ['repmat(', num2str(n_bits_data*mult_factor),', 1, ', num2str(n_streams * 2^n_inputs * (n_taps-2)), ')'], ...
'latency', num2str(add_latency), 'reg_retiming', 'on', 'cmplx', 'off', 'misc', 'off', ...
'enable', async, 'Position', [245 200 275 235]);
add_line(blk, 'youngest/1', 'ddata0/1');
if strcmp(async, 'on'), add_line(blk, 'en_replicate0/1', 'ddata0/2');
end
reuse_block(blk, 'bram_din', 'xbsIndex_r4/Concat', 'num_inputs', '2', 'Position', [335 158 365 242]);
add_line(blk, 'ddin0/1', 'bram_din/1');
add_line(blk, 'ddata0/1', 'bram_din/2');
reuse_block(blk, 'ddata1', 'casper_library_bus/bus_delay', ...
'n_bits', ['repmat(', num2str(n_bits_data*mult_factor),', 1, ', num2str(n_streams * 2^n_inputs * (n_taps-1)), ')'], ...
'latency', num2str(add_latency), 'reg_retiming', 'on', 'cmplx', 'off', 'misc', 'off', ...
'enable', async, 'Position', [565 342 595 373]);
if strcmp(async, 'on'), add_line(blk, 'en_replicate1/1', 'ddata1/2');
end
reuse_block(blk, 'madd_din', 'xbsIndex_r4/Concat', 'num_inputs', '2', 'Position', [655 313 685 382]);
add_line(blk, 'ddin1/1', 'madd_din/1');
add_line(blk, 'ddata1/1', 'madd_din/2');
reuse_block(blk, 'counter', 'xbsIndex_r4/Counter', ...
'cnt_type', 'Count Limited', ...
'cnt_to', num2str(2^(pfb_size-n_inputs)-bram_latency-1), ...
'n_bits', num2str(pfb_size-n_inputs), 'bin_pt', '0', ...
'en', async, 'Position', [160 92 220 118]);
if strcmp(async, 'on'), add_line(blk, 'en/1', 'counter/1');
end
reuse_block(blk, 'we', 'xbsIndex_r4/Constant', ...
'const', '1', 'arith_type', 'Boolean', ...
'explicit_period', 'on', 'period', '1', ...
'Position', [380 227 395 243]);
reuse_block(blk, 'delay_bram', 'casper_library_bus/bus_single_port_ram', ...
'n_bits', mat2str(repmat(n_bits_data, 1, mult_factor*n_outputs*(n_taps-1))), ...
'bin_pts', mat2str(zeros(1, mult_factor*n_outputs*(n_taps-1))), ...
'init_vector', ['repmat(zeros(', mat2str(2^(pfb_size-n_inputs)), ', 1), 1, ', num2str(mult_factor*n_outputs*(n_taps-1)), ')'], ...
'max_fanout', '1', 'mem_type', 'Block RAM', 'bram_optimization', bram_optimization, ...
'async', async, 'misc', 'off', ...
'bram_latency', num2str(bram_latency), 'fan_latency', num2str(fan_latency), ...
'addr_register', 'on', 'addr_implementation', 'core', ...
'din_register', 'off', 'din_implementation', 'behavioral', ...
'we_register', 'off', 'we_implementation', 'behavioral', ...
'en_register', 'on', 'en_implementation', 'core', ...
'Position', [425 142 480 292]);
add_line(blk, 'counter/1', 'delay_bram/1');
add_line(blk, 'bram_din/1', 'delay_bram/2');
add_line(blk, 'we/1', 'delay_bram/3');
if strcmp(async, 'on'),
add_line(blk, 'den/1', 'delay_bram/4');
reuse_block(blk, 'terminator', 'built-in/Terminator', 'Position', [500 245 520 265]);
add_line(blk, 'delay_bram/2', 'terminator/1');
end
add_line(blk,'delay_bram/1', 'ddata1/1', 'autorouting', 'on');
add_line(blk,'delay_bram/1', 'youngest/1', 'autorouting', 'on');
% coefficient multiplication and add chain
n_bits_mult = n_bits_coeff+n_bits_data;
reuse_block(blk, 'dummy', 'xbsIndex_r4/Constant', ...
'const', '0', 'arith_type', 'Unsigned', ...
'n_bits', num2str(n_bits_mult*n_outputs*mult_factor), 'bin_pt', '0', ...
'explicit_period', 'on', 'period', '1', ...
'Position', [565 429 595 451]);
reuse_block(blk, 'partial_sum', 'xbsIndex_r4/Slice', ...
'nbits', num2str(sum([n_bits_mult+n_taps-2:-1:n_bits_mult])*n_outputs*mult_factor), ...
'mode', 'Upper Bit Location + Width', 'bit1', '0', 'base1', 'MSB of Input', ...
'Position', [565 465 595 485]);
reuse_block(blk, 'tap_chain', 'xbsIndex_r4/Concat', 'Position', [655 423 685 492]);
add_line(blk, 'dummy/1', 'tap_chain/1');
add_line(blk, 'partial_sum/1', 'tap_chain/2');
n_bits_c = reshape(repmat([n_bits_mult, [n_bits_mult:n_bits_mult+n_taps-2]], n_outputs*mult_factor, 1), 1, n_outputs*n_taps*mult_factor, 1);
n_bits_out = reshape(repmat([n_bits_mult:n_bits_mult+n_taps-1], n_outputs*mult_factor, 1), 1, n_outputs*mult_factor*n_taps, 1);
reuse_block(blk, 'bus_madd', 'casper_library_bus/bus_maddsub', ...
'n_bits_a', mat2str(repmat(n_bits_data, 1, mult_factor*n_outputs*n_taps)), ...
'bin_pt_a', num2str(n_bits_data-1), 'type_a', '1', 'cmplx_a', 'off', ...
'n_bits_b', mat2str(repmat(n_bits_coeff, 1, mult_factor*n_outputs*n_taps)), ...
'bin_pt_b', num2str(bin_pt_coeff), 'type_b', '1', ...
'mult_latency', num2str(mult_latency+1), ...
'multiplier_implementation', 'behavioral HDL', 'replication_ab', 'on', 'opmode', 'Addition', ...
'n_bits_c', mat2str(n_bits_c), 'bin_pt_c', num2str(n_bits_data-1+bin_pt_coeff), 'type_c', '1', ...
'add_implementation', 'behavioral HDL', 'add_latency', num2str(add_latency), ...
'async_add', async, 'align_c', 'off', 'replication_c', 'off', ...
'n_bits_out', mat2str(n_bits_out), 'bin_pt_out', num2str(n_bits_data-1+bin_pt_coeff), ...
'type_out', '1', 'quantization', '0', 'overflow', '0', ...
'add_latency', 'add_latency', 'max_fanout', '1', ...
'Position', [735 320 785 545]);
add_line(blk,'madd_din/1', 'bus_madd/1');
add_line(blk,'dcoeffs/1', 'bus_madd/2');
add_line(blk,'tap_chain/1', 'bus_madd/3');
if strcmp(async, 'on'), add_line(blk, 'en_expand/2', 'bus_madd/4');
end
add_line(blk,'bus_madd/1', 'partial_sum/1', 'autorouting', 'on');
reuse_block(blk, 'final_sum', 'xbsIndex_r4/Slice', ...
'nbits', num2str((n_bits_mult+n_taps-1)*n_outputs*mult_factor), ...
'mode', 'Lower Bit Location + Width', 'bit0', '0', 'base0', 'LSB of Input', ...
'Position', [850 369 880 391]);
add_line(blk,'bus_madd/1', 'final_sum/1');
reuse_block(blk, 'dfinal_sum', 'xbsIndex_r4/Delay', 'reg_retiming', 'on', ...
'latency', '1', 'Position', [940 370 975 390]);
add_line(blk, 'final_sum/1', 'dfinal_sum/1');
reuse_block(blk, 'dout', 'built-in/Outport', 'Port', '2', 'Position', [1000 373 1030 387]);
add_line(blk,'dfinal_sum/1', 'dout/1');
if strcmp(async, 'on'),
reuse_block(blk, 'dvalid', 'xbsIndex_r4/Delay', 'reg_retiming', 'on', ...
'latency', '1', 'Position', [940 480 975 500]);
add_line(blk, 'bus_madd/2', 'dvalid/1');
reuse_block(blk, 'valid', 'built-in/Outport', 'Port', '3', 'Position', [1000 483 1030 497]);
add_line(blk, 'dvalid/1', 'valid/1');
end
clean_blocks(blk);
set_param(blk, 'AttributesFormatString', '');
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('exiting pfb_fir_taps_init','trace');
end % pfb_fir_taps_init
|
github
|
mstrader/mlib_devel-master
|
pfb_coeff_gen_calc.m
|
.m
|
mlib_devel-master/casper_library/pfb_coeff_gen_calc.m
| 2,975 |
utf_8
|
a048c53f96fc6d702a677520ae492cfa
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2008 Terry Filiba %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function coeff_vector = pfb_coeff_gen_calc(PFBSize, TotalTaps, WindowType, n_inputs, nput, fwidth, a, debug)
% Calculate the bram coeffiecients for the pfb_coeff_gen block
%
% coeff_vector = pfb_coeff_gen_calc(PFBSize, TotalTaps, WindowType, n_inputs, nput, fwidth, a, debug)
%
% Valid arguments for this block are:
% PFBSize = Size of the FFT (2^FFTSize points).
% TotalTaps = Total number of taps in the PFB
% WindowType = The type of windowing function to use.
% n_inputs = Number of parallel input streams
% nput = Which input this is (of the n_inputs parallel).
% fwidth = The scaling of the bin width (1 is normal).
% a = Index of this rom (passing less than 0 will return all coefficients).
% debug = the coefficients across all inputs and taps form a ramp across the window.
% set coefficient vector
alltaps = TotalTaps*2^PFBSize;
if a < 0
index = 1 : alltaps;
else
cs = ((a - 1) * 2^PFBSize) + 1 + nput;
ce = ((a - 1) * 2^PFBSize) + 2^PFBSize;
index = cs : 2^n_inputs : ce;
end
if debug,
coeff_vector = index;
else
windowval = transpose(window(WindowType, alltaps));
total_coeffs = windowval .* sinc(fwidth * ([0:alltaps-1]/(2^PFBSize)-TotalTaps/2));
coeff_vector = total_coeffs(index);
end
% end
|
github
|
mstrader/mlib_devel-master
|
pfb_fir_init.m
|
.m
|
mlib_devel-master/casper_library/pfb_fir_init.m
| 15,476 |
utf_8
|
873b5c5e3b9f1de89a21e95f8beea8dc
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2007 Terry Filiba, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function pfb_fir_init(blk, varargin)
% Initialize and configure the Polyphase Filter Bank.
%
% pfb_fir_init(blk, varargin)
%
% blk = The block to configure.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% PFBSize = The size of the PFB
% TotalTaps = Total number of taps in the PFB
% WindowType = The type of windowing function to use.
% n_inputs = The number of parallel inputs
% MakeBiplex = Double up the PFB to feed a biplex FFT
% BitWidthIn = Input Bitwidth
% BitWidthOut = Output Bitwidth (0 == as needed)
% CoeffBitWidth = Bitwidth of Coefficients.
% CoeffDistMem = Implement coefficients in distributed memory
% add_latency = Latency through each adder.
% mult_latency = Latency through each multiplier
% bram_latency = Latency through each BRAM.
% quantization = 'Truncate', 'Round (unbiased: +/- Inf)', or 'Round
% (unbiased: Even Values)'
% fwidth = Scaling of the width of each PFB channel
% coeffs_share = Both polarizations will share coefficients.
clog('entering pfb_fir_init','trace');
% Declare any default values for arguments you might like.
defaults = {'PFBSize', 5, 'TotalTaps', 2, ...
'WindowType', 'hamming', 'n_inputs', 1, 'MakeBiplex', 'off', ...
'BitWidthIn', 8, 'BitWidthOut', 0, 'CoeffBitWidth', 18, ...
'CoeffDistMem', 'off', 'add_latency', 1, 'mult_latency', 2, ...
'bram_latency', 2, ...
'quantization', 'Round (unbiased: +/- Inf)', ...
'fwidth', 1, 'mult_spec', [2 2], ...
'coeffs_share', 'off', 'coeffs_fold', 'off'};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('pfb_fir_init post same_state','trace');
check_mask_type(blk, 'pfb_fir');
munge_block(blk, varargin{:});
PFBSize = get_var('PFBSize', 'defaults', defaults, varargin{:});
TotalTaps = get_var('TotalTaps', 'defaults', defaults, varargin{:});
WindowType = get_var('WindowType', 'defaults', defaults, varargin{:});
n_inputs = get_var('n_inputs', 'defaults', defaults, varargin{:});
MakeBiplex = get_var('MakeBiplex', 'defaults', defaults, varargin{:});
BitWidthIn = get_var('BitWidthIn', 'defaults', defaults, varargin{:});
BitWidthOut = get_var('BitWidthOut', 'defaults', defaults, varargin{:});
CoeffBitWidth = get_var('CoeffBitWidth', 'defaults', defaults, varargin{:});
CoeffDistMem = get_var('CoeffDistMem', 'defaults', defaults, varargin{:});
add_latency = get_var('add_latency', 'defaults', defaults, varargin{:});
mult_latency = get_var('mult_latency', 'defaults', defaults, varargin{:});
fan_latency = get_var('fan_latency', 'defaults', defaults, varargin{:});
bram_latency = get_var('bram_latency', 'defaults', defaults, varargin{:});
quantization = get_var('quantization', 'defaults', defaults, varargin{:});
fwidth = get_var('fwidth', 'defaults', defaults, varargin{:});
mult_spec = get_var('mult_spec', 'defaults', defaults, varargin{:});
coeffs_share = get_var('coeffs_share', 'defaults', defaults, varargin{:});
% check the multiplier specifications first off
tap_multipliers = multiplier_specification(mult_spec, TotalTaps, blk);
% share coeffs in a 2-pol setup?
pols = 1;
share_coefficients = false;
if strcmp(MakeBiplex, 'on'),
pols = 2;
if strcmp(coeffs_share, 'on')
share_coefficients = true;
end
end
% Compute the maximum gain through all of the 2^PFBSize sub-filters. This is
% used to determine how much bit growth is really needed. The maximum gain of
% each filter is the sum of the absolute values of its coefficients. The
% maximum of these gains sets the upper bound on bit growth through the
% pfb_fir. The products, partial sums, and final sum throughout the pfb_fir
% (including the adder tree) need not accomodate any more bit growth than the
% absolute maximum gain requires, provided that any "overflow" is ignored (i.e.
% set to "Wrap"). This works thanks to the wonders of modulo math. Note that
% the "gain" for typical signals will be different (less) than the absolute
% maximum gain of each filter. For Gaussian noise, the gain of a filter is the
% square root of the sum of the squares of the coefficients (aka
% root-sum-squares or RSS).
% Get all coefficients of the pfb_fir in one vector (by passing -1 for a)
all_coeffs = pfb_coeff_gen_calc(PFBSize, TotalTaps, WindowType, n_inputs, 0, fwidth, -1, false);
% Rearrange into matrix with 2^PFBSize rows and TotalTaps columns.
% Each row contains coefficients for one sub-filter.
all_filters = reshape(all_coeffs, 2^PFBSize, TotalTaps);
% Compute max gain
% NB: sum rows, not columns!
max_gain = max(sum(abs(all_filters), 2));
% Compute bit growth (make sure it is non-negative)
bit_growth = max(0, nextpow2(max_gain));
% Compute adder output width and binary point. We know that the adders in the
% adder tree need to have (bit_growth+1) non-fractional bits to accommodate the
% maximum gain. The products from the taps will have
% (BitWidthIn+CoeffBitWidth-2) fractional bits. We will preserve them through
% the adder tree.
adder_bin_pt_out = BitWidthIn + CoeffBitWidth - 2;
adder_n_bits_out = bit_growth + 1 + adder_bin_pt_out;
% If BitWidthOut is 0, set it to accomodate bit growth in the
% non-fractional part and full-precision of the fractional part.
if BitWidthOut == 0
BitWidthOut = adder_n_bits_out;
end
delete_lines(blk);
% Add ports
clog('adding inports and outports', 'pfb_fir_init_debug');
portnum = 1;
reuse_block(blk, 'sync', 'built-in/inport', ...
'Position', [0 50*portnum 30 50*portnum+15], 'Port', num2str(portnum));
reuse_block(blk, 'sync_out', 'built-in/outport', ...
'Position', [150*(TotalTaps+2) 50*portnum 150*(TotalTaps+2)+30 50*portnum+15], 'Port', num2str(portnum));
for p=1:pols,
for n=1:2^n_inputs,
portnum = portnum + 1; % Skip one to allow sync & sync_out to be 1
in_name = ['pol',num2str(p),'_in',num2str(n)];
out_name = ['pol',num2str(p),'_out',num2str(n)];
reuse_block(blk, in_name, 'built-in/inport', ...
'Position', [0 50*portnum 30 50*portnum+15], 'Port', num2str(portnum));
reuse_block(blk, out_name, 'built-in/outport', ...
'Position', [150*(TotalTaps+2) 50*portnum 150*(TotalTaps+2)+30 50*portnum+15], 'Port', num2str(portnum));
end
end
% Add blocks and Lines
portnum = 0;
for p=1:pols,
for n=1:2^n_inputs,
portnum = portnum + 1;
in_name = ['pol',num2str(p),'_in',num2str(n)];
out_name = ['pol',num2str(p),'_out',num2str(n)];
% add the coefficient generators
if (p == 2) && (share_coefficients == true)
blk_name = [in_name,'_delay'];
reuse_block(blk, blk_name, 'xbsIndex_r4/Delay', ...
'latency', 'bram_latency+1+fan_latency', 'Position', [150 50*portnum 150+100 50*portnum+30]);
add_line(blk, [in_name,'/1'], [blk_name,'/1']);
else
blk_name = [in_name,'_coeffs'];
reuse_block(blk, blk_name, 'casper_library_pfbs/pfb_coeff_gen', ...
'nput', num2str(n-1), 'CoeffDistMem', CoeffDistMem, 'Position', [150 50*portnum 150+100 50*portnum+30]);
propagate_vars([blk,'/',blk_name], 'defaults', defaults, varargin{:});
add_line(blk, [in_name,'/1'], [blk_name,'/1']);
add_line(blk, 'sync/1', [blk_name,'/2']);
end
clog(['adding taps for pol ', num2str(p), ' input ',num2str(n)], 'pfb_fir_init_debug');
for t = 1:TotalTaps,
% first tap
if t==1,
blk_name = [in_name,'_first_tap'];
reuse_block(blk, blk_name, 'casper_library_pfbs/first_tap', ...
'use_hdl', tap_multipliers(t).use_hdl, 'use_embedded', tap_multipliers(t).use_embedded,...
'Position', [150*(t+1) 50*portnum 150*(t+1)+100 50*portnum+30]);
propagate_vars([blk,'/',blk_name],'defaults', defaults, varargin{:});
if (p == 2) && (share_coefficients == true)
src_block = [strrep(in_name,'pol2','pol1'),'_coeffs'];
data_source = [in_name,'_delay/1'];
else
src_block = [in_name,'_coeffs'];
data_source = [src_block,'/1'];
end
add_line(blk, data_source, [blk_name,'/1']);
add_line(blk, 'pol1_in1_coeffs/2', [blk_name,'/2']);
add_line(blk, [src_block,'/3'], [blk_name,'/3']);
% last tap
elseif t==TotalTaps,
blk_name = [in_name,'_last_tap'];
reuse_block(blk, blk_name, 'casper_library_pfbs/last_tap', ...
'use_hdl', tap_multipliers(t).use_hdl, 'use_embedded', tap_multipliers(t).use_embedded,...
'Position', [150*(t+1) 50*portnum 150*(t+1)+100 50*portnum+30]);
propagate_vars([blk,'/',blk_name],'defaults', defaults, varargin{:});
% Update innards of the adder trees using our knowledge of
% maximum bit growth. This uses knowledge of the
% implementation of the "last_tap" block. This defeats the
% benefits of encapsulation, but the alternative is to make the
% underlying adder_tree block smarter and then make every block
% that encapsulates or uses an adder_tree smarter. Forcing
% such a global change for one or two specific cases seems a
% greater evil, IMHO.
pfb_add_tree = sprintf('%s/%s/pfb_add_tree', blk, blk_name);
for k=1:2
% Update adder blocks in the adder trees using our
% knowledge of maximum bit growth.
adders = find_system( ...
sprintf('%s/adder_tree%d', pfb_add_tree, k), ...
'LookUnderMasks','all', 'FollowLinks','on', ...
'SearchDepth',1, 'RegExp','on', 'Name','^addr');
for kk=1:length(adders)
set_param(adders{kk}, ...
'precision', 'User Defined', ...
'arith_type', 'Signed (2''s comp)', ...
'n_bits', tostring(adder_n_bits_out), ...
'bin_pt', tostring(adder_bin_pt_out), ...
'quantization', 'Truncate', ...
'overflow', 'Wrap');
end
% Adder tree output has bit_growth more non-fractional bits
% than BitWidthIn, but we want to keep the same number of
% non-fractional bits, so we must scale by 2^(-bit_growth).
set_param(sprintf('%s/scale%d', pfb_add_tree, k), ...
'scale_factor', tostring(-bit_growth));
% Because we have handled bit growth for maximum gain,
% there can be no overflow so the convert blocks can be set
% to "Wrap" to avoid unnecessary logic. If BitWidthOut is
% greater than adder_bin_pt_out, set their quantization to
% "Truncate" since there is no need to quantize.
if BitWidthOut > adder_bin_pt_out
conv_quant = 'Truncate';
else
conv_quant = quantization;
end
set_param(sprintf('%s/convert%d', pfb_add_tree, k), ...
'overflow', 'Wrap', 'quantization', conv_quant);
end
if t==2
prev_blk_name = ['pol',num2str(p),'_in',num2str(n),'_first_tap'];
else
prev_blk_name = ['pol',num2str(p),'_in',num2str(n),'_tap',num2str(t-1)];
end
for nn=1:4
add_line(blk, [prev_blk_name,'/',num2str(nn)], [blk_name,'/',num2str(nn)]);
end
add_line(blk, [blk_name,'/1'], [out_name,'/1']);
if n==1 && p==1
add_line(blk, [blk_name,'/2'], 'sync_out/1');
end
% intermediary taps
else
blk_name = ['pol',num2str(p),'_in',num2str(n),'_tap',num2str(t)];
reuse_block(blk, blk_name, 'casper_library_pfbs/tap', ...
'use_hdl', tap_multipliers(t).use_hdl, 'use_embedded', tap_multipliers(t).use_embedded,...
'mult_latency',tostring(mult_latency), 'coeff_width', tostring(CoeffBitWidth), ...
'coeff_frac_width',tostring(CoeffBitWidth-1), 'delay', tostring(2^(PFBSize-n_inputs)), ...
'data_width',tostring(BitWidthIn), 'bram_latency', tostring(bram_latency), ...
'Position', [150*(t+1) 50*portnum 150*(t+1)+100 50*portnum+30]);
if t==2,
prev_blk_name = ['pol',num2str(p),'_in',num2str(n),'_first_tap'];
else
prev_blk_name = ['pol',num2str(p),'_in',num2str(n),'_tap',num2str(t-1)];
end
for nn=1:4
add_line(blk, [prev_blk_name,'/',num2str(nn)], [blk_name,'/',num2str(nn)]);
end
end
end
end
end
clean_blocks(blk);
fmtstr = sprintf('taps=%d, add_latency=%d\nmax scale %.3f', ...
TotalTaps, add_latency, max_gain*2^-bit_growth);
set_param(blk, 'AttributesFormatString', fmtstr);
save_state(blk, 'defaults', defaults, varargin{:});
clog('exiting pfb_fir_init','trace');
|
github
|
mstrader/mlib_devel-master
|
fir_tap_init.m
|
.m
|
mlib_devel-master/casper_library/fir_tap_init.m
| 5,585 |
utf_8
|
e4d7b08fbc797a729c37965fae45537e
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% MeerKAT Radio Telescope Project %
% www.kat.ac.za %
% Copyright (C) 2013 Andrew Martens (meerKAT) %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function fir_tap_init(blk, varargin)
defaults = {};
check_mask_type(blk, 'fir_tap');
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
munge_block(blk, varargin{:});
factor = get_var('factor','defaults', defaults, varargin{:});
latency = get_var('latency','defaults', defaults, varargin{:});
coeff_bit_width = get_var('coeff_bit_width','defaults', defaults, varargin{:});
coeff_bin_pt = get_var('coeff_bin_pt','defaults', defaults, varargin{:});
delete_lines(blk);
%default state in library
if coeff_bit_width == 0,
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
return;
end
reuse_block(blk, 'a', 'built-in/Inport');
set_param([blk,'/a'], ...
'Port', '1', ...
'Position', '[205 68 235 82]');
reuse_block(blk, 'b', 'built-in/Inport');
set_param([blk,'/b'], ...
'Port', '2', ...
'Position', '[205 158 235 172]');
reuse_block(blk, 'Constant', 'xbsIndex_r4/Constant');
set_param([blk,'/Constant'], ...
'const', 'factor', ...
'n_bits', 'coeff_bit_width', ...
'bin_pt', 'coeff_bin_pt', ...
'explicit_period', 'on', ...
'Position', '[25 36 150 64]');
reuse_block(blk, 'Mult0', 'xbsIndex_r4/Mult');
set_param([blk,'/Mult0'], ...
'n_bits', '18', ...
'bin_pt', '17', ...
'latency', 'latency', ...
'use_behavioral_HDL', 'on', ...
'use_rpm', 'off', ...
'placement_style', 'Rectangular shape', ...
'Position', '[280 37 330 88]');
reuse_block(blk, 'Mult1', 'xbsIndex_r4/Mult');
set_param([blk,'/Mult1'], ...
'n_bits', '18', ...
'bin_pt', '17', ...
'latency', 'latency', ...
'use_behavioral_HDL', 'on', ...
'use_rpm', 'off', ...
'placement_style', 'Rectangular shape', ...
'Position', '[280 127 330 178]');
reuse_block(blk, 'Register0', 'xbsIndex_r4/Register');
set_param([blk,'/Register0'], ...
'Position', '[410 86 455 134]');
reuse_block(blk, 'Register1', 'xbsIndex_r4/Register');
set_param([blk,'/Register1'], ...
'Position', '[410 181 455 229]');
reuse_block(blk, 'a_out', 'built-in/Outport');
set_param([blk,'/a_out'], ...
'Port', '1', ...
'Position', '[495 103 525 117]');
reuse_block(blk, 'b_out', 'built-in/Outport');
set_param([blk,'/b_out'], ...
'Port', '2', ...
'Position', '[495 198 525 212]');
reuse_block(blk, 'real', 'built-in/Outport');
set_param([blk,'/real'], ...
'Port', '3', ...
'Position', '[355 58 385 72]');
reuse_block(blk, 'imag', 'built-in/Outport');
set_param([blk,'/imag'], ...
'Port', '4', ...
'Position', '[355 148 385 162]');
add_line(blk,'b/1','Mult1/2', 'autorouting', 'on');
add_line(blk,'b/1','Register1/1', 'autorouting', 'on');
add_line(blk,'a/1','Mult0/2', 'autorouting', 'on');
add_line(blk,'a/1','Register0/1', 'autorouting', 'on');
add_line(blk,'Constant/1','Mult1/1', 'autorouting', 'on');
add_line(blk,'Constant/1','Mult0/1', 'autorouting', 'on');
add_line(blk,'Mult0/1','real/1', 'autorouting', 'on');
add_line(blk,'Mult1/1','imag/1', 'autorouting', 'on');
add_line(blk,'Register0/1','a_out/1', 'autorouting', 'on');
add_line(blk,'Register1/1','b_out/1', 'autorouting', 'on');
% When finished drawing blocks and lines, remove all unused blocks.
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
end % fir_tap_init
|
github
|
mstrader/mlib_devel-master
|
remove_unused_blocks.m
|
.m
|
mlib_devel-master/casper_library/simulink_drawing_fns/remove_unused_blocks.m
| 2,395 |
utf_8
|
36fb8f02e3b72255ddb3d545cd1b4957
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function remove_unused_blocks( cursys )
%REMOVE_UNUSED_BLOCKS
% Complimentary block to function 'clean_blocks' which removes blocks
% with unused input ports. This function deletes a block if all of its
% output ports are unused.
blocks = get_param(cursys, 'Blocks');
for i=1:length(blocks),
blk = [cursys,'/',blocks{i}];
ports = get_param(blk, 'PortConnectivity');
keep_block = 0;
for j=1:length(ports),
if ports(j).DstBlock ~= -1,
keep_block = 1;
break
% elseif ~flag && (length(ports(j).SrcBlock) ~= 0 || length(ports(j).DstBlock) ~= 0),
% flag = 1;
end
end
if keep_block == 0,
delete_block(blk);
end
end
|
github
|
mstrader/mlib_devel-master
|
test_library.m
|
.m
|
mlib_devel-master/casper_library/Tests/test_library.m
| 11,837 |
utf_8
|
0bb32344ffdd3aa8acc937ae7fc69656
|
% function test_library(varargin)
%
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% tests_file - The file containing the module components to test
% test_type = Type of test to run ('all', library 'section', individual 'unit')
% subsection = Name of section when testing library subsection or section containing unit
% block = Name of individual block to run unit tests for
function test_library(varargin)
defaults = {'tests_file', 'tester_input.txt', 'test_type', 'unit', ...
'subsection', 'Misc', 'block', 'adder_tree', 'stop_first_fail', 'on' };
tests_file = get_var('tests_file', 'defaults', defaults, varargin{:});
test_type = get_var('test_type', 'defaults', defaults, varargin{:});
subsection = get_var('subsection', 'defaults', defaults, varargin{:});
block = get_var('block', 'defaults', defaults, varargin{:});
stop_first_fail = get_var('stop_first_fail', 'defaults', defaults, varargin{:});
%variables used to track number of failures and lines ignored
passed = 0;
failed = 0;
ignore = 0;
fid = fopen(tests_file);
if (fid == -1),
fprintf(['File "', tests_file, '" not found in local directory.\n']);
return
end
%libraries needing to be loaded expected on first line of tests_file
libs_raw = fgetl(fid);
linenum = 1;
if ~ischar(libs_raw),
disp(['Libraries to load expected on first line of ',tests_file]);
return;
end
%go through string getting libraries
idx = 1;
libs = {};
[lib, remainder] = strtok(libs_raw);
while length(lib) ~= 0,
libs{idx} = lib;
idx = idx+1;
[lib, remainder] = strtok(remainder);
end;
%load the appropriate libraries
for lib_idx = 1:length(libs),
lib_name = libs{lib_idx};
if (exist(lib_name, 'file') ~= 4),
disp(['Library ', lib_name, ' not accessible. Aborting...\n']);
return
else
warning('off', 'Simulink:SL_LoadMdlParameterizedLink')
load_system(lib_name);
fprintf([lib_name, ' loaded\n']);
end
end
%search for subsection to test
if ~strcmp(test_type, 'all'),
comment = ' ';
token = ' ';
sec = ' ';
%start of subsection demarcated with % # <subsection name>, keep searching till found
while (~strcmp(comment, '%') || ~strcmp(token, '#') || ~strcmp(sec, subsection)),
line = fgetl(fid);
linenum = linenum + 1;
if ~ischar(line),
fprintf(['Error reading from file ',tests_file ,', or end of file before subsection ',subsection,' found.\n']);
fclose(fid);
for lib_idx = 1:length(libs),
close_system(libs{lib_idx})
end
return
end
[comment, remainder] = strtok(line);
[token, remainder] = strtok(remainder);
[sec, remainder] = strtok(remainder);
end
fprintf(['Begining of test subsection ', subsection, ' found at line ', num2str(linenum),'\n']);
blk = ' ';
section = ' ';
if strcmp(test_type, 'unit') || strcmp(test_type, 'section from block'),
%search for tests for block specified until end of section or block found
while ~((strcmp(blk, '%') && strcmp(section, '#')) || strcmp(blk, block)),
line = fgetl(fid);
linenum = linenum + 1;
if ~ischar(line),
fprintf(['Error reading from file ',tests_file ,', or end of file before block ',block,' or end of section ',subsection,' found.\n']);
fclose(fid);
for lib_idx = 1:length(libs),
close_system(libs{lib_idx})
end
return
end
[blk, remainder] = strtok(line);
[section, remainder] = strtok(remainder);
end
%if found end of section without finding block
if(~strcmp(blk, block)),
fprintf(['End of subsection ',subsection,' found on line ',num2str(linenum), ' without test for block ',block,'\n']);
fclose(fid);
for lib_idx = 1:length(libs),
close_system(libs{lib_idx})
end
return;
else
fprintf(['Unit test(s) for block ', block,' found on line ', num2str(linenum),'\n']);
end
end
end
%read one extra line if testing subsections
if strcmp(test_type, 'section'),
line = fgetl(fid);
linenum = linenum+1;
end
fprintf('\n');
%run tests
while ischar(line),
%read in the block to be tested and the model file
[blk, remainder] = strtok(line);
[libloc, remainder] = strtok(remainder);
[model, remainder] = strtok(remainder);
%found end of section to be tested and not testing everything
if (~strcmp(test_type, 'all') && strcmp(blk, '%') && strcmp('#', libloc)),
fprintf(['End of test subsection ', subsection, ' found at line ', num2str(linenum), '.']);
break;
end
%stop if unit testing and (encountered new library subsection or end of unit tests)
if (strcmp(test_type, 'unit') && (...
(~strcmp(blk, block) && ~strcmp(blk, '%')) || ...
(strcmp(blk, '%') && strcmp(libloc, '#')))),
fprintf(['End of tests for ', block, ' found at line ', num2str(linenum), '.']);
break;
end
%if commment just continue
if strcmp('%', blk) || blk(1) == '%',
line = fgetl(fid);
linenum = linenum + 1;
continue;
end
err = 1;
% if there is no block, library location or model file, ignore this line
if isempty(blk) || isempty(libloc) || isempty(model),
if isempty(blk),
fprintf(['Library block not specified on line ',linenum, '.\n']);
end
if isempty(libloc),
fprintf(['Location of block in library not specified on line ',linenum, '.\n']);
end
if isempty(model),
fprintf(['Unit test model file not specified on line ',linenum, '.\n']);
end
fprintf(['Line read: ',line, '\n']);
% if the model file does not exist, ignore this line
elseif (exist(model, 'file') ~= 4),
fprintf(['Model file ''', model, '.mdl'' does not exist.\n']);
% load model and try to find block specified
else
% try to find library block specified
lib = [];
fprintf(['Trying to find library block ', libloc, '...']);
try
lib = find_system(libloc);
catch
fprintf(' failure\n');
err = 1;
end
if isempty(lib),
err = 1;
else
fprintf(' success\n');
end
% try to find block in model
fprintf(['Trying to find ', blk, ' in model file ', model, ' ...']);
warning('off', 'Simulink:SL_LoadMdlParameterizedLink')
load_system(model);
% finds block with name followed by zero or more digits [0-9]
thisblk = find_system(model, 'Regexp', 'on', 'name', ['\<',blk,'[\d]*\>']);
if isempty(thisblk),
fprintf(' failure\n');
else
fprintf(' success\n');
pos = get_param(thisblk, 'Position');
err = 0;
end
end
%error in unit test setup, ignore line
if err,
fprintf('\n************************************\n');
fprintf(['* Ignoring line ', num2str(linenum), '.\n']);
fprintf('************************************\n\n');
ignore = ignore + 1;
%if we need to stop on first failure, exit here
if strcmp(stop_first_fail, 'on'),
close_system(model, 0);
break;
else
close_system(model, 0);
end
else
%add the latest library block to the model
try
add_block(libloc, [model, '/', blk, '1']);
catch
fprintf(['Error creating ',model,'/',blk,'1',' from ', libloc,'.\n']);
err = 1;
close_system(model, 0);
end
%set up parameters if no error in creating block
if ~err,
%read in block parameters
vars = {};
i = 0;
[name, remainder] = get_token(remainder);
[value, remainder] = get_token(remainder);
while (~isempty(name) && ~isempty(value)),
fprintf(['setting ', name, ' to ', value, '\n']);
vars{(i*2)+1} = ['', name, ''];
vars{(i*2)+2} = value;
%if are dealing with Configurable Subsystem
if strcmp('BlockChoice', name),
fprintf('Reconfigurable subsystem detected. Unable to do those.\n');
err = 1;
end
[name, remainder] = get_token(remainder);
[value, remainder] = get_token(remainder);
i = i + 1;
end
set_mask([model, '/', blk, '1'], vars{:});
end
%set position to the same so lines join ports
%NOTE must be *after* setting mask params as determine port locations, wont
%lock on to old inputs
if ~err,
delete_block(thisblk{:});
set_param([model, '/', blk, '1'], 'Position', pos{:});
%if no error so far simulate
fprintf(['simulating ', model, ' ...\n']);
sim(model);
if exist([model, '_reference.mat']) ~= 2,
fprintf([model, '_reference.mat containing reference output not found in path\n']);
err = 1;
end
if exist([model, '_output.mat']) ~= 2,
fprintf([model, '_output.mat containing simulation output not found\n']);
err = 1;
end
end
%load reference and output data from file
if ~err,
load([model, '_reference'],'reference');
if exist('reference') ~= 1,
fprintf(['Variable ''reference'' not found in Workspace\n']);
err = 1;
end
load([model, '_output'],'output');
if exist('output') ~= 1,
fprintf(['Variable ''output'' not found in Workspace\n']);
err = 1;
end
end
%compare reference data to output
if ~err,
%check for NaNs and replace with zeros before making comparison
reference(isnan(reference)) = 0;
output(isnan(output)) = 0;
if isequal(reference, output),
fprintf([model, ' passed\n']);
passed = passed + 1;
else
fprintf('\n*******************************************************************\n');
fprintf([model, ' failed, line ', num2str(linenum), '. Output and reference files differ.\n']);
fprintf('*******************************************************************\n\n');
failed = failed + 1;
%if we need to stop on first failure, exit here, leaving model open
if strcmp(stop_first_fail, 'on'),
fprintf(['Exiting on first failure as specified\n\n']);
break;
end
end
else
fprintf('\n************************************\n');
fprintf(['Ignoring line ', num2str(linenum), '.\n']);
fprintf('************************************\n\n');
ignore = ignore + 1;
%if we need to stop on first failure, exit here
if strcmp(stop_first_fail, 'on'),
fprintf(['Exiting on first failure as specified\n\n']);
break;
end
end
close_system(model, 0);
fprintf('\n');
end
line = fgetl(fid);
linenum = linenum + 1;
end
%close unit test file
fclose(fid);
%close libraries
for lib_idx = 1:length(libs),
close_system(libs{lib_idx})
end
fprintf('\n\n');
fprintf(['lines ignored: ', num2str(ignore), '\n']);
fprintf(['tests passed: ', num2str(passed), '\n']);
fprintf(['tests failed: ', num2str(failed), '\n']);
if (failed || ignore),
fprintf('Please see output for more details.\n');
end
|
github
|
mstrader/mlib_devel-master
|
get_v.m
|
.m
|
mlib_devel-master/casper_library/Tests/get_v.m
| 2,168 |
utf_8
|
34aca4c2733ff9235a6df03313be4c5c
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006-2007 David MacMahon, Aaron Parsons %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function value = get_v(varname, varargin)
% Find the value of varname in varargin. If varname is not found, looks
% for 'defaults' and tries to find varname in there. If any of this fails,
% return Nan.
%
% value = get_var(varname, varargin)
%
% varname = the variable name to retrieve (as a string).
% varargin = {'varname', value, ...} pairs
i = find(strcmp(varname,varargin));
if i >= 1,
value = varargin{i+1};
else
value = nan;
end
|
github
|
mstrader/mlib_devel-master
|
set_mask.m
|
.m
|
mlib_devel-master/casper_library/Tests/set_mask.m
| 2,755 |
utf_8
|
358c188816bbef003c44f5fce8da7023
|
% Rewrites mask parameters as strings if short enough, otherwise call to extract.
%
% ate_mask( blk, varargin )
%
% blk - The block whose mask will be modified
% varargin - {'var', 'value', ...} pairs
%
% Cycles through the list of mask parameter variable names. Appends a new cell
% with the variable value (extracted from varargin) as a string to a cell array if
% value short enough, otherwise a call to its value in 'UserData'. Overwrites the
% 'MaskValues' parameter with this new cell array. Essentially converts any pointers
% or references to strings in the mask.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 David MacMahon, Aaron Parsons, %
% Copyright (C) 2008 Andrew Martens %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function set_mask(blk,varargin)
% Match mask names to {variables, values} in varargin
masknames = get_param(blk, 'MaskNames');
mv = {};
for i=1:length(masknames),
varname = masknames{i};
value = get_v(varname, varargin{:});
if( isa(value,'char')), mv{i} = value;
else, mv{i} = mat2str(value);
end
end
%Back populate mask parameter values
set_param(blk,'MaskValues',mv);
|
github
|
mstrader/mlib_devel-master
|
x64_adc_mask.m
|
.m
|
mlib_devel-master/xps_library/x64_adc_mask.m
| 5,722 |
utf_8
|
8347ff2bb1075c3b4e3d42d1a5eb3cc4
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function x64_adc_mask(blk, varargin)
check_mask_type(blk, 'x64_adc');
myname = blk;
use_spi = get_var('spi', varargin{:});
munge_block(myname);
% create SPI ports if interface enabled
if use_spi == 1
% try
add_block(['built-in/inport'],[myname,'/sdata'],'Position', [510 190 540 210], 'Port', '19');
add_block(['built-in/inport'],[myname,'/spi_strb' ],'Position', [510 270 540 290], 'Port', '20');
add_block(['xbsIndex_r4/Gateway Out'],[myname,'/user_sdata' ],'Position', [705 190 765 210]);
add_block(['xbsIndex_r4/Gateway Out'],[myname,'/user_spi_strb' ],'Position', [705 270 765 290]);
add_block(['xbsIndex_r4/Convert'],[myname,'/sdata_conv' ],'Position', [595 185 640 215], ...
'arith_type', 'Unsigned', 'n_bits', '8', 'bin_pt', '0');
add_block(['xbsIndex_r4/Convert'],[myname,'/spi_strb_conv' ],'Position', [595 265 640 295], ...
'arith_type', 'Unsigned', 'n_bits', '1', 'bin_pt', '0');
add_block(['built-in/terminator'],[myname,'/sdata_term'],'Position', [845 190 865 210]);
add_block(['built-in/terminator'],[myname,'/spi_strb_term' ],'Position', [845 270 865 290]);
add_line(myname,'sdata/1','sdata_conv/1');
add_line(myname,'spi_strb/1' ,'spi_strb_conv/1');
add_line(myname,'sdata_conv/1','user_sdata/1');
add_line(myname,'spi_strb_conv/1' ,'user_spi_strb/1');
add_line(myname,'user_sdata/1','sdata_term/1');
add_line(myname,'user_spi_strb/1' ,'spi_strb_term/1');
%end
else %delete the SPI ports
try
delete_line(myname, 'sdata/1', 'sdata_conv/1');
delete_line(myname, 'spi_strb/1' , 'spi_strb_conv/1');
delete_line(myname, 'sdata_conv/1', [strrep([myname, '_user_sdata'], '/', '_'), '/1']);
delete_line(myname, 'spi_strb_conv/1', [strrep([myname, '_user_spi_strb'], '/', '_'), '/1']);
delete_line(myname, [strrep([myname, '_user_sdata'], '/', '_'), '/1'], 'sdata_term/1');
delete_line(myname, [strrep([myname, '_user_spi_strb'], '/', '_'), '/1'], 'spi_strb_term/1');
end
try
delete_block([myname,'/sdata']);
delete_block([myname,'/spi_strb']);
delete_block([myname,'/user_sdata']);
delete_block([myname,'/user_spi_strb']);
delete_block([myname,'/sdata_conv']);
delete_block([myname,'/spi_strb_conv']);
delete_block([myname,'/sdata_term']);
delete_block([myname,'/spi_strb_term']);
end
end
clean_blocks(myname);
% relabel the gateway ins...
gateway_ins = find_system(gcb,'searchdepth',1,'FollowLinks', 'on', 'lookundermasks','all','masktype','Xilinx Gateway In Block');
for n = 1:length(gateway_ins)
gw = gateway_ins{n};
if regexp(get_param(gw,'Name'),'(user_data\d+)$')
toks = regexp(get_param(gw,'Name'),'(user_data\d+)$','tokens');
set_param(gw,'Name',clear_name([gcb,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(user_chan_sync)$')
toks = regexp(get_param(gw,'Name'),'(user_chan_sync)$','tokens');
set_param(gw,'Name',clear_name([gcb,'_',toks{1}{1}]));
else
error(['Unknown gateway name: ',gw]);
end
end
% relabel the gateway outs...
gateway_outs = find_system(gcb,'searchdepth',1,'FollowLinks', 'on', 'lookundermasks','all','masktype','Xilinx Gateway Out Block');
for n = 1:length(gateway_outs)
gw = gateway_outs{n};
if regexp(get_param(gw,'Name'),'(user_rst)$')
toks = regexp(get_param(gw,'Name'),'(user_rst)$','tokens');
set_param(gw,'Name',clear_name([gcb,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(user_sdata)$')
toks = regexp(get_param(gw,'Name'),'(user_sdata)$','tokens');
set_param(gw,'Name',clear_name([gcb,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(user_spi_strb)$')
toks = regexp(get_param(gw,'Name'),'(user_spi_strb)$','tokens');
set_param(gw,'Name',clear_name([gcb,'_',toks{1}{1}]));
else
error(['Unknown gateway name: ',gw]);
end
end
|
github
|
mstrader/mlib_devel-master
|
eval_param.m
|
.m
|
mlib_devel-master/xps_library/eval_param.m
| 3,467 |
utf_8
|
01ba08e7c4d8ea103d17775a17d054dc
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function result = eval_param(blk,param_name)
param_str = get_param(blk,param_name);
result = param_str;
% If param_str is empty, we're done!
if isempty(param_str)
return;
end
% If it is not an evaluated parameter, we're done!
mask_vars = get_param(blk, 'MaskVariables');
pattern = sprintf('(^|;)%s=@\\d+', param_name);
mv_match = regexp(mask_vars, pattern, 'match', 'once');
if isempty(mv_match)
return;
end
% If it is not an edit field parameter, we're done! Some non-edit fields like
% checkbox and popup are set to "evaluate" even though it makes no sense to
% evaluate their values. Because of this, we need to check explicitly whether
% this parameter value comes from an edit field.
%
% Parse mask variable index from matched portion of MaskVariables.
% (Is there a better way to do this?)
mv_idx = str2num(regexp(mv_match, '\d+', 'match', 'once'));
% Get cell array of all mask styles
mask_styles = get_param(blk, 'MaskStyles');
if ~strcmp(mask_styles{mv_idx}, 'edit')
return;
end
try
result = eval(param_str);
catch
parents = {};
parent = blk;
while ~isempty(parent)
parents = [{parent},parents];
parent = get_param(parent,'parent');
end
for i=1:length(parents)
parent = parents{i};
if strcmp(get_param(parent,'type'),'block_diagram')
ws = get_param(parent,'ModelWorkSpace');
if ismethod(ws, 'whos')
ws_arry = ws.whos;
for i=1:length(ws_arry)
ws_var = ws_arry(i);
val = ws.evalin(ws_var.name);
eval([ws_var.name,' = val;']);
end
end
elseif strcmp(get_param(parent,'type'),'block')
ws_arry = get_param(parent,'MaskWSVariables');
for i=1:length(ws_arry)
eval([ws_arry(i).Name,' = ws_arry(i).Value;']);
end
else
error('Unsupported block type');
end
end
result = eval(param_str);
end
|
github
|
mstrader/mlib_devel-master
|
load_hw_routes.m
|
.m
|
mlib_devel-master/xps_library/load_hw_routes.m
| 1,885 |
utf_8
|
994fa2676c9628ed02e0b1f977da29fe
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://casper.berkeley.edu/ %
% Copyright (C) 2013 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function load_hw_routes()
hw_routes_file = getenv('CASPER_HW_ROUTES');
if isempty(hw_routes_file)
hw_routes_file = 'hw_routes.mat';
end
evalin('caller', ['load(''',hw_routes_file,''')']);
end
|
github
|
mstrader/mlib_devel-master
|
casper_xps.m
|
.m
|
mlib_devel-master/xps_library/casper_xps.m
| 15,977 |
utf_8
|
9b67c081216fb455b94770a3b6749194
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function varargout = casper_xps(varargin)
% CASPER_XPS CASPER Xilinx ISE Batch Tools GUI
% Last Modified by GUIDE v2.5 09-Oct-2012 12:36:59
if nargin == 0 % LAUNCH GUI
fig = openfig(mfilename,'reuse');
% Use system color scheme for figure:
set(fig,'Color',get(0,'defaultUicontrolBackgroundColor'));
% Generate a structure of handles to pass to callbacks, and store it.
handles = guihandles(fig);
guidata(fig, handles);
if nargout > 0
varargout{1} = fig;
end
if ~isempty(gcs)
set(handles.design_name,'String',gcs);
end
%get the Xilinx Sysgen version
xsg = xlVersion;
try
xsg = strtok(xsg{1},' ');
catch
xsg = get_xlVersion('full');
end
switch xsg
case {'11.3.2055'}
set(handles.xsg_version,'String','11.3');
case {'11.4.2254'}
set(handles.xsg_version,'String','11.4');
case {'11.5.2275'}
set(handles.xsg_version,'String','11.5');
case {'13.3'}
set(handles.xsg_version,'String','13.3');
case {'14.2'}
set(handles.xsg_version,'String','14.2');
case {'14.3'}
set(handles.xsg_version,'String','14.3');
case {'14.4'}
set(handles.xsg_version,'String','14.4');
case {'14.5'}
set(handles.xsg_version,'String','14.5');
case {'14.6'}
set(handles.xsg_version,'String','14.6');
case {'14.7'}
set(handles.xsg_version,'String','14.7');
otherwise
errordlg(['Unsupported Xilinx System Generator version: ',xsg]);
return;
end
elseif ischar(varargin{1}) % INVOKE NAMED SUBFUNCTION OR CALLBACK
try
if (nargout)
[varargout{1:nargout}] = feval(varargin{:}); % FEVAL switchyard
else
feval(varargin{:}); % FEVAL switchyard
end
catch ex
disp(ex.message);
end
end
%| ABOUT CALLBACKS:
%| GUIDE automatically appends subfunction prototypes to this file, and
%| sets objects' callback parameters to call them through the FEVAL
%| switchyard above. This comment describes that mechanism.
%|
%| Each callback subfunction declaration has the following form:
%| <SUBFUNCTION_NAME>(H, EVENTDATA, HANDLES, VARARGIN)
%|
%| The subfunction name is composed using the object's Tag and the
%| callback type separated by '_', e.g. 'slider2_Callback',
%| 'figure1_CloseRequestFcn', 'axis1_ButtondownFcn'.
%|
%| H is the callback object's handle (obtained using GCBO).
%|
%| EVENTDATA is empty, but reserved for future use.
%|
%| HANDLES is a structure containing handles of components in GUI using
%| tags as fieldnames, e.g. handles.figure1, handles.slider2. This
%| structure is created at GUI startup using GUIHANDLES and stored in
%| the figure's application data using GUIDATA. A copy of the structure
%| is passed to each callback. You can store additional information in
%| this structure at GUI startup, and you can change the structure
%| during callbacks. Call guidata(h, handles) after changing your
%| copy to replace the stored original so that subsequent callbacks see
%| the updates. Type "help guihandles" and "help guidata" for more
%| information.
%|
%| VARARGIN contains any extra arguments you have passed to the
%| callback. Specify the extra arguments by editing the callback
%| property in the inspector. By default, GUIDE sets the property to:
%| <MFILENAME>('<SUBFUNCTION_NAME>', gcbo, [], guidata(gcbo))
%| Add any extra arguments after the last argument, before the final
%| closing parenthesis.
% --------------------------------------------------------------------
function varargout = listbox1_Callback(h, eventdata, handles, varargin)
% --------------------------------------------------------------------
function varargout = run_Callback(h, eventdata, handles, varargin)
design_name = get(handles.design_name,'String');
xsg_version = get(handles.xsg_version,'Value');
flow_vec.update = get(handles.run_update ,'Value');
flow_vec.drc = get(handles.run_drc ,'Value');
flow_vec.xsg = get(handles.run_xsg ,'Value');
flow_vec.copy = get(handles.run_copy ,'Value');
flow_vec.ip = get(handles.run_ip ,'Value');
flow_vec.edkgen = get(handles.run_edkgen ,'Value');
flow_vec.elab = get(handles.run_elab ,'Value');
flow_vec.software = get(handles.run_software,'Value');
flow_vec.edk = get(handles.run_edk ,'Value');
try
[time_total, time_struct] = gen_xps_files(design_name,flow_vec);
disp('===================================================================');
disp(['Flow run time summary: (',datestr(time_total,13),' seconds total)']);
disp([' System update............',datestr(time_struct.update ,13)]);
disp([' Design Rules Check.......',datestr(time_struct.drc ,13)]);
disp([' Xilinx System Generator..',datestr(time_struct.xsg ,13)]);
disp([' Base system copy.........',datestr(time_struct.copy ,13)]);
disp([' IP creation..............',datestr(time_struct.ip ,13)]);
disp([' EDK files creation.......',datestr(time_struct.edkgen ,13)]);
disp([' IP elaboration...........',datestr(time_struct.elab ,13)]);
disp([' Software creation........',datestr(time_struct.software,13)]);
disp([' EDK/ISE backend..........',datestr(time_struct.edk ,13)]);
disp('===================================================================');
msgbox(['CASPER XPS run successfully completed in ',datestr(time_total,13),'!']);
catch
disp(lasterr);
errordlg('Error detected running CASPER XPS, please check Matlab command window for error messages');
end
% --------------------------------------------------------------------
function varargout = view_log_Callback(h, eventdata, handles, varargin)
sys = get(handles.design_name,'String');
view_choice = get(handles.log_menu,'Value');
view_shortcuts = get(handles.log_menu,'String');
xps_xsg_blks = find_system(sys,'FollowLinks','on','LookUnderMasks','all','Tag','xps:xsg');
if length(xps_xsg_blks) ~= 1
error('There has to be only 1 XPS_xsg block on each chip level (sub)system');
end
xsg_blk = xps_xsg_blks{1};
sysgen_blk = find_system(sys, 'SearchDepth', 1,'FollowLinks','on','LookUnderMasks','all','Tag','genX');
if length(sysgen_blk) ~= 1
error('XPS_xsg block must be on the same level as the Xilinx SysGen block');
end
[hw_sys, hw_subsys] = xps_get_hw_plat(get_param(xsg_blk,'hw_sys'));
work_path = [pwd,'\',clear_name(get_param(xsg_blk,'parent'))];
xps_path = [work_path,'\XPS_',hw_sys,'_base'];
xsg_path = [work_path,'\sysgen'];
xsg_core_name = clear_name(get_param(xsg_blk,'parent'));
design_name = [xsg_core_name,'_clk_wrapper'];
switch view_shortcuts{view_choice}
case 'EDK Log'
if ~exist([xps_path,'/system.log'])
errordlg('EDK log file does not exist, please make sure you have run EDK/ISE step first.');
return;
end
edit([xps_path,'/system.log']);
case 'XFLOW Log'
if ~exist([xps_path,'/implementation/xflow.log'])
errordlg('XFLOW log file does not exist, please make sure you have run EDK/ISE step first.');
return;
end
edit([xps_path,'/implementation/xflow.log']);
case 'MAP Report'
if ~exist([xps_path,'/implementation/system_map.mrp'])
errordlg('MAP report file does not exist, please make sure you have run EDK/ISE step first.');
return;
end
edit([xps_path,'/implementation/system_map.mrp']);
case 'Timing Report'
if ~exist([xps_path,'/implementation/system.twr'])
errordlg('Timing report file does not exist, please make sure you have run EDK/ISE step first.');
return;
end
edit([xps_path,'/implementation/system.twr']);
otherwise
error(['Unkown log choice: ',view_shortcuts{view_choice}]);
end
return;
% --------------------------------------------------------------------
function varargout = get_gcs_Callback(h, eventdata, handles, varargin)
set(handles.design_name,'String',gcs);
return;
% --------------------------------------------------------------------
function varargout = open_sys_Callback(h, eventdata, handles, varargin)
design_name = get(handles.design_name,'String');
if isempty(gcs) | ~strcmp(gcs,design_name)
try
open_system(design_name);
catch
errordlg(sprintf('Error cannot open system %c%s%c',39, design_name, 39));
return;
end
end
return;
% --- Executes on button press in run_mode.
function run_mode_Callback(hObject, eventdata, handles)
% hObject handle to run_mode (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_mode
% --- Executes on button press in run_elab.
function run_elab_Callback(hObject, eventdata, handles)
% hObject handle to run_elab (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_elab
% --- Executes on selection change in design_flow.
function design_flow_Callback(hObject, eventdata, handles)
% hObject handle to design_flow (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hints: contents = get(hObject,'String') returns design_flow contents as cell array
% contents{get(hObject,'Value')} returns selected item from design_flow
flow_shortcuts = get(handles.design_flow,'String');
flow_choice = get(handles.design_flow,'Value');
switch flow_shortcuts{flow_choice}
case 'Complete Build'
set(handles.run_update ,'Value',1);
set(handles.run_drc ,'Value',1);
set(handles.run_xsg ,'Value',1);
set(handles.run_copy ,'Value',1);
set(handles.run_ip ,'Value',1);
set(handles.run_edkgen ,'Value',1);
set(handles.run_elab ,'Value',1);
set(handles.run_software,'Value',1);
set(handles.run_edk ,'Value',1);
case 'Software Only'
set(handles.run_update ,'Value',0);
set(handles.run_drc ,'Value',0);
set(handles.run_xsg ,'Value',0);
set(handles.run_copy ,'Value',0);
set(handles.run_ip ,'Value',0);
set(handles.run_edkgen ,'Value',0);
set(handles.run_elab ,'Value',0);
set(handles.run_software,'Value',1);
set(handles.run_edk ,'Value',1);
case 'Download'
set(handles.run_update ,'Value',0);
set(handles.run_drc ,'Value',0);
set(handles.run_xsg ,'Value',0);
set(handles.run_copy ,'Value',0);
set(handles.run_ip ,'Value',0);
set(handles.run_edkgen ,'Value',0);
set(handles.run_elab ,'Value',0);
set(handles.run_software,'Value',0);
set(handles.run_edk ,'Value',0);
otherwise
error(['Unknown design flow shortcut: ',flow_shortcuts{flow_choice}]);
end
% --- Executes on button press in run_ip.
function run_ip_Callback(hObject, eventdata, handles)
% hObject handle to run_ip (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_ip
% --- Executes on button press in run_copy.
function run_copy_Callback(hObject, eventdata, handles)
% hObject handle to run_copy (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_copy
function design_name_Callback(hObject, eventdata, handles)
% hObject handle to design_name (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hints: get(hObject,'String') returns contents of design_name as text
% str2double(get(hObject,'String')) returns contents of design_name as a double
% --- Executes on button press in run_edk.
function run_edk_Callback(hObject, eventdata, handles)
% hObject handle to run_edk (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_edk
% --- Executes on button press in run_xsg.
function run_xsg_Callback(hObject, eventdata, handles)
% hObject handle to run_xsg (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_xsg
% --- Executes on button press in run_software.
function run_software_Callback(hObject, eventdata, handles)
% hObject handle to run_software (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_software
% --- Executes on button press in run_edkgen.
function run_edkgen_Callback(hObject, eventdata, handles)
% hObject handle to run_edkgen (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_edkgen
% --- Executes on button press in run_drc.
function run_drc_Callback(hObject, eventdata, handles)
% hObject handle to run_drc (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_drc
% --- Executes on button press in run_update.
function run_update_Callback(hObject, eventdata, handles)
% hObject handle to run_update (see GCBO)
% eventdata reserved - to be defined in a future version of MATLAB
% handles structure with handles and user data (see GUIDATA)
% Hint: get(hObject,'Value') returns toggle state of run_update
|
github
|
mstrader/mlib_devel-master
|
xps_get_hw_plat.m
|
.m
|
mlib_devel-master/xps_library/xps_get_hw_plat.m
| 1,951 |
utf_8
|
fa0f186aeb058437f9c2fbc43e48ef28
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [hw_sys,hw_subsys] = xps_get_hw_plat(str)
tmp = regexp(str, '^(\w+)\:?(.*)','tokens');
if ~isempty(tmp)
hw_sys = tmp{1}{1};
hw_subsys = tmp{1}{2};
else
error(['Hardware platform format should be "hardware_system:hardware_subsystem": ',str]);
end
|
github
|
mstrader/mlib_devel-master
|
xps_get_hw_info.m
|
.m
|
mlib_devel-master/xps_library/xps_get_hw_info.m
| 1,938 |
utf_8
|
31031779c9681243c6814bd3eb6e7e5c
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [hw_sys,info] = xps_get_hw_info(str)
tmp = regexp(str,'^(\w+)\:(\w+)','tokens');
if ~isempty(tmp)
hw_sys = tmp{1}{1};
info = tmp{1}{2};
else
error(['Hardware information format should be "hardware_system:hardware_feature": ',str]);
end
|
github
|
mstrader/mlib_devel-master
|
clear_name.m
|
.m
|
mlib_devel-master/xps_library/clear_name.m
| 2,187 |
utf_8
|
f5a3b1b57af8b6baf8028281312197b1
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function result = clear_name(str);
for i = 1:length(str)
c = str(i);
if c<48 | (c>57 & c<65) | (c>90 & c<95) | c==96 | c>122
result(i) = '_';
else
result(i) = str(i);
end
end
%recombine multiple '_'
while ~isempty(findstr(result, '__'))
result = strrep(result,'__','_');
end
%remove tail '_'
if strcmp(result(length(result)),'_');
result = result(1:length(result)-1);
end
%remove head '_'
if strcmp(result(1),'_');
result = result(2:length(result));
end
return;
|
github
|
mstrader/mlib_devel-master
|
gen_xps_files.m
|
.m
|
mlib_devel-master/xps_library/gen_xps_files.m
| 28,175 |
utf_8
|
a60739fb081cc1d97d5e9cfa7e7a33c9
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [time_total, time_struct] = gen_xps_files(sys, flow_vec)
% Generate all necessary file and optionally run the Xilinx backend tools
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Initialization
% At the end of initialization, the following variables are set:
% run_* : 1 if that step is needed
% xps_blks : All the blocks with tags xps:*
% xsg_blk : Point to the Xilinx System Generator block of the system
% xps_pcore_blks: All the pcore blocks tagged tiwh xps:pcore
% XPS_BASE_PATH: Sets to the value of the environment var of same name
% Also, all the necessary directories have been created.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% close all previously opened files
fclose('all');
% flow step options
if nargin == 2 && isstruct(flow_vec),
run_update = flow_vec.update ;
run_drc = flow_vec.drc ;
run_xsg = flow_vec.xsg ;
run_copy = flow_vec.copy ;
run_ip = flow_vec.ip ;
run_edkgen = flow_vec.edkgen ;
run_elab = flow_vec.elab ;
run_software = flow_vec.software;
run_edk = flow_vec.edk ;
else
run_update = 1;
run_drc = 1;
run_xsg = 1;
run_copy = 1;
run_ip = 1;
run_edkgen = 1;
run_elab = 1;
run_software = 1;
run_edk = 1;
end
slash = '\';
[s, w] = system('uname -a');
if s ~= 0
[s, w] = system('ver');
if s ~= 0,
disp(sprint('Could not detect OS, assuming Windows'));
elseif ~isempty(regexp(w,'Windows', 'ONCE')),
fprintf('Detected Windows OS\n');
else
fprintf('Detected Unknown Windows-like OS\n');
end
system_os = 'windows';
elseif ~isempty(regexp(w, 'Linux', 'ONCE')),
slash = '/';
fprintf('Detected Linux OS\n');
system_os = 'linux';
else
slash = '/';
fprintf('Detected Unknown Unix-like OS\n');
system_os = 'linux';
end
% search for blocks in the system
xps_blks = find_system(sys, 'FollowLinks', 'on', 'LookUnderMasks', 'all','RegExp','on', 'Tag', '^xps:');
xps_xsg_blks = find_system(sys, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'Tag', 'xps:xsg');
xps_pcore_blks = find_system(sys, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'Tag', 'xps:pcore');
sysgen_blk = find_system(sys, 'FollowLinks', 'on', 'LookUnderMasks', 'all','SearchDepth', 1, 'Tag', 'genX');
casper_blks = find_system(sys, 'FollowLinks', 'on', 'LookUnderMasks', 'all','RegExp','on', 'Tag', '^casper:');
% check for spaces in xps or casper block names
for ctr = 1 : numel(xps_blks),
% Allow 'XSG core config' block to have spaces
if numel(strfind(xps_blks{ctr}, ' ')) > 0 && ~regexpi(xps_blks{ctr}, 'XSG core config$'),
error('Block names may not have spaces - %s', xps_blks{ctr});
end
end
for ctr = 1 : numel(casper_blks),
if numel(strfind(casper_blks{ctr}, ' ')) > 0,
error('Block names may not have spaces - %s', casper_blks{ctr});
end
end
% check if the system name is correct
if upper(sys(1)) == sys(1),
error('Due to EDK toolflow limitations, the system name cannot start with an upper case letter');
end
if length(xps_xsg_blks) ~= 1,
error('There has to be exactly 1 XPS_XSG block on each chip level (sub)system (Is the current system the correct one ?)');
end
if length(sysgen_blk) == 1,
xsg_blk = sysgen_blk{1};
else
error('XPS_xsg block must be on the same level as the Xilinx SysGen block. Have you put a XSG block in you design, and is the current system the correct one?');
end
% cd into the design directory
sys_file = get_param(sys,'FileName');
[sys_dir, ~, ~] = fileparts(sys_file);
cd(sys_dir);
% comb for gateway in blocks that aren't part of a yellow block
gateways_blk = find_system(sys, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'masktype', 'Xilinx Gateway In Block');
for i = 1:length(gateways_blk),
found_xps_tag = 0;
parent = get_param(gateways_blk(i), 'parent');
gw_parent = parent;
while ~strcmp(parent, '')
parent_tag = char(get_param(parent, 'tag'));
if ~isempty(regexp(parent_tag, '^xps:', 'ONCE')),
found_xps_tag = 1;
end
parent = get_param(parent,'parent');
end
if found_xps_tag == 0,
disregard_blocks = find_system(gw_parent, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'masktype', 'Xilinx Disregard Subsystem For Generation');
if isempty(disregard_blocks),
error('Xilinx input gateways cannot be used in a design. Only XPS GPIO blocks should be used.');
end
end
end
% set design paths
XPS_BASE_PATH = getenv('XPS_BASE_PATH');
if isempty(XPS_BASE_PATH),
XPS_BASE_PATH = fullfile(getenv('MLIB_DEVEL_PATH'), 'xps_base');
if isempty(XPS_BASE_PATH),
error('Environment variable XPS_BASE_PATH or MLIB_DEVEL_PATH must be defined');
end
end
simulink_path = pwd;
design_name = clear_name(get_param(xsg_blk,'parent'));
work_path = [simulink_path, slash, clear_name(get_param(xsg_blk,'parent'))];
src_path = [work_path, slash, 'src'];
xsg_path = [work_path, slash, 'sysgen'];
bit_path = [work_path, slash, 'bit_files'];
netlist_path = [work_path, slash, 'netlist'];
% check paths
if ~isempty(strfind(simulink_path, ' ')),
warndlg(['Working directory ', simulink_path, ' has a space in the pathname. This can cause problems with some of the tools. Please change your working directory.']);
error('Working directory has a space in the pathname.');
end
if ~isempty(strfind(XPS_BASE_PATH, ' ')),
warndlg(['Directory specified by the XPS_BASE_PATH environment variable (', XPS_BASE_PATH, ') has a space in the pathname. This can cause problems with some of the tools. Please change its directory.']);
error('Directory specified by the XPS_BASE_PATH environment variable has a space in the pathname.');
end
% create design paths if non-existent
if exist(work_path,'dir') ~= 7,
mkdir(pwd,clear_name(get_param(xsg_blk,'parent')));
end
if exist(src_path,'dir') ~= 7,
mkdir(work_path,'src');
end
if exist(bit_path,'dir') ~= 7,
mkdir(work_path,'bit_files');
end
if exist(netlist_path,'dir') ~= 7,
mkdir(work_path,'netlist');
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Task: System Update (run_update)
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
start_time = now;
if run_update
disp('#############################');
disp('## System Update ##');
disp('#############################');
% update the current system
set_param(sys, 'SimulationCommand', 'update');
end
time_update = now - start_time;
% Access all XPS blocks
disp('#############################');
disp('## Block objects creation ##');
disp('#############################');
xps_objs = {};
custom_xps_objs = {};
core_types = {};
% Find and creates xsg_obj (An object of xps_xsg)
for n = 1:length(xps_blks),
if strcmp(get_param(xps_blks(n),'tag'),'xps:xsg')
try
xsg_obj = xps_block(xps_blks{n},{});
xsg_obj = xps_xsg(xsg_obj);
catch ex
disp(['Problem with XSG block: ',xps_blks{n}]);
warning(ex.identifier, '%s', ex.getReport('basic'));
error('Error found during Object creation.');
end
end
end
% Create objects for all blocks with xps:* tags.
% All objects are stored in xps_objs.
target_tags = {'xps_adc16' 'xps_adc5g' 'xps_adc083000x2' 'xps_adc' 'xps_katadc' 'xps_block'...
'xps_bram' 'xps_corr_adc' 'xps_corr_dac' 'xps_corr_mxfe' 'xps_corr_rf' 'xps_dram' 'xps_ethlite'...
'xps_framebuffer' 'xps_fifo' 'xps_gpio' 'xps_interchip' 'xps_lwip' 'xps_opb2opb' 'xps_probe'...
'xps_quadc' 'xps_sram' 'xps_sw_reg' 'xps_tengbe' 'xps_vsi' 'xps_xaui' 'xps_xsg'};
for n = 1 : length(xps_blks),
if ~(strcmp(get_param(xps_blks(n), 'tag'), 'xps:xsg') || strcmp(get_param(xps_blks(n), 'tag'), 'xps:pcore')),
try
%tag = get_param(xps_blks(n), 'tag')
blk_obj = xps_block(xps_blks{n}, xsg_obj);
%fprintf('Created block! %s\n', tag);
assignin('base', 'last_blk_obj', blk_obj)
eval(['blk_obj = ', get(blk_obj, 'type'), '(blk_obj);']);
%fprintf('Evaluated block! %s\n', tag);
xps_objs = [xps_objs, {blk_obj}];
if isempty(find(strcmp(get(blk_obj, 'type'), target_tags), 1)),
custom_xps_objs = [custom_xps_objs, {blk_obj}];
else
if isempty(find(strcmp(get(blk_obj, 'type'), core_types), 1)),
core_types = [core_types, {get(blk_obj, 'type')}];
end
end
catch ex
disp(['Problem with XPS: tag block: ', xps_blks{n}]);
dump_exception(ex);
error('Error found during Object creation.');
end
end
end
% add the xsg_object to the list
xps_objs = [{xsg_obj}, xps_objs];
hw_sys = get(xsg_obj, 'hw_sys');
hw_subsys = get(xsg_obj, 'hw_subsys');
sw_os = get(xsg_obj, 'sw_os');
app_clk = get(xsg_obj, 'clk_src');
app_clk_rate = get(xsg_obj, 'clk_rate');
xsg_core_name = clear_name(get(xsg_obj, 'parent'));
xps_path = [work_path, slash, 'XPS_', hw_sys, '_base'];
% Create structure of commonly-used design parameters
mssge_proj = {};
mssge_proj.sys = sys;
mssge_proj.design_name = design_name;
mssge_proj.hw_sys = hw_sys;
mssge_proj.hw_subsys = hw_subsys;
mssge_proj.sw_os = sw_os;
mssge_proj.app_clk = app_clk;
mssge_proj.app_clk_rate = app_clk_rate;
mssge_proj.xsg_core_name = xsg_core_name;
% Create structure of commonly-used paths
mssge_paths = {};
mssge_paths.XPS_BASE_PATH = XPS_BASE_PATH;
mssge_paths.simulink_path = simulink_path;
mssge_paths.work_path = work_path;
mssge_paths.src_path = src_path;
mssge_paths.xsg_path = xsg_path;
mssge_paths.netlist_path = netlist_path;
mssge_paths.xps_path = xps_path;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Task: DRC (run_drc)
% The drc() function of each object in xps_objs is called
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
start_time = now;
if run_drc,
disp('######################');
disp('## Checking objects ##');
disp('######################');
for n=1:length(xps_objs),
[result, msg] = drc(xps_objs{n}, xps_objs);
if result,
disp('Error with block:');
display(xps_objs{n});
disp(msg);
error('DRC failed!');
end
end
end
time_drc = now - start_time;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Task: Execute System Generator (run_xsg)
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
start_time = now;
if run_xsg,
if exist(xsg_path,'dir'),
rmdir(xsg_path,'s');
end
disp('Running system generator ...');
xsg_result = xlGenerateButton(xsg_blk);
if xsg_result == 0,
disp('XSG generation complete.');
else
error(['XSG generation failed: ',xsg_result]);
end
end
time_xsg = now - start_time;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Task: Copy Base System
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
start_time = now;
if run_copy,
disp('#########################');
disp('## Copying base system ##');
disp('#########################');
%%%%% PCORE SETUP
%%%% pcores_used = {};
%%%%
%%%% for n = 1 : length(xps_objs)
%%%%
%%%% curr_obj = xps_objs{n};
%%%%
%%%% obj_ip_name = get(curr_obj, 'ip_name');
%%%% obj_ip_ver = get(curr_obj, 'ip_version');
%%%% obj_supp_ip_names = get(curr_obj, 'supp_ip_names');
%%%% obj_supp_ip_vers = get(curr_obj, 'supp_ip_versions');
%%%%
%%%% if isempty(obj_ip_ver)
%%%% obj_ip_ver = '1.00.a';
%%%% end
%%%%
%%%% if isempty(obj_supp_ip_names)
%%%% try
%%%% pcore_used = clear_name([obj_ip_name, ' v', obj_ip_ver]);
%%%% pcores_used = [pcores_used, {pcore_used}];
%%%% end
%%%% else
%%%% for p = 2 : length(obj_supp_ip_names),
%%%% try
%%%% pcore_used = clear_name([obj_supp_ip_names{p}, ' v', obj_supp_ip_vers{p}]);
%%%% pcores_used = [pcores_used, {pcore_used}];
%%%% end
%%%% end
%%%%
%%%% % supp_ip_names{1} used to override ip_name; also include ip_name if {1} is empty
%%%% if isempty(obj_supp_ip_names{1})
%%%% try
%%%% pcore_used = clear_name([get(curr_obj, 'ip_name'), ' v', get(curr_obj, 'ip_version')]);
%%%% pcores_used = [pcores_used, {pcore_used}];
%%%% end
%%%% else
%%%% try
%%%% pcore_used = clear_name([obj_supp_ip_names{1}, ' v', obj_supp_ip_vers{1}]);
%%%% pcores_used = [pcores_used, {pcore_used}];
%%%% end
%%%% end
%%%% end
%%%%
%%%% end % for n = 1:length(xps_objs)
%%%%
%%%% pcores_used = unique(pcores_used);
%%%%% /PCORE SETUP
if exist(xps_path,'dir'),
rmdir(xps_path,'s');
end
if exist([XPS_BASE_PATH, slash, 'XPS_',hw_sys,'_base'],'dir'),
source_dir = [XPS_BASE_PATH, slash, 'XPS_', hw_sys, '_base'];
destination_dir = xps_path;
if strcmp(system_os, 'windows'),
copy_fail = 1; % xcopy failure returns 1
mkdir(xps_path);
% use xcopy to avoid copying .svn directories
[copy_result, ~] = dos(['xcopy /Q /E /Y ', source_dir, ' ', destination_dir,'\.']);
else
copy_fail = 0; % copyfile failure returns 0
[copy_result, ~, ~] = copyfile(source_dir,destination_dir,'f');
fprintf('Copying base package from:\n %s\n', source_dir)
end % if strcmp(system_os, 'windows')
if copy_result == copy_fail,
cd(simulink_path);
error('Unpackage base system files failed.');
else
cd(simulink_path);
end % copy_result == copy_fail
else
error(['Base XPS package "','XPS_',hw_sys,'_base" does not exist.']);
end % exist([XPS_BASE_PATH,'\XPS_',hw_sys,'_base'],'dir')
%%%%% BEGIN PCORE COPYING CODE
%%%%%
%%%%% if exist([XPS_BASE_PATH,'\pcores'], 'dir')
%%%%% if ~exist([xps_path, '\copied_pcores'], 'dir')
%%%%% mkdir([xps_path, '\copied_pcores']);
%%%%% end
%%%%%
%%%%% for n=1:length(pcores_used)
%%%%% disp(pcores_used{n})
%%%%% pcore_path = [xps_path, '\copied_pcores\', pcores_used{n}];
%%%%% mkdir(pcore_path);
%%%%% [copy_result, copy_message] = dos(['xcopy /Q /E /Y ', XPS_BASE_PATH, '\pcores\', pcores_used{n}, ' ', pcore_path, '\.']);
%%%%%
%%%%% if copy_result
%%%%% cd(simulink_path);
%%%%% disp(copy_message);
%%%%% error(['Pcore copy failed: ', pcores_used{n}]);
%%%%% else
%%%%% cd(simulink_path);
%%%%% end
%%%%% end % for n=1:length(pcores_used)
%%%%% else
%%%%% cd(simulink_path);
%%%%% error(['PCores directory "', XPS_BASE_PATH, '\pcores" does not exist']);
%%%%% end % if exist([XPS_BASE_PATH,'\pcores'], 'dir') - else
%%%%%
%%%%% END PCORE COPYING CODE
end % if run_copy
time_copy = now - start_time;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Task: Copy + Create custom IPs
% Description: If the user specify a custom IP block, a EDK pcore
% is automatically generated so that it can be integrated with the
% rest of the system.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
start_time = now;
if run_ip,
disp('########################');
disp('## Copying custom IPs ##');
disp('########################');
cd(simulink_path);
for n = 1:length(xps_pcore_blks),
path_param = get_param(xps_pcore_blks(n), 'pcore_path');
pcore_path = clear_path(path_param{1});
destination_dir = [xps_path, slash, 'pcores', slash];
[copy_result, ~, ~] = copyfile(pcore_path, destination_dir, 'f');
if copy_result == 0,
cd(simulink_path);
error(['Error copying custom pcores from ', pcore_path]);
end
end
gen_xps_create_pcore(xsg_obj, xps_objs, mssge_proj, mssge_paths, slash);
end % if run_ip
time_ip = now - start_time;
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Task: Create custom EDK
% Description: Create custom system.mhs file based on the
% yellowboxes that the user has used. At the end of this task three
% files, system.mhs, core_info.m and core_info.tab are created.
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
start_time = now;
if run_edkgen,
disp('##########################');
disp('## Creating EDK files ##');
disp('##########################');
% modifying XMP file
xmpfile = 'system.xmp';
if ~isempty(hw_subsys),
xmpfile = [xmpfile, '.', hw_subsys];
end % if ~isempty(hw_subsys)
if ~exist([xps_path, slash, xmpfile, '.bac'],'file'),
[copystatus, copymessage, ~] = copyfile([xps_path, slash, xmpfile],[xps_path, slash, xmpfile,'.bac']);
if ~copystatus,
disp('Error trying to backup system.xmp:');
disp(copymessage);
end % if ~copystatus
[copystatus, copymessage, ~] = copyfile([xps_path, slash, xmpfile,'.bac'],[xps_path, slash, 'system.xmp']);
if ~copystatus,
disp('Error trying to overwrite system.xmp:');
disp(copymessage);
end % if ~copystatus
end % if ~exist([xps_path, slash, xmpfile, '.bac'],'file')
% modifying MHS file
gen_xps_mod_mhs(xps_objs, mssge_proj, mssge_paths, slash);
% modifying MSS file
gen_xps_mod_mss(xsg_obj, xps_objs, mssge_proj, mssge_paths, slash);
% modifying UCF file
gen_xps_mod_ucf(xsg_obj, xps_objs, mssge_proj, mssge_paths, slash);
% add extra register and snapshot info from the design
gen_xps_add_design_info(sys, mssge_paths, slash);
% shanly and mark's new format - generated from core_info and design_info
if strcmp(hw_sys, 'ROACH') || strcmp(hw_sys, 'ROACH2') || strcmp(hw_sys, 'MKDIG'),
kcpfpg_fid = fopen([xps_path, slash, 'extended_info.kcpfpg'], 'w');
fprintf(kcpfpg_fid, '#!/bin/kcpfpg\n');
fprintf(kcpfpg_fid, '?uploadbin\n');
% read coreinfo.tab into the fpg file
fid = fopen([xps_path, slash, 'core_info.tab'], 'r');
while 1,
tline = fgetl(fid);
if ~ischar(tline), break, end
linevals = textscan(tline, '%s %s %s %s');
newline = ['?register ', sprintf('%s 0x%s 0x%s', linevals{1}{1}, linevals{3}{1}, linevals{4}{1})];
fprintf(kcpfpg_fid, '%s\n', newline);
clear linevals newline tline;
end
fclose(fid);
% read design meta info into the fpg file
fid = fopen([xps_path, slash, 'design_info.tab'], 'r');
while 1,
tline = fgetl(fid);
if ~ischar(tline), break, end
newline = ['?meta ', tline];
fprintf(kcpfpg_fid, '%s\n', newline);
end
clear newline tline;
fclose(fid);
fprintf(kcpfpg_fid, '?quit\n');
fclose(kcpfpg_fid);
end
end % if run_edkgen
time_edkgen = now - start_time;
start_time = now;
if run_elab,
disp('#########################');
disp('## Elaborating objects ##');
disp('#########################');
for n = 1:length(xps_objs),
try
xps_objs{n} = elaborate(xps_objs{n});
catch ex
display(xps_objs{n});
warning(ex.identifier, '%s', ex.getReport('basic'));
error('Elaboration of object failed.');
end
end
end % if run_elab
time_elab = now - start_time;
start_time = now;
if run_software,
disp('##############################');
disp('## Preparing software files ##');
disp('##############################');
switch sw_os
case 'tinySH'
%TODO: these functions might experience OS 'slash' errors
% Creating software core info files
gen_xps_tinysh_core_info(xsg_obj, xps_objs, custom_xps_objs, mssge_proj, mssge_paths);
% Gathering information on the software files
[headers, sources] = gen_xps_tinysh_get_src(xsg_obj, xps_objs, mssge_proj, mssge_paths);
% Rewrite main.c based on user source code
gen_xps_tinysh_mod_main(xsg_obj, xps_objs, mssge_proj, mssge_paths, headers, sources);
% write project file
gen_xps_tinysh_mod_xmp(xsg_obj, xps_objs, mssge_proj, mssge_paths, headers, sources);
% end case 'tinySH'
case 'linux'
case 'none'
otherwise
error(['Unsupported OS: ', sw_os]);
end % switch sw_os
win_fid = fopen([xps_path, slash, 'gen_prog_files.bat'], 'w');
unix_fid = fopen([xps_path, slash, 'gen_prog_files'], 'w');
fprintf(unix_fid, '#!/bin/bash\n');
files_name = [design_name, '_', clear_name(datestr(now, 'yyyy-mmm-dd HHMM'))];
switch sw_os
case 'none'
fprintf(win_fid, ['copy implementation\\system.bit ..\\bit_files\\',files_name,'.bit\n']);
fprintf(unix_fid, ['cp implementation/system.bit ../bit_files/',files_name,'.bit\n']);
% end case 'none'
otherwise
fprintf(win_fid, ['copy implementation\\download.bit ..\\bit_files\\',files_name,'.bit\n']);
fprintf(unix_fid, ['cp implementation/download.bit ../bit_files/',files_name,'.bit\n']);
% end otherwise
end % switch sw_os
[~, w] = system('uname -m');
if strcmp(hw_sys, 'ROACH') || strcmp(hw_sys, 'ROACH2') || strcmp(hw_sys, 'MKDIG'),
fprintf(win_fid, ['mkbof.exe -o implementation\\system.bof', ' -s core_info.tab -t 3 implementation\\system.bin\n']);
if strcmp(w(1:6), 'x86_64'),
fprintf(unix_fid, ['./mkbof_64 -o implementation/system.bof', ' -s core_info.tab -t 3 implementation/system.bin\n']);
else
fprintf(unix_fid, ['./mkbof -o implementation/system.bof', ' -s core_info.tab -t 3 implementation/system.bin\n']);
end
fprintf(win_fid, ['copy implementation\\system.bof', ' ..\\bit_files\\', files_name,'.bof\n']);
if strcmp(hw_sys, 'ROACH'),
fprintf(unix_fid,'chmod +x implementation/system.bof\n');
end
fprintf(unix_fid, ['cp implementation/system.bof ../bit_files/', files_name,'.bof\n']);
if exist([xps_path, slash, 'design_info.tab'], 'file') == 2,
fprintf(win_fid, ['copy design_info.tab ..\\bit_files\\', files_name,'.info\n']);
fprintf(unix_fid, ['cp design_info.tab ../bit_files/', files_name,'.info\n']);
end
if strcmp(hw_sys, 'ROACH2') || strcmp(hw_sys, 'ROACH2'),
fprintf(unix_fid, ['gzip -c ../bit_files/', files_name, '.bof > ../bit_files/', files_name,'.bof.gz\n']);
end
if exist([xps_path, slash, 'extended_info.kcpfpg'], 'file') == 2,
fprintf(unix_fid, 'gzip -c implementation/system.bin > implementation/system.bin.gz\n');
fprintf(unix_fid, ['cat implementation/system.bin.gz >> ', xps_path, slash, 'extended_info.kcpfpg\n']);
fprintf(unix_fid, ['cp extended_info.kcpfpg ../bit_files/', files_name,'.fpg\n']);
end
end % strcmp(hw_sys, 'ROACH') || strcmp(hw_sys, 'ROACH2')
fclose(win_fid);
fclose(unix_fid);
end % if run_software
time_software = now - start_time;
start_time = now;
if run_edk,
disp('#########################');
disp('## Running EDK backend ##');
disp('#########################');
% erase download.bit to make sure a failing compilation will report an error
delete([xps_path, slash, 'implementation', slash, 'system.bit']);
delete([xps_path, slash, 'implementation', slash, 'download.bit']);
fid = fopen([xps_path, slash, 'run_xps.tcl'],'w');
hw_sys = get(xsg_obj,'hw_sys');
switch hw_sys
case 'ROACH'
fprintf(fid, 'run bits\n');
% end case 'powerpc440_ext'
case {'ROACH2', 'MKDIG'}
fprintf(fid, 'run bits\n');
% end case 'powerpc440_ext'
otherwise
fprintf(fid, 'run init_bram\n');
% end otherwise
end % switch hw_sys
fprintf(fid, 'exit\n');
fclose(fid);
eval(['cd ', xps_path]);
status = system('xps -nw -scr run_xps.tcl system.xmp');
if status ~= 0,
cd(simulink_path);
error('XPS failed.');
else
if (strcmp(slash, '\')),
% Windows case
[status, ~] = dos('gen_prog_files.bat');
if status ~= 0,
cd(simulink_path);
error('Programation files generation failed, EDK compilation probably also failed.');
end % if dos('gen_prog_files.bat')
else
% Linux case
[~, ~] = unix('chmod +x gen_prog_files');
[status, message] = unix('./gen_prog_files');
if status ~= 0,
cd(simulink_path);
disp(message);
error('Programation files generation failed, EDK compilation probably also failed.');
end % if unix('gen_prog_files.bat')
end %if (strcmp(slash, '\'))
end % if(dos(['xps -nw -scr run_xps.tcl system.xmp']))
cd(simulink_path);
end % if run_edk
time_edk = now - start_time;
time_total = time_update + time_drc + time_xsg + time_copy + time_ip + time_edkgen + time_elab + time_software + time_edk;
time_struct.update = time_update ;
time_struct.drc = time_drc ;
time_struct.xsg = time_xsg ;
time_struct.copy = time_copy ;
time_struct.ip = time_ip ;
time_struct.edkgen = time_edkgen ;
time_struct.elab = time_elab ;
time_struct.software = time_software ;
time_struct.edk = time_edk ;
|
github
|
mstrader/mlib_devel-master
|
dram_sim.m
|
.m
|
mlib_devel-master/xps_library/dram_sim.m
| 5,430 |
utf_8
|
0611a3c0a5bcd6222ee4caae2a5d973b
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function dram_sim (this_block)
xps_library_path = getenv('XPS_LIBRARY_PATH');
if isempty(xps_library_path)
% try to fall back on MLIB_ROOT.
mlib_root = getenv('MLIB_DEVEL_PATH');
if isempty(mlib_root)
error('MLIB_DEVEL_PATH environment variable must be set to point to xps_library directory.');
else
warning('MLIB_ROOT environment variable is deprecated.')
xps_library_path = [mlib_root, '\xps_library'];
end
end
simwrapper = get_param(this_block.blockName, 'parent');
xpswrapper = get_param(simwrapper, 'parent');
half_burst = get_param(xpswrapper, 'half_burst');
wide_data = get_param(xpswrapper, 'wide_data');
ip_clock = str2num(get_param(xpswrapper, 'ip_clock'));
sysclk_per = round(ip_clock/200 * 500);
this_block.setTopLevelLanguage('VHDL');
this_block.setEntityName('dram_sim');
this_block.tagAsCombinational;
this_block.addGeneric('C_WIDE_DATA', 'Integer', num2str(strcmp(wide_data, 'on')));
this_block.addGeneric('C_HALF_BURST', 'Integer', num2str(strcmp(half_burst, 'on')));
this_block.addGeneric('SYSCLK_PER', 'Time', [num2str(sysclk_per),' ms']);
this_block.addGeneric('IP_CLOCK', 'Integer', num2str(ip_clock));
this_block.addSimulinkInport('rst');
this_block.addSimulinkInport('address');
this_block.addSimulinkInport('data_in');
this_block.addSimulinkInport('wr_be');
this_block.addSimulinkInport('RWn');
this_block.addSimulinkInport('cmd_tag');
this_block.addSimulinkInport('cmd_valid');
this_block.addSimulinkInport('rd_ack');
this_block.addSimulinkOutport('cmd_ack');
this_block.addSimulinkOutport('data_out');
this_block.addSimulinkOutport('rd_tag');
this_block.addSimulinkOutport('rd_valid');
this_block.addSimulinkOutport('ddr_clock');
this_block.addSimulinkOutport('ddr_clock90');
this_block.port('ddr_clock').setType('Bool');
this_block.port('ddr_clock').setRate(1);
this_block.port('ddr_clock90').setType('Bool');
this_block.port('ddr_clock90').setRate(1);
this_block.addClkCEPair('clk', 'ce', 1);
this_block.port('rst').setType('UFix_1_0');
this_block.port('address').setType('UFix_32_0');
if strcmp(wide_data, 'on')
this_block.port('data_in').setType('UFix_288_0');
this_block.port('wr_be').setType('UFix_36_0');
else
this_block.port('data_in').setType('UFix_144_0');
this_block.port('wr_be').setType('UFix_18_0');
end
this_block.port('RWn').setType('UFix_1_0');
this_block.port('cmd_tag').setType('UFix_32_0');
this_block.port('cmd_valid').setType('UFix_1_0');
this_block.port('rd_ack').setType('UFix_1_0');
this_block.port('cmd_ack').setType('Bool');
if strcmp(wide_data, 'on')
this_block.port('data_out').setType('UFix_288_0');
else
this_block.port('data_out').setType('UFix_144_0');
end
this_block.port('rd_tag').setType('UFix_32_0');
this_block.port('rd_valid').setType('Bool');
this_block.port('cmd_ack').setRate(1);
this_block.port('data_out').setRate(1);
this_block.port('rd_tag').setRate(1);
this_block.port('rd_valid').setRate(1);
this_block.addFile([xps_library_path, '\hdlsimfiles\dram_sim\xilinx_sim_src.vhd']);
this_block.addFile([xps_library_path, '\hdlsimfiles\dram_sim\ddr2_parameters.vh']);
this_block.addFile([xps_library_path, '\hdlsimfiles\dram_sim\ddr2_sim.v']);
this_block.addFile([xps_library_path, '\hdlsimfiles\dram_sim\ddr2_controller.vhd']);
this_block.addFile([xps_library_path, '\hdlsimfiles\dram_sim\async_ddr2.v']);
this_block.addFile([xps_library_path, '\hdlsimfiles\dram_sim\dram_sim.vhd']);
return;
|
github
|
mstrader/mlib_devel-master
|
clk_factors.m
|
.m
|
mlib_devel-master/xps_library/clk_factors.m
| 1,675 |
utf_8
|
6f920575e9a5b64e5c6e5cd228f3f956
|
% This function uses the input clock frequence and the target freq to calculate
% the correct multiply and divide factors for the MMCM. Specifically for ROACH2
% This is implemented by creating a 3D matrix of all possible values and
% finding the one that closest matches the requirements.
function [bestM, bestD, bestDD] = clk_factors(clk_freq, target_freq)
bestM = 0;
bestD = 0;
bestDD = 0;
% the Multiply value is a even number because we need to divide by 1/2 of
% it to get the 200MHz clock, which is used for the QDR.
M = (8:2:64);
D = (2:1:128);
% If the input clock freq >= 315 then DD cant be 3 or 4.
if (clk_freq >= 315)
DD = (5:1:80);
else
DD = (1:1:80);
end
best_diff = 1000;
for i = 1:length(M)
for j = 1:length(D)
for k = 1:length(DD)
%x = [x 100*M(i)/D(j)/DD(k)];
% the VCO freq must be between 600 and 1200 for the -1 speed
% grade vitrex 6, but we found being on the boundaries causes
% issues, so we are using 650 -> 1150.
if (clk_freq*M(i)/DD(k) < 1150 && clk_freq*M(i)/DD(k) > 650)
diff = abs(clk_freq*M(i)/D(j)/DD(k) - target_freq);
if diff < best_diff
best_diff = diff;
bestM = M(i);
bestD = D(j);
bestDD = DD(k);
end
end
end
end
end
closest_freq = clk_freq * bestM / bestD / bestDD;
sys_clk_VCO = bestM * clk_freq / bestDD;
|
github
|
mstrader/mlib_devel-master
|
remove_all_blks.m
|
.m
|
mlib_devel-master/xps_library/remove_all_blks.m
| 2,175 |
utf_8
|
52d896ba0e3f2295a50856a912533f48
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function remove_all_blks(sys)
% Wrap whole function in try/catch
try
blks = get_param(sys,'blocks');
lines = get_param(sys,'lines');
for i = 1:length(blks)
switch get_param([sys,'/',blks{i}],'BlockType')
case {'Inport' 'Outport'}
% don't remove IO blocks
otherwise
delete_block([sys,'/',blks{i}]);
end
end
for i = 1:length(lines)
delete_line(lines(i).Handle);
end
catch ex
dump_and_rethrow(ex)
end % try/catch
|
github
|
mstrader/mlib_devel-master
|
katadc_init.m
|
.m
|
mlib_devel-master/xps_library/katadc_init.m
| 10,161 |
utf_8
|
8196f034a133a5aac55b5b7b169b52c1
|
% katadc initialisation script
%
% function katadc_init(blk, varargin)
%
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Karoo Array Telescope Project %
% www.ska.ac.za %
% Copyright (C) 2010 Andrew Martens SKA/SA %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function katadc_init(blk, varargin)
clog('katadc_init: pre same_state','trace');
defaults = {'adc_brd', 'adc0', 'adc_interleave', 'off', 'bypass_auto', 'off', ...
'en_gain', 'on', 'adc_clk_rate', 800, 'sample_period', 1};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('katadc_init: post same_state','trace');
check_mask_type(blk, 'katadc');
munge_block(blk, varargin{:});
delete_lines(blk);
adc_brd = get_var('adc_brd', 'defaults', defaults, varargin{:});
adc_interleave = get_var('adc_interleave', 'defaults', defaults, varargin{:});
bypass_auto = get_var('bypass_auto', 'defaults', defaults, varargin{:});
en_gain = get_var('en_gain', 'defaults', defaults, varargin{:});
adc_clk_rate = get_var('adc_clk_rate', 'defaults', defaults, varargin{:});
sample_period = get_var('sample_period', 'defaults', defaults, varargin{:});
% generic ADC parameters
if strcmp(adc_interleave, 'on'),
or_per_input = 2;
in = 1;
out = 8;
il = 1;
else
or_per_input = 1;
in = 2;
out = 4;
il = 0;
end
bits = 8;
or_support = 'on'; or = 1;
sync_support = 'on'; sync = 1;
dv_support = 'on'; dv = 1;
xtick = 120;
ytick = 40+5*(or*out);
% % info blocks
% reuse_block(blk, 'adc_brd', 'casper_library_misc/info_block', 'info', adc_brd, 'Position', [0,0,50,30]);
% reuse_block(blk, 'adc_interleave', 'casper_library_misc/info_block', 'info', adc_interleave, 'Position', [0,0,50,30]);
% reuse_block(blk, 'bypass_auto', 'casper_library_misc/info_block', 'info', bypass_auto, 'Position', [0,0,50,30]);
% reuse_block(blk, 'en_gain', 'casper_library_misc/info_block', 'info', en_gain, 'Position', [0,0,50,30]);
% reuse_block(blk, 'adc_clk_rate', 'casper_library_misc/info_block', 'info', num2str(adc_clk_rate), 'Position', [0,0,50,30]);
% reuse_block(blk, 'sample_period', 'casper_library_misc/info_block', 'info', num2str(sample_period), 'Position', [0,0,50,30]);
% reuse_block(blk, 'adc_bits', 'casper_library_misc/info_block', 'info', num2str(8), 'Position', [0,0,50,30]);
clog('katadc_init: drawing common adc','trace');
yoff = adc_common(blk, 'in', in, 'out', out, 'bits', bits, 'or_per_input', or_per_input, ...
'xoff', 0, 'xtick', xtick, 'yoff', 0, 'ytick', ytick, ...
'adc_interleave', adc_interleave, 'or_support', ...
or_support, 'sync_support', sync_support, 'dv_support', dv_support);
clog('katadc_init: done drawing common adc','trace');
%%%% Rename generic ports to specific KATADC names %%%%%
for input = 0:1,
if strcmp(adc_interleave, 'off'),
if input == 0,
label = 'i';
else
label = 'q';
end
else
if input == 0,
label = 'q';
else
label = 'i';
end
end
for offset = 0:3,
name = clear_name([blk, '_user_data', num2str(input*4+offset)]);
new_name = clear_name([blk, '_user_data', label, num2str(offset)]);
old_port = find_system(blk, 'lookUnderMasks', 'all', 'Name', new_name);
if ~isempty(old_port),
delete_block(old_port{1});
end
port = find_system(blk, 'lookUnderMasks', 'all', 'Name', name);
if isempty(port),
clog(['katadc_init: missing data port: ', blk, '_user_data', num2str(input*4+offset)],'error');
disp(['katadc_init: missing data port: ', blk, '_user_data', num2str(input*4+offset)]);
else
set_param(port{1}, 'Name', new_name);
end
end
end
%%%% KATADC specific ports %%%%
reuse_block(blk, 'trigger', 'xbsIndex_r4/Constant', ...
'arith_type', 'Unsigned', 'const', '1', 'n_bits', '1', 'bin_pt', '0', ...
'Position', [xtick*4-15 ytick*yoff-7.5 xtick*4+15 ytick*yoff+7.5]);
reuse_block(blk, 'en0', 'built-in/inport', 'Port', num2str(4-il+1), ...
'Position', [xtick*1-15 ytick*(yoff+1)-7.5 xtick*1+15 ytick*(yoff+1)+7.5]);
reuse_block(blk, 'slc0', 'xbsIndex_r4/Slice', 'nbits', '1', 'mode', ...
'Lower Bit Location + Width', 'bit0', '0', 'base0', 'LSB of input', ...
'Position', [xtick*2-15 ytick*(yoff+1)-7.5 xtick*2+15 ytick*(yoff+1)+7.5]);
add_line(blk, 'en0/1', 'slc0/1');
reuse_block(blk, 'atten0', 'built-in/inport', 'Port', num2str(4-il+2), ...
'Position', [xtick*1-15 ytick*(yoff+2)-7.5 xtick*1+15 ytick*(yoff+2)+7.5]);
reuse_block(blk, 'slc1', 'xbsIndex_r4/Slice', ...
'nbits', '6', 'mode', 'Lower Bit Location + Width', 'bit0', '0', 'base0', 'LSB of input', ...
'Position', [xtick*2-15 ytick*(yoff+2)-7.5 xtick*2+15 ytick*(yoff+2)+7.5]);
add_line(blk, 'atten0/1', 'slc1/1');
reuse_block(blk, 'inv0', 'xbsIndex_r4/Inverter', ...
'Position', [xtick*3-15 ytick*(yoff+2)-7.5 xtick*3+15 ytick*(yoff+2)+7.5]);
add_line(blk, 'slc1/1', 'inv0/1');
%use input ports for non-interleaved mode, otherwise disable input with max attenuation on 'q' input
if il == 0,
en1_name = 'en1';
atten1_name = 'atten1';
reuse_block(blk, en1_name, 'built-in/inport', 'Port', num2str(4-il+3), ...
'Position', [xtick*1-15 ytick*(yoff+3)-7.5 xtick*1+15 ytick*(yoff+3)+7.5]);
reuse_block(blk, atten1_name, 'built-in/inport', 'Port', num2str(4-il+4), ...
'Position', [xtick*1-15 ytick*(yoff+4)-7.5 xtick*1+15 ytick*(yoff+4)+7.5]);
else
en1_name = 'en0';
atten1_name = 'atten0';
end
reuse_block(blk, 'slc2', 'xbsIndex_r4/Slice', ...
'nbits', '1', 'mode', 'Lower Bit Location + Width', 'bit0', '0', 'base0', 'LSB of input', ...
'Position', [xtick*2-15 ytick*(yoff+3)-7.5 xtick*2+15 ytick*(yoff+3)+7.5]);
add_line(blk, [en1_name,'/1'], 'slc2/1');
reuse_block(blk, 'slc3', 'xbsIndex_r4/Slice', ...
'nbits', '6', 'mode', 'Lower Bit Location + Width', 'bit0', '0', 'base0', 'LSB of input', ...
'Position', [xtick*2-15 ytick*(yoff+4)-7.5 xtick*2+15 ytick*(yoff+4)+7.5]);
add_line(blk, [atten1_name,'/1'], 'slc3/1');
reuse_block(blk, 'inv1', 'xbsIndex_r4/Inverter', ...
'Position', [xtick*3-15 ytick*(yoff+4)-7.5 xtick*3+15 ytick*(yoff+4)+7.5]);
add_line(blk, 'slc3/1', 'inv1/1');
%concat block
reuse_block(blk, 'con', 'xbsIndex_r4/Concat', ...
'num_inputs', '5', 'Position', [xtick*5-15 ytick*yoff-25 xtick*5+15 ytick*(yoff+4)+25]);
add_line(blk, 'trigger/1', 'con/1');
add_line(blk, 'slc0/1', 'con/4');
add_line(blk, 'inv0/1', 'con/5');
add_line(blk, 'slc2/1', 'con/2');
add_line(blk, 'inv1/1', 'con/3');
%trigger constant, combined with 0 initial value here forces load after reset
reuse_block(blk, 'reg', 'xbsIndex_r4/Register', ...
'init', '0', 'Position', [xtick*6-25 ytick*(yoff+2)-20 xtick*6+25 ytick*(yoff+2)+20]);
add_line(blk, 'con/1', 'reg/1');
reuse_block(blk, 'changed', 'xbsIndex_r4/Relational', 'mode', 'a!=b', 'latency', '1', ...
'Position', [xtick*6-25 ytick*(yoff+3)-10 xtick*6+25 ytick*(yoff+4)+10]);
add_line(blk, 'con/1', 'changed/2', 'autorouting', 'on');
add_line(blk, 'reg/1', 'changed/1', 'autorouting', 'on');
reuse_block(blk, 'slc4', 'xbsIndex_r4/Slice', ...
'nbits', '14', 'mode', 'Lower Bit Location + Width', 'bit0', '0', 'base0', 'LSB of input', ...
'Position', [xtick*7-15 ytick*(yoff+2)-7.5 xtick*7+15 ytick*(yoff+2)+7.5]);
add_line(blk, 'reg/1', 'slc4/1');
reuse_block(blk, 'cast0', 'xbsIndex_r4/Convert', ...
'arith_type', 'Unsigned', 'n_bits', '14', 'bin_pt', '0', ...
'Position', [xtick*8-25 ytick*(yoff+2)-20 xtick*8+25 ytick*(yoff+2)+20]);
add_line(blk, 'slc4/1', 'cast0/1');
gw = clear_name([blk, '_gain_value']);
reuse_block(blk, gw, 'xbsIndex_r4/Gateway Out', ...
'Position', [xtick*9-20 ytick*(yoff+2)-10 xtick*9+20 ytick*(yoff+2)+10]);
add_line(blk, 'cast0/1', [gw,'/1']);
reuse_block(blk, 'cast1', 'xbsIndex_r4/Convert', 'arith_type', 'Boolean', ...
'Position', [xtick*8-25 ytick*(yoff+4)-20 xtick*8+25 ytick*(yoff+4)+20]);
add_line(blk, 'changed/1', 'cast1/1');
gw = clear_name([blk, '_gain_load']);
reuse_block(blk, gw, 'xbsIndex_r4/Gateway Out', ...
'Position', [xtick*9-20 ytick*(yoff+4)-10 xtick*9+20 ytick*(yoff+4)+10]);
add_line(blk, 'cast1/1', [gw,'/1']);
%%%%
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('katadc_init: exiting','trace');
end
|
github
|
mstrader/mlib_devel-master
|
generic_adc_init.m
|
.m
|
mlib_devel-master/xps_library/generic_adc_init.m
| 3,807 |
utf_8
|
c935377e22313ce4028a9c114f08b343
|
% generic adc initialisation script
%
% function generic_adc_init(blk, varargin)
%
% blk = The block to be configured.
% varargin = {'varname', 'value', ...} pairs
%
% Valid varnames for this block are:
% interleaved = simulate interleaved adcs
% in = number of inputs
% out = number of outputs per input (ADC demux factor)
% bits = simulated ADC resolution
% or_spport = simulate ADC over-range detection
% sync_support = simulate ADC with sync line
% dv_support = ADC with data valid output
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Karoo Array Telescope Project %
% www.ska.ac.za %
% Copyright (C) 2010 Andrew Martens SKA/SA %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function generic_adc_init(blk, varargin)
clog('generic_adc_init: pre same_state','trace');
defaults = { 'in', 2, 'out', 4, 'bits', 8, 'interleaved', 'off', ...
'or_support', 'off', 'sync_support', 'off', 'dv_support', 'off'};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('generic_adc_init: post same_state','trace');
check_mask_type(blk, 'generic_adc');
munge_block(blk, varargin{:});
delete_lines(blk);
interleaved = get_var('interleaved', 'defaults', defaults, varargin{:});
in = get_var('in', 'defaults', defaults, varargin{:});
out = get_var('out', 'defaults', defaults, varargin{:});
bits = get_var('bits', 'defaults', defaults, varargin{:});
or_support = get_var('or_support', 'defaults', defaults, varargin{:});
sync_support = get_var('sync_support', 'defaults', defaults, varargin{:});
dv_support = get_var('dv_support', 'defaults', defaults, varargin{:});
or_per_input = 1;
clog('generic_adc_init: drawing common adc','trace');
xtick = 120;
if strcmp(or_support,'on'), or = 1; else, or = 0; end
ytick = 40+5*out*or;
yoff = adc_common(blk, 'in', in, 'out', out, 'bits', bits, 'or_per_input', or_per_input, ...
'xoff', 0, 'xtick', xtick, 'yoff', 0, 'ytick', ytick, ...
'adc_interleave', interleaved, 'or_support', ...
or_support, 'sync_support', sync_support, 'dv_support', dv_support);
clog('generic_adc_init: done drawing common adc','trace');
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:}); % Save and back-populate mask parameter values
clog('generic_adc_init: exiting','trace');
end
|
github
|
mstrader/mlib_devel-master
|
ports_struct.m
|
.m
|
mlib_devel-master/xps_library/ports_struct.m
| 1,888 |
utf_8
|
cffd05e81108f3b3e9d4f97c79ba5989
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function result = ports_struct(ports)
result = [];
for i=1:length(ports)
if isempty(result)
result = struct(ports{i},0);
else
result = setfield(result,ports{i},0);
end
end
|
github
|
mstrader/mlib_devel-master
|
adc16_init.m
|
.m
|
mlib_devel-master/xps_library/adc16_init.m
| 3,704 |
utf_8
|
28ad49f65a077292f11f9ed9fecd5f54
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2013 David MacMahon
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function adc16_init(blk, varargin)
try
clog('adc16_init: pre same_state','trace');
defaults = { ...
'block_name', blk, ...
'board_count', '1', ...
'roach2_rev', '2', ...
'zdok_rev', '2' ...
};
if same_state(blk, 'defaults', defaults, varargin{:}), return, end
clog('adc16_init: post same_state','trace');
check_mask_type(blk, 'ADC16');
munge_block(blk, varargin{:});
delete_lines(blk);
gw_name = clear_name(blk);
board_count = get_var('board_count', 'defaults', defaults, varargin{:});
chips = {'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h'};
x = 0;
y = 20;
for chip=1:8
% Chip 5 is the first chip of the second board
if chip == 5
if board_count == 1
break
else
% Second column
x = 210+30+50;
y = 20;
end
end
for channel=1:4
port_num = num2str((chip-1)*4 + channel);
inport_name = sprintf('%s%d_sim', chips{chip}, channel);
gateway_name = sprintf('%s_%s%d', gw_name, chips{chip}, channel);
outport_name = sprintf('%s%d', chips{chip}, channel);
inport_pos = [x+ 20, y, x+ 20+30, y+14];
gateway_pos = [x+100, y-3, x+100+70, y+17];
outport_pos = [x+210, y, x+210+30, y+14];
y = y + 50;
reuse_block(blk, inport_name, 'built-in/inport', ...
'Port', port_num, ...
'Position', inport_pos);
reuse_block(blk, gateway_name, 'xbsIndex_r4/Gateway In', ...
'arith_type', 'Signed', ...
'n_bits', '8', ...
'bin_pt', '7', ...
'Position', gateway_pos);
reuse_block(blk, outport_name, 'built-in/outport', ...
'Port', port_num, ...
'Position', outport_pos);
add_line(blk, [inport_name, '/1'], [gateway_name, '/1']);
h=add_line(blk, [gateway_name, '/1'], [outport_name, '/1']);
set_param(h, 'Name', outport_name);
end
end
clean_blocks(blk);
save_state(blk, 'defaults', defaults, varargin{:});
clog('adc16_init: exiting','trace');
catch ex
dump_and_rethrow(ex);
end % try/catch
end % function
|
github
|
mstrader/mlib_devel-master
|
clean_ports.m
|
.m
|
mlib_devel-master/xps_library/clean_ports.m
| 1,875 |
utf_8
|
fb66d8fec0e366dd308085b82188b810
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function clean_ports(sys,ports_struct)
ports = fieldnames(ports_struct);
for i=1:length(ports)
if ~getfield(ports_struct,ports{i})
delete_block([sys,'/',ports{i}]);
end
end
|
github
|
mstrader/mlib_devel-master
|
sl_customization.m
|
.m
|
mlib_devel-master/xps_library/sl_customization.m
| 2,390 |
utf_8
|
49705bd5074c1dc04186b5c96a06f334
|
% More information about this process can be found here:
% http://www.mathworks.com/help/simulink/ug/adding-items-to-model-editor-menus.html
function sl_customization(cm)
%% Register custom menu function.
cm.addCustomMenuFcn('Simulink:PreContextMenu', @getMyMenuItems);
end
%% Define the custom menu function.
function schemaFcns = getMyMenuItems(~)
schemaFcns = {@userFunctions};
end
%% Define the schema function for first menu item.
function schema = userFunctions(~)
% Make a submenu label
schema = sl_container_schema;
schema.label = 'CASPER helpers';
schema.childrenFcns = {@userGetBlockSize, @userSetBlockSize, @userGotoPlusPlus, @userDannyFunc, @userGoto2From, @userGotoFromGlobal, @userGotoFromLocal, @userGotoFromScoped};
end
function schema = userGetBlockSize(~)
schema = sl_action_schema;
schema.label = 'Get block size';
schema.callback = @helper_scripts.casper_sl_get_block_size;
end
function schema = userSetBlockSize(~)
schema = sl_action_schema;
schema.label = 'Set block sizes';
schema.callback = @helper_scripts.casper_sl_set_block_size;
end
function schema = userGotoPlusPlus(~)
schema = sl_action_schema;
schema.label = 'Increment goto/from tags';
schema.userdata = [-1, -1];
schema.callback = @helper_scripts.casper_sl_incr_tag;
end
function schema = userDannyFunc(~)
schema = sl_action_schema;
schema.label = 'Goto -> Goto++';
schema.callback = @helper_scripts.casper_sl_goto_plusplus;
end
function schema = userGoto2From(~)
schema = sl_action_schema;
schema.label = 'Goto -> From';
schema.callback = @helper_scripts.casper_sl_goto2from;
end
function schema = userGotoFromGlobal(~)
schema = sl_action_schema;
schema.label = 'Goto/From scope -> Global';
schema.userdata = 'global';
schema.callback = @helper_scripts.casper_sl_tagscope;
end
function schema = userGotoFromLocal(~)
schema = sl_action_schema;
schema.label = 'Goto/From scope -> Local';
schema.userdata = 'local';
schema.callback = @helper_scripts.casper_sl_tagscope;
end
function schema = userGotoFromScoped(~)
schema = sl_action_schema;
schema.label = 'Goto/From scope -> Scoped';
schema.userdata = 'scoped';
schema.callback = @helper_scripts.casper_sl_tagscope;
end
% if you'd like to add more user functions duplicate 'userFunction1'
% structure.
|
github
|
mstrader/mlib_devel-master
|
qdr_mask.m
|
.m
|
mlib_devel-master/xps_library/qdr_mask.m
| 7,738 |
utf_8
|
bc07d38bd63724a05c86b4ac7695f2a0
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function qdr_mask(blk)
myname = blk;
% get hardware platform from XSG block
try
xsg_blk = find_system(bdroot(blk), 'SearchDepth', 1, 'FollowLinks', 'on', 'LookUnderMasks', 'all', 'Tag', 'xps:xsg');
hw_sys = xps_get_hw_plat(get_param(xsg_blk{1}, 'hw_sys'));
catch
if ~regexp(bdroot(blk), '(casper|xps)_library')
warndlg('Could not find hardware platform for QDR configuration - is there an XSG block in this model? Defaulting platform to ROACH.');
warning('Could not find hardware platform for QDR configuration - is there an XSG block in this model? Defaulting platform to ROACH.');
hw_sys = 'ROACH';
end
end %try/catch
clog(['Drawing QDR block for platform: ', hw_sys], 'qdr_mask_debug');
switch hw_sys
case 'ROACH'
data_width = 36;
be_width = 4;
n_qdr = 2;
% end case 'ROACH'
case 'ROACH2'
data_width = 72;
be_width = 8;
n_qdr = 4;
% end case 'ROACH2'
end % end switch hw_sys
% catch incorrect qdr selection
which_qdr = get_param(myname, 'which_qdr');
qdr_num = str2num(which_qdr(4));
if (qdr_num > (n_qdr-1))
warndlg(['Block configured for QDR ', num2str(qdr_num), '. ', hw_sys, ' only has ', num2str(n_qdr), ' QDR chips. Defaulting to QDR 0']);
warning(['Block configured for QDR ', num2str(qdr_num), '. ', hw_sys, ' only has ', num2str(n_qdr), ' QDR chips. Defaulting to QDR 0']);
set_param(myname, 'which_qdr', 'qdr0');
end
switch hw_sys
case 'ROACH'
%construct bit remapping to move parity bits
input_parity_map = 'b = {';
output_parity_map = 'b = {';
output_parity_map_top = '';
output_parity_map_bottom = '';
for i=[be_width-1:-1:0]
input_parity_map = [input_parity_map, 'a[', num2str(data_width-(be_width-i)), '],a[', num2str((i+1)*8-1), ':', num2str(i*8), ']'];
output_parity_map_top = [output_parity_map_top, 'a[', num2str(9*(i+1) - 1), ']'];
output_parity_map_bottom = [output_parity_map_bottom, 'a[', num2str(9*(i+1)-1 - 1), ':', num2str(9*(i+1)-1 - 8), ']'];
if i==0
input_parity_map = [input_parity_map, '}'];
output_parity_map = [output_parity_map, output_parity_map_top, ',', output_parity_map_bottom, '}'];
else
input_parity_map = [input_parity_map, ','];
output_parity_map_top = [output_parity_map_top, ','];
output_parity_map_bottom = [output_parity_map_bottom, ','];
end
input_parity_map
end
% end case 'ROACH'
case 'ROACH2'
input_parity_map = 'b = {a[71:68],a[63:32],a[67:64],a[31:0]}';
%input_parity_map = 'b = {a[71:68],a[31:0],a[67:64],a[63:32]}';
output_parity_map = 'b = {a[71:68],a[35:32],a[67:36],a[31:0]}';
%output_parity_map = 'b = {a[71:68],a[35:32],a[31:0],a[67:36]}';
% end case 'ROACH2'
end % end switch hw_sys
%update expressions in bitbasher blocks
extract_parity_blk = [myname, '/extract_parity'];
insert_parity_blk = [myname, '/insert_parity'];
set_param(insert_parity_blk, 'bitexpr', input_parity_map);
set_param(extract_parity_blk, 'bitexpr', output_parity_map);
set_param([myname, '/qdr_sim_model/sim_data_in'], 'n_bits', num2str(data_width));
set_param([myname, '/convert_data_in'], 'n_bits', num2str(data_width));
set_param([myname, '/convert_data_in1'], 'n_bits', num2str(data_width));
set_param([myname, '/convert_be'], 'n_bits', num2str(be_width));
gateway_outs = find_system(myname, 'searchdepth', 1, 'FollowLinks', 'on', 'lookundermasks', 'all', 'masktype', 'Xilinx Gateway Out Block');
for i =1:length(gateway_outs)
gw = gateway_outs{i};
if regexp(get_param(gw, 'Name'), '(wr_en)$')
toks = regexp(get_param(gw, 'Name'), '(wr_en)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
elseif regexp(get_param(gw, 'Name'), '(rd_en)$')
toks = regexp(get_param(gw, 'Name'), '(rd_en)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
elseif regexp(get_param(gw, 'Name'), '(be)$')
toks = regexp(get_param(gw, 'Name'), '(be)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
elseif regexp(get_param(gw, 'Name'), '(address)$')
toks = regexp(get_param(gw, 'Name'), '(address)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
elseif regexp(get_param(gw, 'Name'), '(data_in)$')
toks = regexp(get_param(gw, 'Name'), '(data_in)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
else
error(['Unknown gateway name: ', gw]);
end
end
gateway_ins =find_system(myname, 'searchdepth', 1, 'FollowLinks', 'on', 'lookundermasks', 'all', 'masktype', 'Xilinx Gateway In Block');
for i =1:length(gateway_ins)
gw = gateway_ins{i};
if regexp(get_param(gw, 'Name'), '(data_out)$')
toks = regexp(get_param(gw, 'Name'), '(data_out)$', 'tokens');
new_gw_name = clear_name([myname, '_', toks{1}{1}]);
set_param(gw, 'n_bits', num2str(data_width));
set_param(gw, 'Name', new_gw_name);
gw = new_gw_name;
elseif regexp(get_param(gw, 'Name'), '(data_valid)$')
toks = regexp(get_param(gw, 'Name'), '(data_valid)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
elseif regexp(get_param(gw, 'Name'), '(phy_ready)$')
toks = regexp(get_param(gw, 'Name'), '(phy_ready)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
elseif regexp(get_param(gw, 'Name'), '(cal_fail)$')
toks = regexp(get_param(gw, 'Name'), '(cal_fail)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
elseif regexp(get_param(gw, 'Name'), '(ack)$')
toks = regexp(get_param(gw, 'Name'), '(ack)$', 'tokens');
set_param(gw, 'Name', clear_name([myname, '_', toks{1}{1}]));
else
error(['Unknown gateway name: ', gw]);
end
end
|
github
|
mstrader/mlib_devel-master
|
tengbe_v2_mask.m
|
.m
|
mlib_devel-master/xps_library/tengbe_v2_mask.m
| 25,369 |
utf_8
|
5fa8221ec632b0990d8d0329ea7598d3
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function tengbe_v2_mask(blk)
cursys = blk;
%set_param(cursys, 'LinkStatus', 'inactive');
% rename gateways
gateway_ins = find_system(cursys, 'searchdepth', 1, 'FollowLinks', 'on', 'lookundermasks', 'all', 'masktype', 'Xilinx Gateway In Block');
for i = 1 : length(gateway_ins),
gw = gateway_ins{i};
if regexp(get_param(gw, 'Name'), '_tx_afull$')
set_param(gw, 'Name', clear_name([cursys, '_tx_afull']));
elseif regexp(get_param(gw, 'Name'), '_tx_overflow$')
set_param(gw, 'Name', clear_name([cursys, '_tx_overflow']));
elseif regexp(get_param(gw, 'Name'), '_rx_valid$')
set_param(gw, 'Name', clear_name([cursys, '_rx_valid']));
elseif regexp(get_param(gw, 'Name'), '_rx_data$')
set_param(gw, 'Name', clear_name([cursys, '_rx_data']));
elseif regexp(get_param(gw, 'Name'), '_rx_source_ip$')
set_param(gw, 'Name', clear_name([cursys, '_rx_source_ip']));
elseif regexp(get_param(gw, 'Name'), '_rx_source_port$')
set_param(gw, 'Name', clear_name([cursys, '_rx_source_port']));
elseif regexp(get_param(gw, 'Name'), '_rx_end_of_frame$')
set_param(gw, 'Name', clear_name([cursys, '_rx_end_of_frame']));
elseif regexp(get_param(gw, 'Name'), '_rx_bad_frame$')
set_param(gw, 'Name', clear_name([cursys, '_rx_bad_frame']));
elseif regexp(get_param(gw, 'Name'), '_rx_overrun$')
set_param(gw, 'Name', clear_name([cursys, '_rx_overrun']));
elseif regexp(get_param(gw, 'Name'), '_led_up$')
set_param(gw, 'Name', clear_name([cursys, '_led_up']));
elseif regexp(get_param(gw, 'Name'), '_led_rx$')
set_param(gw, 'Name', clear_name([cursys, '_led_rx']));
elseif regexp(get_param(gw, 'Name'), '_led_tx$')
set_param(gw, 'Name', clear_name([cursys, '_led_tx']));
elseif regexp(get_param(gw, 'Name'), '_rx_size$')
set_param(gw, 'Name', clear_name([cursys, '_rx_size']));
else
errordlg(['Unknown gateway: ', get_param(gw, 'Parent'), '/', get_param(gw, 'Name')]);
end
end
gateway_outs = find_system(cursys, 'searchdepth', 1, 'FollowLinks', 'on', 'lookundermasks', 'all', 'masktype', 'Xilinx Gateway Out Block');
for i = 1 : length(gateway_outs),
gw = gateway_outs{i};
if regexp(get_param(gw, 'Name'), '_rst$')
set_param(gw, 'Name', clear_name([cursys, '_rst']));
elseif regexp(get_param(gw, 'Name'), '_tx_valid$')
set_param(gw, 'Name', clear_name([cursys, '_tx_valid']));
elseif regexp(get_param(gw, 'Name'), '_tx_end_of_frame$')
set_param(gw, 'Name', clear_name([cursys, '_tx_end_of_frame']));
elseif regexp(get_param(gw, 'Name'), '_tx_discard$')
set_param(gw, 'Name', clear_name([cursys, '_tx_discard']));
elseif regexp(get_param(gw, 'Name'), '_tx_data$')
set_param(gw, 'Name', clear_name([cursys, '_tx_data']));
elseif regexp(get_param(gw, 'Name'), '_tx_dest_ip$')
set_param(gw, 'Name', clear_name([cursys, '_tx_dest_ip']));
elseif regexp(get_param(gw, 'Name'), '_tx_dest_port$')
set_param(gw, 'Name', clear_name([cursys, '_tx_dest_port']));
elseif regexp(get_param(gw, 'Name'), '_rx_ack$')
set_param(gw, 'Name', clear_name([cursys, '_rx_ack']));
elseif regexp(get_param(gw, 'Name'), '_rx_overrun_ack$')
set_param(gw, 'Name', clear_name([cursys, '_rx_overrun_ack']));
else
errordlg(['Unknown gateway: ', get_param(gw, 'Parent'), '/', get_param(gw, 'Name')]);
end
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% do debug counters and supporting logic
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
debug_ctr_width = get_param(cursys, 'debug_ctr_width');
% are any of the checkboxes actually checked?
if strcmp(get_param(blk, 'txctr'), 'on') || strcmp(get_param(blk, 'txerrctr'), 'on') || ...
strcmp(get_param(blk, 'txofctr'), 'on') || strcmp(get_param(blk, 'txfullctr'), 'on') || ...
strcmp(get_param(blk, 'txvldctr'), 'on') || strcmp(get_param(blk, 'rxctr'), 'on') || ...
strcmp(get_param(blk, 'rxerrctr'), 'on') || strcmp(get_param(blk, 'rxofctr'), 'on') || ...
strcmp(get_param(blk, 'rxbadctr'), 'on') || strcmp(get_param(blk, 'rxvldctr'), 'on') || ...
strcmp(get_param(blk, 'rxeofctr'), 'on'),
% make sure the terminator and port are there
reuse_block(cursys, 'debug_rst', 'built-in/inport', 'Port', '9', 'Position', [120 137 150 153]);
reuse_block(cursys, 'debug_rst_goto', 'built-in/goto', 'GotoTag', 'debug_rst', 'Position', [200 135 280 150]);
%reuse_block(cursys, 'term1', 'built-in/Terminator', 'Position', [200 135 220 155]);
try add_line(cursys, 'debug_rst/1', 'debug_rst_goto/1'); catch e, end
else
try delete_block_lines([blk, '/', 'debug_rst'], false); catch e, end
try delete_block_lines([blk, '/', 'debug_rst_goto'], false); catch e, end
%try delete_block_lines([blk, '/', 'term1'], false); catch e, end
end
function draw_counter(sys, ypos, targetname, source_tag)
fromdbg_name = [targetname, '_fromdbg'];
fromsrc_name = [targetname, '_fromsrc'];
ctr_name = [targetname, '_ctr'];
delay_name = [targetname, '_del'];
if strcmp(get_param(sys, targetname), 'on')
reuse_block(sys, fromdbg_name, 'built-in/from', ...
'GotoTag', 'debug_rst', ...
'Position', [280 ypos 400 ypos+12]);
reuse_block(sys, fromsrc_name, 'built-in/from', ...
'GotoTag', source_tag, ...
'Position', [280 ypos+30 400 ypos+42]);
reuse_block(sys, delay_name, 'xbsIndex_r4/Delay', ...
'reg_retiming', 'on', 'latency', '1', ...
'Position', [430 ypos 450 ypos+25]);
reuse_block(sys, ctr_name, 'xbsIndex_r4/Counter', ...
'arith_type', 'Unsigned', 'n_bits', debug_ctr_width, 'explicit_period', 'on', ...
'period', '1', 'use_behavioral_HDL', 'on', 'rst', 'on', 'en', 'on', ...
'Position', [480 ypos 530 ypos+45]);
reuse_block(sys, targetname, 'xps_library/software register', ...
'io_dir', 'To Processor', 'arith_types', '0', 'io_delay', '1', ...
'bitwidths', debug_ctr_width, ...
'sim_port', 'no', 'Position', [580 ypos 630 ypos+20]);
try add_line(sys, [fromdbg_name, '/1'], [delay_name, '/1']); catch e, end
try add_line(sys, [delay_name, '/1'], [ctr_name, '/1']); catch e, end
try add_line(sys, [fromsrc_name, '/1'], [ctr_name, '/2']); catch e, end
try add_line(sys, [ctr_name, '/1'], [targetname, '/1']); catch e, end
else
try delete_block_lines([sys, '/', fromdbg_name], false); catch e, end
try delete_block_lines([sys, '/', fromsrc_name], false); catch e, end
try delete_block_lines([sys, '/', targetname], false); catch e, end
try delete_block_lines([sys, '/', ctr_name], false); catch e, end
try delete_block_lines([sys, '/', delay_name], false); catch e, end
try delete_block([sys, '/', fromdbg_name]); catch e, end
try delete_block([sys, '/', fromsrc_name]); catch e, end
try delete_block([sys, '/', delay_name]); catch e, end
try delete_block([sys, '/', targetname]); catch e, end
try delete_block([sys, '/', ctr_name]); catch e, end
end
end
function draw_errorcounter(sys, ypos, targetname, frame_len, eof_tag, source_tag)
fromdbg_name = [targetname, '_fromdbg'];
fromeof_name = [targetname, '_fromeof'];
fromsrc_name = [targetname, '_fromsrc'];
ctr_name = [targetname, '_ctr'];
nobad_name = [targetname, '_nobad'];
errchk_name = [targetname, '_errchk'];
delay_name = [targetname, '_del'];
if strcmp(get_param(sys, targetname), 'on')
reuse_block(sys, fromdbg_name, 'built-in/from', ...
'GotoTag', 'debug_rst', ...
'Position', [180 ypos 300 ypos+12]);
reuse_block(sys, fromeof_name, 'built-in/from', ...
'GotoTag', eof_tag, ...
'Position', [180 ypos+15 300 ypos+27]);
reuse_block(sys, fromsrc_name, 'built-in/from', ...
'GotoTag', source_tag, ...
'Position', [180 ypos+30 300 ypos+42]);
reuse_block(sys, nobad_name, 'xbsIndex_r4/Constant', ...
'arith_type', 'Boolean', 'const', '0', 'explicit_period', 'on', 'period', '1', ...
'Position', [180 ypos+30 200 ypos+45]);
reuse_block(sys, errchk_name, 'casper_library_communications/frame_len_checker', ...
'frame_len', frame_len, ...
'Position', [330, ypos, 420, ypos+45]);
reuse_block(sys, delay_name, 'xbsIndex_r4/Delay', ...
'reg_retiming', 'on', 'latency', '1', ...
'Position', [430 ypos 450 ypos+25]);
reuse_block(sys, ctr_name, 'xbsIndex_r4/Counter', ...
'arith_type', 'Unsigned', 'n_bits', debug_ctr_width, 'explicit_period', 'on', ...
'period', '1', 'use_behavioral_HDL', 'on', 'rst', 'on', 'en', 'on', ...
'Position', [480 ypos 530 ypos+45]);
reuse_block(sys, targetname, 'xps_library/software register', ...
'io_dir', 'To Processor', 'arith_types', '0', 'io_delay', '1', ...
'bitwidths', debug_ctr_width, ...
'sim_port', 'no', 'Position', [580 ypos 630 ypos+20]);
try add_line(sys, [fromsrc_name, '/1'], [errchk_name, '/1']); catch e, end
try add_line(sys, [fromeof_name, '/1'], [errchk_name, '/2']); catch e, end
try add_line(sys, [nobad_name, '/1'], [errchk_name, '/3']); catch e, end
try add_line(sys, [fromdbg_name, '/1'], [delay_name, '/1']); catch e, end
try add_line(sys, [delay_name, '/1'], [ctr_name, '/1']); catch e, end
try add_line(sys, [errchk_name, '/1'], [ctr_name, '/2']); catch e, end
try add_line(sys, [ctr_name, '/1'], [targetname, '/1']); catch e, end
else
try delete_block_lines([sys, '/', fromdbg_name], false); catch e, end
try delete_block_lines([sys, '/', fromeof_name], false); catch e, end
try delete_block_lines([sys, '/', fromsrc_name], false); catch e, end
try delete_block_lines([sys, '/', errchk_name], false); catch e, end
try delete_block_lines([sys, '/', nobad_name], false); catch e, end
try delete_block_lines([sys, '/', targetname], false); catch e, end
try delete_block_lines([sys, '/', ctr_name], false); catch e, end
try delete_block_lines([sys, '/', delay_name], false); catch e, end
try delete_block([sys, '/', fromdbg_name]); catch e, end
try delete_block([sys, '/', fromeof_name]); catch e, end
try delete_block([sys, '/', fromsrc_name]); catch e, end
try delete_block([sys, '/', delay_name]); catch e, end
try delete_block([sys, '/', errchk_name]); catch e, end
try delete_block([sys, '/', nobad_name]); catch e, end
try delete_block([sys, '/', targetname]); catch e, end
try delete_block([sys, '/', ctr_name]); catch e, end
end
end
function draw_rxcounter(sys, ypos, targetname, eof_tag, source_tag)
fromdbg_name = [targetname, '_fromdbg'];
fromeof_name = [targetname, '_fromeof'];
fromsrc_name = [targetname, '_fromsrc'];
ctr_name = [targetname, '_ctr'];
and_name = [targetname, '_and'];
ed_name = [targetname, '_ed'];
delay_name = [targetname, '_del'];
if strcmp(get_param(sys, targetname), 'on')
reuse_block(sys, fromdbg_name, 'built-in/from', ...
'GotoTag', 'debug_rst', ...
'Position', [280 ypos 400 ypos+12]);
reuse_block(sys, fromeof_name, 'built-in/from', ...
'GotoTag', eof_tag, ...
'Position', [280 ypos+15 400 ypos+27]);
reuse_block(sys, fromsrc_name, 'built-in/from', ...
'GotoTag', source_tag, ...
'Position', [280 ypos+30 400 ypos+42]);
reuse_block(sys, delay_name, 'xbsIndex_r4/Delay', ...
'reg_retiming', 'on', 'latency', '1', ...
'Position', [430 ypos 450 ypos+25]);
reuse_block(sys, and_name, 'xbsIndex_r4/Logical', ...
'arith_type', 'Unsigned', 'logical_function', 'AND', 'inputs', '2', ...
'latency', '1', 'Position', [480 ypos 530 ypos+45]);
reuse_block(sys, ed_name, 'casper_library_misc/edge_detect', ...
'edge', 'Rising', 'polarity', 'Active High',...
'Position', [580 ypos 630 ypos+20]);
reuse_block(sys, ctr_name, 'xbsIndex_r4/Counter', ...
'arith_type', 'Unsigned', 'n_bits', debug_ctr_width, 'explicit_period', 'on', ...
'period', '1', 'use_behavioral_HDL', 'on', 'rst', 'on', 'en', 'on', ...
'Position', [680 ypos 730 ypos+45]);
reuse_block(sys, targetname, 'xps_library/software_register', ...
'io_dir', 'To Processor', 'arith_types', '0', 'io_delay', '1', ...
'bitwidths', debug_ctr_width, ...
'sim_port', 'no', 'Position', [780 ypos 830 ypos+20]);
try add_line(sys, [fromeof_name, '/1'], [and_name, '/1']); catch e, end
try add_line(sys, [fromsrc_name, '/1'], [and_name, '/2']); catch e, end
try add_line(sys, [and_name, '/1'], [ed_name, '/1']); catch e, end
try add_line(sys, [fromdbg_name, '/1'], [delay_name, '/1']); catch e, end
try add_line(sys, [delay_name, '/1'], [ctr_name, '/1']); catch e, end
try add_line(sys, [ed_name, '/1'], [ctr_name, '/2']); catch e, end
try add_line(sys, [ctr_name, '/1'], [targetname, '/1']); catch e, end
else
try delete_block_lines([sys, '/', fromdbg_name], false); catch e, end
try delete_block_lines([sys, '/', fromeof_name], false); catch e, end
try delete_block_lines([sys, '/', fromsrc_name], false); catch e, end
try delete_block_lines([sys, '/', and_name], false); catch e, end
try delete_block_lines([sys, '/', ed_name], false); catch e, end
try delete_block_lines([sys, '/', targetname], false); catch e, end
try delete_block_lines([sys, '/', ctr_name], false); catch e, end
try delete_block_lines([sys, '/', delay_name], false); catch e, end
try delete_block([sys, '/', fromdbg_name]); catch e, end
try delete_block([sys, '/', fromeof_name]); catch e, end
try delete_block([sys, '/', fromsrc_name]); catch e, end
try delete_block([sys, '/', delay_name]); catch e, end
try delete_block([sys, '/', and_name]); catch e, end
try delete_block([sys, '/', ed_name]); catch e, end
try delete_block([sys, '/', targetname]); catch e, end
try delete_block([sys, '/', ctr_name]); catch e, end
end
end
SPACING = 80;
% tx counter
starty = 850;
draw_rxcounter(cursys, starty, 'txctr', 'gtx_eof', 'gtx_valid');
% tx error counter
starty = starty + SPACING;
draw_errorcounter(cursys, starty, 'txerrctr', get_param(cursys, 'txerrctr_len'), 'gtx_eof', 'gtx_valid');
% tx overflow counter
starty = starty + SPACING;
draw_counter(cursys, starty, 'txofctr', 'gtx_overflow');
% tx full counter
starty = starty + SPACING;
draw_counter(cursys, starty, 'txfullctr', 'gtx_afull');
% tx valid counter
starty = starty + SPACING;
draw_counter(cursys, starty, 'txvldctr', 'gtx_valid')
% rx counter
starty = starty + SPACING;
draw_rxcounter(cursys, starty, 'rxctr', 'grx_eof', 'grx_valid')
% rx error counter
starty = starty + SPACING;
draw_errorcounter(cursys, starty, 'rxerrctr', get_param(cursys, 'rxerrctr_len'), 'grx_eof', 'grx_valid');
% rx overflow counter
starty = starty + SPACING;
draw_counter(cursys, starty, 'rxofctr', 'grx_overrun');
% rx bad frame counter
starty = starty + SPACING;
draw_counter(cursys, starty, 'rxbadctr', 'grx_badframe');
% rx valid counter
starty = starty + SPACING;
draw_counter(cursys, starty, 'rxvldctr', 'grx_valid');
% rx eof counter
starty = starty + SPACING;
draw_counter(cursys, starty, 'rxeofctr', 'grx_eof');
% rx snapshot
snaplen = get_param(cursys, 'rxsnaplen');
snapname = 'rxs';
if strcmp(snaplen, '0 - no snap') == 0,
ypos = 981;
reuse_block(cursys, 'rxs_fr0', 'built-in/from', 'GotoTag', 'grx_led_up', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_fr1', 'built-in/from', 'GotoTag', 'grx_led_rx', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_fr2', 'built-in/from', 'GotoTag', 'grx_data', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_fr3', 'built-in/from', 'GotoTag', 'grx_valid', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_fr4', 'built-in/from', 'GotoTag', 'grx_src_ip', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_fr5', 'built-in/from', 'GotoTag', 'grx_eof', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_fr6', 'built-in/from', 'GotoTag', 'grx_badframe', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_fr7', 'built-in/from', 'GotoTag', 'grx_overrun', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_frwe', 'built-in/from', 'GotoTag', 'grx_valid', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_frtrig1', 'built-in/from', 'GotoTag', 'grx_valid', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'rxs_frtrig2', 'built-in/from', 'GotoTag', 'grx_eof', 'Position', [900 ypos 1000 ypos+12]);
reuse_block(cursys, snapname, 'casper_library_scopes/bitfield snapshot', ...
'Position', [1155 981 1260 1234], ...
'io_names', '[led_up led_rx data_in valid_in ip_in eof_in bad_frame overrun]', ...
'io_widths', '[1 1 64 1 32 1 1 1]', ...
'io_bps', '[0 0 0 0 0 0 0 0]', ...
'io_types', '[2 2 0 2 0 2 2 2]', ...
'snap_storage', 'bram', ...
'snap_dram_dimm', '2', ...
'snap_dram_clock', '250', ...
'snap_nsamples', num2str(log2(str2double(snaplen))), ...
'snap_data_width', '128', ...
'snap_offset', 'off', ...
'snap_circap', 'off', ...
'snap_value', 'off', ...
'snap_use_dsp48', 'on', ...
'snap_delay', '5', ...
'extra_names', '[notused]', ...
'extra_widths', '[32]', ...
'extra_bps', '[0]', ...
'extra_types', '[0]');
reuse_block(cursys, 'rxsnap_and', 'xbsIndex_r4/Logical', ...
'arith_type', 'Unsigned', 'logical_function', 'AND', 'inputs', '2', ...
'Position', [1070 1194 1120 1241]);
try add_line(cursys, 'rxs_fr0/1', [snapname, '/1']); catch e, end
try add_line(cursys, 'rxs_fr1/1', [snapname, '/2']); catch e, end
try add_line(cursys, 'rxs_fr2/1', [snapname, '/3']); catch e, end
try add_line(cursys, 'rxs_fr3/1', [snapname, '/4']); catch e, end
try add_line(cursys, 'rxs_fr4/1', [snapname, '/5']); catch e, end
try add_line(cursys, 'rxs_fr5/1', [snapname, '/6']); catch e, end
try add_line(cursys, 'rxs_fr6/1', [snapname, '/7']); catch e, end
try add_line(cursys, 'rxs_fr7/1', [snapname, '/8']); catch e, end
try add_line(cursys, 'rxs_frwe/1', [snapname, '/9']); catch e, end
try add_line(cursys, 'rxs_frtrig1/1', 'rxsnap_and/1'); catch e, end
try add_line(cursys, 'rxs_frtrig2/1', 'rxsnap_and/2'); catch e, end
try add_line(cursys, 'rxsnap_and/1',[snapname, '/10']); catch e, end
else
try delete_block_lines([cursys, '/', snapname], false); catch e, end
try delete_block_lines([cursys, '/rxsnap_and'], false); catch e, end
try delete_block([cursys, '/', snapname]); catch e, end
try delete_block([cursys, '/rxsnap_and']); catch e, end
end
% tx snapshot
snaplen = get_param(cursys, 'txsnaplen');
snapname = 'txs';
if strcmp(snaplen, '0 - no snap') == 0,
ypos = 1302;
reuse_block(cursys, 'txs_fr0', 'built-in/from', 'GotoTag', 'grx_led_up', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_fr1', 'built-in/from', 'GotoTag', 'grx_led_tx', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_fr2', 'built-in/from', 'GotoTag', 'gtx_afull', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_fr3', 'built-in/from', 'GotoTag', 'gtx_overflow', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_fr4', 'built-in/from', 'GotoTag', 'gtx_valid', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_fr5', 'built-in/from', 'GotoTag', 'gtx_eof', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_fr6', 'built-in/from', 'GotoTag', 'gtx_data', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_fr7', 'built-in/from', 'GotoTag', 'gtx_dest_ip', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_frwe', 'built-in/from', 'GotoTag', 'gtx_valid', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_frtrig1', 'built-in/from', 'GotoTag', 'gtx_valid', 'Position', [900 ypos 1000 ypos+12]); ypos = ypos + 15;
reuse_block(cursys, 'txs_frtrig2', 'built-in/from', 'GotoTag', 'gtx_eof', 'Position', [900 ypos 1000 ypos+12]);
reuse_block(cursys, snapname, 'casper_library_scopes/bitfield snapshot', ...
'Position', [1155 1302 1260 1528], ...
'io_names', '[link_up led_tx tx_full tx_over valid eof data ip]', ...
'io_widths', '[1 1 1 1 1 1 64 32]', ...
'io_bps', '[0 0 0 0 0 0 0 0]', ...
'io_types', '[2 2 2 2 2 2 0 0]', ...
'snap_storage', 'bram', ...
'snap_dram_dimm', '2', ...
'snap_dram_clock', '250', ...
'snap_nsamples', num2str(log2(str2double(snaplen))), ...
'snap_data_width', '128', ...
'snap_offset', 'off', ...
'snap_circap', 'off', ...
'snap_value', 'off', ...
'snap_use_dsp48', 'on', ...
'snap_delay', '5', ...
'extra_names', '[notused]', ...
'extra_widths', '[32]', ...
'extra_bps', '[0]', ...
'extra_types', '[0]');
reuse_block(cursys, 'txsnap_and', 'xbsIndex_r4/Logical', ...
'arith_type', 'Unsigned', 'logical_function', 'AND', 'inputs', '2', ...
'Position', [1060 1479 1110 1526]);
try add_line(cursys, 'txs_fr0/1', [snapname, '/1']); catch e, end
try add_line(cursys, 'txs_fr1/1', [snapname, '/2']); catch e, end
try add_line(cursys, 'txs_fr2/1', [snapname, '/3']); catch e, end
try add_line(cursys, 'txs_fr3/1', [snapname, '/4']); catch e, end
try add_line(cursys, 'txs_fr4/1', [snapname, '/5']); catch e, end
try add_line(cursys, 'txs_fr5/1', [snapname, '/6']); catch e, end
try add_line(cursys, 'txs_fr6/1', [snapname, '/7']); catch e, end
try add_line(cursys, 'txs_fr7/1', [snapname, '/8']); catch e, end
try add_line(cursys, 'txs_frwe/1', [snapname, '/9']); catch e, end
try add_line(cursys, 'txs_frtrig1/1', 'txsnap_and/1'); catch e, end
try add_line(cursys, 'txs_frtrig2/1', 'txsnap_and/2'); catch e, end
try add_line(cursys, 'txsnap_and/1',[snapname, '/10']); catch e, end
else
try delete_block_lines([cursys, '/', snapname], false); catch e, end
try delete_block_lines([cursys, '/txsnap_and'], false); catch e, end
try delete_block([cursys, '/', snapname]); catch e, end
try delete_block([cursys, '/txsnap_and']); catch e, end
end
% remove unconnected blocks
clean_blocks(cursys);
end
% end
|
github
|
mstrader/mlib_devel-master
|
clear_path.m
|
.m
|
mlib_devel-master/xps_library/clear_path.m
| 2,257 |
utf_8
|
a91a0542b334e62a030a2b770c286441
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function result = clear_path(str);
j = 1;
result='';
for i = 1:length(str)
c = str(i);
if c < 32 % don't include funky characters
result = result;
elseif (c==34) | (c==42) | (c==60) | (c==62) |(c==63) | (c==124) % don't include invalid windows characters
result = result;
elseif c == 47 % convert POSIX '/' to Windows '\'
result(j) = '\';
j = j + 1;
else
result(j) = str(i);
j = j + 1;
end
end
% trim trailing '\'
if result(length(result)) == '\'
result = result(1:length(result)-1);
end
return;
|
github
|
mstrader/mlib_devel-master
|
read_xps.m
|
.m
|
mlib_devel-master/xps_library/read_xps.m
| 4,167 |
utf_8
|
18cabd9adf1c1faa71b23d0f63b3d287
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function out = read_xps(core_name, serial_port)
try
% open serial port
s = serial(serial_port);
set(s,'BaudRate',115200);
set(s,'InputBufferSize' ,127);
set(s,'OutputBufferSize',127);
set(s,'Timeout',3);
set(s,'ByteOrder','bigEndian');
fopen(s);
% send a request information to the iBOB
% special opcode
fwrite(s,uint8(129));
% block name
fwrite(s,uint8(core_name));
% zero string termination
fwrite(s,uint8(0));
% get the result code
request_result = fread(s, 1, 'uint8');
% get the result string
request_string = '';
c = fread(s,1,'uint8');
while c ~= 0
request_string = [request_string,char(c)];
c = fread(s,1,'uint8');
end
if request_result ~= 0
disp(['Error: ',request_string]);
fclose(s);
delete(s);
clear s;
return;
end
toks = regexp(request_string,'(\w+)', 'tokens');
type = toks{1};
type = type{1};
param = toks{5};
param = param{1};
address = toks{3};
address = address{1};
address = hex2dec(address(3:end));
if strcmp(type,'xps_bram')
size = str2num(param);
out = [];
while size > 0
if size > 31
block_size = 31;
else
block_size = size;
end
header(1) = uint8(128);
header(2) = uint8(0 + block_size);
header(3) = uint8(mod(floor(address/(2^24)),2^8));
header(4) = uint8(mod(floor(address/(2^16)),2^8));
header(5) = uint8(mod(floor(address/(2^8 )),2^8));
header(6) = uint8(mod(floor(address/(2^0 )),2^8));
fwrite(s, header);
fprintf('.');
out = [out; fread(s, block_size, 'uint32')];
size = size - block_size;
address = address + (block_size * 4);
end
fprintf('\n');
elseif strcmp(type,'xps_sw_reg')
header(1) = uint8(128);
header(2) = uint8(0 + 1);
header(3) = uint8(mod(floor(address/(2^24)),2^8));
header(4) = uint8(mod(floor(address/(2^16)),2^8));
header(5) = uint8(mod(floor(address/(2^8 )),2^8));
header(6) = uint8(mod(floor(address/(2^0 )),2^8));
fwrite(s, header);
out = fread(s, 1, 'uint32');
end
fclose(s);
delete(s);
clear s;
out = cast(out, 'uint32');
catch
fclose(s);
delete(s);
clear s;
disp(lasterr);
out = 0;
end
|
github
|
mstrader/mlib_devel-master
|
adc_common.m
|
.m
|
mlib_devel-master/xps_library/adc_common.m
| 14,293 |
utf_8
|
d543da218311a52eb881ba0087ca0b99
|
% simulates a generic CASPER-style ADC
%
% function adc_common(blk, varargin)
%
%
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Collaboration for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2010 Andrew Martens SKA/SA %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [yoffset] = adc_common(blk, varargin)
clog('adc_common: entering','trace');
defaults = {'in', 1, 'out', 8, 'bits', 8, 'adc_interleave', 'off', ...
'xoff', 0, 'xtick', 120, 'yoff', 10, 'ytick', 80, ...
'or_support', 'on', 'sync_support', 'on', 'dv_support', 'on', ...
'or_per_input', 1};
in = get_var('in', 'defaults', defaults, varargin{:});
out = get_var('out', 'defaults', defaults, varargin{:});
bits = get_var('bits', 'defaults', defaults, varargin{:});
adc_interleave = get_var('adc_interleave', 'defaults', defaults, varargin{:});
or_support = get_var('or_support', 'defaults', defaults, varargin{:});
sync_support = get_var('sync_support', 'defaults', defaults, varargin{:});
dv_support = get_var('dv_support', 'defaults', defaults, varargin{:});
or_per_input = get_var('or_per_input', 'defaults', defaults, varargin{:});
xoff = get_var('xoff', 'defaults', defaults, varargin{:});
xtick = get_var('xtick', 'defaults', defaults, varargin{:});
yoff = get_var('yoff', 'defaults', defaults, varargin{:});
ytick = get_var('ytick', 'defaults', defaults, varargin{:});
clog(['in: ',num2str(in),' out: ',num2str(out),' bits: ',num2str(bits),' adc_interleave: ',adc_interleave, ...
' or_support: ',or_support,' sync_support: ',sync_support,' dv_support: ',dv_support,' or_per_input: ',num2str(or_per_input)], 'adc_common_debug');
%useful derivatives
if strcmp(adc_interleave,'on'), il = 1; else, il = 0; end
if strcmp(or_support,'on'), of = 1; else, of = 0; end
if strcmp(sync_support,'on'), sync = 1; else, sync = 0; end
if strcmp(dv_support,'on'), dv = 1; else, dv = 0; end
%constants used in spacing blocks
% xtick = 120;
% ytick = 40+5*(of*out);
% yoff = 0; %for relative positions
%data input ports
% xoff = 0;
yw = 3+or_per_input;
yoff = yoff+1+dv+sync*out;
clog('doing data','adc_common_detailed_trace');
yoff = yoff + 1;
for d = 0:in-1
reuse_block(blk, ['sim_data',num2str(d)], 'built-in/inport', 'Port', num2str(d+1), ...
'Position', [xtick-15 ytick*yoff-7.5 xtick+15 ytick*yoff+7.5]);
%gain
clog('doing gain and offset','adc_common_detailed_trace');
reuse_block(blk, ['gain',num2str(d)], 'built-in/gain', 'Gain', num2str((2^bits-1)/2) , 'SampleTime', '-1', ...
'Position', [xtick*2-15 ytick*yoff-10 xtick*2+15 ytick*yoff+10]);
add_line(blk, ['sim_data', num2str(d), '/1'], ['gain',num2str(d),'/1']);
%bias
reuse_block(blk, ['bias',num2str(d)], 'built-in/bias', 'Bias', num2str((2^bits-1)/2) , ...
'SaturateOnIntegerOverflow', 'on', ...
'Position', [xtick*3-15 ytick*yoff-10 xtick*3+15 ytick*yoff+10]);
add_line(blk, ['gain', num2str(d), '/1'], ['bias',num2str(d),'/1']);
%down sample
clog('down sampling','adc_common_detailed_trace');
for ds = 0:out-1,
%downsampler
clog(['downsampler_',num2str(d),'_ds',num2str(ds)],'adc_common_detailed_trace');
reuse_block(blk, ['d',num2str(d),'_ds',num2str(ds)], 'dspsigops/Downsample', ...
'N', num2str(out), 'phase', num2str(ds), ...
'Position', [xtick*4-20 ytick*yoff-10 xtick*4+20 ytick*yoff+10]);
% Try to set options required for Downsample block of newer DSP blockset
% versions, but not available in older versions.
try
set_param([blk, '/d',num2str(d),'_ds',num2str(ds)], ...
'InputProcessing', 'Elements as channels (sample based)', ...
'RateOptions', 'Allow multirate processing');
catch
end;
clog(['downsampler_',num2str(d),'_ds',num2str(ds),' line'],'adc_common_detailed_trace');
add_line(blk, ['bias',num2str(d),'/1'], ['d',num2str(d),'_ds',num2str(ds),'/1']);
%delay
clog(['delay_',num2str(d),'_del',num2str(ds)],'adc_common_detailed_trace');
if ds == 0, NumDelays = 2; else, NumDelays = 1; end
reuse_block(blk, ['d',num2str(d),'_del',num2str(ds)], 'simulink/Discrete/Integer Delay', ...
'NumDelays', num2str(NumDelays), 'samptime', '-1', ...
'Position', [xtick*5-20 ytick*yoff-10 xtick*5+20 ytick*yoff+10]);
add_line(blk,['d',num2str(d),'_ds',num2str(ds),'/1'], ['d',num2str(d),'_del',num2str(ds),'/1']);
%input gateways for data
clog(['data gateway ',num2str(d*out+ds)],'adc_common_detailed_trace');
%gateway
if il == 1, %need to generate name as though from interleaved ADC
d_index = d*out+floor(ds/2) + (out/2)*rem(ds,2);
else
d_index = d*out+ds;
end
name = clear_name([blk, '_user_data', num2str(d_index)]);
reuse_block(blk, name, 'xbsIndex_r4/Gateway In', ...
'arith_type', 'Unsigned', 'n_bits', num2str(bits), 'bin_pt', '0', ...
'Position', [xtick*8-20 ytick*yoff-10 xtick*8+20 ytick*yoff+10]);
add_line(blk,['d',num2str(d),'_del',num2str(ds),'/1'], [name,'/1']);
%convert to two's complement
clog(['two''s complement ',num2str(d*out+ds)],'adc_common_detailed_trace');
blk_name = ['sign',num2str(d),'_',num2str(ds)];
reuse_block(blk, blk_name, 'xbsIndex_r4/Slice', ...
'nbits', '1', 'mode', 'Upper Bit Location + Width', 'bit0', '0', 'base0', 'MSB of Input', ...
'Position', [xtick*9-15 ytick*yoff-7.5 xtick*9+15 ytick*yoff+7.5]);
add_line(blk, [name,'/1'], [blk_name, '/1']);
prev = blk_name;
inv_name = ['inv',num2str(d),'_',num2str(ds)];
reuse_block(blk, inv_name, 'xbsIndex_r4/Inverter', ...
'latency', '0', ...
'Position', [xtick*10-15 ytick*yoff-7.5 xtick*10+15 ytick*yoff+7.5]);
add_line(blk, [prev,'/1'], [inv_name, '/1']);
blk_name = ['val',num2str(d),'_',num2str(ds)];
reuse_block(blk, blk_name, 'xbsIndex_r4/Slice', ...
'nbits', num2str(bits-1), 'mode', 'Lower Bit Location + Width', 'bit1', '0', 'base1', 'LSB of Input', ...
'Position', [xtick*9-15 ytick*(yoff+1)-7.5 xtick*9+15 ytick*(yoff+1)+7.5]);
add_line(blk, [name,'/1'], [blk_name, '/1']);
prev = blk_name;
blk_name = ['concat',num2str(d),'_',num2str(ds)];
reuse_block(blk, blk_name, 'xbsIndex_r4/Concat', ...
'num_inputs', '2', ...
'Position', [xtick*11-15 ytick*yoff-15 xtick*11+15 ytick*yoff+15]);
add_line(blk, [inv_name,'/1'], [blk_name, '/1']);
add_line(blk, [prev,'/1'], [blk_name, '/2']);
prev = blk_name;
blk_name = ['reinterpret',num2str(d),'_',num2str(ds)];
reuse_block(blk, blk_name, 'xbsIndex_r4/Reinterpret', ...
'force_arith_type', 'on', 'arith_type', 'Signed (2''s comp)', 'force_bin_pt', 'on', 'bin_pt', num2str(bits-1), ...
'Position', [xtick*12-30 ytick*yoff-7.5 xtick*12+30 ytick*yoff+7.5]);
add_line(blk, [prev,'/1'], [blk_name, '/1']);
prev = blk_name;
%output ports
clog(['data output port ',num2str(d*out+ds)],'adc_common_detailed_trace');
%output
reuse_block(blk, ['data',num2str(d),'_',num2str(ds)], 'built-in/outport', 'Port', num2str(d*(out+of*or_per_input)+ds+1), ...
'Position', [xtick*13-15 ytick*yoff-7.5 xtick*13+15 ytick*yoff+7.5]);
add_line(blk, [prev,'/1'], ['data',num2str(d),'_',num2str(ds),'/1']);
%overflow detection
if of == 1,
clog('overflow','adc_common_detailed_trace');
blk_name = ['lt',num2str(d),'_',num2str(ds)];
reuse_block(blk, blk_name, 'simulink/Logic and Bit Operations/Compare To Constant', ...
'relop', '<', 'const', '0', 'LogicOutDataTypeMode', 'boolean', ...
'Position', [xtick*6-15 ytick*(yoff+1)-15 xtick*6+15 ytick*(yoff+1)+15]);
add_line(blk, ['d',num2str(d),'_del',num2str(ds),'/1'], [blk_name,'/1']);
blk_name = ['gt',num2str(d),'_',num2str(ds)];
reuse_block(blk, blk_name, 'simulink/Logic and Bit Operations/Compare To Constant', ...
'relop', '>', 'const', num2str((2^bits)-1), 'LogicOutDataTypeMode', 'boolean', ...
'Position', [xtick*6-15 ytick*(yoff+2)-15 xtick*6+15 ytick*(yoff+2)+15]);
add_line(blk, ['d',num2str(d),'_del',num2str(ds),'/1'], [blk_name,'/1']);
if ds == out-1,
or_name = ['logical',num2str(d)];
reuse_block(blk, or_name, 'built-in/Logical Operator', ...
'Inputs', num2str(out*2), 'Operator', 'OR', ...
'Position', [xtick*7-15 ytick*(yoff+2)-15 xtick*7+15 ytick*(yoff+2)+15]);
for ofn = 0:out-1
add_line(blk, ['lt',num2str(d),'_',num2str(ofn),'/1'],[or_name,'/',num2str(ofn*2+1)]);
add_line(blk, ['gt',num2str(d),'_',num2str(ofn),'/1'],[or_name,'/',num2str(ofn*2+2)]);
end
for of_port = 0:or_per_input-1,
gw = clear_name([blk, '_user_outofrange', num2str(d*or_per_input+of_port)]);
reuse_block(blk, gw, 'xbsIndex_r4/Gateway In', ...
'arith_type', 'Boolean', ...
'Position', [xtick*8-20 ytick*(yoff+of_port+2)-10 xtick*8+20 ytick*(yoff+of_port+2)+10]);
add_line(blk,[or_name,'/1'], [gw,'/1']);
clog(['out of range output port ',num2str(d*or_per_input+of_port),' at ',num2str(d*(out+or_per_input)+out+of_port+1)],'adc_common_detailed_trace');
reuse_block(blk, ['or',num2str(d*or_per_input+of_port)], 'built-in/outport', 'Port', num2str(d*(out+or_per_input)+out+of_port+1), ...
'Position', [xtick*13-15 ytick*(yoff+2+of_port)-7.5 xtick*13+15 ytick*(yoff+2+of_port)+7.5]);
add_line(blk, [gw,'/1'], ['or',num2str(d*or_per_input+of_port),'/1']);
end
end
end %if of
yoff = yoff + yw;
end %for ds
end %for d
clog(['sync '],'adc_common_detailed_trace');
%sync support
if sync == 1,
reuse_block(blk, ['sim_sync'], 'built-in/inport', 'Port', num2str(in+1), 'Position', [xtick-15 ytick*(1+dv)-7.5 xtick+15 ytick*(dv+1)+7.5]);
for ds = 0:out/(2^il)-1,
reuse_block(blk, ['sync_ds',num2str(ds)], 'dspsigops/Downsample', ...
'N', num2str(out), 'phase', num2str(ds*(2^il)), ...
'Position', [xtick*4-20 ytick*(dv+1+ds)-10 xtick*4+20 ytick*(dv+1+ds)+10]);
% Try to set options required for Downsample block of newer DSP blockset
% versions, but not available in older versions.
try
set_param([blk, '/sync_ds',num2str(ds)], ...
'InputProcessing', 'Elements as channels (sample based)', ...
'RateOptions', 'Allow multirate processing');
catch
end;
add_line(blk,'sim_sync/1', ['sync_ds',num2str(ds),'/1']);
%delay
if ds == 0, NumDelays = 2; else, NumDelays = 1; end
reuse_block(blk, ['sync_del',num2str(ds)], 'simulink/Discrete/Integer Delay', ...
'NumDelays', num2str(NumDelays), 'samptime', '-1', ...
'Position', [xtick*5-20 ytick*(dv+1+ds)-10 xtick*5+20 ytick*(dv+1+ds)+10]);
add_line(blk,['sync_ds',num2str(ds),'/1'], ['sync_del',num2str(ds),'/1']);
%gateway
name = clear_name([blk, '_user_sync', num2str(ds)]);
reuse_block(blk, name, 'xbsIndex_r4/Gateway In', ...
'arith_type', 'Boolean', ...
'Position', [xtick*8-20 ytick*(dv+1+ds)-10 xtick*8+20 ytick*(dv+1+ds)+10]);
add_line(blk,['sync_del',num2str(ds),'/1'], [name,'/1']);
%output
clog(['doing sync ', num2str(ds),' at ',num2str((in*out)+(of*in*or_per_input)+(ds+1))],'adc_common_detailed_trace');
reuse_block(blk, ['sync',num2str(ds)], 'built-in/outport', 'Port', num2str((in*out)+(of*in*or_per_input)+(ds+1)), ...
'Position', [xtick*11-15 ytick*(dv+1+ds)-7.5 xtick*11+15 ytick*(dv+1+ds)+7.5]);
add_line(blk, [name,'/1'], ['sync',num2str(ds),'/1']);
end
end
clog('data valid','adc_common_detailed_trace');
if dv == 1,
%data valid support
clog('doing data_valid','adc_common_detailed_trace');
reuse_block(blk, 'sim_data_valid', 'built-in/inport', 'Port', num2str(in+sync+1), 'Position', [xtick*1-15 ytick-7.5 xtick*1+15 ytick+7.5]);
name = clear_name([blk, '_user_data_valid']);
reuse_block(blk, name, 'xbsIndex_r4/Gateway In', ...
'arith_type', 'Boolean', ...
'Position', [xtick*8-20 ytick-10 xtick*8+20 ytick+10 ]);
add_line(blk,'sim_data_valid/1', [name,'/1']);
reuse_block(blk, 'data_valid', 'built-in/outport', 'Port', num2str(out*in+out/(2^il)*sync+(of*in*or_per_input)+1),...
'Position', [xtick*11-15 ytick-7.5 xtick*11+15 ytick+7.5]);
add_line(blk, [name,'/1'], 'data_valid/1');
end
yoffset = yoff+1;
clog('adc_common: exiting','trace');
end
|
github
|
mstrader/mlib_devel-master
|
swreg_init.m
|
.m
|
mlib_devel-master/xps_library/swreg_init.m
| 12,294 |
utf_8
|
4c6a9e7bea980df0e4710ccc3e35f74d
|
function swreg_init(blk)
clog('entering swreg_init', 'trace');
check_mask_type(blk, 'swreg');
try
munge_block(blk);
remove_all_blks(blk);
delete_lines(blk);
catch ex
if regexp(ex.identifier, 'CallbackDelete')
return
end
dump_and_rethrow(ex);
end
% perform a sanity check on the mask values
[numios, current_names, current_widths, current_bins, current_types] = swreg_maskcheck(blk);
% should we make a sim in/out?
simport = true;
try
if strcmp(get_param(blk, 'sim_port'), 'off'),
simport = false;
end
catch ex
end
% add the inputs, outputs and gateway out blocks, drawing lines between them
x_size = 100;
y_size = 20;
x_start = 100;
y_pos = 100;
% the rest depends on whether it's an in or out reg
% mode = get_param(blk, 'mode');
% current_names = textscan(strtrim(strrep(strrep(strrep(strrep(get_param(blk, 'names'), ']', ''), '[', ''), ',', ' '), ' ', ' ')), '%s');
% current_names = current_names{1};
% numios = length(current_names);
% current_types = eval(get_param(blk, 'arith_types'));
% current_bins = eval(get_param(blk, 'bin_pts'));
% current_widths = eval(get_param(blk, 'bitwidths'));
% if strcmp(mode, 'fields of equal size'),
% ctypes = current_types;
% cbins = current_bins;
% cwidths = current_widths;
% current_types = zeros(numios, 1);
% current_bins = zeros(numios, 1);
% current_widths = zeros(numios, 1);
% for ctr = 1 : numios,
% current_types(ctr) = ctypes(1);
% current_bins(ctr) = cbins(1);
% current_widths(ctr) = cwidths(1);
% end
% end
io_dir = get_param(blk, 'io_dir');
if strcmp(io_dir, 'To Processor'),
iodir = 'output';
draw_to();
else
iodir = 'input';
draw_from();
end
% remove unconnected blocks
clean_blocks(blk);
% update format string so we know what's going on with this block
show_format = get_param(blk, 'show_format');
if numios == 1,
display_string = strcat('1', ' ', iodir);
else
display_string = sprintf('%d %ss', numios, iodir);
end
if strcmp(show_format, 'on'),
config_string = '';
for ctr = 1 : numios,
switch current_types(ctr),
case 1
config_string = strcat(config_string, sprintf('f%i.%i,', current_widths(ctr), current_bins(ctr)));
case 2
config_string = strcat(config_string, 'b,');
otherwise
config_string = strcat(config_string, sprintf('uf%i.%i,', current_widths(ctr), current_bins(ctr)));
end
end
display_string = strcat(display_string, ': ', config_string);
end
set_param(blk, 'AttributesFormatString', display_string);
clog('exiting swreg_init','trace');
function stype = type_to_string(arith_type)
switch arith_type
case 0
stype = 'Unsigned';
return
case 1
stype = 'Signed (2''s comp)';
return
case 2
stype = 'Boolean';
return
otherwise
error('Unknown type %i', arith_type);
end
end
function draw_to()
y_pos_row = y_pos;
if numios > 1,
% concat block
reuse_block(blk, 'concatenate', 'xbsIndex_r4/Concat', ...
'Position', [x_start + (x_size * 2 * 2), y_pos_row, x_start + (x_size * 2 * 2) + (x_size/2), y_pos_row + (numios * y_size)], ...
'num_inputs', num2str(numios));
end
% io delay
reuse_block(blk, 'io_delay', 'xbsIndex_r4/Delay', 'latency', get_param(blk, 'io_delay'), 'reg_retiming', 'on', ...
'Position', [x_start + (x_size * 2.5 * 2), y_pos_row, x_start + (x_size * 2.5 * 2) + (x_size/2), y_pos_row + y_size]);
% cast block
reuse_block(blk, 'cast_gw', 'xbsIndex_r4/Convert', ...
'Position', [x_start + (x_size * 3 * 2), y_pos_row, x_start + (x_size * 3 * 2) + (x_size/2), y_pos_row + y_size], ...
'arith_type', 'Unsigned', 'n_bits', '32', ...
'bin_pt', '0');
% gateway out block
gwout_name = [strrep(blk, '/', '_'), '_user_data_in'];
reuse_block(blk, gwout_name, 'xbsIndex_r4/Gateway Out', ...
'Position', [x_start + (x_size * 4 * 2), y_pos_row, x_start + (x_size * 4 * 2) + (x_size/2), y_pos_row + y_size], ...
'hdl_port', 'on');
if simport,
reuse_block(blk, 'sim_out', 'built-in/outport', 'Port', '1', ...
'Position', [x_start + (x_size * 6 * 2), y_pos_row, x_start + (x_size * 6 * 2) + (x_size/2), y_pos_row + y_size]);
else
reuse_block(blk, 'sim_out', 'built-in/terminator', ...
'Position', [x_start + (x_size * 6 * 2), y_pos_row, x_start + (x_size * 6 * 2) + (x_size/2), y_pos_row + y_size]);
end
if numios > 1,
add_line(blk, 'concatenate/1', 'io_delay/1', 'autorouting', 'on');
end
add_line(blk, 'io_delay/1', 'cast_gw/1', 'autorouting', 'on');
add_line(blk, 'cast_gw/1', [gwout_name, '/1'], 'autorouting', 'on');
add_line(blk, [gwout_name, '/1'], 'sim_out/1', 'autorouting', 'on');
% ports
for pindex = 1 : numios,
in_name = sprintf('out_%s', current_names{pindex});
assert_name = sprintf('assert_%s', current_names{pindex});
reinterpret_name = sprintf('reint%i', pindex);
if current_types(pindex) == 2
gddtype = 'Boolean';
else
gddtype = 'Fixed-point';
end
reuse_block(blk, in_name, 'built-in/inport', ...
'Port', num2str(pindex), ...
'Position', [x_start, y_pos_row, x_start + (x_size/2), y_pos_row + y_size]);
reuse_block(blk, assert_name, 'xbsIndex_r4/Assert', ...
'showname', 'off', 'assert_type', 'on', ...
'type_source', 'Explicitly', 'arith_type', type_to_string(current_types(pindex)), ...
'bin_pt', num2str(current_bins(pindex)), 'gui_display_data_type', gddtype, ...
'n_bits', num2str(current_widths(pindex)), ...
'Position', [x_start + (x_size * 1 * 1), y_pos_row, x_start + (x_size * 1 * 1) + (x_size/2), y_pos_row + y_size]);
reuse_block(blk, reinterpret_name, 'xbsIndex_r4/Reinterpret', ...
'Position', [x_start + (x_size * 1 * 2), y_pos_row, x_start + (x_size * 1 * 2) + (x_size/2), y_pos_row + y_size], ...
'force_arith_type', 'on', 'arith_type', 'Unsigned', ...
'force_bin_pt', 'on', 'bin_pt', '0');
add_line(blk, [in_name, '/1'], [assert_name, '/1'], 'autorouting', 'on');
add_line(blk, [assert_name, '/1'], [reinterpret_name, '/1'], 'autorouting', 'on');
if numios > 1,
add_line(blk, [reinterpret_name, '/1'], ['concatenate/', num2str(pindex)], 'autorouting', 'on');
else
add_line(blk, [reinterpret_name, '/1'], 'io_delay/1', 'autorouting', 'on');
end
y_pos_row = y_pos_row + (y_size * 2);
end
end
function draw_from()
y_pos_row = y_pos;
gwin_name = [strrep(blk, '/', '_'), '_user_data_out'];
reuse_block(blk, gwin_name, 'xbsIndex_r4/Gateway In', ...
'Position', [x_start + (x_size * 4 * 2), y_pos_row, x_start + (x_size * 4 * 2) + (x_size/2), y_pos_row + y_size], ...
'arith_type', 'Unsigned', 'n_bits', '32', 'bin_pt', '0', 'period', get_param(blk, 'sample_period'));
reuse_block(blk, 'io_delay', 'xbsIndex_r4/Delay', 'latency', get_param(blk, 'io_delay'), 'reg_retiming', 'on', ...
'Position', [x_start + (x_size * 4.5 * 2), y_pos_row, x_start + (x_size * 4.5 * 2) + (x_size/2), y_pos_row + y_size]);
add_line(blk, [gwin_name, '/1'], 'io_delay/1', 'autorouting', 'on');
if numios > 1,
addstr = '';
for pindex = 1 : numios,
addstr = [addstr, '+'];
end
reuse_block(blk, 'sim_add', 'simulink/Math Operations/Add', 'Inputs', addstr, 'OutDataTypeStr', 'uint32', ...
'Position', [x_start + (x_size * 3 * 2), y_pos_row, x_start + (x_size * 3 * 2) + (x_size/2), y_pos_row + (y_size * numios)]);
clear addstr;
add_line(blk, 'sim_add/1', [gwin_name, '/1'], 'autorouting', 'on');
end
% ports
total_width = sum(current_widths);
for pindex = 1 : numios,
io_arith_type = current_types(pindex);
if io_arith_type == 2,
sliceboolean = 'on';
else
sliceboolean = 'off';
end
if strcmp(io_arith_type, 'Signed (2''s comp)'),
shorttype = 'sfix';
else
shorttype = 'ufix';
end
io_bin_pt = current_bins(pindex);
io_bitwidth = current_widths(pindex);
total_width = total_width - io_bitwidth;
in_name = sprintf('sim_%i', pindex);
convert_name1 = ['convert1_', num2str(pindex)];
convert_name2 = ['convert2_', num2str(pindex)];
gain_name = ['gain_', num2str(pindex)];
out_name = sprintf('in_%s', current_names{pindex});
slice_name = sprintf('slice_%s', current_names{pindex});
reinterpret_name = sprintf('reint%i', pindex);
if simport,
reuse_block(blk, in_name, 'built-in/inport', 'Port', num2str(pindex), ...
'Position', [x_start, y_pos_row, x_start + (x_size/2), y_pos_row + y_size]);
else
reuse_block(blk, in_name, 'built-in/constant', 'Value', '0', ...
'Position', [x_start, y_pos_row, x_start + (x_size/2), y_pos_row + y_size]);
end
reuse_block(blk, convert_name1, 'simulink/Commonly Used Blocks/Data Type Conversion', 'OutDataTypeStr', sprintf('fixdt(''%s%i_En%i'')', shorttype, io_bitwidth, io_bin_pt), ...
'LockScale', 'on', 'ConvertRealWorld', 'Real World Value (RWV)', ...
'Position', [x_start + (x_size * 1 * 2), y_pos_row, x_start + (x_size * 1 * 2) + (x_size/2), y_pos_row + y_size]);
reuse_block(blk, convert_name2, 'simulink/Commonly Used Blocks/Data Type Conversion', 'OutDataTypeStr', sprintf('fixdt(''ufix%i_En0'')', io_bitwidth), ...
'LockScale', 'on', 'ConvertRealWorld', 'Stored Integer (SI)', ...
'Position', [x_start + (x_size * 1.5 * 2), y_pos_row, x_start + (x_size * 1.5 * 2) + (x_size/2), y_pos_row + y_size]);
reuse_block(blk, gain_name, 'simulink/Commonly Used Blocks/Gain', 'Gain', num2str(pow2(total_width)), ...
'Position', [x_start + (x_size * 2 * 2), y_pos_row, x_start + (x_size * 2 * 2) + (x_size/2), y_pos_row + y_size]);
if numios > 1,
add_line(blk, [in_name, '/1'], [convert_name1, '/1'], 'autorouting', 'on');
add_line(blk, [convert_name1, '/1'], [convert_name2, '/1'], 'autorouting', 'on');
add_line(blk, [convert_name2, '/1'], [gain_name, '/1'], 'autorouting', 'on');
add_line(blk, [gain_name, '/1'], ['sim_add/', num2str(pindex)], 'autorouting', 'on');
else
add_line(blk, [in_name, '/1'], [gwin_name, '/1'], 'autorouting', 'on');
end
reuse_block(blk, slice_name, 'xbsIndex_r4/Slice', ...
'Position', [x_start + (x_size * 5 * 2), y_pos_row, x_start + (x_size * 5 * 2) + (x_size/2), y_pos_row + y_size], ...
'nbits', num2str(io_bitwidth), 'boolean_output', sliceboolean, 'mode', 'Lower Bit Location + Width', 'bit0', num2str(total_width));
if strcmp(sliceboolean, 'off'),
reuse_block(blk, reinterpret_name, 'xbsIndex_r4/Reinterpret', ...
'Position', [x_start + (x_size * 6 * 2), y_pos_row, x_start + (x_size * 6 * 2) + (x_size/2), y_pos_row + y_size], ...
'force_arith_type', 'on', 'arith_type', io_arith_type, ...
'force_bin_pt', 'on', 'bin_pt', num2str(io_bin_pt));
end
reuse_block(blk, out_name, 'built-in/outport', ...
'Port', num2str(pindex), ...
'Position', [x_start + (x_size * 7 * 2), y_pos_row, x_start + (x_size * 7 * 2) + (x_size/2), y_pos_row + y_size]);
add_line(blk, 'io_delay/1', [slice_name, '/1'], 'autorouting', 'on');
if strcmp(sliceboolean, 'off'),
add_line(blk, [slice_name, '/1'], [reinterpret_name, '/1'], 'autorouting', 'on');
add_line(blk, [reinterpret_name, '/1'], [out_name, '/1'], 'autorouting', 'on');
else
add_line(blk, [slice_name, '/1'], [out_name, '/1'], 'autorouting', 'on');
end
y_pos_row = y_pos_row + (y_size * 2);
end
end
end
|
github
|
mstrader/mlib_devel-master
|
tengbe_v2_callback.m
|
.m
|
mlib_devel-master/xps_library/tengbe_v2_callback.m
| 5,754 |
utf_8
|
ac8490c901ed851d2d3a602a4f412241
|
% ten_gbe_v2_callback
%
% mask callback function
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Meerkat radio telescope project %
% www.kat.ac.za %
% Copyright (C) Andrew Martens 2011 %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function tengbe_v2_callback()
clog('entering ten_gbe_v2_callback', 'trace');
blk = gcb;
check_mask_type(blk, 'ten_GbE_v2');
%search for sysgen block and get target
xps_xsg_blks = find_system(bdroot,'SearchDepth',1,'FollowLinks','on','LookUnderMasks','all','Tag','xps:xsg');
if length(xps_xsg_blks) ~= 1,
errordlg('ten_Gbe_v2 requires a single MSSGE (XSG core config) block to be instantiated at the top level');
return;
end
%get the target board for the design
hw_sys = get_param(xps_xsg_blks(1),'hw_sys');
flavour = get_param(blk,'flavour');
show_param = get_param(blk, 'show_param');
mask_names = get_param(blk, 'MaskNames');
mask_visibilities = get_param(blk, 'MaskVisibilities');
%turn everything off by default
for p = 1:length(mask_visibilities),
mask_visibilities{p} = 'off';
end
%%%%%%%%%%%%%%%%%%%%%%%%%%
%these are visible always
%%%%%%%%%%%%%%%%%%%%%%%%%%
mask_visibilities{ismember(mask_names, 'rx_dist_ram')} = 'on';
mask_visibilities{ismember(mask_names, 'large_frames')} = 'on';
mask_visibilities{ismember(mask_names, 'show_param')} = 'on';
% debug counter checkboxes
mask_visibilities{ismember(mask_names, 'debug_ctr_width')} = 'on';
mask_visibilities{ismember(mask_names, 'txctr')} = 'on';
mask_visibilities{ismember(mask_names, 'txerrctr')} = 'on';
mask_visibilities{ismember(mask_names, 'txofctr')} = 'on';
mask_visibilities{ismember(mask_names, 'txfullctr')} = 'on';
mask_visibilities{ismember(mask_names, 'txvldctr')} = 'on';
mask_visibilities{ismember(mask_names, 'txsnaplen')} = 'on';
mask_visibilities{ismember(mask_names, 'rxctr')} = 'on';
mask_visibilities{ismember(mask_names, 'rxerrctr')} = 'on';
mask_visibilities{ismember(mask_names, 'rxofctr')} = 'on';
mask_visibilities{ismember(mask_names, 'rxbadctr')} = 'on';
mask_visibilities{ismember(mask_names, 'rxvldctr')} = 'on';
mask_visibilities{ismember(mask_names, 'rxeofctr')} = 'on';
mask_visibilities{ismember(mask_names, 'rxsnaplen')} = 'on';
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%these are visible always depending on architecture
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
if strcmp(hw_sys,'ROACH2:sx475t'),
mask_visibilities{ismember(mask_names, 'flavour')} = 'on';
mask_visibilities{ismember(mask_names, 'slot')} = 'on';
if strcmp(flavour,'cx4'), %CX4 mezzanine card for ROACH2 has only 3 (external) ports
mask_visibilities{ismember(mask_names, 'port_r2_cx4')} = 'on';
elseif strcmp(flavour, 'sfp+'), %SFP+ mezzanine card 4 external ports
mask_visibilities{ismember(mask_names, 'port_r2_sfpp')} = 'on';
end
else
mask_visibilities{ismember(mask_names, 'port_r1')} = 'on';
end
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
%these are visible if low level parameters enabled
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
if strcmp(show_param, 'on'),
%these are visible regardless of target hardware
mask_visibilities{ismember(mask_names, 'fab_en')} = 'on';
mask_visibilities{ismember(mask_names, 'fab_mac')} = 'on';
mask_visibilities{ismember(mask_names, 'fab_ip')} = 'on';
mask_visibilities{ismember(mask_names, 'fab_udp')} = 'on';
mask_visibilities{ismember(mask_names, 'fab_gate')} = 'on';
mask_visibilities{ismember(mask_names, 'cpu_rx_en')} = 'on';
mask_visibilities{ismember(mask_names, 'cpu_tx_en')} = 'on';
if strcmp(hw_sys,'ROACH2:sx475t'),
mask_visibilities{ismember(mask_names, 'pre_emph_r2')} = 'on';
mask_visibilities{ismember(mask_names, 'swing_r2')} = 'on';
mask_visibilities{ismember(mask_names, 'post_emph_r2')} = 'on';
mask_visibilities{ismember(mask_names, 'rxeqmix_r2')} = 'on';
mask_visibilities{ismember(mask_names, 'ttl')} = 'on';
mask_visibilities{ismember(mask_names, 'promisc_mode')} = 'on';
else
mask_visibilities{ismember(mask_names, 'pre_emph')} = 'on';
mask_visibilities{ismember(mask_names, 'swing')} = 'on';
end
end
% enable and make visible relevant parameters
set_param(blk, 'MaskVisibilities', mask_visibilities);
clog('exiting ten_gbe_v2_callback', 'trace');
|
github
|
mstrader/mlib_devel-master
|
add_port.m
|
.m
|
mlib_devel-master/xps_library/add_port.m
| 1,980 |
utf_8
|
e81ce344a2b90471d7aff121955a3963
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function old_ports = add_port(sys,old_ports,type,port_name, position)
if ~isfield(old_ports,port_name)
add_block(['built-in/',type],[sys,'/',port_name],'Position', position);
else
set_param([sys,'/',port_name],'Position', position);
old_ports = setfield(old_ports,port_name,1);
end
|
github
|
mstrader/mlib_devel-master
|
dram_mask.m
|
.m
|
mlib_devel-master/xps_library/dram_mask.m
| 6,948 |
utf_8
|
b93345b0b39bb21748b534157c647061
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function dram_mask(myname, wide_data)
set_param([myname,'/convert_data_in'], 'arith_type', get_param(myname,'arith_type'));
set_param([myname,'/convert_data_in'], 'bin_pt', num2str(get_param(myname,'bin_pt')));
set_param([myname,'/force_rd_dout'], 'arith_type', get_param(myname,'arith_type'));
set_param([myname,'/force_rd_dout'], 'bin_pt', num2str(get_param(myname,'bin_pt')));
%get hardware platform from XSG block
try
xsg_blk = find_system(bdroot, 'SearchDepth', 1,'FollowLinks','on','LookUnderMasks','all','Tag','xps:xsg');
hw_sys = xps_get_hw_plat(get_param(xsg_blk{1},'hw_sys'));
catch
warndlg('Count not find hardware platform for DRAM configuration - is there an XSG block in this model? Defaulting platform to ROACH.');
warning('Count not find hardware platform for DRAM configuration - is there an XSG block in this model? Defaulting platform to ROACH.');
hw_sys = 'ROACH';
end %try/catch
%TODO --> Add code to check whether the DRAM clock period (in ps) is an integer value, if this is not the case choose the next closest value
switch hw_sys
case 'ROACH'
if strcmp(get_param(myname, 'wide_data'), 'on')
set_param([myname,'/convert_data_in'],'n_bits', '288');
set_param([myname,'/convert_wr_be'], 'n_bits', '36');
else
set_param([myname,'/convert_data_in'],'n_bits', '144');
set_param([myname,'/convert_wr_be'], 'n_bits', '18');
end
case 'ROACH2'
set_param([myname,'/convert_data_in'],'n_bits', '288');
set_param([myname,'/convert_wr_be'], 'n_bits', '36');
%Change the bit widths of the DRAM simulation model for the ROACH-2
set_param([myname,'/dram_sim/cast_narrow'], 'n_bits', '288');
set_param([myname,'/dram_sim/cast_narrow1'], 'n_bits', '36');
set_param([myname,'/dram_sim/msbs'], 'nbits', '288');
set_param([myname,'/dram_sim/msbs'], 'bit0', '288');
set_param([myname,'/dram_sim/lsbs'], 'nbits', '288');
set_param([myname,'/dram_sim/memory/cast_narrow2'], 'n_bits', '576');
set_param([myname,'/dram_sim/memory/cast_narrow3'], 'n_bits', '576');
end
gateway_outs = find_system(myname,'searchdepth',1,'FollowLinks', 'on','lookundermasks','all','masktype','Xilinx Gateway Out Block');
for i =1:length(gateway_outs)
gw = gateway_outs{i};
if regexp(get_param(gw,'Name'),'(Mem_Rst)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Rst)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Cmd_Address)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Cmd_Address)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Wr_Din)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Wr_Din)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Wr_BE)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Wr_BE)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Cmd_RNW)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Cmd_RNW)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Cmd_Tag)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Cmd_Tag)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Cmd_Valid)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Cmd_Valid)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Rd_Ack)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Rd_Ack)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
else
error(['Unknown gateway name: ',gw]);
end
end
gateway_ins = find_system(myname,'searchdepth',1,'FollowLinks', 'on','lookundermasks','all','masktype','Xilinx Gateway In Block');
for i =1:length(gateway_ins)
gw = gateway_ins{i};
if regexp(get_param(gw,'Name'),'(Mem_Cmd_Ack)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Cmd_Ack)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Rd_Dout)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Rd_Dout)$','tokens');
if strcmp(get_param(myname,'wide_data'),'on') || strcmp(hw_sys,'ROACH2')
set_param(gw, 'n_bits', '288');
else
set_param(gw, 'n_bits', '144');
end
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Rd_Tag)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Rd_Tag)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(Mem_Rd_Valid)$')
toks = regexp(get_param(gw,'Name'),'(Mem_Rd_Valid)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
elseif regexp(get_param(gw,'Name'),'(phy_ready)$')
toks = regexp(get_param(gw,'Name'),'(phy_ready)$','tokens');
set_param(gw,'Name',clear_name([myname,'_',toks{1}{1}]));
else
error(['Unkown gateway name: ',gw]);
end
end
|
github
|
mstrader/mlib_devel-master
|
write_xps.m
|
.m
|
mlib_devel-master/xps_library/write_xps.m
| 5,261 |
utf_8
|
6d57bad54e2d1e8650d4f9c83ee2186b
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function write_xps(data, core_name, serial_port)
try
% open serial port
s = serial(serial_port);
set(s,'BaudRate',115200);
set(s,'InputBufferSize' ,127);
set(s,'OutputBufferSize',127);
set(s,'Timeout',3);
set(s,'ByteOrder','bigEndian');
fopen(s);
% send a request information to the iBOB
% special opcode
fwrite(s,uint8(129));
% block name
fwrite(s,uint8(core_name));
% zero string termination
fwrite(s,uint8(0));
% get the result code
request_result = fread(s, 1, 'uint8');
% get the result string
request_string = '';
c = fread(s,1,'uint8');
while c ~= 0
request_string = [request_string,char(c)];
c = fread(s,1,'uint8');
end
if request_result ~= 0
disp(['Error: ',request_string]);
fclose(s);
delete(s);
clear s;
return;
end
toks = regexp(request_string,'(\w+)', 'tokens');
type = toks{1};
type = type{1};
param = toks{5};
param = param{1};
address = toks{3};
address = address{1};
address = hex2dec(address(3:end));
if strcmp(type,'xps_bram')
size = str2num(param);
if length(data) ~= size || ~isinteger(data)
disp(['Input data is not of the right size or right type. Should be a Uint32 array of size ', num2str(size)]);
fclose(s);
delete(s);
clear s;
return;
end
i = 1;
while size > 0
if size > 31
block_size = 31;
else
block_size = size;
end
header(1) = uint8(128);
header(2) = uint8(128 + (block_size));
header(3) = uint8(mod(floor(address/(2^24)),2^8));
header(4) = uint8(mod(floor(address/(2^16)),2^8));
header(5) = uint8(mod(floor(address/(2^8 )),2^8));
header(6) = uint8(mod(floor(address/(2^0 )),2^8));
fwrite(s, header);
fprintf('.');
% Inject a snooze every few packets.
transfert_done = 0;
while transfert_done == 0
pause(0.01);
try
fwrite(s, data(i:(i+block_size-1)), 'uint32');
transfert_done = 1;
catch
% flood the ibob with dummy values to finish the
% previously aborted transfer
dummy_done = 0;
while dummy_done == 0
pause(0.01);
try
fwrite(s, zeros(1,31), 'uint32');
dummy_done = 1;
catch
disp('problem');
disp(lasterr);
end
end
end
end
size = size - block_size;
address = address + (block_size * 4);
i = i + block_size;
end
fprintf('\n');
elseif strcmp(type,'xps_sw_reg')
dir = param;
if strcmp(dir,'out')
disp(['Core "',core_name,'" is an OUTPUT register, and cannot be written.']);
fclose(s);
delete(s);
clear s;
return;
end
if length(data) ~= 1 || ~isinteger(data)
disp(['Input data is not of the right size or right type. Should be a single Uint32']);
fclose(s);
delete(s);
clear s;
return;
end
header(1) = uint8(128);
header(2) = uint8(128 + 1);
header(3) = uint8(mod(floor(address/(2^24)),2^8));
header(4) = uint8(mod(floor(address/(2^16)),2^8));
header(5) = uint8(mod(floor(address/(2^8 )),2^8));
header(6) = uint8(mod(floor(address/(2^0 )),2^8));
fwrite(s, header);
fwrite(s, data, 'uint32');
end
fclose(s);
delete(s);
clear s;
catch
fclose(s);
delete(s);
clear s;
disp(lasterr);
out = 0;
end
|
github
|
mstrader/mlib_devel-master
|
get.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc_mkid/get.m
| 1,964 |
utf_8
|
b339b0c993e6a4d4c7245ee5a81c130c
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function result = get(b,field)
try
eval(['result = b.',field,';']);
catch
try
result = get(b.xps_block,field);
catch
error(['Field name unknow to block object: ', field]);
end
end
|
github
|
mstrader/mlib_devel-master
|
drc.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc_mkid/drc.m
| 1,751 |
utf_8
|
805b22d398f2f8ef4c982d1cd1e67683
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [result,msg] = drc(blk_obj, xps_objs)
result = 0;
msg = '';
|
github
|
mstrader/mlib_devel-master
|
gen_ucf.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc_mkid/gen_ucf.m
| 2,924 |
utf_8
|
89a6841bb7cfff129da7b6ae1f5e67d7
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function str = gen_ucf(blk_obj)
str = '';
simulink_name = clear_name(get(blk_obj,'simulink_name'));
I_clk_p_str = ['adcmkid', blk_obj.adc_brd,'_DRDY_I_p'];
I_clk_n_str = ['adcmkid', blk_obj.adc_brd,'_DRDY_I_n'];
Q_clk_p_str = ['adcmkid', blk_obj.adc_brd,'_DRDY_Q_p'];
Q_clk_n_str = ['adcmkid', blk_obj.adc_brd,'_DRDY_Q_n'];
str = [str, 'NET ', I_clk_p_str, ' TNM_NET = ', I_clk_p_str, ';\n'];
str = [str, 'TIMESPEC TS_', I_clk_p_str, ' = PERIOD ', I_clk_p_str, ' ', num2str(2*1000/blk_obj.adc_clk_rate, '%3.3f'), ' ns;\n'];
str = [str, 'NET ', I_clk_n_str, ' TNM_NET = ', I_clk_n_str, ';\n'];
str = [str, 'TIMESPEC TS_', I_clk_n_str, ' = PERIOD ', I_clk_n_str, ' ', num2str(2*1000/blk_obj.adc_clk_rate, '%3.3f'), ' ns;\n'];
str = [str, '\n'];
str = [str, 'NET ', Q_clk_p_str, ' TNM_NET = ', Q_clk_p_str, ';\n'];
str = [str, 'TIMESPEC TS_', Q_clk_p_str, ' = PERIOD ', Q_clk_p_str, ' ', num2str(2*1000/blk_obj.adc_clk_rate, '%3.3f'), ' ns;\n'];
str = [str, 'NET ', Q_clk_n_str, ' TNM_NET = ', Q_clk_n_str, ';\n'];
str = [str, 'TIMESPEC TS_', Q_clk_n_str, ' = PERIOD ', Q_clk_n_str, ' ', num2str(2*1000/blk_obj.adc_clk_rate, '%3.3f'), ' ns;\n'];
str = [str, '\n'];
str = [str, gen_ucf(blk_obj.xps_block)];
end
|
github
|
mstrader/mlib_devel-master
|
set.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc_mkid/set.m
| 1,837 |
utf_8
|
36e88663abfc3840e2a2596d6628fb05
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function b = set(b,field,value)
try
eval(['b.',field,'=value;']);
catch
b.xps_block = set(b.xps_block,field,value);
end
|
github
|
mstrader/mlib_devel-master
|
xps_adc_mkid.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc_mkid/xps_adc_mkid.m
| 5,471 |
utf_8
|
667c046f4d1ffebc63ac4851b97ea4a6
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function b = xps_adc_mkid(blk_obj)
if ~isa(blk_obj,'xps_block')
error('xps_quadc class requires a xps_block class object');
end
if ~strcmp(get(blk_obj,'type'),'xps_adc_mkid')
error(['Wrong XPS block type: ',get(blk_obj,'type')]);
end
blk_name = get(blk_obj,'simulink_name');
xsg_obj = get(blk_obj,'xsg_obj');
s.hw_sys = get(xsg_obj,'hw_sys');
s.adc_brd = get_param(blk_name, 'adc_brd');
s.adc_str = ['adc', s.adc_brd];
s.adc_clk_rate = eval_param(blk_name,'adc_clk_rate');
s.clk_sys = get(xsg_obj,'clk_src');
b = class(s,'xps_adc_mkid',blk_obj);
% ip name & version
b = set(b,'ip_name','adc_mkid_interface');
b = set(b,'ip_version','1.00.a');
parameters.OUTPUT_CLK = '0';
if strfind(s.clk_sys,'adc')
parameters.OUTPUT_CLK = '1';
end
b = set(b,'parameters',parameters);
%%%%%%%%%%%%%%%%%
% external ports
%%%%%%%%%%%%%%%%%
ucf_constraints_clock = struct('IOSTANDARD', 'LVDS_25', 'DIFF_TERM', 'TRUE', 'PERIOD', [num2str(2*1000/s.adc_clk_rate),' ns']);
ucf_constraints_term = struct('IOSTANDARD', 'LVDS_25', 'DIFF_TERM', 'TRUE');
ucf_constraints_noterm = struct('IOSTANDARD', 'LVDS_25');
mhs_constraints = struct('SIGIS','CLK', 'CLK_FREQ',num2str(1e6*s.adc_clk_rate/2));
ext_ports.DRDY_I_p = {1 'in' ['adcmkid',s.adc_brd,'_DRDY_I_p'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_p{[20],:}}'] 'vector=false' mhs_constraints ucf_constraints_clock};
ext_ports.DRDY_I_n = {1 'in' ['adcmkid',s.adc_brd,'_DRDY_I_n'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_n{[20],:}}'] 'vector=false' mhs_constraints ucf_constraints_clock};
ext_ports.DRDY_Q_p = {1 'in' ['adcmkid',s.adc_brd,'_DRDY_Q_p'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_p{[40],:}}'] 'vector=false' mhs_constraints ucf_constraints_clock};
ext_ports.DRDY_Q_n = {1 'in' ['adcmkid',s.adc_brd,'_DRDY_Q_n'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_n{[40],:}}'] 'vector=false' mhs_constraints ucf_constraints_clock};
ext_ports.DI_p = {12 'in' ['adcmkid',s.adc_brd,'_DI_p'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_p{[17 37 7 27 26 36 25 35 16 15 6 5],:}}'] 'vector=true' struct() ucf_constraints_term};
ext_ports.DI_n = {12 'in' ['adcmkid',s.adc_brd,'_DI_n'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_n{[17 37 7 27 26 36 25 35 16 15 6 5],:}}'] 'vector=true' struct() ucf_constraints_term};
ext_ports.DQ_p = {12 'in' ['adcmkid',s.adc_brd,'_DQ_p'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_p{[13 33 3 23 22 32 21 31 12 11 2 1],:}}'] 'vector=true' struct() ucf_constraints_term};
ext_ports.DQ_n = {12 'in' ['adcmkid',s.adc_brd,'_DQ_n'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_n{[13 33 3 23 22 32 21 31 12 11 2 1],:}}'] 'vector=true' struct() ucf_constraints_term};
ext_ports.ADC_ext_in_p = {1 'in' ['adcmkid',s.adc_brd,'_ADC_ext_in_p'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_p{[29],:}}'] 'vector=false' struct() ucf_constraints_term};
ext_ports.ADC_ext_in_n = {1 'in' ['adcmkid',s.adc_brd,'_ADC_ext_in_n'] ['{',s.hw_sys,'.zdok',s.adc_brd,'_n{[29],:}}'] 'vector=false' struct() ucf_constraints_term};
b = set(b,'ext_ports',ext_ports);
%%%%%%%%%%%%%
% misc ports
%%%%%%%%%%%%%
misc_ports.fpga_clk = {1 'in' get(xsg_obj,'clk_src')};
if strfind(s.clk_sys,'adc')
misc_ports.adc_clk_out = {1 'out' [s.adc_str,'_clk']};
misc_ports.adc_clk90_out = {1 'out' [s.adc_str,'_clk90']};
misc_ports.adc_clk180_out = {1 'out' [s.adc_str,'_clk180']};
misc_ports.adc_clk270_out = {1 'out' [s.adc_str,'_clk270']};
end
misc_ports.adc_dcm_locked = {1 'out' [s.adc_str, '_dcm_locked']};
b = set(b,'misc_ports',misc_ports);
|
github
|
mstrader/mlib_devel-master
|
get.m
|
.m
|
mlib_devel-master/xps_library/@xps_dac_mkid_4x/get.m
| 1,964 |
utf_8
|
b339b0c993e6a4d4c7245ee5a81c130c
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function result = get(b,field)
try
eval(['result = b.',field,';']);
catch
try
result = get(b.xps_block,field);
catch
error(['Field name unknow to block object: ', field]);
end
end
|
github
|
mstrader/mlib_devel-master
|
drc.m
|
.m
|
mlib_devel-master/xps_library/@xps_dac_mkid_4x/drc.m
| 2,992 |
utf_8
|
3ab77bfce809915097a39d56418ecd9a
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [result,msg] = drc(blk_obj, xps_objs)
result = 0;
msg = '';
for i=1:length(xps_objs)
try
if strcmp(get(blk_obj,'hw_dac'), get(xps_objs{i},'hw_dac'))
if ~strcmp(get(blk_obj, 'simulink_name'), get(xps_objs{i},'simulink_name'))
msg = ['DAC ', get(blk_obj, 'simulink_name'),' and DAC ', get(xps_objs{i}, 'simulink_name'), ' are using the same connector.'];
result = 1;
end
end
end
try
if strcmp(get(blk_obj,'type'),'xps_dac') && strcmp(get(xps_objs{i},'type'), 'xps_adc')
if (strcmp(get(blk_obj,'hw_dac'),'dac0') && strcmp(get(xps_objs{i},'hw_adc'),'adc0')) || (strcmp(get(blk_obj,'hw_dac'),'dac1') && strcmp(get(xps_objs{i},'hw_adc'),'adc1'))
msg = ['DAC ', get(blk_obj,'simulink_name'), ' and ADC ', get(xps_objs{i},'simulink_name'),' are located on the same Z-DOK connector.'];
result = 1;
end
end
end
try
if strcmp(get(blk_obj,'type'),'xps_dac') && strcmp(get(xps_objs{i},'type'), 'xps_vsi')
if strcmp(get(blk_obj,'hw_dac'),'dac1') && strcmp(get(xps_objs{i},'hw_vsi'),'ZDOK 1')
msg = ['DAC ', get(blk_obj,'simulink_name'), ' and VSI ', get(xps_objs{i},'simulink_name'),' are located on the same Z-DOK connector.'];
result = 1;
end
end
end
end
|
github
|
mstrader/mlib_devel-master
|
set.m
|
.m
|
mlib_devel-master/xps_library/@xps_dac_mkid_4x/set.m
| 1,837 |
utf_8
|
36e88663abfc3840e2a2596d6628fb05
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function b = set(b,field,value)
try
eval(['b.',field,'=value;']);
catch
b.xps_block = set(b.xps_block,field,value);
end
|
github
|
mstrader/mlib_devel-master
|
xps_dac_mkid_4x.m
|
.m
|
mlib_devel-master/xps_library/@xps_dac_mkid_4x/xps_dac_mkid_4x.m
| 8,196 |
utf_8
|
1044bffb3420afff6aadb14ea45d1f8f
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function b = xps_dac_mkid_4x(blk_obj)
if ~isa(blk_obj,'xps_block')
error('XPS_DAC_MKID class requires a xps_block class object');
end
if ~strcmp(get(blk_obj,'type'),'xps_dac_mkid_4x')
error(['Wrong XPS block type: ',get(blk_obj,'type')]);
end
blk_name = get(blk_obj,'simulink_name');
xsg_obj = get(blk_obj,'xsg_obj');
% s.hw_dac = 'dac0' or 'dac1' as specified by the user in the yellow
% block.
s.hw_sys = get(xsg_obj,'hw_sys');
s.dac_brd = get_param(blk_name, 'dac_brd');
s.dac_str = ['dac', s.dac_brd];
% The clock coming from the zdok to the fpga is reduced by a physical
% circuit on the DAC_MKID board to half of the rate of the external
% clock provided by the user. The external clock rate is provided by
% the user (in MHz) on the dac_mkid yellow block. The clock period
% will be used in units of 1/GHz.
s.dac_clk_rate = eval_param(blk_name,'dac_clk_rate')/2;
dac_clk_period = 1000/s.dac_clk_rate;
% get name fpga clock source
s.clk_sys = get(xsg_obj,'clk_src');
b = class(s,'xps_dac_mkid_4x',blk_obj);
b = set(b,'ip_name','dac_mkid_4x_interface');
b = set(b, 'ip_version', '1.01.a');
parameters.OUTPUT_CLK = '0';
if strfind(s.clk_sys,'dac')
parameters.OUTPUT_CLK = '1';
end
b = set(b,'parameters',parameters);
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% external ports
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% Collection of parameters used to define ports.
ucf_constraints_clk = struct('IOSTANDARD', 'LVDS_25', 'DIFF_TERM', 'TRUE', 'PERIOD', [num2str(dac_clk_period),' ns']);
ucf_constraints = struct('IOSTANDARD', 'LVDS_25', 'DIFF_TERM', 'TRUE');
mhs_constraints_clk = struct('SIGIS','CLK', 'CLK_FREQ',num2str(1e6*s.dac_clk_rate));
% The system clock for the FPGA fabric is generated from the CLK_to_FPGA
% pins on the zdok from the MKID DAC. Reminder: s.dac_str = dac0 or
% dac1.
ext_ports.dac_clk_p = {1 'in' [s.dac_str,'_clk_p'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_p{[40],:}}'] 'vector=false' mhs_constraints_clk ucf_constraints_clk};
ext_ports.dac_clk_n = {1 'in' [s.dac_str,'_clk_n'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_n{[40],:}}'] 'vector=false' mhs_constraints_clk ucf_constraints_clk};
% DCLK is used to clock out data to the DAC.
ext_ports.dac_smpl_clk_i_p = {1 'out' [s.dac_str,'_smpl_clk_i_p'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_p{[30],:}}'] 'vector=false' struct() ucf_constraints};
ext_ports.dac_smpl_clk_i_n = {1 'out' [s.dac_str,'_smpl_clk_i_n'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_n{[30],:}}'] 'vector=false' struct() ucf_constraints};
ext_ports.dac_smpl_clk_q_p = {1 'out' [s.dac_str,'_smpl_clk_q_p'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_p{[29],:}}'] 'vector=false' struct() ucf_constraints};
ext_ports.dac_smpl_clk_q_n = {1 'out' [s.dac_str,'_smpl_clk_q_n'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_n{[29],:}}'] 'vector=false' struct() ucf_constraints};
% I and Q output.
ext_ports.dac_data_i_p = {16 'out' [s.dac_str,'_data_i_p'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_p{[26 15 35 5 25 16 36 6 37 17 27 7 18 38 8 28],:}}'] 'vector=true' struct() ucf_constraints};
ext_ports.dac_data_i_n = {16 'out' [s.dac_str,'_data_i_n'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_n{[26 15 35 5 25 16 36 6 37 17 27 7 18 38 8 28],:}}'] 'vector=true' struct() ucf_constraints};
ext_ports.dac_data_q_p = {16 'out' [s.dac_str,'_data_q_p'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_p{[22 11 31 1 21 12 32 2 33 13 23 3 14 34 4 24],:}}'] 'vector=true' struct() ucf_constraints};
ext_ports.dac_data_q_n = {16 'out' [s.dac_str,'_data_q_n'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_n{[22 11 31 1 21 12 32 2 33 13 23 3 14 34 4 24],:}}'] 'vector=true' struct() ucf_constraints};
% When dac_sync is high, dac output is enabled.
ext_ports.dac_sync_i_p = {1 'out' [s.dac_str,'_sync_i_p'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_p{[39],:}}'] 'vector=false' struct() ucf_constraints};
ext_ports.dac_sync_i_n = {1 'out' [s.dac_str,'_sync_i_n'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_n{[39],:}}'] 'vector=false' struct() ucf_constraints};
ext_ports.dac_sync_q_p = {1 'out' [s.dac_str,'_sync_q_p'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_p{[20],:}}'] 'vector=false' struct() ucf_constraints};
ext_ports.dac_sync_q_n = {1 'out' [s.dac_str,'_sync_q_n'] ['{',s.hw_sys,'.zdok',s.dac_brd,'_n{[20],:}}'] 'vector=false' struct() ucf_constraints};
% Serial data enabled on low, which is why it's controlled by a not
% sdenb.
ext_ports.dac_not_sdenb_i = {1 'out' [s.dac_str,'_not_sdenb_i'] ['{',s.hw_sys,'.zdok',s.dac_brd,'{[18],:}}'] 'vector=false' struct() struct()};
ext_ports.dac_not_sdenb_q = {1 'out' [s.dac_str,'_not_sdenb_q'] ['{',s.hw_sys,'.zdok',s.dac_brd,'{[19],:}}'] 'vector=false' struct() struct()};
% SCLK is the clock used to write data to the DAC for configuration.
ext_ports.dac_sclk = {1 'out' [s.dac_str,'_sclk'] ['{',s.hw_sys,'.zdok',s.dac_brd,'{[17],:}}'] 'vector=false' struct() struct()};
% Each dac chip is wired for 4-wire interface, with only the input
% available on the zdok.
ext_ports.dac_sdi = {1 'out' [s.dac_str,'_sdi'] ['{',s.hw_sys,'.zdok',s.dac_brd,'{[37],:}}'] 'vector=false' struct() struct()};
% Resets the dac when low.
ext_ports.dac_not_reset = {1 'out' [s.dac_str,'_not_reset'] ['{',s.hw_sys,'.zdok',s.dac_brd,'{[38],:}}'] 'vector=false' struct() struct()};
% This is mapped to a circuit on the board, and not on the chips
% themselves. If dac_phase is low, both dac chips are in phase.
%ext_ports.dac_phase = {1 'in' [s.dac_str,'_pase'] '{ROACH.zdok0{[20],:}}' 'vector=false' struct() struct()};
b = set(b, 'ext_ports', ext_ports);
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% misc ports
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
misc_ports.dac_dcm_locked = {1 'out' [s.dac_str, '_dcm_locked']};
if strfind(s.clk_sys,'dac')
misc_ports.dac_clk_out = {1 'out' [s.dac_str,'_clk']};
misc_ports.dac_clk90_out = {1 'out' [s.dac_str,'_clk90']};
misc_ports.dac_clk180_out = {1 'out' [s.dac_str,'_clk180']};
misc_ports.dac_clk270_out = {1 'out' [s.dac_str,'_clk270']};
else
misc_ports.fpga_clk = {1 'in' get(xsg_obj,'clk_src')};
end
b = set(b,'misc_ports',misc_ports);
|
github
|
mstrader/mlib_devel-master
|
get.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc5g/get.m
| 1,964 |
utf_8
|
b339b0c993e6a4d4c7245ee5a81c130c
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function result = get(b,field)
try
eval(['result = b.',field,';']);
catch
try
result = get(b.xps_block,field);
catch
error(['Field name unknow to block object: ', field]);
end
end
|
github
|
mstrader/mlib_devel-master
|
drc.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc5g/drc.m
| 2,120 |
utf_8
|
82e2ccc1d1128259537cf26f2bbaa9e0
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [result,msg] = drc(blk_obj, xps_objs)
result = 0;
msg = '';
for i=1:length(xps_objs)
try
if strcmp(get(blk_obj,'hw_adc'),get(xps_objs{i},'hw_adc'))
if ~strcmp(get(blk_obj,'simulink_name'),get(xps_objs{i},'simulink_name'))
msg = ['ADC ',get(blk_obj,'simulink_name'),' and ADC ',get(xps_objs{i},'simulink_name'),' are located on the same port.'];
result = 1;
end
end
end
end
|
github
|
mstrader/mlib_devel-master
|
gen_ucf.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc5g/gen_ucf.m
| 6,578 |
utf_8
|
7815d35e50045bf09ca4a1b823a6931a
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function str = gen_ucf(blk_obj)
hw_sys = blk_obj.hw_sys;
blk_name = get(blk_obj,'simulink_name');
% Get some parameters we're intereset in
simulink_name = clear_name(get(blk_obj,'simulink_name'));
adc_per = 1e6/(blk_obj.adc_clk_rate);
str = gen_ucf(blk_obj.xps_block);
adc_str = blk_obj.adc_str;
demux = blk_obj.demux;
% Load the routes file
load_hw_routes();
% Set the ADC clock setup/hold constraints
%str = [str, 'NET "', adc_str, 'clk_p" TNM_NET = "', adc_str, '_clk";\n'];
%str = [str, 'TIMESPEC "TS_', adc_str, '_clk" = PERIOD "', ...
% adc_str, '_clk" ', num2str(adc_per), ' ps HIGH 50%%;\n'];
%str = [str, 'OFFSET = IN 400 ps VALID ', num2str(adc_per/2), ...
% ' ps BEFORE "', adc_str, 'clk_p" RISING;\n'];
%str = [str, 'OFFSET = IN 400 ps VALID ', num2str(adc_per/2), ...
% ' ps BEFORE "', adc_str, 'clk_p" FALLING;\n'];
switch hw_sys
case 'ROACH'
% pass
case 'ROACH2'
if blk_obj.use_adc0
% Manually place the BUFR components
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/DIVBUF" LOC = BUFR_X1Y11 ;\n'];
if exist('routes_vers')
switch demux
% Create an area group to place the FD close to the IOPAD
% which for some reason was traced to the other side of the
% chip on ROACH2
case '1:2'
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/fifo_din_33" AREA_GROUP = IDDR_1 ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/fifo_din_41" AREA_GROUP = IDDR_1 ;\n'];
str = [str, 'AREA_GROUP "IDDR_1" RANGE = ', ...
'SLICE_X0Y279:SLICE_X23Y321 ;\n'];
case '1:1'
% First the trouble-some bunch...
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[1].D1?_1" AREA_GROUP = ZDOK_0_1_1 ;\n'];
str = [str, 'AREA_GROUP "ZDOK_0_1_1" RANGE = ', ...
'SLICE_X0Y300:SLICE_X27Y320 ;\n'];
% And then the rest...
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[0].D*_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[1].D0?_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[1].D2?_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[1].D3?_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[2].D*_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[3].D*_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[4].D*_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[5].D*_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[6].D*_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[7].D*_1" AREA_GROUP = ZDOK_0_REST ;\n'];
str = [str, 'AREA_GROUP "ZDOK_0_REST" RANGE = ', ...
'SLICE_X76Y220:SLICE_X87Y259 ;\n'];
otherwise
% pass
end
else
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[?].D??_1" AREA_GROUP = ZDOK_0_ALL ;\n'];
str = [str, 'AREA_GROUP "ZDOK_0_ALL" RANGE = ', ...
'SLICE_X76Y220:SLICE_X87Y259 ;\n'];
end
elseif blk_obj.use_adc1
% Manually place the BUFR components
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/DIVBUF" LOC = BUFR_X1Y9 ;\n'];
% This is for ZDOK1, we need to place the first buffers
% close to the I/O pads to help timing
str = [str, 'INST "', simulink_name, '/', simulink_name, ...
'/data_buf[?].D??_1" AREA_GROUP = ZDOK_1_ALL ;\n'];
str = [str, 'AREA_GROUP "ZDOK_1_ALL" RANGE = ', ...
'SLICE_X0Y270:SLICE_X11Y309 ;\n'];
end
otherwise
% pass
end
|
github
|
mstrader/mlib_devel-master
|
set.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc5g/set.m
| 1,837 |
utf_8
|
36e88663abfc3840e2a2596d6628fb05
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function b = set(b,field,value)
try
eval(['b.',field,'=value;']);
catch
b.xps_block = set(b.xps_block,field,value);
end
|
github
|
mstrader/mlib_devel-master
|
get.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc083000x2/get.m
| 1,964 |
utf_8
|
b339b0c993e6a4d4c7245ee5a81c130c
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function result = get(b,field)
try
eval(['result = b.',field,';']);
catch
try
result = get(b.xps_block,field);
catch
error(['Field name unknow to block object: ', field]);
end
end
|
github
|
mstrader/mlib_devel-master
|
drc.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc083000x2/drc.m
| 2,118 |
utf_8
|
60145324772f7335c69b7970ae3e68e3
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function [result,msg] = drc(blk_obj, xps_objs)
result = 0;
msg = '';
for i=1:length(xps_objs)
try
if strcmp(get(blk_obj,'hw_adc'),get(xps_objs{i},'hw_adc'))
if ~strcmp(get(blk_obj,'simulink_name'),get(xps_objs{i},'simulink_name'))
msg = ['ADC ',get(blk_obj,'simulink_name'),' and ADC ',get(xps_objs{i},'simulink_name'),' are located on the same port.'];
result = 1;
end
end
end
end
|
github
|
mstrader/mlib_devel-master
|
gen_ucf.m
|
.m
|
mlib_devel-master/xps_library/@xps_adc083000x2/gen_ucf.m
| 25,126 |
utf_8
|
655f8863445950ebfad48f56d7f1e373
|
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
% %
% Center for Astronomy Signal Processing and Electronics Research %
% http://seti.ssl.berkeley.edu/casper/ %
% Copyright (C) 2006 University of California, Berkeley %
% %
% This program is free software; you can redistribute it and/or modify %
% it under the terms of the GNU General Public License as published by %
% the Free Software Foundation; either version 2 of the License, or %
% (at your option) any later version. %
% %
% This program is distributed in the hope that it will be useful, %
% but WITHOUT ANY WARRANTY; without even the implied warranty of %
% MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the %
% GNU General Public License for more details. %
% %
% You should have received a copy of the GNU General Public License along %
% with this program; if not, write to the Free Software Foundation, Inc., %
% 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. %
% %
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
function str = gen_ucf(blk_obj)
disp('adc086000 gen_ucf')
hw_sys = blk_obj.hw_sys;
adc_str = blk_obj.adc_str;
disp('adc086000 trying generic ucf generation')
str = gen_ucf(blk_obj.xps_block);
simulink_name = clear_name(get(blk_obj,'simulink_name'));
disp('adc08600 trying specific ucf generation')
switch hw_sys
case 'ROACH'
switch adc_str
case 'adc0'
% str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_sync" MAXDELAY = 1ns;\n'];
% end case 'adc0'
case 'adc1'
% str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_sync" MAXDELAY = 1ns;\n'];
% end case 'adc1'
end % switch adc_str
case 'iBOB'
switch adc_str
case 'adc0'
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_clk_buf" PERIOD = ',num2str(1000/blk_obj.adc_clk_rate*4),'ns;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_clk_buf" MAXDELAY = 452ps;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_clk_dcm" MAXDELAY = 853ps;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_clk90_dcm" MAXDELAY = 853ps;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/CLK_CLKBUF" LOC = BUFGMUX1P;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/CLK90_CLKBUF" LOC = BUFGMUX3P;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/CLKSHIFT_DCM" LOC = DCM_X2Y1;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/CLKSHIFT_DCM" CLKOUT_PHASE_SHIFT = VARIABLE;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_sync" MAXDELAY = 323ps;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_sync" ROUTE = "{3;1;2vp50ff1152;46c47c12!-1;156520;5632;S!0;-159;0!1;-1884;-1248!1;-1884;744!2;-1548;992!2;-1548;304!3;-1548;-656!3;-1548;-1344!4;327;0;L!5;167;0;L!6;327;0;L!7;167;0;L!}";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_sync_ddr_3" LOC = SLICE_X139Y91;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_sync_ddr_2" LOC = SLICE_X138Y91;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_sync_ddr_1" LOC = SLICE_X139Y90;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_sync_ddr_0" LOC = SLICE_X138Y90;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_0" LOC = "SLICE_X138Y128" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_1" LOC = "SLICE_X138Y126" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_2" LOC = "SLICE_X139Y122" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_3" LOC = "SLICE_X138Y120" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_4" LOC = "SLICE_X138Y102" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_5" LOC = "SLICE_X139Y98" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_6" LOC = "SLICE_X138Y96" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_7" LOC = "SLICE_X138Y94" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_8" LOC = "SLICE_X139Y126" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_9" LOC = "SLICE_X138Y124" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_10" LOC = "SLICE_X138Y122" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_11" LOC = "SLICE_X139Y118" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_12" LOC = "SLICE_X138Y100" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_13" LOC = "SLICE_X138Y98" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_14" LOC = "SLICE_X139Y94" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_15" LOC = "SLICE_X138Y92" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_16" LOC = "SLICE_X138Y128" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_17" LOC = "SLICE_X138Y126" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_18" LOC = "SLICE_X139Y122" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_19" LOC = "SLICE_X138Y120" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_20" LOC = "SLICE_X138Y102" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_21" LOC = "SLICE_X139Y98" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_22" LOC = "SLICE_X138Y96" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_23" LOC = "SLICE_X138Y94" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_24" LOC = "SLICE_X139Y126" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_25" LOC = "SLICE_X138Y124" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_26" LOC = "SLICE_X138Y122" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_27" LOC = "SLICE_X139Y118" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_28" LOC = "SLICE_X138Y100" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_29" LOC = "SLICE_X138Y98" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_30" LOC = "SLICE_X139Y94" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_31" LOC = "SLICE_X138Y92" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_0" LOC = "SLICE_X138Y132" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_1" LOC = "SLICE_X139Y134" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_2" LOC = "SLICE_X138Y170" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_3" LOC = "SLICE_X138Y172" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_4" LOC = "SLICE_X139Y106" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_5" LOC = "SLICE_X138Y110" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_6" LOC = "SLICE_X138Y112" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_7" LOC = "SLICE_X139Y114" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_8" LOC = "SLICE_X138Y134" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_9" LOC = "SLICE_X138Y168" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_10" LOC = "SLICE_X139Y170" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_11" LOC = "SLICE_X138Y174" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_12" LOC = "SLICE_X138Y108" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_13" LOC = "SLICE_X139Y110" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_14" LOC = "SLICE_X138Y114" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_15" LOC = "SLICE_X138Y116" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_16" LOC = "SLICE_X138Y132" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_17" LOC = "SLICE_X139Y134" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_18" LOC = "SLICE_X138Y170" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_19" LOC = "SLICE_X138Y172" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_20" LOC = "SLICE_X139Y106" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_21" LOC = "SLICE_X138Y110" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_22" LOC = "SLICE_X138Y112" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_23" LOC = "SLICE_X139Y114" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_24" LOC = "SLICE_X138Y134" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_25" LOC = "SLICE_X138Y168" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_26" LOC = "SLICE_X139Y170" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_27" LOC = "SLICE_X138Y174" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_28" LOC = "SLICE_X138Y108" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_29" LOC = "SLICE_X139Y110" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_30" LOC = "SLICE_X138Y114" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_31" LOC = "SLICE_X138Y116" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_outofrangei_recapture_0" LOC = "SLICE_X138Y118" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_outofrangei_recapture_1" LOC = "SLICE_X138Y118" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_outofrangeq_recapture_0" LOC = "SLICE_X138Y104" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_outofrangeq_recapture_1" LOC = "SLICE_X138Y104" | BEL = "FFY";\n'];
% end case 'adc0'
case 'adc1'
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_clk_buf" PERIOD = ',num2str(1000/blk_obj.adc_clk_rate*4),'ns;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_clk_buf" MAXDELAY = 452ps;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_clk_dcm" MAXDELAY = 854ps;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_clk90_dcm" MAXDELAY = 854ps;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/CLK_CLKBUF" LOC = BUFGMUX0P;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/CLK90_CLKBUF" LOC = BUFGMUX2P;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/CLKSHIFT_DCM" LOC = DCM_X2Y0;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/CLKSHIFT_DCM" CLKOUT_PHASE_SHIFT = VARIABLE;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_sync" MAXDELAY = 323ps;\n'];
str = [str, 'NET "',simulink_name,'/',simulink_name,'/adc_sync" ROUTE = "{3;1;2vp50ff1152;6b4b9e45!-1;156520;-144648;S!0;-159;0!1;-1884;-1248!1;-1884;744!2;-1548;992!2;-1548;304!3;-1548;-656!3;-1548;-1344!4;327;0;L!5;167;0;L!6;327;0;L!7;167;0;L!}";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_sync_ddr_3" LOC = SLICE_X139Y3;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_sync_ddr_2" LOC = SLICE_X138Y3;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_sync_ddr_1" LOC = SLICE_X139Y2;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_sync_ddr_0" LOC = SLICE_X138Y2;\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_0" LOC = "SLICE_X139Y70" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_1" LOC = "SLICE_X138Y68" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_2" LOC = "SLICE_X139Y64" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_3" LOC = "SLICE_X139Y62" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_4" LOC = "SLICE_X139Y44" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_5" LOC = "SLICE_X139Y42" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_6" LOC = "SLICE_X138Y40" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_7" LOC = "SLICE_X139Y4" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_8" LOC = "SLICE_X139Y68" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_9" LOC = "SLICE_X139Y66" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_10" LOC = "SLICE_X138Y64" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_11" LOC = "SLICE_X139Y60" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_12" LOC = "SLICE_X138Y44" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_13" LOC = "SLICE_X139Y40" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_14" LOC = "SLICE_X139Y6" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_15" LOC = "SLICE_X138Y4" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_16" LOC = "SLICE_X139Y70" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_17" LOC = "SLICE_X138Y68" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_18" LOC = "SLICE_X139Y64" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_19" LOC = "SLICE_X139Y62" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_20" LOC = "SLICE_X139Y44" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_21" LOC = "SLICE_X139Y42" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_22" LOC = "SLICE_X138Y40" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_23" LOC = "SLICE_X139Y4" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_24" LOC = "SLICE_X139Y68" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_25" LOC = "SLICE_X139Y66" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_26" LOC = "SLICE_X138Y64" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_27" LOC = "SLICE_X139Y60" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_28" LOC = "SLICE_X138Y44" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_29" LOC = "SLICE_X139Y40" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_30" LOC = "SLICE_X139Y6" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_datai_recapture_31" LOC = "SLICE_X138Y4" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_0" LOC = "SLICE_X139Y74" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_1" LOC = "SLICE_X139Y78" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_2" LOC = "SLICE_X139Y80" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_3" LOC = "SLICE_X138Y84" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_4" LOC = "SLICE_X139Y48" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_5" LOC = "SLICE_X138Y52" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_6" LOC = "SLICE_X139Y54" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_7" LOC = "SLICE_X139Y56" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_8" LOC = "SLICE_X138Y76" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_9" LOC = "SLICE_X138Y80" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_10" LOC = "SLICE_X139Y82" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_11" LOC = "SLICE_X139Y84" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_12" LOC = "SLICE_X139Y50" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_13" LOC = "SLICE_X139Y52" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_14" LOC = "SLICE_X138Y56" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_15" LOC = "SLICE_X139Y58" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_16" LOC = "SLICE_X139Y74" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_17" LOC = "SLICE_X139Y78" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_18" LOC = "SLICE_X139Y80" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_19" LOC = "SLICE_X138Y84" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_20" LOC = "SLICE_X139Y48" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_21" LOC = "SLICE_X138Y52" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_22" LOC = "SLICE_X139Y54" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_23" LOC = "SLICE_X139Y56" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_24" LOC = "SLICE_X138Y76" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_25" LOC = "SLICE_X138Y80" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_26" LOC = "SLICE_X139Y82" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_27" LOC = "SLICE_X139Y84" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_28" LOC = "SLICE_X139Y50" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_29" LOC = "SLICE_X139Y52" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_30" LOC = "SLICE_X138Y56" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_dataq_recapture_31" LOC = "SLICE_X139Y58" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_outofrangei_recapture_0" LOC = "SLICE_X138Y60" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_outofrangei_recapture_1" LOC = "SLICE_X138Y60" | BEL = "FFY";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_outofrangeq_recapture_0" LOC = "SLICE_X138Y48" | BEL = "FFX";\n'];
str = [str, 'INST "',simulink_name,'/',simulink_name,'/adc_outofrangeq_recapture_1" LOC = "SLICE_X138Y48" | BEL = "FFY";\n'];
% end case 'adc1'
end % switch adc_str
% end case 'iBOB'
end % switch hw_sys
|
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.