text
stringlengths 83
79.5k
|
|---|
H: Logic Level Converter not converting low logic level as expected?
I'm trying to convert 1.5V logic levels from a caliper data port to 3.3v to be able to read it with a microcontroller, using one of the sparkfun logic level converters. The product page mentions it can be used for 1.8V logic levels, so I was hoping 1.5V would work as well.
When I look at the waveform generated on the HV side, the high logic level is at the expected voltage, but the low logic level is much higher than expected, and I'm not sure why.
Interestingly, if I connect the LV side directly to the ground and 1.5V from the caliper's data port, the HV side shows 0V and 3.3V as expected
I have it hooked up like so. Note: the probe was actually connected to the CLK pin on both sides (LV2/HV2), not the data pin as shown. Although I got similar results when looking at the data signal.
And here are the traces from the LV side and the HV side.
(LV)
(HV)
I eventually got it working by using a rail-to-rail opamp instead, since I only need unidirectional conversion, but I'd like to understand why I was seeing unexpected results with this. And why connecting the LV side directly to ground produced different results than the low logic level from the clock/data pins.
My best guess is that maybe the clock/data pins from the caliper are unable to sink much current when in a low logic level state?
AI: If level converter works when you directly connect LV input to GND or 1.5V and does not work from DATA/CLK pins then it means logic levels on those outputs do not have enough swing to switch the FET. Or maybe do not have enough sink capability.
One possible workaround is to reduce pull-up strength on that adapter board from 10K to 22K or more (on LV side only).
However more reliable solution would be to use different level shifter, something that does not depend on Vgs of the MOSFET and has high input impedance. Like PCA9306 for example.
|
H: Understanding the Practical Application of a Simple Antenna made from Coax
I am here today to gain a deeper understanding of the fundamentals of using antennas in RC applications. I am trying to understand what exactly is going on with a particular 2.4GHz receiver a picture of which is attached.
It's somewhat difficult to see, but these are 2 small coax wires soldered to the board with the center conductors soldered to pads separate from the shielding (obviously) which I assume is just grounded. So I have 2 questions:
Would these 2 wires be 2 separate antennas or 2 halves of a single dipole?
In what way does the shielding effect the antenna? Specifically, if you were to cut the wire down (significantly changing the overall length of wire) but strip away shielding such that the exposed length of center conductor is unchanged, how would this effect the performance of the antenna?
AI: What these two do, whether they just form a dipole together, or are two separate monopoles (with bad ground) is impossible to tell based on the info we have.
I find it less likely they form a dipole.
Maybe there's just one receive and one transmit antenna, to save on a directional coupler or antenna switch.
Maybe these antennas are there for diversity reasons – for example, to decrease the likelihood that all antennas you have are subject to fading, you just use more antennas. \$P(\text{all antennas faded}) < P(\text{at least one antenna is OK})\$
In what way does the shielding effect the antenna?
I'll nitpick on your terminology for a second, because it makes a difference later:
That's not primarily a "shield", that's the outer conductor of the coax cable, and just as important as the center conductor at transporting energy. (In fact, you can have a hollow waveguide without the center conductor.)
Together with the center conductor and the dielectric material, it forms a waveguide.
Specifically, if you were to cut the wire down (significantly changing the overall length of wire) but strip away shielding such that the exposed length of center conductor is unchanged, how would this effect the performance of the antenna?
Impossible to tell. The coax might be somewhere between impedance of the trace on the PCB and the monopole feedpoint impedance, and act as e.g. a \$\frac\lambda4\$ impedance transformer. In that case, the length of the isolated part is critical.
Maybe it's just a best-effort matched transmission line, and changing the length of it doesn't affect the impedance.
But: in my theory (two separate monopoles), these antennas are separate for a reason (typically, diversity to increase robustness or speed of transmission); making their leads shorter would put the antennas closer together, which would have negative effects on channel independence, and hence, on performance.
|
H: Show bus concatenation in schematic
How would you go about showing the concatenation of two buses in a schematic (preferably KiCad or Eagle).
For example suppose a component has z as an input, where z is 32-bit. Suppose z is fed by a concatenation of bus signal x which is 16-bit, and bus signal y which is 16-bit.
How would you draw signals x, y, and z in the schematic?
AI: In KiCad, you denote a bus-bus connection with a junction dot like this:
Here, the numeric suffixes denote which members are connected. PCA0 and ADR0 are connected. PCA5, ADR5 and BUS5 are also connected. NOTE: PCA11 - PCA15 are not connected in this diagram.
See KiCad Eeschema Documentation for more details.
Edit to include mechanism for joining non-identical bus suffixes
Suppose you want to concatenate two buses A[0..7] and B[0..7] with the larger bus C[0..15]. The following image illustrates how you might approach this:
Here, we create elements for B that did not previously exist. Once they exist, you can join A[0..7] to B[8..15] and C[0..15] to get a bus concatenation.
|
H: KiCad - Bus width indicator
How do you indicate the width of a bus in KiCad? Is there an equivalent to the "slash accompanied by a number" symbol typically used?
For example, as used in this image:
AI: In KiCad, the bus width is given by the [] square bracket numbers. The bus name ADR[0..15] denotes a bus with 16 members ADR0 through ADR15.
Details are given in KiCad Eeschema documentation.
|
H: removing wire from through-holes
I'm currently attempting to mod my snes jr for rgb output. This requires me to solder some ribbon wire into 4 through holes. I did this once but I (stupidly) made the wire too short and had to remove it using solder wick. I must have done this incorrectly because now the through holes have a few tiny bits of wire in them and I am unable to insert a new wire (I apologize if the picture is low quality it was taken with a cell phone). What soldering/desoldering techniques would one use to clear out these through holes? I have most common soldering tools outside of a desoldering station (I just have a self-heating pump).
Worst case scenario, is there anywhere I could send this to be finished off by someone who's better at soldering? Thanks.
AI: Heat with a soldering iron and use a stainless steel pick or needle with pliers to push through the remains out of the way.
Or add more solder and use a desoldering pump. The extra solder will help bring the wire strands with it.
|
H: Can I drive a Low-Side MOSFET from a High-Side Driver?
I'm working on a power electronics project where it involves driving 4 different MOSFETs, (3 HighSide and 1 LowSide). Rather than using a different IC for the LowSide driver, I am thinking about using 4 HighSide drivers to drive all the MOSFETs.
I wonder it would have any negative impacts on the circuit as would it damage the LowSide-MOSFET?
It kinda feels to me like that the HighSide driver has a higher part count to support bootstrapping when the LowSide driver needs much less and that's why a LowSide driver is appropriate for a LowSide MOSFET. Also I kinda observed that LowSide drivers are a bit cheaper than HighSide drivers. Are those really the reasons why a LowSide driver is preferred for a LowSide MOSFET?
AI: Yes, you can use the LTC7004 for driving a low-side switch.
Turn to the diagram of the output stage in the LTC7004 datasheet (fig.1). Connect the TS pin to GND. (The source of the low side N-channel MOSFET is also connected to GND.) Connect the BST to the gate driving voltage. Add a capacitor from BST to GND. Place the capacitor near the BST pin.
Interestingly, the LTC7004 has got an internal charge pump which can generate a +12V gate drive voltage from the Vcc. If you want to create, the gate drive voltage with the internal charge pump, then don't connect BST to an external gate drive voltage. Keep the capacitor between BST and GND.
|
H: Stm32 RTC wakeup from standby
I am using an STM32L053C8 and I am trying to set up an RTC wakeup event, and while I am successful, I can only do it to a max time which is a couple of seconds. I need to put it in standby and wake up days later. At the moment I am using the low speed internal 40KHz as the RTC clock, eventually i will get a 32.768 crystal.
According to Carmine Noviello-Mastering STM32 i should be able to set the wakeup delay for a pretty long time. And while I do know it says using an external clock, using the internal one of a few Khz should still be able to provide a fairly decent delay for testing purposes. I just cannot figure it out. When I chose the 1Hz setting for the wake up clock, that only means it will use the RTC clock (40Khz)/(Asynch_prediv +1 x Synch_prediv+1) = new wake up clock frequency.It calls it 1Hz because it assumes you have set up the calendar to have a 1Hz frequency. Its too bad I can use the calendar as a wake up event.
AI: The assumption about CK_SPRE being 1 Hz is caused by the fact that this is essential for correct timekeeping.
What you are missing are the wakeup counters (below wakeup clock in your screen). That is - the RTC counts the clock pulses (say coming from CK_SPRE) and only wakes you up when the count reaches the value set in wakeup counter. Assuming CK_SPRE is at 1 Hz this gives you a maximum wakeup period of 36 hours (as stated in the reference manual).
Now, where did those 48 days come from? Either the author somehow mistakenly multiplied the period by 2 ** 5 or he assumed that CK_SPRE is 1/32 Hz (which wrecks timekeeping).
There are two workarounds to this:
software counter
alarms
Software counters - simply use a variable in your code and do something like this in your main:
int i = 0;
while(true) {
sleep(WFE); // forgot exact code
++i;
if(i % 10 != 0)
continue;
// your stuff goes here
}
Use RTC alarms (which are just before wakeup counters in your book):
wake up (same WFE)
get current time from RTC
add N days to this time
set next alarm
do your stuff.
|
H: Can parallel addition of a bigger capacitor damage the smaller one?
I have connected big capacitors to the speakers to increase the bass. Now, after months of using, I notice that one of the speakers sounds 2x low. I ejected those big capacitors, still the same.
I don't know how to test the caps. So I'm asking theoretically, could those big caps have damaged the small ones?
AI: Unlikely, but yes.
A capacitor and the coil of the speaker form an oscillator, which will resonate to some frequencies more than at others. Resonance means you get larger voltages.
Adding resonance to a system can hence introduce voltages that you didn't design for. That can, in turn, break voltage-sensitive components such as capacitors.
Why it's unlikely: The smaller capacitor you used is probably sufficiently robust against overvoltage; also, speaker capacitors tend to be of the self-healing film type, so only a reduction in capacity would be noticable, with should shift the frequency response, but not lead to a reduction in output power with a sensible test signal (I assume that's what you mean with "2x low", whatever that exactly means).
More likely are cabling problems or a damaged speaker.
|
H: How can I create a fixed voltage reference output voltage from a varying input voltage?
Suppose I have the following:
A voltage source that outputs a voltage between 10 and 14 V.
I need to generate a fixed reference voltage independent of the input voltage mentioned above. How can I do this?
Ideally I'd like my reference voltage not to vary more than 25 mV. So, say for instance, that the reference voltage is 5V then when input voltage is 14 V, the reference voltage must be at most 5.025V and when input voltage is 9 V the reference must be at least 4.975 V.
My first thought is to use a zener diode, maybe 5.6V or 3V. But I don't like this solution as it is a bit power consuming. I don't have any specific maximum value for power consumption, but I'd like it to be as low as possible. Is there any IC that can do this by consuming less than a zener?
I could also use an LM317 but since the voltage reference would feed a few comparators I thought the LM317 might be an overkill.
AI: Use a voltage reference chip like the REF02. It has : -
WIDE SUPPLY RANGE: 8V to 40V
OUTPUT VOLTAGE: +5V ±0.2% max
EXCELLENT TEMPERATURE STABILITY: 10ppm/°C max (–40°C to +85°C)
LOW NOISE: 10μVPP max (0.1Hz to 10Hz)
EXCELLENT LINE REGULATION: 0.01%/V max
EXCELLENT LOAD REGULATION: 0.008%/mA max
LOW SUPPLY CURRENT: 1.4mA max
There are gazillions to choose from and many that only need a few hundred microamps.
|
H: Can esp8266 chip work safely in a circuit with 3.3v and 1 ampere current?
I am using ams1117 to convert 5v/1A DC to 3.3v/1A using - https://iotbytes.wordpress.com/3-3v-power-supply-for-esp-8266/.
Can this 1 amp output (measured via ammeter) damage the esp8266 or i need to limit the input current (via resistor)?.
AI: This question has been asked many times before, in each case the person asking doesn't understand that what matters is the voltage. The load determines the current so there will be no 1 A flowing.
Not exactly a duplicate but it explains the principle behind voltage and current in relation to power supplies: Choosing power supply, how to get the voltage and current ratings?
To sum that up: you need to make sure that the ESP8266 gets the right voltage and then it will draw the current it needs. That current (needed by the load, the ESP8266) needs to be lower than what the supply can deliver. With the module your supply can deliver 1 A which is more than enough for an ESP8266.
|
H: What is Metal Oxide Varistor (MOV), meaning of its specification and how it protects circuit from over-voltages?
Hello,
I have a circuit in which a voltage source is connected to some sort of RC Load. To protect this circuit , there is an Metal Oxide Varistor (MYN15-681K). The Pics of circuit and datasheet specification of MOV are attached here.
My system rated rms supply is 240 volts and i have to test my circuit for system voltage up to 280 volts rms.
I want to find these hings as they are confusing terms:
1- What does it mean that MOV has Varistor rms voltage of 680 V, When this voltage appears across varistor, or what happens to mov when system voltage goes to 680 rms. (i read that this voltage is such at this current through mov will be 1mA, is it correct?)
2- Varistor voltage (AC) of 420 volts, (this voltage is maximum allowable means if system voltage up to 420 volts appears across mov, then it won't damage mov, is it correct understanding??)
3- Maximum clamping voltage of 1120 volts with current 50A.
Is this the voltage appears across mov when current through mov is 50A??
or when 1120 is applied across mov, current through mov will be 50A, if this is the case then what would be the voltage across mov??
4- Here energy rating is 190 J for 10/1000us pulse (what pulse?? is it the voltage of the system or current through mov?? what its magnitude??). Energy rating of 136 J,for 2ms (what is this duration? if it is duration of what??)
And is the energy rating for once?? or it can stand this much energy no matter how many times the specified signals are applied??
5- Peak Current: these are the currents that mov can withstand without damage, according to manufacturer technical info. after this pulse is passed through mov, it should be replaced. Is it correct?? as before claping voltage was 1120 when 50A passes through mov, then for these peak currents. what wold the apllied voltage??or the voltage appear across the mov??
6- What will happen if i give surge of 5000 V for 1.2/50us timing along with main 240rms voltage. What will be the V/I values be of mov under these conditions??
7- Given device specification, is there a way (a formula or equation) to calculate mov voltage and current depending upon the system voltage/current??
I know its much lengthy question, but i have been trying really hard to know the answer to these question because no forum or site is helping (google doesn't give much info). and about the info present, only definitions of mov specification which are also different on different sites..so please help me out on this.
Thanks a lot in advance..!
AI: Using the data sheets of a more reputable supplier (Littelfuse for instance): -
What does it mean that MOV has Varistor rms voltage of 680 V
It doesn't have an RMS voltage rating of 680 V - it starts to clamp at a voltage between 612 volts and 748 volts taking a current of 1 mA. I think the 1 mA specification is missing from your datasheet hence why I chose a similar device that had that spec.
Varistor voltage (AC) of 420 volts
This would be the RMS AC voltage (sinewave) that is allowable so the device does not exceed the power requirements (0.6 watts in your device).
Maximum clamping voltage of 1120 volts with current 50A
Typically, if 1120 volts is applied for a very short duration a current of 50 amps would flow (don't try this at home!).
energy rating is 190 J for 10/1000us pulse
Energy is volts x amps divided by time so, for instance, the 1120 volts, 50 amp scenario would imply a continuous power of 6000 watts and this means 6000 joules per second so, if the peak energy limit is 190 joules then the 1120 volts must not be applied for longer than 31.6 ms.
For questions 5, 6 and 7 I urge you to take on-board my answer and do some more research (if necessary) with different manufacturers.
|
H: I2C IC for part identification
I am looking for a way for a host system to identify that a certain mechanical module C is connected to it. This mechanical module doesn't need to have any electronics in it, but due to host compatibility reasons (with other mechanical components A, B), it has an I2C bus established between it and the host (even if we don't need it).
I was thinking on putting an IC on this bus, on the mechanical part side, so that the host could probe the bus looking for the IC, in order to know if the part has been attached.
Essentially, I'm looking for an I2C IC with only input pins (to configure it's address) that ACKs when its address is probed, and nothing else.
Do these kind of ICs exist? Or do I have to use some other regular IC (gpio expander, for example) with lots on configurable address pins?
AI: An EEPROM is the usual solution. The RAM SPD (Serial Presence Detect) function uses an EEPROM on an I2C bus.
The chips are remarkably inexpensive, for example the Microchip AT34C02D is $0.03 in 100 quantity at Digikey (factory price is 0.13 each, as Abe Karplus mentions, so that's a clearance price).
For your application you might not need to program the EEPROM (256 bytes), but doing so could allow you to encode revision numbers etc.
|
H: PC microphone isn't outputting any signal into a scope
I have one of those average cheapo computer microphones that connects into the sound card via pink 3.5mm jack.
I wanted to find out how much voltage can I expect from it, to get a ballpark value I could use for my opamp noise detection circuit.
The microphone works fine when connected to the PC.
And so I hooked the microphone to a scope, expecting to see my voice visualized on the screen when I talk, but all I am getting is a flat line.
I looked at how other people do it, and they merely just hooked the scope directly to the jack of the microphone, just like me, and it is working just fine for them.
So, what am I doing wrong here?
Thank you
AI: An electret microphone requires a DC bias current sourced from typically 5 volts through a 4k7 resistor to the microphone. This is a normal feature within sound cards for the microphone input and you may not be aware of that: -
If your microphone jack plug has three connections on it one may incorporate an internal resistor already.
|
H: 5V output switching with WEMOS D1 mini + MOSFET
I have a WEMOS D1 mini board which I power with a 5V power supply. I need to switch 5V outputs with a few hundred mA load, so I use AO3400 N-channel MOSFET-s. My schematics are the following:
However, when I power the circuit, my outputs are all powered, their voltages are between 4-500mV and 4-5V, despite the fact that the gate-source voltage of the MOSFET-s are 0V.
What could be the problem?
AI: Although parts of some of your descriptions have been a little unclear, your recent statement was:
I have output voltage even when the Gate terminal is shorted to ground directly.
This only leaves faulty / damaged (e.g. by ESD) / counterfeit MOSFETs (or perhaps a problem with your PCB or other physical construction) as possible causes.
You could edit the question to add photos of your physical hardware, in case that shows something of interest. But the first thing I would do, is to get a suitable working, and known genuine MOSFET, and repeat your test.
Based on your information, I believe your MOSFETs are either not the type you believe, or are faulty / damaged in some way.
|
H: STM32 pulled up GPIO pins work stange after being connected to the ground
I use stm32_smart v2 development board and try make a cheap and reliable 7 bit input interface using 7 jumpers from GPIO to the ground. Internal pull up resistors are used. The first time I did not connect any GPIO to the ground and had 3.3V on them.
After the first connection I have from 1V to 2.7V on used GPIO, even when they are not connected to the ground any more. I have no idea what is going on, but it felt like I burned something.
I'm uploading all the code even unused functions, to make sure all I provide all the info.
#include "stm32f10x.h"
//#include "stm32_eval.h"
#include "stm32f10x_gpio.h"
#include "stm32f10x_rcc.h"
#include "stm32f10x_usart.h"
#include "stm32f10x_exti.h"
#include "stm32f10x_tim.h"
#include "stdio.h"
//#include "tm1637.h"
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
#define TRUE 1
#define FALSE 0
#define NoONE 0
#define TEAM_A 1
#define TEAM_B 2
//Timer ISR sets this flag to communicate with the main program.
static __IO uint8_t TimerEventFlag;
static __IO uint8_t TimerTicks=0;
static __IO uint8_t ControlTeam=NoONE;
static __IO unsigned int TeamATime;
static __IO unsigned int TeamBTime;
static __IO unsigned int InitialTime=65;
unsigned int timeformat(unsigned int seconds){
unsigned int min=0;
unsigned int sec=0;
min=(seconds/60);
sec=seconds%60;
return min*100+sec;
}
void Configure_DIP(void){
GPIO_InitTypeDef GPIO_InitStruct;
/* Set pin as input */
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU;
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_10|GPIO_Pin_9|GPIO_Pin_8;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU;
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_12|GPIO_Pin_13|GPIO_Pin_14|GPIO_Pin_15;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_Init(GPIOB, &GPIO_InitStruct);
}
/* Configure pins to be interrupts */
void Configure_AButton(void) {
/* Set variables used */
GPIO_InitTypeDef GPIO_InitStruct;
EXTI_InitTypeDef EXTI_InitStruct;
NVIC_InitTypeDef NVIC_InitStruct;
/* Enable clock for GPIOA */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
/* Set pin as input */
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU;
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_0;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_Init(GPIOA, &GPIO_InitStruct);
/* Add IRQ vector to NVIC */
/* PA0 is connected to EXTI_Line0, which has EXTI0_IRQn vector */
NVIC_InitStruct.NVIC_IRQChannel = EXTI0_IRQn;
/* Set priority */
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x00;
/* Set sub priority */
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x00;
/* Enable interrupt */
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
/* Add to NVIC */
NVIC_Init(&NVIC_InitStruct);
/* Tell system that you will use PA0 for EXTI_Line0 */
GPIO_EXTILineConfig(GPIO_PortSourceGPIOA, GPIO_PinSource0);
/* PA0 is connected to EXTI_Line0 */
EXTI_InitStruct.EXTI_Line = EXTI_Line0;
/* Enable interrupt */
EXTI_InitStruct.EXTI_LineCmd = ENABLE;
/* Interrupt mode */
EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
/* Triggers on rising and falling edge */
EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Falling;
/* Add to EXTI */
EXTI_Init(&EXTI_InitStruct);
}
/* Configure pins to be interrupts */
void Configure_BButton(void) {
/* Set variables used */
GPIO_InitTypeDef GPIO_InitStruct;
EXTI_InitTypeDef EXTI_InitStruct;
NVIC_InitTypeDef NVIC_InitStruct;
/* Enable clock for GPIOC */
RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
/* Set pin as input */
GPIO_InitStruct.GPIO_Mode = GPIO_Mode_IPU;
GPIO_InitStruct.GPIO_Pin = GPIO_Pin_5;
GPIO_InitStruct.GPIO_Speed = GPIO_Speed_2MHz;
GPIO_Init(GPIOA, &GPIO_InitStruct);
NVIC_InitStruct.NVIC_IRQChannel = EXTI9_5_IRQn;
NVIC_InitStruct.NVIC_IRQChannelPreemptionPriority = 0x00;
NVIC_InitStruct.NVIC_IRQChannelSubPriority = 0x00;
NVIC_InitStruct.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStruct);
GPIO_EXTILineConfig(GPIO_PortSourceGPIOA, GPIO_PinSource5);
EXTI_InitStruct.EXTI_Line = EXTI_Line5;
EXTI_InitStruct.EXTI_LineCmd = ENABLE;
EXTI_InitStruct.EXTI_Mode = EXTI_Mode_Interrupt;
EXTI_InitStruct.EXTI_Trigger = EXTI_Trigger_Falling;
EXTI_Init(&EXTI_InitStruct);
}
int main(void)
{
//Holds the structure for the GPIO pin initialization:
GPIO_InitTypeDef GPIO_InitStructure;
uint16_t bitwise_time=0; //for value from the DIP switches.
uint16_t portA_vals;
uint16_t portB_vals;
uint16_t iden16=1;
//Configure_AButton();
//Configure_BButton();
Configure_DIP();
//init game settings
portA_vals=~GPIO_ReadInputData(GPIOA);
portB_vals=~GPIO_ReadInputData(GPIOB);
//bit operations
if(portA_vals&iden16<<10){
bitwise_time=bitwise_time|1<<0;}
if(portA_vals&iden16<<9){
bitwise_time=bitwise_time|1<<1;}
if(portA_vals&iden16<<8){
bitwise_time=bitwise_time|1<<2;}
if(portB_vals&iden16<<15){
bitwise_time=bitwise_time|1<<3;}
if(portB_vals&iden16<<14){
bitwise_time=bitwise_time|1<<4;}
if(portB_vals&iden16<<13){
bitwise_time=bitwise_time|1<<5;}
if(portB_vals&iden16<<12){
bitwise_time=bitwise_time|1<<6;}
//set that as teams times
if(bitwise_time==0){
InitialTime=30;
}else if(bitwise_time==127){
InitialTime=99*60;
}else{
InitialTime=bitwise_time*60;
}
TeamATime=InitialTime;
TeamBTime=InitialTime;
// Configure SysTick Timer
/*System timer tick is used to measure time.
The Cortex-M3 core used in the STM32 processors has a dedicated timer
for this function. Its frequency is set as a fraction of the constant
SystemCoreClock (defined in file system_stm32f10x.c in the
STM32F10x Standard Peripheral Library directory.)
We configure it for 1 msec interrupts*/
if (SysTick_Config(SystemCoreClock/10)) while (1); //If it does not work, stop here for debugging.
//loop
while (1) {
asm("nop"); //doing nothing. should put into some energy save mode
}//End while(1)
} //END main()
// Systic interrupt handler
//Every 100 msec, the timer triggers a call to the SysTick_Handler.
void SysTick_Handler (void){
TimerTicks++;
}
/* Set interrupt handlers */
/* Handle AButton interrupt */
void EXTI0_IRQHandler(void) {
/* Make sure that interrupt flag is set */
if (EXTI_GetITStatus(EXTI_Line0) != RESET) {
/* Do your stuff when PA0 is changed */
ControlTeam=TEAM_A;
/* Clear interrupt flag */
EXTI_ClearITPendingBit(EXTI_Line0);
}
}
/* Handle BButton interrupt */
void EXTI9_5_IRQHandler(void) {
/* Make sure that interrupt flag is set */
if (EXTI_GetITStatus(EXTI_Line5) != RESET) {
asm("nop");
if(GPIO_ReadInputDataBit(GPIOA, GPIO_Pin_5)==0){
ControlTeam=TEAM_B;
}
/* Clear interrupt flag */
EXTI_ClearITPendingBit(EXTI_Line5);
}
}
#ifdef USE_FULL_ASSERT
void assert_failed ( uint8_t* file, uint32_t line)
{
/* Infinite loop */
/* Use GDB to find out why we're here */
while (1);
}
#endif
AI: What you're doing is very dangerous (for your chip). If the pin is configured as input, all should be fine. But when the pin is accidentally configured as output, setting the pin high causes a short-circuit to Gnd. The output stage of that port can potentially burn.
Such accident can happen while you're developing your software. Perhaps you configure the pin as "output" instead of "input". And poof -> chip damaged...
At chip startup, most pins are for a brief moment in an "undefined" state. Note: this is incorrect. For more info, see comments below from people who corrected me.
I recommend to make the connection like this:
The 1k resistor protects the pin of your chip.
Note: The damage inside your chip can be tricky to recognize. If you're "lucky", your chip fails entirely. You toss it away and start with a new one. More painful is a chip that fails partly. Most of it keeps working, so you believe that the chip is okay. You focus on the software, trying to find the bug. It doesn't come to your mind that the hardware is damaged. Plenty of frustration...
|
H: How could the Gate-Source potential difference be neglected?
I’ve been reading the book
Electronic Principles by Malvino
In the Voltage-Divider bias section of JFET, if gate current is negligible then how did Gate Voltage attain a negative value, given Vdd is a positive value.
And also, to calculate drain current Gate-Source potential difference was neglected compared to Gate voltage.
How were the above conclusions drawn?
AI: For example, you have this circuit
simulate this circuit – Schematic created using CircuitLab
And the JFET parameter are:
\$I_{DSS} = 2\textrm{mA}\$ , \$V_P = -1V\$
And we want the drain current to be equal to \$1\textrm{mA}\$
The drain current describe this equation:
$$I_D = I_{DSS} \left(1 -\frac{V_{GS}}{V_P}\right)^2 $$
And we need to know \$V_{GS}\$ for \$I_D = 1\textrm{mA}\$
$$V_{GS} = V_P \left(1 -\sqrt{\frac{I_D}{I_{DSS}}}\right) = -1V \left(1 -\sqrt{\frac{1\textrm{mA}}{2\textrm{mA}}}\right) = -0.292V$$
This result tells us that we need to set the Gate voltage lower than the Source voltage by \$0.292V\$
So if I choose \$V_S\$ we can solve for source resistor
\$R_S = \frac{1V}{1\textrm{mA}} = 1\textrm{k}\Omega\$
And the voltage divider output voltage needs to be equal to:
\$V_G = V_S + Vgs = 1V + (-0.292V) = 0.708V\$
And now you can choose the voltage divider resistors values.
For example
\$R_1 = 510\textrm{k}\Omega\$ and \$R_2 = 39\textrm{k}\Omega\$
Will met our requirements.
As you can see by choosing the proper \$V_G\$ voltage and \$R_S\$ we can set the drain current.
And If you would like to check it.
We need to solve this quadratic equation
$$I_D = I_{DSS}\left(1 - \frac{V_G - I_D\cdot R_S}{V_P}\right)^2 = 2\left(1 - \frac{10*\frac{39}{39+510} - I_D\cdot 1}{-1}\right)^2$$
And the solution is
http://www.wolframalpha.com/input/?i=x+%3D+2+(1+-+(10*39%2F(39%2B510)-x*1)%2F-1.0)%5E2
\$I_D = 1.00242 \textrm{mA}\$
|
H: Control Theorie: Drawing Transition Matrix Trajectories
Given a transition matrix like e.g.
$$ \phi(t)=\begin{bmatrix} e^{-3t} & 0 \\ 0 & e^{-3t} \end{bmatrix} $$
What is the analytical way of drawing x(t) for two given starting points?
I only received this solution, which I can somehow understand in this case:
Since one x2 is at zero for the right point and one therm is decaying, it hast to go to zero. The left point somehow goes on a line to zero because both x1(t) and x2(t) got the same factor. The hint which was given confirms this assumption: $$ x_1(t) = e^{-3t} \cdot x_1(0)$$ $$ x_2(t) = e^{-3t} \cdot x_2(0)$$ $$ x_1(t) = C \cdot x_2(t)$$
The reason I'm questioning my assumption is a second task which was given:
$$ \phi(t)=\begin{bmatrix} e^{2t} & 0 \\ 0 & e^{-2t} \end{bmatrix} $$
With those starting points (and solution in blue)
To solve this exercise I tried to find a connection (like the C before). The equations for $x_1$ and $x_2$ both have difference coefficients. Besides the starting point they have a factor of $e^{4}$ in difference.
The hint in the solution which was given confused me more. As before, it can be written: $$ x_1(t) = e^{2t} \cdot x_1(0)$$ $$ x_2(t) = e^{-2t} \cdot x_2(0)$$
but then
$$ x_1(t) \cdot x_2(t) = 1 \cdot x_1(0)\cdot x_2(0) \rightarrow hyperbole $$
Of course the math seems legit, but the same solution could have applied in the exercise before, which would have led to something different. Is there a mistake, or why is this the proper way?
AI: Correct assumption. For example, see the plot below representing two state space trajectories starting from t = 0 with initial states (-0.5; 0.3) and (0.5; 0.3) and identical eigenvalues you provided:
|
H: FreeRTOS context switch ARM Cortex-M4
I am examining the context switching procedure on a ARM Cortex-M4 based processor running FreeRTOS.
In port.c we have:
void xPortPendSVHandler( void )
{
/* This is a naked function. */
__asm volatile
(
" mrs r0, psp \n"
" isb \n"
" \n"
" ldr r3, pxCurrentTCBConst \n" /* Get the location of the current TCB. */
" ldr r2, [r3] \n"
" \n"
" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, push high vfp registers. */
" it eq \n"
" vstmdbeq r0!, {s16-s31} \n"
" \n"
" stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */
" str r0, [r2] \n" /* Save the new top of stack into the first member of the TCB. */
" \n"
" stmdb sp!, {r0, r3} \n"
" mov r0, %0 \n"
" msr basepri, r0 \n"
" dsb \n"
" isb \n"
" bl vTaskSwitchContext \n"
" mov r0, #0 \n"
" msr basepri, r0 \n"
" ldmia sp!, {r0, r3} \n"
" \n"
" ldr r1, [r3] \n" /* The first item in pxCurrentTCB is the task top of stack. */
" ldr r0, [r1] \n"
" \n"
" ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */
" \n"
" tst r14, #0x10 \n" /* Is the task using the FPU context? If so, pop the high vfp registers too. */
" it eq \n"
" vldmiaeq r0!, {s16-s31} \n"
" \n"
" msr psp, r0 \n"
" isb \n"
" \n"
#ifdef WORKAROUND_PMU_CM001 /* XMC4000 specific errata workaround. */
#if WORKAROUND_PMU_CM001 == 1
" push { r14 } \n"
" pop { pc } \n"
#endif
#endif
" \n"
" bx r14 \n"
" \n"
" .align 4 \n"
"pxCurrentTCBConst: .word pxCurrentTCB \n"
::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY)
);
}
In the first half of the code, the current task status gets pushed to its stack, then vTaskSwitchContext is called. In here, the system decides, if a context switch is needed and gets the TCB of the next task. Then, the context is restored by loading the value from the stack. In my understanding, the LR register should now contain the program counter of the new task. With bx r14, this value is loaded to the actual program counter. When having two tasks A and B, context switching is working. However, when I examine the code by using GDB and jump into xPortPendSVHandler when switching from A to B should occur, the value of R14 (LR) is 0xfffffffd, and not 0x8008700 (PC when task got interrupted). What I am getting wrong?
AI: R14 (LR) doesn't contain the address to return to when exiting an exception (as you have found) instead it contains information about whether to return to handler or thread mode, which stack pointer to use (msp or psp), and whether it's a floating point context.
This is detailed in the section about Exception entry and exit in the Arm Cortex M4 generic user guide, page 2-28.
The program counter (amongst others) was pushed onto the stack during exception entry, when the processor leaves the exception handler it pops the pc back off the stack and carries on. In this instance the stack pointer used is changed during the exception, which allows the task to switch.
|
H: I don't understand why do I need to put a resistor between the gate and the source of a N-type transistor in this circuit
I have a diagram that represents a circuit whose purpose is enabling/disabling two leds basing on a logic programmed in a micro-controller.
In the circuit below, as far as I understand, there are two n-type transistors, and they have a resistor connecting their gates with their sources, respectively.
My questions is: Why are the marked resistors necessary? (red circle)
AI: When your microcontroller comes up, it's GPIO is in high-Z state, maybe pulled up(that means there is an internal resistor to VCC which may be enough to turn on the LED) . Its a good practice to pull down anything you don't want to work uncontrolled. So when the firmware initializes the outputs, you don't need the pull down resistors anymore. Only on power up/down or JTAG programming.
|
H: Solder Pad and Stencil Mask Data Sheet - Confused
I am using Autodesk Eagle. Need to create a footprint for CREE LED XHBAWT which is in the XLAMP XH-B series.
I do not understand the Datasheet drawing of the footprint, attached.
Are the lower views rotated 90 deg from the upper views? If so that seems odd.
Why is there the horizontal gap on the stencil mask on the right, but not on the solder pad on the left?
What are the little "tabs" on the Solder pad drawing?
Do I need the Solder Pad drawing? Don't I just use the Stencil Mask Drawing for my pads?
AI: Yes they are rotated.
The "Stencil Mask" is a physical metal stencil created to be used by the assembly house to print solder paste. The grid reduces the solder coverage to the typical 70% or so for a pad. For example the tab on TO252 package usually is split into 4 or 9 . Also the polarity notch means that a bit less solder is required in that area. If you have too much solder coverage it might short under the device.
TO-252:
Not sure why they put the tabs on there, but they are dimensioned so they probably belong. They may be intended to draw out excess solder to prevent shorting.
The pads represent the copper, the stencil mask defines the holes where the solder paste is printed. They're on different layers in your footprint, and both are necessary (unless you're planning on never making a stencil and always hand soldering). Note that the copper dimensions are larger than the solder paste.
Note: They don't define the solder mask layer, but you should. In particular, the 'tabs' should probably be free of solder mask (as well as the pads proper, of course).
Typical stencil:
|
H: How firmware [like BIOS] gets added to hardware
I am reading about BIOS, which is a piece of non-volatile Firmware. Wikipedia says of firmware:
Common reasons for updating firmware include fixing bugs or adding features to the device. This may require ROM integrated circuits to be physically replaced, or flash memory to be reprogrammed through a special procedure... Firmware such as the program of an embedded system may be the only program that will run on the system and provide all of its functions.... The BIOS may be "manually" updated by a user, using a small utility program.... proprietary firmware as a security risk, saying that "firmware on your device is the NSA's best friend" and calling firmware "a trojan horse of monumental proportions".
Anyways, not much is said about how the firmware actually gets added or updated, and it all seems like a black box.
I am interested to know in more detail how the BIOS system gets installed on the "system board":
The BIOS firmware comes pre-installed on a personal computer's system board [wondering how], and it is the first software to run when powered on.... Most BIOS implementations are specifically designed to work with a particular computer or motherboard model, by interfacing with various devices that make up the complementary system chipset. Originally, BIOS firmware was stored in a ROM chip on the PC motherboard. In modern computer systems, the BIOS contents are stored on flash memory so it can be rewritten without removing the chip from the motherboard. This allows easy, end-user updates to the BIOS firmware so new features can be added or bugs can be fixed, but it also creates a possibility for the computer to become infected with BIOS rootkits. Furthermore, a BIOS upgrade that fails can brick the motherboard permanently, unless the system includes some form of backup for this case.
Basically this question is, what actually happens to get the software onto the hardware in this case. In my head I am imaging a laser engraver engraving the software into the metal somehow. That is as much as my knowledge goes, which is probably wrong. So I would like to know how to get it on there, how you install something without even the BIOS system being available to help you bootstrap your hardware.
AI: See http://www.tomshardware.co.uk/forum/317934-30-bios-chip-location :
The chip is some sort of Flash or EEPROM, and can be written to in essentially the same way as USB flash sticks or SD cards (maybe this is your real question?). The one shown is socketed, but the other one on that page is soldered to the motherboard.
The chips will probably be supplied programmed by their manufacturer; at the last step of the production process, they will be put in a socket or jig so they can be powered up, tested, and programmed before they're put in a tray or tape to be shipped to the assembler.
|
H: Why is my buck converter emitting smoke and fire?
I am powering my router from a 24 V battery, but the power requirement of router is 12 V/1 A, so I am using an LM2596 buck converter.
The specification for this buck converter is as follows:
Input voltage: 4-40 V
Output voltage: 1.2-37 V
Scenario 1:
It worked fine for a day. Next day, when I connected the battery's output to the buck converter's input, the input capacitor started to burst (no output was connected).
What could be the cause of this behaviour?
Scenario 2:
I bought another one and tested it. The input which I provided was 24 V and the output obtained was 12V. I connected the output to router. When I powered the router button on, the voltage regulator emitted smoke and fire.
What could be the cause of this behaviour?
What do I need to do to overcome this?
AI: Issue 1: Could be the physical board itself. Depending on where it was purchased, it could be poorly-designed, poorly-manufactured, using counterfeit parts, etc. This board looks to me to be a low-cost Asia-sourced unit, built in large quantity and sold cheaply - the PCB looks thin, there's no manufacturer label or serial number, etc. It is my experience that many low-cost direct-sell vendors found on places like eBay, Wish, etc. have issues with product quality - the items don't fully meet spec or don't last a long time. Some will gladly sell you a replacement, some will send you a new one for free. Some won't return your messages. There are larger domestic suppliers (Digi-key, Mouser, Farnell, etc.) which demand better quality and may offer support if you end up with a lemon - at a higher purchase price, however.
Issue 2: Could be the application - was there input protection installed? You didn't mention having things like a fuse, input polarity protection or inrush protection. A fuse disconnects the source from the load if something bad happens. Input polarity protection prevents a reverse-connected battery from doing anything. Inrush limiting protects the input caps from seeing damage due to high di/dt from the battery (which can deliver a lot more current than the wall-wart adapter which would have been supplied with the router!). You also could consider a TVS across the input of the buck to protect the cap from induced voltage stress if the wires are long and there's a sudden current interruption.
Issue 3: Could be the design. Example - limited power handling of the LM2596S. Because the integrated power switch isn't mounted on anything meaningful (as far as power dissipation is concerned) it isn't going to survive at peak power for very long. It's a 3A rated part but the device needs to be mounted on some serious copper to be able to deliver that. Did the supplier offer you any test data or qualification results showing what the device is, and if it needs external cooling?
So, consider input protection and inrush limiting at the very least. Also consider investing in a scope (even an old, used one is useful) and start looking at the waveforms if you really want to know what's going on. Check device temperatures when the circuit is running steady-state - is anything getting hot prior to failure? Are there any high voltages you can't explain? Excessive ringing? Your intended application, sadly, is not "plug and play" - a buck regulator in this sort of package isn't like a wall-wart adapter that you can just plug in and use. It takes a certain amount of knowledge to diagnose and resolve why there may be issues.
|
H: Is a capacitor bad when it looks like this?
Hello I am new to the electronics field. I am looking inside of one of my synthesizers and I see some capacitors (I think they are Mylar, correct me if I'm wrong) that look like this. I know it is a bad sign if an electrolytic capacitor is bulging, but is it the same on these?
Is there anything wrong with these capacitors?
The issue I have is that the brass sound disappears over time after you turn the synth on. It starts with high volume but it slowly goes down in volume and sometimes it disappears completely.
The other problem is that there is bleed between the higher and the lower part of the keyboard. The keyboard is split in the middle. The sounds come from 5 different presets that you can turn up and down for the higher and the lower part of the keyboard. But if you turn for example the strings up in the higher it also plays a bit in the lower and vice versa.
I have studied the schematics and diagrams over the past week and only now did I discover that a significant amount of the electrolytic capacitors are not the same value as what it should be according to the schematic. But it is always a higher capacitance and higher voltage. But I don't know if the schematic is wrong or if there are wrong valued capacitors on the board.
AI: Since this a heat related problem, as everyone has stated it is probably an electrolytic capacitor which is more than likely true. The best way to test for the heat related capacitors is with a can of circuit cooler. Canned Air Dusters will work very well if turned upside down. Allow equipment to warm up and volume has gone down. Then spray some capacitors in one area of the board, allow a few seconds for the coolant to take effect. If you have hit the right one the volume will return. If not select another area to cool four or five capacitors.
When finding the right area allow it to warm up again, then selectively spray one at a time each capacitor, allowing time for it to take effect. When you hit the right one, replace it. Some cases may have several capacitors bad.
|
H: Create a blinking LED circuit with a z-diode and a capacitor
I was searching for the most simple LED flashing circuit. On a webpage (http://cappels.org/dproj/simplest_LED_flasher/Simplest_LED_Flasher_Circuit.html) I found the following circuit with a transistor and a capacitor.
As I read the description to the circuit, I was wondering, if it would be possible to swap the transistor with a z-diode, because the z-diode also uses the avalanche effect like the transistor in the circuit.
Would the ciruit below work ? And if yes, how would you have to calculate the values for the z-diode and the capacitor ?
simulate this circuit – Schematic created using CircuitLab
AI: No, your circuit will never work with the ordinary Zener diode and low supply voltage. You need a tunnel diode or NPN transistor or some other negative resistance two-terminal device. Because the negative resistance region is the key here.
And this circuit will not work with all NPN transistor and will never work with PNP transistors.
To reduce the risk of failure builds a different circuit that uses a classic multivibrator. Because the original circuit is very fussy and for sure will not work with such a low supply voltage.
|
H: PWM duty cycle RPM regulation via sensing DC motor current
I have a DC motor that needs to be RPM regulated, that is, it needs to turn at constant RPM regardless of the load. I've read this can be done by monitoring current thru the motor windings and appropriately linearly increasing the motor driving voltage.
I have a triangle oscillator and a comparator to generate the PWM. Reference voltage (goes from 0 to 10 V) on the comparator 'selects' desired duty cycle. PWM is running at 20 kHz. Motor is driven by this PWM through PMOS with low-side current sensing done via OPAMP.
Linear current increase linearly increases the reference voltage which again linearly increases the duty cycle.
The problem is when the PMOS is turned off, there is no current thus no voltage sensed and no reference voltage set (for duty cycle). I want previous duty cycle (reference voltage) to stay unchanged for a couple of PWM pulses (lets say 5ms for now) and then change to a new value.
I could have current sensing OPAMP with offset to generate some general duty cycle (reference voltage) with no current. But that would still cause drops in the duty cycle when PMOS turned off.
I'am thinking PI regulator done with OPAMP integrator, would that work, how would I go about implementing it?
Best regards!
EDIT:
Its a PMOS with motor and current sensing resistor on low-side.
AI: As @JackCreasey pointed out, current sensor by itself will not give you correct RPM, since current depends on a load.
From your comment you don't have an access to motor shaft and cannot put encoder on it. But any motor is supposed to drive something. If you have an access to that you can measure RPM there.
For example inductive proximity sensor can be used with metal gear or turbine.
Hall effect sensors can be used with ferrous rotating parts or with plastic parts if you can embed tiny magnet into them.
Infrared or laser diodes can be used practically with anything. Usually you need two surfaces with different reflection (e.g. by sticking reflective tape somewhere), but with careful arrangement of focal points and sensitivity it can be done without it. Another configuration is to have direct light path interrupted by rotating part.
Finally you might be able to put an encoder on the rotating part. If you have gearbox and the rotation speed is much slower than motor shaft it just means you need encoder with more PPR.
If nothing of the above works for you, there might be a way to use either current or voltage sensor after all, although not by measuring RMS, but by measuring and filtering fluctuations.
You've mentioned that you are worried about condition when PMOS is turned off. But that is exactly when back-EMF kicks in and can be measured to detect the commutation of the brushes.
See here and here for examples and theory.
Update: Found couple more examples for you. These do not count commutational fluctuations but simply measure back-EMF during FET off time: AB-021, AN893
|
H: Driving 16-segment displays with MAX7219
While the code for this in theory makes sense to me, I can't find any examples online so I wanted to check to see if the wiring actually works.
I've used the MAX7219 for both 7-segment displays, and 8x8 pixel grids, so have an fair understanding of how it works.
here is the datasheet
https://datasheets.maximintegrated.com/en/ds/MAX7219-MAX7221.pdf
If my understanding is correct, the SEG go HIGH, while the DIG function as Sinks. Normally it would allow it to run 8, common cathode, 7-segment displays.
The single digit 16-segment display characters I have have 18 pins total. 16 segments, the decimal, and the common cathode.
Would it work to wire the first 8 segments to SEG-A -> SEG-DEC and then the cathode to Dig 0. Then the remaining 8 segments to SEG-A -> SEG-DEC again, and then also connect Dig 1 to the cathode.
doing this would theoretically allow 4 16-segment displays per MAX7219.
I realize I would have to write my own bytecode patterns to send to the MAX7219 for each character. I also realize I won't be able to use the decimal points.
Does this work? Or Am I missing something? The part I'm most unsure about is if it is problem to use 2 digits on the same cathode.
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. "That's not a schematic. This is a schematic."
Why it would work
If the schematic of Figure 1 is what you intend then (without reading the whole datasheet) you might be in with a chance. Page 5 says about pins DIG 0–DIG 7:
Eight-Digit Drive Lines that sink current from the display common cathode. The MAX7219 pulls
the digit outputs to V+ when turned off. The MAX7221’s digit drivers are high-impedance when
turned off.
So the 7219 digit pins can't be connected in parallel (unless you add a diode into each line) but the 7221 can as the pin goes high impedance when not driving a digit.
You would need to run the chip in "No Decode Mode" to allow individual segment addressing. See page 8.
Why it wouldn't work
Looking at the schematic it is now clear that when SEG A is driven high that both 'A' and 'K' will illuminate if either DIGIT 1 or DIGIT 2 is low. (Schematic beats wiring diagram.)
Since you have only one common cathode you are beaten.
|
H: How to safely connect multiple switching power supplies to one single cold device socket?
I apologize in advance, for only quickreading howtos, and, since I am only hobbyist, I actually don`t tinker with ac power generally.
Today I can`t bypass this : I need to connect 3 switching power supplies (1x 230V=>5V, 300W,60A; 1x 12V 20A; 1x 12V 15A) to a single cold device socket.
Question is : Is it safe to connect all three supplies in parallel to the cold-device-socket (whats the correct name in english for those !?) as long as I care for good wires (I have 1.5mm pure copper core cable with good pvc isolation, which should be a bit overdimensioned already) and propper soldering and isolation?!
Are there any hints that a professional electrician could give me ?
(Apart from : dont touch ac power if you dont know what u are doing) .. I will be really really careful, I promise .. (soldered some cold-device-sockets to 3d-printers successfully already etc..)
Will the current evtl. be too much for the fuse thats built into the socket ?! I think in 230V AC all 3 together shouldn`t reach 10A !?
I`d love to read carefully and answer the question myself, but from my little knowledge, this should be possible and simple, I just want to be sure and I am already late with progress...
thx in advance, Oliver
AI: Calculate the currents on the mains side using \$ P = VI \$ but solving for \$ I = \frac {P}{V} \$. We'll assume they're all 100% efficient.
The 300 W unit gives \$ I = \frac {300}{230} = 1.3\ \text A \$.
12 V, 20 A unit has \$ P = VI = 12 \times 20 = 240 \ \text W \$. \$ I = \frac {240}{230} = 1\ \text A \$ approx.
12 V, 15 A unit has \$ P = VI = 12 \times 15 = 180 \ \text W \$. \$ I = \frac {180}{230} = 0.8\ \text A \$ approx.
Even if your power supplies are only 75% efficient (resulting in 33% extra current on the mains side) you will draw about 4 A. You are fine.
... to a single cold device socket. (Whats the correct name in English for those!?)
Mains socket? Wall socket? 230 V power socket?
Make sure you have a fuse on the supply.
|
H: How do we measure capacitance by change in vibration
A capacitively based MEMS affinity glucose sensor.
link to the IEEE paper, from where I've got this doubt.
The gold electrodes are separated with some distance and the permalloy is vibrating with the help of solenoid(it generates a time-varying magnetic field[solenoid is not shown in the image]). Glucose comes inside through the semipermeable membrane and makes the liquid in which the cantilever is there more viscous which reduces the vibration in the cantilever. We measure the capacitance created by the gold electrode.
Question: How does the capacitance changes when the vibration of the permalloy slows down?
AI: Increased viscostiy reduces the amplitude. Not the frequency. (Doesn't slow down.)
For vibration, the capacitance between electrodes changes with sinusoidal time-dependence. Probably the average capacitance doesn't vary. But the peaks in capacitance will be much smaller as viscosity increases.
|
H: Using shielded audio cable for potentiometer sensor
I'm trying to measure a potentiometer from an Arduino's ADC. The potentiometer has a maximum value of 100k ohms and is located about 1 meter from the Arduino. The potentiometer's wiper is wired to the ADC pin and the pin to ground. I've enabled the 20k internal pullup on the ADC pin, so the potentiometer creates a logical high and low at the extremes. I have the potentiometer wired using two stranded 24 awg unshielded wires, twisted together.
To filter out noise, I'm using an exponential moving average on the Arduino. However, even with this, I'm still seeing a +/- 10 unit change several times a second, even when the potentiometer is completely still.
The two ways I've read about reducing noise in wires carrying analog signals are:
Using a shielded cable
Would it make any difference if I instead used a two-conductor shielded audio cable? I have one audio cable that has a red and black wire, as well as metal shielding. If I attach my potentiometer's pin to the two wires, should I also wire the shielding to the ground or leave it unattached?
I see a lot of conflicting opinions over how to leave the shielding, with commenters in this thread suggesting to leave it ungrounded, or grounded at the sensor end, or grounded at the Arduino end, but definitely not grounded at both ends. Which is best for my case?
Using a capacitor
How much of a difference would it make if I placed a 0.1uF capacitor across the wires, as a low pass filter? Should I place it on the sensor side or the Arduino side? Again, I've seen a lot of conflicting advice about this.
AI: Why don't you connect potentiometer as people normally do, between GND and VCC? If you use 5-10K potentiometer you'll see much less noise on the input.
The reason you see so much noise is that your source impedance is too high, you simply don't allow enough current through to charge sampling capacitor in ADC. You cannot use less then 22k if you use internal pull-up, while ADC in MCUs usually optimized for about 10k source impedance.
There are three methods we use on electrical scooters with about the same distance to multiple resistive sensors.
add 0.1 uF capacitor between the wiper wire and GND right before MCU pin. The capacitor performs two functions. First, it filters out high frequency noise. Second, it further reduces source impedance by acting as local low-impedance source during sampling.
use shielded cable with shield connected to system ground near MCU. In your case this is not an option, but you might see some noise reduction if you connect shield to GND.
add ferrite core to high current switching power lines. Again, this might not be the case for you.
In short:
1) use 5-10K potentiometer
2) connect it between VCC and GND
3) disable internal pull-up
4) add 0.1 uF capacitor near ADC pin
|
H: why does a fuse break when a wire is connected to ac socket directly
I connected ends of wire to ac hot and neutral points of ac outlet sockets - an electric fuse broke and power went off in my house. I understand this happened since there was closed circuit connection. But with any electrical devices like mixer this will not happen. What is there in those devices that will prevent this from happening?
This will not happen when I connect 2 ends of wire to + and - terminal of DC Battery.
AI: A Mixer has much higher impedance than a piece of wire - limiting the current which can flow and thus not melting the wire or tripping the breaker.
Your battery can't supply enough current to melt the fuse wire. The mains can.
I would suggest you stop experimenting with the mains before you hurt yourself/start a fire.
EDIT:
Whilst a battery might not be able to supply sufficient current to melt wire (a car battery might... please don't test it) a LiPo battery wont like being shorted and could well explode. It's pretty much never a good idea to short circuit things...
|
H: How to find Voltage based on reference nodes?
I came across this problem and I'm trying to really understand it.
VB is the voltage drop across a particular element, it is the change in voltage from node a to node b. Find the value of VB in volts
and enter it in the box below.
The expression Vab indicates the voltage referenced from node b to node a. In other words, imagine Vab being identified in the diagram as
having a "-" at node b and a "+" at node a. For the circuit above,
find Vab and enter it into the space below without units.
For the same circuit above, find VC and enter it into the space below without units. (VC is the voltage across the top element, not
the voltage at the point c in the circuit.)
The answers are:
1) 3
2) -3
3) -2
Now, I know that since VA is 3V so do VB because they are in parallel.
but why is not VC + VD= 3V since they are also in parallel to VA
what is throwing me off is that if VA=3V that means the voltage at node b is 3V
now the voltage at node a is 1V, that would mean that the voltage at node b minus the voltage at node a is equal to 2, (i.e. Vb-Va=3V-1V=2V=VB) but it is 3 instead.
The way I solved for VC is just intuitive, subtracted VA-VD and then multiplied by a negative sign because the negative sign is first (assuming that my current flows clockwise through the whole circuit), why can I do this fro VB?
Also why is Vab negative if voltage is dropping and not raising?
AI: Voltage is the difference in electric potencial between two points.
The electric potencial of point a is 1V. Your mistake was to assume that the electric potencial in point b must be 3V because of the voltage drop of 3V. Actually the electric potencial in point b is 4V.
VA = Vb - Va
3V = Vb - 1V
Vb = 3V + 1V
Vb = 4V
In words: The electric potencial in point b is 3V higher than the electric potencial in point a. Resulting in a voltage drop over the Resistor VA of 3V.
In the same way you can calculate the electric potencial in point c.
VD = Vc - Va
1V = Vc - 1V
Vc = 1V + 1V
Vc = 2V
And last the voltage drop VC:
VC = Vc - Vb
VC = 2V - 4V
VC = -2V
Quick Scetch:
Hope that helps.
|
H: How to build a relay switch that resets when power goes out?
I'm trying to build a kill switch in my car so that when I turn the ignition, a button also has to be held down. When the power goes through, the button can be let go and the system stays closed until the car shuts down, then you have to repeat the process. I came up with this diagram:
https://i.stack.imgur.com/AcvVN.jpg
What kind of parts does it take to build this? I drew logic gates but I have no idea how that translates to real components. Is a button and relay from an electronics store enough? I'm worried about 1) splitting the ignition wire like that and 2) how much power actually loops back, would things over heat?
AI: Typically you use a relay wired so that the live side of the switch powers the relay coil.
the button used should be capable of powering the whole switched load
simulate this circuit – Schematic created using CircuitLab
by adding a diode the load can be isolated fronm the button allowing the use of a smaller button that only needs to pass the relay coil current (about 0.1A)
|
H: Seven-segment display seems to draw little current
I bought a 1.8-inch seven-segment common cathode LED display from AliExpress. So no datasheet available.
I used a 1 kΩ resistor and a 5 V source, as to put a max 5 mA in the LED. I measured 1.6 V for the decimal dot, and 3.5 V for each segment. The measured current draw for one segment was 1.5 mA.
Now, I expected each LED to be quite dim at 1.5 mA, but it was the opposite, I could put a 4 kΩ resistor and still has a usable display.
I intended to drive the display using an ATmega328P and a MAX7219 (which would have been OK up to 500 mA per segment).
Does this measurement seem correct, and if so, I can drop the MAX7219 and drive the segment directly (with current limiting resistors) with the ATmega?
AI: First of all +1 for measuring your display. Too often we get questions here about "I saved money by buying cheap from Alibaba but it don't work. Now please spend you valuable time helping me out".
These days LED's are very efficient. They no longer need the 20mA the first generation required. 1mA or less is not uncommon.
So, yes, you drive these straight from an atmega328.
|
H: Replacing USB-A with USB-C fails
What I did, step by step:
Cut off the USB-A cable from a device. (smart card reader)
Cut a USB-C to USB-A cable in half. (cable came with a phone)
Soldered the USB-C part (see step 2) to the device (see step 1):
Connected the device to my phone: It was not detected. (lsusb in
Termux)
Cut a USB-A to Micro cable in half.
By soldering, replaced the USB-C cable with the USB-A cable from step 5.
(In case you wonder: I could’ve used the original cable from step 1, but
that was already destroyed as I tore it apart – see below.)
Connected the device to my phone using a USB-C to A adapter. Now it worked.
What did I do wrong?
Now I read in an answer that one should do some connections via a resistor.
However:
I tore the cable from step 2 apart:
The USB-A part contains no resistor. Furthermore the colors of the wires
exactly matched the standard USB-A pin out.
The USB-C part contains some electronics. There is a component labeled
D9 and another very tiny component possibly labeled R1. It looks like
that tiny component bridges the white and the green wire. It’s hard to
see because it is all covered in glue which is almost impossible to peel
off.
On the web, I found advertisements for USB-C to USB-A cables that mention
the resistor being part of the USB-C plug. I assume this is standard
practice.
I don’t understand what went wrong. The solder connections were certainly good.
In fact I redid them, then tried again, got the same result. Also I was very
careful not to short any connections, except for intentionally shorting the two
black wires once: no difference
AI: I don’t understand what went wrong.
What went wrong is that you cut a wrong type of Type-C cable. From your imprecise description you took a part of Type-C to Type-A PLUG cable. This kind of cables are designed to connect a USB Type-A HOST to Type-C device. So essentially the cable must fake the USB host signature. It is doing so by having PULL_UP resistor on CC line to VBUS, typically 56k.
Yours is a device, so the captive Type-C end must have "device" signature, which is 5.1k PULL DOWN on CC pin. To make it work you need to get an
OTG adapter, Type-C to Type-A RECEPTACLE, like this one,
and do the same soldering work. Before cutting and soldering, make sure that the adapter works with the phone (use a pen drive or mouse), some adapters don't have proper pull-downs and don't work.
|
H: High gain amplifier ADA4528
I am trying to make an amplifier which should amplify signals from at least 10uV (lower better) to around 100mV or above. The signals range from a few Hz to around 100kHz. Adjustable gain is also helpful. I was planning to use ADA4528 for this. Please give some suggestions on this. Also, is ADA4528 a suitable choice? If not, please suggest some opamps which might help achieve this.
Thanks
AI: With a ratio of 10uV to 100mV you'll need a gain of 10000. Looking at the closed loop Gain vs Frequency graph if you extrapolate the gain to 10k, you'll have a bandwidth of roughly 100Hz. There can be gain, and bandwidth, but there is a tradeoff between the two. If the bandwidth of the signal really is more than 100Hz you'll need more than one amplification stage.
For example, you could use two 4528's with a gain of 100, and a bandwidth of ~10kHz
or as Sphero suggested a 4 stages of 10 (or two ADA4528-2's or dual opamp packages) which would give you a bandwidth of 100kHz
Another thing that I'd recommend is use the ADA4522 as the 4528 requires an RF input filter (the 4522 has the RF input filter built in).
|
H: CD4015BE with carry?
My question is about the CD4015BE that i would really want to use in one of my projects, but i can't figure out how to make a carry out for the second register. In the datasheet they mention that it is possible, but i just can't seem to figure out how to do it. Some clues would be greatly appreciated.
Datasheet
AI: Use the Q3 output as the data (D) input for the next shift register. Here's an example:
Figure 1. Note the daisy-chaining of U2-A/B and U3 A/B. Source: Sonelec-Musique.
|
H: Multiple Parallel LED Drivers with Single Thermal Derating NTC Thermistor
I am looking at powering Some multi color High power LEDs e.g LED engin LZ4 or LZ7 (probably a string of five) using
a tps92691 based Circuit
these being high power leds it seems wise to include thermal derating circuitry
the tps92691 suggests using a voltage divider with a NTC thermistor from its on voltage regulator
e.g
simulate this circuit – Schematic created using CircuitLab
The LEDs however are either 4 or 7 LEDs in one die so using multiple PTC seems redundant and complicates track layout near the LEDs . I am therefore looking for the best way to connect multiple drivers to a single NTC thermistor.
The simplest circuit would be
simulate this circuit
but that makes assumptions about the TPS92691's 7.5V LDO Regulator and that they wont "fight" with each other.
and external regulator is possible but is that really necessary?
is this a sensible way of doing this or is there a better way?
AI: A single thermistor is located near the LED's thermal pad.
Your circuit should work, but you only need one. Just use the VCC output from one driver, one Radj, a single thermistor, and feed the IADJ of all the drivers.
Because the Iadj is an unbiased input (can be modulated by external voltage source from 0 V to 2.25V), one circuit should work for all the Iadj inputs.
This is assuming that all drivers are set to use the same output current. If you need separate current adjustments, then you should consider using a driver with a separate thermal foldback pin like the TPS92510.
TI's LM3414 datasheet has a thermal foldback circuit that will work for you.
The app note for the LM3414 eval board has a detailed explanation for the circuit values. The LM3414's reference voltage is 1.225V where the TPS92691 is 2.25V. Use one of the TPS92691's VCC output (pin 16) to power this circuit.
|
H: Mosfet heating in current limiter circuit
I am designing a lead acid battery charger using Battery University for guidance. This is the circuit I made.
The power supply is from an Adjustable 12V power supply. I have set it to 14.4V. The mosfet is FQP55N06. The transistor is a BC547.
The current limit based on testing with multimeter is 1.24A.
If i connect a halogen bulb (12V 35W) of a motorcyle as load, the Mosfet limits the current but heats up rapidly. Why is that? (I connected a smaller 12V bulb which draws only 0.7A and the mosfet did not heat up)
If I use this circuit to charge a battery, and if it draws current upto the circuit limit, will the Mosfet heat up? If it will, how can I prevent it, while maintaining this current limit?
AI: The mosfet heats up because your halogen bulb has a low resistance. 12V at 35W means it has a heated up resistance of 4 Ohms, and when its cold, the resistance may be 10x lower, at 0.4 ohms.
If the load is in-between these two, at 2 ohms, and the current through it is 1.24A, the voltage across it is 2.48V. If the current through the other resistor is 1.24A, the voltage across it is 0.5828V. If the supply is set to 14.4V, then the voltage across the mosfet must be 14.4-(2.48+0.5828)=11.3V. At 1.24A, that means the mosfet is dissipating 14W of heat, which is huge. Even if the bulb is fully heated up with a resistance of 4 Ohms, the mosfet will still be dissipating over 10W of heat.
If your 12V bulb is drawing 0.7A, its resistance is probably around 17 Ohms (assuming the voltage across it is 12V). This means that the voltage across the mosfet will be much lower, and so it wont be dissipating as much heat. Analyzing this actually gets a bit complicated, maybe impossible, since we dont actually know what the resistance of the bulb is at that moment. If you gave a power rating, we could calculate it in the same was as for the other bulb.
If you charge a battery with this, it will probably be ok. Broadly speaking, the higher the voltage across the battery, the lower the voltage across the mosfet. If the battery voltage is above 11V (which it will be unless the battery is dangerously discharged), the maximum voltage across the mosfet will be around 2V, which at 1.24A is around 3W. The datasheet gives the junction to ambient thermal resistance as 62.5C/W, so it will heat up to >180C (and break quickly), so you'll need a significant heatsink.
This heatsink has a thermal resistance of 9.6C/W. Combined with the 1.63C/W internal thermal resistance of the mosfet, you should get a temperature rise of around 35C, which isn't too bad, although is still pretty warm (assuming 20C ambient, this is 55C total, which is above the threshold for thermal burns for humans). If you add a fan, it will lower the temp even more.
|
H: Increase memory of an ATmega32
I bought an ATmega32 IC recently, but now I found out the program I wrote in Atmel Studio reports an error due to an overflow of memory. It is 134.1% over the recommended memory of this chip. Are there alternatives that exist?
I don't want to go and buy another chip as they are quite expensive.
AI: Atmega32 is like a stripped down Atmega644x or Atmega1284P. Change the chip to get a lot more memory, more SRAM (up to 16K bytes), and dual hardware serial ports.
|
H: Obtaining noise spectral density of OP-AMP from Peak to Peak voltage
I'm in need of a low offset opamp for integrating purposes, I also need it to be very low noise since the output of the opamp will go into a 3000 V/V gain stage.
The opamp that seems to satisfy my needs for low noise for the 3000V/V dual stage is: AD797 while the one that satisfies my low drift requirement is this: LTC1151
However when looking the datasheet of the LTC1151, I could'nt find the noise voltage spectral density, instead theres a volts peak to peak figure of \$ 1.5 \mu V_{p-p} \$ from 0.1 to 10Hz.
So my logic is that to get the noise voltage density I just need to divide by two (to get the peak voltage) and then divide by \$ \sqrt{10 Hz} \$, but im getting \$ 237.2 nV/\sqrt{Hz}\$ that seems too high. Is there something wrong with my calculations? Or is the voltage so high because its a zero drift op-amp? Im also aware that the 0.1 to 10 Hz voltage spec is mostly due to 1/f noise and not white noise of the opamp.
AI: Usually it's in a graph, for 0 to 10Hz i'd go with rougly \$\frac{50nV}{\sqrt{Hz}}\$
|
H: Does a splitter still reduce signal if only 1 of its ports is used?
I'm using a Wilson Electronics signal amplification system to try to get phone signal in my house. I'm going to attempt using a coaxial splitter like this one to split the amplified signal to multiple indoor antennas for broadcasting to multiple parts of the house, since the house is large and has thick stone walls that block signal very effectively.
However, I haven't ordered the second indoor antenna yet. I only have one right now.
What I'm wondering is, once the splitter arrives and I've added it into the system, will I be able to tell immediately if there's a significant signal drop across the splitter, or will it not be apparent until I've bought the second antenna and attached it as well?
To rephrase, if only one port on the splitter is used, is the signal drop to that one port the same as when all four ports are used? Is it the splitter itself which diminishes the signal, or is it the extra devices attached to it drawing part of the voltage away?
AI: To rephrase, if only one port on the splitter is used, is the signal drop to that one port the same as when all four ports are used?
You should not be using it that way! This splitter/filter has no in put for power so it is a completely passive device meaning, the power which comes out must be smaller than the power which goes in. Ideally all signal power that feeds into it should get out but that's not going to happen, there will always be some signal loss, no matter what.
It is also designed to only split that power properly (as intended) when all outputs have a connection to a device with an antenna input.
If you leave one or more outputs open then the signal will reflect (as it cannot go anywhere, it goes back) and that disturbs the signal on all outputs. This doesn't cause any damage as the signals are very low in power. But you might suffer from ghost images on a TV or general bad reception, so be aware of that! But as a temporary solution until you connect everything properly, it is OK.
Is it the splitter itself which diminishes the signal, or is it the extra devices attached to it drawing part of the voltage away?
As I mention above, the splitter cannot amplify the signal so what power comes in is devided between all outputs. "Drawing voltage away" does not happen and is not the issue. The splitter must be connected properly and only then will it divide the signal equally.
So connecting only one port to a TV and leaving the rest open will actually result in the worst signal at the TV. You get the best signal with no splitter (cable straight into TV). Using the splitter properly (all ports in use) is the middle solution, you would get a decent signal everywhere provided that the signal going into the splitter is strong enough.
Sidenote 1:
There's the issue of characteristic impedance.
My bet is that the splitter you choose is designed for 75 ohms systems like TVs radios and cable modems. My bet is also that your 4G amplifier has a 50 ohms system as that is what is commonly used for cell phones and nearly anything related to it. The fact that the splitter does not mention 50 Ohms or 75 Ohms worries me.
Like using the splitter in the wrong way, the 50 Ohms vs 75 Ohms will not damage anything physically but it will harm the signals such that things are unlikely to work like you want. My bet is that the money you're spending on this will be wasted. You should stick with the products that the 4G extender's manufacturer sells as that is designed to work together. If they don't sell what you need then you're out of luck.
Sidenote 2:
Do realize that what you're trying to do might not work (properly). You have to be sure that the 4G (?) signals you're trying to distribute might not be in the supported frequency range of this splitter. It would be helpful to know which frequency band you are using. I know that 850 MHz is a band used for 4 G but also 1700 MHz up to 1900 MHz is used. And even though the splitter optimistically mentions 2500 MHz, in practice these cheap devices have quite poor performance at such a high frequencies.
Then there's the cables you will be using. Even at 800 MHz a decent cable will attenuate the signal, at 1700 MHz and higher signal losses can be very bad. Use the best quality (lowest loss) cable you can afford.
So if you're using 4G at 850 MHz, then what you intend to do might work. At the higher frequency bands maybe it will not work so well or not work at all.
|
H: Why build very similar diesel-electric engines in both AC and DC traction versions?
I'm reading Wikipedia on GE Evolution Series diesel-electric engines. The series includes ES44AC and ES44DC models. Looks like they are very similar but one uses AC traction and another uses DC traction. They are being built in parallel - it's not like one version is "old and boring" and the other is "newer and brighter".
These are not catenary powered engines - they don't need to be compatible with railroad electrification parameters. They just burn diesel fuel and run the onboard generators and use generated electric power to run the traction motors.
AFAIK it's usually "what combination of generator, controller and traction motor can be made most maintainable and cheap" consideration that affects the choice of generator-motors combination. However this time the manufacturer decided to build both versions at the same time.
Why build both versions in the same series of diesel-electric engines?
AI: DC Motors with series field windings have good characteristics for traction and a long history of usage on railways, but the maintenance problem of having to replace the carbon brushes. AC induction motors can only really be used for traction with variable frequency drives, so this is a trade off of simpler mechanics (no brushes) for more complex power electronics.
The rail industry is very conservative, risk averse one because you have to maintain a high level of service 24/7/365 over changing environmental conditions. Although variable frequency drives have been in use on railways since the early 90's, this is still seen as new technology.
|
H: PC power supply for 12v 24A consumer, question on 12v yellow wires
I want to buy and convert a 350W PC power supply into a 12v power supply for 20m RGBW led strips. I want to do this because I did not find any reasonable priced 12v power supply and simply because I want to build this myself.
I have found several articles and video tutorials on this topic and this seems pretty straightforward. From pure curiosity, however, I would appreciate any explanation why doing this requires cutting all yellow wires and joining them? If the power supply is 350W, means 350W / 12V = 29.2Amps (assuming 100% efficiency), a single yellow wire would not allow to pass this current due to the cross-section of the wire? (Because it will melt or something)
So, is the process of joining all +12V yellow wires mandatory and if yes why?
AI: You have a 350W PC power supply. That 350W is split across multiple 12V, 5V, 3v3 and all the other votlage rails you have on an ATX power supply. If you read the power supply's technical documentation, it will probably tell you in there what the current limit for each rail is.
So when you say you have 29.2A at 12V available, you're greatly over estimating the power.
The reason to join all the 12V rails together is a best practice idea. If there are multiple 12V paths in the PSU (which is probable) then you are keeping the load even between them all.
On top of that, you're reducing the voltage drop caused by the current through the wires. Often people talk about the current limit of a cable as if they expect the cable to melt. That is very unlikely to happen. Often the cable length will mean you'll have a 1 or 2 ohm resistance, at 1A, that means you're dropping 1 or 2V along the cable, so you're looking at more than 10% voltage drop due to cable resistance. Having two cables in parallel, you're reducing the resistance (and so volt drop) to half the value.
TLDR:
- You have a lot less than 350W to play with
- Best practice means joining the cables to spread the load
- More cables mean less voltage drop
|
H: How to crimp a ferrules(end sleeve)without a crimper?
Hi.
I know that the best way and the safe method to crimp those uninsulated ferrules is to use the appropriate crimper.
But,since i need to crimp only 3-4 wires,buying a special crimper only for that is not economic.
Which other method can i use in order that the crimp of those uninsulated end sleeve will be good enough?
Thanks.
AI: Based on experience trying myself: Just get the cheapest ferrule crimp tool you can find.
It will be better than trying to use pliers, which doesn't really make a crimp because it squashes them flat and they can easily open up from that. Flattened ferrules are also very wide and don't fit in screw terminals that would otherwise hold that gauge of wire.
|
H: Making a Hall effect sensor into a PCB
This question is related to Is it possible to “trace” a hall effect sensor on a PCB?.
As far as I understand it, a Hall effect sensor consists of a metal plate, plus a current source and an amplifier.
Instead of buying a Hall effect sensing chip, would it be possible to implement this with a PCB and a microcontroller? A metal plate is easy to come by within a PCB, and current sources, amplifiers and ADCs are available in some microcontrollers (e.g. PSoC4)
Applications for this might include current sensing in a power supply, or position sensing of a magnet.
One drawback might be that the size of the plate would have a poor tolerance. Are there any other reasons this wouldn't be possible?
AI: I did this very experiment in physics class, upper school. We used the thinnest aluminium foil available, with a very significant current, in the 1A ballpark, and a very strong magnet. The actual voltage generated was very small, barely detectable.
Commercial Hall elements use semiconductors, which have carrier densities orders of magnitude lower than that of metals, so have a Hall coefficient orders of magnitude greater.
To deal with the poor sensitivity, you would have to use a high current, a thin foil, and either a chopper/zero drift amplifier for DC excitation, or AC excitation and synchronous demodulation. It's not impossible, just very hard, and probably more expensive (to get the same sensitivity) than buying a commercial Hall IC and mounting that on the board.
|
H: STM32F0 - run user program from SPI flash memory
I'm building an application based on the STM32F030F4P6 microcontroller. During the development of the firmware, I realized that the flash memory of the microcontroller is too small.
Can I run my firmware from SPI flash memory? If yes, how could I do it?
AI: In my answer of increase memory of an atmega32 there are a lot of generic possibilities to reduce flash size.
However, the most simple way (as Colin mentioned) is to use a microcontroller with more flash.
|
H: What is this component called?
I recently bought an old coffee maker but it doesn't work. Everytime I switch it on my earth circuit breaker goes off so my whole house doesn't have electricity. I already looked on google to find something similar to it. I think it might be a thermal resistor, but I don't know how to test it and if it's broken how to get the right part again because I can't read what was written on it.
AI: Welcome to the Electronics SE.
The device you picture is a thermal fuse (aka thermal cutoff). It is not what is causing your problem. All it can do is cut off the power, and it does that only once and stays open (there is a bit of material inside that melts and the device opens up). It must be replaced with a similar type with the same melting temperature (usually marked on the side). It's purpose is to keep your house from burning down. Yours is probably fine or the machine wouldn't be blowing your breaker. Here is a datasheet showing typical models.
Most likely your heater has shorted internally, perhaps to ground. That would typically mean it's unrepairable economically because a replacement heater would be too costly, at least for a cheap coffee maker. If it's a $2K Faema commercial cappuccino maker, then of course it will be repairable. There are other possibilities such as a bad MOV or capacitor if there is electronics in the coffee maker.
Be extremely careful working with this, if the heater has shorted to ground, a faulty ground wire could cause mains voltage to appear on the housing of the kettle, which could result in a (possibly fatal) electrical shock to someone touching the housing.
The ground connection and the thermal fuse are both safety considerations that are not involved in actually boiling your water or controlling the normal shut-off, they are there to make sure a failure inside the coffee maker does not result in damage or injury.
|
H: How to protect LEDs from high voltage during NPN transitor transitions?
I am using a 555 timer and an NPN transistor to drive an array of 12 LEDs from a 9v battery, and a potentiometer to control the duty cycle. I am concerned about the voltages the LEDs will be subjected to during the transistor's on/off transitions.
My simulated circuits:
Top Level
PWM Driver
LED Array
Simulated Output
I understand that when the transistor is off, having 9v on the anode side of the LEDs is fine because there's no path to ground. Likewise, when the transistor is fully on, an operating voltage of just over 3 volts for my LEDs is fine. But real transistors won't transition between on and off instantaneously, so how can I protect my LEDs from voltage spikes that will either destroy them or wear them out faster? Is it even necessary for this circuit?
AI: There's no problem with the circuit.
The voltage across the LEDs take a bit of time to build up to the 3V because of capacitance the LEDs have. That's all you are seeing.
When the transistor turns on, the VLED voltage drops to about 0V quickly, then over a period of time the capacitance charges and the VLED voltage rises to a voltage such that the LEDs are conducting essentially all the current through R1.
Try plotting the actual voltage across the LEDs. If you are using LTspice, then just edit "V(vled)" to "V(vled) - V(vgnd) by right-clicking on the label and changing it in the Expression Editor. Also plot the LED current. You won't see excessive forward or negative voltage, nor will you see excessive LED current.
|
H: LC Network in Microchip's LoRa Gateway
I am reading the microchip's LoRaWan Gateway manual. On Page 48, I got stuck at receiving side on the LoRaWan RF circuit. It looks like they have some sort of LC Low Pass Filter. I have used this online tool to calculate it's cutoff frequency. It gave me following reading:
Results:
F = 3.3553e+9 [Hz]
Z = 31.623 [Ohms]
I am not sure about the Resistor in between them. Please help me in verifying my interpretation of the circuit. The part of schematics that I am referring has been posted below:
Can someone help me in understanding the part of the circuit that have been encircled. 1257_RFINA and 1257_RFINB goes to RF inputs (Single-ended) of two different RF transceiver chips (SX1257). TA1567A is SAW Filter and SPF5043Z is LNA.
AI: That is a narrow band power divider, basically two identical L matching networks with the inputs in parallel to match from the output of the filter (U9) to the inputs of the RF sand.
The resistor is there to improve the balance between the two halves of the thing, given that the loads are probably not really identical.
the SX1257 datasheet shows a remarkable lack of RF detail, where are the numbers for things like the RF S parameters (Nothing is really a resistive input at 1GHz), which you rather need to properly design matching networks? In fact even such useful things as IMD3 numbers are missing from the data.
|
H: How does this overcurrent indication circuit work?
Can anyone explain how the overcurrent (OVC pin) circuit below works? I am lost in all these transistors. I only get that it will output +5V on the OVC pin in the event of an overcurrent condition on either the VPP or the VDD line, but have no idea how it actually does so.
AI: Output voltage
Figure 1. R38 turns on Q11. Current flows to VDD.
Note that the voltage out will droop as current increase due to R36.
Current limit
Figure 2. When the voltage drop across R36 + D11 increases to about 0.7 V Q12 starts to turn on.
Q12 turning on will steal the bias from Q11: the base of Q11 will be pulled high and it will start to turn off. This is the current limiter.
Over-current indication
Figure 3. As Q11 turns off the voltage across its emitter-collector will increase.
When Q11's VEC exceeds about 0.7 V Q14 will start to turn on and pass current through D13, etc., to indicate over-current.
The circuit seems to be intended to interface with 5 V logic.
D13 & D10 prevent interference between the two circuits.
R39, R40 and D14 form a 5 V voltage limiter for the logic interface.
|
H: Can Mq4 sensor be used for smoke detection?
I wanted to ask if Mq4 can be used for fire smoke detection?
I read it have small sensitivity to smoke in the data sheet, but I wanted to know what is the least value in ppm for it to detect smoke ?
MQ-4 datasheet
http://www.geeetech.com/Documents/MQ-4%20Datasheet.pdf
Thanks in advance.
AI: No. This sensor is designed to be primarily sensitive to the components of compressed natural gas -- primarily methane. It is not designed as a smoke detector, and will not reliably respond to the presence of smoke or fire.
If you want to detect smoke, use a smoke detector.
|
H: TL866 programmer schematic question
See the full TL866 programmer schematic
Below is the pin driver schematic for the MiniPro TL866 universal device programmer (page 2 of the PDF schematic). The L2, L3 and L4 are powered from VDD, which can be anywhere from 2.0V to 6.0V (from the programmer spec). This limit, as far as I understand, is imposed by the operating VCC range of 74HC373D, which is also 2.0-6.0V. These latches are used to switch a pin of ZIF socket to the VDD voltage.
Now the question: say VDD was programmed to 2.0V, but the supply voltage of 74HC164D is fixed at 3.3V. So now we have L2, L3, L4 supplied 2.0V to VCC pins, but they will receive 3.3V on their D1..D8, LE and ~OE pins. How come the 74HC373Ds withstand that voltage, which is 1.3V above power supply voltage? In the datasheet, the input voltage absolute maximum ratings are specified as -0.5 to VCC + 0.5.
Sorry for a possibly silly question!
AI: See the image below, and notice that L4's VCC will not be lower than ( 5V - V_D6 ). With VDD less than 5V, L4, L3, and L2 will receive power from the 5V rail instead. So with L4's VCC at approximately 4.3V, you don't violate the part's limit on V_IN - V_CC
|
H: Could the extra power not used through a regulator or buck converter be used in another load without taking away power from the regulator?
I’m making a design for a crank generator which will charge my phone and a battery at the same time. The generator will be connected to a bridge rectifier, then a buck (step down) converter, which will be connected to a usb. Is there any way the I’ll be able to use the power not drawn by the buck converter to charge a battery? And would I have to worry about to much current in the usb with or without drawing the extra power unused by the buck converter? (The generator power is alternating and will fluctuate in max volts because it will be power by my bike while riding). It would help if you could give me a layout for how it would work and how to regulate the current.
AI: This will not be too difficult. If you charge a capacitance with the output of the bridge rectifier, the voltage on the capacitor will decrease as loads are increased and increase as loads are decreased.
The buck converter will attempt to maintain a steady output voltage of 5V, and the more the phone draws, the more the voltage will tend to deviate from this. If it's rated at 5V, 2A, it should be able to hold a relatively steady 5V at a 2A load, although this does not mean it will work with adaptive fast charge or similar. Whatever load you put on the buck converter, it will just attempt to pull as much electricity as it needs to to maintain it's output voltage. If it draws more power than the generator can provide, the generator's output voltage will decrease until it is no longer able to run the buck converter, and depending on it's design, the buck converter will hopefully shut off, rather than operating in brownout. You can control the voltage at which this occurs. If you increase the voltage to the buck converter, on the other hand, the output will stay the same, just the buck converter will be operating at a different duty cycle, so extra power from the generator will not "come through" the buck converter in the way you are imagining, so if you want your loads to react to the generator output, you need to sense it on the input side of your voltage converter. Your battery bank does not have to be an over-the counter 5v input 5v output battery bank, and in fact using one is an extra, unnecessary voltage conversion, so it may be best to avoid wasting power this way, however, if you do want to, you can simply have a second buck converter/USB charger for the battery bank that turns on as described here.
The highest voltage that can be reached will be determined by the peak no load voltage coming out of the rectifier. Be aware that you can use MPPT(Maximum Power Point Tracking) to optimize the output voltage and current. If the minimum voltage for your buck converter to turn on is, say 6V, you can simply use a higher trigger point for the battery charger.
So if you're at a stop, the phone charger charges from the battery bank when the capacitor is at less than 6v. You start pedaling again, and when voltage hits 6v, the phone stops charging from the battery bank and is connected to charge off the buck converter. As voltage increases with your velocity and your phone charges(decreasing draw from 2A to ?), you will hopefully reach a point where you are producing more power than the 10W plus losses the phone charger can use, and when voltage goes above, say 7V, the battery charger comes online and charges the battery bank until the voltage on the output cap goes back below 7V.
If you use a multilevel setup like this, and your phone becomes completely charged, there will be no load to keep the voltage below 7v and it will automatically charge your battery bank with extra power. This may appear to be complicated, but it will allow you relatively optimal efficiency at a low skill level. You just need to learn enough to get over the hump. Keep reading and I'll see if I can provide you a block diagram a bit later.
You should start learning the most basic electrical math, Ohm's Law, Watt's Law, Kirchoff's current law. To do what I'm describing you'll have to use some voltage converters and op amps. If you can get your hands on a multimeter that will help you figure out your generator's max and minimum operating voltages. You need to figure out how you'll be attaching things as well and a bit of soldering might be necessary as well.
If your budget is going to be limited or you need to salvage parts, start looking for things to use as a generator and spinning them up to see how much power you can get from them. Start watching for cheap or secondhand automotive USB chargers. You can repurpose these if you want instead of buying a buck converter. Many of the ones I've tested work all the way from about 5.5 input volts to 18 or 20, and they can be had as cheaply as free. Decide what you want to use as a battery bank. Is it just a second USB device so you can carry it away or is it part of the bike/charger? If it's part of the bike/charger, you'll have to find a charger board for it that works over the voltage range of your generator. Once you get this figured out I can help you some more. Keep at it. If you learn this stuff at your age it can be a massive advantage for pursuing similar material later in life.
|
H: Testing regulated power supply: 100 mA current sink
Disclaimer: I'm trying to learn about circuits on my own. I'm reading as much as possible to avoid any basic mistakes, but if there's any, please point it out and I'll investigate further in that direction! Sometimes the problem is not lack of interest, but not knowing what you don't know (if that makes any sense). :-)
I want to build an Ammeter circuit to measure currents with an Arduino. But before I do that, I was planning to build my own current sink, in order to be able to connect it to my regulated power source and be able to draw currents to verify the measurements.
Since I have many LM358Ns, I figured I could try to reproduce the "High Compliance Current Sink" from page 18 in this datasheet.
The maximum current that I want to sink is 100mA.
I've designed a prototype and simulated connecting a 5V power source:
The current values in Cload1 and 2 seem to be perfectly aligned with the voltage in Vreg1 and 2.
I have a few questions though:
I've split the circuit in two different LM358Ns because I believe the 2n2222s are dissipating 250mW each (5V, 0.05A). Is this correct?
Is it ok to use a single POT like I'm using for both LM358Ns?
And last but not least: let me know if there's any improvement, or anything else that's obviously wrong with either the theory or my implementation of it!
Thanks!
AI: At 5V you should probably be OK. But who knows what the safe operating area is for those transistors... Why not use a 2n3055 after the 2n2222? Then the 2n3055 will never fail at least up to 10V and 2A. Also, be very careful if you replace the transistor with a mosfet in any electronic load. Check the DC SOA curve of the mosfet. [At 10V and 200mA, probably even a BD139 will be fine, and has a hole to attach a heatsink.] Make sure it is in a darlington configuration with the 2n2222, so base current (op amp output) is minimal and will not throw off readings.
As for your question, LM358 has a fairly high offset voltage. Additionally, load resistors will not be matched. So the op amps will settle at different voltages across the resistors. Meaning, different currents through the transistors. Should probably not cause a thermal runaway (as long as transistor SOA is maintained at DC). But, probably better to use a single op amp if you want any reliability between readings and linearity (i.e. single op amp driving 2 transistors, each with its own separate load resistor at emitter).
Why is it a problem? Probably not a problem if an ammeter is permanently attached to collector. Although, it will never be as accurate as placing ammeter at emitter, due to base current coming from op amp. Also, the components will have different temperature characteristics, so results may not be repeatable with respect to the position of the reference pot wiper position. Also, it is mighty inconvenient if you just want to measure voltage at the load resistor and calculate current, since there are two of them.
Since the circuit aims to calculate microcontroller current, I'm guessing accuracy is a requirement, if not at uA range, then at least in 0-5mA range. Probably best to use a TIP122, or a really suitable mosfet rated for linear use. If the circuit is never ever operated at voltages above 10V, an IRFZ44N might be fine up to 1A See my question here. Since no gate current flows into the source, this will give most accurate result.
PS: also, your schematic shows the LM358 running from the same supply. I'm assuming you have a separate regulated source for the LM358 and reference pot.... i.e. they are not connected to the transistor collectors which should be at the power supply under test.
|
H: Adding large numbers in context of analog computing?
I have been reading about analog computing yet have not been able to find material about a certain issue; in reference to arithmetic, it is said that op-amps are used to perform these tasks, for example addition with a summing amplifier:
What about when one wants to sum larger numbers? (>10^5) I have though about say using smaller input voltages and then multiplying them with a high gain but that would require the op-amp to have a higher rail voltage to avoid saturation, as well as potentially loosing accuracy if one wanted to keep the voltages bounded between the rails.
In analog computing, is there are formal method of summing (or any form of arithmetic) large numbers (without working with thousands and thousands of volts) whilst not sacrificing accuracy in the process?
AI: The high voltage needed problem can be solved by choosing the correct scaling. If you used 1 uV to represent a value of one you can work at scales of 10^6. You would however have problems generating and measuring such fine graduations of voltage.
This assumes that your circuit is ideal. In practice the resistors and opamp have tolerances that will severely impact the accuracy of your results if you are trying to work to this precision.
If you need accurate arithmetic at scales of 10^5 go with a digital representation and adders.
|
H: How do electrons travel in data transmission wires?
I've searched and googled quite a bit on this subject, but haven't found any concrete answers. I understand that pulses are generated at the transmitter's end to get to the receiver's end.
More in specific, is it possible for the electrons to reach the other end of the wire if power is cut while current is already flowing?
And also, is it taken into account with this kind of propagation delay when establishing data transmission connections generally?
AI: "I understand that pulses are generated at the transmitter's end to get to the receiver's end."
That is one of the ways we could transport information, there are other ways (which are usually more complex) as well.
"is it possible for the electrons to reach the other end of the wire if power is cut early from the source (a flow is already going through the wire)?"
I think in your view you see one (or a bunch of) electron(s) "carrying" the data to the other end. So to send something, an electron is pushed in by the transmitter and after a while it appears at the receiver.
That's not how it works! The conductor (wire) doing the actual transport is full with electrons. If I push in an electron then almost immediately (this change / wave travels at almost the speed of light) at the other end an electron will be pushed out. So the electron going in and the electron coming out are not the same one. And it does not have to be as they're all the same! So you would not be able to tell the difference anyway.
So if the wave is already travelling in the conductor and the connection to the transmitter is lost, the wave would still reach the receiver, no information is lost.
"is it taken into account with this kind of propagation delay when establishing data transmission connections generally?"
Yes, that is the electron(s) causing a wave in the conductor. This wave travels at about the speed of light. It is indeed an effect that needs to be considered for fast (high datarate) connections.
Example: take a look at a modern PC motherboard, more specifically the connections between the CPU and the RAM (memory). Note how some wires "wiggle" which seems pointless at that only makes them longer. But that's exactly the point, all wires need to be of the same length as we cannot have some bits arrive early and some later. All have to arrive at the same time so the traces need to be of equal length so all have the same propagation delay. There's an example in this question.
|
H: Step up converter 1-3V to 5V fixed for supercapacitor
I would like to use this step up converter, LT1073 - Micropower
DC/DC Converter
Adjustable and Fixed 5V, 12V, to drive an input in the range of 1 V to 3 V (input is a supercapacitor).
In the datasheet there are examples of voltage inputs from 1.05 V to 1.55 V to get a fixed 5 V output. Could this IC work with an input range of 1.05 V to 3 V to get 5 V voltage at the output?
The capacitor I am using is 2.3V 50F, so if you have any suggestions how to use it at highest efficiency, please share your advices.
AI: First page of the datasheet, left hand side says "Operates at Supply Voltages from 1V to 30V".
Page two says "input voltage... step up mode... 1.0 (min) 12,6 (max)".
Page 6 says input of 1.05V, output of 5.
So, the datasheet says in three places that it will work.
|
H: What kind of rubber "melts" plastic?
I know this should probably be posted in a chemistry exchange, but I figured the parts are pretty standard electronics equipment that the question might be more relevant here.
So a couple of breadboards had been lying in a box with a rubbered aligator wire sandwitched between. They've been there for maybe a month untouched. No other chemical or electricity has been present and only ambient heat (hot summer but 30°C tops here in Sweden). I'm pretty shocked that the plastic of these two different styles of breadboards both got so messed up simply by touching this rubber:
Should I be concerned? Is either the plastic or the rubber dangerous to me?
AI: "Melts" isn't the correct term here -- that would involve heat.
The vinyl boot on the alligator clip contains a solvent called a plasticizer that helps keep it pliable. However, it is volatile and its outgassing has also affected the plastic used in the breadboards.
The solvent is a volatile organic compound, and is probably dangerous if concentrated sufficiently, but at the low rate that it outgasses in a reasonably ventilated space, it is generally considered safe.
|
H: Should I wear a grounded ESD strap when probing/debugging my raw boards?
Manufacturing and handling the unpowered boards, the assembly workers often use strict ESD control: dissipative mats, smocks, and grounded wrist bands.
As an embedded engineer, I am always powering and probing up my raw boards (without the plastics enclosures) at my cubicle... JTAG debugging them without any sort of ESD safety.
What is the recommended guidance on this? Should I be worried about ESD? Do I need to be wearing any ESD gloves/strap?
note: the humidity in my office is around 40-50%
AI: My entire office is carpeted, and we constantly debug/test raw PCBAs at our desks. I take care to ground myself on metal objects around me, and I have an ESD mat on my desk. When I have to transport boards, I put them in ESD bags. I also take care to ground myself after getting up from my chair, or upon sitting down. When passing off boards to others, we always do the "EE's handshake", where we touch hands before exchanging the PCBAs.
This has worked well for us, and I have yet to see a PCBA damaged due to unintentional ESD.
|
H: How to connect the PHY crystal for RMII?
I'm attempting to implement Ethernet communication for the first time and have run into an issue with my PHY. I'm using the KSZ8091RNBCA. According to the datasheet, when running in RMII mode, the XO pin is supposed to be left unconnected (Tables 2-3, 3-2). Figure 3-4, shown below, shows that my external 50MHz crystal needs to be connected to both the XI pin on the PHY and the REF_CLK line.
Since both paths are shown coming out of the crystal, does REF_CLK come off the same pin as XI, or does it come off of the other pin, where the XO would normally go?
simulate this circuit – Schematic created using CircuitLab
AI: Figure 3-4 shows an oscillator, not a crystal.
Similarly, the datasheet says "RMII - 50 MHZ CLOCK MODE [...] An external 50 MHz clock source (oscillator) connected to XI"
A "crystal" would be excited by XO and the desired clock frequency would come into XI. In this context, an "oscillator" is something which excites itself externally, and just provides a clock to your device's XI or REF_CLK input.
The datasheet is trying to tell you to use some external device which provides a 50MHz clock without needing to be excited by XO.
|
H: Weird waveform when using potentiometer as volumecontrol
I am making a remote volume control for my TV, as my amplifier only as a physical button. My idea is to control a digital potentiometer with an microcontroller. I have build the circuit shown on the follwing figure:
simulate this circuit – Schematic created using CircuitLab
The potentiometer shown is a MCP42100, controlled with the microcontroller. As it is for stereo, two of the circuits is used.
When the volume is full, the signal is as it needs to be, when feeding it a sine signal.
However, when i use the potentiometer for attenuation the signal, i get a signal like this:
I do not understand why i get something like this, as it is just passive components and a voltage follower.
The parts: C1, R1 and R2 was added, because i had a signal like this:
This is clearly some kind of clipping, so i added some biasing, which works.
Even through it works, i do not understand why, or even why it is needed as the only component the biasing is connected to is the potentiometer.
I suspect that this is coursed for the same reason as the other problem.
I start to belive that the potentiometer is at fault, but i dont know how.
This is the datasheet i am using for the potentiometer:
http://ww1.microchip.com/downloads/en/DeviceDoc/11195c.pdf
Can anyone tell me what i might fail to see?
AI: Here's one potential reason:
You're sending an audio signal with a +12 V DC offset into an IC that is designed for much lower voltages.
EDIT: Here is brhans' solution:
simulate this circuit – Schematic created using CircuitLab
|
H: Calculation of collector resistance for maximum output swing
simulate this circuit – Schematic created using CircuitLab
Question from Sedra and Smith (7th Edition)
Question: The given bias arrangement is to be used for a common-base amplifier. Design the circuit to establish a dc emitter current of 1 mA and provide the highest possible voltage gain while allowing for a maximum signal swing at the collector of ±2 V. Use +10 V and -5 V for power supplies.
So far, I have calculated Rb = 0 and Re = 4.3k ohms. But I am unable to proceed further, for Rc. I tried the following approach,
$$ I_{E} = I_{C} = 1 mA $$
$$ V_{E} = - 0.7 V $$
$$ V_{C} = V_{CC} - I_{C}*R_{C} $$
$$ R_{C} = \frac{V_{CC} - V_{C}}{I_{C}} $$
$$ R_{C} = \frac{10\pm2}{1 \times 10^{-3}} $$
Answer: $$ R_{C} = 8.4k \Omega $$
What am I doing wrong here?
Edit:
The text before the question is as follows: Note that if the transistor is used with the base grounded (i.e. the common base configuration), then Rb can be eliminated altogether. On the other hand, if the input signal is to be coupled to the base, then Rb is needed.
Also, my textbook considers that \$ V_{BE} = 0.7 V \$, and as \$ V_{B} = 0 \$, hence \$ V_{E} = -0.7 V \$.
AI: So far, I have calculated Rb = 0 and Re = 4.3k ohms. But I am unable
to proceed further, for Rc
So far so good.
Next you need to consider the midpoint voltage on the collector that would allow maximum p-p swing for an output signal without clipping top or bottom. Clearly the output could swing as high as +Vcc so that's 50% done but how low can Vc swing?
The simple and straightforward answer (assuming that I didn’t make a stupid error, which of course I did lol) is that Vc can swing no lower than Vb - 0.7 volts else the CB region is forward biased hence the midpoint is half way between +10 volts and +4.3 volts. However, I'd give some margin at the low end to ensure that the base-collector region doesn't saturate (you lose beta when that happens) so I'd say the optimum midpoint of Vc is +7.5 volts.
That means that Rc drops 2.5 volts at 1 mA or conversely, has a resistance of 2.5 kohm.
This calculation assumes that the base resistance Rb is zero ohms (as is usually the case in common-base to prevent miller effects).
Edited section due to mistake in the above calculation.
I made a mistake above by assuming Vb is at 5 volts but of course it’s at 0 volts hence, the lowest collector voltage that can be comfortably reached is 0 volts (or maybe a tad less) but I’m comfortable with 0 volts. The implication is that the Vc midpoint is 5 volts and therefore Rc drops 5 volts and is a value of 5 kohm for 1 mA collector current.
|
H: How to limit the output voltage of a TCXO?
I am using an SiT1552 MEMS TCXO providing 32.768 kHz. It will be sourcing two ICs: a microcontroller and a DA14580 Bluetooth Low Energy transceiver.
The ICs and TCXO are all powered by 3.3V. The TCXO output is the standard 10%-90% LVCMOS voltage swing. It can drive up to 100 pF. It is not AC-coupled.
The MCU is happy with this voltage swing. It wants ~50% duty cycle.
The BLE clock input, however, is internally AC-coupled and needs a 0.1 - 1.5V (pk-pk) voltage swing.
In an app note which requires registration to view, it suggests to use a series capacitor for attenuation:
I can do this with a larger cap so as to attenuate the signal even more. The TCXO can handle the extra load.
Here is the result.
Does it look sane?
Will the MCU remain happy?
Is there a better method?
.
simulate this circuit – Schematic created using CircuitLab
AI: No, you want a smaller value series capacitor (higher impedance) in order to get more attenuation.
For example, if you use a 6.8 pF series capacitor with the load capacitance of 6-9 pF, you'll reduce the signal amplitude to about half its original value.
If you're trying to reduce a 3.3Vpp to less than 1.5Vpp, you'll want an even smaller value. If the load capacitance is just 6 pF (worst case), then the series capacitor should be no larger than 5 pF. Try 4.7 pF (next lower standard value).
Otherwise, looks fine.
Of course, these values are very tiny, to the point where parasitic capacitances could seriously affect the results. To mitigate this, you could add an additional external capacitor in parallel with the input capacitance of the BLE chip:
simulate this circuit – Schematic created using CircuitLab
Note that this arrangement still limits a 3.3Vpp input to 1.5Vpp going to the BLE chip. The source sees a net capacitance of a little more than 15 pF to ground as its load.
|
H: Why are two maximum power dissipation mentioned for this transistor?
I am wondering why manufacturers mention two different maximum power dissipation values for transistors like 2N1613:
Does it have anything to do with whether a heatsink is used or not?
AI: Normally transistor power dissipation is quoted for TA and TC. Renesas explain it as follows:
The specification at TA = 25°C in the power ratings refers to the total power dissipation of a discrete semiconductor element in an environment with an ambient temperature of 25°C. In this case, the thermal resistance from the heat source to the ambient air is expressed as Rth(j-a).
The specification at TC = 25°C in the power ratings refers to the total power dissipation when the semiconductor element (case) itself has been forcibly cooled, i.e., when temperature of the package surface is kept at 25°C.
Note that the ratings may include the note "with infinite heat sink". However, in actual use, it is very difficult to make the package surface temperature exactly 25°C, and if you also take derating into account, the allowable power will in fact be somewhere in between TA = 25°C and TC = 25°C.
In your example, the maximum power dissipation when TC = 25°C is 3.0 W and the maximum power dissipation when TA = 25°C is 0.8 W. Note that when the ambient temperature is 25°C the case temperature is likely much higher, so the maximum power rating must be lower.
Adequate cooling makes a big difference.
|
H: Log-Taper Variable Resistor from Linear-Taper
I'll start by saying: I've read quite a bit about how to make a "log taper potentiometer" using a resistor and linear-taper potentiometer, but I'm not sure if that will work in my case.
I'm working on an all-pass filter to use as a corrective phase-shift for an active-noise-cancellation circuit I'm designing. This circuit will be used primarily to filter out car noises from a nearby highway when I'm trying to sleep.
I'm using this diagram for my phase-shift/all-pass filter:
I figure I should be able to modify VR1 and R6 to give me the frequency response I'm looking for.
As I understand it, the 90-degree (center) frequency is calculated by f=1/(2*pi*R*C). I want that frequency to be user-variable between ~30hz and 3kHz. I figure it's easier (and probably more reliable/cheaper) to use a variable resistor than it is to use a variable capacitor, but maybe I'm wrong - I don't have a lot of experience with variable capacitors. For the capacitance provided in the diagram (100nF) I've calculated I'll need ~500 ohms of resistance for the top of my frequency range, and ~50Kohms of resistance for the bottom. Thus I need to use a variable resistor that ranges approximately 50Kohm - pretty good, pretty standard.
When I graph the frequency vs linear rheostat position, however, I don't get a very good response:
It looks like the first 1/5 of the range of the rheostat/potentiometer will cover 90%+ of my frequency range, though - so I guess I'd better use a log-taper potentiometer. I want it to closely approximate the log curve rather than a cheap 2-line approximation (though maybe it's better to just give up on this count) - which means either:
A) find an expensive accurate log-taper potentiometer,
B) Approximate it myself
Here I run into another problem: from my research, it's easy to do a reverse-log taper variable resistor, but I can only make a linear-taper potentiometer into a log-taper if I'm using it as a voltage divider. I don't know if a voltage divider is appropriate for my intended use. If so, I'm not sure how to visualize it.
My question, then, is: What are my options? Is it possible to make a log-taper variable resistor that's not in a voltage divider configuration? If so, how? If not so, is it appropriate to use a voltage divider configuration here? If so, what values would you recommend, and how best to hook it up? If neither is possible/acceptable, what other options remain to me (aside from giving up)?
And, as a side, if you see anything wrong with my overall idea/proposition for this active-noise-cancellation circuit, let me know!
AI: Getting an accurate log-pot to cover 2 decades of resistance (30Hz to 3kHz) is going to be a tall order.
Commercial audio 'log' pots use a 2 or 3 section linear taper because it's 'good enough' for most applications. Even though not 'accurate', one of these would improve the uniformity of turn angle to log frequency over what you have at the moment. I am sure you don't need perfect accuracy per se, but a more uniform sensitivity of turn angle to log frequency response.
A real log pot can be specified, but it would either cost you lots of money, because of its rarity, or you'd need to be lucky and in the right place at the right time to pick up a second hand one.
You may want to consider a 12-way switch instead of a pot. Would 12 steps between 30Hz and 3kHz, which start 30, 45, 70, and finish 1300, 2000, 3000, be sufficiently fine steps? Is the audible difference between a 160Hz and 250Hz frequency setting so big that you need a 200Hz option? Having a switch allows you to pick the resistors to give you exactly the curve you need. I specify 12-way as they are readily available and inexpensive, you can get more ways but the price goes up steeply.
Another possibility is to divide the two decade range into sub-ranges, and switch capacitors. A single switch could switch the capacitor between two values to split the range 30-300 and 300-3k. This would ease the log-law requirement on the pot from two decades to one. You could use more ways for finer sub-ranges, but that's probably not necessary.
|
H: How can this capacitator discharge? (Make: Electronics experiment 9)
I am trying to get through Make: Electronics book and I cannot understand, how does capacitor in following circuit discharge when I press B button.
Wouldn't the current just go in the circle that push button completed, since there is no loop with ground?
AI: The current goes in a circle and that discharges the capacitor.
Capacitors store energy by charging the two plates in opposite "directions". A discharged capacitor has no charge on either plate. When you charge it, one plate gets positively charged and the other plate gets negatively charged.
When you connect the capacitor in a circle, the two plates equalize again, which means the capacitor is discharged.
|
H: Battery Life Estimation - Sanity check
I'm trying to estimate the battery life of my device and just need a sanity check since numbers I'm getting are wildly different depending on the method I use to calculate battery life. For brevity I'm going to write first method that I've tried.
Device will spend 7 seconds in active mode, during which average current is 5mA. After that unit spends 600 seconds in sleep mode, where average current is 70uA.
So total period is 607 seconds, meaning ~0.012% of the time unit is drawing 5mA, while rest of the 99.988% it's drawing 70uA. So assuming this logic is sound (which might not be the case) my unit is drawing
(0.012*5 + 99.988*0.07)mA = ~7.06mA
On 1000mA battery with 0.7 factor (700mAh), that means my unit will run for ~99 hours?
Does this makes sense?
Is there a better way to calculate/estimate battery life if your unit is not drawing constant current like in this case?
AI: "... So total period is 607 seconds, meaning ~0.012% of the time unit is drawing 5mA ...*"
No, it's 0.012 of the time (with no '%' symbol). That's 0.012/1, not 0.012/100 of the time.
That means that the remaining time is 0.988, not 99.988.
$$ 0.012 \times 5 + 99.988 \times 0.07 = ~7.0 \ \text {mA} $$
should have been
$$ 0.012 \times 5 + 0.988 \times 0.07 = ~0.127 \ \text {mA} $$
|
H: Should I add bypass capacitor for every IC and Microcontroller?
I am expecting a noise from a Power Source caused by motors.
However my setup already includes a buck-converter, and have the input and output capacitors. Should I add bypass capacitors for the powers on the IC's and Microcontroller like the Particle Photon. What will be its effect since it would add up capacitance values since they are all parallel.
AI: The "Particle Photon" device already has bypass capacitors on it.
In general, for any design you would want to decouple every IC.
At low frequencies you are correct, the capacitance adds up. But at higher frequencies, like harmonics generated from a buck converter, the bypass capacitors will act in a distributed way. An IC that has no bypass capacitor near it will have a higher (read worse) impedance to ground at higher frequencies. The "capacitor on every IC" rule of thumb makes it so that each individual IC sees their own nearby bypass capacitor first thing, so there will be a lower impedance to ground and better power-integrity for higher frequencies.
tl;dr: yes.
|
H: Soldering alternatives for a relay
I have to confess that I'm not a handy person thus soldering is too difficult for me. I was researching on the internet about soldering alternatives but all of them are done for soldering 2 cables.
I need an alternative for soldering a cable with a relay (those with 3mm or 4mm pins).
AI: Many relays come with flat tab contacts known by brand name as 'faston' or 'lucar', or more generically as spade or blade terminals. These mate with terminals that can be crimped onto wires.
Some relays are available that plug in to bases equipped with screw terminals.
|
H: Differential amplifier and differential signals in small signal analyses
I'm studying the differential amplifier on different books (Razavi and Sedra-Smith).
I've understood how this circuit works, but I have some questions. When authors analyze this circuit (2 identical mosfets or two identical BJTs with a current source below them, as shown in figure) for small signals, they always assume differential inputs, that is: v1 = -v2
Question: why is this assumption required? When this circuit is used as the first stage of an operational amplifier in a negative feedback fashion, who says that the inverting and non-inverting terminals will have v1 = -v2 ? Negative feedback says that the input differential input of the op-amp is very very small (and for a very very small differential input collector currents of the differential amplifier are linear), I don't understand then why v1 should be equal to -v2. Small signal analyses should (in my opinion) consider the case in which v1-v2 is very very small, but not necessarily v1=-v2
Thanks
AI: The background for the assumption (V1-V2) is simple: Gain calculation.
Consider the following: We have two arbritrary input voltages Vx and Vy.
These voltages can be split into two parts:
Common mode voltage; Vcm=(Vx+Vy)/2 ;
Push-pull voltage: Vpp=(Vx-Vy)/2 ;
Hence, it is easy to show that Vx=Vcm+Vpp and Vy=Vcm-Vpp
Now it is easy to calculate the gain:
Vcm is amplified with the common mode gain Acm (which is very low and approaches zero if the common dynamic emitter resistor is infinte >>> ideal current source) .
Vpp is amplified with the push-pull gain App which can be given immediately because Vpp is applied to both inputs - however with opposite sign. As a consequence, the collector current increase in one transistor will be compensated by a corresponding decrease in the other transistor. As a consequence, there will be no negative feedback effect - and the gain App is identical to the classical gain of an emitter stage without feedback: App=-gm*Rc.
Hence, the output voltages are:
(1) Vout1=AcmVcm+AppVpp=VcmAcm+gmRc(Vx-Vy)/2
(2) Vout2=AcmVcm-AppVpp=VcmAcm-gmRc(Vx-Vy)/2
For an ideal emitter current source, we have Acm=0 and the output voltages are:
Vout1,2=(+-)Vd*(Vx-Vy) with the differential gain Vd=-gmRc/2.
Fazit: The calculation of the combined gain is very simple if we split each of the two input voltages Vx, Vy into two parts (common mode resp. push-pull mode). Of course, the push-pull mode dominates for a high-quality diff. amplifier - and the gain for the push-pull voltages is very easy to calculate because these parts are equal in magnitude, but opposite in sign.
Note that the voltages V1, V2 as mentioned in the original question are identical to Vx and Vy, respectively: V1=Vx=Vcm+Vpp and V2=Vy=Vcm-Vpp.
However, if we consider the DIFFERENCE V1-V2 only (and assuming Acm=0) the common mode parts play no role (are not amplified) and it is sufficient to consider this difference only:
V1-V2=Vpp-(-Vpp)
|
H: Ideal switch acting on a capacitor
Let's consider this circuit:
and suppose that the capacitor C1, charged at the input voltage Vin, at time t=0 is connected by the switch to the virtual ground. Assume also that C and C0 are initially discharged.
First question: How does the book I'm reading show that:
Second question: If C1 has an initial voltage vin, how can the switch modify the voltage of C1 to the virtual ground? I know that the voltage across a capacitor cannot change instantly.
Thanks
AI: Consider the charge on C1 (charege Q = CV) then consider that at the instant the perfect switch closes, that charge is then shared amongst three capacitors and the net value of those three capacitors is the denominator in the formula i.e. C1 in parallel with the series combination of C and Co.
Charge therefore rapidly redistributes and the result is that the voltage falls because charge is not lost. Nothing to do with the opamp (yet) because it all happens far too quickly with ideal components.
The 2nd formula in your first question is of a capacitive potential divider using C and Co. This bit should make sense now (hopefully) and agin it happens in virtually no time at all.
For your 2nd question, forget about a virtual ground; this won’t come into play until the opamp has got wise to its input voltage disparity and slowly (a few microseconds or milliseconds) restore the virtual earth situation.
|
H: Problem with the fall time of a NPN transistor
I have the below circuit to translate a slow digital MCU on/off (3.3V) signal to a higher voltage signal (range from 12 to 24V). I have a specific attention for the Vin=12Vdc case, the voltage drop from Vin to Vsignalout shouldn't be more than 2V (extra safety guard is always good). With the below circuit I have about 1.7V drop that is ok.
But I have a big problem with the signal fall time is about 200 us that is too much (acceptable level should be about <80 us for my purpose).
This is the signal monitor for the above circuit (R2 is 1k):
The green signal represents the base signal of U$2 (now I see, I could rename it as T2 anyway), and the yellow one represents the signal at the collector.
Below one is for R2 is 100 k:
(The green probe is on the collector this time) First, I thought lowering the current helped the fall time, but e.g., I tried with 1 M ohm that had the same signal.
I am not really sure why my fall time is terrible and how to fix the problem. Do I make a mistake by not using an extra base resistor for U$2?
Here are the datasheet of the transistors:
U$2: PZT2222AT1G
Q1: BCW66GLT1
One interesting thing is that I use MJD31C for the same circuit configuration that gets quite decent signal (but the voltage drop is too much that I am trying to replace it with PZT222A).
I got stuck on it and would highly appreciate for any suggestion
I was playing with R1 resistor by lowering the value to let it conduct more current, placed 47 ohm, but didn't help (MCU's GPIO has 2mA limitation).
If anyone asks U$1 is a LDO to limit the output voltage to 15V, and the end diode is a CLD to limit the output current, I tested with them by removing and short circuit their paths, but it didn't help the signal ( my circuit should work with those components anyway).
AI: You've probed around in a good fashion but you neglected to look at the emitter signal. It will fall more rapidly but the diode then becomes reverse biased due to stray (or actual) output capacitance holding the cathode at a positive potential therefore the true output trundles back to 0 volts much more slowly.
Between the base-emitter region shutting down and the reverse bias on the diode you have the problem. Try putting a real load on the circuit or even a 1 kohm from emitter to ground or both.
|
H: How to determine DC input voltage of a device without its charger?
Had a MotoMaster (Canadian Tire) 27/3 LED flashlight for 4 years now. Model was discontinued 2-3 years ago. Lost the charger at least 2 years ago and the light's battery FINALLY died today (!!)
I need to find out what is the correct voltage and order a DC charger for it. Is there a way to determine the values without the charger?
Obviously, I'm asking because absolutely no value is written on the flashlight, except for polarity and a model # that gives absolutely nothing on Google: 037-9405-8
AI: There is really no direct way to know. You can maybe guess by looking at current draw as a function of voltage, the battery arrangement, etc.
This is really not a electronics problem. The obvious first approach is to ask the manufacturer. 2 years isn't that long. Somebody should still know what the charger specs were.
Failing that, search around to find someone else with this device. This could be someone trying to sell one, for example. Maybe they will look at their charger and tell you it's voltage as a favor.
|
H: If there are more capacitors, are there more amperes?
I'm really new to electronics, and I'm wondering if adding a capacitor increases the output current. I have the following questions:
Say for example, I have a 5V 1.0A Source, does the output current capacity increases if there's capacitor in parallel?
Say for example, I have a 5V 1.0A Source, and 2 x 3300uF Capacitors in parallel, and the output is drawing 5V 3.0A, can it accommodate the 3.0A requirement of the output?
AI: Say for example, I have a 5 V 1.0 A Source, and 2 x 3300 uF capacitors in parallel, and the output is drawing 5 V, 3.0 A, can it accommodate the 3.0 A requirement of the output?
Yes, for a very short time but otherwise no.
A capacitor in this configuration behaves a bit like the water tank in your toilet. It stores charge and can deliver a short high volume flush but has to be recharged at the rate the supply can manage and this takes some time. Flushing again to soon doesn't work as the tank hasn't refilled. Adding more capacity to your tank (parallel capacitors) increases the volume you can discharge in one flush but the refill time increases proportionally. In your case the maximum fill rate is determined by the current limit in your PSU.
Figure 1. A smoothing capacitor smooths out the pulses from a rectified AC supply. Source: WikiMedia.
Usually we use capacitors in the configuration you've shown to smooth out a rectified AC supply as shown in Figure 1. The graph shows that the capacitor gets charged on each half-cycle and keeps the voltage up during the dips between pulses.
For more on this see Electronics Tutorials Full-wave rectifier
|
H: High Voltage ADC Measurements using a PIC and OpAmp
I need to make a device to measure voltage of a series stack of capacitors which will reach a maximum of 100V (DC only). On the schematic I have omitted several from the stack, balancing circuitry and the PIC support devices (xtal, decoupling), for simplicity of getting my point across. Each cap will have 5V max across it (in house made supercapacitors if you are interested!).
As the dynamics are quite fast, my usual Arduino solution just isn't quick enough so I am back to the old days of PICs, which I haven't touched for many years! 1-10ms for all 20 channels in total, ideally.
In order to measure the high voltages I assume a simple resistive divider would suffice, however this would need to be as high an impedance as possible so as to not skew the readings and require high power resistors. This puts the impedance well over the max 10k for the PIC I am using (PIC18F25K83). The PIC is running at 5V.
Current thinking, using this as inspiration, is to use an opamp to buffer the output. Not used opamps before.
Is there anything glaringly obvious that would make the magic smoke appear, or is there a better solution?
EDIT: Image cropped as requested. Quantified how fast.
AI: You may want to put a protection diode on the input of the op amp, the high voltage could easily burn up the op amp if it somehow crossed the barrier of the resistor. Take care while routing, sometimes through hole parts can be advantageous to avoid arcing and to provide separation as creepage and clearance for 100V is 0.71mm.
simulate this circuit – Schematic created using CircuitLab
|
H: Constraining combinatorial path delays in Intel Cyclone-V FPGA
I am working on a design with a Cyclone-V FPGA.
I have a PLL that generates 4 clocks of equal frequency but with 90 degree phase shift from eachother.
4 DFFs running on each of these respective clocks. The outputs of these 4 DFFs are connected to a 4:1 mux.
I would like the outputs of the 4 DFFs going into the mux to have equal path delay (or equivalently path delay to the output of the mux).
The output of this mux is a clock connected to a global clock buffer.
The mux selects only switch when all 4 mux inputs are low and will be low for a long time. Therefore, we are not concerned with constraining the mux select path.
All of the circuitry is internal to the FPGA (no I/O)
The clocks are defined here:
create_clock -name {CLK_250_IN_g[0]} -period 4.000 -waveform { 0.000 2.000 } [get_pins { inst_pllgclkbuff4_cve_CLK_250_IN|inst_cycloneve_clkctrl[0].inst_cyclonev_clkena0|outclk }]
create_clock -name {CLK_250_IN_g[1]} -period 4.000 -waveform { 1.000 3.000 } [get_pins { inst_pllgclkbuff4_cve_CLK_250_IN|inst_cycloneve_clkctrl[1].inst_cyclonev_clkena0|outclk }]
create_clock -name {CLK_250_IN_g[2]} -period 4.000 -waveform { 2.000 4.000 } [get_pins { inst_pllgclkbuff4_cve_CLK_250_IN|inst_cycloneve_clkctrl[2].inst_cyclonev_clkena0|outclk }]
create_clock -name {CLK_250_IN_g[3]} -period 4.000 -waveform { 3.000 5.000 } [get_pins { inst_pllgclkbuff4_cve_CLK_250_IN|inst_cycloneve_clkctrl[3].inst_cyclonev_clkena0|outclk }]
I attempted to achieve this by constraining this path with set_max_delay and set_min_delay in my sdc (there are 4 copies of these constraints for each of the 4 registers).
set_max_delay -from [get_cells {inst_clkgen_a|inst_clkgen_phases|CLKOUT_phases[0]}] -to [get_cells {inst_clkgen_a|inst_mux4_1_CLK_OUT|Mux0}] 0.100
set_max_delay -from [get_cells {inst_clkgen_a|inst_clkgen_phases|CLKOUT_phases[1]}] -to [get_cells {inst_clkgen_a|inst_mux4_1_CLK_OUT|Mux0}] 0.100
set_min_delay -from [get_cells {inst_clkgen_a|inst_clkgen_phases|CLKOUT_phases[0]}] -to [get_cells {inst_clkgen_a|inst_mux4_1_CLK_OUT|Mux0}] 0.000
set_min_delay -from [get_cells {inst_clkgen_a|inst_clkgen_phases|CLKOUT_phases[1]}] -to [get_cells {inst_clkgen_a|inst_mux4_1_CLK_OUT|Mux0}] 0.000
This is making no difference to the path delay from the Q output to mux.out. The resulting path delays are shown in the circuit diagram, indicating the min/max constraints are not working.
How is possible to accomplish this?
AI: Your clock constraints look fine. Your delay constraints look fine as well.
min/max constraints are not working
That's not what you should interpret from the Timing Analyser's report. You asked for \$0.1 \text{ ns}\$ max path delay, which looks unrealistic for the Timing Analyser to achieve on that path on a Cyclone-V FPGA. Around \$1 \text{ ns}\$ is the best it could come up with. In other words, your design has failed to achieve the timing requirements specified by you. Not that the constraints are wrong.
I would like the outputs of the 4 DFFs going into the mux to have equal path delay
You should not worry about getting exact path delays, as it doesn't make much sense on timing paths on a clocked synchronous design. And no Timing Analyser and Synthesiser can place and route at the exact path delays as the user wishes. You can specify only a range within which the delay should be constrained to: (min , max). Synthesiser will attempt to route your design accordingly, meeting setup and hold requirements as derived from the (min, max) constraints.
|
H: Identification of 14-pin IC from Microchip
I am sorting my shop and found a stick of ICs:
The markings on the top side are
3636
CWSA
'Microchip logo', 'another logo'
Is there a way to identify this chip?
AI: With a hint from the comments I was able to identify the ICs. I traced my orders and only a few chips with this amount, package, pins, design and manufacturer remain.
They are CAP1298 capacitive proximity sensors. On p. 60 are the markings of the different variations listed. Apparently these are production and traceability numbers.
I ordered a few shortly after they became accessible, therefore my existing stock may have different markings.
|
H: What's the criterion to move from only having CDC for the control lines to include the data buses?
I've noticed that in most designs synchronized signals crossing clock domains are implemented for control signals.
I'm, however, wondering what the criteria is to add synchronization to the data bus as well.
Would that depend on the ratio of the destination clock vs source clock? Or is it more closely associated to the number of bits to be passed between domains?
AI: If the data path uses a FIFO, as long as the pointers don’t cross the write and read paths have no asynchronous path. They're considered to be in separate clock domains. (The FIFO could even be a one- or two-level register depending on how the two sides handshake with each other.)
The managing of this pointer-cross business is dealt with by the control path, which if properly designed will ensure that the pointer-cross corner case never occurs.
An issue that comes up frequently relates to the clock ratios of read vs. write. If read clock is significantly slower, this adds turn-around latency to the write-read handshake. This comes up as the FIFO approaches full: the read pointer in the slow clock domain will take a long time to change state, delaying the FULL calculation. If the write side doesn't see this in time it can overrun the FIFO. The answer to this case is to give an earlier almost-full to the write side, so that any extra writes can still make it to the FIFO. This is called a skid buffer.
Related: what is the specific reason for using FIFO in asynchronous domain at VLSI?
|
H: Nodemcu: How to extend sensor wires?
I am using a Water flow sensor connected to v2 nodemcu. However, this sensor needs to be placed at a distance of 40 feets from nodemcu, on the 3rd floor of my apartment roof (I stay on 1st floor).
The sensor consists of 3 wires:
Red- for voltage input
Black- Ground
Yellow- sensor data
Relevant Specifications of 1/2 inch Water Flow Sensor - YF-S201:-
Model: YF-S201
Sensor Type: Hall effect
Working Voltage: 5 to 18V DC (min tested working voltage 4.5V)
Max current draw: 15mA @ 5V
Output Type: 5V TTL
Maximum water pressure: 2.0 MPa
What is the right way to extend the wiring for this sensor and does it require amplification? If yes, how?
PS: Do not want to use wifi as it is highly unreliable in outdoor conditions and susceptible to elements.
AI: The sensor outputs a digital pulse with a frequency that is linear with the flow rate, 7.5 Hz/(L/Min). It has a maximum flow of 30 L/Min so the maxium frequency is 225 Hz which is not challenging.
Solution one: use a MAX485 or equivalent at both ends with a twisted pair cable (ethernet CAT 5e should do) to transmit and receive the signal with minimal noise and number of components. Be sure to provide power to the sensor on another twisted pair and use decoupling capacitors. Cat5e has 4 pairs. This is not perfect but should do at 40 feet.
Solution two: use op amps to make a line driver for the impedance of the cable you will use, Cat5e is 100 ohms.
Solution three: use a dedicated line driver with a proper transmission line and termination.
Solution four: ad another microcontroller at the sensor side and use ethernet maybe even with PoE.
|
H: How do PCB manufacturers know how to orient polarized components?
Let's say I have diode or a polarized capacitor in my circuit.
How do PCB manufacturers know how to orient the part on the PCB?
When I create the part in Altium for example, I just make up which pin is pin 1 and which pin is pin 2. As long as the schematic matches the PCB, it won't throw an error at me.
In other words, is there something that relates the pins on the schematic and the pads on the PCB to the real-life leads of the component?
I have not seen on diode datasheets where it says "pin 1 should be the cathode, pin 2 should be the anode", unless it does say that and I am dumb.
AI: In other words, is there something that relates the pins on the schematic and the pads on the PCB to the real-life leads of the component?
None, just like there is no standard of whether the anode and cathode in a diode symbol or footprint should be pin 1 or pin 2. It's all up to you to use the appropriate footprint with the schematic symbol you use.
The component in the tape can be any which way and you have to look at the datasheet or the markings on the component sitting physically in the tape reel to know.
You sort it out with 2-way human communication (i.e. notes to the assembler. A diagram is best and clear silkscreen markings are even better.) and the guy sets up the pick and place machine does it.
I've had instances where the guy ignored diagrams accompanying my notes and assumed the silksreen "dots" (not dots as much as little random linear ticks which were artifacts of the footprints in the library I was using) floating around different components on the board were indicators for pin 1. All the ICs came backwards. The IC footprints being used in that case did not have clear pin 1 markings on the silkscreen other than the fact it was always to the top-left when the was read upright RefDes which was why I included a diagram. The diodes in that case were not part of the diagram but not a problem either because I went through their footprints and manually sure all the footprints used had a white polarity line or the actual diode symbol for their silkscreen. After all, I was going to be the one debugging and reworking the board and I needed to know what the polarity was by looking at the board. I assume the guy setting up the pick and place just looked at how the diode sat in the reel since the SMD packaging also had a white polarity line. I doubt he went to the datasheet for every single diode and looked at the packaging information.
This is a much bigger problem for some components like SMD photodiodes which, due to requiring an unobstructed face, cannot have polarity markings on the component. The only way to know which is anode and cathode is to look at which pin is bigger and smaller, but to know which is which you need to go to the datasheet. In that case you really do have to go to the datasheet and look at the packaging information to see which way they come in the reel. It's a major pain. I would probably send a snapshot of every diode datasheet page containing that info as part of the notes.
|
H: L298N constant output power
I have assembled the motor driver circuit using L298N seen below, hoping that it would work without any problem. For some reason that I do not understand, the output power is constant. I say constant because;
When nothing is connected to output, I measure 21V (such a drop is expected).
When a 1k resistor is connected, I measure 0.394V.
When a 10k resistor is connected, I measure 3.914V.
When 1M resistor is connected (basically open circuit), I measure a value close to 21V.
I don't even know what may be wrong about the circuit, tried many things but no luck. I am hoping you guys can help. Even if you can give me a tiny tip, it would be very helpful because I can dig out the rest.
Additional Info:
Vcc: 24V (Supplied from an industrial power supply with enough power output capability, so I am sure there is nothing wrong with the power supply)
L298N: I plan to replace this IC with a more modern one, but I have to use this right now.
Arduino: is powered by USB port of my laptop.
Circuit: I have triple checked the connections and cables.
Also: There are four 1N4004 diodes connected to OUT1 and OUT2, moreover four more diodes connected to OUT3 and OUT4 (in order to prevent back emf.)
AI: You can't leave CS pins open, nephew.
As you can see from the block diagram above, the emitters of the bridge transistors go to the CS pins. So, connect these pins to GND directly, or through a low resistance if you are planning to measure the load current.
|
H: Can I use two switches on one mouse button?
I am doing a diy project where I replace the mouse switches with a mechanical switch. I wish to wire two mechanical switches in parallel to a computer mouse left-click button. They will be wired in so that either switch will generate a mouse left-click and I would like to know if it is possible to do it?
AI: If it is a standard push button that makes two contacts to close when button is closed, in theory it is possible to connect infinitely many buttons that all click the left mouse button.
|
H: How is I2C signal integrity maintained over monitor cables for EDID?
Computer monitors (and other similar display equipment) use the I2C protocol with 5V signal levels to send EDID information to the "host".
I2C's typical use case is for short connections on a PCB or between PCBs in an enclosure. I myself have needed to use I2C for long cable runs and I often have to use differential I2C in order to get good noise immunity.
Given the relatively long length of some monitor cables and the proximity of other high-frequency digital signals on the same cable, how is the reliability/immunity of the I2C EDID link ensured in this case?
AI: The answer is unfortunately not very exciting.
First of all the high frequency data lanes are differential pairs, so their currents will sum to zero in ideal case, and the differential pairs are shielded so they have practically zero effect to DDC bus.
And there are no other unshielded high frequency signals that could couple to DDC bus. Basically DDC and other wires just run paralllel without shielding in the wire.
The EDID itself has a specific data structure which includes a checksum to detect if host has read it correctly or not, and host can retry the read if there seems to be an error.
|
H: DC to DC converter connection
I am fairly new to electronics and I started to have some doubts. I am going to use a DC to DC converter R1SE-0505/H2-R (5V to 5V) to have an isolated power supply for the audio components. I have just realized that in the datasheet connection schema there is a negative voltage supply needed to connect to this converter. Is it safe and will it still work properly if I connect the ground to the negative voltage input pin?
AI: The converter does not need negative input voltages.
The converter takes 5V in.
If you have 5V difference, e.g. 5V for the positive terminal and 0V for the negative terninal then that is enough.
|
H: Making Thermocouples With Only One Type of Wire
Can thermocouples be made with only one type of wire? I wonder if a thermocouple would work if I use two 10-cm copper wires given that their diameters are vastly different. I know that the two copper wires will have the same resistivity, but the large-diameter one will have a much lower resistance than the small-diameter one. My understanding is that it is the difference in resistances, not the difference in resistivities, that allow voltages to be generated by applying heat to the hot junction of a thermocouple.
AI: That doesn't work: the Seebeck effect underlying the workings of a thermocouple has nothing to do with the resistance, but with the Seebeck coefficient of the involved materials - to be exact, with the difference in them (often called relative Seebeck coefficient).
So, you need two different conductive materials.
|
H: Differential pair trace gap change: sudden vs. gradual
I'm finalizing the routing for an eighteen-layer board that requires many, many differential-pair traces to run at speeds up to 16 Gbit/sec. (FYI: 100 Ω impedance, Isola I-Speed cores and prepreg.) These traces come from an MPSoC (BGA) with TX/RX pairs at 100 Ω impedance. All vias must be through-hole.
My design constraints limit me to roughly 3 mil trace gap while routing under the MPSoC due to the through-hole vias, then spread out to roughly 6 mil when the trace gap is no longer limited under the MPSoC.
I'm having trouble deciding whether my differential-trace pairs should spread out suddenly or gradually. I've read that in high-speed designs, trace width (not trace gap) will gradually fan out right before a pad to the pad width in order to minimize the sudden impedance change, similar to a tear-drop effect. Though taking this notion and extending it to trace gap seems logical, it poses two questions:
Is this reasoning even correct? A specifically unnamed eval board with trace pairs running at much higher bandwidth than mine (see below) employs a "sudden" gap-change, regardless of whether the trace pairs are A) "regular" high-speed using 45° bends, or B) "super duper" high speed and requiring curved traces.
What is too large of a differential-trace pair length to be changing the gap? If my reasoning is correct, there is no maximum "change in gap" length, but this doesn't feel right intuitively.
Here is an example from the aforementioned eval board, with the sudden trace gap-changes circled in red.
Here is an example of my board, with sudden changes marked in blue and the gradual changes marked in green.
Could someone please advise on the better strategy for this situation and explain why either the sudden gap (ergo, impedance) change or the gradual gap (impedance) change works better?
AI: A couple of things first:
When you change the gap, you also have to change the trace width to obtain the same impedance.
I suppose a gradual adjustment would be ideal, but for every point in this transition area, the trace width and gap have to be such that impedance is alright. It will not lead to a straight fan type pattern, but complicated bent patterns.
If you are not willing to properly design this long transition pattern that has the right impedance everywhere, the next best thing is directly jumping from the old width and gap to the new width and gap, which will cause approximately constant impedance. The length of impedance mismatch will be very short and not deter wave propagation that much.
Could someone please advise on the better strategy for this situation and explain why either the sudden gap (ergo, impedance) change or the gradual gap (impedance) change works better?
There is no impedance change if done right. Note how they narrow the trace width in the eval board when going from the two single lines to the tight diff-pair. This is done to get the same impedance before and after the change. They were not motivated to design a gradual change as explained above. So they went for the sudden step change. Apparently, it is good enough in that application.
|
H: Decoupling Capacitor on GPIO instead of connected directly to battery
I am building a device that is for most of the time in sleep mode. When woken up, I am sending some BLE signals and use a LED. To support the battery I have a 2u2F capacitor.
But because my battery is so small and I want the device to have a long runtime I am concerned about the leakage currents of the capacitor. Especially because I would like to put a bigger capacitor than 2u2F into the circuit for supporting the battery.
An idea and question now are: Because I don't need the decoupling capacitor during the sleep mode I wanted to put it on a GPIO and when the device is awake I could switch the GPIO to VCC.
Is this a possibility?
AI: It would not work due to many reasons.
You only assume you don't need a decoupling capacitor in sleep mode, but since the device is capable of waking up from sleep mode, there must be something running in order to the device to detect when to wake up.
Also the capacitor would be quite useless on a GPIO pin. The GPIO pin can't be thought that it is like a zero ohm relay contact between IO pin and VDD. The MCU would need to wake up and start running before you can control the pin high to charge the capacitor, so if the capacitor is needed to start up then there is no capacitor. The IO pin current to charge a directly connected capacitor would be limited only by the output stage transistor and would most likely exceed absolute maximum limits for the current.
And if there is a drop in the supply, the capacitor won't be directly connected to the supply but via the IO stage transistor or via IO stage protection diode so it could not work as a bypass cap.
|
H: What is the point of the Zener diode in this schematic?
I looked at DALI application node and stumbled upon this circuit. Everything but the Zener diode D4 makes sense. What is the function of D4?
AI: A DALI input must understand voltages up to 6.5V as OFF reliably, and voltages above 9.5V as ON reliably.
If there is no Zener diode, the optocoupler input would turn on at much lower voltage.
The Zener diode simply allows the LED to turn on between 6.5V and 9.5V.
|
H: DFLOP LTspice inputs and outputs
I want to use the symbolic form of following DFLOP in the schematic. but I don't know which pin refers to which indicator(n001, n002, ...). for a better understanding of my question, I attached an incorrect schematic.
according to the help document of LTspice, I know that n001 to n005 are inputs, n006 and n007 are outputs and n008 is common. but I don't have any idea about them one by one.
A1 n001 n002 n003 n004 n005 n006 n007 n008 DFLOP
AI: I hope Analog Devices Corp. pays me for this...
A1 D 0 CLK PRE CLR Q_ Q 0 DFLOP
|
H: Options for tracking upsets in very fine movements
I'm working on a small engraving device that sometimes hits a tougher part of the target material. Since the tip is very small and spins at a high speed, the engraver sometimes involuntarily slides around that harder part of material (see the image below). When this happens, I need to know that it happened, to what extent it had happened, and where the engraving tip is now -- otherwise I have to recalibrate the device and start over.
What could I do to obtain this information? The following things came to my mind:
Put a small camera next to the engraving tip and try to use the continuous image of the engraving to recognize the "upset" when it's happening. This is not a great solution though, as the splinters flying off the material will probably render most of the footage useless anyway.
Put an accelerometer on the tip holder, and then integrate the acceleration readings in periodic instances to find out whether there has been an upset since the previous instance.
The accelerometer option seems to me as the most plausible, but I am not sure if the present-day accelerometers are up to the task. I need to be able to do reasonably precise predictions based on acceleration data of the movements on the scale of tenths of a millimeter.
Would anyone happen to have an idea or an insight on this?
AI: I have two-ish ideas.
The first is to make use of mechanical indicators. The same kind machinists and toolmakers use. Test indicators are tiny, very sensitive, fragile, use a lever, have low travel, and can measure deviations from zero down to tenths (1/10 of 1/1000th of an inch). The Dial indicators are larger, less sensitive, more sturdy, have high travel, use a plunger, and can measure down to 1/1000"...maybe 0.5/1000". Terminology to separate the two is fuzzy. "Test" usually specifically refers to the small, sensitive, lever type though.
Mitutoyo
Interapid
You mention debris and low required accuracy (also vibration) so the dial indicator with the plunger is probably better than the test indicator if it is to measure things while actually running.
The mechanical ones use gears and are like watches. Digital LCD readout versions also exist now and I don't know if they still use gears, or if they use something like hall-sensors or strain gauges. They cannot be built without experts in a precision machine shop but you can buy one along and manufacture parts to allow it to be installed into your setup the way you need it.
I don't know your setup but off the top of my head, direct contact using dial indicators with a roller contact, or a rotating guide around the spindle or engraving bit where the indicator can make contact with to make measurements while running. Or have levers that make contact with the bit on two-axis and apply the indicator to the other end of the lever to keep the indicator safe and far away.
Starett
The second idea is to use strain gauges. Install strain gauges somewhere where it can measure X-Y deflection. Then apply various deflections to an installed engraving bit using mechanical indicators to measure the deflection, map out deflection vs strain gauge readouts. I'm not sure if this will have to be done for every bit you use or if one works for all. Certainly the length of the bit is going to matter.
It certainly is a pain to try to do anything at the bit. I'd try to see if you can measure anything at a non-rotating part on the spindle. Even if it does rotate, it'd be easier than at the bit.
I think accelerometers are the least plausible.
There's also wacky ideas like fiber optic whiskers and fiber optic strain gauges. You'll want indicators to calibrate things still and I don't know how repeatable that is but these are extremely sensitive. You probably need to indicators to calibrate things here as well.
One last idea: Laser interfometry. Shining a combination laser-photodiode and measuring the received beat frequency. One for each axis. But aim, debris, eye safety, not to mention the two lasers interferring with each other. Also indeterminant distance relationship as your deflections are many times a wavelength.
|
H: What happens when a circuit is grounded, and how to calculate a circuit's potential differences, current, etc. when it's grounded?
What would be the voltages of points A, B, C & D? How do I calculate them? What's happening here?
AI: Keep in mind that no current is flowing in our out of that ground. In this case, ground is just the reference point against which you measure the voltages. Set that node to zero, then you can work out the voltages at all other nodes relative to this one.
|
H: Confusion on what the RF input to a PLL does
I am designing an FMCW radar, for which I need to generate an RF signal ramped in frequency. To accomplish this, I want to use a direct digital synthesizer (DDS) to generate the ramp at baseband then upconvert it to RF.
For the upconversion, I thought I wanted to use a phase-locked loop (PLL) to generate the RF frequency then mix it with the output from the DDS.
All of the PLLs I see that work with my design (e.g. ADF41020) have \$ RF_{IN} \$ pins, however. I have never seen this and am confused on its operation.
Does the signal input to \$ RF_{IN} \$ get converted to the PLL's configured frequency? Can someone explain what is generated?
AI: The PLL chip that you have selected includes dividers + a phase detector, but not a VCO. From the datasheet:
A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO).
In a full PLL realization, you will connect the CP output of the ADF41020 to the loop filter and VCO; the VCO will generate an RF carrier, which can be delivered to:
The mixer, for upconversion by mixing with your DDS output.
Back to the RF pin, as feedback for the PLL. The ADF41020 will track the relative phase of the RF input and the reference clock (divided as appropriate) to maintain the desired RF ouptut frequency as a product of the reference clock and the configuration of its onboard clock dividers.
The same vendor also offers PLLs with integrated VCOs, for example this one. To use it, you would attach your own loop filter between CPOUT and VTUNE, and it will internally provide feedback from the VCO back to the PLL.
|
H: How to calculate the number of required flip-flop stages needed for clock-domain crossing?
In a given scenario where I have two clock domains driven by a 200MHz and a 30 MHz external independent clocks, what would be the best way to calculate the number of flip-flop stages needed for proper clock-domain crossing?
At the moment, I'm assuming the calculation for the number of stages should go something like this
200/30 = 6.67
As such, I'd need 7 flip-flop stages to be able to meet the clock-domain crossing requirement. Is this a correct assumption?
The system has multiple control signals and a couple of data-buses going back and forth. The widest bus is 32-bits while the smallest bus is 24-bits.
AI: The number of flip flops needed depends on three things:
target MTBF requirement
clock rate
‘crunchiness’ of the flip flops
The latter point, ‘crunchiness’, is also called metastable hardness, and it means the flip-flop’s own intrinsic MTBF. This is related to the speed of of the flop: faster ones with shorter setup/hold times and high feedback gain are crunchier than slow ones.
More here: http://www.interfacebus.com/Design_MetaStable.html
Here too: https://web.stanford.edu/class/ee183/handouts/synchronization_pres.pdf
In most cases, with today’s logic and clock speeds in the 10s to 100s of MHz, two flip flops will yield adequate MTBF.
Related: Why do cascading D-Flip Flops prevent metastability?
|
H: How to prevent inputing voltage into the output of a dc/dc converter
I want to know how to prevent accidentally inputting my 60V DC supply into the output of my DC/DC converter.
The two scenarios could be:
That I accidentally insert the 60V DC into the output of DC/DC instead of the input
I have the input connected to 60V DC and the output is 12V DC as normal. However, the 12V DC output cable accidentally touches the 60V DC busbar.
This is more for like industry specs. So in case a 12V output wire becomes lose and then makes contact with the 60V DC busbar. Most likely will not happen but if it does how to I prevent the 60V DC from going into the output of the DC/DC
What can I do in terms of "circuit protection" to prevent this from damaging my circuit?
I imagine is scenario one will cook the DC/DC.
AI: If the 12V output cable shorts to the 60V DC bus bar, then there's nothing you can do, the output of the converter will get 60V, and any loads connected to it which prefer living with 12V will blow.
Now both MOSFETs in your buck DC-DC converter should of course be rated for more than 60V, because they handle that voltage everyday, so they should be fine.
If the output capacitors are rated for 16V and get 60V they will have a bad day. So you could consider using output caps with a suitable surge voltage rating to make sure they survive.
Besides that, it's more about the behavior of the DC-DC chip.
If 60V is connected to the output with the input disconnected, and it is a buck converter, then it will be powered through the body diode of the top MOSFET and start up almost normally.
Then the DC-DC controller chip will probably panic because output voltage is way too high. If it's a non-synchronous buck, with a diode, it'll just turn off the top FET and sit there, no harm done. If it's a synchronous buck it will probably try to lower output voltage by sucking energy from the output into the input, which turns it into a boost converter, and may cause input voltage to rise until something blows, or the bottom FET will blow due to overcurrent. The chip's current sense amp could also stop working if its common mode is out of range.
Anyway. Rather than spending extra budget on this, I'd recommend spending the budget on clearly labeling "INPUT" and "OUTPUT", with polarity, and specs clearly written on a label that's actually readable, black and white not clear blue on light grey, etc.
|
H: Need help getting my LM324 to work with a three way voltage divider
I have an input voltage signal from a conductivity sensor (output between 0 to 2.3V) which I am need to measure using the ESP32 ADC input. Unfortunately the ADC on the ESP32 is pretty crappy and can only measure signals greater than 0.15V. Therefore I am trying to scale the input signal and add a small offset to it so that I can measure low values as well.
To do this I have made a three resistor voltage divider which I found online. If I remove the op-amp, this works perfectly. However I need the op-amp as without it the load affects the voltage output from my sensor.
The problem I am facing with this design is that at low input voltages, the LM324 does not seem to work. I have played around with various resistor values and my findings are below:
simulate this circuit – Schematic created using CircuitLab
In the case of lower resistors, the circuit was unusable till the input voltage was 0.4V. In the second case with higher resistors, the problem only occurred below 30mV, but still occurs.
From my research, I understood that the LM324 has a limitation of going near the upper rail, but not the lower rail (ground). In my case as well, if I remove R3, then the opamp successfully works perfectly and as expected even at a 10 mV input signal.
Can somebody please help me to understand what is happening. If I want to solve this, can I make some changes to the circuit, or do I need a different op-amp? In that case, what specification in the op-amp datasheet do I need to be looking for? I dont understand very much about opamps yet but am trying to learn!
Thank you!
AI: If you do something like this, you will be able to get much closer:
simulate this circuit – Schematic created using CircuitLab
The above circuit will give you approximately Vin*0.315+0.165V, with some slight error below 50mV in.
Probably good enough for the lousy ADC in that chip.
Below about 600mV out the LM324 has only a (nominal) fixed 50uA current sink to pull the output low, and even that will saturate at some tens of mV.
I would generally not trust even R-R output op-amps very close to the supply rails, the gain and other characteristics change significantly and you could get oscillation, for one example which I have observed. A CMOS-output part might be a better bet than a bipolar R-R output part. You could consider adding two op-amps if the divider is deemed too high impedance for the ADC input, one just as a buffer.
If, at some point, you need real precision near 0V, there's no substitute for bipolar supplies. Or a negative voltage reference. A 7660 + LM4040 would make short work of this for a bit more cost.
|
H: White LED doesn't light up when a red LED is parallel to it
When I connect a white LED to 5v (Arduino) with a 220ohms resistor, it lights up perfectly fine. But, when I connect a red LED parallel to it, only the red one lights up. Note that when I connect the red light to a yellow or green one, both turn on.
Video and image of the circuit:
https://i.stack.imgur.com/aMaW8.jpg
AI: Welcome to EE.SE.
The red LED has an operating voltage that is considerably lower than the white LED. When you connect the red LED in parallel the voltage across the white LED drops to a value that is too low to allow the white LED to illuminate. (All devices connected in parallel receive the same voltage.) The operating voltages of your orange and green LEDs are only moderately higher than the red one so both can operate at the same time. It's likely though that the red LED will be brighter.
If you have a multimeter you can try measuring the voltage across the LEDs, both individually and in combination. Do your measurements match my explanation?
|
H: 3-stage Differential Ring Oscillator simulation output remains at DC Value
I'm currently simulating a 3-stage differential Ring Oscillator in LTSpice. I have setup one of my differential stages and created a symbol for it to use in the ring oscillator. I have double checked all my pins to make sure they are correct. Also note the pin at the bottom of the Differential Stage symbol is just a pin to check the voltage of the Va net. However when I run my transient simulation, the output of any of the stages of the ring oscillator remain at a constant DC Value. Is this due to LTSpice not being able to generate noise? I attempted to inject a 5mV pulse into both gates of the transistors and it just created a pulse at the beginning of my output waveform and leveled out to DC. Any help would be appreciated!
Single Differential Stage:
3-stage Ring Oscillator:
Output Waveform:
AI: You need a certain amount of stage gain to oscillate (Barkhausen). My guess is you don't have enough. Two simple ways to try to overcome this.
Increase input device gms (i.e. larger width).
Increase RL.
If you only increase RL, you might not get decent bias level, so work with parameterizing both options (it will be ok here, since ideal current sources, but bias will look weird).
*Notice it oscillates just fine with no external perturbation/stimulus.
|
H: Help with reading and programming 93c56 EEPROM
I need some advice on software and hardware. I would like to read and program the 93c56 EEPROM chip. The chip is removed from the device. I would like to read the content of the EEPROM and compare it to none corrupt content. Ideally would prefer to purchase a reasonably priced programmer as I do not plan to use it on anything else so I prefer not to spend loads on the hardware. If someone could please point me in the right direction.
#include <M93Cx6.h>
#define PWR_PIN 7
#define CS_PIN 10
#define SK_PIN 13
#define DO_PIN 12
#define DI_PIN 11
#define ORG_PIN 8
#define ORG 16
#define CHIP 56
M93Cx6 eeprom = M93Cx6(PWR_PIN, CS_PIN, SK_PIN, DO_PIN, DI_PIN, ORG_PIN);
void setup() {
int i = 0;
Serial.begin(9600);
// read string from eeprom
for (i = 0; i < 128; i++) {
uint16_t r = eeprom.read(i); // for ORG_16
Serial.print(r);
Serial.print('\n');
}
}
void loop() {
// put your main code here, to run repeatedly:
}
AI: The 93C56 is an SPI serial EEPROM. You can use an Arduino Nano clone and the M93Cx6 library. No extra hardware required.
|
H: 0110 moore overlapping in verilog
I am designing "0110" overlapping sequence detector using moore model in verilog
verilog code:
`timescale 1ns / 1ps
module seq_detector(
input x,clk,reset,
output reg z
);
parameter S0 = 0 , S1 = 1 , S2 = 2 , S3 = 3 , S4 = 4;
reg [3:0] PS,NS ;
always@(posedge clk or posedge reset)
begin
if(reset)
PS <= S0;
else
PS <= NS ;
end
always@(PS or x)
begin
case(PS)
S0 : begin
z <= 0 ;
NS <= x ? S0 : S1 ;
$display(PS);
end
S1 : begin
z <= 0 ;
NS <= x ? S2 : S1 ;
$display(PS);
end
S2 : begin
z <= 0 ;
NS <= x ? S3 : S1 ;
$display(PS);
end
S3 : begin
z <= 0;
NS <= x ? S0 : S4 ;
$display(PS);
end
S4 : begin
z <= 1;
NS <= x ? S2 : S1 ;
$display(PS);
end
default: NS = S0;
endcase
end
always @(PS)
begin
case(PS)
S4: z = 1;
default: z = 0;
endcase
end
endmodule
module mooreoutput;
// Inputs
reg x;
reg clk;
reg reset;
// Outputs
wire z;
// Instantiate the Unit Under Test (UUT)
seq_detector uut (
.x(x),
.clk(clk),
.reset(reset),
.z(z)
);
always #5 clk = ~clk;
initial begin
$dumpfile("mooreoutput.vcd");
$dumpvars(1,mooreoutput);
fork
clk = 1'b0;
reset = 1'b1;
#15 reset = 1'b0;
begin
#11 x = 0; #10 x = 1 ; #11 x = 1 ; #10 x = 0 ;
#11 x = 1; #10 x = 1 ; #11 x = 0 ; #10 x = 1 ;
#11 x = 1; #10 x = 0 ; #11 x = 1 ; #10 x = 1 ;
#11 x = 0; #10 x = 1 ; #11 x = 1 ; #10 x = 0 ;
#10 $finish;
end
join
end
endmodule
OUTPUT:
The issue is that I have applied 5 times occurring "0110" overlapping, but in the waveform showing output 'z' is occurring 'high' for 4 times . What's the possible modification that I'd have to do, so as to eliminate this error ?can anyone send moore state table and logic circuit of 0110
AI: Adjust the delays on your input in test-bench properly. For the 3rd time the input sequence sampled at pos-edge of clock is 0111 and not 0110. Make sure data is changing before the sampling edge.
For debugging you can check the flow of states by dumping the waveforms of all variables with the following verilog syntax.
$dumpvars();
|
H: What is the difference between ESR and DCR?
I am measuring the inductance of a large coil using an LCR meter.
I am using the series equivalent measurement mode at 100 Hz.
Why does the LCR meter show that the ESR is 656 Ohm and why does my multimeter show a DC resistance of 61.5 Ohm? I would assume the ESR is the real part of the inductor impedance which should be the same as the DCR.
In the figure below the voltage waveform is shown in blue. I am using a 50 Hz rectified voltage with an average voltage of 210 V (left side of scope y-axis), which gets chopped to around 110 V after some time (right side of scope y-axis).
Does the current waveform influence the AC impedance of the coil?
AI: An inductor has two sources of resistance (real part), DC and AC.
The ESR your LCR meter is measuring is DC + AC resistances.
DC resistance is what you measure using a DC ohmmeter (most DMMs use DC).
AC resistance is due to copper eddy losses due proximity effect (due to magnetic field induced by adjacent conductors) and skin effect (due to magnetic field around the conductor). There is also loss due to the core, but that usually will be low when when measuring with low level signals. Below 1 MHz, skin effect losses are generally insignificant and proximity effect losses will dominate. Proximity effect losses are proportional to \$ frequency^2\$ and \$wire\_diameter^4\$. An odd thing comes out of the equations which says that the AC resistance increases as the wire diameter increases. Experiments I have done show this to be true. If operating at a single frequency, there is an optimal wire diameter which minimizes AC+DC resistance. The equations and references for proximity effect can be found in this post.
[Edit] DC current through the inductor affects the inductance. When you get close to saturation of the core, the inductance will trend downwards. The inductance versus DC current is sometimes shown as a graph in data sheets.
|
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.