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H: How can I noise decouple an FPGA with multiple VCC/VCCIO/VCCA pins?
Currently I am working on a small project using a Max10 FPGA from Intel.
I know about decoupling IC using a capacitor in parallel and a ferrite in series. This works for a small amount of VCC pins. But the FPGA IC has multiple VCC, VCCA and VCCIO pins.
Which of the following ciruit ways would be the best to go with?
Use one ferrite for all pins and connect a capacitor after the ferrite to each pin.
Use three ferrites. One for VCC, one for VCCA and one for VCCIO. Connect a capacitor after the ferrite to each pin.
Use bypass capacitors only connected between VCC near the pin and GND.
Currently I would use the second solution, but I am not really sure.
AI: The holy user guide details all of the capacitors, ferrites and other filter means to be employed on the various rails. Luckily the Max10 has a lot of the required stuff on die so you can get off with a dozen of parts or so (I remember some spartan6 that required something like 60 capacitors of various size). Also many Max10 are single supply and that helps too…
I don't remember if it was for Intel/Altera or Xilinx/AMD but there was a 'power delivery network' tool to aid in the process.
If they say to use a 0402 package do not use a 0603 because it's easier to attach: the ESL is different and it is asking for troubles. If possible look at a reference design (i.e. a demo board).
Strictly related: be careful about power quality (i.e. noise); the enpirion converter they suggest are not cheap but many switcher do not reach the required level of cleaniness.
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H: Is there a mnemonic to remember direction of current flow?
I have always stumbled when remembering which current flow notation to use. In my mind, it's by default conventional current flow.
But, I also have in mind electron flow notation.
Do you know of a mnemonic (i.e. a quick memory trick) to remember the direction of current flow?
According to the Wikipedia Anode article, "A common mnemonic is ACID, for "anode current into device", but I feel like there might be a better one for beginners.
AI: Your default is correct. Conventional current flows from positive to negative. We draw our schematics as you have with positive rail at the top. Current then flows from top to bottom. You seldom need electron flow to analyse practical circuits.
If you like, positive charges flow out of the top and negative (electrons) flow out of the bottom.
COUP: Current Out Of Positive
DWEF: Don't Worry About Electron Flow
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H: What is the purpose of oscilloscope-probe-to-BNC adapters?
What are these adapters used for?
(Image off Google, source)
They fit over the tip of a passive oscilloscope probe, like this:
(Image excerpted from https://www.caltestelectronics.com/public/attachments/GE_series_manual.pdf].)
Why would you want to do that, rather than just running a BNC cable directly to the scope?
Ideas that I could come up with:
The signal must be terminated by a high impedance, and cannot drive the capacitance of an open coax cable. Unlike a length of cable, the adapter is short enough to not produce appreciable standing waves, and also to have negligible capacitance. But if a 50R termination is not allowed, why would there be a BNC connector in the first place?
You can use the 10x attenuator on the probe to measure high voltages. Again, BNC seems like a weird choice for a connector then.
AI: I use these quite a lot. When making a circuit where any high-frequency signals need to be measured with minimal disruption to the circuit, placing a cheap BNC jack as a test point is a very easy way to get a good solid connection to the probe. It also provides better ground integrity than the traditional ground spring (and far better than the grounding clip that's basically an antenna), and better mechanical stability--you can insert the probe and leave it there without it falling over or straining anything on the board. Handy when you have three or four different points that all need to be probed at once, and you don't have three or four hands to hold them all!
If I were to use a BNC cable here instead, the cable's capacitance would create a major problem--I'm trying to measure high-speed events, and adding so much capacitance would ruin the signal. So instead, I use a scope probe, with its high input impedance; 10 MΩ is typical of a 10x probe, with 9 MΩ of that being located right at the tip of the probe. This isolates the cable capacitance from the circuit well enough for the measurements I need to take.
But if a 50R termination is not allowed, why would there be a BNC connector in the first place?
Because I'm designing the circuit, I know I have these adapters handy, and I put a BNC jack there specifically to use them. I usually add something on the silkscreen to the effect of "high impedance scope probe only", because plugging in a cable there would ruin the circuit characteristics.
BNC seems like a weird choice for a connector [for high voltages].
You're right, it is. And that's not what I would generally use these for, though I have used them for high voltages when there was really no other option. It hasn't broken yet, but I'm definitely using the parts outside their ratings. It's an acceptable sacrifice in pursuit of science.
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H: What rise time should pulse have to have desired pulse width
I have a question regarding my high speed laser driver. I want to have 10ns width pulse. What rise/fall time I would need to have that I can say I still have 10ns pulse. Is there any percentage that system should be turned on in one time unit?
AI: It's up to you to define.
What are you going to use the pulse for?
Once you know the purpose of the pulse, the requirements should be apparent.
A rule of thumb knowing nothing about the application might say that the 10%-90% risetimes should be less than 10% of the pulse width.
But once you know whether the system starts to react at the 10% amplitude level, or 50% or the 90% level, for your particular application, you might alter that view.
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H: Using automotive relay in various applications
Could an automotive relay be used to switch a AC or DC voltage higher than 12Vdc ?
For example, I have a relay of this type:
Could this type of relay be used for switching 5A at 35Vac ?
All the information that I found about this relay is listed in the uploaded screenshot.
AI: No
(in the general case and for anything more or less serious)
Maybe...
(depending on the project importance and what will happen if the relay fails.)
Bear in mind that the relay may as well fail by catching fire.
The interesting thing about the automotive relays is that a at least some of them have contacts rated only for 14V even if the coil is 24V and the obvious purpose of the relay in question is to be used in 24V automotive setup.
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H: How to store a configuration on an FPGA
I have a question about Nexys A7-100T development board that I want to use as a debugging tool for another project. I will provide some background info below:
I have a sensor that is sending square pulses and is being read by a separate MCU, and the pulse count on the MCU display is not correct according to the oscilloscope. I want to configure my FPGA to count and display the pulses, which I can do easily in order to rule out the hardware end of the project.
In order to configure my FPGA I have to use my PC which is at my desk, but the sensor I want to connect the FPGA to is remote from the PC (approx 200 yards).
My question is, how can I configure my FPGA at my office PC, and then take it to the sensor and have the configuration there on the FPGA.
I am thinking I could power the FPGA with a battery and once configured, keep the FPGA powered up and this will work fine. Or I could store the configuration which is used during bootup to program the FPGA but is this easily done with this board?
I would love to hear your advice.
Here is the datasheet for the FPGA development board: Nexys A7-100T Reference Manual
AI: Your board has an Artix (Xilinx) device on it that supports a number of config options. Digilent provides a serial SPI flash for this, and so 'Master SPI' should be pre-selected with the Mode M[2:0] pins (should be 3'b001). Make sure that is the case. Note: using JTAG overrides the Mode setting while it's in use, so there isn't a need to switch Mode back and forth to use JTAG.
To use this method you need to program the flash in-system via JTAG. Fortunately this is fairly straightforward.
In the Vivado flow, do the following:
In Tools->Generate Memory Configuration File, make the Flash programming file, using your file (.bit), and targeting the correct device (Spansion S25FL128S) and I/O type (SPI x4). Choose 'MCS' format.
in Hardware Manager, Open Target to connect JTAG, then add the Configuration Memory (Flash) device to the scan chain if it isn’t already shown.
Program the Flash using the Memory Configuration File (.mcs) you created above.
The process takes several minutes to program the flash.
Once the flash is programmed with a valid bitstream, the Artix will then boot itself from the flash from there on. Note that you can still download bitstreams via JTAG as before for debugging.
As you become more familiar with this process, know that there are options for the bitstream like compressing the stream and setting the SPI clock rate. These can reduce programming and loading time.
More here: https://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
Finally, the programming SPI interface pins can be shared with an on-chip SPI interface IP block, allowing you access to the SPI for your own storage. This requires a SPI device driver, and ensuring that your application doesn’t accidentally corrupt the FPGA bitstream. Your user data can be merged in as part of the .mcs file.
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H: Why don't I get the right values for Vout=Gain(v1-v2) for this differential BJT amplifier?
I am trying to use the formula that they have mentioned Vout=Gain(v1-v2), in my simulator I have placed one signal at 0.001V and the other one at 0V. The gain that they have found is 192, so I expect Vout=192(-0.001)=-0.192V but in the simulator I get -92.571mV
I also expect that the gain would change as long as I keep changing V1/V2, but they talk about the 192 gain as it was something that's steady. Why is it steady?
AI: Large-Scale Result
Assuming you already know the value for the current in \$R_{_\text{E}}\$ (which, by the way, you do not) and also assuming the BJTs are matched (and in a simulator they probably are) then the collector voltage difference is:
$$\begin{align*}
\Delta V_{_\text{C}}=V_{_{\text{C}_1}}-V_{_{\text{C}_2}}=I_{_{\!R_\text{E}}}\cdot R_{_\text{C}}\cdot\tanh\left(\frac{\frac12\Delta V_{_\text{B}}}{\eta\cdot V_T}\right)
\end{align*}$$
\$V_T\$ is the thermal voltage and is often taken to be about \$26\:\text{mV}\$. (However, who knows what your simulation is using?) \$\eta\$ is the emission coefficient "ideality" factor and assumed to be the same for both BJTs here. (For small signal BJTs, this is just "1". For monster BJTs like a 2N3055, it won't be 1.)
The above equation is a large-scale DC model. It will work over the entire range of the circuit. Not just small voltage differences between the bases, but large ones, as well.
The above equation, taken to its extremes, behaves as one would expect. The \$\tanh\$ function goes from -1 to +1. So when the base voltage difference reaches extremes in either direction the magnitude of resulting voltage difference cannot exceed \$\mid I_{_{\!R_\text{E}}}\cdot R_{_\text{C}}\mid\$. In short, if all of the current in \$R_{_\text{E}}\$ is directed to one BJT and not the other one, then there will be no voltage drop across one of the collector resistors and the other collector resistor will get all the current and therefore all of the voltage drop, and the difference will just be that voltage drop. This simple thought experiment verifies that the developed equation makes sense and produces the right results in the extremes.
Keeping in mind that \$\Delta V_{_\text{C}}=V_{_{\text{C}_1}}-V_{_{\text{C}_2}}\$ and \$\Delta V_{_\text{B}}=V_{_{\text{B}_1}}-V_{_{\text{B}_2}}\$, the voltage gain is:
$$\begin{align*}
A_V=\bigg| \frac{\Delta V_{_\text{C}}}{\Delta V_{_\text{B}}}\bigg|=R_{_\text{C}}\cdot\frac{\bigg|I_{_{\!R_\text{E}}}\cdot \tanh\left(\frac{\frac12\Delta V_{_\text{B}}}{\eta\cdot V_T}\right)\bigg|}{\bigg|\Delta V_{_\text{B}}\bigg|}
\end{align*}$$
How to Reach the Large-Scale Result
In perfectly matched BJTs, the collector current ratios are:
$$\frac{I_1}{I_2}\approx \exp\left(\frac{\frac12 \Delta V_{_\text{B}}}{\eta\cdot V_T}\right)$$
(This is approximate, because the Shockley equation includes a tiny -1 term in it and I've neglected it, as the other term dominates and neglecting the -1 term allows a much simpler expression to result that is a lot easier to solve and doesn't impact the result.)
Also, it's pretty obvious that the following is true due to KCL:
$$I_{_{\!R_\text{E}}}=I_1+I_2$$
This provides two equations with two unknowns, \$I_1\$ and \$I_2\$, and this can be solved and then applied to the two collector resistors to compute the difference. If you work this out on paper, you will in fact get the first equation I provided above.
Refined Large-Scale Result
There's one last detail, though: the value for \$\mid I_{_{\!R_\text{E}}}\mid\$. This will not be so simple to compute. Your approximation is obviously wrong, assuming that one of the base voltages is \$0\:\text{V}\$ and the other is \$+1\:\text{mV}\$. Clearly, the emitter voltage will be some negative value and therefore the current will be less than you propose. So the voltage gain will also be smaller than expected.
I won't show the details, but the shared emitter voltage is:
$$\begin{align*}
V_{_\text{E}}&=V_{_\text{EE}} + \eta\,V_T\:\operatorname{LambertW}\left[\frac{I_{_\text{SAT}}\:R_{_\text{E}}}{\eta\,V_T}\left(e^{^\frac{V_{_{\text{B}_1}}}{\eta\,V_T}} + e^{^\frac{V_{_{\text{B}_2}}}{\eta\,V_T}}\right)\:e^{^\frac{2\:I_{_\text{SAT}}\:R_{_\text{E}} - V_{_\text{EE}}}{\eta\,V_T}}\right]-2\:I_{_\text{SAT}}\:R_{_\text{E}}
\end{align*}$$
In your example circuit and using \$I_{_\text{SAT}}=1\times 10^{-14}\:\text{A}\$ and \$V_T=26\:\text{mV}\$, I get \$V_{_\text{E}}\approx -578.58\:\text{mV}\$ and therefore \$\mid I_{_{R_\text{E}}}\!\!\mid\,\approx 94.2\:\mu\text{A}\$. The estimated voltage gain is then \$\mid A_V\!\!\mid\approx 181.2\$.
Clearly, if your simulator uses different model parameters for the BJTs or if it uses a different thermal voltage, the results will likely differ. But the above is the correct approach.
Note that this is just a DC operating point solution showing how the base voltage difference affects the DC solution.
(And finally, I've ignored the difference between the emitter currents and the collector currents in the above analysis. I really should have applied \$\alpha_{_\text{F}}\$ as a factor in the first equation. But it's close to 1 and it is easy enough to adjust downward slightly the expected voltage gain.)
Small-Scale Result
If \$\Delta V_{_\text{B}}\$ is very tiny then the \$\tanh\$ function's output value is the same as its parameter value. This follows from the Taylor's expansion:
$$\tanh x = x-\frac13 x^3+\frac{2}{15}x^5-\frac{17}{315}x^7+...$$
And just selecting the first term, as the remaining terms rapidly diminish.
In this case, where the base voltage difference is sufficiently small, you can neglect the \$\tanh\$ function and get this small-difference result:
$$ A_V \approx \frac{\frac12 \mid I_{_{R_\text{E}}}\!\!\mid \cdot \,R_{_\text{C}}}{\eta\cdot V_T}$$
Taking \$\eta=1\$ (commonly done for low-power BJTs), the quiescent \$I_{_\text{E}}=\frac12 I_{_{R_\text{E}}}\$, and the small-signal BJT model value \$r_e^{\:'}=\frac{V_T}{\mid I_{_\text{E}}\mid}=\frac{V_T}{\frac12\mid I_{_{R_\text{E}}}\mid}\$, the differential gain is:
$$ A_V\approx \frac{R_{_\text{C}}}{r_e^{\:'}}$$
As \$g_m=\frac{\mid I_{_\text{C}}\mid}{V_T}\$ and \$I_{_\text{C}}\approx I_{_\text{E}}\$ it follows that \$g_m\approx \frac1{r_e^{\:'}}\$ and:
$$\begin{align*}
A_V&\approx g_m\:R_{_\text{C}}
\end{align*}$$
And in your example, this gives about the same result. So your difference is "small" enough that this DC operating point simplification is useful as an AC gain estimate.
This last equation remains approximately valid for differences up to about \$\frac12 V_T\$ (or about \$12\:\text{mV}\$), after which the gain variations are sufficient to start distorting the output signal. This means this stage, run open loop and without NFB to correct it, will distort signal inputs when the base voltage differences peak at more than a tenth of a volt.
Appendix
If you don't feel comfortable with the LambertW product-log function to form a closed solution, you can iterate to find a solution.
In this case, you can derive an iterative solution by first assuming that the collector currents and emitter currents are the same (as I have done, above), assuming we can ignore the -1 term in the Shockley equation (reasonable, too), assuming \$\eta=1\$, and then knowing that the sum of the two emitter currents must be:
$$\begin{align*}
I_{_{R_\text{E}}}=\frac{V_{_\text{E}}}{R_{_\text{E}}}&\approx I_{_\text{SAT}}\exp\left(\frac{V_{_\text{B}}-V_{_\text{E}}}{V_T}\right)+I_{_\text{SAT}}\exp\left(\frac{\left(V_{_\text{B}}+1\:\text{mV}\right)-V_{_\text{E}}}{V_T}\right)
\\\\
\frac{I_{_{R_\text{E}}}}{R_{_\text{E}}\cdot I_{_\text{SAT}}}&\approx \exp\left(\frac{V_{_\text{B}}-V_{_\text{E}}}{V_T}\right)+\exp\left(\frac{\left(V_{_\text{B}}+1\:\text{mV}\right)-V_{_\text{E}}}{V_T}\right)
\\\\&\approx\exp\left(\frac{V_{_\text{B}}-V_{_\text{E}}}{V_T}\right)\left[1+\exp\left(\frac{1\:\text{mV}}{V_T}\right)\right]
\\\\
\frac{I_{_{R_\text{E}}}}{I_{_\text{SAT}}\cdot \left[1+\exp\left(\frac{1\:\text{mV}}{V_T}\right)\right]}&\approx \exp\left(\frac{V_{_\text{B}}-V_{_\text{E}}}{V_T}\right)
\end{align*}$$
We can simplify the above by setting \$V_{_\text{B}}=0\:\text{V}\$. Then:
$$\begin{align*}
\frac{I_{_{R_\text{E}}}}{I_{_\text{SAT}}\cdot \left[1+\exp\left(\frac{1\:\text{mV}}{V_T}\right)\right]}&\approx \frac1{\exp\left(\frac{V_{_\text{E}}}{V_T}\right)}
\\\\
\exp\left(\frac{V_{_\text{E}}}{V_T}\right)&\approx \frac{I_{_\text{SAT}}\cdot \left[1+\exp\left(\frac{1\:\text{mV}}{V_T}\right)\right]}{I_{_{R_\text{E}}}}
\\\\
\frac{V_{_\text{E}}}{V_T}&\approx \ln\left(\frac{I_{_\text{SAT}}\cdot \left[1+\exp\left(\frac{1\:\text{mV}}{V_T}\right)\right]}{I_{_{R_\text{E}}}}\right)
\\\\
V_{_\text{E}}&\approx V_T\cdot \ln\left(\frac{I_{_\text{SAT}}\cdot \left[1+\exp\left(\frac{1\:\text{mV}}{V_T}\right)\right]}{I_{_{R_\text{E}}}}\right)
\end{align*}$$
Let's assume \$I_{_{R_\text{E}}}=100\:\mu\text{A}\$ to start, that \$I_{_\text{SAT}}=1\times 10^{-14}\:\text{A}\$, and that \$V_t=26\:\text{mV}\$. Then we'd find at the first iteration that \$V_{_\text{E}}\approx -580.1\:\text{mV}\$. From this, we can work out that \$I_{_{R_\text{E}}}=\frac{-580.1\:\text{mV}-\left(-10\:\text{V}\right)}{100\:\text{k}\Omega}\approx 94.2\:\mu\text{A}\$. Re-computing, find \$V_{_\text{E}}\approx -578.59\:\text{mV}\$. From this, find \$I_{_{R_\text{E}}}=\frac{-578.59\:\text{mV}-\left(-10\:\text{V}\right)}{100\:\text{k}\Omega}\approx 94.2\:\mu\text{A}\$, again. So we are done with iterations. And you can see that this value, \$V_{_\text{E}}\approx -578.59\:\text{mV}\$, is very close to the value computed using the LambertW function, above.
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H: In the PNP transistor, base current is the sum of emitter and collector current. How is this possible?
The PNP transistor at the right side doesn't follow any characteristics of the 4 modes of operation of BJT. How is this possible? PSPICE simulation has shown quite similar results. Here, beta=100.
AI: First, notice that the PNP transistor base terminal is at \$0V\$ (GND).
The collector is pull-up via \$R_2\$ resistor to \$+10V\$. The emitter is also at a higher potential than the base terminal.
So the situation looks like this:
simulate this circuit – Schematic created using CircuitLab
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H: How to fix this AC switching circuit?
I am trying to replicate a small circuit of an optocoupler and a triac, see this document for details (second page / "EL Channels"):
http://cdn.sparkfun.com/datasheets/Components/EL/SparkFun_EL_Sequencer_v23.pdf
A picture of the circuit:
The problem is that I can switch AC out on by applying 5V on the input wire, but it does not switch off when I disconnect the 5V again.
AI: Figure 1. What you want.
Figure 2. What you've wired.
simulate this circuit – Schematic created using CircuitLab
Figure 3. What you've done and what you meant to do.
Figure 4. The fix.
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H: Problems with gold plated connector mated with tin plated connector
I have two connectors both gold plated, because of changes I have to consider moving one of these to a tin connector. Now I need to find out what the worst case scenario would be from a design with gold mated with tin. What are the consequences of using a tin plated contact with a gold plated contact?
I can think of a few reasons not to (are there more?):
corrosion
oxidation
reduction of conductivity
Has anyone ran gold plating with tin plating?
AI: If you want reliability, don't mix tin and gold plated connector pins. You end up with fretting corrosion which is hard to remove from the gold surface once it's formed. Personally, I've seen problems with mixed plated audio connectors. TE (Amp) has a Connectors 101: What Lighting Designers Need to Know booklet that discusses fretting corrosion. See pages 6-11, page 10 talks about gold-tin interface.
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H: How do you calculate resistance needed for an inductive load?
If you have a 250W inductive load such as a DC motor, and you want to reduce the speed using a variable resistor (such as a Wirewound Ceramic Potentiometer Variable Rheostat Resistor), how do you calculate the maximum resistance needed? Do I use Ohm’s Law? If so, how? Also, how do you calculate the wattage needed? Would it be 250W, or something substantially lower? I read somewhere that the resistor would dissipate 1/3 of the power, but is that a universal rule? How do you calculate the power required too?
I tried eyeballing it with 6R and 12R, and both prevent the motor from working completely. I’ve used 3R on the motor, which doesn’t prevent it from working but doesn’t slow it down enough for my needs (so I’m imagining I need something between 3R and 6R).
It would be useful to know the required resistor values for both 12V and 6V power sources. Does voltage matter when calculating the required resistor?
Edit: I appreciate that introducing resistance is not the most efficient way of reducing a DC fan speed; the question is mostly academic as this is part of the potential solution. I’m also reducing the voltage and using PWM (but PWM makes the motor whine, so I’m experimenting with different approaches and combinations).
AI: Using a series resistor to control the speed of a DC motor is a very old and inefficient method for controlling motor speed, but it is simple and a good starting point for studying motors. If the motor field is a permanent magnet or is a separately powered field winding, it is quite simple. In that case, you use the equivalent circuit shown below.
If you don't know the armature resistance, assume that the it is the supply voltage divided by the motor's locked-rotor (stall) current. Alternatively, assume that it is 10% of the supply voltage divided by the motor's full-load current or that it reduces the full-speed back emf, e(t) in the diagram to 90% of the supply voltage, Va(t).
If you have a 12-volt motor that produces 250 watts of mechanical power, assume e(t) is 10.8 volts at rated speed and load. The rated current is then 250/10.8 = 23.1 amps. If you want a to put a rheostat in series to reduce the speed to 1/3 of rated speed, You would need e(t) to be 10.8/3 = 3.6 volts. You need the voltage across the rheostat be e(t) 10.8 - 3.6 = 4.5 volts. The resistance must then be 4.5 V / 23.1 A = 0.19 ohms. The rheostat power will be the rheostat voltage multiplied by the rheostat current or 23.1 x 4.5 = 104 watts.
I have assumed that the torque required to turn the load is not reduced when the speed is reduced and therefore the current drawn by the motor is not reduced. If the load is a fan or centrifugal pump, reducing the speed reduces the required motor torque in proportion to the speed squared - 1/3 speed requires 1/9 torque and 1/9 current. In that case, the rheostat power at 1/3 speed is considerably less.
Note that in addition to wasting power, the added series resistance causes the motor's speed to change more when the load changes. Consequently, a series resistor that slows the motor down a little when the motor is not connected to a load will slow it down a lot when the the motor is fully loaded.
Note also that the inductance and the inertia of the motor and load are only relevant for calculations involving rapid voltage and speed changes. The load friction and the internal friction of the motor are lumped together for purposes other than calculating motor efficiency.
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H: Why might PWM cause a whine sound in a DC motor?
I am using PWM to control the speed of a DC motor. It’s a powerful 250W fan. I’m using an Arduino to control the duty cycle.
As expected, when the analogWrite function is used with a value of 255, the motor spins at full speed (no whine sound). But, when I reduce the value to 50 or below, the whine increases substantially as the fan slows.
Why does this whine sound happen, and is there a way to reduce or eliminate it?
I thought about perhaps using a capacitor to smooth out the signal, but I guess the motor would pull the current too quickly for the charge to build in the capacitor.
Edit: I found an acoustic noise suppression circuit that aims to solve this. It uses a capacitor so perhaps I’m onto something. Is this the best way to go?
Source: Suppressing Acoustic Noise in PWM Fan Speed Control Systems
AI: Magnetostriction is one reason. The changing magnetic fields induce an audible strain in the material. An example would be the hum that is heard from a transformer. https://en.wikipedia.org/wiki/Magnetostriction
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H: CAN Bus Topology, is it possible to have "T" shape topology?
I know that for a thumb rule, it is possible to have a length of CAN Bus network with: Speed [Mbps] * Length[meter] < 50 . i.e., with 0.5Mbps, it is possible; source.
But, is it possible to have the CAN Bus network cable as a T shape? i.e., to split the cable in the middle to another cable? Like in the following diagram?
AI: Following @justme and @Lundin, two possible solutions:
Separate into two buses. One Horizontal bus and the other Vertical Bus. Then have a CAN bridge between them.
Instead of splitting into two, if the length allows, it is possible to get the "BUS" as a "snake". Starting from the left up to to middle then going up and down, then going to the right. This keeps the BUS with linear Topology.
See image:
#EDIT:
Note that image line is the network itself. i.e two physical lines, high and low.
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H: Data sheet clarification for JTD1524S12
I am trying to design a PCB for JTD1524S12 DC-DC converter. I was going through the datasheet and on page 3 the following tables are provided:
I got the idea that these tables are related to EMC.
On the first table "EMC:Emissions" in "Notes and conditions" it is said that "No external components required".
Does it mean that, if no external components are used there are "Emissions"?
And according to second table, if suggested components are used there will be "immunity" from the emissions?
If someone could help me understand what these table are trying to convey, it would be very helpful.
AI: I would interpet that to mean no components are needed to meet the listed emissions requirements. What the second table is saying is that you would require those components to be able to survive or continue to operate without interference during the high voltage transients that can occur during events like switching or indirect lightning strikes.
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H: How does the current processor technology with low clock rates (<10 GHz) deals with mmWave (>10 GHz) technology used in 5G?
What I mean is that most abundant computing processors in market have the clock frequencies in the range of 2-4 GHz and from wikipedia:
As of 2012, the CPU-Z record for the highest CPU clock rate is 8.79433 GHz on an AMD FX-8350 Piledriver-based chip.
As of mid-2013, the highest clock rate on a production processor is the IBM zEC12, clocked at 5.5 GHz, which was released in August 2012.
So, how do processors deal with the frequencies in the range of 20-100 GHz? Even if we consider a demodulation of data to lower frequencies from carrier frequencies, there needs to be a computing piece for doing that.
AI: So, how do processors deal with the frequencies in the range of 20-100 GHz?
They don't.
Even if we consider a demodulation of data to lower frequencies from carrier frequencies, there needs to be a computing piece for doing that.
No, there doesn't. There needs to be an analog piece for doing that.
Note that our goal is to design a circuit which takes the radio wave as an input, and produces the bits that the sender was trying to send as an output, and the bits are a much slower signal than the radio wave.
One typical way to do that, nowadays, is to first use analog filters to cancel out frequencies which are not the ones you are trying to receive, then use an analog mixer to shift the frequency down to a lower frequency, then feed that into an analog-to-digital converter. Now you still have a processing problem, but it's a slower processing problem. If your signal takes up 50.000-50.100GHz, you can shift it down to 0-0.1GHz = 0-100MHz (or maybe you might prefer 10-110MHz for various reasons). Now you just have a 100MHz or 110MHz signal to deal with.
You still have to process it though. So how might you do that? One way is to use a specialized computer chip - a Digital Signal Processor, or DSP - which is designed for exactly the kind of processing needed to receive radio signals. If you can run it at 500MHz, you still have only 5 instructions per cycle of your signal, but if you cut enough corners, it might be enough. You might be surprised how many corners you can cut. You will have the ability to run instructions in parallel, so perhaps you can process a group of 4 cycles together, in 20 instructions. A DSP is designed to get maximum number crunching for your buck, running the same code over and over. No branch predictors or caches here, just raw throughput.
Maybe you can't get a DSP fast enough. What other options do you have? One option is to split the signal in half. Instead of sending a 100MHz wide signal, split the data up, send 4 25MHz wide signals and then join the data together again after it's received.
Or, you can try an even faster processing device. An FPGA you string together as many separate processing stages as you can physically fit. If you need to add numbers at 200MHz... you can do that. If you need to add 50 numbers... you can still do it at 200MHz, but it will take up 50 times as much space because you actually set up 50 separate addition circuits on the chip, unlike a traditional processor, which only has a small number of addition circuits and has to reuse them 50 times in a loop.
If you are a big company that wants to produce 100000 of the same product, you might want to actually make a custom chip. It's pretty similar to an FPGA in principle, except you can't reprogram it, performance is better in every aspect, and it costs about ten million dollars to design so you'd better get it right the first time.
By the way, if you're wondering, in the old days, obviously there were no DSPs processing our signals - just analog circuits all the way through. But it turns out analog circuits are worse than DSPs, if your frequency is low enough to use one. They're more expensive, they're bigger, some of them use more power, and even worse, the laws of physics stop them from being shrunk down to mobile phone size. Yeah, today's phones would be impossible with that technology.
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H: How to estimate the recommended current in an optocoupler?
I intend to use an optocoupler to simulate a push button on a control card (I could measure 5V between pins but I don't know for sure if there is a pullup resistor in the card). Also the other way around, I'd like to "listen" to a 24 V output to detect voltage (and act as a logic gate for my 5 V microcontroller).
Optocoupler looks like a good candidate, as it keeps both circuits isolated.
I know I should limit currents for both the LED and the transistor, but how much? The datasheet tells about the absolute maximum limit (50 mA for both), but I can't find any "recommended" current for things to work nicely.
Basically I'm trying to calculate what the ideal resistors would be, but I don't know what to aim for (2 mA, 20 mA, 50 mA, anything?). I feel like hacking around could just lead to something that will break very soon if I use too much current.
Did I miss something on the datasheet?
AI: The datasheet tells about the absolute maximum limit (50 mA for both), but I can't find any "recommended" current for things to work nicely.
The data sheet states a couple of values (other than the maximum value of 50 mA): -
So, if you are driving a circuit that requires more current on the output then, you use more current on the input. A good figure is 20 mA but, some folk will be interested in how little current is needed to activate the output transistor and, may be more inclined to move towards using 5 mA.
So, it's down to your application and what you want to achieve.
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H: MOSFET still turns on LED in off state
I am designing a LED flashing circuit with a MOSFET. With a 5V input signal it will drive a 2 watt LED when the 5V is switched on or off. The problem is when the MOSFET is in an off state 1.420 volts is still applied between the LED and load resistor.
Pictured is the two states of the MOSFET. When using just a load resistor to replace the LED the problem disappears. I am not sure why the voltage is being applied to the LED when the MOSFET is in an off state. I even tried with the real parts and it produced the same issue.
AI: The leakage current of the IRF540 can be up to 250µA. Your measurements are showing 12µA, which is within the allowed range.
The IRF540 is made for high current use (33A) - the "high" leakage current of up to 250µA doesn't matter for that kind of use.
LEDs can conduct (and light up) at very low currents. You can find plenty of questions about LED household lights not turning off completely because leakage currents in the house wiring.
This current/voltage plot I made of a blue LED shows just how low the forward voltage can get with low currents:
Full plot:
Zoomed in:
Over to the right on the zoomed in version, you can see where the current went above about 2 µA. At that point, the LED was clearly lit and visible on my workbench.
To make the LED turn off all the way, you need to use either a MOSFET with a much smaller leakage current or you need to put a resistor in parallel with the LED.
You could try about a 1.5k resistor across the LED. That will allow about 1 milliampere of current to flow through the resistor. That's much higher than the leakage current, so most of it should go through the resistor rather than the LED. If the LED is still too bright, use a smaller value resistor. Remember to keep an eye on the power rating of the resistor. It will be exposed to the forward voltage of the LED.
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H: Run stepping motor eficiently on battery
I just bought NEMA17 stepping motor with Rated voltage of 3.57V and 1.8A with A4988 driver board to control the motor from raspberry pi.
I'm looking for a easy way to supply energy to this motor, I was thinking about batteries, but the uncle Google says that stepping motors are electrically-inefficient. Does this apply even if I use the A4988 driver board? Also can I supply energy from two 9V batteries?
I also have a notebook adapter for 12V with plug at the end, but I don't want to destroy the plug to connect normal cables
EDIT : I want to move the motor from A to B (about 1 meter forward and 1 meter back) one time per hour.
There should be not outside force for the motor so I think I don't need to hold a torque.
Motor should move car like machine (with wheels) from A to B stopping every 10cm for like 30 seconds.
The project should be place outside, but I really don't except wind so strong to move the wheels, so hold a torque is not important
AI: A Desktop PC power supply will hopefully do it for you. You can often find a discarded computer waiting for pickup. Or you could buy one on Amazon, for pretty cheap, such as this one for $20 USD. Just connecting the green wire with one of the black wires (they're all grounds) should turn on the power supply. And both the 5V output and the 12V output should deliver more than enough current to meet your needs. You will probably be disappointed with a battery solution.
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H: Interfacing with unknown MCU (COB), unusually high current on input pin
I recently got an oscilloscope with a logic analyser and their first mission was helping me in reverse engineering the communication protocol between two 15-20 years old unknown MCUs (COB). The goal is interfacing with one of them using an Arduino. My issue is that the currents flowing through the input pins of the unknown MCU (clock+data) are unusually high. I expected almost zero current because input pins are supposed to be high impedance.
In its original environment the MCU receives a 10-20kHz clock signal from the other unknown MCU and that requires 4-8mA current (these measurements might not be very accurate though). The current seems to be directly proportional to the frequency. Nothing too surprising but I never had to measure the current flowing through a digital input pin in my previous much simpler Arduino projects.
I bitbanged the protocol in the Arduino IDE and my teensy LC (MKL26Z64VFT4 Cortex-M0+ 3.3V) can communicate with the unknown MCU: a 10-20kHz clock signal needs 3-6mA current. However, an Adafruit ItsyBitsy (ATmega32U4 3.3V) can't send the clock signal to the unknown MCU. Trying to drive the output LOW drops the voltage from 3.3V to 2.4V and the current is a steady 27mA.
Can those input pins be (partially) damaged? What makes it possible for my ARM-based MCU (teensy LC) to interface with those input pins? Can this damage the ARM MCU in the long term? (I guess the instantaneous currents are higher than my measurements.)
AI: The only reasonable explanation for the high current is that it was designed for a long cable with a 100 Ohm load to reduce ringing.
Driver impedance differences due to supply Vdd max. is why the Arm worked with this 50 ~ 100 Ohm load to pull the Vol below 50%.
I can prove:
Arm Cortex 1.65V ≤ VDD ≤ 3.6V = " 25 Ohm driver nom."
Arduino ATMega 2.7V ≤ VDD ≤ 5.5V = " 50 Ohm driver nom."
+/-25%
Using a linear approximate of logic from KVL , from the voltage drop, you can estimate the unknown load or source impedance. In this question, there is a difference is source resistance.
During transition both Pch and Nch drivers are active ( during Vgs transition). This causes somewhat of a shoot thru current spike and low impedance helps to drive load capacitance at higher speeds. Thus, when CMOS families are designed to go faster with lower RdsOn, this restricts the Vdd max. due to Pd self heating.
Zol = Vol /I
Zoh = (Vdd-Voh)/I
Keep in mind Vol,oh {max} in datasheets computes {max} impedance. Similar 3.6V discrete logic, show more details (min, typ, max) indicates +/-25 tolerance or more. However, reducing Vdd from max also raises RdsOn.
The Electrical properties specs for uC, MCU's is always at the end of hundreds of pages of specs , just before the physical dimensions.
Many examples support this undocumented behaviour computed by Zo for logic.
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H: Self holding circuit - Looking for improvements
I have a battery-powered circuit (2x 3.7 V LiPo batteries) and I want to use a push-button as on switch by using some sort of low power self-holding mechanism. I have two possible solutions in my mind:
Option 1
This option uses a switch to enable the battery voltage and the MCU will assert the SH signal, so the transistor Q206 is turned on permanently.
Option 2
This option applies the battery voltage directly to the LDO and enables the LDO when the push button is pressed. Again the MCU will assert SH and bridge the switch.
I´m unsure which of these methods is the better one with the aspect of the current consumption. And I´m unsure if Option 2 is working very well. Maybe booth circuits can be improved in terms of current consumption. The only thing that I would improve is the value of the resistors (replace 100k with 1M). Are there any other options to improve that circuit?
AI: There is no symbol for the LDO with Enable so I used a logical equivalent AND gate. SW1 is turn ON latch only with positive feedback and R3 will current limit the over voltage from the LiPo with internal ESD protection using Sch Diode clamps on EN input. C1 filters our EMI.
simulate this circuit – Schematic created using CircuitLab
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H: PAT testing of extension leads and RCD protected sockets (UK - industrial type environment)
Not 100% sure this question belongs here, it was a choice between this stack and the home improvement stack but I have posted it here as it's about electrics in an industrial environment.
In an industrial environment where an extension lead is plugged into an RCD protected socket, is it still required to be PAT tested? It's in the UK so the relevant UK regs will apply
AI: An RCD may prevent electrocution due to a faulty extension lead but PAT testing involves many more things than just checking leakage currents. For instance, if live and neutral were swapped in the extension lead, an RCD would still trip and protect a person but, PAT testing and inspection requires that live and neutral are correctly wired to the correct points on the extension lead outlet.
So no, the use of an RCD is not a replacement for PAT testing.
From the wiki link above: -
Testing involves a visual inspection of the equipment and any flexible cables for good condition, and also where required, verification of earthing (grounding) continuity, and a test of the soundness of insulation between the current carrying parts, and any exposed metal that may be touched.
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H: UART and Max10?
I am searching the datasheets of the Max10 FPGA family from Intel, but I just can not find the information that I am looking for or I have a misunderstanding.
My question: I want to create a UART -> USB connection using the FT2232H IC for interacting with a computer. The same ic also provides JTAG, which I already connected to the specific pins on the fpga. Are there any specific pins for a UART interface at the fpga or can I just use any pins?
AI: It's an FPGA. You can have an UART on as many pins as you like until you run out of logic elements.
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H: Power of three phase rectifier
I'm confused about what type of voltage should I use to calculate the power of a three phase rectifier. For a signal like this:
I've read it should be called pulsating DC.
If I want to calculate the power in the load resistance with that output signal, should I use Vrms or Vdc?
P = (Vdc^2)/R
or
P = (Vrms^2)/R
I think it should be calculated using Vdc because the signal is close to a DC signal, but am I right?
Is it true that power should be calculated with Vdc if the signal has no negative part?
AI: Is it true that power should be calculated with Vdc if the signal has
no negative part?
As in all cases, power is the average of instantaneous voltage multiplied by instantaneous current be it DC or AC or any waveform shape or amplitude.
This means that if your DC rectified voltage has ripple, the current into a resistive load will also have ripple and that means that the power value is modified by that ripple.
But, if you know the true RMS of the voltage (DC with ripple), you can calculate the power into a known resistance as \$V^2/R\$.
However, you cannot accurately calculate power into the resistor based on the DC content of the voltage waveform except when the ripple is small i.e. the error will be acceptable in most cases.
I think it should be calculated using Vdc because the signal is close
to a DC signal, but am I right?
If the ripple magnitude is small compared to the DC level then the error will be small.
Just in case there is any confusion as to what a 3 phase rectified output voltage looks like, here's a picture of a standard 3 phase half-wave rectified voltage waveform: -
Picture from here although I've reduced it in size to remove the erroneous depiction of the full-wave rectified waveform.
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H: Unknown schematic symbol (circle with 'c' )
Came across this symbol while working on a shorted Pioneer Integrated Amp
It's the circle with a C in the center. It looks like only one leg is connected.
AI: If you have another "C" in your circuit it is a reference to it. the both "Cs" connect to a single point electrically. but for convenience of drawing it is done this way.
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H: Why are there no P-channel SiC (silicon-carbide) FETs?
Looking at the top distributors, seems only N-channel power SiC are carried. Why is that?
AI: Not just SiC. All high-voltage MOSFETs.
There's no point due to how they are or would be used.
SiC is for high voltage and the max gate-source voltage is the limiting factor when using a PMOS high-side switch to simplify gate drive. 30V is pushing it, let alone 600V. So for high-side, high-voltage switches you need gate circuitry anyways no matter what you use. If you need it anyways, might as well go with a more efficient, cheaper N-channel regardless of whether it is SiC or not.
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H: Why does this PMOS LDO require no compensation to be stable?
LDOs with PMOS pass transistors are prone to oscillation due to positive feedback problems as discussed e.g. here.
Now the below simple circuit is basically a PMOS LDO, but seems stable in both time and frequency analysis, both in LTspice and CircuitLab. It does not require output capacitors, but they can be added to improve supply impedance at moderate and high frequency. It has comparable behavior to usual LDOs.
I am not very familiar with "classical circuits" and the inner workings of operational amplifiers and I wonder:
What makes this circuit different from an opamp-PMOS-LDO? Is it perhaps well-known to not work in practise (i.e. bad simulation)?
simulate this circuit – Schematic created using CircuitLab
Another version with a NPN pair is better matched (lower offset) and even cheaper. It also seems to have slightly better bandwidth. The downside is that the minimum dropout is VGS(PMOS) - VBE(NPN). To achieve true LDO behavior, a sub-volt VGS PMOS is needed, or a diode in series with both NPN bases.
simulate this circuit
AI: The problem is likely to be one of phase margin and the number of stages. Recall that a closed loop amplifier becomes unstable when the dynamics of the circuit introduce an additional 180 degree phase shift at some frequency at which there is still gain. Further, note that each pole in the circuit will contribute such a phase shift (and a gain falloff), and each stage contributes poles.
It follows that each additional gain stage contributes both increased DC gain, and an additional 90 degree phase shift near its dominant pole frequency. Together, these are a bad sign for stability -- phase hits 180 degrees at a lower frequency, while the higher gain may now hit unity at a higher frequency.
In the linked post, an LM358 is used, which creates a structure containing a unity-gain-compensated op amp having multiple stages and internal compensation, followed by another gain stage which introduces additional DC gain and a pole. Given the following figure from the datasheet, it's reasonable to suspect that the LM358 doesn't have a lot of phase margin to offset the effects of extra stages (and in general op amps aren't usually optimized to that goal):
Your structure is a single differential pair followed by a single second stage, which trades off loop gain for stability, and is far more likely to be stable because each stage contributes a single dominant pole and 90 degrees of phase shift. They have other poles, but they're likely to be well above the unity gain frequency, and thus don't strongly affect the system's stability.
A small signal closed loop stability analysis (e.g. stb in Spectre/Cadence, unsure about SPICE) may yield more useful findings. This is quite a simplification as I've used few numbers, and have overlooked any zeroes in the transfer function (which are generally negligible but might not be when they're in the form of large compensation capacitors and might live in either the LHP or the RHP of the s-domain.
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H: I don't understand PCB fabrication copper thickness
In Eurocircuits I can select between 12um (end + -30um) to 105um (end + -130um), so in the worst case if I choose 12um can I have a thickness of 12-30 = -18um?
AI: I believe they're using "+/-" to mean "approximately" here. I've seen some people use it in that manner before, though it's always struck me as a bit odd since "~" is less ambiguous.
The way a PCB is manufactured starts with a copper foil of some thickness on an FR-4 substrate, and then the thickness is increased by plating additional copper onto it.
It seems to me that what they're saying by "12 μm (end +/-30 μm)" is that the copper foil initially on the FR-4 is 12 μm thick, and by the end of the plating process, it will be approximately 30 μm thick.
You'd have to ask them to be sure, of course. I expect they'd be happy to tell you; they do want your business after all.
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H: Looking for a sensor recommendation
I am using a stepper motor that is belt driving a 3-4inch diameter pulley. The motor is quite small, only a NEMA11. I am trying to find a sensor that will reliably home the motor. I first tried a Hall effect sensor and switch and attached a small magnet to the pulley, but I am finding this is too unreliable for precise homing, and have a feeling this will get worse with temperature fluctuations.
I believe there are optical sensors that could detect a significant color change or something. For instance, if I placed a black mark on a silver pulley, it would detect this change and know it had homed, but I just can't seem to find the right name or sensor for this.
AI: To answer your question as you posed it, that is to reliably find a position on the belt itself by the coloration of the belt I think you are looking for a reflective optical sensor: https://www.digikey.com/en/products/filter/optical-sensors-reflective-analog-output/546
Many of these have analog outputs that can be digitized with a comparator circuit that is tuned your specific needs: the difference in reflected energy between the marked and unmarked sections of the belt, the distance to the belt from the sensor. You can vary the intensity of the transmitter as well as adjust the comparator threshold to tune your circuit to work reliably for your setup. (I have used these many years ago to detect trains passing by on a track with a crude barcode encoding the ID).
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H: Read Throttle Position Sensor and Display the % of Throttle Used
In a previous post in the Motor Vehicle Maintenance & Repair section, I was able to read two signals from my electronic throttle position sensor in my car. I would like to read these values and record/display the % of throttle being used. I think only one of the two signals is necessary since they both indicate the same thing. These are the range of the two signals:
Singal 1 (APP 1): Pin 2 and 6, Signal range measured(0.31 V no
accelerator pushed - 1.74 V accelerator pushed all the way down)
Signal 2 (APP 2): Pin 2 and 5, Signal range measured(0.62 V no
accelerator pushed - 3.42 V accelerator pushed all the way down)
My questions are:
Is analogRead() good for reading this range?
In order to read the values do I need to connect the GND of Arduino to the GND of the 12v car battery and the two positive cables of the two signals to Arduino's analogs ports?
Thanks
AI: Yes, analogRead() is the right approach.
Yes, connect Arduino GND to car chassis.
If you're Arduino can accept 0 - 5 V on the analog inputs then Signal 2 will give you double the resolution as it is twice the voltage.
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H: 8051 DPTR and program counter difference
So as we know both of the program counter and DPTR are 16bits in 8051 and hence both of them are capable of reaching 216 possible locations, which is sufficient for both RAM and ROM, then why DPTR is introduced while the program counter can points through all the possible location of RAM?
is DPTR specially designed to point only the ROM space? is program counter is for pointing data from RAM and DPTR is for pointing data from ROM?
AI: is DPTR specially designed to point only the ROM space?
That's correct. From the 8051 Wikipedia article:
"In addition to code, it is possible to store read-only data such as lookup tables in program memory, retrieved by the MOVC A,@A+DPTR or MOVC A,@A+PC instructions. The address is computed as the sum of the 8-bit accumulator and a 16-bit register (PC or DPTR)."
The PC is pointing to the current instruction, so a PC-relative address would be useful for a nearby lookup table. On the other hand, the DPTR can be set independently to point to an arbitrary location in ROM, not necessarily near the program counter, so you can address locations not within [PC, PC + 256).
is program counter is for pointing data from RAM and DPTR is for pointing data from ROM?
No. The program counter points to an address in ROM containing instructions to be executed, just like DPTR. RAM is addressed either with direct addressing, or an indirect address using either R0 or R1. Edit: not 100% correct, see Dave Tweed's answer which mentions a way DPTR can be used to address external RAM
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H: My IC pins are too small
I bought an IC, but the little pins are too small to fit into the female end of the wire.
I do not want to use a breadboard or solder the wires.
Are there any solutions?
AI: Buy a wire-wrap socket and push your jumpers onto its pins.
Image from https://futurlec.com/Sockets/ICS14MTWWpr.shtml
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H: What does this beautiful 8-winding magnetics do?
Sometimes our magnetic components turn out to be beautiful, like this one:
I took this out of what looks like a projection TV, where there were three of these. Does anybody know what it does? I suspect it is a fine adjust of position.
Here is how it fits into the part that I believe steers the electron gun.
AI: This could be part of an electron beam stigmator. A solenoid with an axial magnetic field can focus/defocus an electron beam. If you have 2nd order and higher astigmatism to correct, you need higher order magnetic fields, which could be produced by this structure. Depending which coils you energize you get quadrupolar fields in one direction of 45° different.
This image from here shows it fairly well:
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H: Switching regulator vs converter
Is there any difference between switching regulators and converters? I have read about step-down voltage regulator and buck converters and they seem to be the same. So, can I use the term converter instead of switching regulator or is not it the same?
For example, in LM2596 datasheet, are use both terms to describe the circuit.
AI: Step-down Voltage Regulator: A device that converts a voltage to a lower voltage, and regulates the output to a constant voltage. It may use linear or switching topology.
Buck Converter: A device that steps voltage down by switching the input on and off rapidly and feeding it into an inductor to 'buck' the voltage.
All buck converters are step-down converters, and most are regulated.
Not all step-down converters are buck converters. They can instead use a transformer, capacitors (eg. LTC1503), or a linear series pass element. Linear regulators can only reduce the voltage, but switching regulators may also be able to increase it (in which case they are called 'boost' or 'buck/boost' regulators). Transformer based converters often have a galvanically isolated output which can be used alone or connected to another voltage source to increase the voltage. The term 'DC/DC converter' encompasses all devices that convert one DC voltage to another DC voltage - whether switching or linear, regulated or unregulated, isolated or not.
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H: Inexpensive ways to drive 30 LED diodes, 15mA each, preferably with less than 30 pins
I have some front panel with 30 LED inexpensive SMT LED diodes with diffrent colors.
I need to "feed" some of them with 15mA to get even brightness (they are rated for 20mA).
Normally, if I have just few LED diodes I drive them directly from microcontroller. Some PIC devices have 25mA capability per pin, but total current cannot exceed 200-300mA (I don't remember exactly), so I can't drive 30x15mA from PIC.
For now I'm using ULN2803A (controlled individually), but I'm looking for:
less expensive way
less pins without multiplexing
I have seen this idea with shift register:
How to drive 30 LEDs with a smaller amount of pins?
but 74HC595 datasheet says that is has only 6mA source/sink current.
AI: I can't post specific product recommendations, but there are I/O expanders out there that will sink 40x 15mA simultaneously for less than $0.14/channel and with far more features than a ULN2803A.
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H: Identifying an SMD voltage regulator chip - top marking 15P
I am trying to replace a voltage regulator - the chip has 3-pins (2 on one side, and 1 on the other) and is marked as 15P. It is also marked with NH (or HN) rotated 90 degrees along the short side. I believe it is 3.3 volt output and likely the max input is around 7 volts. Chip measures 1.4 x 2.9 mm.
_________
| 15P |
|_________|
I have a second board that is not broken so I have added two pictures:
The first picture (can see 15P on the chip) shows the top pin connected to the +ve of the battery and the lower two pins connected to a resistor on the other side of the board. The resistor is shown in the second picture.
AI: The dimensions you have given indicate a SOT23-3 package.
In the question you state voltage regulator, but now that you have provided a picture, it's more likely that it's an P-Channel MOSFET being used for reverse polarity protection, which would have Drain as the input, Source as the output, and Gate to ground.
The part is most likely DMP1045UQ from Diodes Inc.:
The marking of this part would be 15P along the chip, with an additional two-character date code placed 90 degrees from the main marking code. As can be seen from the image, HN does correctly decode into a valid date code of "2020 November".
As a bonus, the part below in the picture, in the 5-pin SOT23-5 package marked SH1B is a switching regulator, the LMR62014 from Texas Instruments. This will be doing the voltage regulation from the battery.
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H: Reason for using short leads with capacitor tester?
When I was a high school freshman many moons ago, I took an electronics course. When the instructor introduced capacitors and how to test them, we used meters that had very short (3 inches or so long) leads. I remember that the instructor told us why such short leads were used but I don’t remember what the reason was.
Can anyone shine some light on this for me?
AI: Yes the leads will add additional capacitance. This will put the measurements in error. The lower the capacitance the bigger the effect.
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H: Alternative MOS and IGBT for MPPT controllers
Are there alternatives to MOS and IGBT-transistors for MPPT-controllers?
Let's say we are considering a solar panel as a power source.
This power supply has an optimal state, because such a ratio of current and voltage, which allows you to give maximum power.
The devices and algorithms for achieving this state are known to everyone (I’m just trying to study this issue, though in theory). These are DC-DC, Boost converters based on a MOS or IGBT-transistor, controlled through PWM by selecting the duty cycle.
What about similar devices that work without PWM?
Are there such ones that allow you to smoothly select the parameters of the chain to achieve the optimal state without PWM?
Edit:
Dear Colleagues!
decided to include small additions to the question.
New Scheme:
Old scheme:
"Wild" surge of solar panel current in the mppt-controller model
After independent work, I decided to include an H-bridge in the circuit. This has improved the quality of power (and therefore voltage and current).
In this case, the system works with PWM, and the inverse branch of the converter is blocked.
In this case, the system includes a sinusoidal extremum seeking, instead of perturbation and observation.
EDIT№2:
I post the previous circuit and graphs of optimal power for comparison. In such a circuit, the power quality is much worse.
EDIT№3:
General structure of MPPT controller
AI: Regarding the point about MOS or IGBT transistors - PWM can be achieved with any device that can handle the correct voltage/current and can switch between fully on and fully off. It happens that MOS and IGBT devices are good for this purpose in practice.
Regarding PWM - the alternative to PWM is linear regulation, which involves operating a transistor in a partially-on state (i.e. saturation in a MOSFET, where drain current is controlled by gate voltage). However, this leads to a voltage drop across the switching element, and thus wastes tons of energy and creates heat, much like a linear regulator. For solar power, your efficiency drops, and you now need to reject heat as well, so you pay the penalty of having heatsinks, and perhaps active fans.
PWM is good for this kind of application because it draws energy from the supply with only modest conduction losses (on-resistance loss during the on-time, leakage during the off-time, and linear losses during a very brief period as the state is switching). All of the filtering is done using reactive elements (e.g. input and output capacitors, inductor) and hence does not dissipate lots of energy (of course, parasitic resistance leads to dissipation). Barring some new linear phenomena such as superconducting DC transformers, you won't be able to achieve the same without modulating your transistors between fully on and fully off - whether it's pulse width modulation, modulating the frequency of fixed-length pulses, or something else that only has fully-on and fully-off states.
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H: Why does this file give me "syntax error: I give up." in verilog program?
This is my original file saved as "example.v"
module example(a,b,y);
input b,y;
output a;
assign a=b&y;
endmodule
This is my testbench file saved as "example_tb.v"
module testbench;
reg t_x, t_y;
wire t_z;
example DUT ( t_z, t_x, t_y );
initial
begin
$dumpfile(“example.vcd”);
$dumpvars(0, testbench);
$monitor ($time, "t_x=%b, t_y=%b, t_z=%b",t_x, t_y, t_z);
#5 t_x = 1’b0; t_y= 1’b0;
#5 t_x = 1’b0; t_y= 1’b1;
#5 t_x = 1’b1; t_y= 1’b0;
#5 t_x = 1’b1; t_y= 1’b1;
#5 $finish;
end
endmodule
Command I runned:
iverilog -o mysim example.v example_tb.v
Error reported:
example_tb.v:7: syntax error
I give up.
AI: Your apostrophe chars are the problem
$dumpfile(“example.vcd”);
should be
$dumpfile("example.vcd");
And for all the literals, such as,
#5 t_x = 1’b0; t_y= 1’b0;
they should be
#5 t_x = 1'b0; t_y= 1'b0;
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H: How do i correct the syntax?
This is the code written for Page rank algorithm in verilog:
`timescale 1ns / 1ps
module PR1();
wire [7:0] links[3:0][3:0];
wire [7:0] links_t[3:0][3:0];
wire [7:0] out_links[3:0];
wire [7:0] p[3:0];
genvar loop,k,i,j;
real d = 0.85; //damping factor
wire [7:0] p_new[3:0];
// hard coded assignment of links
assign links[0][0]=0;
assign links[0][1]=1; // 1 -> 2
assign links[0][2]=0;
assign links[0][3]=0;
assign links[0][4]=1; // 1 -> 5
assign links[1][0]=0;
assign links[1][1]=0;
assign links[1][2]=1; // 2 -> 3
assign links[1][3]=0;
assign links[1][4]=0;
assign links[2][0]=0;
assign links[2][1]=0;
assign links[2][2]=0;
assign links[2][3]=0;
assign links[2][4]=1; // 3 -> 5
assign links[3][0]=0;
assign links[3][1]=0;
assign links[3][2]=0;
assign links[3][3]=0;
assign links[3][4]=1; // 4 -> 5
assign links[4][0]=0;
assign links[4][1]=0;
assign links[4][2]=0;
assign links[4][3]=1; // 5 -> 4
assign links[4][4]=0;
// initialise the vectors p
for (i = 0 ; i < 5 ; i=i+1)begin
assign p[i] = 1/5;
end
generate
for (i = 0 ; i < 5 ; i=i+1) begin
for (j = 0 ; j < 5 ; j=j+1) begin
if(links[i][j] != 0) begin `//line 72`
assign out_links[i] = out_links[i] + 1;
end
end
end
endgenerate
// make the matrix stochastic
generate
for (i = 0 ; i < 5 ; i=i+1) begin
if (out_links[i] == 0) begin `//line 82`
for (j = 0 ; j < 5 ; j=j+1) begin
assign links[i][j] = 1/5;
end
end
else begin
for (j = 0 ; j < 5 ; j=j+1) begin
if (links[i][j] != 0) begin `//line 89`
assign links[i][j] = links[i][j] / out_links[i];
end
end
end
end
endgenerate
// transpose the matrix
for (i = 0 ; i < 5 ; i=i+1) begin
for (j = 0 ; j < 5 ; j=j+1) begin
assign links_t[i][j] = links[j][i];
end
end
// page rank loop
for (loop = 0 ; loop < 10 ; k = k + 1) begin
for (i = 0 ; i < 5 ; i=i+1) begin
//assign p_new = 0;
end
for (i = 0 ; i < 5 ; i=i+1) begin
for (j = 0 ; j < 5 ; j=j+1) begin
assign p_new[i] = p_new[i] + (links_t[i][j] * p[j]);
end
end
for(i = 0 ; i < 5 ; i=i+1) begin
assign p_new[i] = d * p_new[i] + (1.0 - d) / 5;
end
end
for(i = 0 ; i < 5 ; i=i+1) begin
initial
$display("PR of i is %f",p_new[i]);
end
endmodule
Which gives the error messages
ERROR: [VRFC 10-60] links is not a constant [C:/Users//CP/CP.srcs/sources_1/new/PR1.v:72]
ERROR: [VRFC 10-60] out_links is not a constant [C:/Users//CP/CP.srcs/sources_1/new/PR1.v:82]
ERROR: [VRFC 10-60] links is not a constant [C:/Users//CP/CP.srcs/sources_1/new/PR1.v:89]
ERROR: [VRFC 10-1040] module PR1 ignored due to previous errors [C:/Users//CP/CP.srcs/sources_1/new/PR1.v:23]
I am not able to use the conditional statements that has indexing properly.
Please help me to resolve the errors. Thanks in advance.
AI: When using a generate block, values used as conditionals (e.g. in if or for statements) must be constants. The reason is simple - generate loops are unravelled by the synthesis tools into selecting what hardware should appear in the final design. If the value could change, then it would infer hardware that exists one minute, and then vanishes the next.
Constants here must be in the form of a parameter, a localparam, a numeric constant (2'd3), or a genver.
However you have three places where you try to use a wire, e.g.:
if (out_links[i] == 0)
This is not valid, because the wire is not considered a constant here, even though it is driven by one (you could in a simulator for example force the wire to a different value, so it cannot be considered a constant).
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H: Three SPST switches, two LEDs, implementing two logic functions
Given an appropriate power supply, two LEDs, current-limiting resistors, and three SPST switches, build a circuit such that:
When switches A and B are closed, LED 1 is on (otherwise off), and
When switches B or C are closed, LED 2 is on (otherwise off).
It may not be possible to construct this circuit without using additional current-blocking diodes.
If there is an analytical solution available—i.e. mathematical evidence that the requested circuit is either possible or impossible to build given those parts—I'd be very interested to see that, as well.
Context: I gave the challenge to students in an off-the-cuff fashion, not realizing that actually the problem may have been intractable. (Don't worry—it's for a draft recording that hasn't been released to them yet.) Once I was finding that I couldn't quickly solve the problem I myself had posed, I became surprised at some of the subtleties it had exposed.
AI: I don't think it's possible with SPST switches only, you must use diodes to isolate the current path or some another approach.
|
H: How to design a sawtooth wave generator? (Required specification of sawtooth wave 0-14V and 50kHz)
I tried using ICs like the ICL-8038 and the 555 time. It didn't work out because of the supply voltage constraint. I also tried using an op-amp (LTC6244) based circuit. It gave a distorted wave at 50kHz.
I'm new to analogue circuit design. It would be helpful if you could suggest suitable models/ICs for this.
Sawtooth generator using op-amps
Sawtooth waveform output
AI: The distortion of the peaks is due to the fact that you're driving the opamps to their rails. The LTC6244 is a rail-to-rail opamp, but you're asking it to do it at an output current of 7 V / 500 Ω = 14 mA! (Note that both opamps need to supply this current, which is flowing through C1.) Take another look at the datasheet to see why this doesn't work.
You need to increase the supply voltages1 to give the opamps a bit of headroom, and make R1 slightly smaller than R2 to control the actual output swing of U1.
1 This will work in simulation, but when you actually build the circuit, you'll have to pick a different opamp that can actually handle the voltage you're using!
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H: How to integrate in LTSPICE when .step is used?
I know that I can integrate any value in a LTSPICE using CTRL+LEFT_MOUSE. But now I used
.step param Y 0 10 1 to vary my input. And my aim was to get the energy consumed for different input, thus I need to integrate the product of current and Vdd. That is showing some error. Is there anyway to do it without changing the .step...?
AI: Sadly it is not possible with the graphical interface as it is.
What you can do to get around that limitation is use a .meas statement to do the integration for you.
I have drawn a very simple example:
With this measurement statement:
.meas TRAN Energy INTEG V(n001)*I(R1) FROM 0 TO 1
LTSpice will compute the integral of the expression V(n001)*I(R1) from 0 s to 1 s.
The results will be displayed in the SPICE Error Log (under view).
Which looks like this:
With a right click, you can plot the stepped data and get a result like this:
The X axis contains the actual step value (in my case resistance running from 1 to 101 ohm) and the Y axis is the measurement result (in this case the energy when integrating over 1 second from the start.
Read up on the .meas statement in the help, but the interface for it (place a .meas on the sheet and right click it) is quite comprehensive.
Side note as you didn't understand what @winny meant with using @ in the plot environment:
If you enter V(n001)*I(R1) @ 1 instead of V(n001)*I(R1) into the expression to plot, it will only show you the plot of that specific step. This is nice if you have a step which is doing extraordinary things and you want to inspect it closer and get less confused.
It does not allow you to integrate with the CTRL + Left Click functionality though.
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H: How to test a pressure control solenoid valve?
I have tested the resistance of the solenoid valve (variable force solenoid) and it was 3.6 ohm, however, when I connected it to a square 9V battery, the plunger didn't move. Does that mean it's faulty?
This the solenoid valve I have :
AI: First you must make sure the solenoid is rated for 9 volts DC. If it is, you must consider the type of battery. The 3.6 ohm coil would draw 2.5 amps for an ideal 9 volt source. A 9 volt alkaline battery may add a 1 or 2 ohm internal resistance to that reducing the current to 1.6 to 2 amps. A 9 volt zinc carbon battery might add more than 30 ohms, reducing the current to less than half an amp.
Information from comments and another post indicates that this valve may have been removed from a motor vehicle and that vehicle likely has a 12-volt electrical system. The expression "(variable force solenoid)" in the question implies that the valve may work with variable voltage. It seems likely that the solenoid may operate close to 12 volts under some conditions. It probably should be tested by applying 12 volts DC from a source that will not experience a significant voltage drop with a 3.3 amp current draw. It would be best to apply voltage for only a few seconds. If there is no movement, the solenoid is probably bad. It would be preferable to refer to the vehicle service manual.
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H: Measure fuel level using PIC MCU
So I found a bad fuel pump module from a 2006 Chevy Colorado, it has a ceramic resistor used for measuring the fuel level of the tank. I hooked it up to a PIC MCU like shown in the image below. What I want to do is display the "fuel" level (based on the resistance of R2) on a 16x2 LCD. I´m using the 10bit ADC on the micro.
Any tips on how/what can I improve on the circuit to get the full range of the ADC (0 - 1023)
AI: There are a few reasons not to worry about resolution of your fuel guage.
The fuel tank is very unlikely to have a constant cross-section versus height. Even with a linear fuel level sensor you will have errors in the reading.
The fuel level float may be on a swing arm. The non-linearity of the readout as a result of this may help reduce the error caused by the cross-section problem but only if it has been done properly or there is some element of luck.
Your voltage divider circuit is not linear.
Figure 1. The voltage divider output versus R2 resistance.
The combination of all the errors means that you should use the system as a fuel gauge indicator rather than a calibrated gauge. Of course it will still be useful if you make sure that it's accurate approaching "tank empty".
simulate this circuit – Schematic created using CircuitLab
Figure 1. A constant current source would linearise the potentiometer voltage as voltage would now be directly proportional to resistance.
The problem with this is that you'll need to design a CC source that will work off the 5 V supply in which case you'll probably have a constant current compliance up to 2.5 or 3 V so you would need to limit the current to 10 mA.
If you generate the constant current from the 12 V supply then you should add a Zener to limit the maximum voltage applied to the ADC. I've clamped at 4.7 V but a 5.1 V Zener might be safe enough in the event that the fuel gauge sender goes open circuit while you're connecting it up.
The second option gives you a free LED indication that current is flowing - if that's any use.
simulate this circuit
Figure 3. A simple 10 mA constant current source. The current is given by \$ I_{CC} = \frac {0.6} R \$.
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H: Can I properly charge 9S battery pack without a BMS?
I have a small problem with charging my battery pack.
The first problem is that I do not even know if it really is a battery pack. It’s just eight 18650 cells connected in series in order to get +- 33,6V (one cell 4,2V on full charge.)
I’m used to charging one cell with some TP4056 Li-ion cell chargers, but I don’t think that this same approach is fine even in this case. I can’t just connect one TP4056 to the output of the battery pack, right?
Of course, I tried to google this and I found so called BMS circuits (although, I would like to avoid paying for one :-)). Just to be clear, is this a 9S battery pack or not?
battery
AI: Eight cells in series is an 8S battery pack (8 Series) not 9S.
The problem with charging cells in series is balancing them. You need to effectively charge each cell separately to get it to its own individual full capacity, otherwise you end up with cells being over-discharged which kills the cell.
A balancing charger will monitor the voltage of each and every cell and keep charging until all the cells are completely full. Getting a balancing charger for that kind of voltage and quantity of cells will be tricky and expensive. I would suggest, if you don't need "online" charging, that you should split your battery into two 4S segments and charge each segment separately using a cheaper and more readily available 4S balancing charger.
Either that or consider changing your battery arrangement to be 4S but with each "cell" actually two cells in parallel doubling the capacity and current ability of each cell. Then to get the higher voltage use a suitably rated boost converter to raise the voltage to the level you need.
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H: Differential effect of brief power outage on PCs
Let me open with an apology if this is not the appropriate forum.
I have two PCs connected to the same power strip. One is an older tower PC and the other is a new all-in-one. Both run Windows 10 if that matters.
Overnight, there was a brief power interruption, possibly just a few seconds.
This morning, I noticed that the new PC recorded an unexpected shutdown event, but the old PC did not--it appeared not to have been affected.
Is there something about the different electronics that might account for one PC shutting down and the other one not?
Thanks!
(P.S. I did look around for a while on the internet, but I didn't see anything about this question.)
AI: All power supplies have input and output capacitors, thus they can withstand a brief period of input power interruption without shutting down the computer. In fact, the minimal power loss hold-up time is standardized and all PCs must meet the requirements.
Thus, if there's a difference, the reason must be:
The power supply may have used a larger capacitor than the other, or the power consumption of one PC is lower so the same capacitance can last longer, or a combination of both. The result is that one PC's power loss hold-up time meets and exceeds the standard.
Less likely, it's also possible that another PC's hold-up time does not meet the standard, possibly due to an oversight or due to capacitor aging.
According to your description, (1) is the more likely scenario.
ATX specification
In Desktop Platform Form Factors Power Supply - Design Guide (a.k.a. The "ATX" spec) by Intel, page 20 and 21, the required hold-up time after a power interruption is specified.
3.2.9 Voltage Hold-Up Time - Required.
The power supply should maintain output regulations per Table 3-2 despite a loss of input power at the low-end nominal range- 115 VAC / 47 Hz or 230 VAC / 47 Hz – at maximum continuous output load as applicable for a minimum of 17ms (T5+T6).
Parameter:
T5 - AC loss to PWR_OK hold-up time: > 16 ms
T6 - PWR_OK inactive to DC loss delay: > 1 ms
To rephrase it, when the AC line voltage is interrupted, the +12 V, +5 V, and +3.3 V output rails start to fall. For a properly designed, ATX-compliant power supply, the power supply should hold up for at least 16 ms before the PWR_OK (a.k.a the well-known Power Good) signal becomes LOW, telling the motherboard that it has failed. Furthermore, even after PWR_OK becomes LOW, it's also required that all output voltage rails continue to hold up for at least 1 milliseconds before they has fallen below the 95% threshold of their nominal output voltages.
Here's some actual oscilloscope screenshots showing the response of a consumer-grade 650 W ATX power supply after the loss of AC input under full load.
Source: fcpowerup.com, fair use. Note: this is a cool Chinese PC review website which conducts independent verification of consumer PSUs according to the full ATX specs.
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H: Is 3.5VDC going to damage an stm32 analog input?
I have a pressure transmitter sensor that is supplied with 5VDC and provides 0.5-3.5VDC analog value within a pressure range of 0-4bar. The system that I'll be using the sensor within, will almost never have a pressure above 3bars which gives a max. value of 2.75VDC.
Nevertheless I want to make sure that this voltage of 3.5VDC will not damage my stm32f401 analog input. According to the datasheet of the MCU the input can withstand a max voltage of 4VDC and measure a max voltage of Vref+ which in this case will be 3.3VDC. I cannot really protect the input with schottky diodes since the min. forward voltage of a schottky is 0.2V.
The input will have an RC low pass filter which means that a series resistance of ~10k will be provided. This will further limit any potential current caused by exceeding the voltage levels.
Would this be considered a stable approach?
AI: It should be okay based on the absolute maximum 4V and injection current limits in Table 12 and Table 53 of the datasheet.
There are internal protection networks which shunt current from an analog input that exceeds Vdd to the supply rail. In the case of an input that is worst-case connected to the 5V rail the current could be as high as 170uA. You should make sure that's comfortably exceeded by the minimum consumption of your circuit so it can't lift the rail (assuming a typical regulator that can only source current). If you anticipate users doing worse than that (maybe there's a 12VDC or 24VAC supply nearby) then protect accordingly. From the datasheet:
By the way, using Schottky diodes, even small ones, on analog inputs can be problematic if you need to design for robust operating conditions- the leakage can easily cause large errors at elevated temperatures with 10K source resistance.
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H: What is the best option designing a third-order filter
I have a quick design question. I am designing a third-order low-pass filter that I factorized in a first-order section and then a second-order section, with quality factor 1. Now I am thinking about a circuit to do this and I have the following questions:
the gain of my circuit is 10 (20 dB). What is the best way to split the gain in a design point of view? Equal gain in both sections? Everything in one? What is the best criterium?
Does the order of the sections matter?
Thank you!
AI: This is something that would be fun finding out for yourself, so why not try all the combinations and see what comes out of it. First, the transfer functions and the gain are (plots normalized to 1 Hz, not 1 rad):
$$\begin{align}
K&=10 \tag{1} \\
A(s)&=\dfrac{1}{s+1} \tag{2} \\
B(s)&=\dfrac{1}{s^2+s+1} \tag{3}
\end{align}$$
\$H(s)=B(s)\cdot[K\cdot A(s)]\$ (black traces)
\$H(s)=[K\cdot B(s)]\cdot A(s)\$ (blue)
\$H(s)=A(s)\cdot [K\cdot B(s)]\$ (red)
\$H(s)=[K\cdot A(s)]\cdot B(s)\$ (green)
The overall outputs (upper plots) are all overlapping, which is to be expected due to commutativity. The bottom plots show the intermediary responses, and you can see that wherever the gain was used in the first stage (2nd case, blue, and 4th case, green), the intermediary responses are \$20\;\mathrm{dB}\$ higheer than the other two. And between these other two, if the 2nd order stage was used first there is a peaking (1st case, black), whereas if the 1st order is the forst stage (3rd case, red).
The conclusion for these cases is that the best way would be to have the 1st order as the first stage and the 2nd order with the gain as the second stage. But this best refers here to the signal magnitude, since this is the the best that an .AC analysis can give. You could also infer that the peaking will avoid longer and wilder transients and, thus, the signal integrity (e.g. non-saturated) will not suffer, but other details may need different considerations, as hinted by Jakob Halskov. Still, the above arrangement of stages will be a better choice, in general.
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H: PWM to DAC with operational amplifier
I was following this project/tutorial shared on the website of Arduino to convert PWM signal into DAC output.
From what I can see, it uses an operational amplifier with a low pass filter (22uF capacitor and 3.3 kiloohm resistor.) I ran a quick simulation using Tinkercad Circuits simulation which has also Arduino in it.
The issue is that with the 3.3 kiloohm resistor I can read only 1.94V at 50% duty cycle while if I change the value to 1 kiloohm I can read 2.5V. (The correct value since at 100% duty cycle it should be 5V.)
So, my questions are:
What does the resistor do?
What changes with a greater or smaller value?
Background: I need to output a voltage between 1V and 4.5V using an Arduino for sending a signal.
AI: Probably you didn't allow sufficient time for your filtered PWM output to settle and that accounts for the difference in results between 1k\$\Omega\$ and 3.3k\$\Omega\$.
Using the (default, I think) 490Hz PWM frequency and the values of 3.3k\$\Omega\$ and 22\$\mu\$F (time constant of \$\tau\$= RC = 73ms) you get a response like this:
The ripple with this simple RC filter is about 22mVp-p (0.44% of full scale or 0.9% of the output at 50%). As you can see it doesn't get from 0V to 2V all that quickly. A rule of thumb is that you'll get 99% of the change within 5 time constants (365ms in this case).
The larger the RC time constant, the longer it will take to settle, and the lower the ripple will be. So with your 1K resistor you'll be getting more than 3x the ripple (more than 70mV of p-p ripple)
So there is a straightforward trade-off between settling time (we would prefer faster) and ripple (we would prefer less ripple) by altering the time constant. A more complex circuit can give you faster settling and lower ripple. To a first order, and within reasonable limits, it's the product of resistance and capacitance that matters.
Note that 1K is also getting into the range where linearity will be noticeably affected because the AVR chip outputs are not exactly symmetrical and are non-zero resistance (though better than some other MCUs).
Some types of capacitors also have non-ideal characteristics that can affect the output voltage (due to leakage) and the ripple (due to ESR).
And, of course, a simple PWM like this provides an output that is ratiometric to the supply voltage and other pins sinking or sourcing large amounts of current may change the filtered PWM output voltage a bit.
The input bias current of the TLV2451 is less than 7nA so you might well choose to use a much higher value resistor and a small ceramic capacitor. For example, a 1\$\mu\$F X7R ceramic capacitor and a 100k\$\Omega\$ resistor would give similar (a bit slower/less ripple) results to your 22\$\mu\$F electrolytic capacitor and 3.3k\$\Omega\$ resistor.
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H: Modeling bidirectional communication across a coax?
I was reading about the history of cable internet and I'm interested in a simple model of full-duplex communications across a single coaxial cable. My first attempt is simply a transmission line with a voltage source at either end.
Either party can send a signal using their voltage source and receive a signal by listening to the voltage across the coax line (voltage detector not shown). This model cannot be right, because what if the left-hand party decides to send a constant 0 signal while the right-hand party wants to send a constant sine wave simultaneously? The left-hand party necessarily shorts his side of the coax which will ruin any ability to detect the sine wave.
Here is my second model where I've only drawn the right-hand party.
They send a signal by driving Vout and detect the signal by reading Vin. The two resistors have very high resistance values. How accurate is my model? Would something like this basically work for full-duplex communication?
AI: This arrangement is missing the termination which is typically seen in a transmission line circuit -- when terminated, both sides drive their respective ends of the transmission line with voltage sources through some non-zero impedance; sensing the voltage at the ends of the line yields a superposition of the signals from both ends.
As a bonus, there are also no reflections when the line is properly terminated.
Here's an example of series termination. Note the impedance looking into each endpoint is 50 ohms, since it's a 50-ohm resistor in series with a voltage source (which presents zero impedance itself).
This is actually somewhat similar to the second schematic in your question, although it uses one less resistor.
At each red node, the voltage observed is half the voltage of the closest source, plus a delayed version (due to propagation delay) of half the voltage of the distant source. The one-half factor is a result of voltage division between the 50 ohm impedance of the local termination and the 50 ohm impedance of the transmission line + distant termination. This quick analysis holds because the termination is well-matched; if there were mismatches, then the mismatched impedance would need to be transformed across the transmission line, for example with the aid of a Smith Chart.
A similar discussion can be made for parallel termination with current sources - when unterminated, the two sources try to inject different currents into the line, and end up leading to a conflict when solving for currents in the circuit. Parallel termination across those current sources will make the math work and make the circuit likewise work.
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H: Can an FPGA development board be powered by and communicate through the same USB port?
I'm using a Basys 3 FPGA board (Artix-7 family).
I'm powering the board using it's micro USB port to PC USB port and programming it through this as well (in the JTAG mode).
Question: Can I use the micro USB port's USB-UART Bridge functionality while using the same port to power the FPGA?
I don't even know how USBs work electrically speaking so my intuition says yes since I'm programming it through the same cable... obviously this cable must have multiple internal wires that aren't all suddenly dedicated to a constant power level if the same cable can program the board simultaneously.
I understand this may be a naïve question so bear with me - I'm a physics major teaching myself EE.
AI: Yes. The web page how to use the board also confirms this:
The Basys3 board can receive power from the Digilent USB-JTAG port (J4)
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H: Max usable watts for DRV8825 board
I want to supply an energy from notebook adapter to 17HS8401 alloy stepper motor with attached DRV8825 board. My notebook adapter says:
output:
19.5V
2.31A
45W
I know that board can handle 8.2V〜45V2.5A, but I'm not sure about the watts How could I determine it?
Also do I need an electrolytic capacitor somewhere in adapter? If yes, is 35V, 100μF enough?
AI: The motor is rated for 1.8A and Resistance: 1.8± 10% Ω/Phase thus 3.24V when stationary or 5.8W per phase or 11.6W max per motor. Perhaps you want a bigger 24V motor. Can the board PWM down to 3.24V average or current limit to 1.8A? Pref. a low ESR 220uF 35 V cap to handle the high ripple current with PWM and stepping.
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H: Voltage deviation on the bootstrap capacitor
In the application note for ILD8150 at chapter 2.2.7 I read:
The high-side MOSFET gate driver is supplied by the bootstrap circuit. Capacitor CBOOT is charged when the high-side MOSFET is switched off and the diode D conducts current from VCC. CBOOT can be calculated as:
> / ∆
Where QG is the internal MOSFET gate charge, 2.5nC and ∆VCBOOT is voltage deviation on the bootstrap capacitor.The internal supply circuit provides voltage to the bootstrap capacitor VCboot ≈ 8.6 V,which is a little higher than VCC. This circuit helps to maintain the voltage in dim-to-off and standby conditions. Higher voltage improves the RON of the internal MOSFET.
I understand that VCboot is 8.6 V, but what do they mean with "delta" in this context? Perhaps the voltage across Cboot? VCBoot - VCC = 8.6 V - 7.3 V = 1.3 V
Both values are constant, so why do they provide the formula only and not the recommended value for the capacitor? I mean, I cannot change the QG neither ∆, can I?
AI: 'delta' means the change in the BOOT voltage from the initial charged value to the value after the gate charge has been (re)supplied to the high-side FET. The gate charge is 2.5 nC; so if you have a 25 nF capacitor, the voltage will discharge by V=Q/C = 2.5n/25n = 0.1 V. So, even if initially charged to 8.6 V, you will only actually get 8.5 V across VGS of the FET.
This isn't a significant amount, but there is little point in minimizing CBOOT.
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H: How do I know if a wire is floating or not?
In digital logic, there's a state called "1" which is a defined high voltage, for example 2.7 V - 5.0 V. To achieve it we must connect it to VCC.
And "0" which is a low voltage, for example 0 V until 0.8 V. To achieve it we must connect it to GND.
And there's another state called "don't care", or "high impedance" or "invalid state" in which those wires are not connected neither to GND nor VCC. It's called floating wire.
The problem is, how do I check of the current state of the wire is floating?
It's easy to check the logic state of a wire using voltmeter. If it displays 2.7 - 5 volt, we can say 1. It depends on the logic level.
But what if the voltmeter displays 0 volt? There are two possibilities: that the wire's logic is 0, or it's a floating wire.
So what tool/method should I use to check if the wire is floating?
AI: So what tool/method should i use to check if wire is floatinf?
Measure the voltage when the pin is pulled to Vcc by a high value resistor, like 100K.
Make the same measurement when the pin is pulled to GND by a high value resistor.
If the pin has an asserted logic level it should read that level in both cases.
If the pin is floating the voltage at the pin should measure HIGH for measurement #1 and LOW for measurement #2.
If it's configured as an input pin with an internal pull-up or pull-down resistor you will get an intermediate voltage determined by the relative value of your resistor and the pull-up/down.
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H: What's the value of an inductor marked "1K" on schematic?
I found this development module datasheet for FTDI FT4232H chip: https://ftdichip.com/wp-content/uploads/2020/07/DS_FT4232H-56Q_Mini_Module.pdf
At page 9, there is the module schematic, and there are two LC filters for VPLL and VPHY:
The inductors are marked "1K/0.8A", what value in H would "1K" indicate?
AI: FB is "Ferrite Bead". One typical way to rate ferrite beads is the impedance at some reference frequency such as 100MHz and the allowable current.
Typically this impedance is lossy (resistive) so it is given in ohms. "1K" indicates 1k\$\Omega\$. At lower frequencies, the bead appears more inductive than resistive. The 0.8A is the rated current.
Here is a datasheet for an 0603 ferrite bead that likely meets the given requirements. From that datasheet, the complex impedance vs. frequency curves:
Sometimes other characteristics are important such as the DC resistance etc.
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H: Clarifications needed about buck converter output ripple voltage derivation
I have a question regarding buck converter output ripple. In the below figure, could you please tell me how the area shown in the red circle has a time duration of Ts/2?
AI: The waveform is symmetrical.
It's not asserting that the on time and off time are equal, D'Ts and DTs are still unequal.
The time between the indicated points is half the on time + half the off time. So the remaining time is half the off time + half the on time. Equal. Each equal to half the total cycle time.
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H: How much of a difference can a few ohm make?
So I kinda messed my project up a bit and instead of putting 0207 resistor footprints I used 0204 - Because I lack the time to wait for a new board because I still need to test it I just go with 0204 instead - test it and order with a better layout while fixing problems.
But I won't get all the resistors in the size I need in my local store.
Some are fine, like a resistor for a LED. If I put a higher one, the light just isn't that bright anymore - that's okay.
But in this project I also have some pre-defined resistors for MCUs:
I use a LAN8720 where RBIAS Pin needs a 12k1 to GND and 49.9 on the TX/RX pins stated in the datasheet but I can't get this in my local store and order/shipping takes to long. Now I have the choice to take a 12K or 15K for the RBIAS and either 47 oder 52 for the TX/RX pins.
Would that make much of a difference for these?
AI: To answer your direct question: Replacing 12.1 with 12 and 49.9 with 52 is unlikely to have any effect that you can measure without expensive instruments. They even list 12k in their application note in the datasheet. If this is a one-off project or even a small series, just go ahead and use what you can get. Worst case you will find that you can only use 90 metre cables if the temperature is above 70 °C, but I doubt you will even have that.
However, if this is a small series, you should easily be able to fit a 0207 resistor into a 0204 footprint. They'll have worse mechanical stress tolerance, and it's obviously bad for automated production, but for hand placed component it should work well enough.
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H: How to amplify sawtooth wave?
I have to amplify the sawtooth wave from 0-7V to 0-14V with its waveform intact. I tried to amplify the wave using op-amps, MOSFET but the waveform shape changes. I'm new to analog circuit design, it will be helpful if you could suggest any IC or method to amplify sawtooth wave or should I completely change my approach?
Required specification of sawtooth: 0-14V and 50kHz, error allowed in Vpeak,Vbottom,Vpp,frequency<3% and tfall/trise<2%
Max Supply Voltage of 555 timer-18V
Max Supply Voltage of LM334 constant current circuit-40V
Fig: Sawtooth waveform generator circuit
Fig:Sawtooth wave(0-7V frequency=50kHz)
AI: the most reliable way is with an opamp, IMO. Assuming a single power supply, you need any part that has:
rail to rail output
down to negative rail input
at least say 5 MHz GBW product
slew rate of at least 14 V per ~0.5 us = 28 V/us
As tons of opamps meet those specs, part recommendations are not useful.
Another simple way would be a 1:2 auto-transformer. this can be very small and cheap, unless you need this 0-14V signal to drive a considerable load.
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H: Improving grounded emitter amplifier with collector-to-base bias
According to books, this simple grounded-emitter amplifier has some shortcomings. For example, 1) the d.c. operating point is unstable. 2) since the intrinsic resistance of emitter, \$r_\text{e}\$, changes with collector current, the voltage gain of the circuit is not constant, leading to distortion. The books say that a very small change improves the circuit: one side of R1 should be connected to the collector instead of Vcc. I understand why this improves the stability (and the books mainly discuss this), but how does this affect the other shortcomings of the initial grounded-emitter amplifier?
simulate this circuit – Schematic created using CircuitLab
AI: Both circuits (as drawn and implied) have a common problem of not being able to capably control voltage gain: -
The 2nd circuit is definitely better but, like an inverting op-amp without an input resistor, the voltage gain is maxed out and the input impedance is quite small. However, the first circuit is pretty much poor in terms of DC stability compared to when using an emitter degeneration resistor as per this Q and A. You would never use the 1st circuit without some overall feedback control (compared to emitter degeneration).
So, it's probably better to compare the collector-to-base feedback circuit (plus an added input resistor) with, a standard circuit using an emitter resistor: -
I've adjusted the input resistor R8 to give the same dc collector voltage of 6 volts (half of Vcc) and I've adjusted the emitter degeneration resistor to produce the same AC signal gain. So, with a small input voltage of 0.1 volts peak at 1 kHz, we see near identical performance: -
I've plotted Va (left circuit using emitter resistor), Vb (right circuit with collector-base feedback) and the input voltage multiplied by circuit gain, inverted and added to 6 volts.
It's a dead heat as far as I'm concerned. However, with a higher amplitude signal we begin to see some subtle differences: -
With an even higher input signal: -
It's swings and roundabouts really and the strong conclusion I have is this: -
you need an input resistor to stabilize gain (so forget about your first circuit)
pretty much you can use emitter degeneration or collector-base feedback
if you prefer to have a more symmetrical clipping effect then use the collector-base feedback resistor
if you want your signal output to get close to 12 volts then use emitter degeneration
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H: Battery C rating
Does the C rating give the peak current of a battery?
Say 10 Ah battery with a C-rating of 0.5C can it discharge 10 Amps current for 60 minutes?
or a 100 Amps current for 6 minutes?
Will it not overheat?
Or it can discharge a maximum current of 5 Amps for 120 minutes?
AI: The C rating of a battery gives the maximum safe continuous current you can draw from it.
A 10 Ah battery with a 0.5C rating will be able to discharge at 5 A in nominally 2 hours. It will be less time than this, as discharging faster than at which the capacity was rated gives you a lower capacity. Lead acid batteries tend to be rated at 20 hours, as this gives the highest headline capacity.
It will probably deliver 10 A, but it will last less than 60 minutes, and it's not rated to sustain that current without the possibility of some mishap, for instance much reduced cycle lifetime or battery overheating.
It will probably deliver 100 A if connected to a suitable load. See the previous paragraph, but more so.
As @jcaron points out in comments, the terminal voltage will drop as the current increases. You would expect the drop in terminal voltage to be 'small', it may even be specified in the data sheet, for currents up to the C rating. Above that current, you may get rather less terminal voltage than you expect. This is what I was trying to hint at in my paragraph above, 100 A into a 'suitable' load. In this case, the load would probably need to be a short circuit as you could expect the drop in terminal voltage to be significant.
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H: Problem Understanding circuit of 5-volt battery charger IC
The attached image is from the datasheet of IP5306 Fully-Integrated Power Bank System. What is the significance of adding 2 ohms (R3) and 0.5 ohms (R4) resistance in the circuit? It is expected to have a low ESR capacitor in boost converters. But how that extra 2 ohm is adding facility? And the 0.5-ohm resistor, what's the function of that? And how did they selected this value?
AI: Resistor R3:
Adding a damping resistance on USB supply voltage input is standard practice.
And there is at least two reasons why it is there.
Since the cables have inductance, connecting a wire from charger to this powerbank input means the charging cable and the capacitance C1 forms an LC tank which can oscillate at the resonance frequency when the cable is connected (5V step to a LC filter, step response is oscillations at the natural frequency of the system). The oscillations will ring and can go above 5V until the oscillations fade away to 5V DC. It can stress the system and even cause damage if the system can not handle the peak ringing voltages.
So the extra resistor and capacitor is a RC snubber, it helps to suppress the ringing.
The other reason is that USB specifications only allow a certain amount of capacitance directly at the device input, and that's 10uF, more capacitance is not allowed. However, there are also DC input limits, and those combined, the waveform of current (or energy) taken by the device is measured.
So it is possible that as there is already a 10uF capacitor needed in the device, another 10uF capacitor is used for the snubber, and then a suitable resistor is determined by measuring which is most effective suppressing ringing or passing USB specs.
At DC the RC filter does nothing, but beyond the cutoff frequency of about 8 kHz, it's effectively a 2 ohm impedance for high frequency AC ripples.
So the R3 and C6 are not for bypassing the charger chip. At 750 kHz charging frequency, the capacitor C1 that is directly connected to the chip is more than enough to provide low impedance bypass.
Resistor R4:
The datasheet says the BAT pin is for sensing battery voltage. So to avoid errors in the operation due to the switch mode conversion, the battery voltage is RC filtered with R4 and C7 which forms a 14 kHz low-pass RC filter. That leaves enough margin for quick detection of average battery voltage even if it is being charged at 750 kHz or discharged at 500 kHz.
Again, since the only other capacitor value in the board is 22uF it is used here too, and the resistance is selected based on getting suitable RC filter cutoff frequency, and even based on voltage drop due to current into BAT pin if that is used as the supply pin to power up the chip and LEDs etc.
And for this case too, the C7 is not a bypass cap for the switching converter, it's only for bypassing the chip. All the other 22uF capacitors that are directly connected are the switching bypass capacitors.
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H: Where can I find the symbolic symbols of various bipolar, JFET, MOSFET in a *unified* style?
Where can I find the symbolic symbols of various bipolar, JFET, MOSFET in a unified style ?
AI: The proper unified symbols are defined by the International IPC standard and also IEEE Standard 315/ANSI Y32.2/CSA Z99 , which are books to buy. Yet there are a few opinions that reflect some of these in other answers.
IPC symbols are the preferred solution. but based on IEEE standards in most cases.
Since India has a free FOI policy, the IEEE std is available here.
You might also consider this. https://en.wikipedia.org/wiki/Electronic_symbol#Transistors
But the more complex the schematic for logic reasons you consider simpler symbols, but for realization you want more complex symbols depending on analog nature of presentation. e.g. Reverse diodes, ESD protection and parasitic ESL, ESR, DCR and perhaps Ciss, Coss.
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H: EasyEDA: The clearance between two objects is less than the Design Rule Checking (DRC) clearance which has different nets
I am currently working on a DIY project for which I decided to design a custom PCB using EasyEDA. However, after auto routing the copper traces for most of the PCB, I had to manually connect the last few wires/traces. When doing so I got two errors from the DRC and I don't know how to solve them. I would guess it did not connect the traces properly, but I am not able to solve them on my own and could not find an answer to my question anywhere else.
Thanks in advance!
AI: The keyword you are looking for is rules. In EasyEDA you access rules via: Tools > Design Rule.EasyEDA has documentation on their web site. Rules are not only important for autorouting, but for the design rule check (DRC) that use these numbers to check your board.
Learn how to manually route first. Using an autorouter is an advanced topic which requires careful application of rules. Blindly using an autorouter will get you in trouble; simplistic autorouters, like EasyEDA's autorouter, often perform poorly; and any autorouter stifles your learning process in optimal parts placement visualization.
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H: Help with aluminium capacitor identification
I bought a lenovo i3 mini desktop and it turned up very badly packaged and rattling inside.
I was allowed to keep it so decided to take a look inside and everything appeared fine apart from one capacitor has came off the mainboard.
If this was a normal cap I wouldn't have any problem finding another but I cannot get any clue with the markings on the top.
2V100EZA
AI: I believe it's a high-performance 25V 100\$\mu\$F Panasonic EEHZA1E101XP conductive polymer hybrid aluminum electrolytic capacitor with < 30m\$\Omega\$ ESR and 2A ripple current rating.
ZA would be the series
E is the voltage rating (25V)
100 is the capacitance
2V is the lot number
It matches the datasheet markings other than the lot number being on top.
If it matches the 6.3mm\$\phi\$ and 7.7mm height I would be pretty sure of this.
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H: use NPN as a switch between nets that don't have a voltage difference
I'm trying to use an Arduino with a 2n2222 npn transistor to replace the functionality of S1 in this diagram. This is the schematic for my TV remote. I want to replace the physical switch with a digitally controlled one.
PD3 and PA0, according to the datasheet are pulled up to VCC (3v in this case) with a 150k resistor.
Is it possible to use a NPN transistor as a switch in this case? My intuition is no, because there's to voltage difference between the two things I'm trying to connect.
If it's not possible to use a NPN, or any BJT, what other kind of electronic switch could I use here? I could probably use a solenoid or something, but I'd love to use a transistor based solution.
The IC used for this TV remote circuit is HB8101Pk.
AI: According to the datasheet PA3 is input only. That means in the application circuit shown PD3 must be an output pulling low, and PA0 should also be an input with pullup. Therefore if your remote control follows the same scheme you should be able to do this:-
simulate this circuit – Schematic created using CircuitLab
I have shown part of the the equivalent internal circuit of the HB8101Pk so you can see how it works. When the MCU wants to scan the top keyboard row it turns on M1 to make PD3 low. If S1 or Q1 is on then it is effectively a short circuit which pulls PA0 down to PD3. R1 is required to limit Base-Emitter current to a low value that the MCU can handle, but high enough to turn the transistor on fully with a 150 kΩ load.
To avoid injecting higher voltage into the HB8101Pk you should arrange the Arduino I/O to be no more than 3.9 V (eg. by using a 3.3 V regulated Arduino or powering it directly from a 3 V battery), or use a voltage divider to reduce the I/O voltage to less than 3.9 V.
This circuit should work if the MCU is configured as shown. For a more generic circuit that will work with any keyboard no matter how it is scanned, you could use either an 'analog switch' such as the CD4066 or 74HC1G66, or a PhotoMOS 'solid-state relay' such as the Panasonic AQY210EH. Opto-isolation requires more power when operated, but has the advantage that you don't have to worry about having compatible voltages and a shared ground.
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H: Are there any NFC tags that act as a switch or relay?
From what I understand there is always an active (reader/writer) and a passive (tag) NFC device.
Is it possible to have an NFC tag which is part of a circuit and works as a switch or a relay?
I would like to have a reader read the tag and if some condition is fullfilled the reader would then "tell" the tag to switch the circuit on or off. Is this possible?
AI: Nfc does not require the tag to be passive. Active tags exist. A NFC tag is essentially just an eeprom or microcontroller that can pick up modulated signal over RF, and optionally be powered by the low powered NFC rf signal.
You can do this by either using an eeprom based nfc tag that provides the eeprom over say i2c, or a microcontroller that emulates as a tag. Once the nfc writer writes a specific code to the eeprom/microcontroller, your circuit reads it and does whatever you want. Then you erase the code/value/registry to do it again later.
Like https://www.st.com/en/nfc/m24lr04e-r.html or https://hackaday.com/2020/01/30/nfc-for-your-home-automation/
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H: What are the exact model of those two chips?
I have my laptop acer nitro 5. But i did something wrong and the usb power voltage became 0V.
Then i realized that those two chips has broken. So i tried to search the two chip's name which was written on top of the chip but no results came.
The letter written on the first chip is k2j08
And second chip is JCV
Can anyone help me to find the exact model of those chips?
AI: Although there is a lot of "fluff" going on in the news this weekend in the US by our "modern news sources" (that always appear to be reporting the same things read from the same cheat-sheet, but using different software algorithms to get people to click on them and little if any background or research to rub between them) about Biden and local repair stores and DIY repair (someday), I think it's still a long way off if ever in the US. In the meantime, manufacturers (and Samsung, in particular) are often hide-bound before they will tell you the COTS parts you might buy to replace these (assuming they may be available to you, at all.)
That said, there are a few ways left to us. And given some of the details you've provided the best I can come up with are these thoughts:
K2J08: This is probably some kind of step-up DC/DC converter. A list of these can be found here and on this page you can see that the part #RP400N261B is labeled as a K2J, which matches your first three characters on the package. This is a SOT-23-5 packaged device that outputs (I think) \$2.6\:\text{V}\$ from Ricoh. I found a datasheet here, though I don't use that site for much. Use it at your own risk.
JCV: Your image appears to show a SOT-23-6 package for this, but the closest I I think I can find is an S-80136ANMC-JCVT2G. The datasheet is at this Mouser page. That's a SOT-23-5, which worries me a bit. But this is the best I could do in helping out.
The above may give you something to go on, anyway. You should look over the pinouts and compare with what you see on the board to see if things make sense -- or if the board's parts and layout conflict with the ideas above.
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H: Connecting different Ah lead acid batteries in series
Is it OK to connect several lead acid cells with different Ah capacities in series?
I know it can be done in parallel as long as their nominal voltage is the same.
AI: No, do not connect different capacity batteries in series, because after the lowest A-h capacity battery is discharged, it will be charged in reverse by the other batteries, quickly destroying that, and possibly outgassing dangerous hydrogen. You would also need to charge batteries individually, or the smaller batteries would be overcharged, again, releasing H2.
However, if the batteries are the same voltage and same construction, i.e., all wet plate, or all gel-cell, then put them in parallel and use a boost converter, such as this example. Of course, you need to choose a converter for your voltage and current needs, and remember that current drawn will also increase in proportion to voltage gain.
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H: What is the function of the inductor in the "Dual active bridge" DC/DC converter?
Studying the principle of operation of the DC/DC converter "Dual active bridge", I'm trying to understand what task the inductor (Ls) shown in the diagram performs. The transformer galvanically isolates and regulate the voltage in output side.
I didn't find much information on this inductor.
There are thoughts that it accumulates energy, but I'm not entirely sure about this.
Question: what tasks does this inductor perform?
P.S. Maybe someone knows some good articles on this converter?
Thank you!
AI: Read this answer that details how a buck converter and a boost converter are combined to produce a synchronous H-bridge buck-boost circuit like this: -
Picture from here. Note that the circuit is bidirectional i.e. power can flow in either direction.
Then, to add galvanic isolation a transformer is used but, to ensure the transformer windings can be driven correctly, you can use a H-bridge driver attached to the primary like this: -
Picture from here. However, this circuit isn't bidirectional so, to permit this, a H-bridge is used on both sides like so: -
Picture from here.
Then, it's a simple matter of where you place the inductor as per this: -
Picture from here.
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H: How to specify the time as a dependent variable inside 'INTEG' or 'AVG' in LTSPICE?
My aim is to calculate the average and integral of a function. I have already used step function (.step param...). Right now I was using .meas to do this operation, but in that I have to mention the time as 2 to 3 ns or a range like that. I wish to integrate for a range of 2 ns to time taken by the node to reach 1.4 volt (that time varies for different .step inputs). So how can I specify that?
AI: It is not so clear to me what you are trying to achieve, but maybe one of the following measurements might help you:
Case 1: Integrate \$V(vdd)\$ from \$t=3ns\$ to \$t=5ns\$
.meas VAVG AVG V(vdd) FROM 3n to 5n
Case 2: Integrate \$V(vdd)\$ from \$t=3ns\$ until \$V(q_t)=1.4V\$
.meas VAVG AVG V(vdd) FROM 3n TARG V(q_t)=1.4
Case 3: In case \$V(q_t)=1.4V\$ is reached before \$t=3ns\$, the average will be calculated "backwards", meaning from \$t(V(q_t)=1.4V)\$ to \$t=3ns\$.
If you want to avoid it, you can tell LTSpice to search for \$t(V(q_t)=1.4V)\$ after a given delay:
.meas VAVG AVG V(vdd) FROM 3n TARG V(q_t)=1.4 TD 3n
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H: Why is there a parallel resistor on this regulator ouput?
In the regulator circuit below
What is the reason for having the R103 470Ω on the output of the regulator?
I feel this is wasting 9mA of current.
Could it be for adjusting the properties of the filter made in pair with the capacitor?
AI: What is the reason for having the R103 470Ω on the output of the
regulator? I feel this is wasting 9mA of current.
Look at the bottom of page 25 in the data sheet: -
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H: Connecting multiple MIPI CSI Cameras
I need to synchronize 4 multiple MIPI CSI Cameras. I'm using the following MCU
https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i-mx-rt-crossover-mcus/i-mx-rt1050-crossover-mcu-with-arm-cortex-m7-core:i.MX-RT1050
I would like to know the proper way of connecting multiple CSI Cameras and synchronizing between them.
The idea also is to use an IMX8 processor as Main CPU and use the imxrt01050 as slaves that are connected to the cameras.
Which setup is possible with correct synchronization between all of them ?
Kindly note I plan to use 1080p resolution at 30FPS.
AI: Seeing you need synchronization only on a frame basis, this should be rather straightforward: nothing in your microcontroller needed to initiate the camera giving images takes in the order of 1/60 s.
So, you'd just write firmware that takes some start signal (for example, simply a GPIO input going high) and tells the camera via I²C to start sending data. If you share the same trigger with all microcontrollers, this should be rather straightforward, and the timing insecurity, especially if the triggering happens in an interrupt, should be far below 1/FPS.
Regarding how to connect 8 of these cameras to one application processor: well, tough one, because this is a lot of data.
The 100 Mb/s ethernet integrated in your MCU is not fast enough for uncompressed full HD at 30 FPS (30 F/s * 1092*1080 px * 12 bit/px is about 283 Mb/s). So, that can't work.
The only other fast interface is the USB2 High-Speed interface, which, with 480 Mb/s is nominally fast enough for 12 bit per pixel, but you'll find that it's not trivial to write USB firmware fast enough. So, you'll need to write a firmware that deals with camera data, and makes sure it is DMA'ed into the USB peripheral buffer. Of course, you'll have to implement the USB stack. NXP does have an app note on how to implement a USB Webcam style device with your MCU, but it does 640x480 at 20 fps, not six times that resolution at 1.5 times that frame rate.
Then, you will have to aggregate all that data over USB at your central processor. I doubt you've made a good choice there – you will need, bandwidth-wise, a high-speed USB controller per camera, and your central processor doesn't have 8 of these.
So, all in all: I think both your MCU and your central controller are the wrong tools here.
Realistically, you'll want an FPGA on which you can instantiate 8 MIPI CSI interfaces, and then have one link to your central controller CPU; probably via multiple PCIe lanes. That'd solve the USB bottleneck, but it does not solve the fact that this is much data, and it's very questionable your cute little quad-a72 core processor (since your workload is fully identical 8 times, the littleBig little-cores cores don't help that much) will be able to deal with 8 camera streams. Don't forget that having one or two video processing chains does not make dealing with 8 video streams simple, by any means.
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H: Boost converter Ic extremely heats up when trying to switch using Mosfet
In Case 1, the converter works fine but in the other case it heats up extremely.
Tried same using a PNP nosfet and it heats up the same as soon as load is connected.
12v 1A router is used as a load for boost converter
The mosfet is biased using a 9v supply and a 1k resistor.
Mosfet is Irf Z44n
AI: On the face of it an IRFZ44 MOSFET seems quite suitable for dealing with a 1 amp load: -
With a 8 volt gate drive voltage, the MOSFET will conduct and produce a volt drop of about 55 mV. However, the 1 amp load is at 12 volts and your circuit uses a booster to generate 12 volts from (let's say) 4 volts.
Now, the input current to the booster will be 2.5 amps (100% efficiency) or quite likely 3 amps for typical device.
So, with 3 amps flowing through the MOSFET the volt drop will be 0.1 volts and that loses 0.1 volts to the input of the booster and that requires more current on the input and you are close to things running away and getting rather hot.
Added to this is the inrush current of the load that maybe 5 or 10 times the normal running current and you have a situation that can never work.
Solution - pick a MOSFET with much lower on resistance.
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H: Why one of the circuits in the picture don't work
I am trying to create the following circuit on Rasberry Pi board. The LED is suppose to turn on when the as long as the switch button is pressed and off again when the button is released.
I am making this.
This one doesn't work:
but this one does:
I suspect that I shouldn't connect GPIO 18 circuit to R3 and 3.3V. Instead, I should connect switch to R3 and 3.3V. But isn't that the same thing (looking at the diagram).
AI: simulate this circuit – Schematic created using CircuitLab
No, it is not the same thing. The first picture is wrong and not according to the schematic.
The first picture design will only pull the GPIO down via resistor while another resistor pulls it up via the other resistor. That means when button is pushed, the GPIO pin is only pulled down to half of the 3.3V supply voltage, 1.65V. When button is not pushed, there is single 10k pull-up to keep GPIO pin at 3.3V.
The second picture design is according the schematic so it will work. When button is pushed, the GPIO pin is pulled low via single 10k resistor and button to 0V. When button is not pushed, it is pulled up to 3.3V via the two resistors in series to 3.3V.
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H: Is there a way to measure the Phase Shift between the input and the output voltages related by the equation: \$V_o = V_i(a+jb).\$?
Say \$V_i\$ is an input voltage, and the output voltage is given by \$V_o = V_i(a+jb).\$ Is there a way to measure the Phase Shift between these input and output voltages?
AI: If you know the frequency (and no other frequencies are present) then you can find the relative phasors of the two sinusoidal voltage waveforms using 2 samples taken \$\frac{1}{4}\$ of a cycle apart.
Assuming that sample \$X\$ is the present sample and sample \$Y\$ is the sample taken a quarter cycle earlier (both are samples of the same signal):
$$Amplitude=\sqrt{X^2+Y^2}$$
$$Phase Angle=tan^{-1}\frac{Y}{X}$$
So, do the phase angle computation for both signals and you will have their separation. You will incur some error depending on how fast the phase angle changes but right on for steady-state.
Of course, this only applies to the case of single frequency present. Otherwise the DFT approach as @Antonio51 suggests is appropriate. +1 for his very nice answer btw.
Credit: I first learned this approach from Schweitzer Engineering Laboratories relay manual (2 decades ago). Below is a graphic from one of their newer SEL-421 relay manuals. They scale for rms which I didn't do above.
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H: Output composite video (PAL) signal from FPGA DAC, totally lost in the analog domain
I'd like to start generating (and perhaps also capturing) composite video (PAL) signals from a digital source, eg. FPGA. However, while my digital logic/programming skills are covered, I'm lacking a lot of fundamental analog concepts, and I'm a little lost.
From what I understand, the idea basically boils down to outputting the correct voltage at the correct times from an output pad on my FPGA. I'm thinking that the entire signal (including sync pulses/color carrier modulation/etc) could be generated in the digital domain, and then passed through a DAC. I don't think I'll have much issue figuring these parts out.
The output voltage from the DAC needs to be connected to an output terminal. Already here I'm wondering how this would work - what do I need to worry about? I assume it's not enough to just connect the DAC output pin and ground to the terminal? What kind of current would I need the pin to output/source? What kind of current needs to be on the terminal? Might I need some kind of amplifier/protection circuit in between them? Are these even relevant questions?
From the terminal, the signal would then be transmitted along a composite RCA cable to the receiver on the other end. I know that composite video cables have a characteristic impedance of 75ohms, but I'm not sure what that means beyond knowing I have to match it with my output, which I also don't know how to do. Is this related to my previous questions?
Is there anything else obvious that I'm already overlooking?
I'm also curious about how this might work for audio signals, though I guess it's all the same in theory, just with perhaps some different parameters and maybe some filtering (eg. DC blocking) for the "pure" AC stuff?
Any and all guidance/responses appreciated. Thanks in advance!
AI: The composite signal will have a swing as much as 1V or so, including sync, driving into 75 ohms. Plan for 1.1V. This can be driven by a DAC directly assuming it has a suitable swing (for example, a ‘video DAC’). A DAC of at least 10 bits, followed by a buffer with a low-pass reconstruction filter is recommended.
The video output signal can be referenced to the sync tip as minimum DAC voltage. The video blank level will be 300mV above that, with peak signal 700mV above that for PAL. NTSC is slightly different due to its use of setup but will be similar.
This app note gives further details: https://www.analog.com/en/technical-articles/video-signal-distribution-using-low-supply-voltage-amplifiers.html#
As to how to synthesize the signal, your source is likely to be 13.5 MHz 4:2:2 signals (27MHz base clock.) Your subcarrier will be different, but it’s possible to synthesize a version in 27MHz domain using a digital synthesizer. You then create the U/V pair (should be low-pass filtered), modulate each with its subcarrier phase (V phase shifted 90 degrees from Y), add to Y, then finally add to sync and blank level to create the composite signal.
There’s also some fine details about interlace and special handling of subcarrier phase to consider, as well as wave shaping sync. Finally, using up sampling before the DAC will improve performance.
If you’re doing this for a learning experience I suggest getting a copy of the Keith Jack ‘Video Demystified’ book as a starting point. If you’re doing it as a project that has a budget and schedule, consider using a known-good IP block instead.
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H: Why did my capacitor explode?
I'm new to electronics and am trying to use an Arduino and 2 BTS7960s to control 2 motors. I am powering the circuit with a 20V max Black and Decker battery. Here is what the motor part of the circuit (disregarding the Arduino) looks like:
The battery wires are attached to a lever connector. I first plugged in the wires from the BTS7960 to the motors and the lever connector, and then connected the battery wires to the lever connector. A few seconds after doing so, the capacitors on both BTS7960s exploded. I thought some wires might be touching, but I couldn't find any touching wires. The Arduino was off, so there was no reason for power to be drawn from the battery.
AI: I accidentally reversed the polarity of the wires coming from the battery. Setting them back to normal solved the problem.
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H: Capacitor and Resistor Values on Headphone Amp Out (highpass filter)
I'm more of a programmer than someone who knows electronics. Just trying to figure out what forumlas/method to get the right capacitor and resistor values in my headphone out circuit here. Would you kind folks be able to help me out with these calculations?
I have attached a photo snippet from my kicad schematic here (I have chosen the values 300uF and 10k as a placeholder). Essentially what's happening is the audio codec that I'm using, which I am stuck with for reasons I won't get into, only has a headphone out that uses a virtual ground (1.65V), so it's really meant to be plugged into headphones only. So I'm trying to fool-proof my design so if the headphones get plugged into something like a line-in on an amplifier that shares the power source of my device, it won't cause any problems.
The headphone signal which is centered at 1.65V leaves the audio codec, it goes into the capacitor that removes the DC Offset, there is then a resistor afterwards which serves to charge the capacitor on power up to remove the pop when headphones will be plugged in and out. I also have the headphone signal connected to a solid state relay, which will wait 2 seconds after my device is powered on before closing the circuit at that point (so the capacitor has time to fully remove the dc offset), so that if the headphones are already plugged in on power up they will be protected from the dc thump too.
As far as I'm aware this essentially creates a highpass RLC filter. The headphones are the inductor, and usually headphones are somewhere between 15-30 impedance. Ideally I'm trying to get the cutoff point lower than 40Hz so that the phasing and cutoff are lower than what the headphones are capable of outputting. Also I was told the size of the capacitor will also introduce more resistance into the signal which may or may not be an issue. What forumlas/calculations do I employ to set the ideal capacitor and resistance values to get a cutoff point of 40Hz or less? Tysm!
EDIT: adding the photo of the solid state relay IC I'm using
AI: The formula for calculating the RC highpass cutoff is simply Fc = 1/(2piR*C).
So for 300uF and headphone impedances of 15 to 40 ohms the cutoffs are 35 and 13 Hz respectively.
However the solid state relay may be completely unsuitable for passing audio, it's a dual SCR, not an analog multiplexer. It may need 5 to 20 volts to turn on, which is way overboard for a headphone output operating on much lower voltages.
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H: What is Analog Ground in UDA1334A?
I purchased Adafruit's UDA1334A I2S Stereo DAC, and I'm trying to figure out how to wire it to speakers. I see I have the Lout and Rout pins, which I suppose is the positive for the left and right speakers, and between them I have AGND pin. Should I connect this to the ground of both speakers?
AI: The Adafruit DAC module has a line level output.
It can be connected to an amplifier line level input.
It can barely drive headphones but it's not meant for it.
It cannot drive speakers directly, you need a speaker amplifier for that.
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H: How is the frequency multiplied by four here?
Here is the original circuit found from YouTube link.
Since I don't have all the parts, I modified the circuit diagram:
I have edited this circuit diagram.
When I add the Zener the sound improved. The Zener is a 1N4742 (between crystal and inductor to ground.)
Circuit shown in the YouTube video
What I don't understand is how the 25 MHz frequency became 100 MHz. Also I can hear a blank sound in 100 MHz tune in (digital) radio. The 20 nf capacitor is there to get output. I am not sure if it is the output. Notice that the inductor and capacitor (near collector) are completely irrelevant as shown in the video.
According to the equation,
\$R = 1/(2πFC) \$
20 nf capacitor should be enough to pass 100 MHz wave.
AI: Someone else can surely write up a better and more detailed answer than this, but:
A quartz crystal is, basically, a little tuning fork that vibrates at a specific frequency, called the fundamental. Anything that can vibrate naturally at one frequency can also vibrate at a multiple of that frequency, called a harmonic or an overtone of the fundamental frequency. In fact, unless you're very careful, it will vibrate in a linear combination of all overtones at once, usually (but not always) with the higher ones having lower amplitude. (this is why, for instance, a violin and a trumpet sound different, even when playing the same note.)
In your case, your circuit is exciting the crystal in such a way to make it resonate at the fourth harmonic of its fundamental frequency. Some crystals are specifically designed to be used in this manner, but any crystal can be.
Basically, there is no 25 MHz frequency anywhere in your circuit, not to any significant degree--you're using a 25 MHz crystal's fourth overtone to produce a 100 MHz oscillator.
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H: Why is this circuit making a short to ground?
I was watching this video. I don't understand a circuit from the video works.
This is the circuit:
The last pin on the left is the reset pin, so every time the button is pressed, the microcontroller is reset.
I don't understand what is happening in the circuit when the button is pressed.
Why do the electrons coming from the negative side decide to go through the resistor instead of going through the microcontroller?
AI: Pushing the button connects the reset pin directly to 0V ground node, which means that also the reset pin will have 0v, even if there is a 1 kohm resistor. Assuming that the other side of resistor is at 5V, then there is 5V over the resistor and thus 5mA will flow via resistor and button. If MCU pin has high impedance, i.e. no DC path to VCC, no current flows via MCU pin.
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H: Fully differential opamp with transformer coupled input voltage
I want to amplify / buffer a transformer coupled voltage with a fully differential op amp. When using e.g. instrumentation amplifiers with a transformer coupled input voltage, one side has to be grounded somehow. I believe that the circuit shown below should work though. What is it that makes a fully differential op amp work with a "floating" input voltage?
AI: A differential op-amp provides a path for the input bias current to local ground via the two resistors (feedback and input resistors).
An instrumentation amplifier does not require resistors at each input but, does expect input bias currents to be "soaked up" by the voltage source that connects to those inputs. However, if that voltage source is floating (as in the case of a transformer secondary), the bias currents can only flow to each opposing input terminal and you get a problem in that one input cannot necessarily act as a current sink to the other (because they are near-identical).
This is why such people as Analog Devices make recommendations like this: -
Taken from data sheet for AD8221 for example.
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H: Two cables that dissipate the same heat the same?
Suppose we have two conductors which dissipate 10W, one is copper and the other is aluminum. Will both heat the same and do it at the same time? Assume the external heat dissipation is equal for both conductors.
AI: The temperature of an electrically heated conductor will stabilise when heat lost to it surroundings = power in.
If the conductors are the same length and the same resistance then the aluminium conductor will have a larger diameter than the copper conductor as copper has a higher conductivity. That means the aluminium conductor will have a larger surface area to radiate heat. I would expect that at steady state the aluminium conductor will run cooler.
... assuming the external heat dissipation is equal for both conductors ...
If they're both dissipating 10 W then they must be the same.
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H: What is the difference in power consumption between thermocouple and thermistor?
I am working on a project to transmit sensor data and I chose to go with a temperature sensor to connect to a micro-controller.
Since I care a lot about power consumption for my project, I would like to know which is less power-consuming a thermocouple or a thermistor. Is there a way to connect one of them so it is more efficient than the other?
AI: There's not much point in comparing the power consumption of just the sensors.
A thermistor requires that you send a small current through it to measure the temperature. The resistance of the thermistor changes with temperature. A device to measure the temperature with a thermistor is an ohmmeter with some additional math.
A thermocouple generates a voltage proportional to the temperature - is produces current instead of consuming it like the thermistor. A device to measure temperature with a thermocouple is a (very) sensitive voltmeter with some additional math.
The difference is that the signal is much stronger from a thermistor than a thermocouple.
A typical thermistor changes resistance enough that a 10 bit analog to digital converter (ADC) from a microprocessor (voltage resolution of 5 millivolts or so) can easily make 1 degree temperature measurements.
A typical K-type thermocouple changes its output voltage by only some 40 microvolts per degree. The ADC of a typical microprocessor can't easily measure voltage changes that small. You'll have to use a different ADC or an analog circuit to amplifiy the signal before digitalizing it. You might also look at using a purpose built IC, or a thermocouple module that includes all the pre-processing and delivers a digital value to the microprocessor.
While the thermocouple actually generate power, using it can easily consume more power than the thermistor "wastes."
It isn't just the sensor you have to look at. You have to consider the circuitry around the sensor.
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H: How can 3.3v CAN-bus transceiver communicate with 5 volt CAN-bus transceiver?
I'm suing TCAN33x from Texas Instruments and it's a 3.3v CAN-bus tranciever.
I have succeed to listen for CAN-bus messages from a 24V J1939 CAN-bus stepper motor. Very industrial.
But I haven't succeed to send commands to it. I haven't tried to much to communicated with it. But I notice something in the data sheet of the TCAN33x
https://www.ti.com/lit/ds/symlink/tcan334.pdf
CANH will be between 2.45V to 3.3V (Vcc = 3.3) and CANL will be bewteen 0.5V to 1.25V
But when I searching on CAN-bus signal, the CANL and CANH is much higher than so.
For example here CANL is between 1.5V to 2.5V and CANH is between 2.5V to 3.5V
But still, the data sheet of TCAN33x says.
Question:
How can 3.3v CAN-bus transceiver communicate with 5 volt CAN-bus transceiver if they are not at the same level of voltage?
AI: “ The use of single 3.3-V supply enables the transceivers to directly interface with 3.3-V CAN controllers/MCUs. In addition, these devices are fully compatible with other 5-V CAN transceivers on the same bus”
Page 3 https://www.ti.com/lit/ds/symlink/tcan334.pdf?ts=1626098583867
This is due to the differential voltage method of reception of these signals on a controlled impedance within either common mode voltage.
This IC has a Vcm range of -12V to +12V on the receiver input.
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H: Saturation for emitter follower
How can a transistor connected in emitter follower configuration be driven into saturation?
I know that for saturation, the base voltage should be greater than the emitter voltage, but also than collector voltage.
I am asking because some H bridges use only NPN transistors with the top transistors connected in emitter follower configuration. I don't understand how can they be driven into saturation.
AI: Emitter Followers do not saturate. There is a reason for it. Since the load current is pulled by the emitter it can never rise above the base voltage for in-order to get Vce<Vbe. It would require a Vb>Vcc to saturate Vce.
The popular old L298N is rated for low voltage and 2A but not together. If you used a single supply Vcc =5V with a 2A load the voltage across the load worst case is almost zero, meaning almost a short circuit is needed to get 2A. But for low currents a few volts across the load is possible.
It is an emitter follower high side and common emitter low side in an H bridge while both are used to drive a differential load. There is a large drop allowance on the external low side current sense resistors which must be minimized preferably 50mV max then amplified for feedback.
BJT emitter followers have higher linear operation and better hFE without the saturation effects but also with a higher Vce drop than Vce(sat).
BJT saturation depends on the CB junction no longer being reverse polarized and the Ic current rise and voltage drop of Vce less than Vbe.
This apparent forward conduction of collector-base also reduces the maximum linear hFE current gain into this non-linear mode, as the collector is no longer a high resistance current source but with lower current gain and becomes a low resistance voltage source or switch. Whereas emitter followers have the emitter drawing a base current Ib=Ic/hFE ( and Ic~Ie)
You won’t see these with complementary shared collector outputs because the risk of shoot-thru across Vcc+/- or gnd will short the supply with inductive loads unlike CMOS which share common drains. CMOS or complementary power FETs are easier to control the required “dead-band” or dead-time where both drivers are turned off or partially conducting yet must be protected from flyback voltage.
Generally, Vce=Vce(sat) is often defined by Ic/Ib=10 at some nominal rated currents. When you see transistors rated for Ic/Ib = 20 or 50 it is only because their linear maximum hFE is > 10 greater than these ratios. There exists hFE’s > 1000 rated at 50:1= Ic/Ib but this comes at the expense of other parameters like Rce= delta Vce/delta Ic in saturation and also BW reduces for possible GBW products so they are not common for switching transistors. Diodes In has many patents on on transistor design to improve this and rate their best devices with low Rce in mOhms vs the typical 1 Ohm for a PN2222A but this comes at a great cost,so you won’t likely find it in motor driver IC that need fast dV/dt.
I recall the audio transistor 2N5088 has these high hFE’s with gold doping but also limited to audio Bw applications.
Since Vce is created by the emitter load current pulling down the base current, and the base voltage always being slightly lower than Vcc, Vce can never go lower than Vbe or in other words the CB junction can never see a forward voltage and thus Vce never reach Vce(sat). Thus these “old school motor drivers are only useful where the Vcc is much higher than Vbe to avoid the dropout voltage that is also common the BJT Op Amps. With emitter follower Darlington drivers, it’s even worse with more voltage drop and motor drive power-loss with two BE diode drops.
Thus unless cost is an overwhelming bias to choice, FET bridges are preferred for Vcc <= 12V for lower heat rise and greater efficiency.
Of course you can always sink that heat and raise Vcc to generate a voltage to match the motor limits but this is a big cost-performance tradeoff for low voltage motors.
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H: Why doesn't this USB to UART bridge circuit work
I spent most of the weekend trying to figure out why the circuit I made to upload firmware to an ESP32 (datasheet doesn't work. The reference circuit below was taken from EspressIf and I tried to recreate this on my own. This is the manufacturer of the ESP32 chip so it should work. If anyone has a clue what it could be, that would be most helpful because I am at a loss at this moment.
My version is just slightly different but doesn't work:
I checked for shorts and proper connections on most of the key components: bridge IC(datasheet, micro-USB, ESD diodes. But it is not working. I do want to mention that the RXD and TXD lines are each going through a multiplexer that is acting like a switch which is closed to the firmware upload serial connection when Vbus is connected. I can go into detail, but I no longer suspect this is the issue.
Some observations and general info:
3.3V continuous net which receives power from Vbus is reading 3.3V
Vbus net is reading 5V
DP is reading 3V
DN is reading 0V
Soldering was done with reflow oven and stencil
The error I am seeing with the circuit is when I plug in the device windows says something like "does not recognize device and it may have malfunctioned".
PCB footprint of malfunctioning area
actual photo after reflow soldering.
close-up of bridge circuit after soldering. I have verified that there isn't bridging between the pads by verifying no continuity between all adjacent pins.
close-up of micro-usb. I have attached a stripped micro-usb and verified no continuity between all adjacent pads. I have also verified that there is continuity to each respective diode at the beginning of the circuit. So for example Vbus and D304s continuity has been verified.
The bridge IC on my board is on the top layer and rotated 90CCW. Here is an image of what that pin out would look like
Here is a close-up of my board's PCB footprint for the bridge IC.
AI: The issue is likely due to the huge amount of capacitance you've put on the data lines due to your clamp diodes. USB requires very low capacitance zener diodes - those huge 600W clamp diodes you have selected are likely distorting the data waveforms to the degree the USB device cannot enumerate.
If you remove D301 and D302 I suspect it will start working.
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H: How to calculate energy added to grid using active and reactive power?
I have recently installed solar system that adds energy to the grid. My utility company has installed bi-directional meter at my place to record energy consumed as well as energy added to the grid.
Energy consumed is recorded in meter as kWh which is pretty usual however energy added to grid is given in kVARh, I assume they call it reactive energy. Meter provides positive active energy and positive reactive energy readings.
Is there a way I can calculate how many units I have added to the grid?
AI: I was originally thrown off by your statement that energy added to grid is given in kVARh because all GTI’s that I know have no reactive energy supplied to the grid because by design they are active pf corrected to 1. So verify please and provide more details.
However some high power lower quality GTI’s do have harmonic distortion and have been known to induce circulating currents in good GTI’s with low impedance on these harmonics and raised the currents in neighbouring solar farms enough to raise the currents 20% and blown 80A fuses with generated sine power going out and absorbed harmonics coming in. But this might or not be relevant.
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VARs are reactive power but monitoring this alone is not enough to see real energy transferred.
Web and meter reading features ought to be available to monitor actual values depending on service provider. I know Huawei converters have excellent web stats with an ethernet link.
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H: Electrolytic capacitor function for noise filter
I have a 2-wire endstop that gets a lot of noise (the cable is together with other stepper motor cables) and a lot of noise enters it for a 3.3V microcontroller (I measured it with an oscilloscope.)
Someone recommended this circuit, I think that with an RC filter it would be enough but in addition to that he added a 1uF electrolytic capacitor. What function does this capacitor perform?
AI: The 2 capacitors are necessary if you are trying to reduce as much noise as possible. Although the non-polarized one might look useless considering how small it is, the function isn't to add more capacitance; it's there to impede noise at frequencies the electrolytic cap cannot absorb.
For a much more detailed explanation, check out this video:
https://www.youtube.com/watch?v=WytU5uj78-4&ab_channel=Afrotechmods
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H: Type 3 PoE PD with High Efficiency DC-DC Controller
I am reading the TI POE IC(TPS23730's datasheet), and I have some questions I would like to ask you, if you can help me I will very much appreciate it.
1.) What's the internal hot-swap MOSFET, I have no idea what's this use for?
2.) What's Oring?
3.) What's APD function and PPD function.
4.) Why need to use RTN pin, GND pin, and RTN pin, all three are ground why cannot just use one.
5.) What's beat frequency
I have read this datasheet but I still cannot understand the above question, hope someone can give some help.
AI: Q1: The hotswap switch disconnects the load from the PoE power source in various transitional conditions, some of which may occur when making PoE connections under load.
Q2: Oring is the capability to get powered alternatively by several power sources.
Q3: APD = Auxiliary Power Detect (for supporting an alternative power source other than PoE). PPD = Power Detect (a different input for the same purpose)
Q4: Connecting RTN and GND would defeat the hotswap feature and disable current limiting. You would thereby lose some protection features.
Q5: A low frequency signal that results from mixing two higher frequency signals of similar frequency. This may result from a switching frequency of the TPS23730 that is near a frequency within the powered system. By locking those two frequencies together you may control or eliminate the beat frequency.
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H: How to connect a thermistor to a micro-controller?
I was following a datasheet of a micro-controller and I got confused. I have two thermistors (LM 35DZ & TMP36GT9Z.) I would like to connect them to an evaluation board. The picture shows how:
How can I connect my 3 pin thermistor? (GND, POWER, ANALOG V) It looks like they are using a 2 pin thermistor.
AI: The part numbers you mention are not thermistors at all, but ICs which have an analog output which changes proportionally with temperature changes.
Generally speaking you would supply them with power and connect the output to an ADC input (perhaps with signal conditioning of some kind), but refer to the datasheets for the sensors (which I have linked above) and whatever is connected to your board's analog input in the schematic.
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H: Communication Line Protection
I intend to protect a BUS switches ICs, whose voltage on its pins cannot exceed 5.5V and 3.3V. The current cannot exceed 16mA.
The circuits needs to opperate from 3.3V to 5V. But automotive enviroment will need protection for continuous 14,8V at the input. So, I'm using a voltage-clamp to prevent against overvoltage, a resistor to prevent against overcurrent and a TVS diode to prevent against ESD.
The problem is to choose TVS diode. A TVS with voltage breakdown below 14,8V would burn at continous voltage. So, the voltage breakdown needs to be greather than 14,8V. For a TVS with this value of voltage breakdown, I didn't find one with clamping voltage smaller than 21,5V and I'm afraid that a resistor of of 360/0.5W will not be enough.
For 5V signal-line:
(21.5-5)^2 /360 =0.756 W
For 3.3V signal-line:
(21.5-3.3)^2 /360 =0.920 W
The question is:
I suppose the ESD events are very short in time, will it be enought to fry the resistor of 360/0.5W ?
The problems to choose greather values for resistance are the interference on communication line and the size of resistors that will ocupy more space on the PCB.
AI: I suppose the ESD events are very short in time, will it be enough to
fry the resistor of 360/0.5W ?
IEC 61000-4-2 ESD events will peak around 10 amps after about 1 ns and trail off becoming less than an amp after 100 ns: -
Image from here. I recommend you double check this by reading various on-line articles such as this. However, it's very unlikely that the resistor will suffer any damage given that the peak voltage it sees will be around 21.5 volts for far less than a microsecond.
I doubt that the zener diode will suffer any problem either. It's worth applying high-frequency decoupling capacitors on the Vcc rail to ground close to where the diodes are.
Have you considered that the 360 Ω resistor could probably be a few kohm?
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H: Magnetic flux density in a point
This is a single phase copper line in the next configuration
So its asked to find the magnetic flux density internal and external due \$I_{A}\$ and \$I_{B}\$ affecting the A cable and measured in the point \$P\$.
\$I_{A}=500\,A\$ and \$I_{B}=-I_{A}\$, the outside diameter in inches is \$0.710\$.
Solving it this way
\$r=\frac{0.710\,in}{2}=0.009017\,m\$
\$d_{AP}=150+2=152\,m\$
\$I_{A}\$ Effect
\$\phi_{extA}=\frac{\mu_{0}I_{A}}{2\pi}ln\frac{d_{AP}}{r}=\frac{4\pi\times10^{-7}(500)}{2\pi}ln\frac{152}{0.009017}=97.32524115\times10^{-6}\,Wb\$
\$\phi_{intA=}\frac{\mu_{0}I_{A}}{8\pi}=\frac{4\pi\times10^{-7}(500)}{8\pi}=25\times10^{-6}\,Wb\$
\$I_{B}\$ effect
\$\phi_{BA_{p}}=\frac{\mu_{0}I_{B}}{2\pi}ln\frac{d_{AP}}{r}=\frac{4\pi\times10^{-7}(-500)}{2\pi}ln\frac{150}{2}=-4.31749\times10^{-4}\,Wb\$
But whats puzzle me its the value of the flux measured in the point \$P\$, since I couldnt calculated it was provided as
\$\phi_{AP}=5.663\times10^{-4}\,Wb\$
but whats the right distance to write in the numerator?
I understand from the \$A\$ cable to the \$P\$ point there is 152 meters the same radius, so it would render the equation to zero flux, but I dont think its right since the lines of the field extend to the infinity so there must be some flux in the point \$P\$ due the current in \$A\$.
So finally, whats the righ distance to take?
\$\phi_{AP}=\frac{4\pi\times10^{-7}(-500)}{2\pi}ln\frac{?}{152}=5.663\times10^{-4}\,Wb\$
AI: It looks to me like you are calculating flux density: -
Picture from here.
So, use superposition.
Note also that the external diameters of A and B are irrelevant to solve this.
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H: Cables with different cross section having the same max allowed current?
I was looking to buy a power cable recently and my eye caught this weird fact.
Look at these two cables:
https://www.savio.net.pl/en/product/savio-1-8-m-schuko-m-power-cable-iec-c13-cl-138/
https://www.savio.net.pl/en/product/savio-cl-89-1-2-m-schuko-male-power-cable-iec-c13/
They both claim to have max values of:
Cable parameters: 250 V max, 10 A max
Yet, one of them claims to have a cross section of 0.75 mm2, while the other one 0.5 mm2.
How is this possible? Shouldn't there be a difference in the max current as well?
I guess the metal for the cable should be the same (copper), right?
Note: In case you happen to see at the product card (the PDF link), according to the manufacturer, the information for the cl-89 is wrong and the one in the web page is correct (there were conflicting values reported and I had to ask them - hopefully they are not mistaken as well).
Update:
Shortly after my communication with the manufacturer about the conflicting information about the CL-89 model on their site, they have updated the cable rating as well. It now says 2A max! So, I guess the problem was the completely wrong labeling on that model after all... Let's hope no-one's home caught fire from this...
AI: The IEC plugs are rated 10A maximum, so the wire may have nothing to do with it, if they simply looked at the plug and printed that onto the marketing material. The Schuko plug is allowed to be used for 16A and 10A loads in general, but the actual plug on that cable may not be 16A rated.
However, 10A through 0.5mm² wire, I don't know if that is according to European electrical codes, it does sound awfully lot for that wire thickness.
One chart found googling had rated 3A for 0.5mm² mains cable, and 16A for 1.5mm² mains cabling - the latter matches 16A rated extension cords.
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H: Why is the 14-stage SN74HC4020/CD74HC4020 binary counter missing 2 output pins, leaving 2 bits inaccessible?
I purchased a few SN74HC4020 ICs, which is a 14-stage ripple-carry binary counter. The SN74HC4020 datasheet shows output pins for bit 1 (pin QA) and bits 4-14 (pins QD-QN). So in other words the output for bits 2 and 3 are not exposed. Why are these 2 bits not exposed on this IC and is there a work-around if I'm trying to divide by 2^2 sometimes, or 2^3 sometimes, along with 2^14?
I'm guessing there's some binary arithmetic involved using some logic gates that I'm not smart enough to know at first glance. Or perhaps the other answer
is that I have to chain another 4-stage counter IC with this one in order to divide by 2^2 or 2^3.
AI: It's a marketing decision, cast into stone when the CD4020A was designed ca. 1970.
There was a large cost and size jump to go to more than 16 pins at the time (18 and 20 pin 300mil DIPs didn't come along until later). and 24-pin DIPs such as used for the CD4067 were huge (600 mil wide). These were the packages available in 1973 (the CD4020A was already available then):
(From 1973 RCA Solid State COS/MOS Databook)
As you can see, military and aerospace applications were heavily represented and low-cost commercial 'plastic' packages were limited to 14 and 16 pins.
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H: Where should I put an EMI filter on a barebones power supply for audio filtering?
I've an audio amplifier that was built from spares from an old kit from 19-something. The power supply for this amplifier is the simplest it could possibly be, consisting of a transformer, bridge rectifier and bulk capacitor.
Even when receiving no signal i can hear a humming coming from the speakers. i have a spare EMI filter circuit that came from some consumer appliance, and my hope is that it will solve the issue, but that's beyond the scope of this question. My question is where on the power supply circuit should I put the EMI filter - on the primary, secondary or the rectified output?
simulate this circuit – Schematic created using CircuitLab
AI: That filter looks like it's a line filter that goes before the transformer to block conducted emissions from the device back on to mains. If it has a rating of +220V then that is it's intended use. It may block some emissions from mains from getting into your device, but the best to block noise is appropriate filters after the rectifier and also on the voltage regulator of your design.
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H: I found this circuit in a class d amp, and have no clue of its function
It doesn't make any sense for me, why would someone use those very hi fidelity op amps with nothing connected on input and output
AI: These symbols represent the power supply pins for op amps that are used elsewhere in the circuit. Note the reference designators: U3C, U4C, U8C, and U14C; this means that they are the third sub-unit of each of U3, U4, U8, and U14. Furthermore, note that these sub-units don't have input or output pins. By putting these supply sections separately from the amplifiers themselves, it's possible to make the schematic neater by separating power and signal portions in the drawing (and showing power supply considerations like decoupling in context, as Transistor pointed out in a comment).
Since the NUM4580E and LM562 are dual op amps, for each of these symbols, you'll find schematic symbols showing how the two actual amplifier circuits (U3A, U3B, U4A, U4B, ...) of each dual op amp chip are connected to the signal. They will be elsewhere on the page, most likely in the signal chain, and won't include the power pins but will include the inputs and output. This separation also allows the two amplifiers on each chip to be located in separate locations on the page, if they logically don't make sense drawn right next to each other.
You may also find that in some cases, an op amp is connected "uselessly", e.g. with its inputs tied together or tied to ground. This happens if there are any unused op amps (e.g. seven op amps are needed and there are 8 available), to ensure that they're in a known good state and not floating/oscillating. Texas Instruments has a document about it.
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H: Diode OR with more than two sources
Is this type of system a good idea? I tried multiplexing two coin cells, one USB and one booster using four Schottky diodes (CUS10S30.) Schematic is given below.
The RTC does not work properly in this scenario (interrupts are not occurring, clock battery supplies power to the MCU.)
It works fine if I use two separate batteries like below:
Is the design flawed? I want to run the RTC if any one of the batteries is present.
AI: First of all, be careful of sneak currents… when you power one chip and the other ones are not there is a chance to inadvertently supply other parts with some leakage or maybe some milliamps of current. The RTC ports are all open drain so it shouldn't be a problem (fig. 22 in the datasheet shows the internal paths, mostly clamps to ground and vdd). It sometimes happens that a whole subsection is parasitically powered by a single GPIO!
If you are seeing the clock battery on the MCU side there is probably some sneak path you haven't found yet. At least INT, SDA and SCL should not let power thru: they have no clamp to VDD and at least INT is explicitly marked as open drain. SDA and SCL should be open drain but in some peripherals (I doubt in a PCF part) there could be edge accelerators that could pass something through.
The simplest way would be to pull out the MCU and see on which pin of the RTC you see the unwanted supply. Otherwise look with a millivolt-capable DMM and try to follow the supply upstream to the relevant pin (it could take a lot of time).
Asking NXP for ideas is an option too!
By the way there are RTCs with a dedicated backup battery port (like the horribly expensive yet precise Maxim parts), you could consider them.
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H: Are the parameters of pulsed laser diodes adjustable? Does making such adjustments negatively impact the laser diode in any way?
I am currently reviewing pulsed laser diodes from suppliers. The specifications are somewhat unique, so there doesn't seem to be many suppliers that offer what I'm looking for. I require an IR wavelength pulsed laser diode with a frequency of 3 kHz and a pulse width of 10 ns. I found a Chinese supplier on Alibaba that was selling IR pulsed laser diodes with a frequency of 1 kHz and a pulse width of 150 ns. The supplier told me that the frequency and working pulse width are adjustable, and that I can adjust the frequency to 3 kHz and the working pulse width to 10 ns myself. Is such a thing possible (I'm assuming by the design of our laser driver)? Does making such adjustments negatively impact the laser diode in any way (for instance, by lowering the lifetime)? If making such adjustments does negatively impact the diode lifetime, then can such a thing be mitigated (perhaps, for instance, by ensuring proper cooling)?
P.S. I'm not looking to buy anything now, but rather see what's commercially available to guide my design.
AI: Is such a thing possible (I'm assuming by the design of our laser driver)?
Yes. As 10 ns is not really that fast for a laser diode, this doesn't sound surprising – any 5€ SFP fiber optic transceiver can do that!
3 kHz is like, seriously, slow. Any microcontroller can trigger something at 3 kHz.
Does making such adjustments negatively impact the laser diode in any way (for instance, by lowering the lifetime)?
I don't see how adjusting the pulse repetition rate (please don't call it frequency, that's very ambiguous) has downsides, as long as you keep it low enough for the diode to not overheat due to being on most of the time. And that's very far from the case here.
Regarding pulse duration: Well, as said, 10 ns isn't really fast for a modern laser. Still, you'll need a fast driver. When you know your pulse length, you can optimize the drive for least overshoot, low laser chirp etc. But you don't seem to know what you really need in that, so I guess that means you don't care about such parameters.
In that case, no real downside.
P.S. I'm not looking to buy anything now, but rather see what's commercially available to guide my design.
Write some specs! I'm serious, your last two questions suggest that you're not really deep into what a pulsed laser is; which is OK, one doesn't have to be an expert in everything. But now you're asking questions that make more or less sense because nobody but you can tell what properties of the device "pulsed laser" are important to the application "The Pointer's project". You need to nail down the properties you need, or you can't move ahead in your design.
So, I'd recommend asking another question where you describe exactly what you need that laser for – and what the critical aspects of its usage are. You could then ask for which properties in a pulsed laser you should be looking for. Then, you'd have something to go and ask suppliers about, rather than just taking two not-very-challenging numbers and asking them to make an offer.
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H: Voltage source on both sides of a transformer
What will happen if we apply voltage sources (AC) on both the primary and secondary side of a transformer?
How will the coil and the flux produced inside it behave?
AI: If you model it as linear component, and your voltage sources as ideal:
It's a linear component. Use the superposition principle to figure out what happens if you set either of these voltage sources to 0V and then add the results.
If you don't model the transformer as linear component: You'll have to consider the nonlinear effects; it's likely these are complex enough that nothing short of a finite-timestep simulation will answer your question.
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