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H: Microcontroller 24V digital output
For a microcontroller generating a 20mA industrial digital output. What kind of setup is best?
I'm considering:
Microcontroller pin driving a low current N-FET to pull a 24V signal to ground. But this is probably not good as EMF on the line could damage the microcontroller.
Using a high/low side N-FET driver to drive an output. Does this offer any added protection compared to the above method? It's still galvanically connected, but is it any better?
If the output speed can be slow: microcontroller driving an N-FET, which drives an optoisolator (since I dont want to pull a lot of current from the micro).
What are your guys go to setups?
#3 seems best if the slow switching of an optoisolator is fine. But if you want a more responsive 24V signal, is #2 good enough protection wise?
AI: Using a high/low side N-FET driver to drive an output.
Highside N-FET is what I use.
Does this offer any added protection compared to the above method?
You can pick a "smart" high side driver which comes with a lot of extra built-in protection. Infineon has great parts for this, examples. The down side is that you have to "marry" Infineon and they are a very fickle and unreliable partner.
For analog outputs use a diff amp to convert a PWM from the MCU.
It's still galvanically connected, but is it any better?
No, but in the average industrial settings that's not needed either. If you power the MOSFET from external 24V you can optionally put a digital isolator between the MCU and the MOSFET. I'd avoid optocouplers since they aren't very reliable over time.
In terms of ruggedness it's probably a better investment to place TVS where appropriate: on the 24V supply and on the output.
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H: I have read that putting 2 transformers in parallel or in series will increase the output power, how does this work?
I have questions about transformers placed in series and parallel and how they are able to amplify voltage for series and current for parallel without decreasing current/voltage as the case for a step up or step down transformers. From my understanding, the power has to be constant when switching between voltage and current. I know if batteries are placed in series, the voltage adds up, and if the batteries are in parallel, the Ah capacity adds up. Is there an analogy between series and parallel transformers that is related to this?
Say if I have a 12VAC going at 2A from an inverter or an AC source and that goes to two transformers in series. I set the diagram as shown below. If I used a multimeter to measure the potential difference between the two open circles at the right side of the picture, apparently I would get 24VAC at 2A. I also know the Tesla coil uses voltage amplification using this method. I am working with low voltages (120VAC Max)so I would assume that the coils wouldn’t overheat or short circuit. Wouldn't the conservation of energy be violated if that was the case? Do the two transformers have to be exactly identical and how would voltage be amplified without decreasing current from the picture?
I read this answer from but am still confused:
https://electronics.stackexchange.com/a/77479
AI: Two identical transformers may be interconnected to operate at rated voltage or double the rated voltage and deliver double the rated power at either double the rated voltage or double the rated current.
The primary windings of two identical transformers may be connected in series, should the supply voltage be double the rated voltage.
The secondary windings may be connected in series to deliver the rated current at double the rated voltage. They may be connected in parallel to deliver double the rated current at the rated voltage.
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H: 2.7-4.2 V Li-Ion battery to 5 V 5 A converter
I have a 2.7-4.2 V Li-Ion battery. I want to convert this battery to boost 5 V-5 A power supply for a short time usage.
I know there are lots of ICs to convert these values but I need advice for which one. I don't have an external bias voltage to feed the IC. Should I use an IC output voltage as a bias voltage? Or should I feed bias voltage somehow and use the output voltage as bias voltage?
For example LTC7804 input range is 4.5-40 V. To operate at 2.7 V LTC7804 needs 4.5 V bias voltage. (It operates down to 1 V after start-up.)
AI: I know there are lots of ICs to convert these values but I need advice
for which one.
Specific product recommendation requests are off-topic but, here are a few words that might help you target a solution: -
You need to find a boost converter circuit (a type of switching regulator) that works with an input voltage down to 2.7 volts and can still regulate 5 volts on the output at 5 amps of load current. Of course your battery needs to be able to supply 10 amps (at about 2.7 volts) to achieve this load current.
The normal suppliers/vendors/distributors in your country should have dozens of different options and, they usually have pretty good search engines too.
I don't have an external bias voltage to feed the IC.
You don't need one; it should run directly from the battery (providing your battery can supply the current without burning). The LTC7804 is probably not what you should be looking at and, now that you have found the ADI webpage, you should be able to use their search engines. Here's a part that's getting close to what you might use: -
$$$$
I found the part above using this ADI search engine. Good hunting and, remember there are other vendors.
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H: Darlington pair first transistor collector current
I want to increase the first transistor collector current but I can't.
I increase the first transistor base current. Transistor doesn't respond as I expected. Collector current doesn't increase.
When I decrease the base current, the beta value increases.
Why does the transistor response this way? Can you explain?
AI: I want to increase the collector current of the first transistor up to 50mA, why can't I?
Because the emitter current of Q2 the sum of its base and collector currents. The Q2 emitter current flows into Q1 base, which turns it on.
Q1, if turned on hard, into saturation, could have a VCE of a few hundred milivolts. That is, it could reverse bias Q2. Therefore Q1 doesn't saturate. It turns on just enough to reduce the current through Q2 to what it needs to stay turned on.
If you increased the base current in Q2 once Q1 was conducting, then paradoxically I'd expect the collector current to reduce. The increased base current would flow out of the emitter, turning Q1 on harder, which would reduce VCE and therefore collector current.
If somehow magically Q2 collector current went up to 50 mA, Q1 would turn on fully. With a VCE of (say) 400 mV and a VBE of at least 700 mV, Q2 would be reverse biassed, and collector and emitter currents would reverse.
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H: Which battery will be good for gas/water metering - lithium thionyl chloride or lithium manganese dioxide?
We are working on gas/water meters.
We are currently using lithium thionyl chloride batteries for our device. After reading some technical documents we found that the lithium manganese dioxide batteries perform much better than lithium thionyl chloride batteries. They are also cost effective as well as good life cycle. They mentioned that with LiMNO2 batteries, the device can operate for at least 10yrs.
Our device operates at:
Vin=2.5V
I out(minimum)=200uA
I out(maximum)=100mA
AI: I was involved in the design of a gas-meter and, it used a 10 year lifetime battery using Lithium Thionyl Chloride technology. It was a D type size battery. Can't give specific details as IP is involved.
they mentioned that By using LiMNO2 the device can operate for at
least 10yrs.
Lithium Thionyl Chloride can achieve 10 years and, at quite low temperatures too so, I think you need to do some more research here.
after reading Technical Documents we come to know that the lithium
manganese dioxide performs much better than lithium thionyl chloride
Batteries
Maybe, but the devil's in the detail and some technical documents masquerade as being technical when really they are written by marketing departments.
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H: What's ground coupling used for?
I have a digital storage oscilloscope. The probes have three options for coupling:
DC
AC
Ground
My understanding of 1 & 2 is:
DC: I connect the ground clamp of the probe to ground, the 'live' probe to the thing I'm interested in and the scope will show me an absolute potential difference between the two.
AC: I connect the ground clamp of the probe to ground, the 'live' probe to the thing I'm interested in and the scope will attempt to remove the DC-ness so I just see the PD wave as if it were averaging neutral.
The ground coupling confuses me though.
What's it for?
When would I use it?
AI: Ground coupling connects the input of the oscilloscope to ground (and disconnects the external probe). You can use it to make a trace "flatline" without having to physically disconnect the probe from the signal you're measuring. This can be useful to check or adjust the vertical offset of a trace (or any other purpose where you'd want a trace to be zero temporarily). With analog scopes, you first had to ground-couple an input before you could adjust the trace's vertical position so that it matched the grid on the screen. While this is not strictly necessary on digital scopes, they simply kept that function.
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H: Connecting MISO and MOSI signals between master and slave
My goal is to flash the external SPI of ICE40 FPGA through Dediprog before powering on the FPGA and let the FPGA read the image file in the SPI after powering on the FPGA.
after trying doing this on the iCE40 16-WLCSP Evaluation Kit, the FPGA was able to read the image when J25 was connected on the horizontal jumpers (see schematic in the pdf):
I wanted to make sure that I understand this connection.
the way I understand it, connecting 3 to 1, and 4 to 2 means that the ICE FPGA is the master and the Flash is the Slave.
and connecting 1 to 2 and 3 to 4 is the opposite.
although in other designs, I saw that the right connection was MOSI on the "DI" input in the flash, and MISO to the "DO" output in the flash. here it appears that they flipped MISO and MOSI, why is that?
AI: The signals are connected like this when the jumper is in the horizontal position:
IOB_44_SDO (FPGA) -> ice_SO -> sensor3_flsh_mosi -> SDI (flash)
IOB_45_SDI (FPGA) -> ice_SI -> sensor3_flsh_miso -> SDO (flash)
So in the end, it's all connected just as you expected. The "MOSI" (master out, slave in) signal is connected to "SDO" on the FPGA, meaning that the FPGA is the master. It is also connected to "SDI" on the flash, meaning that the flash is a slave device.
When you flip the jumpers into the vertical position, SDO of the flash is connected to SDO of the FPGA. The same happens with SDI. This means that when the jumpers are vertical, both the FPGA and the flash are slave devices. (The FT2232HL is the master in that case.)
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H: What is a real-life situation where injected currents can impact a home appliance?
I am refreshing my study on EMC testing guidelines and I am reading a reference guide that mentions,
the typical use of BCI (bulk current injection) is to inject a common-mode current into a cable or cable bundle to simulate an illuminating RF field.
What do they mean by an illuminated RF field and what might be a real-life situation that can create this "illuminated RF field"?
AI: What do they mean by an illuminated RF field
You've misquoted your quote; the word is illuminating.
In this context, the word illuminating is a bit poetic and means the same as this: -
A prevailing RF field or an incident RF field.
In other words an RF field applied directly or close to your cable.
what might be a real-life situation that can create this "illuminated
RF field"?
Again, the word is illuminating - we like accuracy of terminology in EE.
A real-life situation can be injecting a cable with an RF pulse from what is know as an "injector": -
Picture from here. This one happens to be a capacitive injector but, inductive injectors can also be used (depending on the tests you are trying to perform).
Here's another common type: -
You lay the cable in the slot, close the lid and use the external terminals for the RF interfering pulse or waveform. Image from the EMC shop
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H: How to change track width in Altium for already placed tracks
I have a PCB with 8 layers and hundreds of tracks on different layers that already placed and length matched. I have to change again the track width to achieve the 50 Ohm impedance again because we have changed the stack up.
I can’t select all lines at once and change the track as normally done because some parts of generated impedance matching tracks are also selected and don’t let me using the PCB filter to change all tracks at once!
This will take a lot of hours now if I have to delete each impedance matching on each track and then change the width then match the impedance again.
Is there any way to solve this?
AI: There are a couple of ways to get the selection you want:
Properties Filter
Use tab to select all of the components of the net, as you mentioned in your comment
Your properties box will appear as below. Click the filter icon in the top-right corner:
Unselect everything except for "Tracks". You will then be able to change those track properties as normal:
Find Similar Objects
Select one section of the track you want to change. Right-click on it and then choose "Find Similar Objects":
Set Layer, Net, Width, etc as appropriate to select all objects that match the portion of the track you selected
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H: Boost converter output does not match sim
I'm experimenting with a simple boost converter. However, the measured output value on the breadboard is nowhere near what I expect :
Simulation in LTspice gives about 4.5V while I'm measuring about 2.8V, even less than the input. Am I doing something wrong?
(Eventually, I would like to build a booster from 5V to 27V providing 30mA. Is it even possible with this kind of design?)
AI: diode is 1N4001
Oops, that's a poor choice (even at 10 kHz switching speed).
You need something that has low reverse recovery time and the 1N400x diode is appalling beyond compare. Try a fast diode like a 1N5819 rectifier - OK it's a bit big than a 1N400x but, if your switching frequency is anything like above 25 kHz then it's probably wise to use something that has low forward volt drop and is fast. There are plenty to choose from and you needn't go for Schottky types either if you want 27 volts out.
Anyway, with a 10 kHz switching frequency you should be aiming for something roughly like this: -
Input voltage is 3 volts
Output is 27 volts
Load is 1000 Ω
Inductance is 47 μH
This is operating in DCM due to the high load resistance. If the load dipped down to (say) 50 Ω then it might look like this: -
Now it's running in CCM so, take heed about the duty cycles involved to regulate the output voltage. In CCM a duty of 88.9% is needed until it drops into DCM (higher load resistance of about 86 Ω).
Anyway feel free to plug in some values on my crappy website and try and figure out what suits you best. No charge of course.
Please note that I'm not trying to encourage anyone to visit my website. I built it purely to learn about JavaScript programming, HTML and messing around - please do not feel any obligation to use it at all - I don't need the traffic and I'm not trying to get paid for adverts on it either. It is what it is; a site full of random stuff that is slowly evolving and fairly specific to some of my personal interests.
Am I doing something wrong?
I'd use a MOSFET instead of a BJT and, I'd make sure that the inductor series resistance is not too high and that saturation currents are significantly higher than those predicted on the simulation above.
Eventually, I would like to build a booster from 5V to 27V providing
30mA
Well it's going to be operating in DCM (not that big of a deal) with those parameters: -
But, it can certainly run a 100 Ω load in CCM: -
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H: Simulating IEPE powered sensor and current source
I am trying to create a simulation of an IEPE sensor circuit and get it to match measured behavior of something like a PCB 378B02 microphone connected to such a supply.
IEPE sensor-side amplifier implementations appear to be a trade secret however I'm hoping there's a general model I can use to evaluate my supply circuit performance over different cable lengths/types.
I found this:
which was taken from here.
I've attempted to implement it below, guessing at the piezo R and C values (not sure their values are highly critical) and using an ideal cable for now:
I also added a resistor to the drain of the MOSFET as it seemed to help. The simulation is here.
In the lab with a 2mA constant current, I've found the sensor input conductor on the power supply typically ends up biased to around 10-12V but with this simulation it is at 23V and the current is not held steady. The MOSFET is only in saturation for half of the input sine wave cycle whereas I understand for a Source Follower arrangement it's normally always kept in saturation.
How can I modify this to better represent typical IEPE sensor/supply behavior?
AI: There's no way your sim will work: the n-FET body diode will kill it (no cheating: you can't disable it in the sim and call it good.)
A p-FET in that spot actually works as a follower. Since their diagram didn't specify, but you're calling it a 'follower' and source is tied to a positive voltage, that'd be reasonable. Once the circuit stabilizes around the threshold point (it takes a while - let the sim run) then you get the voltage swing on the cable. Try it here
One note: the output coupling has a tiny voltage as it is working as a high-pass filter with a relatively low frequency (250 Hz). The output swing would be much larger with a faster dV/dt impulse, larger cap or larger load resistor.
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H: Op-Amp Based Multiplier LTSpice Simulation
I'm supposed to make a multiplier with log amplifier configuration using LM741 op-amps and 1N4001 diodes. I found this circuit configuration in this Youtube video. However, the output voltages I get are much different than what I am supposed to get, as seen at the figure. What am I doing wrong?
EDIT: Pink and cyan signals are the voltages on R3 and R4 resistors.
AI: This is not really a very practical implementation of a multiplier. It's single quadrant, also the theoretical output voltage has a multiplier factor of 1/(Is*R), which is a large and poorly controlled number.
The below shows you what the circuit is doing- the output voltage is only affected by the diodes and the resistor value.
simulate this circuit – Schematic created using CircuitLab
Theoretical output voltage for 2mV and 2mV is
Vo = -\$\frac{0.002 \cdot 0.002}{I_S\cdot R} = -1.558V\$ for Is = 7.7E-11A (the CircuitLab model for 1N4001). Shows good agreement.
If either of the input voltages are negative, the op-amps will rail, and for a 741 operating from +/-15V supplies (and the Is used in the Circuitlab model) the maximum input voltages are only a few mV before the output saturates. If you try to deal with this by reducing the output feedback resistor, the op-amp will run out of current drive quickly.
Since Is is not well controlled and is temperature-sensitive, the results will not be very good, especially outside of simulation land.
Suggest you look a little more deeply into practical log/antilog circuits. Also note that theoretical circuits showing a transistor will tend to oscillate under some conditions without added capacitors.
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H: Reverse engineering garage door opener signal
I have a new liftmaster (chamberlain) garage door opener that has a wired keypad. The keypad has several buttons on it, but for my purposes I'm only interested in the door open/close and light on/off buttons. I would like to reverse engineer this signal in order to control the door opener and light with an ESP8266.
The keypad is wired with only two wires - meanining the power and signal are sent over the same wire.
Using a scope and an arduino, I have captured the signal which is sent when the door trigger button is pressed. (I used an arduino so I could capture a longer signal than I can with my scope. I used the scope to verify that the arduino is capturing the signal correctly).
My method for capturing the signal is to record the micros() each time the signal goes from LOW to HIGH or vice versa.
I have observed is the following:
The minimum pit or peak seems to be ~100 microseconds
There are three distinct messages that occur when the button is pressed. Notice the voltage is lower on the middle message. I suspect that this might be some sort of confirmation from the opener, and the first and third messages are from the button.
The message seems to have the same header, but the content changes slightly. Here are two back to back overlaid
last but not least, you can have more than one button wired in parallel to control the opener
So my question is - what kind of signal might this be?
EDIT:
Building off of the observations of @jasen @icodeplenty, I wrote a parser which converts the measured signal into hex. I made a few assumptions:
the messages are 11 bits long
the first bit is always low (just a start bit?) and so I ignore it
the next eight bits are data?
the last two bits are stop
I then captured 8 passes for three different events and converted that signal to hex (see below).
I cannot discern any pattern here, other than that every event message starts with AA 80 00.
Handshake (a message is sent by the button when it is powered on):
AA 80 00 50 3C 6A D4 B4 6D FB BE 25 E8 5C 79 7B B1 DE 95
AA 80 00 65 98 15 6A 58 B2 6C C9 10 28 CC 19 20 05 F2 94
AA 80 00 A5 E4 EE DC 37 69 DA 34 95 14 A3 87 84 4E 61 E8
AA 80 00 21 DC BA 71 FE FD FF FE 19 30 8E 9E 36 6A A1 EC
AA 80 00 41 F0 63 C7 D3 26 49 9A 91 10 C5 0A 52 23 31 E4
AA 80 00 98 A0 06 0D 06 00 12 20 94 84 A3 87 04 4A 61 E8
AA 80 00 18 A0 4E 9F 22 49 80 24 58 9C 2A D6 9F F9 89 62
AA 80 00 46 F0 AA 47 93 6C 49 96 11 74 0E 98 37 6A A3 80
Door Button Triggers:
AA 80 00 06 B8 3D B6 68 93 B6 ED 92 10 D5 0A 53 15 28 40
AA 80 00 80 EC 8F 35 4A 92 24 A9 1A AC 0A 94 2D 6A DA 2C
AA 80 00 00 C0 D6 A7 6E DB B6 CD 92 50 55 0A 52 15 20 50
AA 80 00 6A 30 E5 85 5B 96 65 A9 15 30 CE 14 20 4E D3 20
AA 80 00 AA CC 3A 33 A6 4D D3 54 99 10 86 0C 32 07 12 30
AA 80 00 24 98 70 E7 7E FF FE 9D 11 34 1C 98 36 4E B2 34
AA 80 00 44 E4 8F 51 13 24 48 E2 96 10 87 0C 32 4E 10 30
AA 80 00 91 F0 F5 E0 08 02 20 E0 18 28 4F 9F 2D 4F 80 2C
Light Button Triggers:
AA 80 00 04 AC 58 AA 7C DB B7 6D 10 60 CE 39 60 4C B0 A0
AA 80 00 A6 D4 A3 9F B7 25 5B 96 6A C0 F5 63 52 95 61 E1
AA 80 00 99 40 C6 54 21 01 12 20 A9 84 EB D5 A4 6A 51 C6
AA 80 00 42 F0 61 8F 9B 34 49 9A 64 CC 31 E3 DF B5 6E 8D
AA 80 00 65 98 35 31 DA B2 6C C9 08 64 DC BB 44 DD B0 E5
AA 80 00 0A CC 98 14 ED FB BE 6D 86 5C 1C 28 7B DC 2C 39
AA 80 00 02 4C 0E 54 2D CB B6 6D 06 7C 5C 38 7F 95 BE 3D
AA 80 00 A9 D4 E3 1D B3 6C 59 96 00 60 CE 39 68 DE B4 E9
AA 80 00 80 C0 87 19 4B 92 24 09 81 18 57 2E 1B 95 2C 39
EDIT 2
I found a python implementation of Security+ 2.0, which is the wireless rolling code protocol implemented for the remote buttons. I'm not a python expert, so reading the code is a bit of a challenge. I'm hoping that the same protocol is used with the wired buttons and this library might offer some clues on how to read and transmit the necessary signal.
There is also a patent for Security+ 2.0 which explains a bit about how it works.
Edit 3
I found a program called sigrok PulseView which has a uart decoder plugin. I tested a bunch of recorded samples and found some consistencies which leads me to believe that
It is in fact uart 9600 baud as @Jasen originally suggested
I do not know if its LSB or MSB. I left the default LSB decoding in from PulseView
The data is obfuscated or encrypted and this is a dead end for now
FINAL EDIT for future readers:
I have succeeded in solving this puzzle. I have released an esp8266 shield and a open source solution for controlling Security+ 2.0 doors.
AI: Apart from the first pulse which is over-length, it looks like asynchronous serial with 8 data bits and two stop bits.
The evidence for this this is the regularly spaced two high followed by 1 low. (so 11 bits per symbol)
The baud rate is a little over 9600 baud (I get 9620 but the precise value depends on how good the clock on your Arduino is, in any case it's close enough to 9600 to call it 9600).
Connect it to a UART and you'll see a "break" symbol followed by a brief pause and several data symbols.
I don't know what the actual data bits mean
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H: What part do I need to get this small 12V DC pump running?
I am searching for the other half of a 120VAC-to-12VDC power supply, to power a cat water fountain. This is surprisingly hard, I think because I'm not using the correct language. The manufacturer's website shows the pump but does not sell it (item TP-200): http://skyish-zs.com/english/enproduct-1.htm#ENTP200
What exactly am I looking for in electronics terms? Here are pictures of the pump specifications, which has a cable attached to a male 12V jack that is apx 5mm external diameter and just over 2mm internal diameter. I am trying to find the part that is a female jack leading to a 120V AC adapter.
AI: You won't easily find an AC-AC adapter with a built-in female barrel jack like this one. Image from manufacturer's website:
You could find a suitably rated 120VAC:12VAC adapter and buy a female jack, and attach it, but I think when you're done replacing the pump + adapter will be more economical.
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H: How do Sequential circuits exactly work?
Currently I am trying to learn more about computer architecture. I seem to understand the concept of sequential circuits but there is one thing I cant understand and I cannot find any info on it
Lets say we have a Latch with NAND gates, my question is specifically on the part where the ouputs feed into inputs. There are 2 inputs required for there to be an output in a NAND gate. I cant seem to get my head around how both the NAND gates get their second input when that input comes from the output of the other gate, but to get this output we need 2 inputs. This is the loop being played around in my head.
Is the default value 0? Does one of the NAND gates get its output first?
Please let me know if I should rephrase this question
AI: If I understand your source of confusion, you are wondering about the apparent “chicken and egg” situation of a combinatorial circuit with feedback.
For example, with a NAND latch how can we determine Q if it depends on Q’, which in turn depends on Q? Is there a default value? Does one of the NAND gates get its output first?
In this particular case, it is true that the NAND gates have two inputs, but the nature of NAND gates is that if either input is low then the output is high. So if S’ goes low then Q will go high, regardless of anything happening on the other input – there is no race condition or infinite loop. Same thing if R’ goes low: Q’ will go high, period.
But there are two problems with this circuit that make your concerns justified.
First, is the initial condition: you can’t make any assumptions about the state of Q and Q’ on power up – they are unknown. And as long as S’ and R’ stay high they will remain unknown. Bringing either S’ or R’ low will stabilize the outputs to either 10 or 01, and it is expected the system design will do this. But if S’ and R’ boot up high, then not only are the outputs indeterminate, they could actually oscillate: if the delays through the gates were perfectly matched then if Q and Q’ happen to boot up 00 (and S’ and R’ are 11) then both Q and Q’ will go to 11 at the same time, which will then reach around and cause Q and Q’ to both go to 00, and repeat. The frequency of oscillation is determined by the gate delay. In real life the delays won’t be identical and the outputs will likely eventually settle at a stable 01 or 10 but you won’t know which.
The other problem is if both S’ and R’ are 00, which cause Q and Q’ to go to 11, and then both S’ and R’ change to 11 simultaneously: we are back to the same situation as above and will likely oscillate or at least go to an indeterminate state. A system designer should avoid doing this.
So the moral is, you do need to be careful using feedback in combinatorial circuits – they can oscillate or have race conditions – but as long as these corner cases are understood they can be avoided by proper system design.
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H: Capacitor in LC filter
Please excuse me for this noob question. I have been wrapping my head around this for some time. If it's irrelevant here please comment, I'll delete this question.
If a capacitor blocks DC and passes only AC, why is it used along with an inductor in an LC filter?
AI: You're asking about an LC lowpass filter (which is just one kind of LC filter), not the general case of an LC filter (which could be high pass, band pass, etc). My guess is you are looking at picture of some other kind of LC filter rather than a low pass. If you look at the low pass topology, it is pretty obvious what the capacitor is doing:
Since as you point out the capacitor blocks DC but passes AC, the AC part of the signal is shorted to ground while the DC part is passed to the output. You may also find this link useful, which compares the various types of low pass filters that can be implemented with passive components:
https://electronicbase.net/low-pass-filter-calculator/
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H: Value of Ferrite Bead
How do I deduce the value of the ferrite bead between pin 2 and 16 as shown in the schematic.
AI: The ferrites have 3 important parameters:
Impedance (Z) at specific frequency (f)
Max allowed current (Imax)
And the package (Sometimes, this may not be given in the schematics)
Knowing these, you can extract the info:
|Z| = 60 Ohms @ f = 100 MHz
Imax = 6000 mA
In a 1806 package
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H: Selecting a fuse for a device that powers on at 48V @ 0.1 amps
I am passing current through an Ethernet cable in order to power on a device.
Basically I am making use of the Blue and Brown cables:
The device that I am powering uses 48 V DC and only uses 0.1 amps. In other words it uses only about 5 watts of power.
Anyways, I would like to add protection to the device that I am powering. I was thinking about using a fuse. How can I select a fuse that will blow up if I pass 60 V @ .1 amps for example? I have measured the current consumption and it variates between 0.07 amps and 0.14 amps. How can I select the right fuse?
When searching on the internet most of the fuses are rated at higher currents.
When I search for fuses on https://lcsc.com/products/Fuses_11022.html I have so many options and none of them have the option of selecting 48 V dc and .2 amps.
I have already built a project that measures the voltage using an Atmega 328 chip (Arduino). Can I use that to measure the voltage and if it uses more than 50 V, for example, power off the circuit using a MOSFET? Do people do that to protect circuits?
AI: One confusing thing about fuses is that their datasheet parameters do not directly correspond to "normal" characteristics you use to describe the device to be protected, like current and voltage.
The most important parameter is I2t, which is an energy required to melt the fuse. As you can see, lower current at a long time can blow a fuse just the same as short pulse with higher current. So, you cannot select a fuse by saying "I want it to blow at 0.1A", because you requirement missing a time component.
The second thing to remember is that the shape of the pulse does matter. Two pulses with same duration and same maximum current can deliver completely different energy. The typical case to consider is inrush protection, where huge initial current exponentially decreases to almost nothing. For this reason different formulas are used to calculate the required I2t rating. See for example this excellent Fuseology Selection Guide from Littelfuse. On page 7 they show the formulas for different wave shapes.
So, the above tells you when the fuse will blow. Current rating, on the other hand, tells you what current you can pass through the fuse indefinitely. Note that there are "pulse withstanding" slow-blow fuses that can survive many short pulses with much higher currents.
Finally, breaking capacity and voltage rating specify conditions in which the fuse can operate (as in "blow out") safely, without creating an arc and potentially being a hazard. This is the only time the voltage comes into the picture, by the way. In your question you mention it many times, but the fact is, it is irrelevant. Any fuse rated higher than highest possible voltage in your circuit will do.
And to answer the edited part of your question - if you want to protect your device from over-voltage then fuses are not what you should be looking for. But that would be a completely different question, so cannot be answered here. I recommend you to do a research on over-voltage protection and if you still have questions ask them in separate question.
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H: Why are data selectors referred to as "multiplexers"
I think it would be intuitive if a multiplexer was a component that "multiplied" the number of signals coming out of it, i.e. splits one complex signal into many simpler ones. However, I know that a multiplexer actually refers to a component that serves the inverse role, combining many simpler signals into a more complex one.
Why? What is the logic that went into creating the term? Might the "multi-" refer to multiplying the output signal complexity and not to changing the number of input/output signals?
AI: Things don't acquire names logically, instead language just evolves. Often there is a background of ordinary things. When something extra-ordinary comes along, it gets a new name, to distinguish it.
Take telegraphs and telephones, some time after they had entered use and so were becoming ordinary, at least for short distance communication, for instance within a town, or to the town's local villages. Long distance town to town, or across continents, communication was hampered by the cost of the copper wires in the link, so very few parallel links were available.
As communication traffic and demand grew, various people (Edison, Baudot thanks to rm_89) tried to make the existing long distance links that they had serve more than one channel, by dividing their carrying capacity into many parts.
The word 'multiplex' was taken straight from classical Latin as a whole word, meaning 'divided into many parts', to describe what was happening to the expensive rare resource, the long distance line.
The same word multiplex was used for various parts of speech. As an adjective, this was a multiplex system. As a verb, the ordinary one-channel-per-wire local communications were multiplexed onto the shared long distance resource. As a noun, the long distance line carried a multiplex.
If the ordinary signals were multiplexed onto the long distance carrier, then the thing that did it was obviously going to get called a multiplexer, and logically the thing at the other end got called a demultiplexer.
A multiplexer takes multiple ordinary signals and creates a multiplex. That's the perspective that's going to allow you to have a consistent description of what happening, and why 'multi-' could arguably be an appropriate part of the word.
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H: What is the purpose of a carrier signal in communication technology?
What is the carrier signal for when we actually do not care about this but only about the other signal (the useful signal?)
Why isn't only the useful signal used instead of mixing it with the carrier?
AI: If you were to transmit just the audio signal, you would effectively have a single channel that everyone has to share. They'd be using the same tiny bit of the electromagnetic spectrum. You couldn't separate what one transmitter is sending from what another transmitter is sending. It would be like trying to have a conversation in a room with hundreds of other people trying hold their own conversations.
By modulating the voice signal onto a carrier, you make it possible to separate the individual transmissions.
If I use a carrier of 1MHz and you use a carrier of 2MHz, the receiver can be tuned to listen to you and ignore me.
The carrier is there to make that distinction possible.
It also has other advantages.
It is hard to make a high power amplifier that covers a large frequency range.
The audio range is often considered to be 20Hz to 20kHz. That is several octaves that your amplifier has to cover. It has to work properly over all those octaves.
If you use a much higher carrier frequency, your amplifier only has to work properly over a fraction of an octave. 20kHz is a tiny fraction of 1MHz, for example. A transmitter for a 1MHz carrier only has to cover 0.998MHz to 1.02MHz. An octave would be from 1MHz to 2MHz.
Another thing to consider is antenna size.
A signal at 20kHz has a wavelength of 150 kilometers. A quarter wave dipole antenna would need rods nearly 40 kilometers long.
At 1MHz, the antenna becomes more manageable - a quarter wave dipole antenna would need rods only 75 meters long.
The problems with bandwidth that I mentioned in regard to the transmitter amplifier also apply to the antenna. An antenna can only radiate effectively over a relatively small range of frequencies. As with the amplifier, that range is usually a small fraction of an octave.
An antenna made for audio frequencies would have to cover wavelengths from 15000 kilometers to 15 kilometers. An antenna made as a compromise between those extremes wouldn't radiate very effectively - and it would still have to be very large.
As a user, you are only interested in the signal modulated onto the carrier - you just want to hear the music from your local radio station.
As an engineer, you have to consider how best to get the signal from where it is to where you want it. For radio, that makes the carrier signal very important.
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H: 2N2222 NPN transistor base resistor calculation
I am quite new to electronics. I am trying to control three LEDs with an Arduino using a transistor.
I was wondering what the base current limiting resistor value should be.
I looked around the internet and some YouTube videos and came up with these calculations, but I don't know if I am correct or not.
I am using a 2N2222 NPN transistor and I am taking 100 as GAIN (B).I came up with 1.4K. Am I right or am I missing something?
LED Resistors are 220Ohm
AI: Actually, with \$\beta\$ = 100 you would end up with an \$I_B\$ of 0.3 mA (not 3 mA).
BUT as you want to switch the NPN fully on, it is actually a good choice to assume a much lower \$\beta\$, like \$\beta\$ = 10 like you did (by mistake).
Why?
Because you want the NPN to operate in saturation (not active mode). So you do end up with a correct answer. Any value for R between 1 kohm and 5 kohm would be correct in my view.
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H: Parallel resistor in pi filter
What is the purpose of resistor in this filter circuit? Is it really needed?
AI: It could be one (or many ) of three things
damping resistor associated with the 2nd order system that has been created. The Q factor of the LC could be quite high and it can cause quite large amplitude signals at the resonant frequency. This R will provide a damping term
bleed resistor for when the circuit is disconnected. this is either for safety or to ensure that some downstream threshold monitor (UVLO) is activated again if there is a momentary blackout
base load to some upstream PSU. Some PSU have a minimum load requirement and a simple resistor is sometimes effective enough in providing a minimum load
Without seeing the wider circuit and use-case information, it is hard to assess beyond this
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H: How do the non-circuit old Christmas lights flash?
I have a 80's Christmas incandescent light string without any kind of electronics. They are static until you replace one normal bulb with one marked bulb.
It seems to be that the marked bulb (that actually also works) has some kind of special filament that burns out but still works, with some different resistance. Then the lights begin to blink.
What is special in that bulb?
If there is a fixed resistance, why does the time between flashes seem to be random?
Why do the lights become fixed and with a mini thump start to blink again?
Is there any way to make them perpetually flash without thumping it?
Voltage: 220V
Lights bulbs: 100
AI: The red-tipped bulb is a "twinkle bulb" with a bimetallic strip inside which will disconnect the circuit when the bulb heats up. Then the bulb will cool down and the bimetallic strip will close the circuit again. Because all the bulbs are wired in series (fixed ones + twinkle), the whole string will blink off and on.
I suspect you need to fingerkick it just because it's old and due to sparking when making/breaking contact it does not work reliably any more. You need to replace the twinkle bulb but the voltage you need has to match the old one, it's dependent on the number of bulbs in the string (for a total voltage drop of 120 or 230 V depending on where you live).
These seem to also go by the name "Christmas flasher bulbs" but are getting hard to find with the LED revolution steamrolling incandescents.
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H: Strange DC point in vintage amplifier
I've been restoring a vintage Marantz Model 33 amplifier and, for the most part, it came out ok, but I've noticed some weirdness in the final output stage of the center channel.
While it does work, I've noticed it went into clipping on the positive side of the sine wave on higher volumes. I then looked at voltages and noticed there's a DC voltage across C212.
I continued measuring voltages and noticed the junction of R226 and R227 was at +14V. It seems very strange and I thought Q206 was busted - replaced the BC559 with a 2N4402, but that didn't fix it.
It seems like a simple circuit, at least from the DC perspective, but I can't seem to figure out what's wrong with it.
I've attached a section of the schematic, with annotations of the voltages I've measured in red.
AI: If I simulate your circuit with no chance of capacitor leakage but not quite the same transistors, I get similarly offset values to your measurements: -
I continued measuring voltages and noticed the junction of R226 and
R227 was at +14V. It seems very strange and I thought Q206 was busted
This tells me that you haven't really established a close enough connection to the route cause when thinking that the +14 volts was "very strange".
My answer doesn't help you find the root cause but, it does answer your question: your amplifier has an offset and, according to the circuit diagram you posted (and my simple simulation), it should have that same offset (within +/- a volt or so). However, that does seem at odds with what it should likely do so...
Dig deep and look for more information on the actual circuit. Web schematics are sometimes very flaky. It's all about getting good information right now.
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H: Second Order LTI Low Pass Filter solving for Voltage Out
I'm having a problem with understanding my textbook for solving the Voltage Out for the second order LTI Low pass RC Filter.
Why do you need to find the square root in the given equation with the red circle on it? Why are there also the \$| |\$ symbols in \$V_o/V_i\$?
My transfer function I have acquired is $$\frac{V_o(s)}{V_i(s)} = \frac{1}{s^2RR_1CC_1+s(RC+RC_1+R_1C_1)+1}$$
The circuit schematic looks like this;
Here is the clearer version where there is no red circle
AI: Why do you need to find the square root in the given equation with the
red circle on it?
If you have a simple transfer function like this: \$\dfrac{1}{1 + j\omega RC}\$
To find the magnitude of the output voltage divided by the input voltage....
You have to do some math manipulations. But firstly: -
Why are there also the || symbols in \$Vo/Vi\$?
\$|V_O|\$ is the magnitude of \$V_O\$.
\$|V_O|\$ disregards phase angle information to make life simpler in amplitude bode plots.
So, going back to solving the TF to find the magnitude, we have to get rid of the complex number in the denominator and, the way is to square each term, add them together and, take the square root of the sum. Hence: -
$$|\dfrac{1}{1 + j\omega RC}| = \dfrac{1}{\sqrt{1^2 + \omega^2 R^2 C^2}}$$
It's basically a conversion from rectangular co-ordinates to polar co-ordinates: -
Image from here. It's Pythagoras and basic geometry.
Regarding the conversion of the specific formula, start with this: -
$$\dfrac{1}{s^2RR_1CC_1+s(RC+RC_1+R_1C_1)+1}$$
Then for the bode plot information you replace s with \$j\omega\$: -
$$\dfrac{1}{j^2\omega^2RR_1CC_1+j\omega (RC+RC_1+R_1C_1)+1}$$
And, because \$j^2 = 1\$ we get this: -
$$\dfrac{1}{-\omega^2RR_1CC_1+j\omega (RC+RC_1+R_1C_1)+1}$$
$$= \dfrac{1}{1-\omega^2RR_1CC_1+j\omega (RC+RC_1+R_1C_1)}$$
Then you square the real terms and you square the imaginary terms and take the square root: -
$$= \dfrac{1}{\sqrt{(1-\omega^2RR_1CC_1)^2+(\omega (RC+RC_1+R_1C_1))^2}}$$
That is your magnitude. However, I see you made an error in your math: -
You square the individual terms, add the squares then square root the sum. It's the Pythagoras method for finding the hypotenuse of a right angled triangle.
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H: Why can't electrons leave the N side and enter the P side in reverse bias?
Why can't electrons (excess electrons) of the N side of a semiconductor diode enter the P side via the battery in reverse bias mode of PN junction? like this:
AI: With battery positive on N and battery negative on P you have a reverse biased PN junction. That forms a wide depletion layer that is basically non conductive unless the breakdown voltage is exceeded.
The majority carrier electrons in the N material are attracted to the battery positive terminal but, there is only a limited supply of them and this produces a really tiny glitch of charge movement into the battery that is unsustainable.
It's a similar story for the majority carriers in the P material: -
Image from here.
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H: Does this ROM Chip Require a Level Shifter on the SPI lines?
I have this ROM chip: https://www.digikey.com/en/products/detail/adesto-technologies/AT25SL321-MBUE-T/6827495
I see it takes ~1.8V nominal input - do the 3.3V SPI lines need to be level-shifted down to 1.8V?
AI: The data sheet is quite clear: -
So, if running at 1.8 volts, the maximum voltage from a 3.3 volt powered device should be a little below 2.2 volts. This may indeed require some form of level shifter and, you may need to use a level shifter on the output to the 3.3 volt devices to ensure a read operation is successful.
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H: Knowledge requested for WS2811 Based RGB LED driver Module
Design of LED Module based on WS2811 LED driver IC (Only Red-channel is shown).
To the right of the schematic you will find a simple, cheap and robust constant current LED driver. The current for the connected LED(s) can be easily adjusted with R4 (in this case about 344mA).
On the left is the 3-channel pixel LED driver WS2811. The outputs can only "sink" (active low) with up to 18.5 mA per channel (Only low is driven).
In between is the Connector circuitry that links the outputs of the WS2811 to the constant current driver.
This concept gives me the ability to use different LED configurations for different applications (e.g. High/Medium/Low Current LEDs on J3).
Independently, the LED controller/Driver Circuit and the constant current driver work fine and for this I also have all the components in stock.
My challenge lies with Connector circuit between these two circuits.
For this purpose, I have now chosen Q1 (2N3906) with the 100 Ohm resistor.
This one ensures that the LED does get turned on. However, when turned off, the LED goes off very slowly.
This is of course not the intention when you want to show color patterns.
I would really appreciate it if someone could tell me where it goes wrong in this circuit or what could be better in this section.
AI: However, when turned off, the LED goes off very slowly. This is of
course not the intention when you want to show color patterns.
Yes, you need some means of discharging the gate source capacitance of the MOSFET when the upper PNP BJT (Q1) disengages. Once below the current limit threshold Q3 turns off so it won't discharge the gate-source capacitance much at all.
I would really appreciate it if someone could tell me where it goes
wrong in this circuit or what could be better in this section.
Maybe just try a 4k7 resistor from gate to source. It's high enough not to significantly affect the constant current circuit but, it's low enough to discharge the parasitic capacitance more rapidly. If still not quick enough try a lower value but, nothing below about 1 kΩ or it'll impact the on-intensity a little.
However, looking at the IRLML2060TRPBF data sheet shows the the gate-source capacitance in only typically 64 pF so, pretty much 100 kΩ would discharge the gate in a tiny fraction of a second.
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H: How do I visualize Verilog/HDL simulation?
I know that execution is a misnomer here, still using it due to lack of a better word. Edit: simulation.
Coming from a programming background, where we have debuggers to step over, in and out of a particular code block and we have watches to monitor the real time values of variables.
Do we have any similar possibilities in the HDL world? This is needed to monitor real time values of reg type variables, procedural block execution and how blocking and non-blocking assignment will work in real time.
Could not find similar functionality in Vivado. Do we have to do the debugging using waveform only?
AI: Look at the Vivado Design Suite Tutorial section on "Stepping Through Source Code". Almost any compiler that simulates Verilog natively (i.e. not translating it to another language like C/C++ first) should have this capability. You should be able to set breakpoints and view the current values of signals at that exact point in time.
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H: The field in a waveguide at exactly the cut-off frequency
Can anyone explain to me qualitatively, what kind of field exists inside a waveguide at EXACTLY the cut-off frequency?
I would be grateful if an explanation was given about waveguides with metalic boundaries and dielectric waveguides (optical fibers).
AI: One way of looking at it (not thinking too hard about the differences between TE, TM, and hybrid modes) is to consider the momentum vector, or k-vector, of the mode.
Like any vector, a k-vector can be decomposed as \$\vec{k}=k_x \hat{x} + k_y \hat{y} + k_z \hat{z}\$. If the waveguide is aligned in the z-direction, then \$k_x\$ and \$k_y\$ tell us how much of the wave's momentum is (speaking crudely) bouncing back and forth between the walls of the waveguide, and \$k_z\$ tells us how much of the momentum is devoted to propagating the wave along the guide.
The boundary conditions for the (n,m)'th mode to propagate can be expressed as
$$k_x=\frac{n\pi}{\ell_x}$$
and
$$k_y=\frac{m\pi}{\ell_y}$$
As the waveguide dimensions \$\ell_x\$ and \$\ell_y\$ shrink, more of the k-vector must be used to fulfill these boundary conditions and less is available for the \$k_z\$ component.
When \$|\vec{k}|^2 = k_x^2 + k_y^2\$, and therefore \$k_z=0\$, we have reached the cut-off condition.
Basically we have a wave that is resonating in the x and y directions (transverse to the guide) and simply a plane wave (no variation) in the z direction.
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H: Connecting Google Home To Arduino - Issues with ground
I am attempting to connect my google home to an Arduino so I can read when the speaker is on. (This will control a Big Mouth Billy Bass but that is not relevant here.)
When the speaker (google home) in plugged in to its own power supply the circuit works perfectly, but when I try to power it in parallell with a 12v=>5v converter it turns off whenever the speaker is activated. Please see images for a visual of this. My appologies for the drawing's quality.
Working but using 2 different plugs:
Not working - Google Home turns off whenever it uses the speaker - using one plug:
AI: Chances are both sides of the speaker are driven (neither is ground). This means when you connect to the Arduino with a common USB ground, you are shorting one side of the amplifier to ground.
Your best solution would be to use an audio isolation transformer between the two to provide complete electrical isolation. They can be found by searching for "audio isolation transformer" or "audio ground loop isolator".
Possible solution:
simulate this circuit – Schematic created using CircuitLab
Take a look at the A1/A2 ADC values with off/on, you should get an easily detectable pattern.
Using an isolation transformer with an Arduino analog input:
simulate this circuit
The resistor divider generates a 2.5V reference, since the voltage on the transformer secondary will be AC we need to move it up above 0V at the center (the Arduino ADC can't measure negative voltages). The transformer primary is just connected across the speaker in the Google Home.
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H: What type of plug is this?
I'm seeking to buy this type of plug but can't find it anywhere. I tried asking at my local electronics shops, googled the images and consulted the data sheet of the appliance it came with. (12V input on an Indel B fridge.)
Any pointers would be appreciated. Thanks!
AI: That looks like a C11 plug. Might be hard to find from a legitimate source since it was withdrawn from the IEC 60320 standard.
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H: N-MOSFET and NPN latching switch
I've seen many latching circuits through searching and reading some simple circuits.
Most use NPN+PNP combination, some bistable ones use two NPNs, some use DPDT relays.
Is the following circuit going to work as a latch?
The idea is that after the momentary switch is pressed , load is supplied through N-Mosfet as well as the NPN transistor(which will hold the N-Mosfet gate high until a reset occurs in power)
(Sorry, had to hand-draw as the circuit editor doesn't let me make a circuit on mobile phone)
AI: simulate this circuit – Schematic created using CircuitLab
Positive Feedback with high side latch with Set,Reset and POR cap.
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H: Type of X is incompatible with type of XXXX
I have the following code(I'm pretty new in VHDL):
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_unsigned.ALL;
entity prac6 is
Port ( P1 : in STD_LOGIC;
P0 : in STD_LOGIC;
D3 : in STD_LOGIC;
D2 : in STD_LOGIC;
D1 : in STD_LOGIC;
D0 : in STD_LOGIC;
F : out STD_LOGIC;
J1 : out STD_LOGIC;
J2 : out STD_LOGIC);
end prac6;
architecture DM of prac6 is --0
signal product: std_logic_vector(1 downto 0);
signal cash_v: std_logic_vector(3 downto 0);
signal cash_int: integer range 0 to 15;
signal price: integer range 0 to 7;
signal change: integer range 0 to 15;
begin
product <= P1&P0;
cash_v <= D3&D2&D1&D0;
cash_int <= conv_integer(cash_v);
price <= 2 when product = "00" else -- Coca Cola 2€
3 when product = "01" else -- Patatas fritas 3€
5 when product = "10" else -- Postre dulce 5€
6 when product = "11"; -- Albóndigas 6€
process (change, cash_int, price)--1
begin
if (cash_int - price) >= 0 then
change <= cash_int - price;
F <= '0';
else
change <= price - cash_int;
F <= '1';
end if;
case change is --2
when 0 => J2 <= "0011"; J1 <= "1111";
when 1 => J2 <= "0000"; J1 <= "0110";
when 2 => J2 <= "0101"; J1 <= "1011";
when 3 => J2 <= "0100"; J1 <= "1111";
when 4 => J2 <= "0110"; J1 <= "0110";
when 5 => J2 <= "0110"; J1 <= "1101";
when 6 => J2 <= "0111"; J1 <= "1101";
when 7 => J2 <= "0000"; J1 <= "0111";
when 8 => J2 <= "0111"; J1 <= "1111";
when 9 => J2 <= "0110"; J1 <= "1111";
when others => J2 <= "0000"; J1 <= "0000";
end case;--2
end process;--1
end DM; --0
The errors I have are these(I don't know how to fix them) :
AI: You are assigning J1, J2 with "0000", "0011" etc, which are inferred as std_logic_vector at RHS. But J1 and J2 at LHS are of std_logic. Re-analyze your requirements and fix data types of your IO ports to std_logic_vector, if that is what you really want.
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H: How to limit voltage to microcontroller, and drain the rest?
I am designing a circuit to control a set of 0-10v dimmable lights. The lights have two lines, Dim+ and Dim-. Dim+ will be at 10 volts, and the brightness is controlled based on how much is drained to Dim-. Right now I am controlling the lights with an n-channel mosfet connected to a microcontroller. The microcontroller sends a pwm signal, rapidly turning on and off the mosfet, dimming the lights. Right now, the microcontroller is being powered off of a 5v usb, but I would like to change it so that the microcontroller is also being powered by Dim+, but still have it so that all of Dim+ can be drained to Dim-. Is this possible?
My initial assumption was that it would not be possible, as if all 10v is drained to Dim-, then there is 0v of potential to power the microcontroller. Is it possible to power the microcontroller, so that there is always 3v between 1 and 2, but also 0v between 1 and 3?
I know it isn't possible with the configuration I have drawn, but is it with any other config?
Edit: Here is how 0-10v dimming works, and here is the schematic I am currently using. Dim+ can connect to pin 1, 2, or 3, and Dim- connects to pin 6
AI: It's going to be tricky, but maybe not impossible. For your existing circuit to work, there must be a series resistor in the output of the light device that delivers the +10 V to your DIM+ input. In order to minimize power consumption, it is probably quite high --- on the order of 1 - 10 kohms.
That means that the amount of power that you could draw from it is pretty low. The maximum power you get will be when DIM+ is pulled down to 5 V. If the pull-up resistor is 1 kohms you'd be getting 25 mW. If the pull-up is 10 kohms you'd only be getting 2.5 mW. But the light circuit would likely interpret this as a command to dim the lights by 50%, which is probably unacceptable.
If you can accept, say, 90% brightness from the lights, then you might get between 0.1 and 1 mA (0.9 to 9 mW). This is probably enough to run a microcontroller if you are careful about it (and don't choose a power pig of a microcontroller).
Something like this has a good chance to work:
simulate this circuit – Schematic created using CircuitLab
For best efficiency, the REG device might be a buck converter sub-circuit rather than a single linear regulator chip. And again you'll want to make sure your microcontroller is running at under a milliwatt for the best chances of it to work.
Changes in microcontroller load (switching some other GPIOs, for example) might cause the lights to noticeably dim or brighten. If this isn't acceptable, consider using a shunt voltage regulator instead of the series regulator shown at U1. But this will reduce the maximum brightness you can achieve.
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H: Identify vintage capacitor
What is this component? Words on it say something like:
DUIULER
0.1 ? +- 23%
250V 50~ WKG
TL
Where the "?" is a literal blob of ink that could be anything.
In circuit it lies across the phase and neutral lines, in parallel with an enormous chonking ceramic horizontal rheostat-like resistor-thing. (edit turns out it is a carbon pile resistor in two stacks, with a ceramic housing.)
The outer surface is slightly tacky, but that might be the kapton-like tape around it.
When measured, it returns a value of 15.80 microfarads, but take that with salt.
In situ it looks like this:
Background
I have a 1957 Singer 201K sewing machine that has had a motor kit retrofitted. It has worked well for decades, but in the last few years the pedal started getting hot, and it once started sewing all by itself.
Web searches suggest this is a
Noise supression capacitor and is redundant in the modern world without AM radio, can be safely removed.
Smoothing capacitor, again redundant given its not the 1950s any more.
It might also be a snubber to help protect the resistor-block.
Links:
Example of site saying to simply cut it out.
Video showing how to clean the carbon pile resister.
Results: I have deleted the capacitor, and the sewing machine runs perfectly without it.
I've also cleaned the contents of the ceramic carbon pile resistor, and that was very dusty and dirty. There's over a hundred carbon disks inside it, of which ~5 were broken. Cleaning all the carbon off brass contacts has also helped enormously, and the pedal does not get as hot. I also am running the pedal on a scrap of wood, not on the carpet.
AI: It's an old film noise suppressor cap
What you have there is a quite old noise suppressor cap, made from metallized film or film and foil. The correct replacement for a cap like this is not a 400VDC cap of any type though, but an X-rated safety cap with the same value and a safe working voltage rating of at least 250VAC (note that the rating on X and Y caps is in volts AC!!). These will universally be film type capacitors, and are tested so that they do not create a hazardous failure potential when connected across the mains (line-to-neutral).
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H: Coaxial Cable vs Shunt, path of least impedance
The website LearnEMC.com has a page called Identifying Current Paths which contains the following graphics.
The graphic on the left shows a coaxial cable arranged in a "U" shape, with a shunt connecting the shield at each end of the U. The graphic on the right shows that at low frequencies, current "prefers" to travel through the shunt, rather than in through the longer coaxial shield. However, at higher frequencies, the current "prefers" to travel through the coaxial shield, rather than through the shunt. That is, the current prefers to travel in oppositely travelling pairs, even though one of the pairs has a shorter alternate path.
The purpose of this graphic is to illustrate a special case of the principle that "current seeks the path of lowest impedance". (Obviously, current doesn't only travel through that path, but prefers it. However, this graphic seems relevant to the current discussion regarding Veritasium's video regarding the propagation of electricity. For example, this question and this question
How might one calculate the percentage of current flowing through the shield vs that through the shunt? Would the following procedure work?
Ignore the shunt, and calculate (or measure) the impedance of the coaxial cable by itself, then
Ignore the shield of the coaxial cable, and calculate (or measure) the (highly irregular) transmission line formed by the coaxial cable's inner conductor, together with the shunt.
Assume the ratio of current between the two paths is inversely proportional to the ratio of the two impedances found in 1 and 2?
I am inclined to believe that the shunt has little or no effect on the impedance of the coaxial cable. I have a doubt however, that the impedance found in step 2 is meaningful. After all, the inner conductor is shielded in reality, and that makes me question whether the impedance found in step 2 is at all meaningful.
Is there another method for calculating the current through the shunt as a function of frequency? Perhaps for special cases or special geometries?
AI: How might one calculate the percentage of current flowing through the shield vs that through the shunt? Would the following procedure work?
You don't need to calculate anything to get close to the true answer.
Coax theory indicates that the preferred route for AC is through the coax shield. You don't need to measure anything either; you just need to recognize that when a load is attached to a length of ideal coax, the effective impedance of the shield is zero ohms.
Now let me repeat that because, it might appear problematic to some folk: -
$$\color{red}{\text{For an ideal coax, the impedance of the shield is zero ohms}}$$
For slightly non-ideal coax, the shield impedance is the DC resistance. For reasons of brevity, I'm not going to consider situations where the coax is significantly far from being ideal.
However, if you want to pursue this, there are several on-line articles explaining that the return-path of current through a ground-plane directly follows (as best it can) the forward-path current in order to minimize loop-inductance. Fundamentally, this is also why proximity-effect occurs in 2 wires.
So, how can the shield of an ideal coax have zero impedance: -
Ignoring the inner's forward-current, the shield return-current produces a magnetic field that exists only outside the shield; a magnetic field inside a "tube" is not made (proven theory).
Ignoring the shield, the inner's forward-current produces a magnetic field that extends all the way from the inner (as it would for a normal wire that has no shield surrounding it).
Combining the two; the magnetic field (outside the shield) produced by the shield's load return-current is exactly cancelled by the magnetic field from the inner's load forward-current.
We know this to be true because that is why we use coax cables for unbalanced signalling.
So, with no net field outside the shield, the effective inductance of the shield (when used properly with the inner) is zero.
There is of course a magnetic field between inner and shield but, that does not effect the impedance of the shield because magnetic fields inside a tube conductor have no impact on the inductance of the tube. Hence, the tube/shield has zero inductance.
In fact you could do an experiment to prove this (and it works): -
Take 10m of coax and drive the shield (end to end) like a transformer primary.
Let's say you used a moderate frequency like 10 kHz or 100 kHz
Let's also say you applied a "primary" voltage of 10 volts RMS
The end-to-end voltage on the inner would also be 10 volts RMS
You might say that if the shield produces no internal flux then how can anything be induced on the inner. You probably wouldn't say this if you know about induction of course.
I'll leave that as a little thought but, back to this experiment.
Now, instead of driving the shield you drove the inner (end-to-end) with 10 volts.
If you then measured the end-to-end voltage on the shield, it would not have 10 volts RMS induced on it but, maybe only 9 volts.
This is because the flux that is produced inside the tube (by the inner) is not a valid flux for inducing a voltage in the shield/tube.
So, I hope I've demonstrated that the shield of a coax is ideally zero inductance and non-ideally it's zero inductance plus a bit of DC resistance.
This is why at low frequencies, the shorter "shunt" path is the preferred route because, it is likely to have a lower DC resistance compared to the longer shield of the coax. As frequency rises, due to the disposition of shunt and coax inner, the shunt will rapidly overtake the shield in terms of impedance (due to zero inductance in the shield) and be the far less preferable route for current.
$$\color{purple}{\text{This answer has got nothing to do with that stupid video}}$$
2-dimensional QuickField simulations of flux and induced voltages in coax
The first scenario uses an excitation of 1,000 amps on the shield with the inner open circuit. Voltage measurements are "per metre" into the page (z-dimension): -
Ignoring slight discrepancies due to limited element structures in the student version of QuickField, we could make an argument that says the voltage on the inner is the same as the voltage on the shield. In other words, 95.906 volts is pretty damn close to 96.3 volts (within 0.5%). This is because both "wires" are subject to the same flux pattern (external to the shield).
Also note the lack of magnetic field between driven shield and inner core
The 2nd scenario puts 1,000 amps on the inner: -
Due to the inner carrying the excitation current and it producing quite a bit of flux inside the shield/tube, the voltage appearing across the inner is substantially more than the voltage across the shield. But, the important thing here is that the voltage across the shield is 96.382 volts i.e. pretty much the same voltage seen on the shield (per metre) when it was driven with 1,000 amps. 96.382 volts and 95.906 volts are within 0.5% of each other (despite the limited finite element sizes of the student model).
For both scenarios above, the magnetic flux density field pattern scaling was kept the same and clearly, both scenarios produce the same pattern and levels of flux density (the colours don't reflect the opposing polarities of course because they are RMS magnitudes).
And, just for completion, I dug up the old model for this rather simplistic and robust coax and plotted the fields for when the inner and shield were both set at 1,000 amps but with opposite polarities: -
Please take my word that the flux density outside the shield is miniscule in comparison with the two above scenarios. The voltage on the shield (despite 1,000 amps flowing) is only 1.08 volts and that, is due to the copper resistance. Maybe I'll simulate at 1 MHz next time.
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H: How to fix overly sensitive switch
The switches in the presenter (clicker) depicted below normally close when firmly pressed, by giving way and making contact with a positive feeling and sound. However, the bottom-right switch appears to close at a mere touch, so much so that when the switch above it is pressed, the faulty switch also closes. In presentations this is a problem, because when I press page-down (the top-right switch) the presentation disappears (due to the action of the bottom-right switch). Is there a way I can fix the faulty switch? I tried lifting the plastic sheet that covers them, and apparently the metallic tops of the switches are attached to it rather than soldered on the PCB.
AI: Those flexible contacts are supposed to be centered on their places. These are called "tactile membrane switches", by the way.
It seems that metal switch domes were attached carelessly misaligned (shifted down and to the left), but the one in bottom-right corner is shifted more than others. It practically touches middle contact with its top-right "leg".
Peel the tape with domes on it. Clean those golden circles and dots in the middle of them with an alcohol. Align domes properly centered on the circles and it should be OK.
In cheap devices the domes usually held in place with a piece of sticky tape, so if it does not stick back nicely, you can also replace the tape. You can use pretty much any scotch tape or whatever non-conductive sticky tape you have at hand.
The easiest way to do it is put tape upside-down first, then use contact circles as guides for arranging domes on the tape. When everything is in place, flip the tape, do a final alignment and press it down.
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H: Multiple DC DC regulators
I am studying a schematic which has a backplane card and another 6 cards interfaced on it.
There is a power card which has EMI filters, transient protection module and an isolated DC DC regulator that taps from a 24V DC external source and provide 24V DC, 5V DC and 3.3V DC.
There is another interface card that receives signals from a circular connector. This card processes the signals and sends it to an ADC circuit to be fed to another MPC card.
I noticed that this card (Interface card) has its own DC DC regulators that tap 24V DC from an external source (similar to the power card) and provide 12V and 5V. My question is why can't the output from the power card be used to supply to the interface card? Why does the interface card has it's own regulators. I am guessing it's for isolation. Please explain.
AI: I think you've answered your own question. It's undoubtedly for isolation. The power card will probably have fairly large signals and higher currents which could cause fluctuations in their power supply even if regulated. If properly designed this would not be a problem.
The interface card may well be dealing with low level signals. Their signal processing circuits will need a quiet power supply.
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H: Can I use another pin instead of VIN?
I'm currently trying to copy a setup (seen below) for an audio player using an ESP32-S2-Saola-1 instead of an ESP32-Wroom.
The problem is that the ESP32-S2-Saola-1 doesn't have a VIN pin. Can I use another pin instead of VIN or is it simply not needed?
I'm powering the board with USB and using a PAM8403 as my amplifier.
AI: The pinout of the modules isn't enough to answer this question. You need the schematic diagram of the ESP32-S2-Saola-1 to see if it can be made to work.
The sketch you are working from shows the amplifier drawing power from the VIN pin of the WROOM32. The VIN pin of the WROOM32 therefore must deliver 5V to the amplifier.
The ESP32-S2-Saola-1 schematic shows that the USB 5V (marked "VBUS" in the schematic) goes to the module +5V line through a diode:
The green line shows you how VBUS connects to +5V.
The blue circles show that the +5V line connects to pin 20 of J2. That's the pin marked "5V0" in the ESP32-S2-Saola-1 pinout that you posted in the question.
That answers your question: 5V0 is a 5V output that you can use to power your amplifier.
5V0 is also a 5V input to the ESP32-S2-Saola-1. If you don't have USB power, you can connect a 5V power supply to that pin and power the ESP32-S2-Saola-1.
The PAM8403 is a 3 watt amplifier.
You will have to make sure that your USB source can provide at least 600 milliamperes of current so that the amplifier can reach its full output power.
The 1N5819HW-7-F diode between VBUS and 5V0 on the ESP32-S2-Saola-1 is rated for 1 ampere average current with peaks up to 1.5 ampere. You should be able to get enough current for the PAM8403 through the 5V0 pin without damaging the diode.
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H: Does a voltage drop exist in a current-carrying loop of wire?
Suppose current is induced in a loop of wire by a changing magnetic flux, would there be a voltage drop along the wire?
If a voltage drop does exist then somewhere along the length of the wire there should be a jump in voltage otherwise it would violate Kirchoff's voltage law, but considering the symmetry I do not think there is a point where voltage jumps.
In the other case, if there is no voltage drop, wouldn't that violate Ohm's law because current times resistance gives you some voltage drop not equal to zero?
What is the way out of this problem?
Thank you.
AI: There is both a voltage drop along the loop, due to the current flow times resistance per length, and a voltage rise along the loop, due to the changing magnetic induction. They will be equal and opposite, and add to zero, resulting in the loop being equipotential all the way round, for a uniform loop.
If the loop is non-uniform, for instance heavy wire 95% of the way round, and a thin resistive wire or even a discrete resistor for the other 5%, then you'd see a significant voltage drop across the higher resistance section.
As a practical issue, you would find it difficult to make a convincing measurement of the voltage drop from point to point of the loop, as you would need to connect your DVM to two points on the loop by test leads that make their own loop. How you run this loop with respect to the area of changing magnetic field will influence the voltage generated in the meter-lead loop, and so added to the voltage actually present at the probe points.
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H: Is there anything wrong with this MOSFET switching circuit that disconnects the batteries from the circuit when charging?
I'm trying to teach myself electronics hence my beginner skills in design. I want to design a circuit to power another with two 18650 li-ion batteries in series. Charging them in series seemed like a lot of work with load balancing - and li-ion charging ICs are cheap and abundant, so I reasoned that I could charge each battery individually with a separate IC for each li-ion battery, from USB power.
The idea is when USB is connected, the batteries need to charge. Each battery is disconnected from the other and charged via the charging IC. When USB is disconnected, the batteries are connected back in series and power the circuit. Below is a basic circuit that seems to work, but I'm wondering if there's some kind of thought process or analysis I'm missing. In the circuit I changed USB from 0V to 5V and observed the output changing from 7.2V to close to 0V. Any help is appreciated. :)
AI: The idea is when USB is connected, the batteries need to charge. Each
battery is disconnected from the other and charged via the charging
IC.
OK, I have a little observation but maybe later down...
When USB is disconnected, the batteries are connected back in series
and power the circuit.
OK, here's the problem as I see it - when USB disconnects, the gate-source capacitances of the MOSFETs will hold that state of charge and nothing really happens - the MOSFETs remain in the state they were previously and er.. everything stays the same except...
As the gate capacitances naturally discharge, the MOSFETs might (and probably will) reach a point where the series elements (M1 for instance) are/is still pretty much "ON" and, M2 (the grounding MOSFET) also starts to activate. At this point there will be smoke and fire so beware.
To solve this I'd want to sequence the MOSFETs under control of comparators to ensure that the MOSFETs switch on or off very quickly and, with some dead-band to prevent the much less likely opportunity (but still finite possibility) of fire and smoke.
This addition will also be useful when USB is reconnected. I don't believe a simple pull-down resistor is enough without dead-band circuits being implemented.
I have no idea what M4 does: -
You also need to make sure that the P channel MOSFETs are sufficiently turned on when the USB voltage is low. Your source voltage may be as low as (say) 2.7 volts so, choose a MOSFET that has a low \$V_{GS(THRESHOLD)}\$.
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H: Is this a switch?
This is about a component from a toy ( a very similar one here) that I've repaired, just needed soldering on some cables. I've come across this component
This should be sensing/checking the drummer is touched so that music starts.
What is this component?
AI: It's a piezo buzzer/sensor like this one: -
And it can be both used to generate sound and used to generate an electrical signal when subjected to certain movements (like a drum stick).
Wiki piezo electric sensors.
Piezo drum kit
Piezos for Electronic Drums
GIF image from here.
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H: CN3722 solar controller does not stop charging
I have this custom PCB witha CN3722 module. I charge two 18650 batteries. Resistors XVR7 and XVR6 are calculated for 8.3 volts.
The charger charges the batteries and the "done" LED turns on when the voltage of the batteries gets to 8.3v.
The problem is that it doesn't stop injecting current after the stop charging condition.
If the input voltage increases, more current goes to the batteries.
The solar panel has a maximum operation voltage of 18.5 volts.
AI: The problem is don't stop of inject current after the stop charging
condition.
This is how the P channel MOSFET should be connected (from the CN3722 data sheet): -
Your circuit has the P channel MOSFET reversed - note the bulk diode direction in your schematic. Its always going to conduct current to your battery i.e. there is no control: -
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H: CN3722 solar controller - What MOSFET should I use?
I need to know what P-channel MOSFET to use with a CN3722 to charge two 18650 batteries.
The datasheet doesn't say what MOSFET to use.
My solar panel parameter are:
maximum power 10w
maximum operating current 0.57 Amp
maximum operating voltage 18.5 volts
My batteries are two 18650 2600 mAh in serie.
(8.4 volts in maximum change voltage)
On datasheet say The MOSFETs such as AO4459, STM9435(or WT9435), AO3407A can be used.
But AO4459 different type of the one from the CN3722 typical application diagram:
mosfet on the typical diagram of CN3722:
AO4459 symbol:
Currently I use Si4435DYPbF Power MOSFET but didn't work because not stop charging after the full charge already reach and DONE led are on.
This are symbol of my current mosfet.
This are my current schematic
AI: I need to know what P-channel MOSFET to use with a CN3722 to charge
two 18650 batteries
The data sheet says several things about the MOSFET choice but, right at the bottom of this data sheet extract below are some recommendations: -
Pick a MOSFET that has enough drain-source maximum voltage to cover the input voltage supply needed to charge 2 series batteries. Also double check that the chip is capable of handling two batteries of the voltage you need and that the maximum supply voltage for the chip isn't exceeded.
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H: Equivalent resistances in differential amplifier equation
When we simplify this differential amplifier and have equations for Va and Vb, then equate them together to write the expression for Vout. How come it is assumed that R2 = R1 and R4 = R3?
For example here the equation would be:
But using R2 = R1 and R4 = R3 we get the more simplified form:
AI: It is not necessary that the resistors are equal, but it is usually convenient and often the reasons for choosing a particular value for one set also apply to the other set.
Usually in a differential amplifier you want R2/R1 = R4/R3. R2 and R4 may be chosen for loading on V2, or perhaps current consumption or leakage current concerns. Similar considerations may apply to R1 & R3, leading to similar choices.
Note also that if V1==V2, the input current loading for each is the same if the ratios are chosen as above.
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H: How to swap 3 AAA batteries for a rechargeable battery with a charging module
I have this table lamp that uses 3 AAA batteries to function, but the batteries run out pretty fast, so I'd like to swap them for a rechargeable battery that I can plug into a USB charger without having to take it out, basically like charging a phone.
Manual
Current batteries
I looked it up and I think that I would need this 18650 batteries or a 14500 battery and a charging module. But I have 3 questions:
1 - Which battery would work better, the 14500 or the 18650? I'm just considering the 14500 because it's smaller and it would look better, but I don't know if it would work, and it's pretty hard to find a charging module for it.
2 - As you can see on the lamp manual, it says the input voltage is 4.5V, and I noticed the 18650 batteries have a maximum voltage of 4.2V, so if I use the 18650 ones, do I need two of this batteries or can I use just one? If I use just one, would the lamp light be less bright?
3 - Does the battery capacity matters?
I'm sorry if the questions are dumb, I know nothing about electronics.
AI: The numbers 18650 and 14500 refer to the the size and style of the battery. 18 x 65 mm cylinder vs 14 x 50 mm cylinder. If they are the same chemistry/type, then the only difference is physical size and thus capacity. A 18650 battery is bigger and can hold more of a charge. The 14500 is sized the same as a AA battery and the capacity is smaller. You can also find other form factors like square or rectangle flat batteries that could work better for you.
Yes the lower voltage will be an issue. 4.2V is the fully charged voltage and they will typically run at 3.8 to 3.2v before the shut off. That won't work well for you. You would need a boost circuit. There are battery charging modules that do output boosting for you too. Those typically use 5V output and are the same exact thing as your average usb power bank.
The capacity matters. Low capacity means lower run time. Your 3x AAA carbon zinc batteries have 600mAh at 4.5V or 2.7Wh. A single 14500 900mAh 3.8V battery have 3.42 Wh. Not too much longer (and the numbers change as the battery runs out, this is just a rule of thumb calculation). A good 18650 is probably 3000mAh or 11.4Wh so will run a lot longer than either the other two.
If you really want to put it inside, a flag battery like a cell phone one would be better for you. And get a module or add a boost circuit to get a steady 4.3 to 4.5V out. The boost module will reduce your total run time but will allow the led lamp to work steady instead of dimming or shutting off sooner than expected.
Or just use an external USB power bank with a 1n4001 diode to the existing battery connections. This is known as a battery eliminator setup, simple and effective.
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H: new arrived 7.5V tablet battery only measured 7.05V, is it a bad battery?
I am replacing my Surface Pro 4 battery. I bought a new replacement battery on eBay. Its spec is 38.2Wh 7.5V = 5087mAh. I measured with my multimeter today. It shows 7.05V. I noticed that one of the YouTubers' replacement battery is 7.67V before he install it. I am wondering the 7.05V is because it is a bad battery or because it is a new battery that may not be fully charged?
AI: When you buy it, a new Lithium Ion (LiIon) or Lithium Polymer (LiPo) battery should not be fully charged.
Keeping LiIon/LiPo batteries fully charged stesses (and damages) the battery and makes it lose useful capacity when stored for a long time (for example when stored in a warehouse between production and distribution to the customer).
Keeping a LiIon/LiPo battery charged around 40-60% of its full capacity (such as the charge your replacement battery came with) will make it deteriorate much slower.
When you buy a new LiIon/LiPo battery, it will usually be only half charged because of this reason.
Batteries will also slowly discharge by themselves over time (self discharge). When left too long without a recharge, they will be completely empty which will also irreversibly damage the battery.
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H: Defining lumped and distributed elements according to signal travel time
We define distributed elements as circuit elements where the physical dimensions of the elements cannot be ignored and the differential equations stating the current, voltage etc also contain a variable signifying physical size. Fair enough.
My book goes on to describe that the travel time of the electrical signal through the element cannot be ignored in distributed elements. But we are not talking about astronomical distances here! In what sense can we practically classify lumped and distributed elements on the basis of time, when for all practical purposes, the electrical signal will travel instantaneously through the circuit element?
AI: My book goes on to describe that the travel time of the electrical
signal through the element cannot be ignored in distributed elements.
That is true.
But we are not talking about astronomical distances here!
What about a 1 metre length of 50 Ω coax? It's not astronomically big but, if we don't respect the thing as a transmission-line then we get problems.
In what
sense can we practically classify lumped and distributed elements on
the basis of time, when for all practical purposes, the electrical
signal will travel instantaneously through the circuit element?
No, it won't travel instantaneously; the speed will be somewhat close to the speed of light but that isn't instantaneous. Neither is it instantaneous in the 1 metre of coax I mentioned earlier and we use coax at much much longer lengths than 1 metre.
If we don't terminate the coax in proper components we might get this happening: -
V1 produces a 1 volt step after 50 ns and remains high. T2 is a 1 metre long transmission line of \$Z_0\$= 50 Ω
When we should be getting something more like this if we terminated the cable correctly: -
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H: Is the current supplied by battery constant if I connect a battery to a capacitor and inductor in parallel?
If I connect an inductor and capacitor in parallel will the current supplied by battery be constant or will it die out? I have done some calculations which I have shown below here i assumed that total current supplied by battery is I:
Here is dI/dt or I (dot) 0?
AI: If I connect an inductor and capacitor in parallel will the current
supplied by battery be constant or will it die out?
For a quick answer, you don't need to consider the capacitor at all. If it alone were connected across the battery, it would rapidly charge to the battery voltage and then consume no current. So, the capacitor can be ignored.
The inductor on the other hand will draw a current that ramps up to infinity over time. Clearly, the battery cannot supply that so, whatever the maximum current output of the battery is, it will be the final current (possibly hundreds of amps).
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H: Internal Pull-Up (PU) for LATTICE ICE40 LP1k
I'm using AD8541 Amplifier as a Power Good indicator for +VCCST_CPU that comes from Intel Tiger Lake UP3 on the motherboard I'm building.
The outputs V5S_OK and VCCST_CPU_OK go to an ICE40 LP1k FPGA.
How do I know if I need to set a weak pull-up to these signals inside the FPGA? The datasheet doesn't specify these pins as open-drain so how should I treat them?
AI: The outputs V5S_OK and VCCST_CPU_OK go to ICE40 LP1k FPGA. how do I
know if I need to set a weak pull-up to these signals inside the FPGA?
The op-amp in your schematic (LMV358) produces voltage outputs on pins 1 and 7 so, they are not to be regarded as open-drain. However, there \$\color{red}{\text{(may be)}}\$ a problem with the input to that op-amp because the maximum input voltage allowed is typically 4.2 volts and, if you do the numbers on pin 5, with a 5 volt supply \$\color{red}{\text{(if it is 5 volts)}}\$, it will see 4.545 volts: -
You should also be aware that if your FPGA is running on a supply rail lower than the op-amp, the voltage outputs on pins 1 and 7 may cause it damage.
Edits in \$\color{red}{\text{red}}\$
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H: 555 Astable : Separate charge and discharge resistors?
The 555 astable oscillator seems to be usually implemented with one common resistor between the charging and discharging paths of the capacitor.
Is there something wrong with putting one resistor for the charging path, and one for the discharging path?
AI: Is there something wrong with putting one resistor for the charging
path, and one for the discharging path?
There's nothing wrong with it other than at some point, the resistor in the discharge pin will never properly discharge the capacitor to a low enough value to cause a charge sequence to begin again. That added resistor is fighting against the pull-up resistor and the lowest voltage it can discharge the capacitor to is determined by both their values and the power rail voltage.
But, who is to say that on some circuits, this might not be desirable.
Maybe you are actually looking for something like this: -
Taken from this 55 tutorial.
Here's another variation originally from here: -
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H: Non-ideal transformer transient state
So, I've encountered a problem that doesn't look that hard, but I simply can't solve it. I have a simple non-ideal transformer circuit and I want to compute V_0. What I was able to find so far are the equations for each loop.
For t >= 0:
Loop 1:
i_1 + 2*(i_1)' + (i_2)' = 6
Loop 2:
3*(i_2)' + 2*i_2 + (i_1)' = 0
AI: Here's a hint on how to find \$I_1\$
Does that help you get started? \$I_2\$ will be the current flowing through the 1.3333 Ω resistor, divided by the inverse of the turns ratio (1.5).
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H: How to solve this oscillator problem
I have done some calculations which I have shown below here i assumed that total current supplied by battery is I
here is the problem
AI: Well, the current supplied by the source is given by:
$$\text{i}_\text{i}\left(t\right)=\mathscr{L}_\text{s}^{-1}\left[\frac{\hat{\text{u}}}{\text{s}}\cdot\frac{1}{\text{R}+\left(\text{sL}\space\text{||}\space\frac{1}{\text{sC}}\right)}\right]_{\left(t\right)}=\hat{\text{u}}\int_0^t\mathscr{L}_\text{s}^{-1}\left[\frac{\text{CLs}^2+1}{\text{CLRs}^2+\text{Ls}+\text{R}}\right]_{\left(\tau\right)}\space\text{d}\tau\tag1$$
Where \$\mathscr{L}_\text{s}^{-1}\left[\cdot\right]_{\left(t\right)}\$ is the inverse Laplace transform and I used the convolution property of the Laplace transform.
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H: Written notation for voltage divider
Is there a notation for the expression of a voltage divider? What I mean with this is some notation to express \$Z_1/(Z_1+Z_2)\$, like the notation Z1//Z2 for the expression of parallel impedances \$Z_1*Z_2/(Z_1+Z_2)\$
AI: Is there a notation for the expression of a voltage divider?
Short answer: No.
Parallel (||) and series (+) resistors have their own notation because they are the most fundamental ways of combining resistors. AND, the result is a resistance value. The result of an attenuator is an attenuation factor in % or dB or whatever. The expression for an attenuator is not simply a simplification that takes in one unit and returns the same unit. The variation in the units of the result make it impossible for one notation to cover all possible uses.
Update:
Let me expand. For both a parallel (R1||R2) and serial (R1+R2) expression. there is no ambiguity. Both R1 and R2 are in ohms, and the result is in ohms; always ohms, nothing else. this is why the expression, especially the parallel expression, can be substituted into more complex equations.
This is not the case with a 2-resistor voltage divider / attenuator. Let's assign the symbol & to mean "the voltage divider of", as in R1\R2 equals the voltage divider of R1 and R2, where R1 is the series leg and R2 is the shunt leg. That's fine, but what is the dimension of the equivalent result? The Thevenin equivalence of a 2-resistor attenuator is simply the two resistors in parallel, but we already have an expression for that.
If we would normally write:
Vout = Vin x (R2 / (R1 + R2))
then this would turn into:
Vout = Vin x R1\R2
Which I guess could work. My concern is that because \ is dimensionless, it will not play well with others. When calculating the transfer function of an active filter, parallel impedances can be reduced to their Thevenin equivalent, that equivalence can be dropped directly into the equations with other component values, and the effects of its real value can be observed.
OTOH, if in the feedback loop of an opamp there is a 2-resistor attenuator along with other components, substituting the equivalent \ value loses critical information, the network impedance of the attenuator relative to the other impedances in the loop. There is nothing in the equivalence that indicates whether the shunt leg of the attenuator is ohms or megohms.
All of which is to say that not only is there no standard expression for a two-element attenuator, and I can understand one possible reason why not.
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H: Equivalent circuit of the transformer
Why are the core resistance and core inductance in the equivalent circuit of the transformer shown in parallel while the winding resistance and leakage reactance are in series?
Why are core resistance and core inductance not also shown in series?
AI: Maybe you should forget about transformers and just think about a simple inductor and its equivalent circuit: -
So, what you find for a simple inductor is this: -
Image from here. This models high-frequency capacitive coupling so we can remove this: -
Then, it's a simple matter of adding a little bit of leakage inductance in series with \$R_{DC}\$. Call that leakage inductance the wire inductance that connects the AC to the inductor if you want.
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H: magnetically coupled inductor equations
How come the mutual inductance for the v1(t) equation has a negative sign and the mutual inductance for the v2(t) equation have a positive sign? I don't properly understand how the signs of the self and mutual inductance is derived, because from my understanding current into the dot means positive and out of the dot is negative, however here for v1 it would be different since they specify a negative polarity. But still I don't quite understand how we get the signs for the mutual inductance.
AI: Maybe take a closer look at your diagram: -
\$i_1\$ and \$i_2 \$ are flowing away from their respective dots. This is not conventional for coupled inductors and so attracts a negative sign in your top formula.
Then the same argument applies to the lower formula but, there's an extra twist - \$v_2\$ is not following the correct dot convention with respect to \$v_1\$ - voltage \$v_1\$ is following the correct dot convention hence, the two negative inverted conventions produce a net positive result in your 2nd formula.
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H: Feedback for a circuit
I am designing my first original circuit, which is a take on the 'Useless Box'. I have designed a schematic and I am seeking feedback on it. I am a complete newbie so most likely there will be some pretty obvious mistakes.
A brief explanation
The main input is a SPDT switch labelled action, this moves an arm, powered by one of the two motors, which changes the state of the SPDT switch, this moves a separate motor to move the arm back. Another SPDT switch detects the state of the arm and activates one of two 555 timers to flash an LED in roughly 1 second intervals.
The schematic
Notes
I have used a voltage regulator as the motors I am planning to use are 3.3 V and 0.28 A with no load
Update
I have updated the schematic according to jp314's suggestions, and have removed the CB4007 inverter and replaced it with a 4050 Hex Buffer. I also changed the input voltage from 9v to 5v because it works better with my choice of voltage regulator.
If there is any more information I need to provide let me know as I am very new to the digital design community.
AI: You don't need the 10k pulldowns on the NPN bases, but you might want a resistor in series between the buffer and the base. Choose a value about 20-50x the resistance of the relay coil.
You do need a pulldown R on the inputs of the logic gates (where 'Action drives). An open circuit input won't be a reliable logic '0' (or any state). 100k will do.
You do need a resistor in series with each LED. For indoor use choose one that gives 5-10 mA LED current.
C2 seems shorted -- not a problem, is it a spare?
Be careful with heat in your 3.3 V regulator. If the motors are loaded and consume (say) 0.6 A, the regulator will dissipate (9-3.3)*0.6 = 3.4 W. This is OK for a short while (few s), but for longer, it will need a small heatsink.
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H: How can I produce a continuous sound of pressure 70 dB with randomized noise?
How can I achieve a sound system that can produce a continuous sound with randomized noise in the range 70-75 dB?
I need that for conducting a medical experiment in which the doctor measures stress hormones levels induced due to prolonged exposure to moderate sound level.
AI: Generating white noise is easy - there are white noise machines that you can buy. You can also easily generate white noise using Audacity or other audio editor programs. You could also use Puredata or GNU Radio to generate white noise.
None of those options can guarantee the output level of the sound.
You will have to measure that.
You will need a calibrated sound pressure level meter. You can buy or rent such a meter. They aren't terribly expensive.
Set your white noise source running, then measure the sound level where your subject is sitting. Adjust the volume of the noise source to get the required 70dBA.
It doesn't matter really how loud the source is as long as it is louder than what you need.
The sound level drops the further you are from the source.
You really have no choice but to measure the sound level.
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H: Measuring AC with a DC offset using a digital multi-meter
I got a bit confused about how AC voltmeters on digital multi-meters work. I don't want to know about for example sampling method or conversion of analog to digital data. I need to know whether it can only measure the sinusoidal wave with only zero offsets.
I tried to compare the AC voltmeter and oscilloscope responses together in one of the electronic simulators programs (Proteus.) I know about the difference between the Vrms and Vpeak. When the AC signal has the DC offset the AC voltmeter shows an unacceptable value. For example, by using the signal generator, I applied a sine wave by Vp-p= 12 V and DC offset = 0 as you can see in the following picture. It shows the correct answer. Vp-p/2 = 6 V => Vrms= 6/sqrt(2) = 4.24 V
Now I'm going to add the DC offset to my signal by changing the signal (from "bi to uni" in signal generator settings.) If you check the image you will see that the amplitude of the signal and even the frequency has remained constant while the AC voltmeter shows the value of 7.34 V. How does the voltmeter calculate this value?
Shouldn't the AC voltmeter remove the DC level of the signal automatically and only calculate the differential voltage between the maximum and minimum voltage?
AI: Your meter is actually doing what it's supposed to. It's measuring the RMS value of its input. For the first signal, with no DC offset, the RMS value is for a sinewave of 12 VP-P which is 4.24 V. With a DC offset the RMS value is given by \$ \sqrt{ AC_{RMS}^2 + DC^2} \$ which is \$ \sqrt{4.24^2 + 6^2} \$ which is 7.34 V.
If you don't want the DC offset to be included, add a series capacitor as already suggested. Many meters (especially analog such as the Simpson 260 and Triplett 630) include an internal capacitor for this purpose. This mode is often called AC output as it was intended for measuring the output voltage of an AC amplifier without the DC bias voltage.
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H: Where do Logic Gates Get the First 0 or 1?
I've been thinking about playing around with some logic gates on breadboards... But where do I get the first 0 or 1? I could use a regulator,but is there a better solution? or would a logic gate just automatically interpret no voltage/current as a 0?
AI: A CMOS logic gate won't interpret no voltage (i.e. an open circuit) as a 0 or a 1. This is because there is (ideally) no leakage path between the input and ground or the supply. Any charge that is on the input would (ideally) remain there and not be well controlled.
TTL logic gates do have an input pull-ups and an open circuit unit will be a stable '1'; although it would still be good practice to tie an unused input to supply (if a 1 is desired).
On your breadboard, you may be using a regulator to supply the logic gates, but if these are CMOS (e.g. CD4xxx series) gates, a 6 V supply will work without a regulator. What is important is that the interconnected gates are all operating from the same supply voltage (and same ground).
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H: Altium surface pad next to throughhole pad design
I'm trying to make a simple board that will use an Arduino Nano 33. These boards allow for being either used as an SMT board or with a standard throughhole header.
I'd like to make the board where I can use either - header at first so I can remove it if I need to redesign the board, and then SMT for when making it more compact once I verify the board works.
I'm not sure what the correct approach is in altium for doing this though. Through snap EDA I've download the footprint for both version and put them onto one footprint. This means I have duplicate designators at the moment, but I just want to know if overlapping a pad and via actually connects them? Or when exporting for PCB manufacturing will these actually get seperated?
Is there a better way to elongate one side of a via to make a solder pad?
If this is correct, how should I handle the designators in this case? Only keep the throughhole designator?
AI: From PCB manufacturing point of view, this is fine. The SMT and THT pads will be connected.
From the design point of view, you should make a specific footprint for this case, as you will get DRC and collision errors by placing two footprints on top of each other.
You can actually create an offset through-hole pad in Altium, as shown below.
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H: 3.3V to 5V logic converter
I'm looking to drive some NeoPixels off an 3.3V Arduino Nano. I've read that I need to use a logic shifter as the NeoPixels run off 5V. Adafruit recommends the chip 74AHCT125 but I want a surface mount chip.
Would the chip SN74HCT04DRG4 be a good alternative to this for logic shifter from 3 to 5v? Only difference I think its that its 6 circuits and no ability to disable circuits. I've read NeoPixels can be finicky with this so I want to make sure I have the correct part before getting it fab'd.
Also, as a sanity check, do I have this chip wired correctly? Here is my schematic:
AI: The 74AHCT125 comes in both surface mount and through hole versions.
It says so right in the table on page 1 of the DATASHEET.
The SN74AHCT125N is the though hole version.
The surface mount versions are...
SN74AHCT125D (14-SOIC)
SN74AHCT125DGVR (14-TVSOP)
Neither the 74AHCT125 or the SN74HCT04DRG4 are level translators. But both could be used for that purpose.
The 74AHCT125 is a 4-channel non-inverting buffer with output enable.
The SN74HCT04DRG4 is a 6-channel inverter, which means that all the signals you put through it are going to be inverted. So if you were relying on any pre-existing code libraries, they would have to be modified to make it work.
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H: DC-DC Buck Converter
In my schematic, I have a DC-DC buck converter that takes in 5V and outputs 3.3V.
a. When I connect the 5V the DC-DC converter outputs 0.7V
b. When I remove the FL1 and replace it with a diode, the DC-DC outputs 3.3V
c. When the 5V source is removed, the input to DC-DC reads 0.7V
I am guessing there is a short circuit between the 3.3V and 5V ground plane. How do I narrow down the short circuit?
AI: Ferrite beads are not always good when placed on power rails.
The one you selected has an impedance of 1.5 kOhms at 100 MHz. This indicates that the inductance might be a bit higher and thus cause some problems such as ringing: Since the input is applied to the inductor L1 as a pulse train, the bead may ring during this switching.
If you have to use a ferrite bead before applying the switcher IC then use one with lower impedance and along with a suitable capacitor so that they form a low-pass filter.
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H: Plotting MOS resistances in transmission gates in spice
I am trying to plot the resistance of MOS transistors in transmission gates, as a function of output voltage in ltSpice, as shown in this figure from Jan.M.Rabey:
I have a circuit with same specifications and plotted DC sweep at input voltage V6. I have this graph:
Basically the output voltage follows input very closely so potential difference for NMOS is nearly zero for most of the time and I am unable to comprehend the resistance curve. Can anyone please explain this ambiguity .
Thanks
AI: Can anyone please explain this ambiguity
You have no load on the transmission gate output
Therefore no DC current passes through it
Therefore there is no volt drop caused by the resistance of the transmission gate
Therefore output voltage and input voltage in a DC plot will be almost identical (if not truly identical)
Is this enough to see where your mistake is?
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H: Low pass filter - cut off frequency
How do I find the cut off frequency of a low pass filter?
Consider the following part:
https://www.analog.com/media/en/technical-documentation/data-sheets/1062fd.pdf
Edit: I have attached the schematic. What is it's cut-off frequency?
AI: You have the internal clock selected: -
That internal oscillator frequency can be anywhere between 15 kHz and 65 kHz and \$f_C\$ is defined as the 3 dB cut-off frequency so, \$f_C\$ will be one hundred times lower i.e. between 150 Hz and 650 Hz as per this: -
However, this only applies when the input resistor (R187 in your diagram) is 25.78 kΩ. Your resistor is 6.8 kΩ and this might make the actual 3 dB point slightly offset from that mentioned above due to causing a slight peak in the passband.
And finally, you should note this (red box) in your schematic: -
It is probably unacceptable to not have a capacitor fitted here (DNP = do not place). Ideally, you should decide what clock frequency you need from the internal oscillator and set it up on pin 5 so that you can tweak the cut-off frequency. From the data sheet: -
The COSC, Pin 5, can be used with an external capacitor, COSC,
connected from Pin 5 to ground. If COSC is polarized it should be
connected from Pin 5 to the negative supply, Pin 3. COSC lowers the
internal oscillator frequency. If Pin 5 is floating, an internal 33pF
capacitor plus the external interpin capacitance set the oscillator
frequency around 140kHz with ±5V supply.
And this picture gives more information about making the internal clock adjustable AND defining what value \$C_{OSC}\$ should be: -
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H: Is it a bad practice to use capacitors to GND to prevent long traces from ringing?
Suppose, I have a long trace (e.g. 30 cm) that is driven from one end and that is carrying a DC or LF voltage (e.g. audio signal or power trace). The other end of the trace is high impedance compared to the trace's characteristic impedance: Either a high impedance device input, or it could be also a high impedance only at high frequency (e.g. series ferrite chip bead).
simulate this circuit – Schematic created using CircuitLab
Such traces can ring at the "open" end when that end receives interference e.g. from switching power supplies. The antenna effect can then cause EMI issues. Sometimes it's possible to relocate things, sometimes not. One remedy I have used is to bond the "open" end to GND using a capacitor of e.g. 100 pF. Or even with multiple caps along the length for long lines to also quench harmonics.
Now I have read somewhere on EESE (can't find the link right now) that this is a bad practice and a series resistor should be used with the capacitor. But doesn't a series resistor with the capacitor actually make the capacitor somewhat useless?
I can't really simulate this well with Spice and I don't have any field solvers, so I hope that people here may have some idea how to quench ringing in such lines properly?
AI: Connecting a capacitor to ground at the end of a line changes the far end from open circuit to short circuit at RF.
This will change how the line resonates, not stop it from resonating. If it's driven from a low impedance, then what were odd λ/4 resonances will become even multiples of λ/4, and vice versa if it's driven from a high impedance. This will shift the frequencies, and positions of anti-nodes, so may cure any existing problem that the line is causing. It may also cause new problems to happen that were there not before.
Putting a resistor in series with the capacitor, equal to the impedance of the line, terminates the line so stops it from resonating. This stops any magnification of possible EMI signals. An alternative is to place a series resistor at the driving end of the line.
Very difficult EMI problems might see you putting a resistor at each end, or segmenting the line into shorter, preferably unequal length, sections with ferrite beads.
Transmission lines, resistors and capacitors can be simulated very well in SPICE. I'm not sure whether there are any good models for ferrite beads available, perhaps somebody could link to some in comments if there are.
I had a specific problem in a synthesiser which was not EMI as such, but a power line between two otherwise isolated sections. For 'best' (as I thought) power trace filtering, I used a ferrite bead in series with the line which had a 1k maximum resistance. This was so close to an open circuit that, together with a shunt C at the other end, I got an odd λ/4 resonance which helped a 1GHz signal crawl from one area to the other along the power line. Changing the ferrite bead to one with 100Ω max resistance terminated the line, eliminated the magnification of the resonance, and restored the isolation I needed.
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H: What circuit symbol is this?
Can anyone tell me what this symbol is?
AI: It is shorthand notation for a PMOS Enhancement-Mode Device. Note that for this notation the PMOS has a circle on the input, like that of a digital logic’s notation where inversion is indicated with a circle. While a PMOS does not invert a signal, its operation is, in a way, inverted from that of an NMOS, whose notation does not include a circle on the input.
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H: Beginner seeking feedback on circuit design: SEPIC with adjustable voltage
I recently got very interested in electrical engineering. After watching a bunch of YouTube videos on circuit and PCB design, I figured it's finally the time to get a bit hands on. I decided to start by designing a relatively simple variable DC voltage supply, as I might actually use it in the near future.
Here are some design goals:
VIN can vary from 5V to 24V and the range VOUT can be set to is 1.5V-24V. VOUT can be either greater or smaller than VIN.
VOUT can be set programmatically via SPI from a micro controller.
I would like to keep the parts relatively cheap, so that if I accidentally blow up something it won't be too costly.
Below is the schematic:
Apologize if my schematic is not very professional. I'm very new to this. I would be really grateful if someone experienced can give some comments on circuit design and schematic drawing.
Here are some reasonings behind it:
I chose the XL6009, as it's the IC used by the buck-boost converter I already have, and it seems to support the desirable voltage range. Further it has internal compensation to make things simpler.
The inductor L1 and L2 are uncoupled, as coupled inductors are kind of difficult to find (or am I looking at the wrong places).
The value of L1 and L2 are adopted from this article.
The resisters of the voltage divider network are calculated following this article
I also have two specific questions:
What is the general process for rating the inductors and coupling capacitors for variable voltage SEPIC? All the guides I found (such as this) are for fixed voltage SEPICs.
How to dynamically limit the output current so that no component (especially L1, L2, C4 and XL6009) is fried under any possible VIN/VOUT combinations?
And finally, two meta questions (not sure if this is the right place, but I'll ask anyway. If inappropriate, feel free to ignore):
Is there any way to simulate the whole circuit (with ICs) so that I debug it without physically wiring it up?
Is there any dedicated places to get feedback on circuit design?
Thanks in advance!
Edit: managed to find some SEPIC design guide for XL60XX chips. Put it here in case anyone needs it: link (It's in Chinese, but the formulas are still pretty readable).
AI: Welcome to EE.SE!
Last year I did something very similar to your project, except it didn't require truly variable output voltage, but rather changeable to two different output levels. So the feedback network is conceptually simpler, just a resistor and a MOSFET. Like your project, it was a SEPIC topology.
However, I approached the design like this:
I used the LT3758 chip, which (as other commenters have noted) comes with a 38 page datasheet, including a layout example, and the chip can be simulated in LTspice
selected the components I intend to use, and wired up a simulation in LTspice
verified the resulting efficiency, power losses, and expected heating of the various components, and also verified I won't exceed their maximum ratings, at various input voltages
I was using coupled inductors, as this increases efficiency, and this was an important point for my project (it may be for yours, too - please consider it)
After the schematic was confirmed, then it came the very important step of laying it on a PCB, keeping close adherence to the Suggested Layout in the datasheet. You don't have much leeway there - just do what the people with dozens of years of experience of designing these circuits have to give you.
The manufactured prototype then came out just as expected, within the expectations for efficiency and thermal dissipation, and even better in some regards than the simulation suggested.
In conclusion, I'd not recommend trying to implement a complex design like this through trial and error. Simulate it first!
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H: Is it satisfactory for me to use the Clock speed to create a random 4-bit using a synchronous counter?
I want to implement a circuit that generates a random 4 bit using a synchronous counter.
Is it satisfactory to achieve a "somehow" random generator by using a parallel 4-bit counter with the help of the clock speed?
For example, a button is pressed within 5 seconds to display a random number. Within 5 seconds, my circuit have traversed the numbers 0 to 15 at least thousands of times before a state is chosen.
With the above circuit, it must be almost impossible for the user to predict the number since even the time spent on clicking another switch for the state to be chosen generates difficulty in prediction.
This is my first time building a physical circuit and I want to know if the above suggestion is bad since my intuition tells me that it is somehow unsafe for the circuit to count thousands of times in every seconds.
AI: You can indeed use a free-running counter for this purpose.
The randomness is generated by the length of time the user pushes the button, so if the clock rate is significantly faster than the users response time (let's say 10kHz+), then you should get a decent "random" number, with little ability for the user to predict (*).
my intuition tells me that it is somehow unsafe for the circuit to count thousands of times in every seconds
If you think about it, your computer is currently counting billions of times every second with no ill effect (well, I suppose it gets warm). Free-running counters are not unsafe so long as you consider the thermal requirements, which for a 4-bit counter running at a resonable speed (i.e low-MHz range or less as opposed to GHz), will likely be negligible.
(*) They could of course chop the button off and attach a signal generator to make an exact pulse width, thus losing all randomness, but I'm guessing that's out of scope of the question.
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H: Voltage Sensor - Differential output
How does this voltage sensor provide a differential output from a single input?
Data sheet: https://docs.broadcom.com/doc/AV02-3563EN
AI: According to the datasheet, the outputs have an offset of 1.23V, and the maximum voltage swing for each output is 2.46V:
Think of it like this: If one of the outputs is a 1.23Vpk sine then the output will hit 0 when the sine gets its minimum (i.e. negative peak).
With this, you don't need any negative supply voltage.
Looking at the input requirement, I can say that the chip accepts AC voltages with offset only (up to 2V w.r.t. GND1).
Regarding how it's done, well, we don't have any info about the internals but it can be done with two single-supply op amps (remember the virtual ground concept).
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H: Electrolytic capacitor failure mode
In a project we're working on, we had an electrolytic capacitor explode on us. It was a surface mount device, UCM1H470MCL1GS from Nichicon:
So far, we've seen our project run for many hundreds of hours without incident, so I'm fairly sure there is no fundamental error in the circuit causing these capacitors to be subject to over-voltage (they have a regulated 24v voltage across them).
However, our project does experience a lot of vibration and shock loading.
Question: Is it possible for vibration to cause a capacitor to fail short circuit, or in some other way that causes it to produce clouds of smoke?
The datasheet mentions the importance of careful handling, but doesn't seem to specify the failure modes in the case of mechanical abuse.
AI: our project does experience a lot of vibration and shock loading.
The data sheet for the Panasonic FN series (for example) has this to say (look at #9): -
Note that I'm referring to the Panasonic data sheet because the picture in the question was originally a Panasonic FN capacitor: -
But anyway, the Panasonic list above isn't specific to Panasonic - it's a fairly standard thing for all suppliers. But, Panasonic, to their credit (and I do rate their electrolytic capacitors) are explicit about problems you may encounter.
So, you can assume that the list above pretty much applies to all electrolytic capacitors having a wet electrolyte.
Question: Is it possible for vibration to cause a capacitor to fail
short circuit, or in some other way that causes it to produce clouds
of smoke?
Yes it is.
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H: What is the mistake in this combinational logic circuit diagram?
I am trying to represent the combinational logic circuit to perform 5x3 multiplier operation using 1-bit full adder using CSEDAR Simulator, the label is based on this operations:
My answer is as below, but the problem is that some operations work correctly like (11101 * 101) while others like (11001 * 111), can anyone tell me what's wrong with it?
AI: Each row of your multiplier always needs 5 adders and carry signals must never propagate between rows, they may only go from right to left within a row. Carry-in of the adder producing T3 should be connected to ground. Insert another adder in the "N5" trace; connect the carry-out from "M5+N4" to it (instead of to T3).
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H: What is the difference between large signal model/analysis and dc model/analysis?
I am studying microelectronics. I have studied about the DC analysis and the AC analysis. The DC analysis is just to find the operating point or the quiescent point and then the AC analysis is done. An AC analysis can be done in two ways for non-linear devices (like diodes and transistors): small signal AC analysis and large signal AC analysis. Small and large signal AC analysis are used in transistors amplifiers (transistors act as amplifiers in active region). I know that when we linearize the large signal model of non-linear devices, it becomes small signal signal model. But many books refer to the semiconductor device equations (like current equations or voltage equations), used to describe the behavior of the device at DC and to find the operating point, as large signal. These books refer to DC parameters such as VBE as large signal. Some sources say the term large-signal refers to the magnitude of the AC signal relative to the operating bias and in that case I think vbe (the ac signal) should be the large signal parameter.
This pdf is made by me and shows my effort in making sense of the large signal analysis and large signal parameters which are used interchangeably with dc analysis and dc parameters most of the time (I don't know why. Is it because both DC model and large signal AC model use the accurate non-linear equations for analysis and hence we have Large Signal DC Model and Large Signal AC Model?).
Based on my current understanding, I have come up with some points which are shown through the example of a diode in link below:
Google drive link
Please provide your valuable feedback.
Please let me know if I understand it right:
Large signal models do both ac and dc analysis.
Large signal models are also called dc models or large signal dc models.
Small signal models do only ac analysis after doing dc analysis separately (due to superposition due to linearity).
Large signals models are done mostly using simulation and referred to as transient analysis.
Small signal analysis is a specific case of large signal models at a specific operating point to assume linearity.
DC biasing circuits (done simultaneously with large signal models and done separately with small signal ac models[due to superposition]) are obtained from large signal models at zero frequency (neglecting effects of capacitors and inductors).
All DC parameters can be referred to as large signal parameters.
AI: Large signal models are also called dc models or large signal dc models.
Not always.
DC models neglect capacitance and inductance.
Therefore a large-signal AC model must have additional components that are not included in a DC model.
Large signals models are done mostly using simulation and referred to as transient analysis.
There are other kinds of large signal AC analysis besides transient. For example, harmonic balance analysis.
Small signal analysis is a specific case of large signal models at a specific operating point to assume linearity.
I wouldn't say it's a specific case of a large signal model. I'd say it's a reduction of a large signal model by neglecting non-linear effects. It's what physicists call a perturbation model.
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H: High capacitance C0G (NPO) capacitor
[EDIT] : modified the value of cutoff frequency to 4.8kHz after reading the answer of Andy aka.
[EDIT2] Added somme information regarding comments under the question.
I need to build a LC high-pass filter that cuts at 4.8kHz with a fixed L value of 2.5 µH. This filter is installed in a cryostat working at cryogenic temperatures (4 Kelvin) with as little electromagnetic noise as possible. I am working with SQUID detectors, which are ultra sensitive superconducting magnetometers.
Parameters of the problem :
Voltage rating : working in the µV range.
Current : 1µA or lower,DC to 100kHz
DC resistance : 0.01 to 0.1 Ohm
As the cutoff frequency is 1/(2 Pi sqrt(LC)), that means I need a capacitance of 440µF to make it work.
The thing is, at such such low temperatures most dielectric lose their capacitance. To my knowledge, the only dielectric that remains perfectly stable down to very low temperatures is C0G. PPS could also be an option, even if not perfectly stable. This fact is documented in this paper.
I've looked across Farnell, Radiospares, etc. and the highest C0G capacitor I could find has C = 0.47 µF , so I would need to wire a thousand of them in parallel which is not ideal. If I look at PPS capacitors the highest I could find is 22µF (ref : KEMET
SMR27.5226M50F13L4TRAY).
So my question is: do you know if it is doable to make a 400µF C0G (or if not possible PPS) capacitor? And if so, where to find it? I understand it would be extremely big, but this is not a big deal for me.
I know T or Pi high-pass filters could also be an option, but if possible I'd like to avoid adding additional inductance to my system for two reasons :
This system is an extremely sensitive magnetic antenna, adding inductors would require careful magnetic shielding.
Most magnetic materials lose their high permeability at ultra low temperatures. I'm sure I can design something with a bit of trial and error, it would require some more work.
AI: so I would need to wire a hundred of them in parallel which is not
ideal.
Wiring them by hand is not ideal. But it's not a huge problem for an SMT machine. There are plenty of places that will fabricate a 1-or-2-layer board and use their SMT machines to put hundreds of the same part on the board for very cheap.
Just doing a quick search on some vendor websites to find the cheapest NP0 capacitor in each size gives the following results.
Using some free software like KI-CAD to make a PCB design, and then sending it out to a board vendor to have them put on 468 x 0.94uF surface mount capacitors doesn't seem impractical. You might pay something like $1775 for the parts, and probably under $100 for the PCB (unless you need a special grade of material or something).
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H: Clock source of an STM32G030K6T6
I am currently designing a GPS tracker and have decided to go with an STM, choosing just STM32G030K6T6 (datasheet).
I currently have the following pinout configured:
My question is, since there is no OSC_OUT pin, am I not allowed to use an oscillator crystal? Or should I use OSC_EN as such?
Alternatively should I use a dedicated IC?
AI: On the package types without the OSC_OUT pin, you cannot use a high-speed crystal oscillator. You will have to use some other oscillator type (like active oscillator or internal), or some other package.
You cannot use the OSC_EN pin as OSC_OUT.
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H: Topology of a multiple feedback filter with differential input
While looking for a multiple feedback filter with differential inputs and single ended output I came across those two low-pass filter which are identical excepted for C2 capacitor.
Will the transfer function of those two design be equivalent? If not what will be the difference?
C2 to the ground
Proposed in application note AN48 by CRYSTAL
C2 combined
Found in a paper from TI : Using the infinite-gain, MFB filter topology in fully differential active filters
AI: Transfer functions are identical (at least as far as differential mode input is concerned), the and the second one has the nice feature that you ca treat it as a 'ground compensating' design in that the output of the filter is referenced to the R5/C3 junction.
To transform the first into the second you simply place the two C2s in the first version in series and remove the ground reference at the centre.
If your following stage is also balanced input then you can build something where 'ground' serves only to define common mode voltage, but where the signal path itself is insensitive to ground noise.
There is a possible slight trap in that for common mode noise, the first design attenuates due to the passive R1C2 pole, where the second one relies on the difference amp. This might matter in things like heavily noise shaped DSMs where there can be a lot of high frequency common mode present.
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H: Straighten schematic connections in Altium
I noticed that the wires in Altium are not straight. Is there a way to ensure that they stay straight?
AI: Use a grid spacing of 2.54 mm (100 mil) in Altium schematic editor.
In the bottom left corner of Altium, you can see the current grid size:
In the properties inspector, you can change it by setting Visible Grid, Snap Grid, and Snap Distance. I find that the following settings work well for my usage:
Of course, this comes down to your preference, but there are some reasons to use this value.
Once you've changed the grid, you can align objects to the new grid setting by selecting them and then selecting Align > Align to Grid (Shift+Control+D).
More information from Altium here: Defining Schematic Grid Preferences
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H: Does Alternator Self-Excitation Require Rectification?
I am learning about self-excitation in alternators.
My understanding is that there is residual magnetism in the rotor. As it spins, this generates a current in a stator which is then fed to the (rotating) field coils to increase the strength of the magnetic field, and thus the output voltage.
If the current fed to the field coils were constant, (I think) we would be done. The constant current through the field coils would generate a constant magnetic flux relative to the position/orientation of the coils. Since the field coils are rotating, the magnetic field is rotating relative to the stator. This induces a current in the stator.
However, if the output of the stator due to residual magnetism is fed into the field coils (as during build up), won't the field coils thus be fed an alternating current? Won't this imply that the field coils generate a magnetic field that alternates with respect to the position/orientation of the coils? Won't that imply that imply that the magnetic field "pulses" but does not "rotate" relative to the stator?
If I have correctly identified this "problem," is the solution some form of AC->DC conversion?
AI: All simple alternators with wound rotors (such as on cars). Do rectify the output of the stator to provide the field current.
The exact arrangement may vary but a common arrangement is shown below.
The AC output from the rotor is rectified to feed the field coils through slip-rings. A regulator reduces the current to the field winding when the battery reaches the intended regulation voltage.
At start-up the residual magnetism helps start the process of producing power.
There are a couple of interesting points.
There is a separate high-current rectifier to supply the power to the battery and the vehicle. This avoids power from the battery being needlessly used to drive the field when the alternator is stopped.
The current through dashboard lamp helps in the process of start-up as provides a small amount of current through the field to add to the residual magnetism. If the dashboard lamp fails the engine may need to be revved up much higher than normal to start-up the self-excitation.
Image credit - Pinterest - Carparts.com
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H: Adding a DC Power Adapter Socket to Sony AM/FM Radio
A friend has asked me to do a mod on their basic Sony AM/FM Radio (Model ICF306). It's 3V based but only accepts batteries. I thought about opening it up and soldering a 5.5mm Socket across the +/- battery terminals, but then figured this was probably not a good idea. If the batteries were present then you'd have the battery and the DC adapter in parallel. What's the best way to workaround this. Perhaps a Single Throw Double Pole switch (so you can either manually select battery or DC adapter pack sources) ?
AI: Most barrel jacks have a switch for just this purpose.
Typically you will put the switch in the negative side if the adapter is center-positive. You only need to disconnect the battery on one side when the adapter is plugged in.
See also this answer- image from there-
Pin 3 will go to the battery (-) and will be disconnected when the plug is inserted (assuming center positive).
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H: A coil of inductance 0.50 H and resistance 100Ω is connected to a 240 V, 50 Hz ac supply. What exactly is 240V here?
As far as I've understood, doesn't 240V represent Vm here? We solved questions in class like these (but in those it was inductance only) and there we took Vm one as the one given with the frequency.
But when I was browsing the web, it another website showed Vm as √2*240 ??
Which one am I getting confused in? What is the correct one?
AI: We have to have rules and, some rules tell us what numbers mean in the absence of overriding information. So, if all we know is a voltage value, then the default assumption is either DC voltage or RMS AC voltage.
So, in cases where only a voltage value is stated and, there is no other context, we cannot be sure whether the number represents alternating or direct quantities. But that doesn't matter because, the heat produced by (say) 100 volts DC when applied to a fixed value resistor, is the same heat produced by the same resistor when fed with 100 volts AC RMS.
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H: 12V battery back-up system using a relay
simulate this circuit – Schematic created using CircuitLab
I am trying to use a 12V battery as a back up power source. I made this circuit but it doesn't work properly.
When the adapter is off the device (shown as a lamp) works on battery no problem, but when I plug in the wall adapter power goes off on the output and the relay switches and gets stuck to the adapter side until I disconnect the battery and then it switches back.
What could be the problem?
AI: Your circuit should work.
It appears that you have wrongly wired the relay contacts as shown below.
Please cross-check and rewire.
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H: AND gate working in Multisim circuit but not AND IC 7408
I am a newbie in electronics. I was trying to replicate this traffic control diagram:
I recreated the circuit in Multisim using 2 clocks and an AND gate, the 3 LEDs light up:
If I replace the AND gate with a 7408 IC, the green LED does not light up anymore and I am not sure why.
I put the 2 inputs and 1 output wire according to its pin diagram and I connected the VCC and ground.
I can't figure out why the green LED won't light up.
AI: Forget about the 7408 and...
Ask yourself what the reset pin on the D type flip flop does when it is set high: -
Fix the basic circuit first.
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H: What is the best way to get several serial digital \$n\$ bits while adding them?
I need to design a digital circuit that gets incoming \$n\$ parallel inputs, add each incoming n bits, and each sum is placed in an \$n\$ flip-flops, overriding what is previously stored on the flip-flops.
In summary, the circuit solves the difference equation:
$$
Y_{\text{present state of N FFlops in decimal}}(x)= Y(x-1)+X_{\text{arbitrary input in decimal}}
$$
My plan is to create a feedback path from the storage flip-flops to the adder as shown below
My input is a parallel n-bit input that will be fed into the input 1 terminal of the parallel adder. The output of the adder is also parallel and will be fed into the D flip-flops for storage. The stored data in the FFlops will be fed back to the the adder so that it can be added again to the next arbitrary input.
Is this design acceptable?
Edit:
Andy aka's comment below solved my question and pointed out that this is a numerical integrator and the clock speed must be clocked slowly, which I think must be sufficient for the interval of the incoming inputs.
AI: Is this design acceptable?
It's called a numerical integrator and, for your design, it needs to be clocked slowly so that it doesn't integrate at Max rate and give useless cycling modulus numbers at the output. It needs to be clocked: -
In summary, the circuit solves the difference equation:
\$Y_{\text{present state of N FFlops in decimal}}(x)=Y(x−1)+X_{\text{arbitrary input in decimal}}\$
Then the time difference between Y(x) appearing after Y(x-1) appeared needs to be the clock period.
You might also choose to have a hold facility and a count reset facility.
Andy aka's comment below solved my question and pointed out that this
is a numerical integrator and the clock speed must be clocked slowly,
which I think must be sufficient for the interval of the incoming
inputs.
I've added a couple more things.
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H: How to determine the Rds(on) from a MOSFET datasheet
I want to know the RDS(on) of this MOSFET when VGS = 3.5 V, and ID = 5 A .
As you can see, the graph stops at 2.5 A.
data sheet link:
https://pdf1.alldatasheet.com/datasheet-pdf/view/555356/STMICROELECTRONICS/VNP20N07FI.html
AI: I want to know the RDS(on) of this MOSFET when VGS = 3.5 V, and ID = 5
A
Try this graph: -
My estimate of a typical \$R_{DS}\$ is 0.4 volts / 5 amps = 80 mΩ. The true spread of values for a large sample could be anywhere from 40 mΩ to over 160 mΩ with a \$V_{GS}\$ of only 3.5 volts.
It's very approximate (and no matter how you try with MOSFETs, they are not that predictable so if you expect precise definitive values then you will be disappointed).
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H: P-Channel MOSFET power selector question
I've seen this circuit used in several ESP32 designs (e.g. the Sparkfun ESP32 Thing) and in an answer on this site that allows a device to be powered by either 5V from a USB connection or a battery. V_OUT shown in the schematic usually goes to an LDO to convert 5V to 3.3V.
I'm clear on what happens when just the USB is connected: power goes from VBUS through D1 and out V_OUT. The p-channel MOSFET M1 is open.
When USB is not connected and a battery is, the 10K pulldown resistor pulls the MOSFET gate to 0V, and current flows from V_BATT through the MOSFET's body diode which causes the voltage at V_OUT to be higher than the gate, so the MOSFET channel closes and conducts (I hope this is the correct interpretation of events, please correct me if I'm wrong).
What I don't understand is what happens when both the USB and V_BATT are connected simultaneously. I expect the gate voltage to be high enough that the MOSFET channel doesn't conduct, but I also expect some current to flow through the body diode from drain to source. Is this what happens? Is this in some way bad or harmful to the circuit?
If I wanted to create a circuit to switch between one or the other supply exclusively, but prefer the supply tied to the gate (i.e. VBUS), is a p-channel enhancement mode MOSFET the correct part to use?
simulate this circuit – Schematic created using CircuitLab
AI: At V_OUT, you have two voltages join through two diodes. VBUS from USB through the diode after losing voltage on the said diode, and V_BATT through the body diode. The one with the higher voltage at that point will power the system, the other one will have no current. At the same time, even if VBUS from USB is higher, it will not go into V_BATT, because you need certain Vgs on the MOSFET, and gate and source of the MOSFET will be around equal (5V on gate and same-5V-minus-Vdiodedrop on source).
So the higher voltage that arrives to V_OUT will power the thing, while the other source will have no current pulled from it, because you can't have current from lower voltage to higher.
I take it D1 is schottky diode for lower voltage drop (~0.4V) and MOSFET's body diode will have some drop specified in the datasheet, could very well be higher than that. If that's the case, then VBUS will go to V_OUT, but it will be stopped from going into V_BATT by the closed (non-conducting, I mean, this word is very confusing when talking about mosfets) MOSFET, whose Vgs won't be enough to make it conduct (Vgs will be -Vd1drop).
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H: How can this circuit oscillate at a VHF frequency?
I am practicing RF. I have looked at an FM transmitter circuit in a video.
I went on to analyse it.
When the analysis got to the tank resonant circuit, I could not get it.
This parallel LC circuit is a bandstop circuit. This means it will increase the impedance when the frequency of the signal is like the resonant frequency and will decrease the impedance when the frequency of the signal is something unlike the resonant frequency.
Further, this inductor has 4 turns, a 0.01 m cross-section, and 8 mm length, which means, accordingly to the formula
L = (N²*u*A/l)
that this inductor has a value of:
L = (4²*(1.26*10^-6)*pi*0.01²)/0.008
Which gives us something around 800nH. So, using the formula
f = 1/(2*pi*sqrt(LC))
we discover that the resonance frequency of the tank will be around 80 MHz to 110 MHz, which is the FM band.
Putting these calculations aside, I don't know how this circuit will oscillate in the FM band because the input signal will oscillate only in the frequency of audible sound (20 Hz to 20 kHz) and the LC circuit is just and nothing more than a pass-band circuit.
Is this LC circuit capable of oscillating at a high FM frequency?
And what is the purpose of the transistor? Just amplifying the signal?
AI: I don't know how this circuit will oscillate in the FM band because
the input signal will oscillate only in the frequency of audible sound
(20 Hz to 20 kHz) and the LC circuit is just and nothing more than a
pass-band circuit.
It's a fairly standard Colpitts oscillator. Specifically a common-base Colpitts oscillator so, maybe use that term and, google it to get to grips with how it works.
Here's a link to an ADI article that should help. You even get details of how to build it. However, this build information is only good for a few MHz and not 90 MHz (especially not on breadboard).
There is a minor variation between this and your circuit. It's how the emitter gets "tickled" from the collector. It's trivial really (if you did the math).
But here's the important thing - it's positive feedback from collector to emitter that causes it to self oscillate (and not the presence of an audio signal on the base).
The audio signal does have an effect though; it causes the BJTs internal miller capacitance (a parasite) to be modulated in a way that "follows" the audio waveform and, this in turn, modulates the carrier frequency and produces an FM signal.
Is this LC circuit capable of oscillating at a high FM frequency?
It's fine at FM broadcast frequencies but runs out of steam a little before UHF where, preference is given to the common-collector Colpitts oscillator~: -
Image from this Q and A entitled Differences between Colpitts oscillator circuit designs.
And what is the purpose of the transistor? Just amplifying the signal?
No, it doesn't amplify audio; it's a fundamental part of the oscillator circuit.
Link to my crappy website for a tear down on the common emitter Colpitts oscillator: -
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H: Why does the comparator burn in this oscillator circuit?
I have the following circuit:
Power filtering:
The 330 μH chip inductor has about 10 Ω series resistance. I scoped the powerup to 5 V and the overshoot even with no load was minimal (maybe 300 mV).
Oscillator circuit:
There is nothing else on the board (unpopulated)
Layout:
My problem:
The LMV7239 instantly burns and clamps the supply DVDD to 1 diode drop above DGND.
I was initially supplying a regulated 5 V to VIN from a lab power supply.
I removed the LMV and checked all nodes and they bias correctly as you would expect if U7 is not populated. In particular, I could measure the full DVDD, so there is no other path to DGND.
I re-placed a new U7 and slowly increased the supply voltage at VIN, starting from 0V. Everything looked alright until about 0.8V. Then, again the chip died clamping DVDD to ~0.7 V.
I removed the LMV again. And placed a 27 Ω resistor in series with VIN to be absolutely sure that there are no sub-µs voltage spikes from the bench power supply. I also scoped the supply and I couldnt see anything unusual apart from the 10s of mV of switching noise. I tried to power up the circuit again and the LMV died again instantly.
I also tried to attach the power supply to an unsoldered LMV7239 chip with tips, but it also died. However, it is possible that I slipped from the positive supply (2) to the IN+ pin (3) or the output pin (1). Still wouldn't expect it to burn due to this.
I have used this bench power supply for tests in the past and never faced problems.
My question:
Is there anything obviously wrong I am missing?
AI: Based on your layout and text description, the pinout does not match the datasheet.
The positive and negative supply pins are swapped.
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H: Discrepancy when using .step command in LT Spice
I have a transistor circuit where I wish to determine the transistor dimensions W and L, such that \$V_{out} = 1.5\text{V} \$
I have defined W and L for the two NMOS transistors. I have set L = 1u in the PMOS transistors and then I am sweeping through W to find a suitable value, such that \$V_{out}=1.5\text{V} \$. This seems to happen at \$W_p = 1.44\mu \text{m} \$ and is shown in the upper draft file.
In the second LT Spice draft I set \$W_p= 1.44\mu \text{m}\$ for the PMOS transistors and run an transient simulation to make sure I get the right thing. Which I don't. As can be seen, \$V_{out}= 855\text{mV} \$, but didn't I just see from my paramter sweep that I should get 1.5V for the output voltage?
Why do I get different results when I sweep the \$W_p \$-value, and when I perform a transient (or dc operating point) simulation?
AI: You are using a 0.1u step, so that line that you see in the upper graph is misleading because it's just alinear interpolation from 1.4u to 1.5u. That .TRAN result of 0.855 is right between the two values. Try a finer grain, and reduce the ends, e.g. .step param wp 1.5u 1.6u 0.01u. When in doubt, R-Click in the waveform window and select View > Mark Data Points (if there aren't too many, which will result in a slow update). I'd also consider not using .TRAN for verification (you can see that there are numeric artefacts causing the output to not be a straight line, even if only just), instead, use .OP.
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H: Murata simsurfing: what is the green line
I was checking murata simsurfing, and I saw there is a green line next to the blue on for the capacitor graph:
The green line on the Resistance-Frequency is also constant, very different from the blue line.
I cannot understand what it represents. The green graph gives me an C, an L and a R, which are constant, not frequency-dependent, so I don't understand what they represent:
=============EDIT==============
I managed to (partially) figure it out. there is this option on the top left, it switches between simple and precise graph:
But still, what are the C,L,R on the bottom?
AI: The green line is an RLC circuit model for the part. If you were doing some (spice, etc) modeling you might put those parameters into your model. As you can see from the impedance plot, it is relatively close to the measured data and thus a reasonable approximation that would avoid having to enter the entire table of measured values.
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H: Are there any resources on Column Last Attach Process?
I am trying to find resources about this process, but the only thing I have been able to find is the full form of the acronym CLAP any help is appreciated.
This process is used vehemently in the design of BGA chips and attaching the BGA to the chip, but no comprehensive information is provided for this right now, all help is greatly appreciated.
AI: Actually, the acronym I've seen is CLASP, to keep the weekly status reports safe for work. :-)
Not sure what you're looking for...couldn't find anything like a tutorial, although there's an overview here:
https://www.micross.com/wp-content/uploads/2020/03/Micross_CGA_2018_11_Rev1.3-compressed.pdf
More detail here, but these are pretty meaty.
https://epdf.pub/solder-joint-reliability-prediction-for-multiple-environments.html
https://www.circuitinsight.com/pdf/ccga_solder_column_attachment_smta.pdf
https://www.researchgate.net/publication/325541643_CCGA_-_SOLDER_COLUMN_ATTACHMENT_FOR_ABSORBING_LARGE_CTE_MISMATCH/download
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H: Why is there a Schottky diode connected to the low-side switch
I am trying to understand the reason for having a Schottky diode for protection in a buck switch by reading here.
To summarize, I can understand why two the switches should not be turned on at the same time, and I also can understand why there is a dead time (when both switches are off).
However, I can not understand what can go wrong when both switches are off (if there is no diode). Why is this diode helpful? Thank you.
AI: When switch S1 has been on for a while, a current will have flown through inductor L1, this charges L1. L1 will contain some energy in the form of magnetic flux.
As soon as S1 switches off, but S2 is not on yet, L1 will want that current to continue flowing as inductors resist change in current flow (compare that to a capacitor resisting a voltage change).
If the Schottky diode was not present then the current through the inductor will start to flow through the diode in parallel with S2. Realize that both S1 and S2 are still off.
That diode in parallel with S2 is a Body diode which is part of the MOSFET. Such a body diode is generally not designed to be used like this, I mean, not designed to conduct that current through the inductor. It often can actually be used like that but for many MOSFETs, the properties and limits of that diode are not mentioned in the datasheet so in that case, there is no guarantee. Also, such a body diode is usually not fast enough and since it is a silicon diode, it will drop up to 1 V when the current flows. This wastes energy.
By adding the Schottky diode, the current will flow through the Schottky diode as it has a lower forward voltage (often less than 0.5 V). This takes the strain of the diode inside S2. Also Schottky diodes are generally much faster than body diodes inside a MOSFET. That high speed switching also saves some energy.
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H: How to locate timer channels for this uC board?
I'm trying to visualize and point on diagram where timer channels at this datasheet.
STM32 uses the term channels. I guess what mean by timer channels are timer outputs. What is meant by channel?
Can someone show an example for this board for ChannelX of TimerX on the manual or datasheet?
AI: A timer has a counter running off a clock (which may go through a pre-divider first).
A channel for that timer is centered around a register containing a compare output or capture input value for use with that counter. There may be more than one channel for a timer/counter.
The input pin for the capture input or the output pin for the compare output (depending on what mode you are running) can be connected to a number of pre-defined pins using the IO configuration registers to set alternate functions.
The STM32 User Reference Manual is much more enlightening than the datasheet. That's the one what tells you how to actually use the devices in a product family. It tells you how the peripherals work and what registers you need to configure. The STM32 datasheets, for the most part, are only useful for information that is not common to the MCU family such as the pinouts for a specific package that an MCU comes in.
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H: Does USB have some kind of current cutter that cuts the current for safety?
I accidentally got 24V into the GND on my Arduino and then the USB shut off - but not all of them. When I restarted my computer, then all USB shut off and they are not giving out any current. Notice that the GND of the 24V power source was connected with the GND of the USB. They have the same voltage potential.
This issue had happen be before and then I fixed it by upgrading the BIOS in my computer.
Now I'm facing the same issue again with the latest BIOS software.
Can the BIOS lock the USB current or what makes the USB current go off if the USB got a high voltage peak?
AI: Sounds like the sort of thing that might require a new motherboard. modern USB ports may be tolerant of overloads, but externally applied voltage is another matter.
This is why I use a USB isolator when fiddling around with such things. Better to wreck a $50 isolator than an expensive motherboard.
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H: Given total impedance find impedances for parallel RC
How do you find impedances for parallel RC circuit given a total impedance?
More specifically, given this RC parallel combination:
$$Z = R\ ||\ \frac{1}{j\omega C} = \frac{R}{(1 + j\omega RC)}$$
And total impedance:
$$Z = 5.993 - j1.356\ M\Omega$$
How do you end up with these solutions for \$R\$ and \$C\$?
$$R = \frac{\Re(Z)^2 + \Im(Z)^2}{\Re(Z)} = \frac{5.993^2 + 1.356^2}{5.993} = 6.3\text{ M}\Omega$$
$$C = \frac{\Im(Z)^2}{\omega[\Re(Z)^2 + \Im(Z)^2]} = \frac{1.356}{ 2\pi f(5.993^2 + 1.356^2)} = 2.85\mu\text{F}\ \ (f=2kHz)$$
I don't understand transition in between those statements.
AI: It's fairly simple complex number algebra.
Let \$x = Real[Z_x]\$
and \$y = Imag[Z_x]\$
then \$x+jy = R/(1+j\omega RC)\$
multiply through by \$(1+jwRC)\$
\$x+jy+jx\omega RC-\omega yRC=R\$
Then collect real and imaginary parts
\$x-\omega yRC-R=0 - (1)\$
and dividing by j
\$y+x\omega RC=0 - (2)\$
Hence from (1)
\$R=x/(\omega yC-1) - (3)\$
and substituting this in (2) gives
\$y + x^2\omega C/(\omega yC-1)=0\$
Multiplying by \$(\omega yC-1)\$
\$\omega y^2C-y+x^2\omega C=0\$
And hence \$C=y/w(x^2+y^2)\$
Substituting C back into (3) gives
\$R=x/(\omega y.y/\omega (x^2+y^2)-1)\$
Which simplifies to \$R=(x^2+y^2)/x\$
QED.
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H: new battery, full charged capacity less than designed capacity and wear level at least 7% after drain empty
I just installed a new OEM battery to my Surface Pro 4.
The 1st-round test result is like this:
The 2nd-round test result:
The 3rd-round test result:
The 4th-round test result:
If I charge it to full. The Full Charged Capacity will be bigger than the Designed Capacity and the Wear Level will be 0.0%. It will keep the same states/numbers during the entire discharging period.
But if I discharge it to empty, The Full Charged Capacity will be less than the Designed Capacity and the Wear Level will not be 0.0%, as shown above. It will keep the same states/numbers during the entire charging period until it is full.
Is this normal? The battery is good or bad?
AI: Battery is achieving 93% of 'design' capacity. That's fine.
To reduce battery wear and degradation for longer lifespan, don't charge above 80% or let it go below 20%.
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H: ESP32-C3 difference between embedded and external flash
We are planning to add WiFi and BLE5 capabilities to our hardware and have narrowed down the module choices to ESP32_C3_MINI_1U and ESP32_C3_WROOM_02U. Unfortunately I lack any hands-on experience with ESP modules to make a final decision.
The only two differences between them seem to be packaging and flash, with MINI having it embedded into SoC and WROOM using in-module SPI chip. I'd prefer to use castellated WROOM package as easier for prototyping and PCB routing, however I am worried about performance difference when using external flash.
It is interesting that Technical reference does not mention embedded flash in its "internal memory" section at all. All the references to flash are made in a context of external SPI memory.
Furthermore, the pinout in C3 datasheet has this note:
Ports of embedded flash correspond to pins of ESP32-C3FN4 and ESP32-C3FH4 as follows ... These pins are not recommended for other uses.
I think this means that the "embedded" flash is just a generic SPI flash die slapped onto SoC silicon and connected to SPI lines, which otherwise would be used by external chip. If this is the case then there should not be any real differences between the two.
Questions:
Is there any performance difference between the chips with embedded and external flash?
Is there any code difference, i.e. is code portable and do developers even care about this?
AI: I think this means that the "embedded" flash is just a generic SPI flash die slapped onto SoC silicon and connected to SPI lines, which otherwise would be used by external chip. If this is the case then there should not be any real differences between the two.
This is the correct assumption. ESP32-C3-MINI-1(U) module features ESP32-C3F[HN]4 SoC integrated on a module, which differs from casual ESP32-C3 SoC (found on ESP32-C3-WROOM-02 module) by more integrated peripherals.
If you take a look at part 2 of the datasheet for MINI modules it explains the difference and you can see that the on-die flash memory are still connected on the SPI bus:
As opposed to ESP32-C3-WROOM-02 datasheet:
You can see even this one uses Quad SPI (QSPI) lines for the SPI flash so there shouldn't be any difference on the flash memory speed. Only difference are in the module sizes and integration levels. This answers your first question.
As for the second - it's a no too. There is no difference between code. ESP32 provides SDK called IDF. Code generated for ESP32-C3 or ESP32-C3-F[HN]4 will be the same as it features the same RISC-V core and peripherals.
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H: Inverter voltage conversion
I have a 24 Vdc battery that I have connected to an inverter to. Using the Vrms to Vac equation (i.e. multiplying by sqrt(2)) I would find the peak value of the Vac. So it would be 34.0 Vac. My question is that if I could make that Vac value lower instead of being 34.0 Vac by the inverter. I am looking to convert 24 Vdc to 24 Vac. Is that possible?
AI: By convention, unless otherwise indicated, 34 Vac means the RMS voltage of the AC voltage is 34 V or simply 34 Vrms. If you mean the peak value of the AC voltage then you should say 34 Vpk because the peak is not an AC (i.e. peak does not change with time -- it's an instantaneous value).
So,
I am looking to convert 24Vdc to 24Vac.
You already have 24 Vac, and its peak value is 34V.
If you want to have a 24Vpk / 17Vrms AC voltage then the easiest way, assuming the voltage is a 50- or 60-Hz-sine and replacing the entire inverter is not an option, is to use a step-down transformer with a turn ratio of 17 / 24 = 0.71.
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H: What kind of protection does a circuit need to have for reading the output of a CT?
A CT (current transformer) is installed to measure the line current for digital measurement and protection devices. In many cases, the CT is installed in open weather or on poles, making it vulnerable to lightning.
The voltage across the burden resistor of the CT is amplified and measured through a microcontroller to decide what to do. But this simple circuit doesn't have any protection. If somehow the insulation fails or there is lightning, there is a high possibility that the circuit will be damaged.
What kind of protection needs to be used on the PCB to increase safety? The maximum CT current in normal condition for my application will be 100 mA. Primary voltage is 220 V RMS AC distribution line.
AI: the CT is installed in open weather or on poles, making it vulnerable
to lightning.
Nothing is going to save the CT from a direct lightning strike.
What kind of protection needs to be used in the PCB to increase
safety?
Define the threat numerically
There are worldwide standards that can be used for estimating the effects of indirect lightning strikes (namely EN61000-4-5) but, they won't necessarily cover a direct strike. Direct lightning strikes create a bit of a wasteland so, maybe they are a little beyond the scope of most requirements. Hence...
Define the threat voltage,
Define the threat source impedance and
Define the threat waveform profile
That's how engineers do it AND, EN61000-4-5 is actually quite helpful. In fact, it's so helpful that I designed a fairly beefy TVS in a simulator and it passed the real test without smoke or tears or bed-wetting.
It becomes a fairly simple theoretical exercise to design protection once it's defined. Of course it'll need testing but, there's no point blindly guessing what might be needed and then failing some moderately expensive surge testing at a test house. Do the right thing first and give yourself the best chance of success.
Define the victim
But of course you also need to define at what level a current or voltage surge might start to create problems for your victim circuit. I can't tell you what that is; you need to define that and then, a proper analysis can be done.
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H: LT3966 LED driver design
I have 2 strings of LED which have 6 LEDs in series. Initially, I considered using one CC boost module and a matrix dimmer, or a single driver with multichannel load switches to control the strings individually but after much searching up I found LT3966 and started the schematic design around it.
The Vin would range from 5 to 12 V.
But I have a few doubts regarding this design.
Consider an LED string consisting of 6 LEDs in series, and the typical VF of the LED is 2.75 V and the VF max is 3.5 V. The LED forward current is IF = 1000 mA for the entire string consisting of 6 LEDs.
Based on these parameters I have calculated the values of the following components:
RISP - (0.25 V / 1 A) = 0.25 ohm
For FB resistors I chose (VFmax*No of LEDs) i.e. (3.5 * 6) = 21 V and used this to get R1 = 10k, R2 = 600.
RT resistor is 47.5k for 2 MHz switching frequency
LBoost >= 4.23 uH so I chose 6.8 uH
Cout 4.7 uF 50 V 1206
Inductor Part No BWVS005050406R8M00,
PMOS Part No SI7309DN-T1-E3,
Diode Part No PMEG6020ER_115
My concern is if the required voltage is around 21 V and 1 A through the string and I calculate the discrete value of the components based on the datasheet; however, based on the TI App note, if the switching current is higher than the internal FETs switching current limit of 2.4 A then the LT3966 IC will be not relevant even though I chose an appropriately rated inductor, a diode which are external to the IC. Is my concern valid?
Image of the Excel sheet calculation based on TI's app note attached, the ILIM(min) = minimum value of the current limit of the integrated switch (given in the datasheet) was 1.6 A for LT3966 integrated switch, which can be found on page 4.
TI's App Note on Boost Converters Design Calculation
Useful Post
AI: Yes your concern is valid.
If your input voltage is at its lowest value of 5 V, and your LEDs are all at their highest requirement so you need 21 V, you have a ratio of 4.2.
That means even a perfectly efficient boost converter would draw 4.2 A on the input side (and through the switch) to get the voltage and current of 21 V / 1 A on the output.
With that you are out of specification of your chip and it won't work. Note that you should consider the min value of 1.6 A if you are looking at the worst possible outcome.
The chip has a 4 channel design, so you could split the series in two parts of 3 LEDs each. But your schematic looks like the LEDs are integrated into one housing.
Or make your design a fixed 12 V input design, that will reduce the current down to 1.75 A - with the LEDs unlikely being all at 3.5 V it's probably good enough.
Or switch to a different device. At these current levels you might have better luck with drivers with external MOSFET.
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