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H: Current through each resistor
I'm solving this high-school level problem, where I have to find the current through each resistor.
simulate this circuit – Schematic created using CircuitLab
There aren't any resistors in parallel or series, which could be combined, so I tried using Kirchoff's law for junctions and loops. The resulting system of linear equations doesn't have any solution according to Mathematica. \$I_0\$ is the current through the source, \$I_{15}\$ is an auxiliary current through the empty wire in the middle of the circuit. My resulting system of linear equations:
My questions are:
Is my approach to this problem right? Maybe I chose wrong loops. Is there any rule for which loops I should choose?
There are 16 unknown currents, I have 10 junction equations. Does it
mean I have to create at least 6 loops, to find all the unknowns?
If my approach is wrong, what is the first step or direction I should use to solve this problem?
EDIT: There are a few mistakes in the equations:
equation 3 is \$I_3=I_5+I_7\$
equation 15 and 16 don't include \$I_{15}\$ (there is no voltage change over the wire without any resistor)
With these changes, the system can be solved by satisfying \$\mathbf{A}^\intercal \mathbf{A}\vec{x}=\mathbf{A}^\intercal\vec{b}\$. However, the accepted answer shows a much better approach to this problem (the results are the same).
AI: Extending Olin's answer for those that want to see how much of a difference the art makes.
simulate this circuit – Schematic created using CircuitLab
Once you see it that way it's pretty easy to tell, or should be, what voltage those nodes in the middle are at. After that it's simple Ohm's Law stuff.
You should also be able to see that the nodes I marked as \$VT\$ have the same voltage, as do those I marked with \$VB\$.
Since there is no voltage across \$R6\$ and \$R9\$,
\$I6 = I9 = 0A\$.
Because of that, \$R6\$ and \$R9\$ can be considered as shorts, so \$R4\$ is effectively in parallel with \$R2\$ (\$R24 = 50R\$). Which means \$VT\$ is \$50/150\$ or \$1/3\$ of \$12.5V\$ above the mid-point, that is,
\$VT = 12.5 + 12.5/3 = 16.667V\$
Similarly \$R8\$ is effectively in parallel with \$R10\$, making
\$VB = 2/3 * 12.5V = 8.333V\$.
So,
\$I1 = I3 = I12 = I14 = 8.333/100 = 83.33mA\$
\$I2 = I4 = I5 = I7 = I8 = I13 = I11 = I10 = I1/2 = 41.667mA\$
\$Io = I1 + I2 = 166.67mA\$
The puzzle is actually delightful in it's symmetry. Of course this only falls out like this because all the resistor values are identical. Had they not been, your original method, or some other analysis method, would be required. |
H: Why do we assign our outputs to signals first in VHDL?
I saw in many VHDL codes that data/control outputs are first assigned to signals and then to output ports, and not instantly to the output ports.
I'll give an example:
entity ex is
port (clk, rst : in std_logic;
....
data_out : out std_logic);
end entity;
Architecture ex of ex is
signal data_out_sig : std_logic;
Begin
process(clk,rst)
begin
....
data_out_sig <= some_data;
....
end process;
data_out <= data_out_sig;
End Architecture;
My question is, why do we not assign some_data instantly to the data_out port? Why does it "have to go through" the signal data_out_sig?
Does this have anything to do with synthesis? Is it common practice?
Thanks!
AI: I will tell you a scenario. Suppose you are creating an entity with
2 input ports : A,B
2 output ports : C,D
Suppose the output C is generated from A and B using some logic. And Suppose D is found to be directly related with C. For example:
D = compliment of C
So it is compelling to write in the code: D = not C directly, instead of using a logic expression with and A and B. However VHDL semantics don't allow you to read the output port C and hence you cannot implement such an expression. So what you can do is turn that port into a buffer port. Some people also make use in/out port for this purpose. But that makes thing complex. So a simple solution is to use some local internal signal C_int, and "use" it like the output port inside your code. So that you can implement the logic for C into this internal signal, read it and manipulate with it. Finally assigning this internal signal to the output port, outside all the process blocks, completes the requirement. An example illustration of what is happening inside the circuit: |
H: Sallen-Key low pass filter cutoff frequency
How do I calculate the cutoff frequency and the gain of a second order sallen key low pass filter? For example if I want to have a cutoff 35KHz what would be the values of the two resistances and the two capacitors
Using R1=R2=4700 as it was suggested
As you can see with those values , I have succeeded in creating the low pass filter I want , but the cutoff frequency is very high (I needed 35kHz, the graph is voltage to frequency) . What should I change?
AI: Here's an example run from LTSpice for a very simple unity gain, equal component value Sallen Key filter.
The values used are common values rather than exact values to hit your frequency precisely. But they get close.
Looks about right to me.
Here's the chart done differently:
That may also help you.
The reason why the -6 dB point is selected as the "cross-over" has a lot of context. I'm neither competent to explain it fully nor do I have the time to try. I know a few things, is all.
But I can summarize the basics:
It's convention and people will understand you better if you use terms they know in the way they know them.
If you look at the first graphic I posted here (I suppose, in a way I'll explain later on, the 2nd one also shows this), you can see that the output (the solid line) stays "flat" for a while. Then it goes through a transition period. Then it seems to follow a fairly straight line downward. It would be nice to find a way to select a point in the transition period that helps delineate between the flat spot before and the sloped part after. It turns out that the "equidistant" midpoint is the -6 dB point for voltage in a low pass filter.
The filter leaves the input alone (is flat) up until some point. In the first chart shown above, it is pretty flat until it nears \$20\:\textrm{kHz}\$. Then it starts to turn. The turn is finished by the time you get to about \$60\:\textrm{kHz}\$. Once you are there, it's a straight line down at a rate of -40 dB per decade of frequency (for a 2nd order filter.)
The half-voltage point, or -6 dB voltage, is the center of the transition period. And people share this meaning when they speak of filters like this.
I like the 2nd chart I added above because it makes this point in mathematical fashion. Look at the shape of that curve. It is downward curving (2nd derivative is negative) until it reaches some frequency. Then, although continuing to decline, it is upward curving (2nd derivative is positive.) The -6 dB point is exactly where the 2nd derivative transitions from negative to positive -- and hits zero. This is the mathematical reason why this point was chosen.
So this special corner point has mathematical reasoning, visual reasoning, and convention to support its use. |
H: ECG circuit Pre amplifier
I am in the process of designing an ECG circuit to detect heartbeat abnormalities. I have two question regarding the AD8220 datasheet:
What is the function of the 2.2pF, 10pF capacitor, 10k, 15k resistors, and the diodes prior to the AD8220?
What is the function of the capacitor on the OP2177 right leg drive circuit?
AI: The resistors and capacitors form a low pass filter to attenuate differential-mode and common-mode noise. The filter cutoff frequencies are
\begin{equation}
f_{C_D} = \frac{1}{2 \pi \left( 2(10 k \Omega + 15 k \Omega) \right)\left(10 pF + \frac{2.2pF}{2} \right) } = 286.7657 \text{ kHz}
\end{equation}
for differential-mode and
\begin{equation}
f_{C_D} = \frac{1}{2 \pi (25 k \Omega)(2.2pF)} = 289.3726 \text{ kHz}
\end{equation}
for common-mode. This results in improved noise immunity, which is essential in low voltage measurements. The diodes limit the measured voltage to \$ \pm 5V \$ for safety, to insure the voltage inputs stay within the AD8220's specifications.
It creates a low pass filter along with 866k resistor.
I personally use the free cross-platform LTspice as a simulator. |
H: Implementation of Analog Matched Filter
I have been reading about communication theory and I was wondering if matched filters can be implemented with analog parts and what they would look like?
If they can't be it seems like the matched filter construct is of only theoretical interest without any practical implementations.
AI: Analog matched filters are widely used in special cases where they have been in practice possible to construct. Examples:
dispersive delay line in chirp pulse compression radar; an acoustic surface wave filter
integrator to detect rectanqular DC pulses (actually a pulse lenght delay line and a subtractor are also needed if we haven't a clock which keep the integrator reset when no pulses are expected to arrive)
For arbitary complex pulses analog matched filters are impractical because the needed tolerances are not manageable.
NOT ASKED, but maybe useful: Detection with correlator is mathematically equivalent with using a matched filter. For example greenbacks were in first gasoline automates recognized this way in analog domain. A candidate slided over a half transparent greenback image. If there occurred a sudden peak in the total light penetration, the candidate at least had right greenback patterns.
ADD due a comment:
The questioner asked a link to an existing implementation. Unfortunately I have no such weblink. But I can include one version which should be plausible altough hopelessly impractical when compared the equivalent processing in digital domain.
Here's a matched filter for 1 second long rectangular DC pulses. The impulse response of such filter should be also one second long rectangular DC pulse.
That impulse response is possible to generate with an integrator. The length 1s is achieved by subtracting the same input delayed by 1 second. Subtraction and integration are possible to realize with a differential amplifier and integrator which are made of opamps. In the next image they are built both with one opamp:
If the integration time constant is 1s (for ex. R=100kOhm, C=10uF), one volt DC pulse would generate 1 volt high triangle pulse to the output.
To prevent integrator to drift to saturation there are discharging resistors Rd, drawn with dashed line. Having R=100kOhm, I would try Rd = 500kOhm...1MOhm. Discharging time constant 5...10s should not spoil the filtering of 1s pulses and surely wins at least the drift caused by non-idealities of modern high performance opamps.
1 second linear delay is problematic. If one accepts quite low system bandwidth - say 5kHz - a looped tape recorder can be used. It unfortunately doesn't record DC, but the signal can be shifted upper with mixing:
When the signal has been stored 1s, it's taken out and mixed back to 0Hz. The written mixing method is AM, which is inefficient due the generated lower sideband + carrier. But it's simple technically and the needed carrier frequency (more than 10kHz, say 12kHz) + both sidebands are still well recordable and possible to get separated (=filtered) from the leaked input signal at the output of the modulator.
The lowpass filter at the input of the whole system kills those signals which are out of the 5kHz bandwidth. |
H: Use MOSFET as switch enabled by Arduino output
I have an input from a source at 5V with a maximum current of I believe 2A. I want to drive an output also at 5V but only at certain times. The output should be capable of supplying up to 1A at 5V. The arduino has other sensors and when certain values on these sensors are reached the input source should be passed to output. Initially I was driving the output straight from the digital HIGH output pin of the arduino however that can only handle very small currents.
I realise I need a logic-level MOSFET switch which will be controlled by the arduino HIGH output digital pin. Now, the question is there are so many available I don't know which to choose. Ideally I want something small that's easy to solder onto a custom PCB. Here are the options:
STP55NF06L
STB55NF06LT4 (out of stock)
FQP30N06L
RFP30N06LE (out of stock)
FDC6401N
I'm leaning towards the FDC6401N but I just want to be sure that this will work. Also by the way the same 5V from the source will be powering the arduino. The 5V on both inputs and outputs are coming from USB interfaces(not from a computer)
I would prefer a SMD but all the SMDs I've seen are dual MOSFETs which seems like a waste to me.
AI: You can use a dual P+N channel, such as a DMC2038LVT.
simulate this circuit – Schematic created using CircuitLab
If your load is heavily capacitive you may have to deliberately slow the turn-on. |
H: Why fake harmonics appear when using weighting windows?
As far as my understanding goes, windows in the FFT can be used to reduce the leakage error.
Suppose that I need to sample a continuous time sinusoidal signal s(t) with frequency \$F = 10 Hz\$. Suppose the sampling frequency \$Fs = 100 Hz\$.
Suppose that the synchronous sampling condition is met, ie \$MF = F_s\$ where \$M\$ is the number of samples with \$M=10\$. Then the signal spectrum looks like this
This is completely correct since the frequency resolution is
$$\frac{F_s}{M}=10 Hz/bin$$.
Now suppose of using a Hamming Window, (there is no need for the window here but let's use it for the sake of my argument). Hamming window has order L=2 which means that the width of the main lobe of the window's spectrum is:
$$\frac{2 \pi}{M T_s} L = \frac{2 \pi}{M T_s} 2$$
in radians or $$\frac{2L}{M T_s}$$
in Hz.
Now, due to the width of the main lobe, when applying the window I expect to see 2 fake harmonics of equal amplitude in the DFT, which is exactly what I see down here:
However, by doubling the number of samples to M' = 2M = 20 (now we are sampling 2 periods) and the width of the main lobe of the window should be
$$\frac{2 \pi}{M' T_s} L = \frac{2 \pi}{2M T_s} 2 = \frac{2 \pi}{M T_s}$$
which is exactly the width of the main lobe of a rectangular window. This time, in the DFT there should be no fake component and only the real component, however this is clearly not the case as you can see down in this last picture:
Why is this the case? Shouldn't this last picture look like the first one (ie contain only one component instead of three?).
AI: Do you understand that
the FT of a sinc() function is a rectangular pulse (and vice-versa)?
multiplication in the time domain is equivalent to convolution in the frequency domain (and vice-versa)?
Can you now see why you get that result? |
H: "etching" transparent conductor on transparent plastic film or glass?
I've put the word etching in quotations as the method to get conductive tracks on a glass or plastic film might not involve a subtractive approach as with traditional PCBs of applying a conductive layer (such as ITO in this case) and then removing the unneeded part, but rather an additive approach such as printing or drawing the tracks on a transfer medium sheet and somehow transferring it to the glass or plastic (such as PET) film, etc. later, or printing/drawing directly on the glass or plastic film somehow.
Need two transparent conductors in an arrangment like this on a transparent plastic film. Such as ITO on PET. But it doesn't have to be ITO necessarily.
Of course for others it can be anything else such as this.
There are too many tracks and their size and their gaps are going to be sub milimeter, so hand drawing is out of the question.
Will be running few milliamps and about 8 VDC. Size of the whole film is going to be 10 cm x 5 cm max.
Since one may need to run dozens or maybe hundreds of tests with different widths, gaps and arrangments, is there is a way to print conductive material on a PET or similar transparent film at home, such as with a modified laserjet or inkjet printer, or a modified mini CNC? What can/should one use for the transparent conductive "ink" and the film and what should one use to get their drawing from a digital file onto real film/glass?
AI: You can buy glass with Indium-Tin-Oxide coating and etch it with 55% HCL at room temperature. The Adafruit item is out of stock, but it should be possible to find other suppliers. Thickness of the ITO is 1850Å.
Etch rate is approximately 25Å (2.5nm) /second. Good results were reported using AZ 1350H photoresist. Total etch time would be less than 1.5 minutes.
You would need something like film and a vacuum exposure setup to get good resolution and exposure. |
H: MPSA42 3.3v switch
Hello I am wondering if I am understanding this correctly,
I have an ESP8266 and I want to drive a 5V relay, I have an MPSA42 Transistor (datasheet) and I am wondering if the base will accept 3.3v. I see in the datasheet it says Base-Emitter saturation Voltage (highlighted in yellow under the On Characteristics) that the max voltrage, I am wondering if this is the difference needed. Then again, I see Emitter-Base breakdown voltage(circled in red) says a min of 6V, is this the min I need to operate this transistor? Sorry if this seems like a very noob question.
Thank you very much
-Kevin
AI: The MPSA42 is a rather bad choice for this. It's got low gain, which you really don't want, and a high voltage rating, which you (likely) don't need. SOA specs would definitely be a plus.
6V is the maximum reverse voltage you can put on the base. Often you don't put any reverse voltage on it.
Anyway, if your relay draws less than about 80mA at whatever voltage it is rated for you can probably drive it. Select a base resistor from R= (Vout-0.7)/Ib where Ib is the rated relay current divided by 10. So if the relay draws 55mA, pick 5.5mA. The base-emitter voltage will be close enough to 0.7V. The output voltage from the port will be less than the supply voltage. Say it is 3V.
Then you would pick R = (3-0.7)/5.5mA = 418 ~= 430 ohms. Also put a diode across the relay coil to handle the inductive spike when the relay turns off. To speed the turn-off you can add a resistor in series with the diode. If the relay is rated at 12V and 55mA and the transistor is rated at 60V and you're comfortable with it seeing 50V, R = (50-12)/0.055 = 690 ~= 680\$\Omega\$ (pick the next lower standard value). |
H: How does MPPT algorithm and 2-stage battery charging go together?
I understand that for finding the MPP of a solar panel, the PWM of a switching converter needs to be regulated based on an algorithm. And that if a battery is connected to the converter the output voltage will be constant (that of the battery).
How is a battery supposed to be charged in CC and CV mode if I can only change the current.
AI: When a battery is below its final charging voltage, you charge it in constant current mode (CC) mode. The maximum current you should give it will be given on the data sheet. If it doesn't say, then C/10 should be fairly safe for any battery. Some batteries can be charged much faster. This limits the maximum power a battery can accept in this mode.
When the battery has reached its final charging voltage, you charge it in constant voltage (CV) mode. There are two ways to do this. The first is to switch to a voltage regulator. The second is to keep supplying a controlled current, but reduce that current so the voltage does not exceed the final charge voltage. As the current falls, the battery will be accepting much less charge power than in CC mode.
If the battery can accept more charge power than your panel can generate, then you can use the standard MPPT algorithm. Adjust the PWM until the current sent to the battery is maximised.
If the battery cannot accept all the power the panel generates, then you must use something other than MPPT. Adjust the PWM to get a current limited by the max CC charge rate, or the CV mode final charge voltage. |
H: Saturation Points for Mosfets; driving gate with 3.3V output
I'm still new to this so please go easy on me :)
I'm looking at using N channel Mosfets to act as a switch between my microcontroller (ESP8266 breakout board) and LED Strip. Here's the schematic:
When I was reading about how mosfets and transistors work, I saw that for it to be saturated, the potential voltage between gate and source pins (or base and emitter in transistors) needs to be higher than the value listed under V_GS(th). Could I do this with the 3.3V output of a ESP8266 GPIO pin? The datasheet for the two mosfets I was considering using are slightly confusing me.
IRLB8721 - https://cdn-shop.adafruit.com/datasheets/irlb8721pbf.pdf
IRLZ44N - http://www.irf.com/product-info/datasheets/data/irlz44n.pdf
I'm asking because under the max value they only use tiny currents. IRLB8721, they use a drain to source current (Id) of 25μA and the max Vgs (needed for mosfet to turn on right?) is only 2.35V. For the IRLZ44N it's 2V with 250μ. So are these logic level Mosfets? Would they work?
Another value I'm not to sure about is Vds. They set it equal to Vgs in the values above, but for figure 3 where you can see other (higher) Id currents, they set it to 15 and 25V. Is this relevant?
IRLB8721:
IRLZ44N:
I would be really grateful if someone could help me clarify this.
On a side note, is it necessary to use resistors between the microcontroller and gate? How would I do this, and for what function?
Thanks so much!
AI: There's no need to use a resistor between MCU pin and FET gate.
The 8721 quotes a Vgsthmax of 2.35v at 25uA drain current.
The 44 quotes a Vgsthmax of 2.0v at 250uA drain current.
Both appear somewhat marginal for a good conduction current at 3.3v, though the 44 is clearly able to conduct more current at a lower voltage, so you're more likely to get away with it using this one. Depending on how much current you want to sink, don't be surprised if they don't turn on fully, and get hotter than you expect.
You might be better with bipolar transistors, they are easy to turn on fully with 3.3v. Here you would need a series resistor to limit the base current. |
H: Understanding a simple crystal oscillator transmitter
I try to understand the AM transmitter on the figure below, but I cannot figure out two essential things. The carrier frequency is created by the crystal oscillator chip.
Why does it suffice to put the audio input in parallel to the battery, in order to add this signal (baseband signal) to the carrier frequency?
Why do we need the capacitor?
AI: This is a very crappy "AM transmitter" circuit which isn't worth its name.
It "works" by modulating the supply voltage with an Audio signal.
The output of a crystal oscillator switches between negative and positive supply. By changing that supply with a signal, the amplitude of the oscillator's output signal will change with that signal.
The "modulation depth" of this circuit will be bad as the crystal will only work for a certain voltage range limiting the amount of AM modulation possible.
It would make more sense to have the 470 ohm resistor in the Bat +5V line instead of the Bat - line as then ground of the audio circuit and this circuit would be the same.
The capacitor is needed to prevent +5 V getting into the audio circuit, without the capacitor the audio circuit might be damaged if it does not have a DC-blocking capacitor of its own.
As I said, this is a really crappy circuit and although it will do "something" it is more a "hack" than a well designed circuit. So don't expect too much from it. |
H: Solving Difference Equation Using Z-Transform
I was trying to solve a problem given in my textbook. I have attached the solution given in the book.
I thought some modifications where needed to it and tried to solve in a different way. I ended up getting absurd results. Where's the mistake in my approach ?
AI: Your approach is correct, but the problem is that the given response is not the response to a unit step, but to a scaled step. That's why you get \$\alpha y[-1]=-11/2\$ and \$1-\alpha y[-1]=8\$, which is incompatible. If you assume a scaled step \$ku[n]\$, you end up with the following \$\mathcal{Z}\$-transform of the output signal:
$$Y(z)=\frac{k-\alpha y[-1]+\alpha y[-1]z^{-1}}{(1-z^{-1})(1+\alpha z^{-1})}\tag{1}$$
Comparing \$(1)\$ to the \$\mathcal{Z}\$-transform of the given response you get
$$k-\alpha y[-1]=8,\quad \alpha y[-1]=-\frac{11}{2},\quad\alpha=-\frac12$$
from which you obtain
$$y[-1]=11\quad\text{and}\quad k=\frac{5}{2}$$
The values of \$\alpha\$ and \$y[-1]\$ do not change, but now the result is compatible with the given response. |
H: ESP8266, GPIO0 or GPIO2 as input
I have a ESP8266-01 and I want to use it to check if my door is open or not using GPIO0 or GPIO2 as input.
As GPIO0 and GPIO2 both needs to be high or floating at boot, I cannot directly connect my switch to either of it. The solution is that I connect the switch between GPIO0 and GPIO2 so that at boot-up both are high, and once the chip is booted, set GPIO0 as output and low. Now, if the switch is open, GPIO2 will read high and if it is close it'll read low. This is what I understand from the discussions and posts at several places.
But, I'm new and confused! :P
Can I connect GPIO0 and GPIO2 directly without anything else? No pull-ups, no resistors in between?
Is it okay to directly connect GPIO0 and GPIO2 with a wire at boot-up? And also when GPIO0 is output-low and GPIO2 is input?
As I understand, in output mode, GPIO is connected the with VCC or ground with very low resistance. What about input? How is it implemented? If I connect GPIO0's output to GPIO2's input, is there any chance of short-circuit?
When setting that up after boot, is there any specific sequence I should be setting GPIO0 and GPIO2 as output or input respectively? Does it matter?
From what I understand, the chip has internal pull-ups. But discussions around the web gives a very confusing idea about the need of external pull-up resistors. Are pull-up resistors needed to implement this?
AI: Here's the standard means of doing what you require with a little explanation.
simulate this circuit – Schematic created using CircuitLab
Figure 1. A typical GPIO switch sensing arrangement with external pull-up.
How it works:
If SW1 is open then R1 pulls the input to V+ which will be read as a logical '1' by the micro.
If SW1 is closed then the input will be pulled to GND and will be read as a logical zero.
C1 adds a little "debounce" to slow the rise and fall of the input voltage in the event of chatter or bounce on contact open or closure. You can work out the approximate delay simply by \$ \tau = R1 \cdot C1 = 10k \cdot 100n = 1 \ \mathrm {ms} \$. \$ \tau \$ (the Greek letter tau) is the time-constant.
A few more points:
Because R1 is connected to the same V+ as the micro it will be impossible for the GPIO voltage to exceed the supply voltage (which could damage the chip). The voltage on each will rise in unison.
Because this switching arrangement is so common and pull-up resistors are required, it is usual for many of these micros to feature internal pull-ups. If you enable yours in your program then R1 can be omitted.
Now to your questions:
Can I connect GPIO0 and GPIO2 directly without anything else? No pull-ups, no resistors in between?
This should now be clear from the answer above.
Is it okay to directly connect GPIO0 and GPIO2 with a wire at boot-up? And also when GPIO0 is output-low and GPIO2 is input?
That's fine. It would be a problem if you had two outputs connected together and one was trying to give a 'high' while the other was giving a 'low'.
As I understand, in output mode, GPIO is connected the with VCC or ground with very low resistance. What about input? How is it implemented? If I connect GPIO0's output to GPIO2's input, is there any chance of short-circuit?
When the GPIO is configured as an input it is essentially a transistor monitoring the input voltage. Since it is not sourcing or sinking any current it can't be damaged by pulling the input high or low. On the other hand if you short an output to ground and try to set the output high then you will draw a high current from the output and possibly damage the device.
When setting that up after boot, is there any specific sequence I should be setting GPIO0 and GPIO2 as output or input respectively? Does it matter?
Only you can answer that as we don't know what's connected. Generally there is no problem.
From what I understand, the chip has internal pull-ups. But discussions around the web gives a very confusing idea about the need of external pull-up resistors. Are pull-up resistors needed to implement this?
The pull-up, either external or internal, is required if there is a possibility that the input could "float" to an undefined level. If no pull-up was used in Figure 1 then opening SW1 would leave the input floating and susceptible to stray voltages and electrical interference giving unreliable readings of the switch status. |
H: Another question about LEDs in series
I have been doing a lot of reading on trying to match constant current drivers to series of LEDs but either my calculations are incorrect or the demands of what I am proposing are way off the charts. This is part of a project to make a strobe light.
I would like to run 5 LEDs in series, here are the specs of each individual LED:
wattage:20w | foward voltage:30-32v | forward current:700ma
The ideal would be a driver with a fair amount of leeway, so that I could work with fewer or more LEDs, depending on the situation.
I know that all the questions on this topic must be driving you guys crazy, but there is so much contradictory information online, and it is hard to calculate with any confidence. So, if someone could tell me exactly what I need from a driver, I would be very grateful.
AI: If you have 5 LEDs in series, and each should be run at 700mA, then you need to deliver a current of 700mA.
If each LED develops 30v to 32v voltage drop at that current, then your current source must tolerate delivering into a total voltage drop of 150v to 160v. |
H: ESD protection: clamp to 12V or derived 5V?
I have an input connector which provides 12V power, and a few 5V logic lines. The 5V Vcc is derived from a local regulator:
simulate this circuit – Schematic created using CircuitLab
What's best practice for ESD protection on this input connector? I'm thinking clamping diodes between the data line(s) and the power rails, but which rails?
clamping to the 12V rail would subject the logic to a higher voltage
clamping to the 5V rail would subject the regulator to the ESD
Alternately, do both? Or lose the 5V regulator and bring 5V and 12V in on the connector?
AI: The logic can only be clamped to 5V, any higher and you risk damaging those interfaces, any lower and you risk collapsing the signal.
Power input
The input to the regulator... Why not "shape the packet" with series R-L and an input capacitor. This would limit what the input of the regulator would actually see as well as help with the power dissipation of the regulator
simulate this circuit – Schematic created using CircuitLab
Maybe also a TVS rated at say 15V to 0V on the 12V line.
Below is a crude simscape model to show the intent. The IEC 61000-4-2 (voltage not the current as I reduced the equivalent source impedance to 0 from 260R to emphasis the waveform) profile was superimposed onto a 20Vdc rail
Logic lines
The topology to use depends on the nature of these 5V logic lines: high or low speed, impedance matching.
simulate this circuit
One method is to place a TVS on the dataline. This will need to take all the energy BUT also imposes leakage & capacitance on the dataline... something your datalines might not be able to tolerate
simulate this circuit
The use of a series diode helps reduce the capacitance on the line BUT the energy involved may still result in a relatively large TVS
simulate this circuit
A stearing diode to Vcc & some series impedance will protect the dataline. However, the additional series resistance may upset your signal & the charge flowing through the shunt diode may still be too high
simulate this circuit
By using a higher voltage TVS at the input the voltage is limited such that the remaining energy being shunted into Vcc is reduced.
What topology is suitable is dependant on the energy involved, sensitivity of the lines and other aspects of the circuit. |
H: Can somebody explain why normal diode(1N4001 or 1N4007) is used in rectifier bridge insteed of schottky diode
I have 9v AC(1A, 50Hz) as input to 5v DC(500mA) as output rectifier circuit to power up the development board. But I had a doubt if I use Schottky diode instead of normal diode what happens to the circuit. By watching many videos I understand that Schottky diode can operate at high frequency, lower temperature dissipation. But it has more leakage current compared to the normal diode Is that it will affect the rectifier circuit?
AI: Traditional diodes are cheaper than schottky diodes and they can usually block a higher voltage in the opposite direction. In most power rectification applications like yours schottky diodes are used to limit voltage drop and power loss.
In your case whether or not you need a schottky diode depends if you need to limit voltage drop or power loss. |
H: Acceptable conformal coating expansion ratio for PCB with delicate SMT parts?
I have heard that conformal coatings can put stress on SMD parts because of expansion/shrinking while curing or because of temperature differences. How much of a problem is this?
The only value relating to this which I found in the datasheet for the coating I'm looking at was "Cured film Coating: Coefficient of Expansion: 90ppm" which I guess is about expansion while curing because it has the wrong dimension for a thermal expansion coefficient. I assume this means that for a 20cm board there would be expansion of \$90\cdot10^{-6}*200mm=0.018mm\$ which should be negligible. Is this right?
AI: Generally this material is applied to protect components from environmental damage.
The ratio of change Stress [N/m²] pressure to Strain displacement is called Young's Modulus and the resulting force is expected to be much lower than the breaking point for components when there is thermal expansion.
Stress = Modulus × CTE × ∆T |
H: LTC3525 Shutdown feature reacts to wrong thresholds
I've be thankful if somebody can help me with my energy harvesting board problem.
I've created an energy harvesting board based on the step-ups Linear Technology LTC3105 and LTC3525-3.3.
Below please find the schematic and board design.
A small 3V solar panel charges via the LTC3105 a 2.7V 3F Supercap up to max 2.66V.
The LTC3525 steps up the voltage from the supercap to 3.3V that goes to the load.
An SPDT slide switch is between the supercap and the LTC3525, to turn off the board (no energy consumption from supercap).
I want to use the Shutdown feature of the LTC3525 and disconnect the output when the supercap voltage is less than 0.9V is and turn on again when it is 2.3V.
So I connected the SHDN pin to the supercap via a voltage divider with 100K and 75K resistors.
I've tested the board using a 100Ohm Resistor as load and also with a 3mm white LED after a 100Ohm Resistor.
I've charged the supercap to 2.6V. I've connected the load and I see 3.3V on the ouput until the supercap reaches 1.47V and the SHDN on LTC3525 is at 0.62V, then LTC3535 disconnects the output (0V).
Then I wanted to test the output reconnect. So I've discharged the supercapacitor down to 0.7V and then charged it, while monitoring its voltage and the output of the LTC3525. The LTC3525 reconnected the output at 1.47V.
This is not as it should be, because the LTC3525 should disconnect the output when V_SHDN is less then 0.4V and reconnects when more than 1V.
I have an other board but with SHDN of the LTC3525 connected to its V_IN (shutdown feature disabled) and the board can provide 3.3V on the output until the supercap reaches 0.7V (same load). This means the problems is not caused by too low voltage of V_IN of LTC3525.
This also means the Shutdown feature on the other board works, but for some reason it reacts to the wrong thresholds.
Does anybody have an idea why?
LTC3525 Datasheet LTC3525 Datasheet
Thank you very much and happy new year!
Sincerely
AI: Wrong assumptions and interpretation of datasheet specs.
SHDN Threshold Voltage 0.4 Vmin, 0.6 Vtyp, 1 Vmax
This means it switches On OR Off at some threshold of 0.6V with a worst case tolerance of +0.4/-0.2V. ( Disabled active low or negative logic)
When they define a logic level, for safety margin from noise they define a "1" above some level and a "0" below some level. "1">=1.0V and "0"<=0.4V but it has some real threshold that is variable in between.
So SHDN should not be used as an accurate Ultracap charge comparator.
It does not mean what you said... "This is not as it should be, because the LTC3525 should disconnect the output when V_SHDN is less then 0.4V and reconnects when more than 1V."
The other board switches OFF and ON @ 0.7V so this is close to typical.
You need a better comparator to control SHDN. |
H: OP Amp outputting 0 volts
I'm trying to use a non-inverting operational amplifier to amplify a voltage by a gain of 2 (using 2 10 ohm resistors). I'm using a 12 volt battery (made by combining 8 1.5v batteries) to power the op amp, and I'm using the 3.3v pin on a Raspberry Pi to connect to the non-inverting input of the op amp.
Here is the circuit on PartSim: https://www.partsim.com/simulator/#99446
The output of the op amp is reading 0 volts when I connect the multimeter to the output of the op amp and the ground terminal used on the Raspberry Pi.
To be specific, the op amp I'm using is the UTC3580. (Datasheet)
Why is the op amp outputting 0 volts when it should be outputting around 6.6 volts?
AI: As well as having a grossly too low value in your feedback circuit, you must connect the V- to ground. As others have said, 10K is a reasonable starting value for an LM358/LM324 type of op-amp. There are reasons to go much higher and much lower, but for starters this will do.
The green arrows show the (main) current path through the feedback divider. The red lines show the connection which already exists inside the RPi and the connection to V-.
Without the supply connection, the output cannot push current through the divider and you'll get about 0V across the resistors. |
H: resistor on npn transistor, led works, fan doesn't
I'm trying to control a dc fan with a Raspberry Pi 3 and I'm using a NPN transistor (BC547) to switch the fan on and off.
The schematics I found called for a PNP transistor with a 1k resistor on the base. I left the resistor but used a NPN transistor instead because that's what I had lying around.
This resembles my setup:
The Raspberry outputs 5v (red wire) and 3.3v on the gpio pin (blue wire in picture). (Don't think I need so say this, but ground is black.)
The fan didn't start so I hooked up a multi-meter where the fan should be and I measured 5.6 volts. As a test I then replaced the fan with a 5v led I have and it worked as expected. Still, the fan wouldn't start when I replaced the led with the fan again.
I don't seem to remember using a resistor on the base when I used these years ago (it's been a while since I last messed with these) so I removed the resistor and the fan worked!
So now my setup is like this:
I'm confused as to why only the fan doesn't work with the resistor on the base of the transistor. Can somebody explain why?
AI: I don't think your unknown PNP in an unknown circuit has anything to do with this.
You did not calculate the value for the base resistor, just guessed or copied, and it is too high so the transistor does not turn on fully. Maybe the transistor is connected correctly or maybe it is connected backward and thus has lower than normal gain, there is no way to know from the information you give. I can say that it appears to be connected backwards if that actually is a BC547 which has C-B-E order of pins.
Replacing it with a short means the base is getting some unknown current from the virtually shorted RPi GPIO, probably tens of mA. So it works, but the RPi GPIO is being abused.
You also should have a diode across the fan.
Edit:
Thank you for posting the schematic, however it's usually better to add on rather than edit out information which keeps existing responses coherent.
According to the schematic your NPN transistor is being used in reverse mode. It will have very low current gain in that mode- maybe 5 or 10. So you need to supply excessive base current to get it to turn on. Swap emitter and collector.
And a (reverse-biased) diode across an inductive load is usually a good idea.
Here is a schematic that illustrates what is happening and where the diode should go:
simulate this circuit – Schematic created using CircuitLab
The left circuit is what you have- the transistor is backwards and is operating similarly to the right-hand circuit functionally, but the current gain is only about 7.5.
The right hand circuit has the transistor saturated and the current is close to the 100mA if the transistor was a dead short.
In general you should reduce the base resistor if the load current is more than about 50mA. For a 100mA fan you might use 470 ohms. That is using a forced beta of 20. The base-emitter junction looks like a diode, so it's about 0.7V drop. The base current is (Vout-0.7)/Rbase. So you can easily calculate the proper approximate resistor value with simple arithmetic.
In your case without the resistor you're forcing the output voltage to be about 0.7 or 0.8V and the current will be above ratings for the RPi. |
H: Disposable camera EMP coil not producing any field
I recently took on this project: https://www.youtube.com/watch?v=WIMhraVcdTg
Trying to use a disposable camera as an EMP generator.
I wrapped my wire around a bottle, but it still won't do anything, except I do hear a little spark in the push button. It goes through the coil but doesn't seem to have any effect.
I connected the coil directly to the capacitor leads with a button and ON/OFF switch. What are some things that would cause the capacitor and coil to not make the EM Field or EMP?
I'm starting to think the coil is not correctly set up or is wound incorrectly.
Is there a requirement I may be missing, for this coil to create the desired effect?
Here is my schematic:
simulate this circuit – Schematic created using CircuitLab
Here is my coil and circuit, what do you guys think is the problem? Do I need a different coil or what?
Here is a schematic of the camera, may not be exactly what I am using but a close equivalent:
AI: Of course it is generating an EMP. I'm sure it works fine. The spark you mention when flipping the switch, that would only occur if it worked.
The coil you've wound is a type of electromagnet called a solenoid. If the coil form that it is wrapped around is hollow (which it might be, it looks like a container for something, not sure what), try placing something magnetic (like a screw driver) near the middle of the coil, and flip the switch - you should feel a brief but sharp 'tug' on the screw driver. This way you can actually know for sure if everything is working or not.
Believe it or not, I made something very similar to this, though it uses SCRs rather than a switch and has some larger but lower voltage capacitors, along with some circuitry that makes the thing auto-trigger once the capacitors reach a certain voltage. Using a beefy power supply, it pulses at maybe 2-3Hz. What do I use it for?
Magnetizing screw drivers! Seriously. That's why I built it. Each pulse is like a turbocharged swipe along a magnet, only, in very little time, it will magnetize stuff very well instead of having to drag it against a magnet over and over 100 times. Honestly, what you have built right now is way more useful and you could use it to magnetize stuff... but it's going to be rather poor at generating EMPs. I'd stick with what you have, but if you really want to be the scourge of dollar store calculators.... well, we all need a hobby.
The reason your device isn't causing any problems for whatever poor calculator you're testing it on is your coil geometry and coil inductance.
What I don't understand is why you didn't simply follow the directions in the video. It would work if you did. He says wind about 5 turns, which is roughly what you'd want for a coil the size he's wound. But you inexplicably wound 40 turns. This should be self-evident, but its worth repeating: to get the same results, you have to actually follow the directions. 5 turns and 40 turns is going to be completely different in nature. Inductance is proportional to the square of the number of turns.. so your 40 turn coil has 64 times more inductance than the same sized coil, but with 5 turns. Of course it doesn't behave the same way.
Inductance is measured in Henries, with a Henry being equal to a Volt-second per Ampere. Which probably sounds nonsensical at first. One way to look at it that is relevant to your project is this: Something with 1 Henry of inductance, if connected to 1V, will take one second for the current flowing through it to reach an amp. Or, more simply, lots of inductance makes current actually take time to build up. If you have a 1H inductor, then regardless of the voltage across it, it will take an entire second for the current to reach what ohm's law says it should be.
Long story short, your coil has way too much inductance. It's slowing down the pulse, making it take much too long and instead of an EMP, which is like a balloon popping, you're doing something more like slowly letting the air out of an untied balloon. All of the 'destructive'/interference properties of EMPs are derived from the speed (or rather, short duration) of the pulse.
Also, your coil geometry is the worst possible geometry for what you want to do. It is a solenoid geometry, which focuses most of the electromagnetic energy at the middle of the coil, directly at the half-way point along its length. Very little actually makes it outside the coil, and what does is concentrated at the top and bottom (axially) of the coil. And essentially zero field will be at the sides of coil, which is the only part of the coil you could even get near a calculator due to your construction. The white thing its wrapped around is filling all the spots where there is any useful amounts of anything going on, so even if it did have the right number of turns, you still couldn't get the calculator in the right spot.
You want the coil to be as flat as possible. Like a pancake. In fact, they call them pancake coils. Pretty much the exact opposite of your current coil. But, that's not even really an issue since with approximately 5-6 turns, you can't really give the coil much shape anyway. Also, make sure to keep the air gap (the 'hole' at the coil center) close to what you see in the video. Make it too big, and you'll again have too much inductance. Too small, and not enough.
But, this is good news, because it will take you like 15 seconds to construct the correct coil. If it doesn't work, well... it isn't going to work on every calculator. It almost certainly won't work on virtually everything except really cheap and small/thin give-way calculators. It needs to be directly on top of the calculator, and if its casing is too thick, this alone might introduce enough distance to prevent anything from happening. This thing cannot produce a meaningful amount of far-field electromagnetic radiation, so it works entirely on near-field stuff. Near-field falls off at radius cubed. It takes almost no distance at all to make it not work.
With that in mind, experiment by slowly adding turns to the coil, one at a time, up to maybe as many as 10 turns. If that doesn't do anything to the calculator, you might try 4 or 3 turns, or add a second capacitor for more oomph and try again with 5 turns, slowly working up to 10 like before. If it won't kill (or at least noticeably affect) the calculator after that, it's simply because the EMP generated is incredibly weak and that calculator is not crappy enough to succumb to the interference. |
H: Troubleshooting 4066 as a button hack
I have an Arduino project which needs to simulate a human button press on a third-party board, an 883LM garage door opener controller. The other board has its own power supply which is separate from my project. My multimeter shows 3.3V DC across open the button. I don't have an oscilloscope to verify that it's DC.
I thought the easiest way to interface with this would be using a 4066 "bilateral switch". I checked it with my meter and can see the continuity across pins one and two changing when I would expect.
The problem comes when I connect it across the button on the 3rd party board. The board behaves like I am holding down the button, regardless of the 4066 state. I have verified that my poor soldering has not resulted in contact between the two sides of the switch. The physical button does not respond until I disconnect one side from the 4066. If I connect it momentarily, it behaves like I have tapped the button.
I don't have much understanding of how the commercial board would not be compatible with this electronic switch. Is there anything else I should try before I start thinking about a completely new approach?
AI: If you want to use a bilatheral switch between two circuit boards then you need the two boards to share the same ground otherwise it won't work.
Bilatheral switches are most well suited for switching an analog voltage/current, What I would do is I wouls use an opto-coupler, it has an internal infra-red led and a photo-sensitive transistor for its output, you can connect the transistor output across the switch and activate it by driving the led from the other board.
It is generally a good idear to use an opto-coupler when connecting two circuit boards the way you are describing because that way you keep them electrically isolated from each other. |
H: Tube amps on voltage regulator
I have one basic question, because I don't know much about tube amps. I live in a country where during winter, voltage can be from time to time low (around 160V-180V). I decided to keep my amp safe using an automatic voltage regulator, which keeps it around 220V-230V, which is good. Can those devices do any harm to a tube amp?
I also noticed that when there are voltage oscillations during the day, the amp tends to be slightly lower sounding. Is that normal behavior for tube amps?
AI: Tubes tend to be robust. Undervoltage will not hurt, unless some grid bias (control grid, suppressor grid) enters a region where excessive grid current can be drawn.
And yes, when the power line voltage drops a lot, your regulator will drop out
of regulation, and the reduced tube plate voltage results in lower audio power. |
H: What can i use an oscilloscope for in terms of networking
as someone who is just getting their feet wet in networking (going for a+ cert currently and would like to go further,) ive noticed that oscilloscopes can be used to monitor... seemingly any wavelength. as someone who may possibly buy one in the future, once i know more about them, what are the possible uses in networking?
AI: The short answer is that for the kind of work you're talking about, an oscilloscope probably isn't a particularly useful piece of equipment.
An oscilloscope can be useful for things like designing/testing/measuring the design of a network adapter, to assure against doing things like running (what are supposed to be) separate lines too close to each other so they interfere with each other.
If you're reasonably certain the network adapters you're dealing with work correctly, and you're interesting primarily in looking at the network from a viewpoint of how the software is using the network, you probably want to consider a packet analyzer or a protocol analyzer.
For quite a bit of mainstream network diagnosis, you can use a free packet capture/analysis tool like WireShark. The main specialized hardware you might consider in this case would be an AirPcap WiFi adapter, which lets you capture and analyze packets between some other computer and an access point. There are also some special network capture drivers (e.g., Acrylic WiFi) that are supposed to accomplish roughly the same thing (but I can't vouch for them personally--I've never had occasion to use them). |
H: Name of this switch?
Can some one tell me what this type of switch is? It seems kind of like a trigger in action.
AI: It's usually called a "detector switch". Digikey has them listed under "snap action, limit switches". There are many kinds, one similar type shown below. |
H: How is the code written in ARM7 compatible with ARM9?
I'm studying ARM families,
In the above image, it is written that the code by supported ARM7 can be migrated to ARM9 and others.
ARM7 uses the Von-Neumann architecture (single bus for data and instructions) and 3-stage pipeline (i.e., fetch, decode and execute). ARM9 and others use the Harvard architecture (separate bus for data and instructions) and 5-stage (fetch, decode, execute, memory and write (for ARM9)). Also, ARM7 doesn't support a memory management unit, but others do.
How can the code be compatible if the processors are using different architectures and pipelines? Won't there be any affect of architectures to the codes?
I'm assuming, as ARM9, ARM10, ARM11 have same architectures, code can be compatible, but ARM7 is different from other processors. Hence, one must do some changes in code before migrating because of different architectures. I'm wondering if it is correct or not.
AI: A processor is said to be code-compatible with another if their instruction set is compatible. That is all there is to it.
Now, instruction sets can be made compatible whatever their pipeline architecture is. It is right that pipelining can have a consequence on the instructions if you only target execution speed and core silicon area, but there are always workarounds if you need to ensure some compatibility with some existing processor. It may complexify the core, but there is always a way. Look at how the architecture evolved from the 8086 to the newest Pentiums. Yet old code can still be executed.
Regarding the Von Neumann / Harvard differences, it can also be made to have minimal impact if the code and data busses actually end up to the same physical memory blocks with the same adresses (which is the case on all ARM implementations I have seen, except maybe for peripherals memory zones). There may be an impact on corner cases like the need to call specific instructions when the code is self-modifying, but in normal cases, you won't notice.
Regarding memory management, that is another story. This has an impact on the OS level. The MMU is like an additional peripheral, whose configuration has an impact on memory layout, but it doesn't change the instruction set. An algorithm is coded the same way whether there is an MMU or not. |
H: Transformer Basics
According to my thinking, the answer should be 400-200+200=400V, but the answer given in my workbook is 0V. Can you please point out my mistake ?
AI: The two 200v windings have their 'finish' (not dotted) terminals connected together. This means that there is 0v between the two start (dotted) terminals, so the two 200v windings by themselves contribute zero to the measurement.
The voltage is being measured between the start and finish of the 400v winding, so should be 400v. I agree with you, and disagree with a 0v answer.
Ah! Unless it's a DC voltmeter. Does your book ask trick questions? A DC voltmeter will read zero! |
H: Setup and hold time output when violated
Consider a positive edge triggered D flip flop with input signal X with a setup time of 20 ns and a hold time of 0 ns. What will be the output?
C is clock signal with a period of 40 ns.
During the 6th positive edge, we see that the data (or X) is not stable for 20 ns (setup time) before it as it goes from 1 to 0. So the output is not predictable, right?
When I asked this to my professor, he said that the output of the flip flop would be the value of the input (X) before 20 ns which is 1 here.
Is he correct?
AI: If the flip-flop's setup time is 20 ns, it means that data has to be stable atleast 20ns before the capturing clock-edge. Similarly hold time is the amount of time, data has to remain stable after a clock edge has appeared. So together they define a "setup-hold-window", in which data has to remain stable.
If the data changes/toggles within this window, the output is unpredictable or metastable.
In your question data toggles within the setup window prior to the 6th clock edge, means the output is unpredictable. |
H: Why is "trimming" a carbon compositon resistor not possible?
I read that carbon composition resistor can't be trimmed and thats a big reason why the tolerances for them are so high. What I don't understand is why I can't just carefully cut some of the resistive material out to increase the resistance value.
AI: You can. In fact, long ago, when resistors were not nearly as readily available as they are today, it was not an uncommon technique.
Filing a notch into a composition resistor will increase its value, but it will also have detrimental effects on its mechanical strength and long-term reliability. Seal the cut with lacquer and mount the resistor such that there is no stress on its leads.
Of course, today we have access to precision resistors at very low prices, so there's no longer any reason to do this.
(I'm not sure why the other answers and comments are talking about film resistors, since you asked specifically about composition resistors, which are constructed differently.) |
H: Can anybody explain the heat produced in the circuit during operating and non-operating state
I have designed motor monitoring circuit(Agricultural Purpose) with Stepdown transformer, Rectifier, Relay Module, and processor.I planned to run the module to run 24*7 but I afride that heat will affect the circuit.My circuit working is When the relay module triggered the circuit got closed and the processor will handle remaining work.
Here my Question is if the relay is in Off state(load is connected to NO, No load connected in NC) still my transformer and rectifier circuit get connected to the power supply which will produce heat or it will not produce heat?
AI: The transformer, diode bridge, and regulator all will produce heat even if everything else is off or disconnected. Current flows through the transformer primary even if the secondary has no load at all, and the wire resistance converts some of that current into heat. The regulator has about 5-10 mA of static current from the input pin to the ground pin even if there is nothing attached to the output, so this produces some heat. Also, that static current comes from the transformer secondary and through the diodes, so there is more heat produced in those elements.
All of this adds up to very little heat. The surface temperatures of the components will vary depending on where the circuit is mounted and how much the ambient air is moving around it, but it should be way below anything uncomfortable to touch. Depending on the relay coil and processor current requirements, the regulator probably will need a heatsink to prevent overheating when the system is on. |
H: Any possibility of dead short in trim pot
I want to add one trimpot of 1K in my ADC board to test several analog channels. I thought of connecting two ends to VCC and GND and middle pin (wiper) to analog input. But I am not sure if I need to add any additional resistor on one of the sides to protect any possible short in case of faulty trim pot. But in such case, I guess I will not get 5V (or 0V) on extreme ends and that will be an issue for me. So my question is: Is there any possibility of defective trimpots making dead short between any two end points? Since pots are also being mechanical parts, does wear and tear cause any issue. Since resistance between ends is fixed, I am hoping that dead short may not occur and no extra safety is needed. But thought it is better to ask this forum. Any one have seen any dead short between ends?
AI: It's highly unlikely that you will end up with a dead short - the typical failure mode for a trimmer or pot would be open circuit due to an oxidised wiper or broken track.
The reason you would typically see a series resistor in a potentiometer circuit is for circuits where having zero resistance between the wiper and one or other end of the track would cause issues. In your scenario where each end is connected to a supply rail and the wiper to an ADC input, this will not be an issue. |
H: Is an exhausted PSU safe to use for an FPGA?
For a project I will have 4 stepper motors,a laser module and few modules attached to the FPGA.
I need around 10 amps.
Clearly the FPGA can't provide enough power for all the modules.
I think to use and old 300W PSU to provide power to all the modules.
From 2 connectors I can get multiple 5V sources and connect them to different modules rather than just using an usb cable connected to the FPGA.
Can the PSU sustain all the modules?The amount of power needed is maybe a third of the power of what it could provide.
The PSU being old I'm afraid that can just die randomly or make a short circuit and kill the FPGA.
Is it worth it or should I try another ways to provide power to the elements?
AI: Can the PSU sustain all the modules?
I wouldn't count on it. Most of the power from a modern power supply is on the 12V rail, not 5V. A typical profile for a modern 300W power supply looks like this, for instance -- 16A at 5V is the relevant limit:
This one happens to barely be within your margins, but not enough to be comfortable. Given that you aren't certain about your power draw, and that the power supply you plan on using may have different specifications (and may be on its way out!), I wouldn't count on it. Get a dedicated 5V power supply if you need this kind of power -- take a look at Meanwell products, for instance. |
H: Is the rise time of the output of a logic IC or optocoupler independent of the rise time of the input?
Is the rise time of the output of a logic IC (e.g. flip-flop or inverter) or optocoupler independent or dependent on the rise time of the input? If the answer is dependent, are there any other devices where the rise time of the output is independent of the rise time of the input?
For example, I have a 555 timer output running in astable mode with a 50% duty cycle producing a 1.5kHz square wave where my scope says the rise time is approximately 400ns (and this changes if I change the frequency of the 555 output). I'd like to hook something up to the output of the 555, like a flip-flop or inverter or optocoupler (or anything that does the trick) to get a square wave with a rise time that's:
1) less than 400ns and 2) preferably, independent of the 555 frequency (i.e., same whether I configure the 555 to output at 1.5kHz or 10kHz).
AI: For really slow input transitions there may be some jitter on the output. Try looking at schmitt triggers- They have built-in hysteresis that takes a slow input and creates a fast jitterless output. A more technical discussion is here. Adding one would also make the rise time frequency independent. An example part might be the CD40106B CMOS Hex Schmitt-Trigger Inverter. It has a similar voltage range to the 555, but double check to make sure it works for your application. |
H: Why are "ice cube" PCB mount power relays pinned out so that the COM pin is between the coil pins?
If you have used "ice cube" type PCB mount power relays before, you're probably familiar with the de facto standard pinout for them:
Why is this such a standard pinout though? It's clearly not an optimal pinout -- positioning the common terminal between the coil terminals forces you to put an isolation slot in the PCB in order to obtain reasonable creepage distances, and severely constrains the clearance distance available as well. It's also not something unique to cheap Cheese-shop-specials either: the Omron G5LE series uses this pinout, and so do equivalent relays from TE/P&B (ORWH) and Panasonic (JS1). You need to go to much costlier parts such as a Tyco PCH or RZ or Panasonic JW1 in order to get something that puts the common pin on the same side of the relay as the other contact pins.
Is there some sort of internal construction detailing that makes this type of relay unsuitable for mains isolation to begin with? Or why can't the relay manufacturers bring the common terminal out on the "correct" side of the relay to allow an isolation barrier to be established?
AI: It's only to make the relay cheap. It's sub-optimal internally (electrically) as well as externally (pinout). The coil-to-contact breakdown voltage and capacitance is inferior to that of better relays. On the other hand it's cheap and the relay can be made reasonably sensitive (360mW typically for that construction).
One of the disadvantages of this construction is that the contact current always flows through the flexure, so a large surge (say to blow a fuse or circuit breaker) can anneal the spring and affect the operation permanently.
Below are a couple of photos of one I did a tear-down analysis on a few years back.
The common pin is naturally located at the other end from the contacts. They could have moved the coil pins to the front or back but either way they are close to the contact potentials unless the relay is made wider. |
H: How to properly pull up a single-relay module
I've previously discussed in this post how to drive the relay with an ESP8266, and eventually came up with this circuit:
Problem is, the particular type of relay module used has an "active low" input: it is OFF at ~vcc in its input pin, and ON on ~GND.
The circuit actually works, but the system boots with the relay ON, so I think a pull up resistor should be added between the transistor and the relay IN. In the mentioned post, a 10k resistor it is suggested, but in practice it didn't work. I think a lower resistor would get the job done, but I really don't know exactly why.
I'd like to know how to tell which is the proper value for the pull up resistor and why a high value like 10k does not work in this circuit.
The relay module is this:
And the schematics:
AI: Your problem isn't the lack of a pull-up at the transistor collector.
The problem is R1.
When the micro starts up, its IO pins will be in high-Z state (input mode) until the firmware gets around to changing them to output mode. In that time, R1 provides a current path from the regulator U1 to the base of the transistor Q1, which turns it "on", drawing current through the relay coil.
Adding a pull-up at the collector of Q1 will just increase the amount of current drawn when Q1 is on, increasing heat dissipation. The relay will still be energized during start up, because there will still be current flowing to the base of Q1.
To avoid this problem, remove R1. This should be enough to solve the problem.
If you want both belt and suspenders, add a pull-down (perhaps 47 kohms) from the GPIO2 pin on JP2 to ground.
Edit
In comments you said,
R1 is required for the ESP module to boot correctly, both GPIO 0 and 2 have to be HIGH for that matter.
If GPIO2 is high during start up, the relay will be energized during start up (because Q1 will be "on").
You may even have a problem with the logic level during start up because R3 and the Q1 base-emitter junction form a pull-down in competition with R1, so that the GPIO won't be seeing a very strong HIGH during start up.
I'd recommend either
Find another IO pin on your micro that doesn't affect the boot sequence,
or
Add an inverter, either a single transistor or a 1-gate logic chip, between the IO pin and Q1. |
H: Distortion Elimination with Differential Transistor Pair
Most of you know that incorporation of negative feedback within amplifier is one of major considerations when designing a hi-fi amplifier. Till now, I have only dealt with differential transistor pair as input stage of amplifier and "eliminator" of distortions fed back from output of an amplifier. Although, I'm not quite sure if all kinds of distortions get eliminated by it (when compared to the original signal brought to the input of amplifier).
This circuit (proposed and made by user G36) has distorted signal, which is being delivered to voltage-amplification stage and after that it gets corrected to original (sine wave) signal being brought to the input of amplifier. It gets corrected by the differential transistor pair stage. (not shown here but: input of amplifier is at Q1 via capacitor and the output is taken from the collector of Q4).
Only problem here is that, when the distorted signal gets distorted enough, the output signal is being clipped. When input signal amplitude is low enough the signal at the base of Q4 is distorted (spiky signal), while the output at the collector of being corrected to sine wave (note that both channels weren't set to same voltage scale).
When the input amplitude was increased progressively, those spikes were higher and higher at the same time, but the higher they were, the negative half-waves were also progressively being clipped. I added potentiometer instead of RF2 to control the portion of NFB being fed to the base of Q2 but that didn't help either.
So that left me wondering for bit, and now it seems to me that all of that distortion cannot be eliminated (or corrected) after all.
I somehow didn't manage to design a differential transistor pair amplifier myself, but maybe with your help you can help me get closer to fully understand it and make one myself that would work like it should.
AI: I'm decorating your schematic, a bit. I'm not entirely sure about your discussion, but it appears this schematic is a little more descriptive about what you are doing:
simulate this circuit – Schematic created using CircuitLab
I added \$C_2\$ because I think you have enough sense already that you have one there when providing an input signal.
How should this have been designed to behave?
The question is important because there is an assumption that someone actually thought about the circuit when designing it and didn't just randomly stick parts together. Assuming a rational actor here, you can say a few things at the outset:
The voltage across \$R_{C_1}\$ will be approximately one \$V_{BE}\$ through-out its operation. So this also means that the current through \$R_{C_1}\$ cannot vary too much. Also, we can say something about the magnitude, as being approximately \$1\:\textrm{mA}\$.
Since there is an assumed \$1\:\textrm{mA}\$ in \$R_{C_1}\$, then the quiescent state of the circuit (without an input signal) should also have about \$1\:\textrm{mA}\$ in the collector of \$Q_2\$. The reason is that if the base-emitter voltages of \$Q_1\$ and \$Q_2\$ are the same (this is a "diff-amp" after all), then the collector currents should be the same. So a designer would have known this and planned for equal currents in both collectors.
There is an Early Effect present in all BJT transistors, which becomes more of a problem if the \$V_{CE}\$ of one transistor is much different than the other. However, because of the arrangement here, it is clear that the collector voltage for \$Q_1\$ will always be "close" to \$19.3\:\textrm{V}\$ and the collector voltage for \$Q_2\$ will always be exactly \$20\:\textrm{V}\$. Given that they share the same emitter voltage, too, this pretty much means the Early Effect won't be much of an issue. Their \$V_{CE}\$ voltages will be appoximately the same.
\$R_1\$ and \$R_2\$ are used as a simple voltage divider creating a mid-point voltage, half way between the supply voltage. Without a signal applied, the only impact on this divider voltage will be the required base current of \$Q_1\$. Since that base current will source from \$R_1\$, leaving \$R_2\$ just a little poorer for it, this means that the voltage drop across \$R_1\$ will be a little more than the voltage drop across \$R_2\$, so we will expect that the quiescent base voltage for \$Q_1\$ will be a little below the mid-point of \$10\:\textrm{V}\$.
The collector voltage of \$Q_4\$ can vary over almost all the range of the supply voltage. Saturation of \$Q_4\$ (undesirable) occurs when the collector voltage is the same as the base voltage. But its base voltage (see point #3 above) will be close to \$19.3\:\textrm{V}\$. This means that the collector can range from almost "ground" to almost \$19.3\:\textrm{V}\$. And that is most of the output range available. At first blush, this at least suggests that \$V_{OUT}\$ has a relatively full range available to it and this fact also helps confirm that this may be the \$V_{OUT}\$ node, if you hadn't already figured it out before. (We'll come back to this, later.)
\$Q_4\$'s collector current is highly dependent on its \$V_{BE}\$, with an exponential relationship. This means that the collector current will vary by a factor of 10X for each \$60\:\textrm{mV}\$ change of its \$V_{BE}\$.
The collector current of \$Q_4\$ will mostly be due to the current in \$R_{C_2}\$ (ignoring the base current for \$Q_2\$ and through the NFB leg to ground through \$C_1\$.) Let's say the output will swing from \$5\:\textrm{V}\$ to \$15\:\textrm{V}\$ (again, we have to get back to this), then the variation in collector current will be the ratio of those two voltages, or about 3. From this, we could estimate \$V_T\cdot\operatorname{ln}\left(3\right)\approx 30\:\textrm{mV}\$ variation at the base of \$Q_4\$: or \$\pm 15\:\textrm{mV}\$.
The above logic (10X collector current for \$60\:\textrm{mV}\$ change at the base) applies to \$Q_1\$, except that in the diff-pair arrangement only half the supposed base variation applies. We can work out now that a \$\pm 15\:\textrm{mV}\$ variation at the base of \$Q_4\$ implies a \$22\:\mu\textrm{A}\$ variation of collector current around the assumed \$1\:\textrm{mA}\$. By the rule, we would normally expect to see an increase/decrease of about \$570\:\mu\textrm{V}\$ to get there. But this is a diff-pair, so it requires twice that, or \$1.14\:\textrm{mV}\$ of signal peak to achieve it.
However, point #8 ignores the loading of \$Q_4\$. Since the assumed center voltage at \$V_{OUT}\$ is (let's say) \$10\:\textrm{V}\$, its quiescent collector current should be about \$10\:\textrm{mA}\$. So we can compute \$r_e= \frac{V_T=26\:\textrm{mV}}{I_{C_Q}=10\:\textrm{mA}}\approx 2.6\:\Omega\$. (This will actually vary because the collector current will vary over that factor of 3.) Assuming \$\beta=150\$ for now, this suggests a loading of \$\approx 400\:\Omega\$. Put in parallel with \$R_{C_1}\$, we can very broadly say that the collector resistor is really only about half the value we expected. So this means the input signal has to be twice as much as we predicted in step #8 above. Or about \$2.3\:\textrm{mV}\$.
From point #9, you can see that this circuit will turn something on the order of a \$2.3\:\textrm{mV}\$ change at the input to something like \$\pm 5\:\textrm{V}\$ at the output. (Ignoring the NFB.) That's an open loop gain of about 2100.
We now have an idea of the open loop gain, before adding in the NFB. With NFB closing the loop, we can compute the closed loop gain from \$A=\frac{A_O}{1+A_O B}\$, where \$A_O\approx 2100\$ and \$B\$ is the portion of the output signal fed back to the input as negative feedback. In this case, \$B=\frac{1\:\textrm{k}\Omega}{1\:\textrm{k}\Omega+10\:\textrm{k}\Omega}\approx 0.09\$. From this, we estimate \$A\approx 11\$.
So, if you supply a small signal at the input, we should expect to see about 11X at the output.
One point I wanted to return to here is that you can see that the actual voltages present at the two bases of \$Q_1\$ and \$Q_2\$ are not expected to vary all that much. We cannot tolerate much more than a swing at the output of perhaps \$\pm 5\:\textrm{V}\$. Much more than that and you will start to saturate \$Q_4\$. Given the closed loop gain, this means the input signal cannot be allowed to go much more than about \$\pm 500\:\textrm{mV}\$.
This means that the current in \$R_{E_1}\$ will vary by perhaps \$\frac{\pm 500\:\textrm{mV}}{4.7\:\textrm{k}\Omega}\approx 100\:\mu\textrm{A}\$. Given that the assumed current in it should be about \$2\:\textrm{mA}\$ (which is divided between the two BJTs), this seems reasonably "constant." So probably good enough and doesn't need any additional circuitry to stiffen that up more.
Also, assuming that there is about \$2\:\textrm{mA}\$ in \$R_{E_1}\$, we find that the voltage across it would be about \$9.4\:\textrm{V}\$. This again is close enough to what we'd guess, given about \$700\:\textrm{mV}\$ of \$V_{BE}\$ drop for \$Q_1\$ and \$Q_2\$, we once again have some assurances that there was an intelligent designer here.
I think that dots the final i and crosses the final t. This circuit looks designed. Nothing seems "out of whack" about it.
And now you know what to expect from it, too!
At the end of all this, we find that this is very likely the result of an intelligent designer (no pun intended.) This is generally considered to be a good thing.
So where does that leave things? Well, you cannot drive this circuit with more than \$\pm 500\:\textrm{mV}\$. (Perhaps a little more. But realistically that should be about your limit.) If you try and supply a larger signal voltage swing, then you can expect distortion at the output.
Also, the voltage at the base of \$Q_4\$, if you use a relatively smaller input signal, should "look" okay on the scope. About like a sine wave. But if instead you push this amplifier towards its maximum output swing, using anything more than (or even near to) \$\pm 500\:\textrm{mV}\$, then you should expect that the voltage signal at the base of \$Q_4\$ will start looking somewhat distorted (not exactly a sine, anymore.) This is entirely normal. Expect it. It will still look "something like" a sine. Just enough different that you can perhaps see that it looks "wrong."
If you now over-drive this circuit, you will push \$Q_4\$ into saturation -- perhaps heavy saturation. In that case, all bets are off and you will most certainly see non-sinusoidal results everywhere. But this isn't within the managed behavior of the circuit, so it is more of an intellectual curiosity (perhaps for those wanting to study the added harmonics under such conditions.) It's not worth investigating for most of us.
So just keep your input signal small, here. Within the range I've mentioned. I think you'll be fine with the results, then.
Cripes, this must mean that @G36 actually knew what he was doing in this case! Will such wonders never cease?
So here's an LTSpice simulation of the above circuit. I'm providing the AC analysis (log-log Bode plot):
I made it span quite a range of frequency (x-axis) so that you can see some more interesting variations. As you can see, it starts out having very little response at frequencies close to DC. You should expect this, because of \$C_2\$ blocking DC. In fact, I asked LTSpice to vary that input capacitor so that it was \$1\:\mu\textrm{F}\$, \$10\:\mu\textrm{F}\$, and \$100\:\mu\textrm{F}\$ just to make this illustration clearer. But in all cases, you can see that by the time the frequency reaches about \$100\:\textrm{Hz}\$ (from the DC side), that the solid lines (regardless of color) have reached a flat spot that seems near to a gain of 10, or so.
Here's a zoomed up picture:
Now, you can see that the gain reaches an actual gain of 11. Which is just as I calculated above. It's nice to see when that happens. It also looks pretty flat over the audio ranges of frequencies, too. Probably also a good thing. (It even looks as though it might be useful a bit higher, as well -- perhaps it could have other uses than just audio?)
The little "peak" out at the high frequency end is called "gain peaking" and it occurs for reasons you cannot easily see on the schematic because the parasitics aren't shown. Nor are all of the parasitics included by LTSpice automatically, either. Only a few. Wires have inductance but LTSpice ignore it, not knowing anything about how long your wires are or their shapes or how close they might be to other wires, etc. So the actual behavior of a real circuit you make will be probably a lot different near the higher frequency end. Luckily, it's not important here. Just ignore everything in the plot beyond \$1\:\textrm{MHz}\$. (Stuff starts getting enough different out there.)
To address your question about why the voltage at \$N_1\$ might appear "distorted" when the output signal at \$V_{OUT}\$ isn't distorted (or put another way, to put your mind at ease as to why that is okay), consider that there is a closed loop system using the negative feedback (NFB.) The diff-amp (long tailed pair) of \$Q_1\$ and \$Q_2\$ does "whatever is necessary" to control the base of \$Q_4\$ to control \$V_{OUT}\$ per the input signal. What exactly it does, isn't important right now. Just believe for now that something (currently mysterious) will happen so that the diff-amp pair is "satisfied." The details are interesting. But you don't need to know them to get the point.
Now, let's merely examine quantities to see why your scope might show a distorted voltage signal (with respect to a perfect sine) at the base of \$Q_4\$ while at the same time seeing a nearly perfect sine at \$V_{OUT}\$.
Assume the above analysis is correct (it is roughly so.) Then the center voltage (quiescent voltage) at \$V_{OUT}\$ will be close to (but a little less than) \$10\:\textrm{V}\$. This means that the collector current must be close to \$10\:\textrm{mA}\$. Let's assume for a moment that the saturation current parameter for \$Q_4\$ is \$I_S=20\:\textrm{fA}\$ (small signal device.)
Suppose an output signal at \$V_{OUT}\$ swings from \$5\:\textrm{V}\$ to \$15\:\textrm{V}\$, around the center of approximately \$10\:\textrm{V}\$. It does so with perfection and is nicely sinusoidal. No visible distortion, at all. This means that the collector current will be \$5\:\textrm{mA}\$ to \$15\:\textrm{mA}\$, around the center of approximately \$10\:\textrm{mA}\$. So let's look at the \$V_{BE}\$ required for that:
$$\begin{array}{r|l}
I_C & \textrm{V}_\textrm{BE} \\
\hline
5\:\textrm{mA} & 682.4\:\textrm{mV} \\
7.5\:\textrm{mA} & 692.9\:\textrm{mV} \\
10\:\textrm{mA} & 700.4\:\textrm{mV} \\
12.5\:\textrm{mA} & 706.2\:\textrm{mV} \\
15\:\textrm{mA} & 710.9\:\textrm{mV}
\end{array}$$
(The equation used is \$V_{BE}=V_T\cdot\operatorname{ln}\left(\frac{I}{I_S}+1\right)\$, where \$V_T=26\:\textrm{mV}\$ and \$I_S=20\:\textrm{fA}\$.)
Note that the peak differences are \$-18\:\textrm{mV}\$ and \$+10.5\:\textrm{mV}\$ around a center voltage of \$700.4\:\textrm{mV}\$ at the base. If you were to place a scope on the base, you'd see almost twice as large of a voltage swing in one direction as in the other. Clearly, in terms of voltage at the base of \$Q_4\$, the voltage does NOT look like a perfect sine!! Yet the output is just fine.
(I added a couple of intermediate values, too, so that you can do a slightly better job of hand-plotting out the curve, if you want to do so.)
The diff-amp pair doesn't care whether or not the voltage swing at the base of \$Q_4\$ is symmetrical. All it is doing is trying to make sure that \$V_{OUT}\$ follows \$V_{IN}\$ and it is willing to do what it takes to achieve that. And it requires a distorted voltage signal at the base of \$Q_4\$ to achieve an undistorted signal at \$V_{OUT}\$. It is enough to know that this is due to the relationship of base voltage to collector current in a BJT, which itself isn't a linear one.
This points up the fact that BJTs are NOT current-controlled devices, from the point of view of a physicist. They are voltage controlled current sources (VCCS) devices. From a designer point of view, sometimes it is enough to see them as current-controlled current sources (CCCS): such as when working out how much current to supply the base for an LED On/Off switch. (Who cares about the base voltage then?) But at times like this, explaining why a signal here might not look sinusoidal when another signal there does look sinusoidal, then knowing that it really is a VCCS helps at those times. It also helps in understanding a current mirror. Etc. You merely shift views where needed. You need that flexible mindset, so that if you see something unexpected you can dig into your box of tools and find an explanation.
NOTE:
Let me also refer you to point #6 that I made at the outset. There is
a \$\approx 60\:\textrm{mV}\$ change of \$V_{BE}\$ for each factor of
10 change in collector current.
What is the current change going from
\$10\:\textrm{mA}\$ to \$5\:\textrm{mA}\$? It's a factor of
\$\frac{1}{2}\$, right? So you compute
\$60\:\textrm{mV}\cdot\operatorname{log10}\left(\frac{1}{2}\right)\approx
> -18\:\textrm{mV}\$. Cool!
What is the current change going from \$10\:\textrm{mA}\$ to \$15\:\textrm{mA}\$? It's a factor of \$1.5\$,
right? So you compute
\$60\:\textrm{mV}\cdot\operatorname{log10}\left(1.5\right)\approx
> +10.5\:\textrm{mV}\$. Again, cool!
As you can see, I had already told you about the effect back when I
first discussed the circuit. Had you fully apprehended point #6, you
would have been able to figure all this out entirely on your own
without the Shockley equation I handed to you, today.
BJT BEHAVIOR NOTE:
The following is going off-topic but is added in order to satisfy your curiosity, in comments below this answer, about signals you observe on an oscilloscope.
Here is how you might analyze a BJT's behavior (ignoring some effects and just focusing on only a gross simplification and excluding the dynamic resistance \$r_e\$ for now, as well):
$$\begin{align*}
V_E&=V_B-V_{BE} &\text{where } V_{BE}&=n\cdot V_T\cdot \operatorname{ln}\left(\frac{I_C}{I_{SAT}}+1\right)\\
V_E&=V_B-n\cdot V_T\cdot \operatorname{ln}\left(\frac{I_C}{I_{SAT}}+1\right)\\
V_E&=V_B-n\cdot V_T\cdot \operatorname{ln}\left(\frac{\frac{V_E}{R_E}}{I_{SAT}}+1\right)\\
V_E&=V_B-n\cdot V_T\cdot \operatorname{ln}\left(\frac{V_E}{R_E\cdot I_{SAT}}+1\right)\\
V_E&=n\cdot V_T\cdot \operatorname{LambertW}\left(\frac{R_E\cdot I_{SAT}}{n\cdot V_T}\cdot e^{\frac{R_E\cdot I_{SAT}+V_B}{n\cdot V_T}}\right)-R_E\cdot I_{SAT}
\end{align*}$$
Now, suppose you put a sinusoidal voltage at the base:
$$V_B=A\cdot\operatorname{sin}\left(\omega t\right)$$
Then you get:
$$V_E=n\cdot V_T\cdot \operatorname{LambertW}\left(\frac{R_E\cdot I_{SAT}}{n\cdot V_T}\cdot e^{\cfrac{R_E\cdot I_{SAT}+A\cdot\operatorname{sin}\left(\omega t\right)}{n\cdot V_T}}\right)-R_E\cdot I_{SAT}$$
Does that look like a sinusoidal result at the emitter of the BJT to you?? Even if you take \$V_{BE}=V_B - V_E\$, this base-emitter voltage still isn't going to be sinusoidal.
Now, the emitter voltage here will be across \$R_E\$ to generate an emitter current. Some of that current will wind up disappearing at the base, leaving a remaining collector current that causes a voltage drop across \$R_C\$.
Care to work out what the resulting signal looks like at the collector?? What is \$I_C\$? I'll leave that as an exercise!
Sure. Things "look" sinusoidal because they are, approximately. But in no way, exactly.
But now realize that if you remove \$R_E\$ entirely and make it zero, then you have a grounded emitter and you now know \$V_E=0\:\textrm{V}\$. Therefore:
$$\begin{align*}
I_C&=I_{SAT}\cdot\left(e^\frac{V_B}{n\cdot V_T}-1\right)\\
I_C&=I_{SAT}\cdot\left(e^\cfrac{A\cdot\operatorname{sin}\left(\omega t\right)}{n\cdot V_T}-1\right)
\end{align*}$$
You can get the collector current a little more directly now. But do you think it is sinusoidal?
You could apply a Fourier transform to the above equations and work out the frequency components, if you like. You could even add more to the circuitry to filter out the components you want to diminish. But in design, we often accept the warts.
Note that all the above analysis is what is called "open-loop." This means there is no NFB applied. The collector voltage is the complex product of a lot of stuff and there is nothing added (except perhaps the emitter degeneration resistor, which actually is "local" NFB) to cause the output to conform to the input.
The circuit under discussion has NFB! So while the base-emitter voltage of \$Q_4\$ can and will look a little distorted to the eye, at times. That's okay. Because there is NFB added here and used by the diff-pair to self-correct things. This is how NFB works to "linearize" a signal. By using NFB, we can get the output to better mimic the input than would happen if we just ran the electronic parts "open loop" where we'd be subject to all these crazy equations above.
YET ANOTHER NOTE:
To extend the discussion in comments and help here:
You have seen two cases of CE amplifiers. One with and one without an added \$R_E\$ for degeneration. All of the above should tell you something new, now. In cases where you see a CE amplifier without \$R_E\$, you must expect there to be some form of global NFB being applied. So you look for that.
If global NFB appears to be missing, then you know that the collector output will be distorted. More so for large signal swings, less so for smaller signal swings. (But a grounded emitter CE amplifier has a LOT of gain, so this almost always means there are large signal swings being requested by the designer of it.) It is almost always the case, though, that you will find the NFB to be present, because it will be very much needed.
Using an emitter resistor, \$R_E\$, provides "degeneration" which is important for a variety of reasons (temperature stability higher among them.) But it also provides local NFB to the circuit which helps to linearize the output signal. So in these cases, you may NOT find any global NFB present in the circuit, since the emitter resistor is doing some of that desired work.
Cripes. I've written a flurgen chapter of a book here. Look what you've made me do, Keno!!
Here is what LTSpice shows as the two output voltages for \$V_{OUT}\$ (blue) and for the base-emitter voltage for \$Q_4\$ (green):
In the above case, I've set things up so that \$V_{OUT}\$ is being exercised over its maximum range (arguably, anyway.) This helps to exaggerate the effects.
Note that the baseline quiescent value for the green curve is about \$715\:\textrm{mV}\$. So you can see that the peaks and valleys are not the same height here.
There is distortion. But to the untrained eye and without knowing the baseline quiescent voltage beforehand, the green curve trace may very well look kind of close to a sine.
Now, take a look at what happens when I cut the input signal in half:
In this case, the base-emitter voltage looks more "sine-like" than before. This is as it should be, and is expected. As the input signal causes the output to swing over smaller and smaller ranges, relative to its maximum, the closer the base-emitter swing will look to a sine. Even the baseline quiescent value cuts more closely to the midpoint.
Imagine how much closer it would get if the input signal were smaller still. |
H: Two Crystals & Two PIC18F Microcontrollers on same PCB
I am planning to have two PIC18F microcontrollers with 20 MHz crystal and 22pF capacitors on the same board. So, there will be two PIC18F microcontrollers, two 20 MHz crystals (one for each PIC18F) and 22 pF capacitors (two for each PIC18F) on the same board. Both the microcontrollers will be placed relatively close to each other. There will also be RF wireless communication module with PCB trace antenna on the board.
Can I have this kind of setup on the same board?
Would two 20 MHz crystals on the same board cause any interference to each other? Any problem of interference in clocking of each PIC18F?
Would this create any problem in EMC testing?
Is there anything that I should consider in this kind of setup and layout?
AI: There are advantages to using an external crystal oscillator module in a case like this and PIC18F MCUs are designed to accept such arrangements by driving one side of their crystal oscillator pins.
If both PIC18F devices are driven from the same source clock, there will be slight differences in skew between changes in their outputs and the processing of their inputs. But they will be close and there will be enough remaining margin between them to possibly be useful to you, elsewhere.
Running them on entirely separate crystal oscillators means that you know nothing at all about how their pins behave relative to each other; only that they will be roughly using similar timing. But if separate, then you aren't even sure they are exactly the same rate and they will almost certainly drift, relative to each other. There will some beat frequency energy. Whether or not it matters to EMC testing isn't something I can help with.
Using an external oscillator does put some longer lines for radiation, perhaps. And that may be a consideration for you. But you can probably arrange things to have similar trace lengths. So it may not be much worse.
The PIC18F devices, memory serving, can be driven through either of the clocking inputs. I say this because I am in possession of an internal Microchip memo I received a few decades ago where they discuss the details across about 5 pages of closely typed text. In general, Microchip tries to design their class-A inverter so that it runs "hot." This is to avoid after-sale calls from idiots who don't know how to design for a lower-powered class-A arrangement. It's better for them to over-power the inverter and live with the excess dissipation, than to power it for a well-crafted layout that they know far too few of their end-users will achieve and then receive all kinds of calls and angry yelling and screaming about how bad their chips are. So it just makes sense to over-power it and live with it.
But their MCU is chained to the XOUT (the output of their class-A inverter), of course. It turns out that if you drive the XOUT instead of the XIN, then the class-A inverter doesn't have an input signal (you can do a few things at XIN to help here) and it will reach a low power quiescent operating point and will NOT oscillate at all and will also not much load your external oscillator, too. (Since this class-A inverter can, at times, account for almost half of the total dissipation of an MCU, shutting it down can be a big win.) On the other hand, if you drive XIN, instead, then the class-A will do its job, burning oodles of power, and drive the XOUT and all the chained internals to the MCU (and you will pay a [usually significant] power penalty for that.)
So my recommendation, keeping in mind that you care about EMC too, is that you consider and test the idea of using an external oscillator, tied to the XOUT pins of your MCUs. Perhaps use a relatively high (not too high) impedance divider at the XIN input or else just try and leave it floating. Then examine the power consumption and make sure the two PIC18F devices still operate fine. Now, change things. Drive the XIN of the two devices and check the operation as well as the power consumption. If you have a way to look at the emitted radiation, do that as well for both cases. Then, finally, do all of the above but now with your first thoughts about using two different external crystals and associated capacitors and see.
In other words, use your imagination and test. See what works best for you. I don't think any of us can give you a "bright line" answer here. But it is not very hard to set things up and test these ideas. And since you are worried about EMC, this tells me that you have the project time and tools needed to do this properly before committing to a final design.
This isn't rocket science and it doesn't require a lot of work. I say that because there is really no excuse for not doing this testing. You just insert it into the planning schedule and execute on it. The output of this testing then feeds, trivially, the schematic editing (which can in any case proceed in parallel because the costs of an edit change based on the results are minor [so long as you didn't delay the testing so long that the schematic went to layout.]) Seriously, just do it. You'll not only have an answer for your case in short order, but a quantitative one with numbers making the decision well-documented and easy. Projects often include much, much more difficult and far less easy to resolve issues ahead. This one is a no-brainer.
Those are my thoughts off the top, for now.
You have added the following points:
"There is no communication between two PICs on the board." But then you also added, "Based on the wireless activity, first PIC drives a few transistors and the second PIC would poll the status of these pins at about every 100 mS." Given the long time you mentioned for polling, I take this point and agree that it may not matter which way you go here. Except possibly for EMC reasoning.
"The main reason for me to consider even a second PIC is to make use of more IO pins and divide the software overhead." Those are two different issues. There is a wide variety of options for the PIC18F family and if you are using the largest parts already and need more I/O, I can't fault the idea of using two.
However, you say you are using the PIC18F46K20 and so your only real reason for going to two parts about your latter point; the one regarding software overhead. I would strongly suspect this is more about possessing a smaller set of software design tools in your programmer skillsets, than really about a need. Chances are, in that case, it's a matter of hiring someone who has more skillsets to apply. I've rarely met a case (only one time in 45 years) where that argument would be correct in 20/20 hindsight. In almost all cases it's possible, with the right design and with the right tools applied, to get the job done without two. It's like the difference between the abilities of two different carpenters; one who only knows a few tools and must solve every problem with those, and another who knows hundreds more tools and can develop excellent approaches to solving the same problem more efficiently and more cost-effectively because of their broader and deeper skillsets.
Yes, I get the point about software changes at this stage in your game. You can't go to a larger part, supposedly, for these reasons. No, I don't buy the argument. Been there. But I'll leave it here and just say that I don't accept the point from you.
I get the requirements to support 9600 bps (not baud, as that is a term with a different meaning.) That's just a matter of the available divisors in the MCU and the allowable error specifications for the 9600 bps communications. Easy to work out.
I'm not at all considering the idea of an external RC oscillator. Instead, there are crystal modules (usually with 4 pins.) These come as cheap (but often excessive power consumption) devices, or as TXCO's with temperature stability (and excessive power consumption), or else something like the old Harris HA7210 low power oscillator IC (now probably obsolete.) To add even more, there are still some spread-spectrum oscillator chips available to those looking for a "quick fix" to their EMC troubles. So there are several approaches here. Again, creativity and imagination apply.
In the end, I think you are barking up the wrong tree. I think you need better embedded software programmers. Not a Rube Goldberg fix in hardware and two sets of software to maintain. But that's just me. |
H: How to lift the Flip Flop D equations of an ASM-Chart?
For example, I have the following ASM-Chart already done,which represents an automatic door
:
With moving sensors...
It has 4 state blocks, there are 3 Inputs:
P - Presence Sensor, A - door is completly open , F - door completly closed;
And 2 outputs: SF-The direction of the door (closing or opening) with SF = 1 means its closing and finally ON - which means the engine is working (the door is moving).
I have now to lift the state equations for Flip Flop's D. I already have the solutions but i don't know how to get there or what method to use,
AI: Hint: build a truth table for the next-state logic as a function of the current-state and input values. Since there are 2 bits of current-state (x1,x0) and 3 bits of input (P,A,F), there will be at most 32 rows in the table (2^5=32) if you draw out the full grid.
The process is basically just following the edges that transition from one state to the next state. Wherever the edge goes through a decision condition, the next state also depends on that input condition. Note: I am assuming True=1 and False=0, and I'm using _ to represent a don't care term. Here's the basic pattern for a truth table for 4 states, without considering the input conditions.
x1 x0 P A F | D1 D0
0 0 _ _ _ |
0 1 _ _ _ |
1 0 _ _ _ |
1 1 _ _ _ |
For the first state (0,0), the next state depends on input P. The inputs A and F are ignored in this state. So the truth table row for state=(0,0);P=0;A=0;F=0 must set next-state=(0,0); and the truth table row for state=(0,0);P=1;A=0;F=0 must set next-state=(0,1).
x1 x0 P A F | D1 D0
0 0 0 _ _ | 0 0
0 0 1 _ _ | 0 1
0 1 _ _ _ |
1 0 _ _ _ |
1 1 _ _ _ |
We also get the same output if A is 1, so those two rows can be copied for the A=1 variation. The extra terms will be reduced when you do the K-map. Or you can eliminate the duplicated rows from the truth table by designating the A and F inputs as "don't care". (Often that is indicated by "X" instead of "0" or "1", which incidentally makes the instructor's choice of x as a variable name somewhat nonstandard. Usually in the real world we use "s" to indicate next state.) Since you're going to be writing out the equations manually, might as well just mark A and F as don't care, so there's less stuff to write.
From state (0,1), the next state depends on input A (but not the other inputs).
x1 x0 P A F | D1 D0
0 0 0 _ _ | 0 0
0 0 1 _ _ | 0 1
0 1 _ 0 _ |
0 1 _ 1 _ |
1 0 _ _ _ |
1 1 _ _ _ |
The edge from state (0,1);A=0 leads to state (0,1).
x1 x0 P A F | D1 D0
0 0 0 _ _ | 0 0
0 0 1 _ _ | 0 1
0 1 _ 0 _ | 0 1
0 1 _ 1 _ |
1 0 _ _ _ |
1 1 _ _ _ |
The edge from state (0,1);A=1 leads to state (1,0).
x1 x0 P A F | D1 D0
0 0 0 _ _ | 0 0
0 0 1 _ _ | 0 1
0 1 _ 0 _ | 0 1
0 1 _ 1 _ | 1 0
1 0 _ _ _ |
1 1 _ _ _ |
Follow the same basic procedure to build out the rest of the truth table. The state machine output terms are developed in the same way. |
H: DIY Oven heater
I was not exactly the best studier in my class, when everything was explained, but I suddenly got interest in electrical engineering and now - how heaters are made.
I may not attempt to make one, before I educate myself a little. But it is just puzzling me and I cannot rest without knowing the answer - How are oven heaters made.
If you take a copper tube or kanthal/nichrome wire and give it a voltage so that they heat - isn't that short circuiting the voltage source?
How to determine what wattage is going to be needed to achieve the desired temperature? Let's say I want to achieve temperature levels up to 200o Celsium. This means the tube/wire itself must be somewhat hotter so that it provides this temperature in an area of say a pack of cigarettes.
I know that the diameter (thickness), the material, the length matter as well as the way they are formed - these factors are remotely related to the resulting resistance and wattage needed, but I am unaware of the right formulas to calculate them based on my expectations.
AI: The heating wire has a finite resistance and you can use ohm's law to determine how much current will flow through the wire given the voltage. You can also calculate the power using voltage times current. The power supply needs to be able to supply the current without damage, but as long as it can source the calculated current, you will not have a "short circuit" situation. Be aware that depending on what the wire is made out of, the resistance may vary substantially with the temperature.
Calculating the resulting temperature involves doing an energy balance calculation and requires the thermal characteristics of the enclosure the heater is mounted in. Generally, heaters are capable of generating much higher temperatures that are desired and a thermostat / temperature sensor is used to turn the heating element on and off to regulate the temperature. Where accurate temperature controls are needed, a thermistor, thermocouple or other temperature sensor is used with a PID controller to regulate the temperature. |
H: Replacement Triac
I have a simple dimmer module with a busted Triac MAC97A6. I want to replace that component so that the module will work again but stores near my area don't have that specific component. One store keeper suggested I replace it with a BT169D which he had.
Will this work out? I had a quick look at the datasheet and the parameters almost match.
Thanks in advance
Update: Links to datasheets and circuit diagram of dimmer module
MAC97A6 Datasheet
BT169D Datasheet
AI: The proposed replacement is 25x more sensitive with regard to trigger current in the relevant quadrants. Current rating is probably okay. Voltage rating is similar (and not very generous for 220V mains).
The big problem is that one is a triac and the other is an SCR, so no the proposed part is not a suitable replacement! |
H: Higher Order Filters
I am designing a signal conditioning circuit to remove all frequency under 20Hz for some EMG measurement. I have several questions about the circuit design:
For the instrumentation amplifier, should I go with higher gain (i.e. around X100) or lower gain (i.e. around x10)? I read several papers and they have competing designs (some said the lower gain is advantageous because the filter will not be saturated by the DC offset, whereas others said that the higher gain has better CMRR) (Note: I am planning to use INA128)
When making a higher order low pass filter, should I cascade multiple filters with gradual cutoff frequency or can I just cascade filters with the same cutoff frequencies over and over? (i.e. I want to remove all frequency under20Hz using a fourth order filter, then should I use filters with cutoff frequencies 30, 27, 23, 20Hz or just 20Hz x4)
When using op-amps with multiple channels, is the gain specified by the datasheet the overall gain of the op-amp or the gain of a single op-amp?
How to calculate the total gain of multiple cascaded filters in a circuit?
Thank you so much. Happy New Year!
AI: About dual and quad opamp ICs: the performance specs such as offset voltage, open loop gain and gain-bandwidth product are given for one opamp.
About the instrumentation amp gain: You must know how much DC offset and how strong signals can be expected from the sensors in your application. This is the very basic data for succesful design. You must do experiments and measurements for them if you cannot find it from reliable sources. Most of us do not know enough about EMG for good numerical answer. I believe it would be useful to include a preamplifier with differential output into the sensor. But that's only an opinion, I have no numerical facts.
About the filter:
Cascading second order filters to get higher order filtering is a good idea because it gives good control over the effects of component tolerances and make steep filter slopes possible. Cascading first order filters cannot provide steep filtering. That's a mathematical fact. To see it one must be able to understand transfer functions with complex numbers.
Cascading several identical well designed filters isn't the right way to good performance. It can be useful if you cannot perform proper design procedures or the specs are too fuzzy. It's possible to iterate towards a good result by experimenting altough there's no quarantee for it. Simulation makes succesful development by experiments possible in practice.
Total gain of cascaded filter blocks is the product of single block gains assuming the the effect of loading variations can be negleted (in decibels the gains must be summed). If you have passive circuits, the loading varies radically and the resulted gain is very complex to calculate.
Filter design starts from the wanted filtering effect. To be able to specify it you must have good data of expected interferencing noise signals and of the signal which you want to keep clean. The wanted filtering effect spec is numerical:
passband limit frequency
allowed passband gain variation
stopband limit frequency
wanted minimum stopband attenuation
wanted special frequency attenuations (for ex. you surely want to specify some special treatment for the mains ac frequency)
allowed passband phase nonlinearity
These are the limit specs for the wanted mathematical transfer function. Plenty of good transfer function models (Butterworth, Tsebychev, Bessel, Elliptic) has been developed and you must select which fits to your spec and calculate the parameters for it. This all is very basic stuff which has been well documented in filter synthesis textbooks tens of years ago. You can also find plenty of software to do all calculations. There's software that also help in the next step.
The transfer function must be splitted to second order blocks which can be built using common opamp filter circuits. There are also available special ICs for filters.
Finally you must simulate the design - especially the effect of the component tolerances and noise. Noise can be also measured from a test circuit, but the tolerances must be simulated if you are going to build several units. |
H: piezo stereo preamp
I have found several projects on piezo preamps but I cant find anything that can run 2 piezo inputs to make it stereo and uses potentiometer to control volume gain etc.
What I found is "Collin’s Lab: DIY Contact Mic" from make magazine website that uses an MPF102.
1. Can I just make 2 of them and make them share 1 ground?
2. Which component do I add/change to have a volume gain with a potentiometer?
3. Is it possible to have a "balance" from left and right inputs using sliding pot?
4. Can I use a 3.7v rechargeable battery instead of a 9 volt? I was thinking of salvaging parts from an old powerbank.
AI: Common GND , +9V and 10uF decoupling capacitor do well in stereo version
It would be useful not to add the output impedance of the preamp, so replace the 1.5kOhm resistor with the volume pot. Use logarithmic pot. 2200Ohm should be ok. Connect 4.7uF cap to the slider and the low volume end connector of the pot to +9V
Balance pot can be a 4700 ohm lin pot between the outputs, connect the slider to GND. The higher is the pot resistance, the less you lose the total volume, but the wider is the dead "no effect" area in the middle. Experiment. NOTE: It is good to change the 4,7uF capacitor to bigger value, say 47uF because this simple balance control increases the loading and causes attenuation at bass frequencies. This is negative loudness: when the balance control decreases the volume, low frequencies get more attenuation. This can be good - lower volume makes the sound less bassy and preserves some hearability in the total mix.
The preamp should be totally redesigned for low supply voltage to be sure. Simulate or do a test circuit. I have done no calculations, but I'm afraid of increased distortion. Piezo mics in guitars or percussion instruments can give hefty peak voltages and low supply voltage possibly does not provide enough room for the signal voltages to swing. |
H: BOOT0 circuit design in STM32f446
I'm designing STM32f446 chip in PCB in a project. It will be programmed through SWD.
but I'm stuck with (BOOT0) pin. I want it to be (0) as recommended.
The thing is that there is no enough info. about it.
I've looked at the data sheets to find the rating (voltage and current), I just found the voltage to be 9V !
I need to select the pull-down resistor, what should I do?
thanks,
AI: I'm stuck with (BOOT0) pin. I want it to be (0) as recommended.
[...]
I've looked at the data sheets to find the rating (voltage and current), I just found the voltage to be 9V !
Section 6.2 in the STM32F446 datasheet shows that the absolute maximum voltage allowed on the BOOT0 pin is 9V. However, a voltage above VDD is only used in one, rare, situation. In all other (i.e. normal) cases, you treat the BOOT0 pin as a normal CMOS input (input voltage between VDD and VSS).
The one situation where that 9V maximum voltage is relevant, is because the BOOT0 pin is also the VPP pin. One option for programming the internal Flash memory of the MCU (which is rarely used outside of mass programming on a production line) involves supplying an external VPP voltage on that pin.
That is the only time when VPP is applied to that pin, so that is the only time when the 9V maximum applies. See section 3.5.2 "Program/erase parallelism" in Reference manual RM0390 for your MCU.
what should I do?
For each family of STM32 MCUs, ST produces a "Getting started with [...] MCU hardware development" application note. For your MCU, you need "Application note AN4488 - Getting started with STM32F4xxxx MCU hardware development". That shows you how to connect the BOOT0 pin for normal use.
If you don't ever want to change this BOOT0 setting, you could tie that pin low (i.e. to your 0V rail), to force the MCU to always boot from your program in its Flash. However that will prevent you booting the MCU using its built-in bootloader (or from SRAM) in future, if your plans change. Therefore leaving the BOOT0 pin as a logic high/low selectable option (e.g. via jumper pins or solder jumper etc.) may be sensible, as shown in the ST "Getting started" application note linked above. |
H: On PIC MCU, a pin assigned an IO function the neighboring pin is also affected
I have been chasing the 'read modify write' problem for two days. This is a problem that when you write to one pin a neighboring in is affected. It suddenly started happening - different chips - different computers - different breadboard. The only thing I can think of that is in common is the programmer and the weather. I never had this kind of problem with any other embedded systems, Arduino, raspberry pi, Motorola, etc...
Before I give up completely on (PICs), is this an issue anyone has heard of before? is there a solution?
AI: These PICs do exactly what the datasheet says they do. If there is a problem, its with your code or your (lack of) reading the datasheet.
The important thing to keep in mind is that bit operations on a port register read the port, do the bit operation, then write the whole port back out. Note that reading the port register reads the instantaneous state of the pins, NOT necessarily what was last written to those pins. That can differ from what was last written in two cases:
The TRIS bit is set so that the pin is in high impedance state. The actual pin value is therefore up to the external circuit. If you permanently intend the pin to be a input in this application, then this case doesn't matter. The value written to the port register bit is irrelevant to a pure input pin.
The external circuit is holding the pin in the opposite state it was last set to. This could be due to a hardware bug, but also just due to slew rate limitations. The pin may not have had enough time to get to its new state before your code reads it again.
It's usually case 2 that people mess up. Here is a classic example of such a screwup:
; All Port B pins were previously configured as outputs.
;
banksel portb
clrf portb ;drive all Port B pins low
... ;many cycles pass
banksel portb
bsf portb, 0 ;RB0 starts going high
bsf portb, 1 ;Oops! RB0 not high yet, so gets set low
The simple fix is to leave enough time between the two last BSF instructions so that RB0 is solidly at its new state by the time you try to set RB1. Usually only a single instruction is enough.
Due to the timing of individual actions within each instruction, the example above gives RB0 only 1 Q-cycle, if I remember right, between it getting driven to its new state and PortB being read again. That's only ¼ of a instruction cycle. Even a single other instruction between the two BSF provides 5x more time for RB0 to get to its new state. That's usually enough.
However, don't go by rules of thumb. Do the math. The datasheet tells you the minimum current the PIC will source on attempt to drive RB0 high. You know what your external circuit draws, and the maximum capacitance on the line.
You will see a lot of bad advice out there to always use shadow registers. That makes the code more clunky, adds more chance of error, and is unnecessary in most cases. The real solution is to actually understand what is happening, then make sure the mechanisms that would cause trouble are not triggered. I have on very rare occasions used a shadow register for a port on a old PIC 12 or 16, but probably only once or twice.
Note that all newer PIC families from the original PIC 16 have LAT registers. These completely get around this problem. The LAT register retains the last value written to a port. The port register still exists, and as before, it contains the instantaneous value of the port pins on a read. So instead of doing things like BSF on the port register (BSF PORTB,1) you do it on the LAT register (BSF LATB,1).
All PIC 18, 24, 30, 33 and the new enhanced PIC 16 have LAT registers. You really only run into the read-modify-write problem on the 12 bit and old 14 bit cores. |
H: Thevenin equivalent voltage calculation
Hi please see diagram attached. I can calculate the Rth but I am confused about the equivalent Vth. The part that makes this difficult for me to understand is the 2A current source. Could you please help and explain how Vth is calculated and it's of value 6V.
Thanks
AI: The Emf source of 12V and the resistance of 6ohm can be converted to a current source of 2A in parellel with a resistance of 6ohm.
Both the 2A current sources are of same direction.
Hence the can be combined to a current source of 4A in oarallel with 6ohm.
Convert this 4A current source in parallel with 6ohm to an EMF source of 24V in series with 6ohm.
This entire set is in series in 6ohm, 4ohm.
The current in circuit is i = 24V/16ohm = 1.5Amp
The voltage acroos 4ohm is 4ohm * 1.5Amp = 6V.
Rth = Two 6ohm resistors in series and these two in parallel to the 4ohm resistors = 3ohm
Hence Vth = 6V and Rth = 3ohm. |
H: Oscilloscope AC coupling and PWM signal
I made a traditional PWM signal generator using a 555 timer IC.
However, when I connect the output (pin 3 of the 555) to my oscilloscope and set it to AC coupling, the signal shown on the display is around -5V and 4V.
I know that I should set my oscilloscope to DC coupling but I'm wondering why there is an AC signal since I powered the circuit with a DC source. (9v battery)
AI: set the AC coupling in oscilloscope
This is what setting the oscilloscope to AC coupling does: It puts a capacitor in series with the input, so that the average voltage of the signal is removed and you see only the AC components.
If you had a 0 to 9 V square wave with 55.6% duty cycle, the average voltage would be 5 V, and the AC coupling would subtract 5 V from the signal before it reached the scope's sampling circuit. So the signal you'd see on the scope would range from -5 to +4 V. |
H: Common source amplifier using mosfet: Why is my Id dependent on my Rd?
Since I'm (trying to work) in the saturation mode, the following formula should be valid:
Since Vto is a static parameter it shouldn't change, same for K. And Vgs is 2 as determined by the voltage divider circuit. My DC operating point simulation confirms this. This leads met to believe that Id should be stable if you change the resister R1. However, according to the simulations this isn't the case. (Even though Vgs is 2, and Vds is higher than 2. My Vto should be 0 so I should be working in the saturation region) If I make R1 higher, Vds becomes lower and Id also becomes lower. Can someone explain this to me?
AI: NMOS will be in saturation as long as:
$$(V_{GS} - V_{TH}) < (V_{DD} - I_D R_D)$$
your formula for \$I_{DS}\$ will be valid only in this region.
If you increase \$R_D\$, its obvious that at some point, the NMOS will come out of the saturation region and your formula for \$I_{DS}\$ is not valid anymore. |
H: 3 phase AC circuit problem
I am confused with problem 12.3. I have attached the solution and my attempt. I am confused why we are getting factor of 2, can anyone please help me ?
AI: Two things:
You calculated the average transferred power. You have calculated it right. You use RMS value phasors, the book uses peak values. That explains the factor 2.
The book wanted the instantneous power to the load. There's a proof that in every moment the total power is the same. Your calculation gives no info about how power transfer varies during one AC voltage cycle. Your calculation is NOT a proof for the fact that the total power transfer is constant (=the same in every moment). |
H: How can microinverters be as efficient, or more, than power optimizers of solar arrays?
According to Wikipedia:
solar panels produce voltages around 30 V. This is too low to be effectively converted into AC to feed to the power grid. To address this, panels are strung together in series to increase the voltage to something more appropriate for the inverter being used, typically about 600 V.
A power optimizer on each panel would then ensure the failure of one panel won't ruin the overall production of the serial circuit of panels, and roughly 600V would be delivered off of the roof to a single inverter.
Microinverters, on the other hand, do not spit out 600V from a serially connected loop. They convert to 120VAC directly at each panel from the ~30VDC output at the panel. These microinverters are more expensive than power optimizers, for obvious reasons, but are touted as being more efficient.
So:
The wikipedia article says it's more efficient to convert to residential AC from 600VDC than from 30VDC
Industry says the most efficient system is micro inverters, which converts to 120VAC from 30VDC
How can microinverters be more efficient than power optimizers if the most efficient way to convert to residential AC is from 600VDC?
AI: In a micro-inverter you can use MPPT (Maximum power point tracking) on each panel to ensure you are extracting as much power as you can from each panel in the given sun/shade condition for each one. Further there is more cable loss in a string inverter (600V) system. So I think overall system efficiency is better with mirco-inverters. Here's an article that may help you. |
H: Using two filters in series
I know my question is a bit broad, but I haven't found the answer to this question. As a work for university , i am asked to use an oscillator that produces a triangle wave and after that use two active filters (one band-pass and one second order low pass) so that the triangle waves becomes a sine wave . I haven't quite understood , why would two filters be needed and not only one that can do the same job and that question is in general not only for my circuit . I am going to be posting some photos of the schematic just for reference (Ι have highlighted the parts that my question is based upon)
AI: In order for this answer to be compact I will define a new function.
$$
tri(x) = \text{abs}\Biggl(\biggl(\bigl(x-1\bigr) \mod 4\biggr)-2\Biggr)-1
$$
And it looks like this:
And you want to get this sine out of it, which looks like this:
In order to do that, you can just simply apply a LP (low pass) filter. Then the higher frequencies required to make the peak of the triangle wave will be removed, and you'll be left with your sine wave.
But wait a second, there's one term that a LP filter passes through that is most certainly unwanted. That is the DC term, the 0 Hz. In the above image the DC term is 0 so everything works fine. But in reality there will be some offsets here and there, so in reality it might look like this:
With only a LP filter, you will get something similar to the sine wave above. A sine wave with a DC offset. Depending on how your instrument will be used, it might be wanted, but in most cases it is not wanted.
This can be solved with a simple DC-blocking capacitor, it will work as a HP (high pass) filter. But if your frequency is very low, in the 50 Hz region, then that capacitor will have to be pretty big, or small with high gain. A LP filter followed by a HP filter will together work like a BP (band pass) filter. Iff the LP filter's cutoff frequency is higher than the HP filter's cutoff frequency.
So if the end product is a BP filter, then you might as well use a BP filter instead of a HP filter. This will give you yet another LP filter inside the BP filter, so in some sense you will have 3rd order LP filter and a 1st order HP filter. That's better than a 2nd order LP filter and a 1st order HP filter.
If I were making this for myself as a hobbyist,then I wouldn't care about 3rd order LP vs 2nd order LP. I would just use this circuit instead. |
H: Why are most IR phototransistors slow?
Most NPN silicon phototransistors that I see (Everlight, Kingbright, etc.) have fairly poor rise and fall times, on the order of 10us.
The best one I've seen so far is the QT Brightek QSD8T120B with rise and fall times of 7 us. Manufacturers always specify these times given certain load current and resistance and collector voltage, and in this case they are 200uA, 100R and 5V respectively. 7us would allow for a best-case data transfer rate of about 71kbit/s.
What is the limiting factor here? Junction capacitance? Is there a different technology for IR detection that I should look for to get theoretical data rates of at least 500kbit/s?
AI: Photodiode + transimpedance amplifier can give you much faster response. Quite a bit of good information has been written. Anything by Phil Hobbs will be useful.
By keeping a constant bias voltage across the PD you can reduce the effect of the diode capacitance. A constant and large reverse bias will further reduce the capacitance.
More light will allow you to use a smaller (lower capacitance) PD and lower value feedback resistor, so you'll get faster response.
A phototransistor is like a PD between the collector and base of a transistor so you get the PD capacitance multiplied by the Miller effect. If you bias a phototransistor so Vce does not change you can get faster response out of it. |
H: can leds take varying voltage > listed voltage, with constant current?
My confusion stems from a an led that shows: Input(DC): 600mA-700mA / 3V-3.4V.
the product suggests a constant current led driver (same brand as LED) that shows: Output: Current 600mA (Constant) ; Voltage 18-34V
In researching I have read that excessive current will burn out the LED and over time as the battery drains the amps drawn gets smaller resulting in the need for a constant current led driver.
I am having trouble finding information for my question: Can LEDs receive a voltage above their recommended value if the current is constant?
Also, side question, if the current is constant at 600mA and the led's current takes 600mA, then I don't need a resistor?
update:
Thank you for all of your input. @mkeith was correct when saying "I think the point of confusion is that you don't understand the relationship between the power source and the load."
I was under the impression that only the value of the Amps through an led mattered. I thought that since the company suggested the driver with a minimum output voltage of 18V, when the LED that it was referenced from, had a voltage of 3-3.3V, that that meant the constant current is what mattered. I was asking if the higher voltage (18V from the driver vs. 3.3V of the LED) with the correct Amps would be okay.
I have com to realize why this driver was suggested. wiring the 3V LED in series to get about 18V maybe have been the intended use.
additionally, I better understand the difference between constant current and constant voltage and how the LED will control the amps (when constant voltage is applied) and the Volts (when constant current is applied)
AI: The driver is inappropriate for the LED because the minimum voltage from the driver (18V) is greater than the minimum LED voltage at 600mA (3V). The driver is likely designed for LED arrays that have at least 6 dice in series, so 18V.
When you feed the particular LED die you mention with a constant current between 600 and 700mA you will get a voltage (assuming you have not destroyed the LED) that will be between 3V and 3.4V (or maybe the voltage is specified at a particular current).
If you do not exceed the recommended current, the LED voltage should not exceed the range given (it will actually drop a bit as the LED heats up).
You only get to pick either the voltage or the current. With an LED, you are expected to pick the current and the voltage across the LED will be a result of that current. If you tried to run the LED from a constant voltage supply you would have to find the voltage experimentally and it would not be stable (and could kill the LED). |
H: Reading a huge number of analog sensors in real time
I'm trying to build a MIDI-like controller that has a neck like a guitar. On that neck, there is a huge matrix of pressure sensors. The controller will emulate 3 strings.
The way this works is:
There are 3 long strips of double sided copper tape (0.5 cm in width, as long as the neck) which are connected to power (3.3V or 5V probably, doesn't matter for now).
On these strips is a layer of Velostat, which changes resistivity based on pressure.
On top of the velostat will be another layer of rows or cells of copper tape, connected to something, that spits out a reading of the voltage through the velostat layer. As the neck is about 40 cm long, there will be at least 80 rows.
If you imagine the bottom 3 strips of copper tape as columns of a chart along the neck, the sensors will either be the cells or rows, depending on the method of measurement (I thought one might be able to multiplex the columns as well, then there could be rows.) There are a few special conditions which might make this easier though: As this is a guitar-like controller not every interaction needs to be measured! Only the touch closest to the body of the controller matters. Also a resolution of 8 bits should be accurate enough. 255 pressure levels are probably more than is needed anyways.
Now the difficult bits:
The measurement needs to be real-time-y enough to detect hammer-ons etc. (no idea how high the sample rate needs to be - estimated at several kHz for good measure and playability) and the digital output of the controller should either be MIDI (on 3 separate channels - one per string) or a digital signal that can be processed with a Raspberry Pi.
Now as my knowledge is really limited, I could not think of the right tools for the job. What I do know though is: It is possible. There is a similar but different controller that uses a very similar technique (which I practically reverse engineered until I noticed, that they have a patent and the information on how they do it is not as arcane as i thought), it is called the ROLI Seaboard.
TL;DR:
roughly 240 sensors
can be seperated into groups of 80 that are powered by the same line
this is a real time application, I need to acquire pressure from every sensor as it is touched (some conditions apply, see above)
Thanks in advance, I know it's a lot to read. I am thankful for any suggestion and would be very glad if you could help me accomplish the terrible mess I set out to produce!
Things I have thought of so far:
Multiplexing rows and columns, reading each cell with an MCP3008 or larger ADC and chaining up (daisy chain or tree like) ATmegas which only push the position-wise lowest interaction to the final signal, but from my calculations, that could possibly be bottlenecked by the communication overhead. Also an earlier model included ribbon potentiometers, which I have discarded, because the design was bad (several attempts, wasn't cool enough).
EDIT/UPDATE:
Thanks for the good suggestions so far!
Thanks to them I am now able to phrase my problem much more clearly:
I have a matrix of 80 rows * 3 columns of pressure sensors. When a human is interacting with the sensor matrix, several sensors in proximity will pick up the touch, but only along a column. The columns are mechanically separated. The sensors have a resistance between 100 Ohm and 1 kOhm. All of these sensors need to be read with a depth of 8 bit, processed and the results need to be sent with a rate of at least 1 kHz. So a single reading/processing needs to take less than a millisecond. The final output per column needs to be: 4 bytes for a float32 and 1 byte for a uint8. The float32 will indicate the averaged position of the first interaction along the column. An interaction is defined as a consecutive cluster of sensors with a pressure above a certain threshold. This is where the processing gets into the mix: the column will be traversed downwards until a reading oversteps a threshold. This will then count as the start of an interaction. The pressure and position of every sensor is memorized up until the first sensor, that falls below the threshold with a maximum of (probably) 4 consecutive sensors. From all the sensors of the recorded interaction, only two sensors will be processed - the one that reads the highest pressure (lowest resistance) and the highest one directly above or below it. The floating point position is calculated by averaging the two sensor positions weighted by their pressures. The overall pressure of the interaction will be just the addition of both pressures clamped between 0 and 255 (add both pressures of unit8 into a uint16 and divide by 2 without rounding, discard the unneeded bits - this should be fast). This needs to happen for every column. The result of the size of 15 bytes will then be sent over SPI to a small computer (Raspberry Pi B3) that acts as a synthesizer. I am not set on the method of transmission. If SPI is not the right tool for the job, I am willing to take any method of communication a Raspberry Pi can handle. Since this is a musical-interactive application, latency is crucial.
My exact questions are: Can this be solved with a single microcontroller without breaking the bank? I can not afford to buy several hundred dollars worth of ICs for a hobby project. What hardware would you recommend? Are there non-obvious caveats I need to be wary off?
The approach I derived from the answers up until now was to power each column individually, then read out the rows with 5 16-channel ADCs (ADS7961) connected to an Arduino over SPI. I am worried that this might not be the easiest/cheapest approach or not fast enough to reach a rate of >1 kHz.
Disclaimer: I'm a normally a theoretical chemist and a terrible amateur when it comes to electrical engineering, everything I know is self taught and without any professional background (which is in turn the reason I'm seeking help from more knowledgeable people). I do know my way around software though. Anything concerning software, I will figure out with enough time. Also, I'm German, so please excuse occasional grammar flaws.
AI: Depending on your price range, you may want to consider using an FPGA between your Raspberry Pi and ADCs, such as the DE0-Nano Board, which has good support as an introductory FPGA dev board. This solution has the advantage of allowing you to write code which will clock multiple/many ADCs at the same time and format your data in a way which is presentable to the Raspberry Pi.
You mentioned that you were considering the MCP3008. This chip is SPI, so you could connect a few devices together on the same bus with different CS pins. Suppose you connected three chips to a bus, so that gives you 24 ADC channels per 6 pins (three data lines and three CS lines). This means 240 channels for 60 pins, which is easily within the capabilities of the FPGA.
If you run the MCP3008 clock line at its max frequency of 2MHz, it would take (15 clocks/channel) * (8 channels/chip) * (3 chips/bus) * (1/2000000 seconds/clock) = 0.18ms to read all 240 sensors, corresponding to sample rate of 5.56kHz. |
H: CGR 17360 negative voltage
I have disassembled a battery pack for an old (2007-ish) Panasonic camcorder. The battery pack would not charge, so in the interest of pyromania science, I decided to try to learn what's up.
The two batteries from the pack are labelled CGR17360 Li-ion MH12210. I have found http://www.datasheetcafe.com/cgr17360-datasheet-lithium-ion-battery which seems to match.
I measured one of the batteries and it was stable at 2.90v. The other battery was measured at -1.20v, a negative voltage. I verified the label was applied correctly, and I verified I was using the meter correctly.
So the question is: What is going on here? Is there any hope of reviving the second battery?
Does anyone have any experience using these batteries specifically in their projects? If so, anything I should know before going in?
Hints for any of these would be appreciated.
AI: The battery cells most likely differed in capacity and were discharged to the point where one cell was completely discharged while the other still had some emf left. This results in the discharged battery being charged in reverse and is called cell reversal. It can result in a negative voltage on the lower capacity cell. A quote from wikepedia:
Generally, pushing current through a discharged cell in this way
causes undesirable and irreversible chemical reactions to occur,
resulting in permanent damage to the cell. Cell reversal can occur
under a number of circumstances, the two most common being:
When a battery or cell is connected to a charging circuit the wrong
way around.
When a battery made of several cells connected in series is deeply
discharged.
In the latter case, the problem occurs due to the different cells in a
battery having slightly different capacities. When one cell reaches
discharge level ahead of the rest, the remaining cells will force the
current through the discharged cell.
This stack exchange post discusses the same phenomenon.
The battery is most likely irreversibly damaged. |
H: Design a combinational circuit that has an output of 1 if the binary value is even?
There are three variables x,y,z respectively.
\begin{array}{|c|c|c|c|}
\hline
x & y & z & F\\ \hline
0 & 0 & 0 & 1 \\ \hline
0 & 0 & 1 & 0 \\ \hline
0 & 1 & 0 & 1 \\ \hline
0 & 1 & 1 & 0 \\ \hline
1 & 0 & 0 & 1 \\ \hline
1 & 0 & 1 & 0 \\ \hline
1 & 1 & 0 & 1 \\ \hline
1 & 1 & 1 & 0 \\ \hline
\end{array}
Is my table correct for even binary digit?
My book is suggesting.
\begin{array}{|c|c|c|c|}
\hline
x & y & z & F\\ \hline
0 & 0 & 0 & 0 \\ \hline
0 & 0 & 1 & 1 \\ \hline
0 & 1 & 0 & 0 \\ \hline
0 & 1 & 1 & 1 \\ \hline
1 & 0 & 0 & 0 \\ \hline
1 & 0 & 1 & 1 \\ \hline
1 & 1 & 0 & 0 \\ \hline
1 & 1 & 1 & 1 \\ \hline
\end{array}
I am quite confused?
AI: You are apparently given three binary signals, X, Y, and Z. These three together are taken as a 3-bit binary value, with X the MSB and Z the LSB. Your assignment is to make a circuit that produces a 1 when this input number is even.
Stop and actually think about it. What does evenness mean? Since you only have 23 = 8 possible input cases, write them all down. For each, show the decimal value of the number, and whether it is even or not. Then show the output your circuit is supposed to produce.
Do you see a simple pattern? Look closely at the Z input, and compare that to your desired output. |
H: Help with my H-bridge circuit using MOSFET
I had a problem with making H-bridge to drive 32V 6A Motor
voltage control is 12V
input: IN1/IN2
whenever i tried to test it the Amp goes up in the 32V motor power "it becomes short circuit"
if you need more information let me know thanks.
AI: That's really very simple. You have connected your p-type MOSFETs backwards.
Do you see the diode symbol which is part of the FET? Notice how it points downwards? There is in fact an effective diode, called a body diode, which results from the construction of the FET, and it behaves just like any other diode. As you have connected it, current will always flow through the diode, and the FET will behave as if it is always on.
Reverse the source and drain on the two IRF9630s, and try again.
Also, for what it's worth, you do not need Darlingtons as gate drivers for the p-types. Regular old NPN BJTs will work just fine.
However, at 32 volt power supply, you really should switch the 5k and 10k resistors on the p-type gates. In theory, these will provide 20 volt gate drive, and the FETs have a maximum gate drive of 20 volts. This means that you have no margin, and risk overdriving your gates. Replace the 5k with a 10k. This will give you a nominal 16 volt gate drive, which will be entirely adequate and does not flirt with disaster. |
H: Grounding considerations for 2018, and DVdd/Avdd connections
So, here we go again with the typical "what's the best ground layout?" question.
Seems this question has different answers depending on the application, manufacturer, and decade.
From what I've read, the trend nowadays is to use a single ground plane for everything. Avoid star grounds, ground plane is where it's at. Dedicate a complete layer to ground and add plenty of vias, especially for decoupling capacitors. Do not split the ground plane
This article, however, recommends making a slit to split the ground plane around the precision analog sections.
Regarding Analog VDD, the same article seems to suggest the DVDD in certain ICs is not really a DVDD in the same sense a AVDD to DVDD in a MCU is. An ADC, for example, doesn't need to be high speed, its digital pins don't need to drive large capacitive loads, and don't drive high currents. They can also be slew rate limited by source termination resistors. All of this makes the DVDD line on an ADC much quieter than a MCU driving 50mA on each pin, all of them switching at very high speed.
So I'm assuming, for the particular case of an ADC, a ground plane containing both digital and analog grounds may be "good enough". Then again, the part I'm using, a HI7190, has an evaluation kit with a rather complex layout, consisting of 4 layers with split ground and power planes. But this layout dates from 1994, back from when split planes were all the rage.
This particular ADC uses about 1 to 3mA for each power rail (AVdd, DVdd, AVss), so I don't see a reason why it should need different power planes, as there is no high current draw, especially if using source termination on the SPI lines.
It will be, however, connected to a rather noisy ESP8266 microcontroller. The ESP, as most other RF chips, is known to draw a lot of current (peaks in excess of 200mA) from the supplies. In this case, should the ground plane be split? Or, since the ESP8266 micros come usually in a PCB module, it will be connected to the main board with just one GND point, which will effectively "split" the ground plane.
AI: It's wrong to 'split' a ground plane, just because you hear it's the right thing to do. Similarly, star grounds, ground planes, gridded grounds, are all wrong, if you're doing it 'because somebody said it's the current fashion'.
Inappropriate ground connections can get you into trouble in various ways.
With high speed logic, you want your transmission lines between ICs to have the proper impedance, which means an adjacent ground. This is easiest to achieve with a ground plane. If there's a few mV of noise in ground connections and logic swings of 100s of mV or more, that's no problem.
With accurate analogue circuit, the many micro-ohms resistance of a plane, if it has a current flowing through it, can develop many microvolts of error signal at the input to an opamp. Here is where you should think about where the current paths are, where the voltages are sensed from. Star grounding can help organise thoughts, but if care is used in the layout, a ground plane can be got to work. If it can't, a judicious split in the plane to force currents to take another route can rescue the layout.
Unfortunately, there's no alternative to understanding what's required, understanding where the currents are going to flow, and keeping the error signals out of where they shouldn't be. |
H: LED Control with current sinking
I've been looking into the schematics for some Arduinos in detail to increase my understand of them. Take in particular the Arduino Zero schematic, we can see the RX/TX LEDs are connected as:
simulate this circuit – Schematic created using CircuitLab
As per my understanding, the MCU pin can sink 10mA of current. How is the value of R1 (330\$\Omega\$ in this case) chosen? Assuming we have an LED with a forward voltage of 2V and current of 20mA. (I don't actually know what type of LED is on the Arduino Zero - any ideas?)
AI: I did an image search, and the LEDs on the Arduino Zero look green to me, so I'm going to assume a forward voltage of 1.8 V.
If the supply voltage is 3.3 V and the LED forward voltage is 1.8 V, the resistor must drop 1.5 V.
Since I = U / R, then I = 1.5 V / 330 Ω = 4.55 mA.
My guess is that the value of 330 Ω is chosen because it gives a current that is well within spec, while probably also giving out enough light to be useful. But for a definitive answer you'll have to ask the designers. |
H: Switch on ESP8266
I'm not that good in electronics, so maybe what I'll write bellow might sound awkward to you. If so, please correct me where needed, or ask me for any other more details.
I'm trying to add a standard wall switch to an ESP8266 module. I've set as input for the switch 3v from the ESP module, and for output I've used: a 10k resistor connected with the - of esp, to clear the residual current; and also connected on an input pin of the ESP module. This seems to be working fine, but from time to time I get some signals like the switch was turned on/off, without anybody using it.
Is there another way to achieve this? Thank you!
Edit: I've added the schematic
simulate this circuit – Schematic created using CircuitLab
AI: This will help if the false operation is happening only when the switch is open. Disable the internal pullup/down resistor and don't use one of the GPIO pins that determines bootup.
simulate this circuit – Schematic created using CircuitLab
The 1K supplies only 3.3mA which is not really sufficient voltage or current for reliable operation of a mains wall switch, I'm afraid, but you may get away with it.
A proper design might use a 12-24V supply, perhaps 20mA, and reduce the voltage down to go into the MCU, with some transient suppression as well. |
H: How does ASK account for attenuation?
I'm reading about amplitude shift keying, where 2^n assigned amplitudes of a carrier map to n bits per symbol. Unfortunately, most of the introductory material only covers OOK, where n=1 and decoding is trivial.
For an ASK system where n > 1, i.e. a system where the amplitude can be modulated by multiple levels and not simply on/off, how would a demodulator account for attenuation? In other words, how would a demodulator account for the ambiguity present where a low level could actually be a low level, or could be a high level that's simply a weak signal? Would one need to have heuristics, or maybe an occasional checksum that would only match if the inferred attenuation is correct?
AI: The reason you state is why ASK with more than two levels is not often used except in controlled fixed installations.
One common way is to enforce that the maximum amplitude is sent regularly. There are various ways to enforce this, like a fixed bit every N bits, bit stuffing, etc. Some of these means can also provide some out of band information, like framing of bytes, packets, etc.
The receiver keeps track of the maximum amplitude recently received, and interprets the current received amplitude relative to that. |
H: Estimating Battery Life
I am working on a design that needs to operate outside on two AA batteries for at least a year.
I have optimized the design to reduce power and using a spreadsheet analysis I now have an average current consumption. I should be able to verify that is right by monitoring a prototype for a while.
I have the following pieces of information:
Average current consumption in mA \$Cave\$
Supply of Duracell AA batteries in mAh \$Bsupply\$
Starting battery voltage \$Bmax\$
Minimum battery voltage for DC-DC converter \$Bmin\$
Non-linear discharge profile from Duracell website https://d2ei442zrkqy2u.cloudfront.net/wp-content/uploads/2016/03/MN1500_US_CT1.pdf
Climate data
How can I take this to create a realistic estimate?
I think it is perhaps reasonable to use the average environmental temperature \$Tave\$.
Note - I chose Duracell simply as an exemplar of a quality battery. I wouldn't need/want to consider poorer-quality batteries.
Many thanks!
Update - average power consumption is 1.11mW.
AI: First, you need to make a realistic ballpark estimate before going to intergraion of discharge curves and buck boost converter inefficiencies.
The estimate would be: at 3 V input supply and 1.11 mW, the device will take about 0.45mA average (assuming 80% efficiency of converter, if any). The Duracell discharge curve says about 650 service hours at 5 mA discharge rate. At 0.45 mA it will take about 11 times longer, or about 7200 hours. This is about 300 days of operation. Which is about 20% short of one year.
Conclusion: you can't guarantee this device to work for a year from 2xAA batteries. No amount of more accurate mathematical massaging of discharge curves would change this conclusion. |
H: When will electromagnetic waves reflect? What are the criteria for reflections?
When an EM Wave comes to a boundary of two different media (i.e different electrical permitivity and magnetic permeability media), the things below could be seen:
Reflections
Refractions (Transmitted wave)
Absorpiton
Scattering (I am not sure)
I want to learn the criteria for the above events. For example, when do reflections occur? When does transmittance occur? Do they depend on the characteristic impedance or electrical permittivity differences of the media?
AI: Yea dependence is there.
At the interface between two mediums : 1 and 2, the amount of reflection of EM waves for perpendicular incidence, can be described by its reflection coefficient.
$$\rho = \left(\frac{\eta_1 -\eta_2}{\eta_1 +\eta_2}\right)$$
where,
$$\eta_1 = \sqrt{\mu_1/\epsilon_1}$$
$$\eta_2 = \sqrt{\mu_2/\epsilon_2}$$
similarly the amount of transmission can be described corresponding transmission coefficient
$$\tau = 1+\rho $$
EDIT:
The coefficients are defined in terms of amplitudes of the incident, transmitted and reflected waves. |
H: What component is this? Royal 283
I have no idea what this is and found nothing on google
AI: It is an "axial-lead cement wirewound resistor" rated at 3W. Resistance is 0.22\$\Omega\$ +/-5%. Here is a datasheet.
I've been in their factory. ;-) |
H: LDO with tantalums and circuit with ceramic bypass capacitors
I'm going to use MIC5205 voltage regulator.
According to the datasheet and many sites and discussions I must use tantalum capacitors for the output. This LDO is unstable with ceramic capacitors (low-ESR caps in general). So I'm pretty aware of that.
But I'm not sure if I can use ceramic capacitors for bypassing in my circuit.
This is my LDO:
This is one of ICs powered by that LDO:
Here it's C26 that concerns me (that is just a sample, there are more ICs that are powered from "+3V3AN" rail). It is ceramic cap and I'm not sure if it will or will not cause a instability in my LDO.
I would assume it depends on the distance between LDO and that ceramic cap.
If this hypothesis is correct I have no idea what distance would be sufficient.
UPDATE:
According to comments, it is a problem.
One solution would be to add a resistor (R7):
Unfortunately that would deteriorate line regulation.
AI: The distance of the ceramic cap from the LDO will not matter much. It will add some nH of inductance which will only matter at frequencies much higher than the bandwidth of the LDO. The ceramic capacitor however will be in parallel with the tantalum capacitors and could degrade the phase margin. There are many LDOs you could use instead that are stable with ceramic capacitors. This link might be helpful:
AN-1482 |
H: 1N5062 is getting hot at only half of its rated current
I have a rectifier bridge with 4x (GP)1N5062 diodes (body made of black plastic tube - like 1N4007). I have seen that they are getting hot, even if the current passing through the rectifier is 0.95 A.
I can only keep my finger on its terminal for 3-4 seconds, so let's say 45 Celsius.
Is this normal? I think, the diodes are rated for 2A, even though this forum says 1 A.
My digital multi-meter measures 23V DC voltage at the output of the bridge. However, if I switch to AC voltage it measures also about 2.1 VAC.
AI: You have 0.95A current, it makes 1V forward voltage according to proper datasheet of 1N5062GP.
That is 0.95W dissipated.
Thermal resistance is RthJA=45K/W
So the temperature of that diode will be 43C+ambient temperature. So in room temperature 25C that diode will have 68C. |
H: female 6 pin pcie power plug?
i am looking for a datasheet, or ideally an eagle library, that has a female 6 pin pcie power plug, like this:
as easy as it seems, i cannot seem to find ANYTHING online.
AI: This is a Molex 45718-0002 connector -- refer to their mechanical drawings for the dimensions and recommended footprint.
There's also a right-angle version of this connector -- Molex 45558-0003. |
H: Voltage regulator position
Hello if unregulated power supply (transformer, bridge and main caps) is 30 cm away from the circuit to feed, is it better to put the voltage regulator close to the circuit (long input and short output) or close to the power supply (short input and long output)?
AI: If your DC currents are high and the regulator is at the power supply then you will either need to use heavy cables and connectors or you may experience voltage drops along the wires that make the supply voltage too low.
However, 30cm is by no means long for power cables.
If the supply is only used on the target board it is generally better to do the regulation on the board itself so your wiring and connector resistances are a bit less critical. It also alleviates you of the necessity of having a separate PCB to house the bridge rectifier and capacitors which can also be located on the target board.
If the power supply is shared across multiple boards, sensors, indicators etc, it may be more appropriate to have a central power regulator rather than add additional connectors to the main board. However, when you do that you have to pay special attention to ground and power loops that may introduce noise issues. |
H: Check of my first Eagle boards
I am attaching two boards I have just designed in Eagle and would appreciate if any expert around here willing to take a quick look would flag any obvious errors in the design.
There is one board that would serve as a light switch PCB, sending a CAN message over the CAN bus. There would be plenty of them (I plan about 40-ish).
The other board is the final relay board. There would be just two, one for each floor. And SSR boards I already bought would be connected to the relay boards (which in turn would switch the lights in the house on and off).
I will also connect my USB interface to the CAN network (to the USBTIN 3 pin header in the relay) to be able to debug it (and in the final version also control from an ODROID over a web application). For pure debug purpose of the Microchip pins I have the DEBUG 5pin header in each board too.
Any hints or questions WRT to the design would be much appreciated. I plan to use a Cat 5 cable with RJ45 plugs. The switch boards therefore have double RJ45 plugs on them, and they all would be powered up on the bus line directly (only the relays have the power jacks). I know that is out of spec for CAN, but I plan to run al low baudrates, and right now I have 50 kbit/s in the code (see the link above), but more than happy to go way down.
Perhaps a question is WRT to the terminating resistor. I have been reading mixed recommendations on this one. Obviously the datasheet suggest using two 60 ohm resistors connected via a SPLIT pin. That assumes a 120 ohm cable, which I do not plan on using, I plan to use plain Cat 5 (which is said to be 100 ohm if I got this right). Then others propose using a resistor to match the cable impedance, which would mean two 50 ohm resistors instead.
I went for a bit of compromise so far (also because the local shop does not actually have 60 ohm resistors) and plan to put 56 ohm resistors there now. I do have oscilloscope too and plan to play around with that too if needed.
I indeed plan to play with this way more once built on my table before putting it out in our to be built house :) So far I only played with this setup on a breadboard.
For those interested in more background of what I am doing, check my GitHub account here (all the boards are there as well): https://github.com/PoJD/can-pcb and https://github.com/PoJD/can
AI: As mentioned in comments, some stitching vias between the two ground planes would help eliminate ground islands.
I'd also eliminate these ground fingers that could act as little antennas:
Watch out for acute angles between tracks, which can cause over-etching: |
H: Eagle create library remove "direction" in symbol
I am making a library in eagle, and I am currently working on the symbol. I made pins, but they all show a small "direction":
which shows up in little green lettering next to the pin, like this:
I cant figure out how to remove it. Does anybody know? Thanks.
AI: Those green circles and direction markings only show up in the symbol view and no longer show up in the schematic when the library is used. Here is an example.
This is the symbol view of a part in a library:
And this is the symbol when it is actually implemented in a schematic:
I assume you don't care about these markings in the design view of your part symbol as the users of your library will not see these markings. |
H: Switching Between Two Power Supplies Without Reverse Current
I'm new to electronics, so I'm bound to have gotten something wrong.
I'm designing a basic sensor and want it to be powered by USB by default, but use a lithium polymer battery when not connected via USB.
I designed a very basic circuit which uses two enhancement-mode P-channel MOSFETs, with uses fewer parts than most circuits I've found. What am I doing wrong? Below is a picture of my circuit. The grounds of both power sources are connected together, and both MOSFETs have a low VGS threshold.
I'm using a MOSFET as a rectifier. I figured this from here. My main concern is does this circuit prevent power from flowing from USB to the battery?
AI: I believe you can solve this with two ideal diodes.
Here's a question on this site asking/showing ideal diodes.
Here's two of those put in parallel with a \$5 V_{DC}\$ source and a \$5 V_{DC} + \frac{sin(2\pi500t)}{2} V_{AC}\$
As you can see, whenever the sign of the sine function is negative, it will be less than 5 V, then the other voltage source will take over. Whenever the sign of the sine function is positive, it switches to it.
The major flaw of this system is that you need logic level MOSFET's, like AO3401.
Another flaw is that there will be some quiescent power consumption due to the resistors.
Another way of doing this would be to actually get IC's made for this single purpose. Such as this one, for an example. |
H: Reading values on continuity test but there is no beep
When checking traces of my PCB I realized that checking continuity between one of the output trace and GND some values appear on multimeter screen but the buzzer does not beep.
On the Vcc trace there are two different capacitors. Does that depend on these capacitors?
AI: Your question would be better answerable if you posted the schematic of your circuit and showed where did you probe your circuit. Anyway, some general considerations can be done.
Continuity testers may work in a couple of different ways, but they usually act as current sources of smallish value (about a mA or less), and check the voltage across the probes (the displayed value may be that voltage, or it may be a reading in ohms).
The beeper is activated only if the voltage is low enough to be considered a short-circuit (i.e. the resistance is lower than some predetermined minimum, say 10Ω or 1Ω, depending on the instruments).
If there are components placed across your output trace and ground, or (more generally) if there is a path in your board made of components that leads from the output trace to ground, the continuity tester may give some reading.
Bottom line: yes, capacitors can give raise to a reading on a continuity tester. If they have small capacitance, and there are no other resistive paths between the probed points, you should see the reading getting higher (in ohms) while the injected current slowly charges the caps. If the capacitors are huge (hundreds of μF bypass caps, for example) you might not notice the increasing reading unless you wait a long time, especially if the injected current is very low. |
H: Unknown port in videocassette recorder JVC HS-D320S
I have an old videocassette recorder JVC HS-D320S, I want to ultimately try to digitalise some videocassettes, but I'm having troubling identifying the ports on the back.
PS: I'll clarify the question a bit more if you could tell me what those little grooves in the cable are called.
PPS: Is there a tag for videocassette recorders or something similar?
AI: These are SCART connectors - one for input from a video source, one for output to a telly.
Have a look at https://en.wikipedia.org/wiki/SCART |
H: Floorplanning vs Placement in VLSI
The major steps of physical design that I learnt from a VLSI lecture are: 1)Partitioning 2)Floorplanning 3)Placement 4)Routing. The question of mine is about the steps 2 and 3.
It seems like the steps floorplanning and placement are somehow overlapping. We decide the places of the sub-blocks in floorplanning. But in placement step, we also decide the places of the sub-blocks and this time we take the interconnections into account too.
Placement step seems to be the expanded version of floorplanning. Then why do we have these two as seperate steps to be done one after another? Or should we think of them as a single step that are done interchangeably?
AI: Floor planning can be considered your top level design and it may for example be guided by pin placement or interference between different modules. It is sensible to think about the overall design here; you may not want to place a sensitive analog component directly next to an RF oscillator.
Placement is then putting the gates within the overall plan. This may be fine first time round for a simple design, but it could be that your original floor plan does not, for example, allow all timing constraints to be met.
All the steps are related, so think of planning and placement as different levels of abstraction. It is usual to iterate through a number of designs to reach closure on all area and timing constraints. |
H: Inductive Coil - detecting open coil
We are using an inductive coil transformer for a sensor. We excite the signal with a low frequency (1kHz-3kHz), and what we measure on the secondary indicates the proximity of a part.
Generating the signal and receiving the secondary signal has been completed, but one important feature we absolutely need to figure out is how to in circuit detect if either of the coils has been disconnected.
A simplification of the overall schematic :
Any suggestions on what circuitry we could add for coil detection? DC offset does not effect the performance of the transformer sensor.
Thank you
AI: Sensing the current thru the primary is the obvious way to detect whether it is present. All you need is a small current sense resistor. It looks like this could be on the low side easily enough. Amplify that and look at it during the peak of the 2 kHz drive signal. If it's not high enough, then assume the primary is open.
For the secondary, maybe your receiving circuit can pass a little DC current thru the coil. That should be irrelevant to its operation, but would allow you to sense its presence, whether it is receiving any AC signal or not. Something as simple as a high-resistance pullup on one end with the other end grounded would do. If the DC voltage ever went high on the pulled-up end, you know the coil is open. |
H: Anyone recognise this capacitor and its symbol (circle with dot)?
Trying to repair an old Hameg CRT oscilloscope and looking at the schematics for the HV Z board I see the following capacitor symbol (in red box):
The capacitor itself looks (vaguely) like this:
I'm not suggesting it is a vacuum dielectric cap, it just looks like this. It's about 2 or 3 cm long with a glass tube and two metal ends.
The symbol is different from that used for electrolytics and other non-polarized capacitors (like polys and ceramics).
AI: It's the symbol of a gas discharge neon lamp.
More info here and Here |
H: Pinout for board to board ribbon cable
Update/significant change:
The question below is based on a false premise: taking into account that an IDC with keys pointing out from the cable on both ends swaps the front and back rows, simply rotating one of the connectors gives a 1 -> 1 mapping (thanks @DiBosco for pointing this out). The only remaining difference is that the notch of the connector on one of the footprints has to be on the opposite side relative to pin 1 as compared to the other.
I do believe that the fact that I readily made such an error in my thinking, which would have led to a pair of incompatible boards, shows that the following question is relevant:
When making connectors between PCB's, given the orientations of the connectors and the PCB's, and optionally the type of cable used to connect them, how does one make sure that the pins in the connectors are mapped correctly, before manufacturing the boards? For an example where the mapping is non-trivial, if I use two double row SMD connectors, one male the other female, using the same footprint on both PCB's (i.e. same pin numbering when viewed looking into the connector), and directly connect the PCB's (no cable), I do need to swap even/odd numbered pins on one connector relative to the other.
Also, related to the original question: now I still need to have two footprints, or I have to specify externally for assembly that the relation between the notch and pin 1 is different between the connectors on the two PCB's. Is there any neat way to deal with this?
Original question
I need to connect about 24 signals (give or take, depending on how many pins to dedicate to ground and power) between two PCB's. My current idea is to use a 0.050" ribbon cable with IDC connectors on ends (although see the end of this post).
When in use, the two PCB's will be laid side to side, and if I then place the connectors in the same position, and I want them to be keyed (say, a shroud with a notch on the side of the odd numbered pins), and connect the ribbon cable, I get something like this is wrong, I'm leaving it here for reference:
simulate this circuit – Schematic created using CircuitLab
i.e., pin 1 goes to pin 23, pin 2 goes to pin 24, ... and so on. The notches on the shrouds are on the side of the odd numbered pins.
My question is: while I can of course figure out the correct pin mapping by simply finishing the picture above, I feel it is a bit error prone (since there's no ERC or DRC checks across the two PCB's in my EDA). Also, I would imagine I'm not the first one to come across this problem, or one of a number of related pin mapping problems (say, stacking boards with connectors on facing sides). So I'd like to find a resource which would give the correct pin mappings for this, and preferably other related problems, but my google-fu has not been strong enough. Is there such a web site?
P.S.: any suggestions on better ways to connect the PCB's are welcome. PCB space is at a premium, I was just able to fit a 0.050" SMD -connector, but on the other hand the connection will be made by the end-user, so it must not be too fragile or difficult to connect. The device is a eurorack modular synth, so the user is familiar with connecting 0.100" IDC for the power, which is why the smaller IDC would at least bring some familiarity to the user. Currents and frequencies are rather small, < 50mA and < 1MHz.
Update:
an optimal format for the answer would be a footprint file (let's say KiCad, since that's what I'm using) that would give two footprints with differently numbered pins such that 1 -> 1 would give the correct result. The next best thing would be a table of mappings, which while error prone, would save one step where mistakes could be made.
AI: Here is how you should do. It is actually very straightforward. The PCB footprint is the same on both sides, and the numbering is the same too.
What you had wrong, probably, is that you weren't considering having the notch underneath the ribbon for one of the connector (and only one). |
H: Can I use a 20V or 24V to power up a piano that needs 21V?
The power adapter of the piano should be AC/DC 21V, 1.5A.
But I can't find in a short time to buy something exactly like that, but I found this options:
20V, 3A or
24V, 3A
Can I use one of this to power the piano or it's not ok?
AI: The difference of 1.5A or 3A does not matter. I.e. the adapter should be at least the Amperage requested (>1.5A).
However, for the voltage, it should in principle not be exceeded. As Kokachi wrote, first try 20V.
If you dare to try 24V (not advised), you run into the risk of burning the piano's electronics. But even if not (immediately), it results in more heat, which reduces the lifetime (probably).
Also check the polarity, if needed you can easily change this by resoldering the adapter cables. |
H: LED + resistor in parallel with equivalent resistor, all in series with a larger resistor, LED not lighting up
I don't know whether I'm missing something obvious here, but I'm pretty confused. Here are a few diagrams (the ✔ or ❌ indicating the status of the LEDs when I tested it):
Sorry for the lack of labels; call the 10K resistor R1, the left 1K resistor R2, and the right 1K resistor R3.
My question is: Why doesn't the LED come on in the first diagram?
AI: Because you are supplying it 0.6 volts through a 2k resistor
It needs ~2v to work. you basically made a voltage divider of the two resistors (the top one and the parallel one) that divides the 6v roughly by 10 to 0.6v |
H: BLDC Commutation and output states of half bridges
I am trying to run a BLDC motor using TI DRV832.
In the datasheet, there is the following truth-table, where I do not know what are GLx, GHx and SHx. Also, what does Hi-Z do?
I want to control the bridge directly, so I assume the bridge is something like this:
I think I only need to set GLx and GHx into H and L states and no Hi-Z state is needed. Is this the correct assumption?
AI: I presume GLx, GHx and SHx probably mean something like "Gate Lowside 'x'", "Gate Highside 'x'" and "Source Highside 'x'" x just denotes transistor pairs/half-bridges 1,2,3.
The L or H state in the columns below GLx and HLx refer to the transistor being switched on or off (L=low/OFF,H=high/ON) or rather it is the state on the gate of the transistor, and in the SHx column it refers to the output of this half-bridge being high or low. the reason you see "high-Z" in the SHx column is because the output can be "high impedance", z=impedance, meaning that no current can flow into or out of the half-bridge, in contrast to the L or H states where the output is pulled fully to GND (L) or Vcc/supply (H). This happens when both the high-side and the low-side transistor of the half-bridge are turned OFF |
H: How to trigger a "Relay Module With OPTO Isolation Support High or Low Level Trigger" with a momentary switch
I am a complete novice with anything beyond simple wiring of guitar effects and kits. I have a unit, a Roland GR-55, that has a momentary switch built-in. I want to trigger this switch with a separate unit (Boss MS-3) that contains its own momentary switches, and which allows me to "assign" those switches via a 1/4" TS type jack. These switches work like regular passive momentary switches. If I want to control the GR-55 switch externally via this second unit, I need to isolate the circuits so as not to fry the CPU in the GR-55 in case of some ground fault or other issue I might not know about.
I am looking at this relay module: HiLetgo 12V 1 Channel Relay Module With OPTO Isolation Support High or Low Level Trigger, $4.99
I think I understand SOME of how I might be able to use this in this particular situation: use the internal 9V DC power of the GR-55 to feed the DC +/- on the relay. Connect the two leads of the momentary switch in the GR-55 to the relay "open" and "common" contacts. This keeps the logic of the GR-55 isolated from the external switching system and the 9v supply.
What I do NOT understand is this: there is one contact on the transmit side that accepts a high or low level signal, but a simple momentary switch is simply a passive loop connector. Is there any way to use this kind of pre-fab circuit with a passive switch, or does it REQUIRE a second powered circuit/signal to trigger the relay?
If this board will not work, is there any other simple solution to this problem that would not require my having expertise in the area?
AI: I think you're overcomplicating things with the pre-fab, does-all relay module. That module is probably this:
simulate this circuit – Schematic created using CircuitLab
And to answer your original question, the part you're missing is R1 to bias it towards whichever DC rail you connect it to. I've drawn it as a pull-up because of tradition, in which case the controlling switch would go between IN and DC-.
But all you really need is this:
simulate this circuit
If the controlling switch S1 controls to the negative side instead, that works too; the order doesn't matter as long as you know it and design accordingly.
The relay itself provides the isolation, but I'm not convinced that you actually need it:
If the controlled switch and the controlling switch both switch to ground (see the note on my first schematic) and they both have the same ground, then you only need one wire in theory, straight across. The return current would flow through the common ground, which would technically cause a slight error in the ground voltage, which is what causes ground loop noise...but only if that current has audible frequencies in it. This is DC, which you can't hear and the equipment should reject anyway. Maybe it clicks when you press and/or release it, but that would be all.
If the controlling switch is already isolated, then you don't even have that problem. Just run two wires straight across and be done.
About the diode, D1, in both schematics: The circuits may work without it...for a while. But because you can't stop the current instantly through the relay coil, being an inductive device by necessity, it will generate whatever voltage it needs to keep that current flowing until the energy dies away. D1 provides a path to do that without requiring crazy high voltages (hundreds, maybe thousands of volts, briefly) that may eventually destroy a switch (and certainly a transistor, Q1), which the relay will happily do if that's what it takes to keep the current flowing. Any old diode will do, provided that its maximum reverse voltage is more than the relay's operating voltage. |
H: Proving equivalence between circuits
On page E-3, example E.3
In the example the author has asked us to prove that the two circuits are equivalent. On searching I found that circuits are considered to be equivalent if they have the same I-V characteristics. But how do I prove that they have the same I-V characteristics? On paper without any simulation.
AI: You probably should know a set of operations you can use to transform one circuit (consisting of linear circuit elements and current/voltage sources) into another equivalent circuit.
E.g.
equivalent resistance of two resistors in parallel
equivalent resistance of two resistors in series
\$\Delta\$Y-equivalents
Thevenin/Norton equivalent of voltage/current sources
equivalence of circuit containing multiple sources to circuit having only one source (superposition principle)
Any combination of such transformations turn your starting circuit into another equivalent circuit. If you can find a combinations of transformations that get's you to the desired circuit (using your creativity and/or experience) you have proofed that they are equivalent. |
H: When talking about input and output impedances, what are we comparing them to?
Let's consider a theoretical highpass filter:
simulate this circuit – Schematic created using CircuitLab
I'm trying to show that the worst-case input and output impedance is R but the whole concept of input / output impedance isn't really clicking for me.
Resistors have impedance. Capacitors have impedance. How can an input or output node have impedance? I think that they must be comparing the node to something but I'm not exactly sure.
Initially I was thinking that input impedance must be the amount of impedance that would be met as the current traveled through my RC filter. If the frequency was high, C1 would look like a short and the current would flow through R1 to ground. If the frequency was low, C1 would look like an open circuit and impedance would be infinite. Having a low input impedance is the worst-case scenario and I just showed that the lowest it could be is R1. So that seems to work.
Following that train of thought, I figured that output impedance must be the amount of impedance that would be met as the current traveled through ..... the rest of my RC filter? This train of thought suggests that C1 is irrelevant because the only place left for the current to go is through R1. That is the right answer but it seems like I got there incorrectly.
Is this right? If not, can you please explain it?
AI: §
The impedance of your circuit seen from the input is the impedance of the capacitor (depends on frequency) plus the impedance of the resistor (just R), seen from the output the two impedances are parallel so the impedance is the impedance of the capacitor parallel with the impedance of the resistor. Zc1//R1 calculated as Ztotal^(-1)=Zc1^(-1)+R1^(-1). and Zc1 can be calculated as 1/(2 * pi * f * C) where f is the frequency and C is the capacitance of C1 in farads
§
Look up thevenin equivalent, it will help you understand how an output/ input can have an impedance. the impedance is basically just the slope between the voltage and current, if an increase in voltage at an input or output of 1v leads to an increase in current of 0.1A then the input/output has an impedance of 10ohm
§
It is important to note that the way the impedance of a capacitor or an inductor differs from the resistance of a resistor is in that they don't dissapate energy due to the current*voltage in them, that is because there is a 90deg. phase difference between voltage and current in capacitors and inductors. |
H: Switch for turning off MSP430
A MSP430F1232 is connected to a PL2303, i.e. URXD0/UTXD0 are connected to the PL2303 TX and RX. VCC and VSS also come from the PL2303 (over USB). In addition, a switch with a pull-up resistor and a LED with a resistor to ground are connected to P1.0 and P1.1.
The circuit and program are working as expected. However, the circuit is also working when VCC is not connected. The reason is a voltage of about 3.2V on the UART TX. When I also disconnect the TX connection, the MSP430 stops. Nevertheless, when the TX is connected, the MSP430 still works as intended and the serial interface also works.
How would one implement a switch to completely turn off the circuit / MSP430? My idea of using a switch between the PL2303 supply and the VCC pin is not sufficient.
AI: The problem is that the PL2303 (and most UART configurations) idle with a high output on TX out. This ends up powering your MSP430. Yes, the logic high output of PL2303 TX is powering your MSP430 through one its input pins.
That's because the inputs of most CMOS ICs have protection diodes that are connected to VDD, like in this diagram (from this useful website)
So when the PL2303 drives the MSP input high and MSP430 power is disconnected, that voltage ends up going through the protection diode and into the MSP430 power rail. So you are powering your MSP with the PL2303!
So to solve this, you can do a couple of things:
1) Insert a current limiting resistor to limit the current going into the MSP input. This generally a lousy solution because a small amount of current still flows, and your UART speed will be affected.
2) Gate the TX of PL2303 so that the MSP input is low when you want it to power off. Here's a simple example:
simulate this circuit – Schematic created using CircuitLab
So when MSP430 power goes low, the AND gate input goes low and its output goes low. There are many ways to do the same; just an example. |
H: how to determine the pinouts of a 6 pin optical slot sensor/encoder?
i have a 6 pin optical slot sensor/optical encoder, which does not have a part # on it. I need a way to determine what each pin is. I will award the answer to the first answer that accurately explains the process of determining the function of each pin. thanks!
AI: I am assuming you have no markings to be able to obtain a spec-sheet for the device. If you do this is a non-starter.
If not, you need to look at it mechanically first.
One side will likely be an LED the other with have either two photo-diodes or photo-transistors.
Once you identify the LED side you can attach the other side pins through a resistor in combinations and polarities or all pairs to a low voltage supply and see what happens when you turn the LED on and off.
Chart out that information and you should be able to identify the "truth-table" of the device.
If you can't identify the LED, repeat the last step for all pins. That is apply low power through 2 (say 5ma), measure the others, reverse, try the next two.. etc. |
H: Simplest way to create regulated 400VDC from 12VDC
I would like to create a regulated 400VDC supply with relatively low ripple (less than +-1VDC ideally). Required current is very low (< 1mA). V_IN is 12VDC. Currently I have a boost converter that is able to create well above 400VDC based off a NE555 in astable configuration and a small MOSFET. It works very well and I use constant switching frequency (30 kHz) and adjust the duty cycle so that the output voltage is correct.
However, when the source is loaded, the voltage breaks down and I do have slightly varying load and would like to ensure that the output voltage is regulated to around 400VDC. Which approach (IC or discrete) works well and which works the easiest?
AI: Your current is low .This means that a diode pump could have cheap small caps .Boost converters can be operated into a diode pump .You could make say 50 volts with the boost converter and use a multistage diode pump off the drain to make your needed 400VDC .This does mean 8 pump stages but 4148 diodes and 100n caps are cheap.The advantage of this is that you can use readily available boost chips and a standard garden variety SMD coil because the expected peak to peak volts across the coil is only 50VDC.The boost ratio is not too high so old school hard switching peak current mode will work OK.What I have done also is use a soft switching boost converter made from discretes running a higher boost ratio using BAV21 pump stages at 160 volts per stage . |
H: How does a cable insulator prevent energy loss?
So I was watching a recent video for TED-ED titled "How to practice effectively...for just about anything - Annie Bosler and Don Greene," and at one point the speaker said the following:
Myelin is similar to insulation on electrical cables. It prevents energy loss from electrical signals that the brain uses...
I thought cables were insulated just to protect us from getting electrocuted or to protect us from leakage current... Can someone please explain?
AI: Insulation goes beyond just preventing a nasty shock. It prevents bare wires from catching on fire in an un-fused circuit. For wires that have 20,000 volts AC or more a combination of neoprene or silicon insulation with an outer insulator of Teflon helps prevent corona discharge of the energy into the air.
Over distance of many meters coronal discharge can waste away a significant amount of energy. This can also produce a irritating odor known as ozone, which is deadly in high concentrations.
As an example at my previous job we charged a capacitor bank with a 32 kilo VDC source, but it had a high AC ripple in it. The wires were rated for 40 kV but we heard the hiss of coronal discharge leaking out from the 4 meter long pair of wires.
This prevented us from fully charging to the expected 32 kV. So I had to buy and install Teflon tubing 31 mils thick and just slightly larger diameter than the wires. It solved the corona discharge problem.
Insulation goes beyond preventing a shock or a short-circuit. It can prevent high voltage from leaking into the air, which prevents loss of energy, and a major if not fatal shock hazard, and the release of ozone gas.
EDIT: You cannot prevent coronal discharge in high-tension wires. The power company simply accepts the losses, especially in rainy conditions. You might be thinking of the ceramic 'bells' that are used to prevent arcing by creating a series of air-gaps. The high-tension wires hang from these stack of bells, mounted to a steel tower. I have not heard of a 'Coronal Ring' before. |
H: Question regarding dimension when creating an EAGLE Footprint
Hi so i was trying to create a footprint based on this dimension. But i'm not quite sure what these two numbers mean exactly? Are they MAX/MIN? Which one should i use? Thank you!
AI: The two dimension means the Maximum and Minimum size. You need to use the maximum size to avoid interference.
And the data inside brackets are inch unit.(Former size data means in millimeter.) |
H: Why is this switch sparking?
I have a Vega 650 power supply which does not have a power switch. So I wired a switch into the power cord. When I flip the switch, there is about a 1 second delay, then the power supply fan turns on and the switch audibly clicks and sometimes visibly sparks. I get about 1 - 3 audible clicks and 0 - 1 sparks. The power supply is 120V 11A MAX but is not currently connected to any load.
I did have some difficulty soldering the copper wires to the aluminum contacts inside the switch housing. I commonly find that solder flows nicely onto the copper but less so onto the aluminum. Would a poor solder connection cause this?
AI: Why is this switch sparking?
This is an inline switch for lighting. Intended for loads similar to one lighting armature.
Instead of a light of less than 1 Amp, you have attached an 11 Amp power supply.
The differences from lights are:
- Your load has inrush current.
- Your load is more than 10 times an old incandescent light.
Your switch is not intended for the load. Get a better switch. |
H: Help me out with DC - AC inverts!
so ive got quite a bit of questions about these DC - AC converters, so ive got an inverter wich converts 9V DC alcaline battery to around 240V AC output, my questions are, is this circuit realy useable, because i see videos on youtube a 9v battery can power 120v or 240v light boulbs, so im wondering would this be a heavy load on the 9v battery, is this realy useable, can it realy power devices like a computer monitor or such, ik it sounds crazy, so please explaine to me why this type of circuit is bad and whats wrong with it, my worry is that its to of a heavy load for the battery and the battery would expload! here's the datasheet of the inverter component https://www.electronicsdatasheets.com/manufacturers/endicott-research-group--erg/parts/lps0935
AI: The power supplied by a DC->AC converter to its load comes from the DC input.
The part you've chosen, an LPS09-3-5, is designed for driving an EL panel, rated at 5 unit loads. In this case, a unit load is defined as 20nF//100kohm, taking 6.1mA at 120v rms at 400Hz. The specification goes on to say that each unit load requires 500mW of input power from the battery. I notice the VA of a unit load is 730mW, which confirms the low power factor of the load.
Will the output of 120v 30mA 400Hz (into a 100nF//20kohm load) do what you want it to?
How long will your 9v battery last delivering 2.5 watts? |
H: Is it probable that a 15VDC device be damaged by a 14-16VDC battery?
I have a KBD101 (a brushless motor controller from Thorlabs) that, in the manual, specifies a regulated 15V/2A supply. I need to power it from a 14.4V/10A Li-ion battery. The other electronics are rated at 12V and are protected by LDO regulators but my understanding is that I can't do that for the KBD101 because the voltage from the battery is going to vary between 16-14V as it discharges.
How likely is it that the device will work reliably with this varying voltage? I've connected it to a bench supply at 15V and it draws 300mA during the experiment.
I've asked Thorlabs but, understandably, they can't recommend such a use-case.
Thanks in advance!
AI: The voltage input tolerance is specified in the manual for the Thorlabs KBD101, pp 63. See screengrab below.
It clearly states the voltage tolerance to be +/- 3% - 14.5 V to 15.5 V. It's impossible for anyone of us to tell you any different without knowing what goes on inside the unit. It might handle a wider tolerance, but I'd not recommend you trying, that's an expensive bit of gear ($731 at time of answer) to experiment with. |
H: Small SMD components: are they really capable of withstanding high voltages?
You can easy find some SMD components which are pretty small for such a high voltage (500V @ 0805 package for example - crazy?!). 0805 case would have 1.3 mm distance between the contacts, so I doubt that this voltage would be normal under real world circumstances.
So my questions are:
Would you pick such component for your circuit? I'd better place two or even three components in series to make the voltage across 0805 case not more than 100-150 Volts or 150-200 for 1206. But this estimation based on my sensation (I never experienced any failures or never researched the limits)
Probably such components should be used inside sealed cases or under a layer of a good insulating varnish (which is rare for me)? This could explain their existence.
Do any of you guys have any experience with these components? What is the real-world V/mm limitation?
AI: When deciding the voltage rating of a 'component on a board' system, you need to define what sort of rating you mean. Safety critical is much more stringent than simply working.
For instance, the withstand voltage on a clean dry board will be much higher than the rated personal safety voltage on a dirty board in a damp salt-laden atmosphere.
If the component is rated at 500v, then you can assume that the component itself, under conditions that the manufacturer specifies, will withstand 500v.
Would an 0805 footprint meet the creepage clearance regulations for separation between mains carrying and low voltage tracks, for personal safety? No. However, 'mains' is expected to have transients of at least 1500v on it, which is why capacitors for mains connection are specifically rated for such, see X and Y rated capacitors. For a regulated 500v, in a dry environment, when personal safety is not an issue, then there's no problem supporting 500v across an 0805 footprint.
If you are intending your PCB+components system to be used in a dirty damp environment, then you may well need a conformal coating to mitigate board surface contamination problems, even if you don't have to meet saftey rated creepage distances. |
H: is this li-ion battery still safe to use?
While replacing my phone's screen I seem to have scratched and maybe damaged the battery. I don't know much about li-ion batteries so I'm wondering if it's still safe to use, or if I should look for a replacement.
AI: No. That could be dangerous. Dispose of it properly, and be more careful next time. |
H: Parallel resistors, why? (Basic electronics)
I'm curious as to why R1+R3 is parallel to R4 and not R2? could someone please explain this to me.
What rules are R2 violating that makes it non-parallel (and what makes R4 parallel)?
Thanks.
What i was thinking: (R1+R3)//(R4+R2)
Correct expression: (R1+R3)//R4 + R2
AI: Remove the ground from the schematic, and it should be obvious that R1+R3 is in parallel is R4.
Remember that ground is just the one point in a circuit we declare the 0 V reference to implicitly measure other voltages relative to. In this case, no current can flow in or out of the ground connection since there is no other ground connection anywhere in this circuit. Since no current flows thru the connection, you can remove it for the purpose of analyzing the circuit. |
H: DC and AC coupling peak-peak difference
I have been measuring signals in an oscilloscope and I have stumbled upon a practical exercise of calculating the DC offset of a signal. Basically what I did was turn on the DC coupling, take the maximum voltage (eg. 2.36 volts) then turn on the AC coupling , take the maximum voltage again (e.g., 560mV) and finally DC offset= 2.360-0.560 Volts=1.8 Volts (or so I thought) Though the exercise continues and states that the DC coupling shows us peak-peak 1.04V and the AC coupling 890mV peak-peak. So my question is the following: If the DC offset is responsible for "lifting the signal" , how is it that the peak-peak is different for the same signal in the DC and AC coupling?
AI: An oscilloscope's AC coupling feature removes the DC part of the signal by placing a capacitor in series with the signal. This is essentially a High Pass Filter. So some attenuation is expected.
Generic High Pass Filter:
In general, AC coupling is a convenient way to keep the scope trace on the screen when observing small signals "riding" on top of larger signals that are not of interest. But, as you pointed out, to make an accurate amplitude measurement, DC coupling should be used along with the time it takes to recenter and adjust the oscilloscope's amplitude to make an accurate assessment of the smaller signal. |
H: Paralleling MOSFETs: Can I use a common gate resistor, or do I have to use a separate one for each MOSFET?
When calculating gate resistor for a single mosfet, first I model the circuit as a series RLC circuit. Where, R is the gate resistor to be calculated. L is the trace inductance between the MOSFET gate and the output of the MOSFET driver. C is the input capacitance seen from the mosfet gate (given as \$C_{iss}\$ in MOSFET data sheet). Then I calculate the value of R for appropriate damping ratio, rise time and overshoot.
Do these steps change when there are more than one MOSFET connected in parallels. Can I simplify the circuit by not using separate gate resistor for each MOSFET, or is it recommended to use separate gate resistors for every MOSFET? If yes, can I take C as the sum of gate capacitors of each MOSFET?
simulate this circuit – Schematic created using CircuitLab
In particular, I am aiming to drive a H-bridge made of TK39N60XS1F-ND. Each branch will have two paralleled MOSFETs (8 MOSFETs at total). The mosfet driver section will consist of two UCC21225A. The working frequency will be between 50 and 100 kHz. The load will be primary of a transformer with an inductance of 31.83 mH or more.
AI: Depends,
And that depends is based upon your REAL circuit not your intended circuit
simulate this circuit – Schematic created using CircuitLab
Your practical placement will create something like this (there will be a few other stray inductances but for now this will do).
If you think about the current flow when you charge/discharge the gates it will be
MOSFET driver
Gate resistor
Split path to the MOSFET
via each MOSFET source
recombine at the common reference
via some path back to the MOSFET driver
This loop is one you need to keep BALANCED & ideally minimised. Imagine if due to poor layout/tracking/wiring the right FET's source had 10x the inductance on the gate and/or source, it will switch slower which mean the left FET will experience more of the transient responses.
In large power devices they use a small individual gate resistor per die & then parallel all the devices up, but they keep the layout really-really tight & equally they are in control of the MOSEFET/IGBT batch characteristics for very closely matched devices . If you cannot do this then it is better to have a separate gate resistor.
Parallel IGBT die on a common substrate
The benefits of a separate gate resistor is, if you need to tune the response of one leg based upon other observations, you can |
H: How to set up Keil Logic Analyzer to read specific pin?
How can I set the Keil uVision 5 Logic Analyzer so that I can read the status of a specific pin, example high or low?
I have read the official docs here, however it does not say anything of the sort. I know it can be done as I had seen a demonstration which ustilised this useful function, but can't remember how.
Let us say I want to monitor pin 10 on port 0. I have tried many variations such as:
PINSEL0<<10
0<<10
P0.10
, however I keep getting the same error message below. Any help on how this can be done?
AI: The following worked for me:
(port0 & 0x00000400) >> 10
This specifies an AND mask for the signal value on port 0, while shifting by 10.
Important to set the Logic Analyzer functionality as bit and not analogue.
Even easier is:
port0.10 |
H: How to explain why equivalent resistance between two points in this network is dependent on specific resistance?
The original network is an square network with two diagonals as you can see here there is no intersection between the diagonals.:
The question is what is the equivalent resistance between points A and C as wel as A and B ?
I rearranged the network to the equivalent network here under (all the resistances which labeled as '1k' below is actually 'R' in original network):
now i see the bridge of Wheatstone so the equivalent resistance is $$\frac{R}{2}$$. The bridge is in equilibrium and the current in 'r' is zero. Now i want to evaluate the equivalent resistance between the points A and C, if i take exact the same rearrangement and suppose that there is no current in resistance 'r' i would find an expression independent of 'r', but that's clearly false and i wonder why ?
The correct answer is $$\frac{R(3R+(5r)}{8(R+r)}$$. I find it by using the general methode.
AI: Take the original circuit, redraw it the way you did for A and B resistance, but for the resistance between A and C, and you will see that \$r\$ is not the center resistor that holds no current, but one of the leg resistors that does carry current.
Measurement points matter.
Two ways to think about it: If you imagine the network as a system of springs, measuring the resistance between A and B is like pulling on those two points, and seeing how the system reacts. You can easily imagine \$r\$ not moving much because of how the system is laid out. But, if you pull at A and C, \$r\$ will move a lot.
Another way to think about it is to imagine you set A to ground and B at 5V, and look at where the current flows. Point C is at 2.5V, and \$r\$ has no current flowing into it. To conduct the same test between A and C, we could just hold C at 2.5V, and move B up to 1.25V. Adding voltage into B in this way changes how the currents flow through the whole system, and now we'll get current flowing through \$r\$.
Learning something like this is like juggling or riding a bike. It is easy to understand the theory, but just like you need to run your body through biking before you can get all the bits used to it, you need to run your brain through this stuff for a while, in different ways, smashing into trees and shrubs, and then it all just clicks. |
H: beginner h bridge questions
i have some questions regarding the L298 h bridge.
what are the current sensing pins, and how do i use them?
why is there a supply voltage and a logic supply voltage?
what do the 2 inputs do? what will happen if they are both high?
AI: 1) The sense pin allows you have a sense resistor so you can monitor and limit current
2) They are separate so you can drive the logic from one voltage (up to 7 V), and the thing the H Bridge is driving from a different voltage (up to 50 V)
3) The two inputs are to change the 'direction' of drive current. With an h bridge usually to choose which way a motor turns. |
H: Are Coaxial DC Power Plugs with Grounding available?
I have a LCD Monitor that has a 2.1mm Right Angle DC Power Plug which has gotten loose over time. It frequently comes off and I needed to tap it in, but now even that does not seem to work. I'm wondering if I can replace just the plug at the end. I'm looking at various plugs e.g.
Amazon - Philmore Right Angle DC Power Plug w/ 6' Cable - 2.1mm I.D.
5.5mm O.D. : TC210
This seems to be very similar to what I'm looking for, but I cannot figure out if it has grounding. The power adapter to my LCD Monitor is three pronged, implying grounding, but I cannot say if the actual plug has grounding just from looking at it. I can also see DC Power Jacks that have grounding e.g.
StackExchange - what is the name for this DC connector?
Which brings me to my question:
Are Coaxial DC Power Plugs with Grounding available?
If there are none, would there be any issue with using a non-grounded plug like the one mentioned earlier for my LCD Monitor.
Edit: Additional Information
I did not think this was necessary, but since it was raised in the expected answer I decided to add it here.
I have two identical monitors (same brand and model number) which were purchased at the same time. One of them had a slightly defective power plug, but I did not complain about it because it worked for most part.
Now 5 years later, this plug does not work with either monitor. However, the plug of the other monitor can power up the first monitor just fine. Since the power jack on the first monitor has been worn out by twisting and turning this defective plug, it takes a small tap/twist for the working power plug to power up. (In it's original monitor it works on the first try.) So I'm certain the issue is with the power plug not on the monitor jack.
AI: The power adapter to my LCD Monitor is three pronged, implying grounding
Assuming you mean a three-pin (three-pronged) AC connector on the power adapter something like this:
(Edited from this image on this web page)
... and not just a three-pin mains plug then yes, that suggests that the power adapter has a ground connection.
However that doesn't affect the type of DC power connector which is used - it just means that that the negative side of the DC output is probably ground-referenced.
Unfortunately, for this specific symptom that you stated:
It frequently comes off and I needed to tap it in, but now even that does not seem to work.
... the problem is usually that the "socket" in the device (in your case, that's inside the monitor) has become worn / damaged / broken away from the PCB etc. and the cause is not the "plug" on the end of the cable.
This picture of an "open frame" DC power jack (i.e. socket) makes it easier to see its flat spring (marked with the red arrow):
(Edited from this image on this web page)
That spring contacts the outer surface of the plug and pushes the inner surface of the plug onto the pin. Therefore it is the socket which provides the friction to keep the plug & socket "joined"; replacing the plug on the cable (as you suggest) is unlikely to help your problem, based on the "it frequently comes off" description you have given.
If you really want to replace the plug then, provided that the DC plug you have found has the same external and internal (i.e. pin) dimensions, and is visually similar (i.e. no non-standard notches, screw locks etc.) then that is what you need to know to get a replacement. See a list of possible sizes at the Wikipedia page for Coaxial power connectors.
It can be difficult to tell the difference visually between a 2.1mm pin and a 2.5mm pin, for example. However if you are sure that you require a 5.5mm x 2.1mm plug, then the plug + cable which you linked matches that description. The plugs are also available on their own. (If you have similar connectors on other power supplies, with known pin sizes, then you could "test fit" those to your monitor with the power off i.e. no mains connection to the "test" power supply, in order to try those known pin sizes. As Jasen suggested, a 2.5mm drill bit shank can also be used to differentiate between a 2.1mm and 2.5mm hole in a plug.) |
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