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H: Connectors for access to four conductors from a 40-wire ribbon cable
I have a Raspberry Pi project I'm working on that will involve connecting three printed circuit boards. I'm trying to figure out a rugged and convenient way to make the connections. The drawing below is a side view of my current rough concept for how to do this. I'm hoping for feedback or suggestions on how to flesh out this plan or what would be a better plan. I'm inexperienced with DIY electronics, and what experience I had was 30 years ago.
The bottom board has a 2x20 pin header with a pitch of 0.1", as does the other large board above it. They're designed to work together, so I can just connect them with a ribbon cable, and the pinouts will match up correctly. There are also holes pre-drilled in the boards so that I can provide appropriate mechanical support, uniting these two boards into one rigid unit.
The hard part is getting the connections to the third, small board, which is a GPS receiver. It needs four connections: ground, 3.3 V power, and two UART lines. My current thought is to take a razor blade and carefully separate out the four wires from the ribbon cable, send them to some kind of connector (the circle marked "?"), and then go from that connector to soldered connections on the small pcb.
Issues I'm worried about:
The 3.3 V power line is also needed by the top large pcb, so I'd need to splice in an extra piece of wire to get that connected to both it and the small pcb.
I don't know what electrical properties are required for the UART line in order to avoid problems with things like reflected signals. The data sheet (link above) describes various speeds in various setups, but maybe 9600 baud. This seems relatively low, so maybe this kind of RF engineering stuff is not relevant?
I'm not sure what kind of connector to use. This is supposed to be a lightweight, compact unit. Molex seems like overkill. D-SUB seems kind of big and heavy.
I'm imagining a tendency for the ribbon cable to fray or split from the places where I separated the four strands from the main cable.
Not sure how to do appropriate strain relief for the soldered connections on the small pcb.
If I want to get access to other lines later, I have to do more razor-blade surgery. This suggests maybe using a crimp-on connector in the middle of the ribbon cable, but I'm not clear on how to make permanent connections onto such a thing.
AI: First, you generally should not power peripherals (at least beyond a single low current chip) from a pi's 3v3 bus; it is too sensitive to additional and varying loads. For low current things, use the 5v bus and regulate it yourself; for higher current ones, use an independent connection back to the power supply, or a separate power supply with a common ground, or even isolate both signals and power.
UART signals at reasonable baud rates are in general not very sensitive to impedance match over short distances.
In terms of your connector options, you have many:
You can crimp an additional full-width IDC connector onto an existing ribbon cable. Use a vise.
You can split out a few conductors and crimp them into a smaller IDC connector.
You can split out a few conductors and individually crimp male or female pins on them. Note that you can also use these female pins on a male crimp IDC connector, but you likely won't have any good secondary retention so that is best for temporary setups.
If the overall number of connections to be made is small, you can use individual crimp pins inserted into hearders (either Molex or Dupont style; they mate, but the housings and pins are not cross compatible). You can crimp these yourself, buy them pre-crimped without housings or buy them with single housings and pop those off.
You can solder individual wires to the back of the pi or the other board, 30 gauge silicone insulated wire is great for this as you can do a neat job with the insulation right to the solder joint without it melting. You can then bundle these, maybe in some heatshrink and strap them at a mounting hole or standoff or similar.
You can use a breakout board having multiple points of access to the signals including an additional connector footprint. Beware many of these are not reversible as they have the power pins of the pi footprint internally connected, however compact pi-zero sized breakout boards will in general work with the other models, too.
You can make a custom board |
H: XO selection for 44.1kHz audio
I'm implementing a WM8804 S/PDIF transmitter in a project I'm working on. The datasheet states that clocks from 10MHz - 27MHz are supported.
What crystal oscillator frequency should I look for in order to support 44.1kHz I2S output given a an input of 44.1kHz S/PDIF?
Edit:
It looks like 12MHz would work fine, given the info below:
Is this correct?
AI: 12 MHz is the default and only one that works in hardware mode so the PLL settings do not need to be altered. |
H: Why do some PCBs have exposed plated perimeters?
I've seen a number of PCBs, largely high speed and RF boards, that have exposed copper, either at the perimeter of the entire board, or in various sections, often with stitching vias.
I've never fully understood the purpose of these. Some explanations I've heard called them "ESD Rings" used for handling the board, but that makes less sense to me when there are a lot of individual perimeters, specifically ones more inboard like in the image below. Are these just the top ground plane exposed? If so, what's the point of exposing it? I don't see how it would make a difference from an EMI perspective whether said ground pours are exposed or not.
I've also heard, and more or less accept that for an outer perimeter plated ring of this kind, it's often connected to GND and then used to connect via mounting hardware to an enclosure.
Thanks!
AI: They are called via fences, they are placed on the outside of the board to "fence in RF", they do this by creating a barrier smaller than the wavelength that needs to be shielded. At very high frequencies, the area between planes can function as a waveguide/antenna and high frequencies can move between planes and out of the edge of the PCB.
In addition to this the planes on the top layer can be plated to accept EMI gaskets/shields.
Source: https://sc01.alicdn.com/kf/HTB1uZSNRXXXXXahXpXXq6xXFXXXd/Photo-chemical-etching-RFI-EMI-shielding-box.jpg
Are these just the top ground plane exposed? If so, what's the point
of exposing it?
The vias most likely connect to the ground plane and the trace/plane on the top layer, but doesn't have to be. The point of exposing it is to make it conductive and continuous. The layer is then plated with a surface finish that is low impedance/resistance metal like ENIG (with gold). This allows for the high frequency currents to be shorted to the ground plane with an EMI gasket (conductive foam or deform-able metal mesh) and return back to the source. Without the conductive layer on the top of the PCB, RF could potentially leak underneath the RF shield.
Many of the chips are generating RF on the board pictured above, to prevent cross talk and leakage, the EMI shield prevents RF from moving to other areas of the design, or outside of the board (entities like the FCC regulate how much devices can radiate radio frequencies). This is why the shield also partitions different sections of the PCB design.
Here is the distance charge for via fencing, if you wanted to see what frequencies they were trying to shield on the board above, you could measure between vias to find the cutoff frequency.
Source: https://www.edn.com/Pdf/ViewPdf?contentItemId=4406491 |
H: why ARM architecture necessarily dominates the IOT market?
I would like to understand why do we use ARM for routers, cell phones, cameras, refrigerators, smart tv, and everything. instead of using any other architecture like x86.
What are the advantages of using arm for these things?
What would be the problems of simply using x86
Is It All About Cost, Size And Energy?
AI: Primary: Intel CPUs are faster in absolute sense (and maybe even faster per dollar), Cortexes are faster per amount of energy. Battery lifetime is a big issue for mobile use! Hence you see mostly Intel on mains-powered PCs, and Cortexes in battery powered appliances.
Secondary: Intel sells chips. You can buy any variation as long as Intel produces it. ARM/Cortex is an IP product: ARM licenses their CPU designs, so a manufacturer can add whatever he wants to the core and produce a chip to suit his needs.
Third: Intel used to be almost synonym with Windows, ARM used to be synonym with Linux. Windows is great for desktop use but not free, Linux is great for all kinds of servers, and it is free. Google choose Linux to base Android on.
Last: Cortex is not one CPU but a very diverse line of products, from very small ones (M series: cheap micro-controllers) to the big ones (A series: to run Linux). For the smaller ones Intel has little to offer in alternatives (8051? you must be kidding), and Cortex has pushed most of the non-Intel alternatives way back too. So in this field Cortex is realy dominant. (Also because in this field it makes even more sense to combine the CPU with manufacurer-specific peripherals on the same chip.) |
H: Do I have to do anything special if I want to connect to a chip with SWD and SWDIO and nRESET are on the same pin?
I want to wire a MDBT40-256RV3 to a SWD programmer and on the programmer nRESET and SWDIO are on separate pins but on this chip they share the same pin, so how should I wire that?
AI: Just wire SWD and SWDIO, leave nReset open.
This chip (NRF51xxxx) simply has no dedicated reset pin to connect to. |
H: What are the advantages and disadvantages of Manhattan-Style routing?
Manhattan-Style routing being the use of expressly east-west planes and north-south planes, using a via and changing planes when a signal changes direction.
Comparing to freestyle routing, which lets define as routing signals in any direction on a given layer, would manhattan routing generally result in increased density, signal integrity, and more or less layers?
I know this is somewhat general and highly specific to a given application, but I'm generally interested in why one would decide to route in a manhattan-style -- surely the reasons relate to one or more of the above, and there should be some justification to that end.
One guess of mine is also that two adjacent layers, one E-W and one N-S would be fairly minimal in cross-talk due to the perpendicular nature of the traces, versus two adjacent layers where the layers are routed free-style. Would you agree?
AI: The primary advantage of a Manhattan route is that it can always be completed. You just need to have enough board area to accommodate all of the traces — but otherwise, you'll never find yourself unable to complete a route. This can be important if you need to get a layout done on a fixed schedule — the amount of work is roughly proportional to the number of pins, and you won't spend days or weeks trying to complete the task because of blockages.
Other routing algorithms might be more efficient than Manhattan in terms of board area and the number of vias required (saving money on each board produced), but they cannot guarantee completion of the route in every case, which means that there's a nonrecurring cost risk in terms of the engineering effort required. |
H: how to understand SMBus SDA line captured waveform
I am using MCU (L476RG) with PMM240 (power management board) and RRC 2054-2(battery), I am figuring out why SMBus is always busy after sending command to slave, so I captured the waveform when I send command, but I am totally confused, the SMBus address is 0x16(already shifted 1 bit), I found whatever byte I sent(such as 0x01, 0x1c...), I always captured the same waveform as follows(blue line is SDA and yellow line is SCL), and SMBus stays in busy state, how to understand it? many thanks
AI: It looks like the address 0x16 sent by master is correct because 9th bit that is slightly higher than other low bits is the ACK from slave. But then something holds SCK low. It might be the slave that holds it low until it is ready for next byte. Or it might be the master that is unable to send next byte because of software error. The waveforms are quite noisy and glitchy so make sure it is not a signal integrity issue. |
H: How do wireless receivers reject noise created by the original signal reflecting off walls?
When a transmitter emits an RF signal it reflects and bounces around all over. If a receiver is line-of-sight with that transmitter then the original signal will hit it first but signals bouncing off walls may hit it soon there-after and thus create noise on the same frequency band with the exact same information but shifted in time. This is called Multi-Path interference from what I've been searching.
How does the receive differentiate and extract the original signal when its being mixed with thousands of reflections?
AI: When you stop at a red light in your car and your FM channel, suddenly fades then resumes. This is known after Stephen Rice as Rician Fading loss by the same RF amplitude being inverted from multipath with phase cancelling for some of the wavelengths of all FM RF signals.
In Wifi, it can be demonstrated MP with software tools that convert the WiFi Received Signal Strength Indicator (RSSI) Voltage into dBm instead of 1 to 3 bars. It doesn’t have to be the entire spectrum of ODFM wavelengths that cancel , but enough to distort some of the packet while the rest of the packet could be full,strength giving you no indication at all of a poor signal with full bars. -70dBm is marginal and -80dBm is easily lost with Ricean Fading.
Often all it takes is at this level is a 1 degree orientation or a 1 or 2mm change in position change in the Wifi dongle or laptop and your signal is full speed again.
welcome to Rician Fading loss, but all the best methods of modulation are used to thwart this. The best mobiles and laptops had orthogonal diversity antennae (two) to choose from, in case of this loss of signal.
Although I have used Netstumbler to receive Wifi RSSI levels so I could reach a far away signal by bouncing off backyard trees when I had moved in before service installed at a time when open Wifi was default on Routers.
But the trickiest example of Rician Fading was an expensive Microwave tower link that was installed in summer and failed in winter. Ground Ice cause a surface reflection with the exact wavelength to cancel the received signal. Often it is the reverse with water instead of snow with ground reflections. But if you ever want to see a Garmin GPS get lost in skyscrapers and move your position 2 blocks over due to skyscrapers in Toronto, welcome to multipath Doppler position error. |
H: Securing mod wires to PCB
I have done a few mods to a PCB with 36 gauge mod wire. Obviously this wire is so thin that it only takes a few bends back and forth to break it. What is the best way to secure this in place on the PCB? I have tried super glue but that makes a mess because it flows too easily.
AI: At work I use Dow Corning 3145 RTV silicone adhesive for this very purpose. We also use it to secure flex cables in their connectors, secure right-angle parts such as capacitors to the board surface, fill small gaps to make the product waterproof, electrical component insulation, and so on. It is chemical-resistant, water-resistant, corrosion-resistant, non-conductive, and sticks to just about anything. There are many different uses for it, and in my opinion it is absolutely indispensable.
And to prevent this from being a specific product plug (I am not affiliated with the company in any way, I just like the product), I will say that just about any silicone adhesive designed for printed circuit board use will probably work great in this sort of application. |
H: Help designing a voltage divider
I said voltage divider on the title, but could be anything.
I have a DC source of 19.7V.
I need an output that varies from 0V to 18V.
I have:
Resistors (1/8W);
1k potentiometer;
5k trimpot;
2N3904;
LM358;
Capacitors.
My only requirement, besides part count, is that both potentiometers be used: the 1k being the main, and the 5k acting for fine tuning.
And the adjust... not too sensitive. The more linear, the merrier, and taking advantage of the whole excursion of the potentiometer.
In the example below I could not obey the requirement of sensitivity and excursion.
The transistor I'm trying to use has a cutoff around 680mV and saturation around 820mV.
Very small window. Hence, my trouble.
More:
The output current can be small. 5mA will work;
This whole system will control the GND pin of a LM7805, and later on, of a 7905;
LM317 unavailable;
The 1k potentiometer can be turned by hand and is what I have available. The 5k trimpot needs a screwdriver.
History:
At first I thought a voltage divider could do it, but in my attempts, the voltage hardly approaches 15V.
Still open for this type of design, though (just bear the requirements if you'd like to help me this way)
After giving up, I tried using OpAmp. It worked. But later I will need a negative version of this structure I'm trying to build, but 19.7V-(-19.7V) my opamps won't support.
Maybe I could reduce the supply voltage of this OpAmp, but then... part count.
Third attempt, more promising but difficult, was with a transistor.
AI: simulate this circuit – Schematic created using CircuitLab
DONT USE ABOVE poor simulator part of EE.SE
Don't burn it out by over loading the pot with 1/4W type or excess current.
Use this simulator instead
Every part serves a purpose.
If you understand this design and tried it out, say OK (+1) |
H: Op-amp input impedance
I was reading the following tutorial from Analog Devices:
https://www.analog.com/media/en/training-seminars/tutorials/MT-040.pdf
They include the following image and state:
In most op amp circuits, the inverting input impedance is reduced to a very low value by negative feedback, and only Zcm+ and Zdiff are of importance
I don't understand this point. How is Zcm- swamped by negative feedback and how can it possibly be reduced to a low value? Then the output of a follower would have to supply large current into the inverting input terminal, which is obviously not the case. To me it would make more sense to say that Zdiff is bootstapped by negative feedback and Zcm+ and Zcm- are therefore the only impedances that are significant.
What does Analog Devices mean by this quote?
AI: In addition to the other comments and answers you've received, take a look at Figure 5 on this webpage:
https://masteringelectronicsdesign.com/buildi-an-op-amp-spice-model-from-its-datasheet/
Figure 5 doesn't show the current sources IB+ and IB+ but its resistors Rin1 and Rin2 correspond to Zcm+ and Zcm-, respectively, and its resistor Rin corresponds to Zdiff. Redrawing Figure 5 with an emphasis on the op amp's amplifier+output stage (the dependent voltage-controlled voltage source VCVS) and negative feedback path yields the schematic below.
simulate this circuit – Schematic created using CircuitLab
Note that resistor \$R_2\$ is in parallel with the op amp's input impedances \$R_{\text{in2}}\$, \$R_{\text{in}}\$, \$R_{\text{in1}}\$, etc., and when \$R_2\$'s value is much less than the op amp's input impedance we have:
$$
R_2\;||\;(R_{\text{in2}}, R_{\text{in}}, R_{\text{in1}}, ...) \approx R_2
$$
Also note that VCVS and the op amp's "bias current" IB (not shown) both influence the voltage potential at the op amp's inverting input. When R2's resistance is small compared to the op amp's input impedance, IB's influence at the inverting input is "swamped out" by VCVS, R1, and R2.
$$
V_{\text{IN-}} \approx \text{VCVS} \frac {R_2\,||\,(R_{\text{in2}},R_{\text{in}},R_{\text{in1}},...)}{R_{\text{out}} + R_1 + (R_2\,||\,(R_{\text{in2}},R_{\text{in}},R_{\text{in1}},...))} \bigg\rvert_{R_2 \lll (R_{\text{in2}},R_{\text{in}},R_{\text{in1}},...)}
\\
\Rightarrow
V_{\text{IN-}} \approx \text{VCVS} \frac {R_2}{R_{\text{out}} + R_1 + R_2}
$$
For what it's worth, that Analog Devices MT-040 data sheet doesn't clearly define or give typical values for the "bias currents" IB- and IB+, which only creates confusion. Assuming IB is the very tiny reverse leakage current (on the order of nanoamps) that flows through the reverse biased collector-base diodes of the two BJTs whose bases are connected to the inverting (IB-) and non-inverting (IB+) inputs, that IB current is so tiny that VCVS, R1, and R2 can easily dominate the voltage potential at the op amp's inverting input if R2's resistance value is much less than the op amp's input impedance. For example, add an independent current source at node IN- (the op amp's inverting input) whose amperage is, say, 10 nA, and see what effect it has on the voltage potential at IN-. |
H: MT3608 gets very hot only handle 1A
In the datasheet they mention the MT3608 can handle up to 2A however in some stress tests with a load tester it gets already very hot at 1A. It is so hot, it is impossible to touch the board, all components around it get very hot because it spread all of the heat via paths. The chip itself is that tiny it is almost impossible to attach a heatsink. Because I don't have a second one I have to ask this, is this normal or abnormal?
Board (arrow point at chip and I have the one with protection diode):
Test config:
Battery 18650 2600mah
boost 4.10V to 5.6V (drops down to 4.87 when heated up)
Load 1A
Datasheet:
https://www.olimex.com/Products/Breadboarding/BB-PWR-3608/resources/MT3608.pdf
AI: I have the identical board. I connected it to a power supply set to 4.1V, adjusted the booster output to 5.60V and connected a 5.6Ω 10W resistor. The output stayed solid at 5.60V while the input current rose to 1.56A. After 6 minutes the chip temperature was stable at 39°C according to my infrared thermometer, 23°C above ambient. The inductor was 41°C, the diode was 42°C, and the load resistor was 112°C!
4.1V * 1.56A = 6.4W input power, so the conversion efficiency was 5.6W / 6.4W = 87.5%.
So this board should do what you are asking of it no problem. However if the input voltage drops the current will have to increase to get the required power, and efficiency may suffer. At 3.7V my unit drew 1.8A and its efficiency dropped to 84%.
At these relatively low voltages and high currents, any losses in wiring or connectors can make things worse. I used thick wires and heavy duty connectors, and measured voltages directly at the board terminals. I also put 22uF capacitors across the input and output to help reduce voltage ripple.
Before putting the blame on your board you should consider two things:-
Boosting to higher voltage requires more power for the same output current, and therefore higher input current. Higher current causes greater voltage drop in wiring and connectors (as well as inside the booster itself) making its job harder.
When input voltage drops the chip draws more current to compensate, but this could cause the input voltage to drop even more. If the power source is too weak to deliver the required power then the booster will continue trying to draw more current until maxed out.
18650 Li-ion cells have typical 'knee' voltage at end of discharge of ~3.4V (it might start at 4.1V, but it won't stay there for long). To get maximum usable capacity out of your battery the booster must be able to work down to this voltage, and you need to keep input losses down with short wiring and low-loss connections.
The MT3608 datasheet only shows output current up to 1A at 5V, and you may need a similar boost ratio as the 3V to 5V curve shown (where efficiency is heading downhill fast at 1A). Therefore, despite being rated for 2A, under these conditions I think 1A is a more realistic maximum. |
H: Sharing the Load: Power Ratings
I have some cheap potentiometers that I would like to use as variable resistors.
The potentiometers have a power rating lower than the amount of power I would like to be able to dissipate across the setup at a fixed voltage, so I have a plan.
Instead of using a single potentiometer set to resistance X and total voltage drop of V, I will put the two variable resistors in series and set both of them to a resistance 1/2 X. The voltage drop across each will now be 1/2 V.
Because the total current will stay the same thanks to an equal equivalent resistance, each variable resistors will get the same current as the original setup with only one variable resistor.
Because P = IV, each resistor should dissipate half the power with half the voltage drop. The total power will be the same, but because I have two potentiometers in series, given that I adjust them to the same resistance each time, I will be able to dissipate twice the total power ago a given total resistance.
Is there a flaw in my reasoning?
AI: The most likely flaw in your reasoning is probably that you think a potentiometer used as a rheostat can dissipate it's rated power at any setting of the wiper. It can't.
Figure 1. The potentiometer resistance track. Source: Types of resistors.
The rated power is when the dissipation is spread over the full length of the resistance track. When used as a variable resistor (rheostat), as you are proposing, the maximum power dissipation is reduced in proportion to the amount of track in use. Effectively the power specification is telling you the maximum current the track can handle.
Let's say that the potentiometer in Figure 1 has a rated power of 0.125 W and a resistance of 250 Ω.
The maximum current it can handle is (from \$ P = I^2R \$) given by \$ I = \sqrt{\frac {P}{R}} = \sqrt{\frac {0.125}{250}} = 22\ \text{mA} \$.
At, say, a 40% setting the maximum power allowed would be \$ 0.125 \times 0.4 = 0.05 \ \text W \$. |
H: how to use decoder and motor drivers to power individual motors at 12V?
I have a huge set of motors and they need to powered at specific times and at different voltage levels individually. Basic idea that I had, is to use a demux or a decoder to select the motors and then control them through PWM using any uC(preferably Arduino) and a motor driver. But I couldn't figure out how to connect them. Would anyone suggest any ways of executing the above connection or Can suggest a different way to tackle the main problem? The no. of individual control required is approx. 300.
Will the above approach work as to providing closed circuit to the selected coils only? And the PWM control can be provided to the driver through Arduino.
AI: No, you are describing logic-level devices which can only switch logic level signals. They are not capable of switching 12 V motor currents.
If you have only one motor driver then you have to switch the motors. This may be done with relays or, if they are DC motors and only run one direction then a transistor or MOSFET could be used to enable each motor by connecting one of its terminals to the 12 V power supply positive or common. Meanwhile the PWM from the motor controller could be connected to the other terminal of each motor. |
H: Two power sources into appliance (12Vdc)
I am creating powering board for LED strips inside the cacti glass house. It consume 12V DC around 2 amps. I would like to power them up from battery (charged by solar, lead-acid battery 20Ah), but if there is no energy left, switch to DC power supply (12vdc).
I found the answers that it is possibly made by diodes here. But I do not fully understand, I am a programmer with no electro background, so I am a beginner (and I love it :)). I do not understand how to wire the diodes to do the job.
I understand that it will choose higher voltage, so when the battery drops down below some limit, it will take power from the power source. But how to do it, please?
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. Diode connection.
There will be a small voltage drop (0.7 to 1.0 V) across the diodes but it shouldn't cause any problems. |
H: What is the transmission bandwidth for a BASK (Binary Amplitude Shift Keying) signal?
What is the transmission bandwidth for a BASK (Binary Amplitude Shift Keying) signal?
Shouldn't it be infinity as short periods of sinusoids are used to depict 1 and 0 to depict 0?
AI: The bandwidth is defined by the pulse shape, not the modulation type.
So, this depends on
how you define bandwidth (there's different definitions, and which one you use depends on the purpose of defining the bandwidth)
which transmit pulse shaping filter you use. |
H: Help with solving this DC circuit
]2
I tried KVL, KCL and the standard stuff (My knowledge goes up to Super-nodes and Super-mesh) but I have no clue what the 4V source is actually supposed to do? Sorry if the answer is obvious, but I'm stuck on this.
Edit: I've added some labels and added an image of what I came up with.
AI: It really just adds 4V of potential difference. What else should it do? No current can flow. |
H: Insertion of transmission lines and effects on reflection coefficient
I have a doubt on a step usually performed in matching network design. Consider a load ZL: a method for getting impedance matching (for instance with an amplifier) is that of inserting a transmission line in order to modify its impedance, like in the following picture:
This operation can be seen also in terms of reflection coefficient. Precisely, I found this relation:
where ΓL is the reflection coefficient of the Load. My question is a bout a generic case in which ZL may be also another transmission line, a port etc
where does this relationship come from? Are there any assumption (for instance that the transmission line must have the same characteristic impedance of ZL - in case is a transmission line - , or it must be a no loss line etc) for it?
AI: where does this relationship come from?
It comes from the fact that if you have a forward travelling wave at \$z=-l_1\$, then it will travel forward a distance \$l_1\$, then reflect off the load, then travel in reverse distance \$l_1\$ again before you see the reverse travelling wave at your measurement point.
Are there any assumption (for instance that the transmission line must have the same characteristic impedance of ZL - in case is a transmission line - , or it must be a no loss line etc) for it?
As shown in the diagram, the transmission line must have characteristic impedance \$Z_0\$ (it must be matched to the system impedance), and propagation constant \$\beta\$.
If it was matched to the load (it had characteristic impedance numerically equal to \$Z_L\$), then the reflection coefficient at \$z=-l_1\$ would just be \$\Gamma_L\$, since a transmission line terminated with a matched load just "looks like" a lumped impedance equal to its characteristic impedance.
You are correct that this formula only applies to a lossless line. If it were a lossy line, the magnitude of the reflection constant at \$z=-l_1\$ would be less than \$|\Gamma_L|\$. |
H: How to test a TRIAC with just a digital multimeter and no external circuit
I need to fix an electric kettle and would like to test the health of the TRIAC BTA20. How would you test this component health with a digital multimeter - without any extra components and ideally without removing it from the circuit?
thanks,
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. Testing first and third quadrant operation of a triac.
If your multimeter has a high enough diode test voltage and current then the circuit of Figure 1 might work. SW1 and 2 can be replaced by a piece of wire or paperclip.
I've never tried this so I'd be interested to know if it works. |
H: Does an AC wave running through a wire produce EM waves?
I understand that current from a DC source running through a wire produces a magnetic field. However, is the changing magnetic field produced via current from an AC source, technically a part of a EM or radio wave?
If so, do transmission lines produce EM waves at 50-60 Hz?
AI: Yes, an AC current in a wire emits electromagnetic (EM) radiation.
How efficiently it emits depends on how long it is. If it's a tiny fraction of a wavelength long, then it's very inefficient at emitting propagating, far-field, EM radiation. Most of the energy stays as near-field, non-propagating magnetic fields.
The business of crafting a wire so it emits EM efficiently is called antenna design. |
H: How many transistors are there in a logic gate?
How many transistors are there in a logic gate?
If anybody asks me, I tell them:
A NOT gate is 1 transistor.
A NAND gate is 1 transistor per input.
A NOR gate is 1 transistor per input.
An AND gate is basically a NAND gate + a NOT gate, so it takes 1 transistor more than a NAND gate.
Same for OR vs NOR.
An XOR gate is built from multiple other gates, typically about ~4.
Sounds pretty reasonable, right? Thing is, I just realised... I have no idea why I think these are the correct numbers. I don't remember reading that somewhere or anything. I'm beginning to think maybe I just made it up. Sure, it sounds convincing; but that doesn't make it correct!
So what is the actual number of transistors per gate? I imagine it's different depending on which logic family we're discussing. (My brain is telling me that the numbers above are for TTL, and CMOS is exactly 2× the that, but again I don't know if there's actually a shred of truth to that.) If it does make a difference, I'm most interested in TTL and CMOS.
AI: If you are making gates out of discrete transistors, diodes and resistors, you can make an inverter with one transistor, a NAND with two transistors, or with diodes.
If it is in a integrated circuit, where a resistor is more complex to make than a transistor, more transistors are used either for polarisation (for example ni old NMOS), or now as part of more complex circuits with complementary logic such as CMOS. A basic CMOS inverter uses 2 transistors. Inputs can be added by using transistors with several gate contacts.
It works when that gate is one among many others, driving a few similar gates. For large fan-out gates, or when these gates are sold as components, like a 7400 or a HC4000, there are additional transistors, with different geometries for conditioning the input, multiply the output current rating. |
H: Odd PCB Layout for Voltage Regulator
I am reverse-engineering a board which has a Xilinx Spartan 3E FPGA, with VCCAUX powered by a 2.5 volt regulator. Below is the PCB layout for the regulator part of the circuit, and something seems very fishy to me.
My apologies for the horrible pixelation, this was the highest resolution I could get with the equipment I had available. Anyway, the SOT23-5 component labeled "LFSB" is a Texas Instruments LP3988IMF-2.5 linear voltage regulator. I have traced out the schematic below from the board layout:
You may already have noticed the source of my confusion: I have no idea why they would have placed a 316 ohm resistor directly across the output of a 2.5 volt regulator. All that does is waste 7.9 milliamps. I cannot seem to find any reason for doing this. I wonder if it is a design flaw, and that resistor is actually supposed to be connected to the PG pin instead of to ground. I have triple-checked the original PCB, though, and it definitely connects to ground and the PG pin is not connected to anything. If this is an error, however, it would explain why they used a separate trace on the low side of the resistor instead of connecting it to the copper ground pour that's right there. I also wondered if the regulator may require a minimum load in order to maintain a stable output, but that is not the case for this regulator. There are no minimum load requirements. I also considered the possibility that it was intended to bring up VCCAUX more slowly for sequencing purposes for the FPGA, but reading the datasheet this also does not seem to fit - there are no strict sequencing rules for powering up the Spartan 3E.
Can anyone think of a reason why someone would intentionally place a 316 ohm resistor directly across the output of a 2.5V regulator? I considered it might be a bleeder resistor for the output capacitor, but it seems like too low of a value for that.
EDIT:
Perhaps this additional information will help. The datasheet for the Spartan 3E specifies what the VCCAUX supply is used for:
VCCAUX: Auxiliary supply voltage. Supplies Digital Clock Managers (DCMs), differential drivers, dedicated configuration pins, JTAG interface. Input to Power-On Reset (POR) circuit.
AI: I would have done the same design, in order to reduce dynamic and static load regulation error.
The details for the reasons are evident from the datasheet. Look at the dynamic load regulation error and input step regulation error:
I can only guess what error budget the designer had in mind, but it is common for every LDO to have a response similar to those above (although this FET LDO is exceptionally low power and dropout voltage)
5 mV error at 0.6 V input step with a 1 mA load
200 mV error with a 150 mA load-step
The static load regulation error is only rated above 1 mA as 0.007%/mA:
This implies it is worse below 1 mA and improves with a dummy load of 7.6mA to the designer's satisfaction. It also improves dynamic step load regulation error above.
This 1 mA ensures the rise/fall time of the Gate drive to speed up response. 7.6 mA is even better with diminishing returns above this.
Static load regulation error is only due to RdsOn of the PFET used in the LDO divided by its internal Loop gain. This is true for any voltage regulator whether it is FET or BJT. But infinite loop gain can increase stability errors or result in more ringing, under certain load (i.e. ESR, C) conditions so it is finite.
Fishy? No way! |
H: Negative Voltage creating Sinking Terminal
For powering a RS485 circuit, I am requiring a Negative Power Source.
I was thinking to split a standard power source with 0V, +6V and +12V, using the +6V as ground with LM7805, and using some LM7805|LM7905 (or similar) devices for regulate into +5V|-5V.
In this case, the +6V could become a sinking terminal if the negative voltage circuit is unloaded, which I think should not be correct and could break the source(?).
The arbitrary change of GNDs confuse me, because the GND should always be a sinking terminal, not a sourcing.
So, how should I generate +5V -5V sources in a proper way?
Also, it is a choice to generate a low power -5V from a +5V source?
Edit.
Agreed regarding RS485 not actually requiring -5V source. Please keep the example valid for other application.
Consider 0V, +7.5V and +15V for the voltage dropout.
Consider only resistive loads, DC output signals.
In the best case, I am afraid this question depends on the nature of the power source (?). For example,
Case 1: if we have two sources, one from GND to +7.5V and other from GND to +15V, then loading only the 7805 will negatively polarize (charge) the 0 +7.5V source (?), hence this design is wrong in this case?
Case 2: The proper design should have two sources from GND to +7.5V, and putting them in series (?).
AI: This is a great question. the LDO’s have a 1.5 to 2V dropout so it won’t work with 6Vin and 5V out. But you do not need V- for a differential RS 485, only bipolar RS232.
You only need 5V and 0V to create RS485 signals.
Other info for future RS232 considerations. we normally use a charge pump for +/-V.
——x-x-xxx— ———
When we have floating DC sources, we can call anything Gnd=0V but use it for two different nodes on a “non-isolated” LDO.
so use a different Gnd symbol like Gnd A and Gnd B, keeping mind the DC difference could be anywhere from
5 to 7 V difference.p and not always 6V! why?
Furthermore, must be aware of the load currents with respect to 6V, 12V and 0V. Op Amps have a constant current between Vcc and Vee or V+ /V- and only use then middle-level voltage and impedance of that voltage for things like input bias currents, which are small. However, the output load will have some RLC values with respect to each rail so we can estimate these currents and their effect on each node voltage.
For background info, consider each LDO an Emitter Follower with internal feedback. This means the V+ out is NPN and V- regulator uses PNP outputs ( usually are Darlington’s consequently the output can be driven above the regulator’s |Vout| with very little current such as in a flyback Voltage).
So each regulator only pulls the load voltage towards the input. (+5 = delta V towards input +12V & -5 = delta V towards input 0V).
Now if your Load is connected to “common V” shared between both LDO’s what is the actual source impedance of this node before a load is applied? This depends on the LDO’s internal bias currents as an R divider so if not equal then what? Each LDO will be fighting to get + or - 5V out and if there is any mismatch in current to each regulator they will be noisy one may possibly pull itself towards its input rail thus saturating then error amplifier inside and getting zero feedback gain in the process so then current drops and voltage swings back towards some equilibrium near the LDO input cut-off voltage.
So will it work if the load is connected to input 0V?
No, because as the background info I gave says, the PNP emitter output becomes reverse biased in the LM 7906.
But putting the load like an Audio speaker Amp to mid-point Voltage could work but may have Noise if the other load currents are not balanced.
So how you fix this? Or does it need fixing? Well, that depends on your exact RLC load to each of 3 rails. this includes RS232 Cable, target SMPS leakage noise current, connections to Earth ground at both ends etc, etc.
Is floating actually infinite impedance. No it depends on the supply. 50,60 Hz transformers are different than 50kHz SMPS transformers and 1nF of leakage capacitance can cause issues.
Finally, if the input is 6V and output is 5V what is the regulator dropout Voltage at desired load current and how will 0V be connected to the target RS232 Earth gnd, assuming yours is isolated but with 1nF of leakage capacitance and Possible SMPS noise current coupling thru.
Summary of wrong assumptions
you can specify different gnd symbols to mean different 0V relative potentials as this is not connected to earth gnd (yet)
These BJT LDO’s need 2V headroom, not 1V, while FET-based LDO's use low RdsOn to get <<1 V yet not needed for 12 to 5V.
you don’t need V- for RS485 just 5V, 0V
bipolar LDO’s need a low impedance midpoint reference ( e.g. active V/2 driver) otherwise they do not balance well with unknown loads |
H: STM32F4 Discovery board only works in DEBUG mode
I generated my project with STMCUBEMX with CAN, SPI, I2C peripherals and did some coding on top of it. Code basicly polls the CANBUS, stores data to some IC over i2c and sends the processed data to the connected nodemcu over the SPI.
It was working as it should until I decided to stop working in debugging mode and use it as a standalone circuit. So After flashing the code I unplugged the USB cable and plugged it back in. And that is when strange behaviors began. When I tried to debug through LEDs and I found out that any operation regarding SPI or I2C blocks the code and no LED is lit after that point. A normal function which only does arithmetic operations and doesnt use any peripheral doesn't prevent the LEDs also the CAN and push button interrupts work as I observed through the LEDs( They always work even when the circuit seems stuck ). As soon as I flash the code it goes back to working as expected.
So far I have tried :
Changing the crystal from High Speed External to High Speed Internal
Powering the board from an external source (USB cable attached to a phone charger adapter.)
Switching to ST-Link instead of Jlink.
Removing the SPI and I2C slaves from the circuit by unplugging the cables.
Since it is the peripherals that causing the problem , I figured it could have something to do with peripheral clocks. But basicly got stuck after this point.
I am using stm32f4 disco board at 84 mhz. I updated my debugger to jlink from st-link and I am debugging through the VS code extension cortex-debug
Start of my main
int main(void)
{
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_CAN1_Init();
MX_SPI2_Init();
MX_I2C1_Init();
InitializeTimer();
/* USER CODE BEGIN 2 */
Can_Setup();
if (HAL_CAN_Start(&hcan1) != HAL_OK)
{
Error_Handler();
}
HAL_CAN_ActivateNotification(&hcan1, CAN_IT_RX_FIFO0_MSG_PENDING);
uint8_t Atr[64];
uint16_t AtrLen = sizeof(Atr);
int sw = smComSCI2C_Open(ESTABLISH_SCI2C, 0x00, Atr, &AtrLen); // I2c peripheral init function, this is succesfull but not very stable.
if(sw == SW_OK)
{
HAL_GPIO_WritePin(GPIOD, GPIO_PIN_12,GPIO_PIN_SET);
}
generateIdentity(); // uses i2c, the code stucks after this point
generateAddress(); // uses i2c
while(connectWifi() != 0 ); //uses SPI
getNonce(&storedNonce); //uses SPI
My clock function
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
__HAL_RCC_PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 4;
RCC_OscInitStruct.PLL.PLLN = 84;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLQ = 7;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB busses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{
Error_Handler();
}
}
System Init Function
void SystemInit(void)
{
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
#endif
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001;
/* Reset CFGR register */
RCC->CFGR = 0x00000000;
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF;
/* Reset PLLCFGR register */
RCC->PLLCFGR = 0x24003010;
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;
/* Disable all interrupts */
RCC->CIR = 0x00000000;
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
#endif
}
I have been stuck in this issue for the last couple of days, and the deadline for the project is very soon.All helps are much appreciated :)
AI: remove the DWT_Delay()
It seems it causes the issues in release mode. |
H: What is the intended use of the 400 Hz-rated power supply on osciloscopes?
The power supply of many oscilloscopes and other test equipment from different manufactures are commonly rated for 400 Hz operation. For example, Tektronics MDO3000 is rated to work at 400 Hz at 115 VAC. Rigol MSO7000 is rated at 100-240 VAC, 45 Hz-440 Hz.
I'm aware that 400 Hz power supply is widely-used in aerospace, and I heard some military and industrial installations also use 400 Hz, mainly to reduce the weight of the transformer. But I didn't find any specific case online.
What are some specific scenarios when users are expected to connect the oscilloscope to a 400 Hz power supply? Using an oscilloscope on a flying aircraft sounds unplausible. Most laboratories, industrial or otherwise are likely supplied with 50/60 Hz AC to power all equipment. The only possibly I can think of is field-engineers doing tech support. But even then, I believe it's more common to use a portable, battery-powered oscilloscope.
Does anyone who has an industrial background can explain: Is that really difficult or inconvenient to find a standard mains-frequency power in some factories to make it justified for most oscilloscope manufacturers to rate their scope for 400 Hz operation?
AI: Yes that’s what it means. Planes often use 400 Hz generators and the plane’s frame becomes “Earth ground”.
As always, Gnd just means 0V anywhere in the universe and Earth bonded implies 0V to earth ground with some impedance <100 Ohms each to another grid location with an earth ground, unless in dry remote areas with poor earth bonding.
Earth is used by all 3 pin instruments to bypass EMI line filter leakage currents only and provide a good low impedance reference for scope probe ground leads.Sometimes DSO’s will put a plastic cap or an inductor between 0Vdc and Earth gnd pin for various reasons to isolate earth ground common mode RF noise (L), or block AC current but bypass RF to a relatively low impedance AC gnd using a cap only.
Engineers do use DSO’s on planes for R&D work. |
H: What is the purpose of the T-568 ethernet color code standard
A question came into mind. as i was crimping some ethernet cables at home.
I am talking about straight cable not crossover cables.
What is the true reason for the T-568A or T-568B color standard. Because just arranging the wire in sequence will work just fine as long as the wire is connected on the same pin on the other end, arranging them in sequence will also give a cleaner crimp.
in the image ont T568A blue is sandwich between the orange ? why is that?
Is it to reduce noise ?
if so how will it affect on different category? cat 5, 5e, 6, 7, and 8
AI: In comments you clarified,
what i meant was why did the TIA standard not make the standard make it in a sequence in the first place, since most of the time they are in a twisted pair and beside each other.
This keeps the pin assignments compatible with the telephone modular connector that it's derived from.
With this arrangement, a cable can be repurposed from voice use to data without re-terminating it. The blue pair can even be used for voice while the orange and green pairs are used for 10 or 100 Mbps Ethernet in the same cable. |
H: Does position of resistor matter in this schematic?
This is the schematic:
Above picture is the crystal resonator part of Arduino ATMEGA328P micro-controller, in the green rectangle they placed the resistor in parallel before the crystal and in Arduino UNO also it's before the crystal.
What does this resistor do?
Does the position of the resistor matter? can i place it after the crystal?
Why crystal is so close to the chip in Arduino UNO?
AI: Depending on the frequency that a trace is operating at, it is either 'long', or 'short'.
If it is 'short', then it's a 'node'. All points of the connection are at the same voltage. It has a stray capacitance to ground, which is roughly proportional to length. The order of components along the connection on the schematic has no relation to their order on the PCB - why should it, they're all at the same voltage.
If it is 'long', say more than 1/10th of a wavelength, then you need to consider the transmission line effects. The voltage varies along the trace. The order of components matters. It has an impedance which is constant, not a capacitance. A line like this tends to be drawn differently on a schematic, not a simple thin connection, but a thick line, usually with a note about its impedance.
At 16MHz, these crystal oscillator connections are very short, so they are simply nodes. PCB ordering does not matter. In this particular case, a crystal oscillator needs to minimise the stray capacitance at each terminal, so the traces need to be physically short to achieve that. The resistor goes electrically in parallel with the crystal, and it is left to the PCB layout designer whether it's easier, physically, which way round to lay out the crystal and the resistor.
Typically this resistor provides DC continuity across the crystal, in order to bias the amplifier on the chip that makes it oscillate. Some chips provide this resistor internally, some don't. |
H: How to find the right smoothing capacitor for rectification circuit
I am creating a power supply which will need to convert the 24vac to 5vdc. I am thinking of using a rectifier to convert ac to dc, then a capacitor to smooth out the voltage, then an LM2596-5 to drop it down to 5v. I am having trouble with selecting the right capacitor to smooth out the voltage. I saw this formula to find out the capacitor value
Current * Half Cycle time / acceptable voltage drop *1000 = C uf
When I plugged in my values
2 * 8.3 / 1 * 1000 = 16,600 uf
As you can see I get a ridiculous number and this guy has used a 100 uf cap on his 24vac to 5Vdc power supply. My use is a smart thermostat that I am making. my max current that my setup takes is 1.4a but my rectifier is rated for 2a so that is why I am doing 2 amps. I am mainly confused on how the formula is giving really large numbers and why that guy happily chose 100uf
The Formula I got is from this video
AI: My method of calculating C bulk for AC rectifiers is based on energy storage required to prevent dropout if AC input cuts out for 1 cycle at max load.
The typical design on page 1 of your IC spec shows a Cin=680uF for a 12V to 5V @ 5A.
Let’s how close I get to their recommended design.
also Figure 23 shows the ripple current rating for the typical bulk e-cap must have a larger ripple current rating , for larger cap values to withstand the current surges. The RMS current rating of a capacitor is determined by the amount of current required to raise the internal temperature approximately 10°C above an ambient temperature of 105°C. This is NOT the value you want to use in the design , rather the max rated for which capacitors are rated for often 1500 hrs lifespan at the rated temperature. Lower ESR, higher ripple current yet smaller C values are desired. Then ripple voltage in the cap can be further reduced by the circuit ESR added to the cap ESR.
However a lower input voltage a higher average current is needed to maintain a constant DC output power. So there are a lot of critical tradeoffs to balance in e-cap selection and the wrong one means poor reliability and efficiency from overall losses incurred.
calculations
Thus using 50 Hz for one cycle= 20 ms. Your output power specified was 5V*1.4A=7W and the suggested efficiency was 80%. So the required energy = E= P*t/80%= 180 mJ
The 24Vac bridge can produce 35V no load and about 24V average with lots of ripple so if we use this high ripple avg, \$E=1/2CV^2=180mJ\$ thus \$C=180mJ*2/24^2=625 uF\$
Hmm pretty close.
Next ESR or Ripple current.(rms) I use the same value as DC current as expected value ( but not a hard startup). so to reduce the stress on the heating up the cap, I am going to insert a power SMD resistor to this cap about 0.1 Ohm hopefully for reliability purposes for the cap without creating losses elsewhere. Then choose a cap with an ESR
value of 10 mOhm so it doesn’t heat up much. this results in a ESR*C=0.01*680uF=6.8us which I know is achievable in low ESR caps. (<10us)
so my recommendation is 625 uF or 680 uF ,10 mOhm + Rs=100 mOhms in series. |
H: Is back emf inductance in a ignition coil circuit symmetric for on/off cases?
I was trying to understand how an ignition coil circuit works practically, and came upon this website explaining the behavior of an ignition coil when subjected to changes in voltage:
http://www.learnabout-electronics.org/ac_theory/inductors.php
Especially the following paragraph:
This voltage will however now be much larger than the original supply voltage; this is because the amplitude of a voltage induced into a conductor is proportional to (among other factors) the rate of change of the magnetic field. At switch on, because there were two opposing voltages changing, the supply increasing and the back e.m.f. decreasing, the rate of change was slowed down. However at switch off there is no supply voltage so the magnetic field collapses extremely quickly causing a very rapid rate of change and therefore producing a very large voltage pulse.
What bothers me is that according to my rusty EE knowledge, the equations governing inductance
should lead to symmetric behavior when a switch is closed and opened.
In fact, according to my understanding, the voltage spike shown in the following graph should be in the other direction, as it would oppose the decrease in current. Am I understanding inductors incorrectly, or is there in practice much more to the topic which simple EE theory does not cover?
AI: No, it isn't symmetric in that sense.
In a circuit that consists primarily of inductance and resistance, there's a time constant associated with its transient response1 that works out to
$$\tau = \frac{L}{R}$$
In the igntiion circuit, you basically have a battery, a switch and the ignition coil in series. \$R\$ represents the total resistance of all three. Two of them have constant resistance, but the switch varies between very low and very high resistance.
When the switch is closed, the total \$R\$ is low (dominated by the resistance of the battery and the coil), which means that \$\tau\$ is relatively large — the current changes more slowly. When the switch is open, the total \$R\$ is extremely large (dominated by the switch), so \$\tau\$ is very small and the current changes very rapidly.
Therefore, since the voltage is determined by
$$V(t) = L\frac{dI(t)}{dt}$$
when \$\frac{dI}{dt}\$ is large, so is the voltage.
1 The transient response is of the form
$$I(t) = I_{\infty}+(I_0 -I_{\infty})e^{-\frac{t}{\tau}}$$
At t = 0, I(t) = I0 and at t = ∞, I(t) = I∞. |
H: Inverting negative voltage back to positive with LM324
To be able to measure the value with an Arduino Nano I want to convert the negative rail voltage to positive. I tried to build a simple inverting amplifier with unity gain using LM324. The supply is +/- 10V.
The voltage is converted but scaled down. When I measure the voltages on the pins I see the values noted in below pic with red. It seems that the inverting pin can't be pulled to pin non-inverting pin value.
For the test purposes I didn't attach any output load to the circuit.
AI: The LM324 datasheet says:
Large Output Voltage Swing 0 V to V+ − 1.5 V.
With a 10 V supply you can expect the output to go as high as 8.5 V which matches what you are seeing.
If you're feeding this into an Arduino 5 V ACD then you need a gain of only -0.5 to allow you to measure -10 V to 0 V. To achieve that you simply reduce R6 by a factor of two. The simple way to do this with reasonable accuracy is to put two 47k resistors in parallel. |
H: JFET stabilised wien bridge component ratios
I find myself in need of a sine wave oscillator and have decided on the wien bridge. I have followed all the tutorials but have a few questions that do not seem to be answered elsewhere.
Firstly, I understand the ratio between Rf and R3 determines the negative feedback loop gain set to 3, or just above, at a ratio of 2:1. But there are lots of combinations of resistances which would give that ratio, so what effect would say using a 1 OHM : 2 OHM resistance be compared to 10 OHM : 20 OHM? And the same question about the capacitor resistor combinations in the lead lag circuit.
Second, how do the values of Rf and R3 get selected when there is a JFET paired with R2? I figured that to get a gain of 3 after the gate voltage comes up then I would add the Rds(on) of the JFET to R3 and count them as one, so then when the JFET is off, there would be no resistance through it and the gain would be higher than 3, allowing oscillations to start. Is this correct? Any particular ratio between the JFET Rds(on) and R3, does one dominate, equal or does not matter?
Third, the negative peak detector which drives the gate of the JFET charges a capacitor, which has a resistor in parallel. What is that resistor R4 doing and how is its value determined? How is the capacitors value determined?
Lastly, what determines the output voltage? Say, I need a 0.1 v output to feed a BJT amp, what values would I need to change and how would I calculate them? I figured the output would be determined by the maximum peak to peak printed on the datasheet, but how would I bring this down?
Thanks for any replies
AI: Regarding the control loop Diode-C3-R4:
This is not a peak detector because the parallele resistor R4 continuously discharges the capacitor which - in turn - is charged by the output amplitude (if it can open the diode at a certain level). This is necessary in order to allow amplitude control in BOTH directions. The opamp gain swings around the nominal value of "3".
Hence, the output amplitude is NOT CONSTANT - it will exhibit a small amplitude modulation which is determined by the time constant C3-R4. This time constant should be at least ten times larger than the oscillation period. From this requirement you can select both values (C3 and R4).
Regarding the ouput amplitude: An exact computation is not possible (due to the nonlinear Diode characteristics). However, a good estimat is possible if you know the nominal value (during steady-state oscillations) of the FET resistance and the corresponding gate voltage. This give you the mean voltage across C3 and - together with app. 0.5 across the diode - a reasonable guess for the corresponding output amplitude.
EDIT (error correction):
There is a logical error on your side.
You wrote: .....when the JFET is off, there would be no resistance through it and the gain would be higher than 3, allowing oscillations to start.....
No, when the JFET is off the RDS resistance is very large and the opamp works as a unity gain amplifier (full feedback).
The correct description is as follows: At t=0 the ouput voltage (and the gate voltage) is zero and the FET is open - the RDS resistance is low (max current ID) and the gain larger than "3". Now - for rising amplitudes the gate voltage becomes more and more negative and the RDS resistance goes higher and provides more negative feedback (the gain is decreased until it reaches "3"). |
H: Basic Capacitor
In a circuit there are two capacitors, Capacitor a and Capacitor b, now both of them have the same voltage values but different farad values, now, I know this must be a basic question, but I'll like to know:
What is the difference does the capacitors make in the circuit, they both have the same voltage value, is it important to prioritize the farads value as well?
Basically, am asking: what is the unique difference between a capacitor with maybe like 220uf 12v and another capacitor with 2200uf 12v?
AI: The charge stored in a capacitor is given by \$ Q = CV \$, where Q is the charge (C, coulomb), C is the capacitance (F, farads) and V is the voltage (V, volt).
The 2200 μF capacitor holds ten times the charge of the 220 μF capacitor when both are at the same potential.
Figure 1. Ripple voltage from a full-wave rectifier, before and after the application of a smoothing capacitor. Source: Wikipedia - ripple.
If, for example, these were used on a rectifier circuit to smooth out mains voltage ripple then the 2200 μF would do a ten times better job than the 220 μF. |
H: 5V 4-pin Noctua A4X10 on Raspberry Pi
I want to connect a NOCTUA NF-A4X10 5V PWM 4-pin fan to a Raspberry Pi 3B.
The below is the circuit I'm planning to use.
(EDIT: Flyback diode (such as a 1N4001) is not needed since Noctua already provides polarity protection, and a brushless fan typically already has it);
(EDIT: No need for voltage divider) From Noctua documentation, the RPM output is an open collector output (see page 3 of Noctua Doc.). This means that if the Vcc is 3V3, and R=1k5 Ohm, we should be fine (current is then limited to ca. 2.2mA);
Resistence R2 (2K2) and transistor Q1 (2N2222A) are used to drive the PWM signal.
In other words:
Questions:
Is this circuit correct? Am I making any mistakes? I'm an engineer, but not an electrical one, so be kind... :)
Noctua does not seem to recommend an open collector design (see below)... What alternatives do I have?
From Noctua:
AI: A Fritzing cartoon is NOT a schematic.
You seem to completely misunderstand the configuration required for a 4 pin PWM controlled fan.
A 4 pin PWM fan is ALWAYS permanently connected to it's supply rail, in this case Yellow and Black connect to +5V and Ground and are not switched.
The PWM signal is ALWAYS (to meet the spec) driven by either open collector or Open Drain devices, you don't have to pull the signal up to +5V. If this signal is left open circuit the fan runs at full speed.
BLDC computer fans DO NOT need back-emf protection diodes at all on either the fan supply or the PWM signal.
You should connect it like this:
simulate this circuit – Schematic created using CircuitLab
To control the fan speed you need to produce a PWM signal from the raspberry Pi at 18 - 21 kHz.
I assume you already know all the limitations and requirements for the hardware PWM on R'Pi ….if not, perhaps start here.
Update: the Noctua whitepaper pointed to here ….is confusing.
It shows this for the PWM signal:
They then go on to say this:
On the first page they show the short circuit current for the PWM pin as 5mA, which would indicate a 1k Ohm pullup in the fan. In addition per the spec the fan must run at full speed with the PWM pin floating.
The second page where they say they don't recommend an open collector PWM signal makes no sense at all, since they say they meet the Intel spec and must already have a 1k pullup in the fan.
Since the fan already has a pullup to 5V I would suggest it is dangerous to your R'Pi to NOT use the open collector method since the R'Pi I/O is only 3.3V capable. Pulling this above 3.3V could potentially damage an I/O pin.
I would seriously encourage you to use the spec method (Open Collector). |
H: Verilog - Wiring multiple hardware instances together
I am very new to Verilog and digital hardware implementation.
I want to instantiate multiple instances of a hardware block, place them side-by-side, then wire them together (ie. one block's output is the next block's input). What makes it complicated is that I want to create a 2D array-like layout of these hardware instances. Thus, each instance would propagate a signal to its lower and right-side counterpart.
This block is instantiated once below:
alg_unit alg_unit_inst (
.clk(clk),
.rst(rst),
.init(init_temp),
.in_a(in_a_temp),
.in_b(in_b_temp),
.valid_D_in(valid_D_in_temp),
);
To instantiate multiple, I am using 2 generate loops.
generate
for (i=0; i<N; i=i+1) begin : alg_unit_generate_i
for (j=0; j<N; j=j+1) begin : alg_unit_generate_j
wire init_temp;
wire in_a_temp;
wire in_b_temp;
wire valid_D_in_temp;
assign in_a_temp = A[0];
// other assign statements here ...
alg_unit alg_unit_inst (
.clk(clk),
.rst(rst),
.init(init_temp),
.in_a(in_a_temp),
.in_b(in_b_temp),
.valid_D_in(valid_D_in_temp),
);
end
end
endgenerate
I need a way to refer to previously instantiated alg_unit blocks. That way, I can hook up the input signals of the alg_unit blocks generated "later" to the output signals of the alg_unit blocks generated "earlier".
Should I be assigning/storing output signals from the earlier-generated alg_unit blocks to intermediate "wire"s? Alternatively, is there a way to refer to previously instantiated alg_unit blocks?
Ie)
// alg_unit_inst[0] was a previously-instantiated block
// I feel like using the approach below may require hard-coding some instantiations ???
alg_unit alg_unit_inst[1] (
.in_a(alg_unit_inst[0].out_a),
.in_b(alg_unit_inst[0].out_b),
);
Thanks in advance.
AI: With access to System Verilog I would use a 3-dimensional array:
wire [31:0] a [0:N-1][0:N-1];
Now you can wire the ports using a[x][y].
For the module at position [i][j] you can use e.g. a[i][j] at the output. To connect that to the input of the next module you can there use a[i-1][j] or a[i][j-1] or if you need to connect diagonally even a[i-1][j-1]
If ever you must use Verilog (As I had to do before System Verilog came along) you use the same method as compilers use to map an N-dimentional array on a linear memory:
wire [31:0] a [0:N*N-1];
Now the index is a combination of j and i: a[j*N+i] (If I remember correctly) |
H: Maximum Gain and Maximum Power Transfer
I am a bit confused about Impedance Matching for maximum gain and for maximum power transfer.
I knew that the conjugate matching between, for instance, an amplifier's output port and a load Zl, is given by the condition Zout = Zl*. Under this assumption, reflection at the interface between them will be zero.
Does this operation correspond to maximum gain condition, or maximum power condition, or both? Is there a difference between these two conditions?
AI: There’s a difference.
conjugate matching reduces the VAR LOSS to real power transfer.
maximum power when matched results and 50% efficiency from a voltage source.
Higher efficiency and gain means less output power but lower input signal when load is say higher impedance than source. At extremes Gain with no load is twice the voltage but no current so no power. |
H: Short circuit detector (autoreverser circuit) using current sensor and switching relay
First of all I’m not electrical engineer. The original idea is described here.
It is a model railroad problem. The rails are carrying a power signal (DCC) 12-18 V. The frequency is ~17 kHz. It is a square wave signal described here.
The circuit swaps the hi and low rails when the short occurs. This it happens at the gap between two insulated parts of the rail track with the hi and low rails not corresponding. When the train wheel bridges the two unmatched rails we have a short. The reverser has to detect this at a lower level of the boosters amper limit and switch the signal to the rails of the reverse section.
In the original circuit, I replaced the shunt with an ACS712 current detector. I replaced the other parts in the circuit with parts that are available in Ltspice to simulate it. The original circuit checks and the second gap. In my scheme is only the detector for one gap.
Will this circuit work?
Is the ACS712 sensor a good replacement?
What are the suitable DIP components?
Can I "catch" the output from the 555 with an Arduino and switch the relay?
I have and other thoughts like set the comparator's limits with a potentiometer or from Arduino.
I hope the comments in the LTspice schematic will help. Any thoughts and critique are welcome. I didn't find a way to attach the LTspice file.
AI: Will this circuit work?
Do you have any reason to doubt the simulation? Looks fine to me.
Is the acs712 sensor a good replacement?
Sure. The bandwidth is adequate. You just need to pick the correct sensitivity range for your application. (5A, 20A, 30A)
What are the suitable DIP components?
We don't do product recommendations here. But your favorite distributor's website (Digi-Key, Mouser, etc.) will be able to help you there.
Can I "catch" the output from the 555 with an Arduino and switch the relay?
Sure, no problem.
I have and other thoughts like set the comparator's limits with a potentiometer or from Arduino.
Also no problem.
But if you're going to throw a microcontroller in there anyway, you can simplify the circuit considerably, eliminating the comparators, the 555 and the DFF. Just digitize the output of the current sensor directly (ADC with an adequate sample rate), do all of the logic in firmware, and switch the relay driver as needed. |
H: Audio Equalizer LTSpice Simulation
First, I'd like to say i'm not experienced on circuits, but i'm doing my best to learn.
I'm trying to create an audio equalizer which is capable of amplifying low frequencies (20Hz-200Hz), mid frequencies (200Hz-2kHz) and high frequencies (2kHz - 20kHz).
At the same time it should be capable of amplifying the overall output frequency \$\pm10\$ Hz.
I used a high pass filter and a low pass filter connected through a voltage buffer (LM741 Op Amp) to create a band-pass filter with different values of R and C to achieve the desired frequency to the low, mid and high frequencies.
I'm having problems with the LTSpice simulation, which doesn't output frequencies it is supposed to yield.
This is a screenshot of what I did and the output:
I wasn't sure if I had to add every voltage source to the Op Amp, so I just made one for every Op Amp.
V(n002) is for the one on the top (low freq band-pass filter) right before R13.
V(n013) in the middle right before R14.
V(n018) is the one on the bottom (high freq band-pass).
I calculated the high pass filter and low pass filter with the cutoff frequency:
\$f_c=\dfrac{1}{2\pi RC}\$
And checked the results using \$\textit{Mathematica}\$ software which showed the correct band pass filters.
Can any one explain me why it isn't working?
Thank you!!
AI: But it IS working, at least within the limitations of your opamp. The peaks in your response curves fall about where they should.
In fact, if you draw the asymptotes to your response curves, they hit the peak response level exactly where they should, as shown here for the low band filter, V(n002):
You can also see that the lower -3 dB point for V(n013) also falls at 200 Hz, as does the lower -20 dB point for V(n018) — all exactly as expected.
There are many Reasons not to use a 741 op-amp?
You're running into its gain-bandwidth limitations specifically.
And no, you don't need a separate power supply for every opamp. A single positive supply and a single negative supply would be sufficient. |
H: Printing current when using sinus voltage source?
I am very new to ngscpie, and I need a simple example of very simple circuit composed of two components, a resistor connected to voltage source of sinus wave via two wires.
then to print or plot current applied on the resistor and see the sinus wave, where resistor is one ohm, and voltage source of 1.5 voltage.
Kindly see attached snap-shot, how would I write this simple circuit and print current at R ?
I tried with this circuit:
V1 0 1 SIN(0 0.75 60 0 0)
R1 3 4 1
Rwire1 6 2 0.00001
Rwire2 7 1 0.00001
VV1 0 2 dc 0
VR1 3 5 dc 0
VRwire1 5 6 dc 0
VRwire2 4 7 dc 0
.tran 10ns 400ns 300ns
.print tran i(VV1) i(VR1) i(VRwire1) i(VRwire2)
.print dc i(VV1) i(VR1) i(VRwire1) i(VRwire2)
.end
which is like this:
I used VR1 to get current value for R1, what I expect is values between -0.75 and 0.75, as I am using sinus voltage source of 1.5v
however, what I get for VR1 is almost zero:
"VR1" => [-6.66155e-5, -6.66406e-5, -6.66658e-5, -6.66909e-5, -6.6716e-5,
-6.67412e-5, -6.67663e-5, -6.67914e-5, -6.68166e-5, -6.68417e-5, -6.68668e-5,
-6.6892e-5, -6.69171e-5, -6.69422e-5, -6.69674e-5, -6.69925e-5, -6.70176e-5,
-6.70428e-5, -6.70679e-5, -6.7093e-5, -6.71182e-5, -6.71433e-5, -6.71684e-5,
-6.71936e-5, -6.72187e-5, -6.72438e-5, -6.72689e-5, -6.72941e-5, -6.73192e-5,
-6.73443e-5, -6.73695e-5, -6.73946e-5, -6.74197e-5, -6.74449e-5, -6.747e-5,
-6.74951e-5, -6.75203e-5, -6.75454e-5, -6.75705e-5, -6.75957e-5, -6.76208e-5,
-6.76459e-5, -6.76711e-5, -6.76962e-5, -6.77213e-5, -6.77465e-5, -6.77716e-5,
-6.77967e-5, -6.78219e-5, ...],
Any idea?
EDIT
I’ve double checked the file, I used V1 0 1 SIN(0 0.75 60 0 0) and here is the output:
"VR1" => [-5.70678e-5, -5.76332e-5, -5.81987e-5, -5.87642e-5, -5.93297e-5,
-5.98952e-5, -6.04606e-5, -6.10261e-5, -6.15916e-5, -6.21571e-5, -6.27225e-5,
-6.3288e-5, -6.38535e-5, -6.4419e-5, -6.49844e-5, -6.55499e-5, -6.61154e-5,
-6.66809e-5, -6.72463e-5, -6.78118e-5, -6.83773e-5, -6.89428e-5, -6.95082e-5,
-7.00737e-5, -7.06392e-5, -7.12047e-5, -7.17701e-5, -7.23356e-5, -7.29011e-5,
-7.34666e-5, -7.4032e-5, -7.45975e-5, -7.5163e-5, -7.57285e-5, -7.62939e-5,
-7.68594e-5, -7.74249e-5, -7.79904e-5, -7.85558e-5, -7.91213e-5, -7.96868e-5,
-8.02523e-5, -8.08177e-5, -8.13832e-5, -8.19487e-5, -8.25142e-5, -8.30796e-5,
-8.36451e-5, -8.42106e-5, ...]
I am sorry it seems that the previous output was for different sinus input, I will try change the .tran and show output here
EDIT2
With V1 0 1 SIN(0 0.75 60 0 0) and .tran 20ms 1s 0ns I expected to get 50 readings, starting from 0 to 1second, jumping 20ms for each step, but I got only 5 readings:
“VR1" => [0.7470853, 0.2935244, -0.565677, 3.233746e-14]
AI: V1 0 1 SIN(0 0.75 60 0 0)
This is a sinusoidal source with amplitude 0.75 V and period ~16.7 ms.
.tran 10ns 400ns 300ns
This says simulate the time window from 0.0003 to 0.0004 ms in 0.00001 ms steps.
So your voltage source has the equation
$$V(t) = (0.75\ {\rm V})\sin\left(2\pi 60 t\right)$$
What is the maximum value of this source in the window you're simulating?
$$(0.75\ {\rm V})\ \sin\left(2\pi 60 [400\times 10^{-9}]\right)=1.97\times 10^{-6}\ {\rm V}$$
With 2 uV applied to your resistor, you shouldn't expect to see much current through it.
The real mystery is why you were seeing ~60 uA instead of the ~2 uA I would have expected. Are you sure the input file you shared is exactly the one used to produce the results you included in your post?
what I expect is values between -0.75 and 0.75,
To see this you need to simulate over the whole ~17 ms period of the source, not just a tiny 100 ns time window. |
H: Does 1200mAh Lipo battery will kill my circuit? help me to read the data sheet please!
I've found old arduinio project from Gitlab which runs the circuit with Lithium Ion Polymer Battery - 400mAh Unfortunately i wont be able find any Lip 400mAh in my country.Lucky enough i found one supplier has 1200mAh Lipo but i dont know how to read the data sheet!(forgive me I'm still a beginner). Im scared to use the 1200mAh as original circuit has MAX1704 fuelGauge and arduino code suppose shows the battery charging percentage on LCD display.
so project recommended 400mAh Lipo battery datasheet has below standard:
https://www.sparkfun.com/products/13851
and Lipo I found 1200mAh battery has below datasheet:
https://www.adafruit.com/product/258
can someone kindly enough to tell me if this is safe ?and tell me how to read this C rate and C5 rate difference please!
AI: If I have understood everything correctly, you are safe with the 1200mAh battery.
The nominal voltage is the same. The higher capacity is also an advantage.
The C Rating is simply a measure of how fast the battery can be discharged safely and without harming the battery. (https://rogershobbycenter.com/lipoguide)
This means with the 1200mAh battery, can provide higher currents for you application.
The 400mAh battery has 1C which means your maximum discharge current is: \$400mAh \cdot 1C = 400mA\$
For the 1200mAh with 5C: \$1200mAh \cdot 5C = 6A\$
The 0.2 prefix means a the same as C5 (https://batteryuniversity.com/learn/article/what_is_the_c_rate)
For charging, be aware that a maximum charge current of 500mA is suggested. |
H: To connect Active GPS Antenna wires on PCBA should Solder or use Connector
Will it make a difference if I solder or use the supplied SMA type connector to connect the wires of Active GPS antenna on PCBA?
I am using gps antenna of this type.
AI: I would definitely recommend a connector.
If your antenna should break down or you want to use another one, it would be much easier to replace it. Repeated soldering would also cause the PCB to suffer.
Electrically it is also better to use a connector.
Besides all that, your hardware will look more professional if you use a connector.
--edit: Assuming the connector solution and the soldering solution are both perfect, I would say both are electrically equal. I was thinking of the thermo-mechanical stress for the solder joint which could lead to cracks and later to a higher contact resistance. However, since one could now assume that the electrical connection would be equally good, the advantages of the connector solution speaks for itself.
--edit2: I want to add the input of JRE: Using an connector ensures a defined impedance whereas a solder connection would have an undefined impedance which may lead to unexpected problems. |
H: Ultrasonic module Water proof vs non-water proof types
Ranging SR04 Ultrasonic modules are available as water proof and non-water types.
In the water proof types SR04 modules there is only 1 sensor while in the non-water proof types SR04 there are 2 sensors, 1 as transmitter 1 as receiver. How does the single sensor SR04 water-proof modules work with single ultrasonic sensor?
AI: It is possible to measure distance with a single ultrasonic transducer.
First the the transducer is used to transmit an ultrasonic pulse, and then the same transducer is used to receive the echo thrown back from the objects in front of it.
The disadvantage of using a single transducer is, that it is very difficult (impossible) to detect objects that are close to the transducer.
The surface of the transducer is set in motion when transmitting the pulse, and it needs to settle before an echo can be detected.
The settling time can be significant depending on the transducer type. Typically 1500us, which is approximately 250mm in distance from the transducer. |
H: Is is safe to let my PWM charge my 12V battery at 14.8V?
I have a 12V battery linked to my solar panels.
In the middle I have a PWM charge controller, that is configured by default to charge the battery if Voltage if lower than 14.8.
At night, battery goes down to ~13.8V. (Which I think is the voltage of the full battery) - with no added voltage from solar panels.
Is it safe ? Does it reduce battery life ? (I have a deep cycle lead battery 80Ah.)
Should I change the PWM default configuration to put 13.8V instead ? Why isn't it 13.8V by default ? Is there some advantages I don't understand when set to 14.8V ?
EDIT : I have a battery Hankook DC24MF and a cheap 15$ PWM 20A.
AI: Check the battery datasheet for proper voltages that are exactly correct for your battery. Otherwise use safe values.
I have a commercial solar battery charger that by default overcharges the battery once per month to 15 volts to equalize the cells. Otherwise it charges it to 14 volts. These voltages can be changed from the user interface.
If you use too high battery voltage, it will cause gas formation in the cells. Traditional wet batteries will dry, gel batteries not so much as they contain chemistry to minimize it. But they will suffer and the end result is diminished battery life.
The most important thing for me has been to learn that it's not a good idea to overcharge the batteries. While it "feels" like you have more charge in your batteries when they say 15.0 volts than 13.5 volts, the difference is quite small in reality, as the last couple of percents of charge raise the voltage very quickly compared to the normal operating conditions. |
H: step up from 2 AA to 3.3V
I've read some related questions, but I was not able to find/understand a proper solution
I'm using 2 AA batteries to power a SAMD21 MCU (arduino mkr series), a DS18B20 probe and a MCP3424 ADC. My problem is that temperature probe and ADC need more than 3V or 2.7V (respectively) to work properly, and I've seen that with voltages lower than 3V, measurements works, but have an important offset.
I'm trying to solve the issue, and my constraining factor is having the longer autonomy I can get, and the simplest circuit with less components. So I'm thinking on using a easy to solder, low footprint and very low power consumption step-up converter that could take the 2xAA batteries an step up to 3.3V for the instruments just during the measurements periods (about 30s every 12min)
Do you have any hint here?
Thanks
AI: I would suggest to use the TPS61221 from TI.
It has no enable pin but you don't need to disable it because it has a very low quiescent current of \$5.5\,\mu\$A |
H: Controlling the current through multiple LEDs linearily and efficiently
I have around 100 infrared LEDs, each with an adjacent phototransistor to detect small differences in the distance of several objects (QRE1113).
As the objects materials differ, I want to be able to calibrate the intensity of every emitter separately to compensate for this.
As each phototransistor's output is measured with a very high sample rate (~50ksps), I cannot use a PWM controller, as those typically operate around 20kHz, and so need to directly control the current flow through each IR emitter.
As I would like to do this calibration phase over I2C, my idea was to use a digital potentiometer such as the MCP4451 as a rheostat. It has 4 channels and so I thought of using it as the current limiting resistor for 4 LEDs. While this is appealing on the one hand (low price, easy setup), I see two main problems:
All affordable digitial potentiometers have a range of at least 5kΩ. I need a range of around 400Ω. By using a parallel resistor I could adjust the range, but the resulting range would is not be linear anymore. While perfect linearity is not required, I want to be able to do reasonable adjustments in all regions, and not just on the low amperage end.
Efficiency. I am driving all these from a 5V source, and without calibration hardware I was able to put 3 LEDs in series with a resistor. Therefore, the average power consumption per LED was around 30mW, which is great.
With this approach, each LED would stand on its own with its resistor, resulting in additional 100mW heat for LED operation at 30mW.
In the following graph you can see the resulting relation from wiper setting of the MCP4415 to the resulting total resistance and LED forward current. The calculations are for using a parallel 680Ω resistor and a 68Ω in series (to set the maximum):
Related circuit:
simulate this circuit – Schematic created using CircuitLab
My main problem is definitely the non-linear wiper to resistance relation, the efficiency is only a secondary consideration. I'm open to any solutions, but I cannot afford a dedicated LED controller for each LED, as my budget is limited, which is why the MCP4415 appeared as an appealing solution to me (~25€ to control all LEDs).
EDIT:
I want to clarify some aspects:
I would like to be able to control the current for each LED separately, and linearly, from 10mA to 30mA in at least 64 steps. I don't need absolute precision for any of these values, just a approximately uniform way to step through this range to adjust the brightness for the LED linearily.
Efficiency is not my main goal. Functionality and cost are the most important factors.
I was hoping to be able to use something similar to the MCP4415, as it is cheap and it does not need to be actively interfaced the whole time (it retains its value at least until shutdown).
My calibration phase occurrs once at startup, where i will iteratively approximate the correct current by using the feedback from the phototransistor.
The 5V network will mainly power these LEDs, and a few logic ICs. If required, I can switch to another voltage.
EDIT 2: Additional responses to questions from the comments.
Firstly, please let me clarify that this is not a commercial project, but just a personal project. Also, I am a computer scientist and not an electronics engineer, so please bear that in mind. (Therefore, there is no spec I need to follow) - I'm open to any suggestions.
Show application.
And what distance and range of reflectivity?
Objects are made of wood, and cannot be painted or modified. Therefore the reflectance varies over different objects (dark spots, etc.).
Closest possible is around 3mm (+- 1mm), furthest is around 13mm (+-2mm). So the travel distance will be around 9-10mm for each object.
Everything is wood, therefore all measurements have these high tolerances.
The PCB is already at the furthest point from the objects. I probably can't change these distances (maybe -+ 1mm).
I have 12-bit ADCs measuring the phototransistors, and I just want to waste as little precision as possible. Therefore, I want to adjust the IR LED so that the near point (3mm) has roughly the same ADC value for all objects. Roughly equal is all I need - I just don't want one ADC to measure 3000 at the near point and another measure 3500. The far points are not important.
Fundamentally you have made some poor interpretations of datasheet, assumptions and thus poor choices. hFE=CTR (effective) = IcON/If varies from 0.2% to 0.9% at 10mA @ 1mm using a polished alum mirror.. What is your spec for error tolerance ?
And what variation in Chip height? 0.1mm max? 0.05 mm?
I see, this is also the reason why I want to be able to do calibration. All tolerance information I could gather is listed above.
Regarding chip height: I have to hand-solder all chips, so assume a pessimistic 1 mm.
You say 3 IRs in series but then 1 R per IR LED ??? Showing none in series ?
Sorry if I have been unclear. I meant one resistor per 3 LEDs in series, this is the current design (below). What I meant was that I can't put them in series if I want to control them separately.
In total I have 90 sensors, so this pattern repeats 30 times.
AI: How about an OPAMP current source fed by a modulated variable voltage from PWM?
simulate this circuit – Schematic created using CircuitLab
The idea is to make the OA1 regulate the current in a way that makes the voltage on Rsense equal to Vin, thus making current though the LED proportional to Vin. OA2 acts as a buffer amplifier for that variable voltage which can be generated by PWM and filtered to quasi-DC.
OA2 provides a way to modulate Vin with your digital signal Vmod. The modulation is inverted: When Vmod is high, Vin drops to zero, while Vmod=0 results in Vin being set proportionally to the PWM duty cycle. |
H: If my circuit is electrically isolated, do i have to worry about a polarizing effect on my sensor's output?
If I am making a conductivity sensor one of the things it need to watch out for is polarizing the water.
easiest way to do this is have the output output signal of the sensor have a +/-0.2V square wave.
i was wondering if i electrically isolate the output circuit with an isolated DC-DC power supply, can i just have the circuit output a 0-0.4V square wave (or in my case a 2.3-2.7V square wave), since its floating with respect to the water anyways?
AI: As the article you linked says, the signal should be "with a symmetric oscillation with respect to both electrodes (no net polarization)". Net polarization — an average DC voltage — will result in galvanic corrosion. Ensuring the average is zero means the corrosion reverses course perpetually and the electrodes will remain mostly intact.
Your proposed square wave has a positive average. Your isolated power supply is helpful because it ensures no current will flow between the sensor and anything else, but the sensor still needs to be symmetric.
In order to make a symmetric output, use an H-bridge circuit to reverse the two electrodes. H bridges are commonly used for motor reversing and can be made of transistors or obtained as a single IC. Instead of generating a square wave signal that goes to an electrode, you would send it to the H-bridge to trigger the reversing.
Another way to make a guaranteed symmetric and isolated output is to use a transformer (at which point you don't need an isolated DC-DC either) but I don't know what effect that would have on conductivity sensing. |
H: Thermal Glue solvent
I have a PCB with many chips on it - it's a "hashboard" for an ASIC bitcoin miner. There are 63 chips on every hashboard, and each chip has a small heatsink on it.
I tried heating the heatsinks with a hot air gun to remove them, but most of time the chip comes off along with the heatsink, and the chip is still stuck to the heatsink.
Is there any solvent in which I can soak the boards or chips that are stuck to the heatsinks, in order to separate them?
AI: Dichloromethane appears to be the best solvent, but you could also try acetone. It may take hours to penetrate. A simpler method you could try is boiling the board in water.
Check here for reference |
H: Opamp input offset voltage...common mode?
Looking at the datasheet for an OPA197 opamp, I see this:
What is the circled expression trying to tell me?
The common mode voltage is equal to the voltage at the non-inverting input minus 1.5 V which is equal to plus or minus 10 µV? I can't follow that.
Where does the 1.5 V come from? What is the point of this section in the datasheet?
AI: The circled expression is under the "Test Conditions" heading so it is describing the conditions under which the input offset voltage was measured.
V+ is the name of the positive power supply pin:
The non-inverting and inverting inputs are called +IN A/B and -IN A/B, respectively.
The expression is therefore telling you that the input offset voltage was measured with a common mode voltage set to 1.5V below the V+ voltage. This information is necessary because the top of the table (which you can see in your screenshot) says that
\$V_{\text{CM}} = V_{\text{OUT}} = V_{\text{S}} / 2\$ ... (unless otherwise noted)
Without this note you would assume the common mode voltage was \$V_{\text{S}} / 2\$ when the input offset voltage was measured. That measurement is given in the first three lines of the input offset voltage specification (where each of those lines is for different temperatures). |
H: IRF520 max frequency
I'm having trouble supplying 300mA to an led COB using an IRF520 MOSFET as PMW, controlled with arduino nano.
What is the maximum Frequency, in which I can turn the led on and off in this setting?
In the IRF520 DATA sheet:
Turn on delay time: 8.8ns
Rise time: 30ns
Turn off delay time: 19ns
Fall time: 20ns
Is the maximum Frequency then 1/(sum of above numbers) for the IRF520?
And for the arduino timers, are they all 16MHz or does it change from pin to pin?
What is the correct calculation (please give details if different pins result in different frequencies) to determine my maximun possible operating frequency (MOSFET + arduino)?
Thanks
AI: Nano output can only switch at 8 MHz max (except for the system clock), so the IFR520 could only change state every 125nS max. (62.5nS x 2 = 125nS, so one rising edge at time 0, followed by a falling edge 62.5nS later, then a rising edge at 125nS, and so on).
You should also look at logic level MOSFET, as th IRF520 is barely turned on with a logic level on the gate (Vgs(th) (Max) @ : 4V @ 250µA), and needs 10V to turn fully on; where as a logic level part such as AOD510/514/518 will turn fully on to conduct with a very low Rds (0.004 ohm for AOD510) at that level. (AOD514 and AOD518 are a few milliohm higher, check datasheets at Digikey.) |
H: Are phase angles in filter transfer functions primarily for stability?
I see transfer functions and bode plots (magnitude and phase) and it occurred to me, that I don't really use the phase plots at all. My career experience seems to have gotten away without having to use or calculate them except once where I had a stability issue with an opamp. But this just shows a gap in my experience / knowledge that I would like to resolve before I genuinely need it.
When we look at general filter topologies that show phase plots, why is that relevent to show. For instance, a single order LPF will have a phase shift of -45 deg @ fc - so what ? Why do we care about these numbers in filters ? Is it that when we cascade them, it becomes relevant when looking at phase margin ?
AI: Different applications are sensitive to phase variation with frequency for different reasons.
It can impact stability margin if the filter is in a closed-loop system.
The total error between a source signal and a filtered signal is a function of phase (as an extreme example, if h(x) defines a filter with a gain of 1 and a phase shift of 180 degrees at some frequency, then at that frequency the error signal y = x - h(x) will have an amplitude twice that of x).
If the phase does not change linearly with frequency then the group delay of the filter won't be constant. This will causes pulses to be smeared out, which is a Bad Thing in communications systems.
If the group delay of a filter is high it will contribute to the overall delay in a communications system. This is much less likely to be a problem, but can still be an issue in some applications. |
H: What is internal generated voltage of synchronous motor?
A 208-V Y-connected synchronous motor is drawing 40 A at unity power factor from a 208-V power system. The field current flowing under these conditions is 2.7 A. Its synchronous reactance is 0.8 Ω. Assume a linear open-circuit characteristic.
The answer is given as:
However, I do not understand where they got that equation for EA. I was under the impression that the equation for the phase voltage is:
Wouldn't this mean that the equation for the internal generated voltage is EA = VΦ + jXsIA?
EDIT:
My bad. That's the equation for a synchronous generator, not a synchronous motor.
This is the equation for a synchronous motor:
AI: If you supply mechanical power to a synchronous machine, it becomes a synchronous generator generating electrical power.
Electrical power converts the synchronous machine into a motor providing mechanical power.
From Electric Machinery Fundamentals. As a motor:
$$V_{\phi} = E_A + j I_A X_S + I_A R_A$$
As a generator:
$$V_{\phi} = E_A - j I_A X_S - I_A R_A$$
Note direction of current. The voltage seen at the terminals \$V_{\phi}\$ will depend on
whether the synchronous machine takes current or generates current, hence the change of signs. Just Kirchhoff's Voltage Law. |
H: Guidance on the use of pins of LM1117
I plan on using this 3.3v regulator
It has 4 pins on the SOT-223 package
I plan on doing the following ( but want to check )
Pin 1 - Gnd
Pin 2 - Vout - 3.3v -- Tied to pin 4 feeding my circuit
Pin 3 - Vin - 5v Supply
Pin 4 - Vout - 3.3v -- Tied to pin 2 feeding my circuit
Does this look correct?
The reason I act is that pin 4 is a bit 'odd'. This question has set me straight : LDO - SOT223 - What's the Fourth pin for?
Basically its a tab for heatsinking, but it is typically connected to Pin 2.
Can I therefore safely just have a pad for the Tab(pin 4) with nothing connected to it? And use pin 2 for the vOUT alone?
AI: Often, pin 2 is not brought out to a pin you can solder to the board. Thus pin 4 is used.
The datasheet covers both options. See the TO-252 or DPAK. I use those when higher current is involved to increase the cooling area available. There pin 2 is still connected to the tab, but does not go down to the board for soldering. |
H: Audio amplifier mono operation and power consumption
I'm looking to use a PAM8406 in Class-D mode, with only the left channel active.
The datasheet doesn't discuss how to handle unused pins for the right channel to "deactivate" that half of the amp.
Should I connect INR, OUTR+ and OUTR- to ground?
If not, what can I do to ensure the right channel isn't operational?
Additionally, I plan to provide 3.3v to the amp to a 2Ω load, which yields about 2W amplification per chart 17:
Given 3.3v at 2.2w, this means an amperage draw of about 666mA (not accounting for efficiency, etc), right?
Is that amperage draw per channel or combined? If it's combined, this means an amperage draw of 333mA in mono mode, correct?
AI: Do not connect outputs to ground!
I would connect INR to ground through a resistor and a cap, per their "typical applications schematic". If I were feeling particularly paranoid (which I usually am when going off-datasheet) I would connect an 8\$\Omega\$ resistor between OUTR+ and OUTR-. Then I'd cross my fingers and hope the resistor doesn't see much of a turn-on transient (I'd probably back that up with some tests, watching OUTR+ and OUTR- on an oscilloscope while powering up my board). |
H: Can a castellated PCB/module have electrolytic capacitors in it?
We're designing a small module (3in x 3in) that will have castellations on the edges for connection. I just watched a video on castellation PCB design. The video talked about the module going thru reflow several times. Once to build the module and then the customer to assemble the module on his/her PCB. We have a power supply module that needs electrolytic capacitor at the regulated outputs and unregulated inputs. Outputs are 3.3vdc and 5vdc. Input is about 18vdc. Do regular electrolytic capacitor withstand reflow 2,3 or 4 times without issues? Thanks.
AI: You should look at the reflow instructions in the datasheets (or elsewhere) for the capacitors you are using. The datasheets for at least some of the aluminmum electorlytic capacitors from Nichicon say that the reflow should be done within 2 cycles.
If that doesn't suffice, then you should just contact the capacitor manufacturer directly. Nichicon has a note that says to contact them if the reflows conditions going to be different than what is written.
The remainder of what I am about to say is second hand information taken from a response here:
Is it safe to repeat reflow soldering?
Lelon says something similar and also says do not attempt 3 reflows.
Murata specifies a total accumulated time for reflow instead of the number of reflows. |
H: Identification of two components
Can you help me identify these two components? I cannot find information on them on the web. They appear to be ceramic filters of some kind.
Front of Component 1:
Back of Component 1:
Front of Component 2:
Back of Component 2:
AI: They are resettable fuses, the big one is 600V for 160mA
https://www.distrelec.nl/en/radial-resettable-fuse-240-ma-ohm-littelfuse-trf250-120/p/16026991
The second is 30V for 1.6A
https://m.littelfuse.com/~/media/electronics/datasheets/resettable_ptcs/littelfuse_ptc_30r_datasheet.pdf.pdf |
H: Using Pointers to implement a filter
I'm trying implement a fairy basic filter, and right now I have just some simple test code for me to enter in values. It errors out on the line when it gets to where I call the function I have written. I am fairly certain my error is coming from how I am using the pointers but I just don't understand pointers well enough to know what I'm doing wrong. Any thoughts on what I am doing wrong?
If it helps to understand what the filter should be doing: when a new value is input it is added to the to the buffer and the old state of what the average of the buffer was at is subtracted from the the buffer. the new average of the buffer is returned.
#include <stdio.h>
#include <stdlib.h>
int main()
{
int a,b,a_buffer,b_buffer,valueToPrinta,valueToPrintb;
printf("a value: ");
scanf("%d",&a);
printf("b value: ");
scanf("%d",&b);
valueToPrinta = integrate_filter_data_16bit(a, a_buffer, 2);
valueToPrintb = integrate_filter_data_16bit(b, b_buffer, 2);
printf("%d and %d", a_buffer,b_buffer);
return 0;
}
int integrate_filter_data_16bit(int integrator_buffer_16bit, volatile int *pintegrator_accumulator16bit, int integrator_size_16bit)
{
int temp_integrator_accumulator_16bit = *pintegrator_accumulator16bit;
/* compute the new value of the IIR filter accumulator */
*pintegrator_accumulator16bit = (int)integrator_buffer_16bit + (temp_integrator_accumulator_16bit - (temp_integrator_accumulator_16bit >> integrator_size_16bit));
return((int)(*pintegrator_accumulator16bit >> integrator_size_16bit));
}
AI: I think your problem is simple.
If your function accepts a pointer, you should use the & operator on the variable you pass to the function. In your case, the lines that say:
valueToPrinta = integrate_filter_data_16bit(a, a_buffer, 2);
valueToPrintb = integrate_filter_data_16bit(b, b_buffer, 2);
... should instead say...
valueToPrinta = integrate_filter_data_16bit(a, &a_buffer, 2);
valueToPrintb = integrate_filter_data_16bit(b, &b_buffer, 2);
Or alternatively you could change your variable declrations from:
int a,b,a_buffer,b_buffer,valueToPrinta,valueToPrintb;
... to:
int a,b,valueToPrinta,valueToPrintb;
int a_buffer[1],b_buffer[1];
... because then a_buffer and b_buffer, as symbols, are implicitly pointer variables equivalent to &(a_buffer[0]) and &(b_buffer[0]) respectively.
That being said, your printf's make no sense. If you put & before an expression, you get the address of the memory location allocated to the evaluation of that expression. If you don't put an & before an expression, you get the value stored at the memory location allocated to that expression. That's all there is to it. |
H: Resistor & capacitor are getting too hot
I made a transformarless power supply with capacitor. When i connect it on ac, it light the leds. But after some second the 100ohm resistor and 470uf capacitor get too hot. Its too hot that i could not touch it then. What's the
problem . Pls help me.
AI: With 12Vdc drawn from 230Vac, you have a current-limit by 100Ω and 2.2uF @ 100Hz = -j800 Ohms for an apparent current of ~170 mA .
with 230mA rms thru 100 Ohms the power dissipation is I^2R-Pd=5.3W exceeding its rating and operating a finger burning max temps of 150'C+
Conclusion
You must use an e-Cap rated for > .4A ripple current with low ESR for safety or reasonable life.
Don't use Chinese Caps with no specs ( Japanese are far better)
example Rubycon
Manufacturer Part Number 25ZLH470MEFC10X12.5 730 mA ripple @ 120Hz
Proof with SIM
- Always derate power resistors at least 33% and pre 50%
- so use a 10W resistor or add another 100 OHm 5W in series. which only reduces overall current by 5mA. |
H: What Resistor to use between Source and an IC
I'm trying to make a clock, and as part of that I need to power some IC's. To give a specific example I'm looking at the TI SN74HC163 4 bit counter. After some searching around, I found myself directed to this (basically Ohm's law) equation from the sacred texts:
The problems I'm facing are:
I'm not sure what to use for current in the equation (I'm that not good at reading datasheets and I'm not sure whether to use ±50 mA or one of the other numbers given to me in the MicroAmp range.)
Conceptually the equation doesn't make sense to me. If the Voltage drop across a resistor depends on it's proportion of the total resistance of the
(series) circuit, then shouldn't I need to have the resistance of the IC? Apparently I don't, but in that case I don't understand how this works.
AI: If the voltage drop across a resistor depends on it's proportion of the total resistance of the (series) circuit, then shouldn't I need to have the resistance of the IC?
Exactly right and since the "resistance" of the IC varies with whatever it is doing the resultant voltage to the IC would vary too. That's why we don't regulate voltage in this manner.
Instead, you require a regulated power supply which will hold the output voltage steady across a wide range of currents. The chip you have chosen has a 2 to 6 V operating range but 5 V would be standard and a suitable ready-made PSU such as USB chargers are readily available and provide the voltage regulation you require. |
H: Surface Mount Resistor Clip?
I have a goofy idea: a user is given a PCB and a pack of surface mount metal film resistors. To configure the board's settings, the user places various combinations of resistors into several 'sockets' or little clips on the board which surface mount resistors fit in in the same fashion as batteries in a battery holder.
Are there any current components that could make such a 'socket'? If not, how could this effect be achieved? I have thought about soldering two small spongy-like conductive blocks with grooves in them to the board and inserting the resistor between them and using tin foil or even a solid block and an oval wheel that rotates and locks the resistor in place but all seem a little complicated compared to two memory-metal contacts.
AI: A similar system to what you describe exists for fuses made by litelfuse. I don't see any reason why a similar socket couldn't be used for resistors
littelfuse 2A SMT clip system
You can also get test sockets for resistors and caps if thats more what youre looking for
Test Sockets |
H: Refraction vs Reflection in Ultrasonic sensor for water level detection
I want to use ultrasonic module JSN-SR04 for detection of water level inside tank. The US module has single sensor for Transmission and Reception of US signals as shown below.
I wonder if US sensor will work reliably for water level detection or if there will be absorption or refraction of US waves inside the water body and little or no reflection of the US waves? How can I check this analytically? I don't have the modules at hand at the moment but I don't know how can I find out about any possible problem in level detection.
The size of water tank is 4 x 5 x 6 (L, W, H) and it is made of concrete. Is it possible that the concrete walls will also reflect the US waves and disturb the sensor readings?
AI: You can neglect the part of sound intensity entering the water.
What happens at the surface is illustrated here:
(Source: https://de.wikipedia.org/wiki/Datei:Partial_transmittance.gif)
The more different, however, wave impedances of both media (air and water) are the more energy is reflected and fewer energy enters the second medium.
At a perpendicular angle of incidence the ratio of reflected and incident sound intensity is
\$\frac{I_r}{I_i} = (\frac{Z_{air} - Z_{water}}{ Z_{air} + Z_{water}})^2\$
where
\$Z_{air} \approx 410 kg/m^2s\$ and
\$Z_{water}\approx 1480000 kg/m^2s\$
(waveimpedance values are taken from German Wikipedia article about waveimpedance)
As you can see, the values for air and water are very different and therefore the ratio is very very close to 1 (ca. 0.999), i.e. almost all sound intensity is refelected and almost none is entering the water.
BTW: this is why a gel is applied between source/sensor and skin when doing ultrasound scans. Otherwise, if there was even a thin layer of air between sound source/sensor and body most of the ultrasound energy couldnd't enter and leave the body (\$\approx\$ water). |
H: Can not recognise this piece of equipment. It is attached to the mains
It is normally quite noisy, but has gone silent.
AI: The black box with white text in a circle is a week timer.
Not how there are Roman numerals: I - II - III - IV - V - VI - VII
which is 1 - 2 - 3 - 4 - 5 - 6 - 7 for the days of the week.
There are "6", "18" and "24" to indicate the hours of a day.
The green jumpers are the "ON" jumpers.
The red jumpers are the "OFF" jumpers.
These clocks are powered by a synchronous motor which rotates very accurately because it uses the mains frequency (50 Hz or 60 Hz) to rotate at the correct speed.
These motors have quite thin wires inside and sometimes these just break.
As this is all mains powered you should call an electrician to replace the clock. |
H: Load cell accuracy: rated output vs. full scale
I'm currently shopping for some subminature load cells for a research project. I've narrowed it down to two options, the FUTEK LCM100 and the Burster Model 8417. Problem is the two specify their accuracy in a different manner.
Futek gives the standard Nonlinearity, Repeatability, Hysteresis values but as a % of rated output:
Nonlinearity: ±0.5 % of R.O.
Hysteresis: ±0.5 % of R.O.
Nonrepeatability: ±0.1 % of R.O.
Whereas the Burster gives a single value as a combined % of full scale:
Combined value consisting of non-linearity, hysteresis and nonrepeatability,
in installation position: < ±0.9 % of F.S.
The rep from the Burster reseller says his are more accurate by 1.1%, but from what I can see the FUTEK cells are more accurate. Am I missing something here? Are rated output and full scale synonymous in this context or is there an important difference? Does "combined" mean a sum of all of the accuracy percentages or an average?
AI: Rated output and full scale are intended to mean roughly the same things here.
There's not a lot to choose between the two devices in terms of accuracy, both have 'about 1%' total error, and esssentially the same temperture coefficient.
There are a couple of differences.
Overload
Futek gives a safe overload of 150%. Burster indicates that a static 100% is safe, static 200% is an overload, and says 70% is the maximum for using it dynamically, recommended 50%. So you can't compare apples directly with apples here. With dynamic loading, you might want to contact the manufacturers to find out exactly what their test conditions and their failure criteria are.
Stiffness aka deflection
There's an order of magnitude difference here, the Futek is stiffer and specifies a resonant frequency, will that matter to you? |
H: How to calculate voltage-power to lower voltage-power?
I have a solar panel 18V 2W. How do I calculate how much power that is at 5V?
Thank you in advance
AI: You will have 2W less losses at 5V, which means more current.
2W / 5V = 0.4A max assuming no losses... |
H: What does this value mean in a BJT datasheet?
In the switching characteristics section of a BJT datasheet I often see test conditions like \$I_{B1}=I_{B2}=1mA\$. I understand this is the base current, but what exactly do they mean by \$I_{B1}\$ and \$I_{B2}\$?
Example: https://www.mccsemi.com/pdf/Products/MMBT3904(SOT-23).pdf
AI: It means that the current for charging the Base is the same as the current used to discharge the Base capacitance when they do fall time testing.
An exemplary circuit to do so is shown in this datasheet.
You may also have a look at:
How to determine BJT switching time |
H: Why do we need a bootloader separate from our application program in microcontrollers?
Why do we need a separate program in the same flash program memory of a microcontroller, specifically STM32F103, which is called a bootloader?
What is special about it to keep it separate from the main application program?
Generally speaking, does a bootloader of a microprocessor-based system (say PowerPC MPC8270) do the same job as that of a microcontroller (say ARM STM32F103) or are they doing fundamentally different jobs from each other and yet both are called a 'bootloader'?
AI: A bootloader on a microcontroller is responsible for updating the main firmware over a communication channel other than the programming header. This is useful for updating firmware in the field over BLE, UART, I2C, SD cards, USB, etc. It would be extremely inconvenient to require customers to purchase programmers just to update the firmware on their devices.
The reason why the bootloader is kept separate is for reliability. The bootloader and application code are placed in separate sections of flash, so that the application code can be erased and re-written by the bootloader without changing anything related to the bootloader code.
If the bootloader and application were kept together, then the bootloader code would need to be copied to RAM before it could run, since any firmware update would erase the bootloader code in flash. If power were cut with the bootloader code in RAM and the flash erased, the device would be bricked. |
H: Can we extract CTR parameter of an optocoupler from its SPICE model this way?
Regarding 4N26 optocoupler, I tried to obtain the following results from the datasheet by LTspice:
So as in the test condition I set the forward current 10mA and I set the Rload such that Vce = 10V.
If my setup is correct, the LTspice simulation outputs 7mA current for 10mA forward current at test condition where Vce = 10V.
So in my case CTR becomes 70%. Is what I am doing correct? Does that mean for the SPICE model of 4N26 the CTR is set 70%? By the way why would they do this test in active region where Vce = 10V? Isnt it better to use this device in saturation region?
AI: What is the point of doing such measurements? If we know the CTR is not constant, but it will depend on the IF current and Vce voltage.
My test circuit
And CRT versus IF for a different Vce voltage. |
H: DC Power Connector Type
I have looked at many DC connector types but still couldn't find what type is the following connector. It's not XLR or Power DIN. Any ideas?
It's similar to GX16-4 4-Pin 16mm Aviation Pug but it's not the same
AI: I am quite certain it's from the Hirose HR-30 series.
You should measure the dimensions to confirm. |
H: What units are kpts?
I am parsing data from a Siglent SDS2000X oscilloscope. The first chunk (0x00 - 0x003) is for wave_length. The data sheet states that for arbitrary waveform generation, the wave length is "16 Kpts".
What unit is Kpts? Kilo-Points? How would I convert that to a wavelength unit such as meters? Is a value of 3622260667 reasonable?
Specs: https://www.siglent.eu/sds2304x.html
AI: K for "thousand"
pts for "points".
The unit is thousands of points.
How would I convert that to a wavelength unit such as meters?
You can't. This is the maximum number of samples that can be used by the waveform generator function of the instrument.
It isn't directly related to the wavelength of the signals the generator can produce (assuming the sample rate is adjustable, which isn't clear).
It does give relationship between the lowest and highest frequency components in the signal generated. This limit would be about 8000:1. This would also limit the minimum duty cycle if you were using it to produce low duty cycle pulses.
It doesn't say anything at all about the actual oscilloscope waveform measuring function, or the data produced when measuring a signal with the oscilloscope.
Is a value of 3622260667 reasonable?
3622260667 what?
If that's the frequency of your signal in Hz, then no, it isn't reasonable to measure this with the scope you linked to. The scope has a bandwidth of about 300 MHz. It won't be useful to capture a signal with frequency 10x that. |
H: ( How-To ) Ultra Low-Profile PCB Stacking
Recently I found myself needing to stack two small circuit boards on top of each other for a modulation project. The problem is that the areas I want to connect together on the two boards have no components or traces on them, and traditional pin-style stack ups (even machine headers) leave an unwanted gap between boards.
How can I stack the boards flush with on another and have a minimal gap between them?
I have seen This Question which shows an approach to stack boards permanently flush together, but I need a solution that is removable.
AI: What you need is a new Sycamore contact. They allow you to plug boards together with minimal spacing in between. This is especially useful when making add-ons for a basic board which can be replaced and upgraded.
I would advise you to put a via through the edge of the contact pads (if possible) to prevent the connector ripping off the board in high-stress applications. You will be surprised how long they last!
There are several variations for different pin sizes and top/bottom entry:
Here is a video: Sycamore Contact
This will require compatible male pins on your second board. For my application, female pin headers with long male legs will work, but there may come a time when you wish to attach boards without any noticeable protrusions on either board. SMD male pins that I have found so far are not adequate because they leave a gap between boards. Feel free to comment useful part #s below.
Edit:
I found that Escutcheon pins are a great alternative to pin headers for a protrusion-free connection to the Sycamore contact:
The pins are gold-plated for a longer contact life. Add a thin strip of spongy adhesive between the boards and you're good to go! |
H: What are the options of PCIe dev boards these days?
do you know if there is any fpga PCIe dev board that would support adding/removing pcie capabilities and examining tlps?
AI: This is not a feature of the dev board so much as a feature of the PCIe hardware on the FPGA. At any rate, the PCIe hard cores on Xilinx Ultrascale parts will allow you to add capabilities, and the interface to the core is at the transaction layer. You can't look at TLPs used within the core (configuration TLPs), though. |
H: DC Boost Converter stepping up voltage very slowly, if any
I've come across DC boost converter and told myself - why not to try it as well? So I started building a simple circuit which includes BD243C NPN Transistor, ATTiny13A programmed to give some pulse to the Base of the transistor, 16 uH inductor, 82 uF 450 wv electrolytic capacitor and IN4007 diode to prevent current flowing from capacitor back to the circuit.
I calculated the needed duty cycle to have 30V on the output from 5V input which was around 0.83. Then I wanted the pulse width (10 ms period), I got the result of 8,333 ms. The remaining 1,667 ms should indicate the time there's no pulse happening.
So where is the problem? When I powered my circuit using 5V battery, voltage rises to 7V, if I wanted to have for example 10V, I would have to wait for almost an hour to have 10V on the output and if I wanted more, I would have to wait more than one hour. I don't know exactly where the problem is.
Before when I tried this circuit for the first time with 1ms period and I wanted 10V on the output from 5V, it worked. According to calculations, I had 10V on the output, which was okay, but it took like 10 minutes to have 10V, but it was at least someting for a start. And with 10ms, it doesn't even charge up to 10V, not even to 30V.
Here's the schematic of my circuit.
Would be nice if anyone gave me an advice what should be fixed.
Thanks in advance
AI: Let's calculate what happens when we turn your transistor on for 8.3 ms.
We know that inductors have the constituent equation
$$\frac{dI}{dt} = \frac{V}{L}$$
So when we apply 5 V to one side of L1 and ground the other side, we get
$$\frac{dI}{dt} = \frac{5\ {\rm V}}{16\ {\rm\mu H}}= 312,500\ \frac{\rm A}{\rm s}$$
And after 8.3 ms, the current should ramp to
$$(312,500\ \frac{\rm A}{\rm s})(8.3\ {\rm ms})=2,593\ {\rm A}$$
This is much more than your 5 V supply is likely to be able to supply, and much more than your inductor is able to carry without vaporizing.
You need to design your circuit for much, much smaller current ripple through the inductor.
You could look for a 16 mH inductor able to support 3 A current (which will be big and expensive). You will likely need to increase your load capacitance by a few orders of magnitude as well to achieve acceptable voltage ripple.
Or you could use a much higher switching frequency. Typical switching frequencies for this kind of circuit are 50 kHz to 5 MHz, so at least 500 times higher than your 0.1 kHz.
You might need to use a built-for-purpose switching controller instead of a general-purpose microcontroller to achieve the switching frequency you need. |
H: How does full wheatstone bridge with strain gauges work?
I have gone through a number of tutorials on Wheatstone bridge and how to use it to sense load using strain gauges. I have also gone through the calculations where one of the resistors of the Wheatstone bridge is a strain gauge and how the voltage we measure across a Wheatstone bridge is proportional to the change in the resistance of the strain gauge. But when we use the full bridge, the calculations do not go through, i.e, the output voltage is not proportional to sum of resistance change in all the strain gauges. How does the full Wheatstone bridge where all the four arms are strain gauges? Consider the following circuit from the tutorial page:
\begin{equation}
E_a = \frac{E \times R_3}{R_1 + R_3}
\end{equation}
\begin{equation}
E_b = \frac{E \times R_4}{R_2 + R_4}
\end{equation}
\begin{equation}\label{eq:diff}
E_{ab} = E \left(\frac{R_3}{R_1 + R_3} - \frac{R_4}{R_2 + R_4}\right)
\end{equation}
Let us assume the change in the resistance in each of the resistors is given by $$r_i, i \in \{1, 2, 3, 4\}.$$ Then above equation becomes,
\begin{align*}
E_{ab} &= E \left(\frac{R_3+r_3}{R_1+r_1 + R_3+r_3} - \frac{R_4+r_4}{R_2+r_2 + R_4+r_4}\right).
\end{align*}
If we further assume $$R_i = R, \forall i.$$ Then above equation becomes,
\begin{align*}
E_{ab} &= E \left(\frac{R+r_3}{R+r_1 + R+r_3} - \frac{R+r_4}{R+r_2 + R+r_4}\right)\\
&= E \left\{\frac{(R+r_3)(2R + r_2 + r_4) - (R+r_4)(2R + r_1 + r_3)}{(2R + r_1 + r_3)(2R + r_2 + r_4)} \right\}\\
&= E \left\{ \frac{2R^2 + Rr_2 + Rr_4 + 2Rr_3 + r_3r_2 +r_3r_4 - \left( 2R^2 +Rr_1 +Rr_3 + 2Rr_4 + r_4r_1 + r_4r_3\right)}{4R^2 + 2Rr_2 + 2Rr_4 + 2Rr_1 + r_1r_2+r_1r_4 +2Rr_3 + r_3r_2 + r_3r_4} \right\} \\
&= E \left\{ \frac{Rr_2-Rr_1 - Rr_4 + Rr_3 + r_3r_2 +r_3r_4 - r_4r_1 - r_4r_3}{4R^2 + 2Rr_2 + 2Rr_3 + 2Rr_4 + 2Rr_1 + r_1r_2+r_1r_4 + r_3r_2 + r_3r_4} \right\}\\
&=E \left\{ \frac{R(r_2-r_1 -r_4 + r_3) + r_3r_2 +r_3r_4 - r_4r_1 - r_4r_3}{4R^2 + 2R(r_2 + r_3 + r_4 + r_1) + r_1r_2+r_1r_4 + r_3r_2 + r_3r_4} \right\} \\
&=E \left\{ \frac{R(r_2-r_1 -r_4 + r_3)}{4R^2 + 2R(r_2 + r_3 + r_4 + r_1)} \right\} \quad \text{assuming $r_ir_j$ is very small}\\
&=E \left\{ \frac{(r_2-r_1 -r_4 + r_3)}{4R + 2(r_2 + r_3 + r_4 + r_1)} \right\}\\
&=E \left\{ \frac{(r_2-r_1 -r_4 + r_3)}{4R} \right\} \quad \text{if $r_i \ll R \forall i$}
\end{align*}
The final equation is not just a simple $$f(\sum_ir_i)$$ which means the signal we get need not be directly proportional to the weight applied.
AI: 1: It will always be directly proportional to the weight applied.
A strain gauge has a linear response, and elastic bending of a load cell is linear. Thus, we can write \$ r_i = k_i F \$ where \$k_i\$ is a constant of proportionality for that gauge, and \$F$ the force applied.
If we substitute and rearrange, we can take out \$F\$ and the last line of your question becomes:
\$=E F \left\{ \frac{(k_2-k_1 -k_4 + k_3)}{4R} \right\} \$
i.e. it is directly proportional to \$F\$. This still assumes \$r_i \ll R \forall i\$ of course.
2: You choose where to put the strain gauges
The constant of proportionality above has a \$(k_2-k_1 -k_4 + k_3)\$ term. If all of these \$k_i\$ are the same, then it sums to zero. That isn't any use. To make the constant of proportionality large, we want \$k_2\$ and \$k_3\$ to be as large as possible, and \$k_1\$ and \$k_4\$ to be as negative as possible. Strain gauges with negative responses are hard to find, but the metal load cell will have some areas under tension, and some under compression. So we usually choose to mount two strain gauges in an area under compression, and the other two in an area under tension. |
H: Using a step by step relay along with a solid state relay
I have a step by step relay which is connected to a light bulb and to a manual switch.
In parallel with the manual switch I put a SSR. I command the SSR to be on for 0.5 seconds, however the light would not switch(although the manual switch works).
Is there a problem because the SSR is a zero crossing relay? Or should I look somewhere else? How could I make this assembly to work?
simulate this circuit – Schematic created using CircuitLab
AI: According to Farnell your relay has a coil resistance of 6.5 kΩ. That means that the maximum current it will draw is about 33 mA on 230 V AC.
Figure 1. The SSR output rating shows that it has a minimum load current of 0.10 A.
Since 33 mA < 0.10 A the SSR can not turn on reliably so the relay does not energise.
For further reading on SSRs and how the zero-cross detection works see what I've written here. |
H: RJ-45 with only four wires?
Dig through a junk drawer, I find a long cable with RJ-45 on each end. Definitely not RJ-11. It has only four wires. What might it have been used for?
I'm not expert on wired ethernet, but in forty years of tech work, I've seen only six and eight wire connectors, mostly eight. This is the first time I've seen four on RJ-45.
AI: For ethernet networking up to 100Mbps only 2 pairs are used, so you can (fully outside specs, but working) wire 1 pair to 1-2 pins and second pair to 3-6, and it will work.
Some people in old ages, even have used one ethernet 8 wire cable to drive 2 connections by splitting the wires in 2 connectors in each node.
Fully outside any reasonable spec, of course |
H: Optocouplers common resistor
I have seen optocoupler series with common cathode and resistor on every anode. My question is whether or not one resistor on the cathode side will be sufficient, with the right wattage, of course, and what is the reason behind these many resistors.
simulate this circuit – Schematic created using CircuitLab
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. OP's schematic redrawn.
In Figure 1a a typical LED wired as shown would receive a current of about \$ I = \frac {24 - V_f}{480} = 45 \ \text {mA} \$ if the forward voltage, Vf is about 2 V.
In the Figure 1b the same current will result if one LED is switched on. If two are switched on they will receive about half the current, three -> one third, etc.
A further problem will occur due to variation in the Vf of the various LEDs. The one with the lowest Vf will hog the current, get hotter, its Vf will decrease, causing it to hog more current, etc., and may fail. For more on the topic see what I've written in LED variations and binning. |
H: What is the current draw during load on the LM1117 3.3v
I am looking at using the LM1117 3.3v voltage regulator.
I would like to determine the current draw to power the regulator's function, during output of something near 650mA.
All I can find is entries such as :
Quiescent current: 10mA
Is that my draw figure? Is there a better way to calculate it. As far as I understood, quiescent current was the draw under zero load. If this is the case, will this chip draw more current to output a higher 3.3v current? If yes, how do we know how much?
AI: If this is the case, will this chip draw more current to output a higher 3.3v current? If yes, how do we know how much?
Yes, it will draw as much current from its input as it is providing to its output, plus the quiescent current.
So if it's providing 650 mA to the load, it will be drawing 660 mA from the input. |
H: Gain with inversing Op Amp on Equalizer
I know I posted a question about this circuit before, but I'm running into a problem. I know this is a terrible equalizer design but I'm trying to learn to put in use what I learnt with Op Amps and transfer functions.
I did the following equalizer using 3 band-pass filters with each one made of a high pass filter connected with a low pass filter via a unity gain op amp for low frequencies, mid frequencies and high frequencies.
I used a inversing amplifier with \$V_{out}=\frac{R_2}{R_1}{\cdot}V_{in}\$ for the gain and then solved for: \$Gain=20\log_{10}{(|H(s|)}\$.
The problem is about the gain I'm trying to get in each band pass filter. I tested it with -10 dB gain on the low frequency band pass filter, 0 dB gain on mid frequencies and 10 dB gain on high frequencies based on the resolution of the above equation with \$R_1=1\$ \$k\Omega\$.
The schematics is the following:
And the simulation yields the following for the amplifier at the 3 different band pass filters:
Where the only working gain is the 10 db on the low frequency band pass filter.
For example for the -10 dB gain:
\$20\log_{10}{(\frac{Z_2}{Z_1})}=-10\implies Z_2=Z_1{\cdot}10^{-10/20}\$
So I don't know what's wrong.
Thank you very much!!
AI: You are using the gain equation for an inverting amplifier, but your circuit is non-inverting.
You either need to use inverting op-amps (and pay attention to the fact that the input impedance won't be zero) or you need to use attenuators where the gain is less than one.
simulate this circuit – Schematic created using CircuitLab |
H: Filtering an ADC input with an RC low-pass filter
I use an instrumentation amplifier to amplify low voltage signals from a sensor.
The max. amplified output voltage is 3V. Im using this ADC: http://ww1.microchip.com/downloads/en/DeviceDoc/22088c.pdf.
It has 4 channels that are multiplexed. Every 5 seconds all 4 channels should be sampled with 18bit mode (3.75 SPS). The internal sampling capacitor of the ADC is 3.2pF. I have put a RC low-pass filter like you can see in the following schematic in front of every ADC input channel. I realized that there is a significant voltage drop accross the 100kOhm resistor expecially (about 60mV drop for a 1.5V amplifier output voltage).
Now my question is, why is that? What values from the datasheet of the amplifier do i need and how can i calculate what is happening here? Do I need to take the leakage current to compute an average current? As this is a delta sigma ADC, im not sure what frequency I need to take to make calculations. I hope you can point me into the right direction. I also want to use C2 as a resevoir for the sampling capacitor because im multiplexing between multiple channels and I do not want to offset the current measurement with some voltage of a previously sampled channel. Hints, specifications and formulas I need for this to calculate would really help a lot! Thank you very much.
simulate this circuit – Schematic created using CircuitLab
AI: Why does the ADC draw an input current?
Assume that ADC grabs a voltage sample of the input signal, with that voltage stored on a 10pF capacitor; with these 18 bit ADCs using the over-sampling method, assume 1,000 samples are used to provide a fine 18-bit value. And assume Vin = 3volts.
What do we know
Iinput = F * C * V = 1,000 samples/conversion * 10pF * 3v = 1e+3 * 1e-11 * 3
Iinput = 1e-8 * 3 = 0.1uA * 3 = 0.3uA input current for ONE CONVERSION PER SECOND. |
H: Problem driving IPB065N15N3G MOSFET with HCPL-316J driver
I want to drive an IPB065N15N3G MOSFET. I am making a boost converter. The driver I am using is the HCPL-316J (a combined optocoupler and driver). Below is a picture of my schematic.
Please tell me what is the problem in this schematic and why can I not get the desired output? Since I am providing a triangular wave, why is the gate of the MOSFET not driven?
Since the HCPL-316J is not available in CircuitLab, I am providing a link to a Google drive with the Spice model. It is a .asc file. Please use LTspice XVII to open the file.
-----------X-----------X--------------X------------
I redesigned the circuit using nodes. Also added and replaced some components in the circuit.
The voltage at drain is like this:
The voltage at gate is like this:
As we can see there is no pulse at the gate, so the mosfet can not switch on and off.
------------X-----------------X------------------X-------------
After simulating the above circuit, I am trying to simulate the same circuit with different mosfet.Datasheet of mosfet is here. Please suggest what should be the necessary modifications to be made in order for the circuit to work.
AI: V2 and the HCPL-316J don't have GND connection.
See picture below.
You should better start cleaning up the schematic first.
Use nodes. Remove all wired connection to GND and replace them by short connection to the GND node. Cut the traces of the voltage sources V1, V2, etc. Give their positive terminal a node and use these nodes to make short connections to other components.
In the picture above, I showed the idea for voltage source V1.
PS. Please turn off the grid when posting a schematic.
VCC2 (w.r.t. to VE) does not exceed the UVLO Threshold
In the schematic, VCC2 is only 5V and therefore the HCPL-316J will be in UVLO.
In the Notes on page 10 of the datasheet of HCPL-316J:
15 V is the recommended minimum operating positive supply voltage (VCC2 - VE) to ensure adequate margin in excess of the maximum VUVLO+ threshold of 13.5 V. For High Level Output Voltage testing, VOH is measured with a dc load current. When driving capacitive loads, VOH will approach VCC as IOH approaches zero units.
The recommended voltage for (VCC2-VE) is between 15V and 30V. Vout will become about this voltage.
DO NOTE that (most) mosfets have the absolute maximum rating VGS < 20V.
I haven't gone into details with the datasheet, but I think this driver is specially designed to drive IGBT's. I think you'd better pick a different IC when driving mosfets.
Regarding simulation: I got better simulation results by shorting/disabling the Integrated Desaturation (VCE) Detection to ground.
BTW, You don't need V4, because it is only needed when negative gate drive is implemented.
Although it is not hurting the simulation, better also comply to the datasheet's Absolute Maximum Ratings:
Parameter Symbol Min. Max.
Input Pin Voltages VIN+, VIN- and VRESET -0.5 VCC1
So, change V1 to PULSE(0 5 0 12.5u 12.5u 0 25.0u)
WORKING SIMULATION
Note I did not use MUR1100. It takes ages on my PC to simulate with it. Moreover, I questioned before why you want to use this DESAT pin or actually even this IGBT driver. I got almost the same results by deleting this D1 and connecting the 100 ohm resistor to GND.
For clarity, I also removed almost all caps that are connected directly across a voltage source (except for C2) because in simulation these caps don't do anything. (But do add them on the real PCB!)
You should look at the diagram on page 3: that reveals why applying a negative voltage on VINN is useless; better connect it to GND. The same for the pulse source / positive triangular pulse source connected to VINP.
I connected a 1 Meg to LED1 in order to see the output of the internal comparator. For your PCB, the datasheet suggest to leave LED1 and LED2 unconnected. |
H: Microprocessor architecture bits vs bus sizes
I am ready following on this website:
"Another big difference between 32-bit processors and 64-bit processors is the maximum amount of memory (RAM) that is supported. 32-bit computers support a maximum of 4 GB (2^32 bytes) of memory, whereas 64-bit CPUs can address a theoretical maximum of 18 EB (2^64 bytes). However, the practical limit of 64-bit CPUs (as of 2018) is 8 TB of addressable RAM."
It confuses me little that how in the above example of 32-bit system 2^32 is used to calculate the addressable RAM? I thought 32-bits means that the ALU registers length is 32-bits so data bus size is 32 bit instead of address bus. Same for 64-bit architecture. Please correct me if my understanding of architecture bits vs bus-widths is wrong above.
AI: As with many texts written for beginners the situation has been somewhat simplified.
The assumption is that a 32-bit processor does all address operations and calculations also in 32 bits. From that it assumes a 32-bit address bus. Therefore the maximum address range is 4GBytes.
That same reasoning is then extended to a 64-bit processor.
In real life it can be a lot more complex. A good example would be the MC68000 processor, which was sold as a 16-bit processor, had 32-bit wide registers and a 24 bit address bus.
If a processor has an MMU that can also extend a 32-bit address bus to more bits. There are some 32-bit processor systems out there with a 40-bit address bus.
In the early days of computing I added a sort of MMU* to my MC6809 processor which extended the 16 bit address bus to 20 bits giving me a whopping 1Mbyte address range with an 8-bit processor.
*A 16x8 SRAM. |
H: How does the DW01A prevent overcharging and discharging?
I am not that familiar with electronics, it's just a hobby.
I am reviewing the TP4056 and DW01A ICs that are used for battery charging.
Actually there is nothing special about these ICs but I was wondering how the red marked area works.
I know the two DW01A pins prevent overcharging and discharging, but how does it work? I searched for an explanation but nothing found.
AI: Monitoring the battery voltage
The DW01A monitors the battery voltage using its power supply pins (pin 5 and 6 of DW01A ) as shown above. The comparators shown on the left side trigger in case of overcharge (battery voltage too high) or overdischarge (battery voltage too low).
The battery voltage is not measured directly. There is an RC filter (R5 & C2) that filters out spikes in the battery voltage due to e.g. inrush currents of the load.
Monitoring the battery current
When the battery is being discharged, the battery's current will flow B+ to OUT+ through the load, entering OUT-, flowing through the dual n-channel mosfet FS8205A back to B- as shown with the red arrowed line.
When the battery is being charged, the charge current flows as shown with the blue arrowed line. (I omitted the load current, note the load current is not measured while charging.)
The FS8205A has a drain-source on-resistance \$ R_{DS(ON)} \$. The current through this resistance will cause a voltage drop with respect to GND (pin 6 of DW01A), which is applied via R6 to pin 2 of the DW01A(1).
The comparators on the right side of the DW01A all have a small voltage source on the + input, so they can measure positive and negative currents through the FS8205A.
The charger detector, short circuit detector and overcurrent detector will trigger based on the voltage drop across the FS8205A. So, the \$ R_{DS(ON)} \$ of the FS8205A determines at which current this will happen.
(1) Theoretically, there will be no current flowing through R6, and therefore no voltage drop across R6, because the inputs of the internal comparators is theoretically infinite. In practise, there will be a (negligible) leakage current. The purpose of R6 is to protect pin 2 of DW01A against ESD. |
H: I just purchased a batch of TL081CP opamps and would like to know what the codes on the bottom mean
There is a random marking on each one. none the same. What does this mean? e.g. 03, 1h31
In my batch, none are the same with leads me to think they would not be bach codes.
AI: According the datasheet, page 21 the device has a device marking "TL081CP".
The table has a footnote:
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
which is explained in Standard Linear & Logic Semiconductor Marking Guidelines
ALL devices you bought should have this "TL081CP" marking. If not, you bought a counterfeit product or a complete different product. |
H: Voltage loss on DC circuits
I want to connect 4 bulbs in parallel. The bulbs need 12V DC and rated 18 watts. P=V*I, that means I=1.5 A on each bulb. From that the resistance of the bulbs are 8 Ohm (R=12/1.5). The circuit will look like this:
simulate this circuit – Schematic created using CircuitLab
But in real life wires have resistance too. The resistance of my wire is 12 mOhm/m. I need around 12 meters of this wire. The bulbs will be 3 meters from each other. If I calculate this, on the last bulb only 11V will fall and 1.375A will flow through. Which is only around 15Watts.
simulate this circuit
If I want to connect more bulbs (lets say 8 or even more) there won't be enough Voltage across the bulb and it wont work. Did i calculate it wrong? How is this problem problem solved in real life?
AI: You have come across the reason why high voltages are used in the home (230V, 110V), even higher are used to transmit power over longer distances (10kV and higher). This is also the reason many cars are moving away from 12V power to 48V, and lorries/trucks use 24V rather than 12V.
As you mention, Power is the current times the voltage, P=IV. If you remember Ohm's law: V=IR, you can put the two equations together: P=Ix(IxR), P=I^2R. Looking at the wires, they have a fixed resistance, other than increasing the diameter of the wirse(expensive and additional weight) or using some very fancy high end superconductor (very very expensive and most are still just not practical for a whole plethora of reasons), the only thing we can change is the current. To get the same power, if you half the current, you need to double the voltage, which isn't too hard to do. But with half the current, the power lost due to resistance is reduced by a factor of 4.
So, to answer your question: how is it solved in real life, we increase the voltage.
Other ideas you may want to consider for your application:
Reduce wire length
Increase wire diameter (reduce wire resistance)
Check any connectors, which often have higher resistance than the wires
As mentioned in the comments, a "star" configuration could also improve matters. The reason for this is pretty obvious, as using a "star" (each load being powered by its own wire) decreases the load per wire. But you are having to spend more money and space on wire, which may not be suitable for your application.
If those aren't useful for whatever reason, increase input voltage.
Increasing input voltage may mean you need to drop the voltage back down at the point of load to make things work. But that can be done with a simple buck converter. There are lots of things to consider when designing the power connection system, but that is beyond what I can do in a quick answer on here. |
H: H bridge inverter
I am trying out an H-Bridge inverter using GaN FETs at 140 kHz. The schematic is as follows. (In the experimental prototype, I used TI's LMG5200 and the load is connected via a full-bridge rectifier.
The switching waveforms are
The circuit works fine when it is not loaded. The output of the inverter:
But when I load the inverter with the resonance LC circuit and the receiver, the output waveform becomes like this. The output voltage is not stable.
even in the LTSpice simulation, I can observe a similar waveform:
But if I simulate at a higher frequency (by changing the value of the resonance capacitor), the output looks stable. See the below waveform at 640 KHz
What am I missing here?
AI: You are asking for trouble; the drive frequency is 140 kHz and your primary series resonant tuning is precisely 140 kHz therefore, the L and C act as a short circuit at the switching frequency. You need to run the primary circuit either from an output stage designed to handle the series resonance or use a different approach - maybe add a current limit resistor in series with C4(C2). |
H: Whats the purpose of 0R in Sonoff POW
I'm designing my own Sonoff with ESP32, with power monitoring capability. Now before I start my own design, I took a look at Sonoff design. In the Sonoff POW the power metering IC has a 0R resistor, while the datasheet of HLW8012 did not have any 0R resistor. The 0R an an SMD 1206 resistor, and I don't quite understand its purpose.
What's the purpose of 0R here?
Moreover, Is the transformer enough to make the Mains isolated from the power supply, or we should go for extra safety and mains isolation stuff?
AI: Downwards triangle is ground. All grounds are connected together unless specified otherwise. It does not appear that this circuit has separate analog and digital grounds. In fact, it connects the ground directly to the live mains! Hence all the dire warnings about not connecting it to your PC at the same time. The circuit is intended to be in a sealed box communicating over radio.
0R resistors can serve various purposes. They may bridge a track on the PCB, although that doesn't look like what's happening here. More often they are there to be substituted by other parts during the testing process; it was probably intended in case they wanted to put a ferrite bead or other noise-suppressing component in there without changing the PCB. |
H: Clock Dividers with Clock Domain Crossing
I am doing a design in FPGA that looks like this:
100 MHz is the clock available in my FPGA board. It feeds Module 2. Module 1 is needs a slow clock of 10 MHz clock. So I used a clock divider with flip flops. I thought of not using PLL to make my code purely RTL. Module 1 is transferring some data along with control signals to Module 2.
My current assumption is that:
The main clock and the divided clock are synchronous, and their phase relations are known to the synthesiser. And hence there is no Clock Domain Crossing here. So that I can simply constraint both the clocks and put multi-path SDC constraints between Module 1 and Module 2.
But I am not sure whether I am right. Is this a case of asynchronous clock-domain crossing ? Will I need any synchroniser between Module 1 and Module 2 ?
Any feedback is welcome.
AI: Depends on your vendor
On most modern FPGA's of the two biggest vendors, your first assumption is correct and you won't need synchronization registers for the CDC if your clock divider is written correctly. The synthesis tools will take care of everything.
Synthesis tools by smaller vendors don't always take into account the known phase relationship between the clocks, which might mean you do need a proper CDC. From experience I can say that the old Libero tools for at least the older RTAX and ProASIC lines allow you to specify synchronous clocks, but the specification just gets ignored and proper CDCs need to be added at the RTL level. |
H: Why is the audio input from the microphone connected to the inverting input on the TPA6111A2?
As far as I know, when we connect a signal to the inverting terminal of an op amp, we get an amplified output which is 180 deg out of phase from the input. Going through the datasheet of TPA611A2, the input from the microphone goes to the inverting input. However, the LM386 has the input given to the non-inverting input. Can someone help me out regarding this?
The way I'm interpreting this is that giving the microphone input to the inverting terminal will shift the phase of the sound we want to hear by 180 deg, making it a different waveform from the original signal, changing the sound we'll hear altogether.
AI: In some cases it will make no difference, as the microphone signal is an AC signal, and in many cases the inversion does very little, if anything, to the audio (there are cases, like sending differently phased signals to different speakers, can do bad things to sound).
In other cases, it can make a big difference, often depending on the type of microphone. Piezo-based microphones, for example, require an amplifier with a very high input impedance. Generally, non-inverting amps can be build with higher input impedance than inverting amps. |
H: measuring -3V with 3 resistors voltage divider
I know (or may be think) that I can scale the measurement of a 0 to -3.1V external battery to a analog pin ADC range of 0 to 3.3V, but I'm unable to calculate the resistors.
I've been trying how to do this by thevenin, but with no luck...
The schema (I think) would be the following:
simulate this circuit – Schematic created using CircuitLab
I just want to know the resistor values to measure V1 (V2 have no effect here) but I'm unable of calculating resistor values...
Any help?
AI: As Elliot correctly said, you can't do this passively and expect the whole 0 to 3.3V range on the output.
However, if you can survive with a reduced voltage range (and thus lower resolution, if you can't affect VREF), you can use a simple two-resistor divider out of the R1 and R2 as pictured in the question. Omit R3.
Another annoying thing of this method is that it'll be referenced to the 3.3V rail, not ground. Anyway, to get to the values:
Mark \$R_1\$ as a resistor between \$V_{cc}\$ and \$V_{out}\$, and \$R_2\$ as the one between \$V_{out}\$ and \$V_{in}\$.
Let \$I\$ be the current passing through the resistor divider: \$I = \frac{V_{cc}-V_{in}}{R_1 + R_2}\$.
These should be quite obvious now:
\$V_{R_2} = I\cdot R_2\$
\$V_{R_1} + V_{R_2} = V_{cc} - V_{in}\$
\$V_{out} = V_{in} + V_{R_2} = V_{in} + R_2 \cdot \frac{V_{cc}-V_{in}}{R_1 + R_2} = V_{in} + \frac{R_2}{R_1+R_2}\cdot (V_{cc} - V_{in})\$
Anyway, plugging your numbers in for a bit, you first look at the case when \$V_{out}\$ is \$0 \mathrm V\$ and \$V_{in}\$ is the most negative, that is \$-3.1 \mathrm V\$.
From \$V_{out} = V_{in} + \frac{R_2}{R_1+R_2}\cdot (V_{cc} - V_{in})\$ you get:
\$ 0 \mathrm V = -3.1 \mathrm V + \frac{R_2}{R_1+R_2} \cdot (+6.4 \mathrm V)\$, that is
\$ \frac{3.1}{6.4} = \frac{R_2}{R_1+R_2}\$, which is your resistor ratio for your divider.
You can now take R1 = 3.3k, and make R2 = 3.1k, for a quick experiment or simulation.
To find out what your maximum output voltage would be, just plug in more numbers, now knowing what the resistor ratio is, and plug in \$V_{in} = 0\$.
Plugging in the numbers into \$V_{out} = V_{in} + \frac{R_2}{R_1+R_2}\cdot (V_{cc} - V_{in})\$ again you get:
\$V_{out} = 0 \mathrm V + \frac{3.1}{6.4} \cdot (+3.3 \mathrm V)\$, which turns out to be about \$ 1.6 \mathrm V\$, as my quick simulation also confirms.
Practical considerations:
You'd also want to protect the microcontroller/ADC against too much negative voltage coming to its input in case the 3.3V rail is off – attaching a diode clamp going between the ground and the input should be sufficient for short periods.
Do add in some margin considering the highest voltage the battery can get to. 3.1V sounds odd, could be fine for a lithium primary? Point is, you don't want the ADC input pin going negative, which it would with higher-than-designed-for voltage here. Do your research on the maximum voltage the battery can get, no load, absolutely fresh/fully charged, and then add 5-10% in for a good measure.
I encourage anyone with more math/TeX skillage to edit my answer, it is fairly naive in places and it likely could be shown much clearer. |
H: Pi Filter Option
I put a (C-L-C) Pi Filter in series with my antenna trace on a new design, like so:
source
The reason you put one of these circuits in, as I understand it, is just in case, during compliance testing (i.e. FCC / CE) you have an issue with your antenna matching causing a failure, you have a decent chance of fixing it by populating appropriately sized inductor and capacitors.
So what is usually done to initially populate the board in that case, before you take it in for testing / certification?
DNP the capacitors and populate a 0-ohm resistor in place of the inductor?
DNP the capacitors and populate a 100-ohm resistor in place of the inductor?
Guess at the value of and populate the inductor, and DNP the capacitors?
Guess at the values of both the inductor and capacitors and populate both?
Something else?
Feel free to rank these in preference order, and/or comment on the pros and cons of each. Thanks in advance for any demystification you can offer.
AI: DNP the capacitors and populate a 0-ohm resistor in place of the inductor?
This is the easiest and most obvious one to do
DNP the capacitors and populate a 100-ohm resistor in place of the inductor?
This is something only a non-RF engineer could dream up. Would you trail a boat anchor behind your pedal-bike? The resistor will absorb most of your power, both inbound and outbound, rendering your new design almost useless.
Guess at the value of and populate the inductor, and DNP the capacitors?
Guess at the values of both the inductor and capacitors and populate both?
May or may not be reasonable, it depends how you've done your original design. If your antenna nominally matches your amplifier and traces (as it should) then these revert to the top one above. If not, then these are the first cut at your matching components. |
H: How do we interpret frequency from fft command in matlab?
How do we interpret frequency from fft command in matlab? When I apply fft to a sampled function(@ Fs) and I get peaks at some values in the fft array. How do I know what frequency in Hertz does it correspond to?
AI: The output of the fft function will go from 0 Hz to fs/2, then -fs/2 to almost 0. If you ignore the 2nd half (for purely real signals), the following works well:
For n samples at a sampling rate of fs, you can create a frequency axis, f with the following formula:
f = (0:n-1)/n*fs
This gives you freqs from fs/2 to almost fs, but if you overlook that...
The other option is to use the fftshift command on the fft output and revise the formula
f = (0:n-1)/n*fs-fs/2 |
H: How to attenuate a cheap MP3-player speaker?
I have a cheap single-chip MP3-playing speaker. The kind you you get off eBay for $10. I want to make the output quieter (so I don't always have to adjust the digital volume controls).
The amp is a LTK8002D Class AB Audio Amplifier
I want to do this in a way that doesn't damage the circuitry. I only have basic electronics knowledge.
Should I do this with a potential divider? If so, should the total match the measured impedence of the speaker? The spec sheet says the speaker is 4 ohms.
Or should I do this with an inline resistor?
AI: For this simple thing, where audio quality probably isn't very noticeable, just put an inline resistor in series with one of the speaker wires.
A 4ohm should cut the sound roughly in half. But depending on your preference you may want a larger value.
Make sure the resistor power is large enough for that amp. It says it's a 3W, but I doubt that it is being used at that level. Since the power will be split between the resistor and the speaker, you can probably use a 1/2W.
Sounds like a fun experiment, play and have fun! |
H: Help making a adder/subtractor on Logisim
I have attempted to make an 4 bit Adder and Subtractor circuit on Logisim, but i've came across a problem. So the Adder works but the subtractor doesn't. When i do subtraction the 1 thats carried in is carried throughout the circuit. When i do 1000 - 1000 it gives me 10000.
How do i solve this?
AI: The circuit works fine. Your output is actually 5 bits. So
\$1000_2 - 1000_2 = 1000_2 + (-1000_2) = 1000_2 + 1000_2 = 10000_2\$
Note that the most-negative-number in any 2's-complement representation can not be negated to give a valid positive value. For 4 digits, the most-negative-number is \$1000_2 = -8_{10}\$ and you can't represent +8 in a 4-bit 2's-complement value. |
H: Weatherproofed Connector For Outdoor Valve
To connect an electronic outdoor DC solenoid valve to a timer, I am getting recommendations to use a silicone-filled wire nut OR solder and heat-shrink. I understand that wire-nuts are simpler for those without a soldering iron, but will heat-shrink technically form a more weatherproof and reliable connection?
https://www.homedepot.com/p/DryConn-Small-Waterproof-Wire-Connectors-Aqua-Orange-20-Pack-62114/202889871
AI: Heat-shrink tubing does not always hermetically seal a connection. The advantage of the wire nuts is that they are filled with silicone (not silicon) grease that prevents water from corroding the connection.
What I have done is to make my solder connection and then cover it liberally with a high-quality silicone or urethane caulk. Put shrink tubing over that. When you shrink the tubing it forces the caulk into all of the little gaps and gives a better seal than shrink tubing alone. |
H: Electric arc from a supercapacitor bank?
I have really no idea and this is not a homework!
Given you would work with existing components.
Imagine you would like to build a small electric arc furnace say 1-50g capacity; is it realistic to run it for some seconds with the charge from a supercapacitor bank to completely melt a small piece of rock?
Required energy: 1 megajoule for a kilo of rock, or 1 kJ for a gram (according to J. Lux, a NASA engineer).
http://home.earthlink.net/~jimlux/lava.htm
Now there are supercapacitors of say 1 kF, I've read also about 10 kF but that seems more like experimental (Sunvault Energy Inc.)
If I take a 100F/2.7V supercapacitor and apply
W = ½ QV = ½ CV2
from
https://www.electronics2000.co.uk/calc/capacitor-charge-calculator.php
The outcome is 364J; that is, I could theoretically melt a tiny 0.3g piece of rock with that energy and the rest is scaling and controlling capacitors to discharge as desired to deliver the arc?
AI: The outcome is 364 J; that is, I could theoretically melt a tiny 0.3 g piece of rock with that energy?
It's even worse than that. The voltage on the capacitor will decay as you discharge it giving a peak current on connection to the heater element and then falling off.
More bad news. \$ P = \frac {V^2}{R} \$ so the power will drop off even more dramatically. At 90% voltage the power will have dropped to 81%. At 60% you'll be down to 36% power. |
H: Measure 10kV with 600V rated multimeter
My multimeter is rated for 600V but I need to measure a 10kV AC source. I was thinking of building a voltage divider but I wouldn't know how many resistors it would take to safely measure this high of voltage.
AI: 10 kV AC is measured using a voltage transformer.
Figure 1. Source: gfuve.com.
The Model GFJDZX0978-10BG voltage transformer is single-phase multi-winding whole sealing epoxy pouring product. It is used both indoor and outdoor for measurement of voltage and electric energy as well as relay protection in the electric system of rated frequency 50/60Hz and rated voltage 12kV or below.
10 kV measurement is not something you do with a few 1/4 W resistors and a hobby multimeter. |
H: Does Hall flow sensor require an optocoupler when using STM32 MCU?
I'm using an STM32F103 to measure water flow through a pipe using Hall flow sensors. My power supply is 12V DC to 5V/3.3V DC. STM works with 3.3V and Hall sensors with 5V levels. I've configured the TIM4 as Input Capture and connected it directly to the flow sensor output and I'm counting the number of ticks per second to determine the flow.
What I've noticed is that even when there is no flow, the sensor gives out random values. To the same PS I also have connected an LCD display, 2x Hall flow sensors, a 555 timer, and 2x STM32s. What I want to know is will this issue be solved by just using optocouplers on every input from Hall sensor to the GPIO pin? I'm thinking since all of these devices have a common ground there is a lot of noise in the system, but maybe the issue is something else?
AI: Should not be any problem. But you could use a Zener for possible voltage spikes (5.1V for instance).
Also, you need to make sure you are using the 5V tolerant pins, as not all pins of the STM32F103 are 5V tolerant.
Regarding your noise problem, you could try to simply add a small capacitor from signal to ground to suppress some false triggering due to noise. You might also add a pull-down resistor.
Using an Opto Isolator wouldn't make sense since your using the same power supply for both sides. |
H: How is Q for surface acoustic wave devices measured?
I do not have a good understanding of Q, the quality factor.
I get the basic concept that it has to do with energy losses within a system, particularly oscillating systems like resonators. Higher Q has less damping and will ring a longer time, while lower Q are the opposite.
I would like to know how is Q determined for SAW resonators typically? I came across something about the frequency to bandwidth ratio being used to determine Q. Is that it or am I missing something else?
Will devices with increasingly narrower bandwidths (for the same frequency) have higher Qs and oscillate for longer and more efficiently? If so, why? I would like to understand the reasoning behind it.
AI: The Wikipedia article has a really nice overview and drives home the most important note that there are a number of equivalent ways to think of the Q factor:
The frequency-to-bandwidth ratio of the frequency response
How under-damped the system is (how long it takes the oscillations to die down)
The rate at which energy is dissipated from a resonant system.
It also illustrates the other important point that Q factor applies equally well to any resonant system, regardless of whether it's an electrical resonance or a mechanical / acoustic resonance. In the case of a SAW resonator, of course, it's actually both.
The equivalence of the three items above is actually pretty intuitive. Let's take "Q is the frequency-to-bandwidth ratio" as the starting point. That extends to the second bullet pretty well -- an infinitely narrow bandwidth signal implies a signal that is a pure sine wave that never changes over time. If the amplitude of the sine wave changes, this means the signal has some bandwidth. The faster the sine wave changes, the wider the bandwidth. So yes, Q is both "frequency-to-bandwidth ratio" and "how quickly the oscillation can decay" because they're the same thing.
Similarly, it makes perfect sense that if you have an oscillating system that never loses energy, then it will just keep oscillating. The faster the system loses energy, the faster the oscillations will die down. So "rate at which energy is dissipated" is the same thing too.
So, whew, finally we can answer your question. I am not a domain expert in SAWs, but per the above it would make absolutely perfect sense to simply measure Q by measuring the bandwidth of the SAW resonator. As described here, that will also define how long it takes the oscillations to die down. |
H: MOSFET capacitance clarification
Two part question here:
Are there ways to directly test the input and output capacitance of a MOSFET, Ciss and Coss?
Due to internal inductance and capacitance, is it possible for a standalone MOSFET to resonate at certain frequencies?
AI: YES,YES
1) See best datasheets for test methods.
2) All traces have ESL starting at ~0.5nH/mm and scope probes are also notorious for ground ESL resonance with 10:1 coax xx pF, for resonance <50 MHz, thus tip/ring method is best between to nearby pins <1cm apart with gnd clip and probe tip both removed. |
H: IR Sensor Replacement
I am currently designing a circuit, where output is switched on and off as obstacle passes IR (Infrared) beam, produced by IR LED and received by IR sensor (IR photo-transistor). The problem is that IR sensor is greatly affected by light from surrounding sources, like celling lamp. IR sensor's output is compared with comparator and if IR sensor is greatly illuminated by white light, comparator switches on the output as if IR LED would illuminate on sensor's surface.
simulate this circuit – Schematic created using CircuitLab
Is it normal for IR sensor to react to visible light the same way it reacts to IR radiation?
This is kind of a problem since sensor of this circuit is constantly exposed to visible light and sometimes as an obstacle passes the IR beam, comparator just won't switch off the output because there is too much radiation from visible light.
Is there any other way to detect obstacle as it passes and breaks the IR beam of radiation without receiving part (sensor at input of comparator) being influenced by surroundings light sources, which produce visible light?
Both IR LED as sensor and IR sensor (photo-transistor) react the same way as they are being illuminated by visible light. I still don't get it why IR sensor detects visible light as it should only detect IR radiation, I think.
Would replacing IR LED and IR sensor with UV LED and UV sensor solve my issue?
AI: YES, YES, NO
You only need to imagine a flashlight beam width with crosstalk from ambient light.
thus the PD needs a daylight blocking filter and perhaps some carrier like 26kHz for long range and an aperture (heat shrink tubing or recessed flat black hole) to block any stray sources or reflections.
then your emitter (e.g. 26kHz modulation) does not need much current or aperture size to shine only on target.
the absence of light- data pulse on carrier needs a one shot to block AGC glitches after detection (300 ms?)
adjust Tx current to optimum detection/rejection threshold as AGC has a >30 dB range.
easy to find these types used in Remote controls.
an aperture has a depth and width = tangent cone angle
choose the desired size to meet your alignment. Tolerances.
I mentioned several variables, you can easily learn how to optimize this to be error free and have several vertical a
For any size and detect a hand, arm or body then ignore for xxx ms or non-retriggerable one shot. |
H: How to connect male wire to stiff piece of metal with holes
This is my second day playing around with Arduinos, so I don't particularly know hardware-related concepts and terminology. I'm trying to connect a simple male wire to a button (see image). The only thing I've tried is simply threading the hole with the pin, but that clearly doesn't work.
I haven't found any other solutions since I'm not sure how to refer to the shape in question. I did purchase an Arduino kit, not just the Uno, but this was an external part so I wasn't able to find any instructions. Any help would be greatly appreciated!!
AI: You can solder a wire onto the metal tab.
You can also crimp a connector onto the wire and push the connector onto the switch tab.
Google crimp on wire terminals .
Bottom right one in the picture. |
H: Can two lights be switched between without an "ON-ON" switch?
The schematic above shows our problem. We need to be able to turn on light A when a switch connected to light A is closed and then turn on light B when the switch is open.
There are a few constraints:
the lights must have a common ground
they must have a common power source
the switch can either connect A to the battery or be open. It cannot connect to B in it's open state
no additional switches can be added, we want to be able to control it with just the single switch (they can be added if they don't have to be actuated by the user, we just basically want one user input)
only "traditional" sorts of electronic components can be used such as wires, diodes, resistors, capacitors etc.
The blue area just signifies that it can be filled with whatever wiring is necessary to achieve this.
Is this setup possible to achieve?
This question has the practical application of being used as wiring for a go kart brake system. I've been trying for a while to look on the internet for answers but I don't think there's much hope.
AI: The simple and obvious solution is to use an SPDT switch, but since you've ruled that out, a relay can do the job:
simulate this circuit – Schematic created using CircuitLab |
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