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H: What's the difference between PCIe linkup and card present?
In linux log, I can see link up and Card present, these two kinds of messages.
What's their difference?
Card present means only detected the device but no link up ( device still can't be used? ), ex:
pcieport 0000:b2:00.0: pciehp: Slot(18): Card present
link up means the device is working?
pcieport 0000:b2:00.0: pciehp: Slot(18): Link Up
AI: well, one says "I've detected there's a card", and the second is "I've successfully established a way of talking to it". That's what we can infer directly from the wording!
If you want to understand the software conditions that need to be met for either, Linux is open source, you can read the source that emits these kernel logs
Hardware-wise, in PCIe, detection and link upbring are simply two different things, and the logs reflect that. That's like finding a person (detection) and talking to him (establishing a link) are two different things.
link up means the device is working?
No, it means the link is up. That's necessary, not sufficient. |
H: Chip inductors without voltage rating - how to interpret?
During the search for a suitable chip inductor I noticed, that many producers don't mention a voltage rating in the datasheet.
How to understand that? Does it mean, as long as I don't exceed the rated current, the voltage doesn't matter?
Or is there some underlying general definition of voltage rating?
Some examples:
https://product.tdk.com/info/en/documents/catalog/inductor_commercial_decoupling_nlcv32-pf_en.pdf
https://www.digikey.com/en/datasheets/taiyo-yuden/taiyo-yuden-wound01_e
AI: When you send a DC current of 40 mA through a 4.5 Ω inductor, the voltage drop is 0.18 V.
You cannot apply a higher DC voltage without exceeding the current.
For AC voltages, the inductor's impedance is higher, but the voltage drop apparently does not become dangerous. |
H: Current mirror design using PMOS
I am designing a PMOS current mirror in 350nm Cadence technology [attached].
Problem: keeping the dimension (W/L ratio) of both the PMOS transistors constant, I should get mirrored current the same as the reference current (according to mirror circuit principle). But I am not getting the same current as reference current. e.g.
When my reference current is 10uA then the mirror current is 16.6uA with 5V supply voltage (Vdd)
When I change the supply voltage then the mirror current started getting better as e.g.
Reference current 10uA then the mirror current is 13.4uA with 3.3V supply voltage (Vdd).
Reference current 10uA then the mirror current is 10.3uA with 1.8V supply voltage (Vdd).
Dimension of MPO: W/L=10u/0.5u
Dimension of MP1: W/L=10u/0.5u
I would like to know How and Why my mirror current is changing with changing supply voltage (Vdd)?
Thanks
AI: The output current will only be exactly the same as the input current when both transistors have exactly the same voltages across all terminals.
Their \$V_{GS}\$ are the same as the gates and sources are in parallel.
But what about the drain and \$V_{DS}\$?
Hint: learn about "channel length modulation".
Short channel, L = 0.5 um: the channel length modulation will have a large influence
Long channel, L = 5 um: the channel length modulation will have a much smaller influence
To (almost) completely eliminate the influence of channel length modulation you will need a more complex circuit like a 3-transistor current mirror. |
H: internal resistance of inductor effect
I'm trying to analyze an RL Circuit .
I saw this equation for voltage drop over an inductor:
V = L * di/dt
But what about internal resistance of the inductor ?
I have a coil that have about 2 ohms resistance. how can I use this equation for it ? can I assume the internal resistance as a resistor before or after the coil ?
AI: A coil is series combination of an inductor and a resistor so voltage drop across coil would be V = L * di/dt +iR
can I assume the internal resistance as a resistor before or after the coil ?
I think you meant to say before or after the inductor , it doesn't matter in which order you model inductor and resistor(in series) voltage drop would be same |
H: Repelling a magnet from a coil
I need to suspend an object attached to a magnet over a coil (don't worry about stability problems), and measure the current required to levitate it to a certain height.
There are a number of possible configurations:
Air core coil with a cylindrical magnet over the coil
Air core coil with a cylindrical magnet which passes into the coil
Ferromagnetic core coil with a cylindrical magnet over the coil
The downside of the last one is remanence in the core material, which may distort measurements.
So, do high permeability low (or zero) remanence materials exist?
How do the efficiencies of the first two approaches compare, in terms of current? How much better, if at all, would the third approach be given a typical core material. Frequencies expected to be below 100Hz.
AI: Think voice coil from a loudspeaker, they've already solved the efficiency problem.
You will have therefore a magnet assembly with an annular gap, with an air-core coil into the gap.
If the coil is a lot longer than the gap, you have good linearity with insertion distance.
With any practical annular gap, the MMF in the magnet will be dominated by the permanent magnet, and little affected by the levitation current.
Now which to have fixed and which moving? If the coil is fixed, then the moving magnet would be very susceptible to forces from stray and varying external magnetic fields, and even moving lumps of ferromagnetic material nearby. A moving coil solves that problem, at the expense of getting current into and out of the moving coil. |
H: Time constant of parallel RC circuit
I have read about Series RC Circuit and have understood the Time constant concept.
Wikipedia states - "It is the time required to charge the capacitor, through the resistor, from an initial charge voltage of zero to approximately 63.2% of the value of an applied DC voltage, or to discharge the capacitor through the same resistor to approximately 36.8% of its initial charge voltage. "
Since Capacitor is charged through this resistor, the concept of time constant is valid.
But assume a parallel RC Circuit. I was not able to find the formula for time constant of a parallel RC circuit and also not sure whether the concept of time constant in a parallel RC circuit would mean something?
Can someone provide me the formula for Parallel RC Circuit during charging and discharging?
My question is based on the below circuit :
Once the voltage across the sense resistors cross 0.7V, the Transistor Q2203 will turn ON. What role does the C2202 play in combination with the sense resistors?
I have checked and reduced the value of C2202 in simulation and saw that if I decreased the value of C2202, the transistor turns ON quickly for a certain load resistance. If C2202 value is increased, the time taken for the Q2203 to turn ON increases? So, I thought of researching on charging of a parallel RC Circuit and its formulas which I couldn't find?
Please help me to solve my queries in the question.
AI: If you apply Norton's or Thevenin's equivalent circuit theory, it'll be apparent that a series RC circuit is no different to a parallel one. The time constant is the same.
In your circuit, R2203, C2202 form a high pass filter. One presumes in that circuit to prevent 'nuisance operation' of the current sense.
Again, in answer to your question, apply Norton/Thevenin circuit analysis. You'll see that the 1.87 ohms is insignificant and the RC time constant of the sense circuit is 1k.10u or 10 milliseconds. |
H: Are voltage and current the same when it comes to device protection?
Perhaps I'm not thinking about this correctly, but I've never understood if there is really a distinction between voltage and current being harmful to an electronic device of any kind. Obviously, current is the the actual moving electrons which we know can transfer energy in the form of heat which can be dangerous in large amounts. Voltage on the other hand, is just a potential difference, but the force that causes current. So yes, without a voltage there would be no current; but if we could apply a voltage across some electronic device and stop all current, the device would be fine no? Isn't it ultimately the current that causes damage or can destroy some electronic device?
AI: Obviously, current is the the actual moving electrons which we know can transfer energy in the form of heat which can be dangerous in large amounts.
Fair enough, but forget about electrons. Just deal with the concept of current.
Voltage on the other hand, is just a potential difference, but the force that causes current.
Correct.
So yes, without a voltage there would be no current; but if we could apply a voltage across some electronic device and stop all current, the device would be fine no?
You have described a switch.
Figure 1. Knife switch (as used by Dr. Frankenstein, et al.). Credit AYL.
Isn't it ultimately the current that causes damage or can destroy some electronic device?
Not always. Insulation breakdown can occur when too high a voltage is applied. This could be, for example, the insulation on copper windings (the clear varnish type) or the insulation between the gate and substrate on an FET transistor. On the former the insulation breakdown will be followed by a short-circuit which will lead to high currents and burn-out. In the latter the device just won't operate and you may not even smell the smoke.
Note, you might see insulation breakdown rated in kV/mm. Roughly speaking, if I had a 100 V rated cable and an insulator of 5 kV/mm then I would need 0.02 mm of insulation. In practice we have to allow for stretching, minor damage, tolerances, etc., so the result may be quite a lot thicker. |
H: Can I use 18AWG wire instead of 22AWG when doing guitar pedal modifications?
I'm planning on doing some modifications to my Dunlop GCB95 Cry Baby wah pedal. As far as I can tell, the hookup wire in the pedal is 22AWG (it's difficult to read what's printed on the side). The smallest gauge of hookup wire my local hardware store had was 18AWG, and I decided to buy lengths of 3ft. in a few different colors. My thought process was that I should be able to use any hookup wire that is 22AWG or bigger. However, before I do anything to the pedal, I want to be sure that I won't run into any issues. Would it be okay to use the 18AWG wire, or do I need to get 22AWG wire?
AI: Very few circuits are designed in such a way as to require a minimum resistance or inductance of the interconnecting wire. Audio folks sometimes do some odd things, but probably not that. So while we can't technically know without examining the specific usage, electrically this will probably be fine.
The more practical issues you might run into would be related to the larger size and stiffness in getting things in place, and the greater heat perhaps needed when soldering (which might flow to connected things causing collateral damage to insulation, plastics, etc). In some cases a larger wire might create a mechanical strain leading to future breakage of a solder join or component, but that can be as much about the details of installation as the actual wire size.
Also consider the relative merits of solid and stranded wire - the latter often being preferred.
Ultimately the actual greatest challenges would probably be related to any inexperience in doing such work. If this audio gear is valuable, exercise extreme care, as it's quite easy to accidentally damage adjacent areas. Doing one's own work is of course a noble path, but sometimes it makes sense to get some initial practice on more "throwaway" items.
Sometimes you can scrounge suitable project wire out of things being disposed, too. Though beware that some cables use specialized wire types which aren't useful for general hookup, for example they may have strands twisted with a string, or be thin ribbons wound around one. But if it has the hand of a nice interconnect wire, and on stripping appears to be just copper conductor, and takes solder without the insulation making too much of an acrid mess, it can be great. |
H: What happens after disconnecting DC powered inductor?
Voltage over an inductor is proportional to the di/dt.
I want to know what happens if I disconnect an inductor from a DC power suddenly.
After disconnecting no current could pass through it, right?
So the voltage must tends to infinity or make a spark?
AI: voltage over an inductor is proportional to the di/dt .
Correct. Which also means that the di/dt is proportional to the voltage across the inductor.
I want to know what happens if I disconnect an inductor from a dc power suddenly. after disconnecting no current could pass through it . right ?
Before 'after disconnecting' we have the 'disconnecting' phase.
If the switch opens slowly, then as its resistance increases a little, the current through this resistance creates a voltage, which starts to ramp down the inductor current. The current may ramp down before the switch arcs. If the switch opens fast enough, current will still be flowing when it's open, and the voltage may rise high enough to induce an arc.
If we have some magic rapidly opening switch, the inductor current will still flow to somewhere. It flows into the stray capacitance of the inductor itself. The maximum voltage this capacitance will reach is given by the energy balance. The 0.5LI2 of energy originally stored in the inductor will become 0.5CV2 of energy stored in its capacitance, or an external capacitor, if one has been added to the circuit to limit the voltage rise, just like on the old style points ignition of a car.
so the voltage must tends to infinity or make a spark ?
There is always some stray capacitance, so it will never reach infinity. But it can get high enough to be embarassing, or to arc across switch contacts, or to break down semiconductor devices connected to it. |
H: Understanding Master/Slave trigger configuration through open-drain GPIO
I am working with two industrial cameras that I want to trigger synchroniously through hardware triggering. For this the STROBE_OUT pin (which is an open drain pin) from one camera (Master camera) does trigger the other camera (Slave camera) when an image is taken by the master camera.
The camera manufacturer gave me an connection schematic on how to connect the pins of both cameras.
The connections diagram they gave me looks as follows:
From the datasheet of the camera I know that the STROBE_OUT pin is a mosfet open drain configuration (pin 2 with corresponding ground on pin 1). The TRIGGER_IN (+/-) pins internal connections are given below (pin 3 and 4):
This way of connecting it really seems strange to me. In my understanding, when the mosfet is closed the pin 3 of the slave would be pulled to ground, but when the mosfet is open the pin 3 would be in a floating state, am I right? In my understanding this could lead to undefined behaviour?
I would rather assume do a connection with a pull up resistor for example something like the one below:
(Sorry for that ugly drawing)
Am I misunderstanding something here? What would be the proper way of connecting this?
AI: The Slave resistor/LED can be thought of as the pull-up, it is never floating.
This is my understanding of the circuit and how I would wire it based on your descriptions.
simulate this circuit – Schematic created using CircuitLab |
H: Help understanding the dimensions of the 1N4007-SMD's datasheet
I'm trying to understand what are the real dimensions of the following diode:
http://www.sycelectronica.com.ar/semiconductores/1N4007-SMD.pdf
For simplicity, here is a screenshot of the relevant part from the PDF:
By looking at the dimensions, one can notice that there is a pair of values for each dimension. For example, the first horizontal length is 4.597 / 3.988.
What is the meaning of those numbers?
Thanks!
AI: The numbers represent the maximum and minimum dimensions. The somewhat silly number of digits indicates that they were converted from hard Imperialist measurements.
For example 4.597 max to 3.988 min (mm) was originally 181 to 157 thousandths of an inch. |
H: Why a newer TOP value in the Atmega328p Timer1 has to be greater than the values in all The compare registers?
The datasheet mentioned the following on p.167
When changing the TOP value the program must ensure that the new TOP value is higher or equal to the
value of all of the Compare Registers. If the TOP value is lower than any of the Compare Registers, a
compare match will never occur between the TCNT1 and the OCR1x.
I have no clue what does that mean actually. Does that mean that once I defined a top value in OCRnx registers the next one must be greater in value? (Although. this How I got it, I really doubt it)
AI: The counter will increment until it reaches the TOP value, it will then be cleared and start again.
The value in the compare registers are constantly compared with the current counter value and when they are equal an event occurs (such as set the PWM output or create an interrupt). For that to occur the counter must be able to reach the value stored in the compare register.
Any compare values that are greater than TOP will never be reached. |
H: How to design a large 125kHz loop antenna for long range RFID application?
I am designing a large loop antenna working at 125 kHz. To maximize the range of my system I am aiming for 1m diameter loop antenna with as many turns as I can allocate (e.g. ~100 for 18 AWG). I have succesfully designed antennas of diameter=40cm with L=5mH. However, when trying larger geometries (or smaller wire gauge) the antennas turn out to be purely capacitve. What do I need to consider to avoid this issue?
AI: Stop doing 'as many turns as I can allocate' and start doing 'the right number of turns'.
As the loop gets larger, the self capacitance and the inductance increase quicker than you think, and you don't need as many turns.
Start with one or just a few turns of your target size, and see what capacitor is needed to resonate it down to 125 kHz, or see what the frequency is for your target capacitor. Then calculate the inductance, and increase the number of turns by the square root of the ratio. You will need to iterate again, as increasing the number of turns will have increased the self capacitance again, but it will get you closer. Rinse and repeat, until you get a capacitor size you like. |
H: How To Calculate the β with limit to infinity?
I am a student. Our teacher gave us a problem that can be done by Kirchhoff's laws. The problem is that in the second case we have to calculate β → ∞, the teachers told us to calculate β using a limit, but I don't know how to do this if there is no function to take the limit to ∞. This is the only information the problem gives. The (O1) and (O2) squares are loops from second Kirchhoff's law.
AI: Rearranging the BJT forward active current gain:
$$I_c = βI_b $$
$$I_b = \frac{I_c}{β} $$
$$\lim_{β \to \infty} I_b = 0$$
Practically this means that for large β you can ignore the base current. In that case Ic = Ie, and you can find Ie using Ohm's law. |
H: Understanding LED chain systems
There are several LED light chain systems on the market, like the Konstsmide 31V system or various traders' "System Decor" or "System 24". All seem rather similar, but there are no technical specs to be found for any of them.
I was wondering about the properties of those systems and was hoping someone here was familiar with them.
None of the systems seems to use a dedicated LED driver, like one would use for RGB strips or similar. How do these systems handle power distribution across strands and power regulation?
In terms of topology, are the individual strands arrangeable both in series, in parallel and mixed, star-like topologies? (I.e. are the LEDs not simply put in series in a segment?)
From an electrical point of view, can the individual strands be shortened?
AI: None of the systems seems to use a dedicated LED driver
The Konstsmide does have a (probably 31V) AC to DC converter (power adapter) in the socket:
And the "System Decor" needs a "Starttrafo".
And the System 24 probably also needs 24 V DC for operation so it also needs a power adapter.
So indeed these systems do not have a dedicated LED driver but that isn't always needed. These systems use low-voltage DC to power the LED strips. In the LED strips there will be a series resistor in series with each LED or parallel/serial combination of LEDs.
This is commonly used in nearly all LED strips.
Having individual drivers for each LED isn't needed (low voltage + resistor is good enough), more robust (if an LED breaks, the rest can still function as normal) and cheaper to make.
are the individual strands arrangeable both in series, in parallel and mixed
No, you can only connect strips in parallel. If you connect in series then the voltage will be too low to make the LEDs light up. The only thing you have to pay attention to is that you do not connect more LEDs than is supported by the Power adapter.
can the individual strands be shortened?
Yes as long as that is done "properly" so leaving no exposed wires, no moisture can get in etc. Since the LED sections are in parallel, a section can be removed without issue. |
H: Zener voltage regulator circuit
simulate this circuit – Schematic created using CircuitLab
I have here a voltage regulator circuit using a Zener diode.
We were tasked to find the maximum allowable \$i_L\$ given the varying voltage input so the the load voltage will remain at 8 V.
The way I understood the problem, we are asked to looked for \$I_{z(max)}\$ since past that, the Zener diode would no longer be able to maintain the voltage at 8 V. But then, I thought \$I_{z(max)}\$ is supposed to be given in a Zener diode's data sheet and also depends on the power rating of the diode (which was not given,) so I am unsure how to proceed with this problem.
AI: The maximum load current is when then zener no longer has sufficient current to regulate. Since we don't have any information about the Zener diode itself, we can assume it to be perfect so it stops regulating when the zener current drops to zero. That's actually a reasonable assumption for an 8V zener.
The worst-case conditions on the low side are minimum input voltage, maximum resistor value within tolerance (we're not given tolerance so assume it to be perfect) and maximum load current.
You should be able to calculate this, as this is a homework problem we don't give complete answers, but this should be enough of a hint. |
H: Any way to make rise and fall time shorter for custom square wave generator?
I'm trying to make a custom square wave generator to drive high-side and low side MOSFETs.
I need a HIGH pulse, then a DEAD time then a LOW pulse. Pulses to be adjustable from 10 microseconds to 1 millisecond.
Initially, I drew two custom PWL to do that, which work perfectly (this is one of them:)
PWL repeat forever(0 0 {RISE} {GATE} {RISE+PULSE} {GATE} {RISE+PULSE+FALL} 0 {2*DEAD+2*RISE+2*PULSE+2*FALL} 0) endrepeat
The problem is when I tried to simulate 1k (or greater) seconds transient, LTSpice gets stuck forever in "Expanding repeating PWL" over the entire timeframe area.
Now I tried different approach to generate squares:
use a sawtooth voltage source
use a b-source as a comparator
or, use some Schmidt triggers with proper thresholds across sawtooth
This is working, but for some reason, both Schmidt and B-Source presents a 1usecond rise/fall on generated square wave. I don't understand where it comes from.
For Schmidt I tried to set Rise/Fall near zero (1 nanosecond) but has no effect, still I measure 1 microsecond on graph.
This is output of Schmidt trigger:
This is output of B-Source, the same story, 1 microsecond rise/fall:
Any clue from where this rise/falltime comes from and how to shorten it?
AI: What's the maximum timestep value you have set up in LTSpice - it needs to be maybe 10 ns to get the response you want. If you leave any PSpice simulator to "do its own thing" it will take shortcuts in the analysis in order to render a quicker result.
Any clue from where this rise/falltime comes from and how to shorten
it?
Well my best guess is what I've said above. |
H: How to obtain both values from a voltage attenuator?
Design a resistive voltage attenuator whose input resistance be 1 MΩ (R1,R2) and able to divide by 5 the amplitude of a DC voltage when the output of the attenuator is connected to a circuit with 1 MΩ input resistance (\$R_i\$.)
The result is:
R1=800kΩ
R2=250kΩ
My question is how do I get those resistor values out a voltage attenuation equation?
AI: So the total resistance of the divider R1 + R2 ||Ri = 1M\$\Omega\$, thus R2 || 1M\$\Omega\$ = 200K\$\Omega\$ for 0.2 division, so
R1 = 1M\$\Omega\$ - 200K\$\Omega\$ = 800K\$\Omega\$.
R2||1M\$\Omega\$ = 200K\$\Omega\$ so
1/R2 = (1/200K\$\Omega\$) - (1/1M\$\Omega\$) => R2 = 250K\$\Omega\$ |
H: How to prevent algebraic loop in the control loop simulation?
I have been developing a simulation of the field oriented control of the three phase induction motor.
The simulation is developed in the Scilab/Xcos (v5.5.2) which is a free of charge Matlab/Simulink like
software. The diagram of my simulation in the Xcos toolbox looks like this
As you can see the simulation basically consists of below mentioned main blocks:
IM model
Dynamic model of the three phase induction motor
Control algorithm
Produces components of the reference stator voltage in the stationary reference
frame based on chosen control algorithm (open loop scalar control x field oriented control)
Observer
Calculates estimate of the components of the unmeasurable rotor flux and based on that calculates
orientation of the space vector of the rotor flux for the field oriented control algorithm
The block a) is a continuous time domain system and the blocks b) and c) are discrete time domain systems (they model software). Due to that arrangement the blocks b) and c) are separeted from the continous world (plant domain) via the ADC converter (modeled via sample and hold blocks) at their inputs and via the DAC conveter (first order hold algorithm) at their outputs.
The simulation has been developed in two steps:
induction motor controlled via open loop scalar control algorithm
Simulation works correctly because no feedback is present
induction motor controlled via field oriented control algorithm
At first I have encountered a problem with the algebraic loop error
Based on my experience with the Matlab/Simulink I have inserted a time delay into the control loop
(please see the blocks "Delay" in the ADCs part)
I have set the delay of these blocks to a small fraction of the sampling period (\$T_s =
0.0001\,\mathrm{s}\$ and the delay has been set to \$0.1\cdot T_s\$). Insertion of that delay has
resolved the problem with the algebraic loop but it has also caused two unwelcome facts. Firstly the
state estimation error in the observer is high despite the "small" value of the delay. Secondly the
delay insertion caused huge increase of the simulation time.
I have also thought about simulation diagram rearangement to avoid the algebraic loop inherently but I
can't see any way how to do that - ultimately I simulate the feedback loop.
Does anybody have any idea how to split the algebraic loop in such a manner which does
not corrupt the state estimation process in the observer and also does not increase the simulation time
too much?
AI: Algebraic loops occur when the present-state calculations depend on the present-state output - how can it provide a calculation if it does not have an initial condition?
How to break such loops can be as simple as placing a block that provides an initial output.
Memory block (delay block in XCos)
Transfer function \$\frac{1}{1\mu s + 1} \$
Both provide an initial output of 0 and thus permit the downstream calculations to initialize to then feed back into itself.
If your solver is fixed-step then a Memory block (Delay block) is the best solution as it delays the signal by 1 step. If however the solver is variable then a transfer function with a suitably high time constant is the better solution.
Where to place such block? on all feedbacks used by the control loop |
H: Inductor value for power supply design
I am designing a power supply card using V7805-2000 for 12V to 5V conversion. In the datasheet on page number 6 they have a recommended input filter and output filter circuit. For the inductor they have mentioned value between 10uH to 47uH.
The input to the V7805 will be 12V@2A. I used 0805 footprint for the inductor in input and output path.
I am unable to find the part number for matching the recommended value(10uH to 47uH) in 0805 package at the input and output current rates of 2A. I want to use an inductor current rated twice the needed current rating to be on the safer side.
What happens if I use this Inductor in both input and output path?
AI: What happens if I use this Inductor in both input and output path?
The inductor you linked is 0.47 uH so, it will be ineffective as a filter but have no problems with the operating current.
I am unable to find the part number for matching the recommended
value(10uH to 47uH) in 0805 package at the input and output current
rates of 2A.
Yes, that doesn't surprise me - you'll have to choose a bigger package. |
H: RF power changing with different bandwidth selected
I am trying to measure a radio TX power that is plugged directly to my spectrum analyzer with a -40db attenuator to compare to what the manufacture claims it be and I have few question.
The manufacture claims that the RF power is 30dBm regardless of the bandwidth that is selected. The bandwidth can be selected from 1MHz to 8MHz at frequency from 1.8GHz to 1.85GHz. I understand with higher bandwidth my sensitivity decreases.
However, I am not measuring 30dBm on all BW or I am measuring it wrong so I need some clarification of how exactly to interpret the data I have gathered.
I have tested that radio in all 4 BW (1MHz, 2MHz, 4MHz, 8MHz) all have the TX power output selected at 30dbm. With 40db attenuator I know that I should see -10dbm with some losses in the cable.
Here is the results I got from setting the spectrum analyzer to hold max value and looking for peak:
@1MHz BW: -10dbm
@2MHz BW: -12dbm
@4MHz BW: -14.9dbm
@8MHz BW: -17.8dbm
My question is, when they claim a 1W radio, do they look for a peak of the signal or is it an integration of the entire bandwidth that is 1W. Because if it is the latter then the radio might be as advertised. Since the area under the curve most likely is the same since with higher bandwidth the average power looks the same (I didn't do any math to verify this I am just assuming based on what I saw on the spectrum output)
However, if it is the peak power that is supposed to be 30dbm regardless of the bandwidth used and we just lose receive sensitivity with higher bandwidth then perhaps something is not right here.
The manufacture is a small company and I have been having difficult time getting in contact with their engineers so that is why I am here hopping some one that has had some experience in this kind of thing that can shed some light on it.
Thanks
AI: My question is, when they claim a 1W radio, do they look for a peak of the signal or is it an integration of the entire bandwidth that is 1W.
Power is necessarily the integral of all of the output across frequency.
A helpful way to think about it, is if you transmitted into a resistor, how much would you heat it up? Some broadband power meters actually work that way. |
H: Electric shock - remedy an option?
Simultaneously touching my dishwasher (i.e. the aluminum coating on the inside) and my kitchen sink just gave me a rather unpleasant electric shock. Measuring the potential showed around 110v between the two. Shorting the connection, I measure around .2A.
My questions are:
Am I right that this is unacceptable?
Would any device bring remedy, e.g. an Fi-plug between dishwasher and wall socket, or
should I just get rid of the dishwasher?
And, living in Europe with 230v@50Hz, what could be the source of those 110v?
(I somehow suspect a quite sounding "yes" for 1. and 3., but I might well miss something.)
Thanks
AI: Let me give you some food for thought:
Whether it is acceptable or not that dishwasher shocks you is up to you, but 99% of people would say no I believe.
The most likely reason for this is that your dishwasher machine is not properly grounded. One of the purposes of the ground wire in wall socket is to dispose of unnecessary electric energy that might appear into the ground (since this path has less resistance that your body). That way even if something is wrong and metal case of device is electrified, you wouldn't get shocked.
If you have read the manual to dishwasher, I guess on the first page there is a warning that you should only connect it to grounded socket.
There are devices that would protect you by switching off electricity if they detect current leakage. But I would solve the root cause (no proper grounding) but not the symptom.
No you shouldn't, at least before it is checked by technician. It might be the case that dishwasher itself is not usable any more, but I believe it's not the case in your situation.
It's because some of the electricity goes to metal case (probably from the filter circuit)
In any case, I would advise you to call qualified electrician so that he will check the real problem. What have I done is picked best guess from the information you provided. |
H: Blocking test for receivers
In a receiver blocking test, I always see the description that "the test is peformed at a signal level 3dB above the required sensitivity". So what is meant by testing the receiver at "3dB above the required sensitivity"? And why this 3dB is the benchmark for the blocking test?
AI: So what is meant by testing the receiver at "3dB above the required
sensitivity"? And why this 3dB is the benchmark for the blocking test?
"Receiver sensitivity" is how small an antenna signal it can successfully demodulate to produce an adequately recovered signal i.e. a received message with a fairly reasonable signal-to-noise ratio.
So, if you set the input antenna's radio signal at 3 dB above this limit, you are assured of a decent demodulated signal. It should be noted that 3 dB is a doubling of the power received by the antenna. |
H: What is no-probe-top in Cadence OrCAD
There is a rectangle around the outside of my OrCAD footprint (pointed to with the blue arrow), and it is on the no-probe-top layer. I googled it but I couldn't find any explanation of what that layer is.
AI: Very dependent on the process, but likely that is a virtual layer that is used by the foundry to indicate to them that any top-side pads covered by said layer is not meant to be probed during any testing. |
H: How is capacitance increased/decreased?
My physics teacher said that on a LC based radio receiver, the frequency knob changes the capacitance of the capacitor, thus changing the resonance frequency. How is that done?
AI: There are two commonly used methods.
Mechanically Variable Capacitors
The most traditional technique is to make a capacitor from a stack of sector-like fixed plates, and moving plates on a rotary shaft, and rotate that for more or less overlap with the fixed plates. This is what you typically found in traditional broadcast receivers - eg the classic 365 pF AM tuning capacitor. Often there would be multiple distinct variable capacitors on a common shaft, for example to tune both a tracking preselector filter and the local oscillator, or for use on bands of extremely different frequency.
A variation of this technique sometimes used for trimmer capacitors is to have a set of plates which are compressed to change spacing by a screw (though some better trimmers are just miniature versions of rotary plate capacitors). There'a also the physics lecture apparatus where very large plates would stand on some sort of slider which could vary their spacing over substantial distance.
Electronically Variable Capacitors
The second major technique is to exploit how semiconductor diode junctions vary in capacitance with applied DC vias voltage. There are specific varactor diodes made to be optimal for this, but some other types have sufficiently useful behavior to be sometimes exploited, too. This technique is very useful for making a voltage controlled oscillator such as might be used in a Phase Locked Loop. It also shows up in some simpler electronically tuned radios (eg dirt-cheap "pound shop" radios) and is sometimes chosen for fairly sophisticated gear because it permits using a potentiometer as a tuning control, which can be more easily remote mounted on a front panel and does not suffer from hand capacitance (or LO radiation) the way unshielded physically variable capacitors do, since the actual capacitive element and surrounding tuned circuit is buried inside and only a DC tuning voltage is anywhere near the user's hand or front panel.
There are likely other methods as well, but these are the most common. |
H: Design circuits with unused inputs or has a constant expression
I just started to learn about circuits design (without any prior experience), as a result I would like to ask a question.
I was given a truth table for a circuit that has three inputs, and I need to design a circuit based on the truth table. However, after simplifying the expression, I found that one of the input is not used at all (That is to say, the expression only depends on the other two inputs). How can I draw a circuit that involves three entries but not using the first one at all?
What if one of the expression is a constant, no matter what is the value of the circuit. How can I draw it?
I know I surely need to draw something, and surely I can't ignore that input because it is physically there. So I am not sure how to deal with it.
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. Input C is "not connected".
And what about if the simplified expression is always 1 or 0 regardless of the state of these 3 inputs?
simulate this circuit
Figure 1. Always high and always low could be represented by either of the centre or right layouts above. |
H: What do these components of an AB amplifier do?
I'm trying to learn about class AB amplifiers by reverse-engineering a few I see here on SE. I borrowed this schematic from this question as a starting place.
Ignoring the fact that the circuit lacks emitter degeneration at the output -- which I understand to be a critical flaw -- a few other parts still puzzle me.
All the components in the original were not labelled so I redrew it.
I'm pretty sure I get the basic idea that the input is fed through a differential amplifier Q1 and Q2. The output stage is a class AB with two diodes preventing crossover distortion. Some feedback is pulled from the AB back to the differential to help fight distortion, I imagine.
Here's what I'm stuck on:
What is the purpose of R2? I know that C1 couples the input but what does this resistor to ground accomplish?
Likewise, what do R6 and C3 do? It seems to be part of the feedback circuit.
Is Q3 working as a constant current source? What does C2 do to help?
AI: This is a simplified Class-AB push-pull amplifier circuit.
What is the purpose of R2.
R2 is there to bias Q1. Without it, the Q1's base will not see GND and thus cannot get into DC operating point. Also R3 brings a low-cut in conjunction with C1.
Likewise, what does R6 and C3 do? It seems to be part of the feedback circuit?
Yes. The feedback network consists of R5, R6 and C3. At DC C3 is open-circuit. So R6's effect gets cancelled out. This makes the output to be fed directly to the inverting input (Q2's base) at DC, which means that the gain at DC is unity.
At AC, C3 brings a low-cut in conjunction with R3. The cut-off frequency is \$\mathrm{1/(2\pi R6\ C3)=1.5Hz}\$ with a slope of 3dB/decade. Actually we can assume that C3 is a short-circuit along the full audio spectrum, because it's high enough and it does not impact any single point inside the audio spectrum. So at AC, the output is fed to the inverting input with a division ratio of R6/(R5+R6), which means that the voltage gain at AC is (1+R5/R6) - just like in an opamp non-inv amplifier.
Is Q3 working as a constant current source?
No. It's called "Voltage Amplification Stage (VAS)".
What does C2 do to help?
It's called Miller Capacitance. Its main purpose is to ensure stability. Think of it as a capacitor across the B-E of Q3 but with a capacitance of \$\mathrm{C2m=C2 × h_{FE-Q3}}\$ (Miller Effect). This C2m brings a high cut. But C2 is way too high in the circuit shown, so probably it'll chop off all the usable band. Normally a few tens to a few hundreds of pF is enough in practice. |
H: can I charge battery at the same time as using it if it is the new usb c pd
Sorry for such a newbie question. I am still trying to find my feet. I know that a battery cannot be charge and discharge at the same time as I find this:
No, a battery can't be charged and discharged at the same time. If a
battery is connected to a charger delivering 1 A and a load drawing 3
A, then the battery will be discharged at 2 A. There is no
simultaneous charging and discharging going on
on here:
https://findanyanswer.com/can-you-charge-and-use-a-battery-at-the-same-time#:~:text=No%2C%20a%20battery%20can't,charging%20and%20discharging%20going%20on.
But I have just purchased this:
RAVPower Portable Charger 20000mAh 60W PD 3.0 USB C Power Bank 2-Port Power Delivery Battery Pack High-Capacity External Battery
from here:
https://www.amazon.co.uk/gp/product/B083J2YKRL/ref=ppx_yo_dt_b_asin_title_o01_s00?ie=UTF8&psc=1
Does that make a difference? Can I charge and discharge at the same time? I forgot to order the PD plug so I cannot actually test that at the moment.
Any guidance even just to tell I am stupid? :)
Thanks
NB
To add more info. This is my User Case:
I have an enclosure with a raspberry pi. It is connected to a usb power bank. I have an external port where I can plug the usb power bank to an external charger. At the moment when the battery runs down I charge it by connecting a power source to this charger. I also turn the Pi off via SSH command. It charges OK. I was only wondering if I could avoid that step of using software to turn device off. So, scenario is:
Raspberry Pi is running and powered by usb power bank
The usb power bank runs out of charge
The raspberry then powers off
I plug an external power supply to recharge this usb power bank
As soon as it does the raspberry pi starts up again.
So i am now in the situation that the Raspberry pi is running and the usb power bank is charging at the same time.
I figured it MAY be able to work because you recharge a phone this can also be the same scenario?
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. A rough schematic.
As usual, the Amazon products don't come with proper datasheets and that's why we don't recommend them as a source of components.
The quote in your question is mine, I think, from someone else's question. What I am saying is that the battery can't be charging and discharging at the same time. Either current is going in or coming out. It can't be going both ways.
In Figure 1 it should be clear that if you have power in on the left and power out on the right that one of several things can happen:
If the output current required is less than the that which can be supplied by the input source then there is power available to charge the battery.
If the output current is greater than the input supply can provide then the battery must make up the difference and will be discharged.
If the battery is fully charged then the output will draw current directly from the input.
I've kept this very simple. In practice there will be a boost converter to step the battery voltage up to whatever the output voltage is supposed to be and it should shut the output off to protect the battery before it goes flat. |
H: what will happen when providing two pull up resistors in same line
If two pull ups given in a situation one pull is 4.7 K-ohm and other pull up is 10 k-ohm was given to open-drain pin then what will happen? Imagine the open-drain was connecting to an IO pin of an external MCU
In open drain pin's device datasheet it was mentioned that open drain pin as input will handle max of 10 uA. In that case will that 1 mA damage the open drain pin ? actually there will be current division right (or) will all current enterily flows towards the open-drain pin ?
AI: You'll have a pull-up of 4k7 || 10k = 3k2.
The open drain pin will have to handle a maximum current of V / R = 3.3 / 3k2 = 1 mA.
In open drain pin's device datasheet it was mentioned that open drain pin as input will handle max of 10 uA.
This sounds as though you are mis-reading it. It doesn't "handle" a current but may source or draw up to 10 μA. That means that the pull-up resistor would have to source 10 μA into the input to keep it high. That's not an issue.
In that case will that 1 mA damage the open drain pin?
The open drain pin is on your "Output IC". Check the datsheet. It can probably sink 50 mA.
... actually there will be current division right (or) will all current entirely flows towards the open-drain pin ?
When the line is high the pull-up will supply 10 μA to the input.
When the line is low the pull-up will supply 1 mA to the open-drain transistor.
For almost all practical purposes you can ignore the input current for CMOS devices because it is so low for steady-state conditions. At high frequencies the situation changes because you have to charge and discharge the input capacitance. |
H: LM2576-ADJ bipolar power supply troubleshooting
I'm hoping to find some help here troubleshooting.
The circuit in question is a bipolar power supply that makes use of two LM2576-ADJ. The desired output voltage is +12v and -12v. I've breadboarded this circuit before ordering the PCB, and it seemed to work exactly as intended, where the 20k trimmer sets a positive and negative output voltage between ~1.23 and ~14V.
However, on the PCB, it doesn't function properly. The negative output voltage always reads as -13.4V and doesn't adjust with the trimmer. The feedback pin of the corresponding LM2576 reads instead as -11.5V.
On the positive voltage side, upon powering on, the output voltage slowly rises from about 2.5V to 12.4V. Here, the feedback trimmer also has no effect on the output voltage. The feedback pin on this LM2576 instead reads the same as the output voltage.
Here is a link to the datasheet. On page 22 you can find the schematic from which I based the voltage divider part, and on page 19 is the inverting buck-boost version.
Do you think the problem is related to the feedback resistors? Why does the voltage slowly rise on the positive side?
The input voltage used is 12.68V, from a 12V DC adapter.
Here is an image of the schematic, and also of the PCB layout.
AI: What might be a showstopper is that your input supply voltage is only 12.86 volts and that is insufficient for this regulator if it's producing 12 volts on the positive output. You'll probably need another volt of headroom for this to work correctly. It's not an LDO switching regulator - the data sheet is probably a little cautious about this but it does suggest that 15 volts is the minimum.
Ignoring any other potential circuit faults, the layout is not-so-good in that you will have problems with noise and regulation when you solve the circuit issue. I will also mention that I can see that you have fixed the negative voltage regulator error shown in the data sheet - the ADJ pin does need to be set with a potential divider for that circuit to work and you have correctly done that it appears. Anyway, these are my layout recommendations: -
Keep the ground plane exclusive to one layer (underneath usually) and route connections only on the top copper where possible.
Where connections cannot be exclusively routed on the top copper, make a bypass connection on the underside but, keep it as short as possible so as not to disrupt the ground plane.
Use thicker connections for power feeds to the chips, inductors and decoupling capacitors.
Keep switching tracks as short as possible
Use component reference designators in the silk screen
Get the inductors much closer to the chips - at the moment those connections will form loop antennas (especially as the grounding method you currently use is poor). |
H: Using transistors to control a 555 timer in astable configuration
This is a condensed circuit used for hardware debugging purposes.
The goal of this circuit is to control the 555 timer with only three pushbuttons. I am using the 555 timer and resistors to simulate the signal source I will be using. This is not a high-powered system therefore I do not see the need to use relays.
When the button is pushed the microcontroller will receive a digital signal to turn on the LED. At the same time, this push button will be used to allow the 555 timer to produce the desired frequency. On a fundamental level, it is combining a simple push-button circuit with the 555 timer piano circuit only difference is that these buttons need to be shared.
To start I got all of the pushbuttons working with the Arduino. Then I connected one transistor to the 555 timers and the capacitor charged and discharged appropriately to give the desired frequency.
When I connected the other transistors shown in the circuit below, the capacitor charges but it does not fully discharge to create the signal for buttons 02 and buttons 03. However, button 01 still works.
Why this is the case?
Why does the first circuit work and the second one not work?
AI: Your MCU connections to the buttons/LEDs is faulty in that each MCU output connects through a resistor to ground (shown in purple below): -
And, each time you press one of the buttons, it will short out the 5 volt power rail. |
H: Is the value of this resistor critical and if so why?
The following is a circuit used for the endstops of a 3D printer. The full schematic
I understand that when the switch is closed (pressed) the signal Z- goes low. R16 is used as a pull-up resistor so that the circuit is not in an indeterminate state when the switch is open.
My question is about R17. What is its role and is its value critical? Would it make a difference if R17 was 100 ohm?
On my board the value of R4 and R13 are both 1k but R17 is 100 ohms and it is the Z- signal that seems to misbehave.
AI: Note that the pull-ups are pulling to 3.3 V, the same as the MCU power supply in your linked schematic. Meanwhile the sensors are powered from +5V so their output will be feeding 5 V into a 3.3 V input. It looks like the series resistors on the input are a hack to limit the input current to (5 - 3.3 - 0.6)/1k = 1.1 mA to each input and out to the 3.3 V supply via the chip's input protection diode (which is where the 0.6 V comes in).
This wouldn't be considered high-class design but it probably works. It relies on the chip being able to absorb all the input currents via its supply pin as it probably can't be absorbed back into the PSU. With only three inputs giving up to 3.3 mA it should be OK as the CPU will consume more than that. (Otherwise the 3.3 V rail would rise up towards 5 V.)
My question is about R17. What is its role and is its value critical? Would it make a difference if R17 was 100 ohm?
Yes. 100 Ω would give ten times the input current and I would think that it may overload the input, possibly burn out the protection diode and then the chip is in trouble.
On my board the value of R4 and R13 are both 1k but R17 is 100 ohms and it is the Z- signal that seems to misbehave.
Add 1k in series with the input and see if that helps. It may be too late though. If you think the chip is still working you could make a potential divider on the input with 1k8 and 3k3 resistor to drop the input voltage to less than 3.3 V max.
simulate this circuit – Schematic created using CircuitLab
Figure 1. Voltage divider for the Z-limit input. |
H: How is digital data represented in analog waves?
This question is simply coming from an intrigued teenager, so if it has any flaws, I'm sorry for the inconvenience.
To my knowledge, when digital data is transmitted wirelessly, it is first encoded into analog, whether it is Bluetooth, Wifi, etc, it is built to represent that of 1's and 0's, but how? What specific changes are made to the analog wave (such as amplitude modulation or frequency modulation,) so that when it is decoded it (as in a computer receiving the data) distinctively knows where the ones and zeros are?
For example:
If I were to connect a Bluetooth keyboard to my computer, when I press the 'a' key, the ASCII binary code 01100001 will be sent to my computer via Bluetooth. But how does my computer decode that wave, and know where a 0 and 1 are?
AI: If you want to know how 'A' from from keyboard via Bluetooth to your computer starting from 1s and 0s on an analogue wave, then it's far too complicated for any person to think about all at once.
So we divide it into layers. Each layer uses the services of the layer below, and provides services for the layer above. This allows us to concentrate on just a few simple problems at a time.
The lowest layer is called the physical layer. This handles the radio signal. Start with wikipedia, and look up, in this order, simplest to more complex, Amplitude-shift_keying, Frequency-shift_keying, Quadrature_amplitude_modulation. We rarely use ASK, it's too inefficient. There are more modulation types, more efficient and much more complicated than QAM, but those three will do to get your started.
The highest layers are the applications in the keyboard and computer. The keyboard app asks the layer below to 'send 'A' to a machine with this identity', which happens to be your computer. That layer then calls a lower layer, which resolves the identity to an address, formats the message, and eventually the data trickles down to the physical layer and becomes variations on an RF carrier.
There's a whole bunch of layers in between that handle the connection, know about identities, get messages resent if parts are missing or garbled, and a whole lot more. Have a look at OSI Model or the TCP/IP stack if you want an idea of all the stuff that can happen in between, but don't expect to understand it or the need for it at a first reading. |
H: Switch polarity on LED
I have an LED (don't know the part number unfortunately) that lights up red when its anode is tied to Vcc and its cathode to Gnd, and when the polarity is reversed, it lights up green (opposed to some common cathode LEDs that have multiple anodes, this one has only 2 "legs")
The LED has a forward voltage of 1.8V, so I calculated a current limiting resistance of 330 ohm (about 10mA)
I'd like to make a transistor equivalent of this circuit:
simulate this circuit – Schematic created using CircuitLab
I came up with this circuit:
simulate this circuit
When A is tied to Gnd, the LED lights up green (as expected), but when I pull A high (at Vcc) the LED is not lit.
I measured the emitter voltage at Q1, and it is about 3.3V. Same goes for Q2's emitter, but in both cases.
I don't quite understand why the emitter voltage doesn't drop to 0V (I used this question's answer as inspiration). Am I missing some extra resistor somewhere? (or is this not the recommended way to switch polarities?)
Thanks in advance
AI: If you want to drive a load like that differentially, a pretty energy efficient way of doing that is with a H-Bridge. Here is what it might look like if you did it with BJT’s (assuming you have p-channel BJT’s around):
This would be much easier to accomplish with MOSFET’s, as you wouldn’t need so many resistors, and it would look like this:
If you are more digitally inclined, and/or have some logic IC’s around (could be done with a single 74HC04 Hex-inverter), you could also make that same circuit as follows: |
H: powering multiple LED panels
I have four 50W AC 220V LED panels I'd like to rig to light a work area. I bought a 200W step up / down transformer to test with and it powers a single panel fine.
I have two questions-- first, will this transformer work to power four panels? and second, is there a better way to do this (the transformer is really bulky and isn't quite what I'd want to run the circuit on-- it seems like there's got to be a more realistic and "permanent" way to power these). Thanks!
AI: When you want to power multiple things you generally put those things in parallel.If you put them in series there will be voltage drop in each element .This will result in some things are completely on , some are semi-on and some are completely off.
In your case you connect the phase in one end , the neutral in the other end and in between you put those things you want to power in parallel. |
H: Calculation of the capacitor value across the base and emitter to avoid unexpected turn ON of transistor
There is a design recommendation to add a capacitor across the base and emitter of Q2 to avoid the unwanted/unexpected turn ON of Q2.
Calculation of new capacitor across Vbe:
My questions :
Can someone show me the current path and the voltage across the components when there is no capacitor across Vbe which will provide the unexpected turn ON of Q2 during high dV/dt at VBAT?
Please also show the current path and voltage across the components when there is capacitor added between base and emitter which will avoid the unexpected turn ON of Q2 during High dV/dt at VBAT?
Question 2 :
I am not able to understand the formula and how there are arriving at the value of the new capacitor which is taken to be 1nF. Can someone provide clear explanation of the formula?
If you cannot provide any answer related to the above circuit image and formula present in the question, I request you to provide your own simple circuit image explaining the current path and voltages in it with and without the base emitter capacitance and your formula for arriving at the base emitter capacitor value.
EDIT : In the above circuit image, the resistor R57 is 47k and 100mW (power rated) package. and R403 is 10k and 100mW (power package). There is no capacitor added across the base-emitter of the transistor. But there is a design recommendation for this circuit which recommends to add a capacitor across the base emitter of the transistor to avoid unexpected turn ON of the transistor during high dV/dt.
So, the formula attached above in the circuit asks to add a capacitor between the base emitter of the PNP transistor of a value of 1nF to avoid the unexpected turn ON of the transistor.
My question is, I just want to understand how the transistor turns ON during High dV/dt when there's NO capacitor across B-E junction of Q2 and when there's a capacitor of 1nF (which is recommended to add - coming based on the above formula) added to the base-emitter junction of Q2. Would like to know how the current flows and voltages across the components during both instances (with 1nF added and without 1nF)
Also, not sure what is the formula which is used above to arrive at 1nF. So, want to ask whether anyone has seen this type of formula to calculate the capacitor across B-E of the transistor. If you have not used this type of formulas, then how to arrive at the capacitor value.
AI: The current path at Turn-ON. The capacitor is a short circuit.
And the current path with the additional capacitor across \$R_{57}\$ resistor with a much larger capacitance value then \$C_{CB0} + C_{LEAK}\$
Now the BJT won't be able to Turn ON because \$C_1 >> C_{CB0} + C_{LEAK}\$ and we have a capacitive voltage divider thus \$V_{BE} = V_{bat} \times \frac{C_{CB0}}{C_{CB0} + C_1} \approx 24V \times \frac{6pF}{1nF} \approx 0.114V \$ (at the end of a charing phase).
And after this \$C_1\$ capacitor will be discharged by \$R_{57}\$ resistor.
So that the steady-state voltage at the base is equal to \$24V\$.
And at the same time, the small charging current will be flowing through \$ C_{CB0} + C_{LEAK}\$ |
H: How to prove that \$I_3=Vi/R1\$ in a darlingtonpair circuit with opamp when \$\beta_2\to\infty\$?
I have the following circuit:
simulate this circuit – Schematic created using CircuitLab
How can I prove that \$I_3=Vi/R1\$ when \$\beta_2\to\infty\$?
AI: First, I will use Mathematica to solve your problem.
Well, we are trying to analyze the following circuit:
simulate this circuit – Schematic created using CircuitLab
When analyzing a transistor we need to use the following relations:
$$\text{I}_\text{T}=\text{I}_0+\text{I}_2\tag1$$
$$\text{I}_1=\text{I}_\text{T}+\text{I}_3\tag2$$
Transistor gain \$\beta_1\$:
$$\beta_1=\frac{\text{I}_2}{\text{I}_0}\tag3$$
Transistor gain \$\beta_2\$:
$$\beta_2=\frac{\text{I}_3}{\text{I}_\text{T}}\tag4$$
Emitter voltage \$\text{T}_1\$:
$$\text{V}_{\text{BE}_1}=\text{V}_1-\text{V}_2\tag5$$
Emitter voltage \$\text{T}_2\$:
$$\text{V}_{\text{BE}_2}=\text{V}_2-\text{V}_5\tag5$$
Using KCL, we can write:
$$\text{I}_\text{b}=\text{I}_2+\text{I}_3\tag6$$
When we use and apply Ohm's law, we can write the following set of equations:
$$
\begin{cases}
\text{I}_1=\frac{\text{V}_5}{\text{R}_1}\\
\\
\text{I}_2=\frac{\text{V}_\text{b}-\text{V}_3}{\text{R}_2}\\
\\
\text{I}_3=\frac{\text{V}_\text{b}-\text{V}_4}{\text{R}_3}
\end{cases}\tag7
$$
Now, using an ideal opamp, we know that:
$$\text{V}_+=\text{V}_-=\text{V}_\text{i}=\text{V}_5\tag8$$
Now, it is not hard to solve for \$\text{I}_3\$:
$$\text{I}_3=\frac{\text{V}_\text{i}\beta_2}{\text{R}_1\left(1+\beta_2\right)}\tag9$$
Where I used Mathematica-code to solve for that:
In[1]:=FullSimplify[
Solve[{IT == I0 + I2,
I1 == IT + I3, \[Beta]1 == I2/I0, \[Beta]2 == I3/IT,
VBE1 == V1 - V2, VBE2 == V2 - Vi, Ib == I2 + I3, I1 == Vi/R1,
I2 == (Vb - V3)/R2, I3 == (Vb - V4)/R3}, {Ib, IT, I0, I1, I2, I3,
V1, V2, V3, V4}]]
Out[1]={{Ib -> (Vi (\[Beta]1 + \[Beta]2 + \[Beta]1 \[Beta]2))/(
R1 (1 + \[Beta]1) (1 + \[Beta]2)), IT -> Vi/(R1 + R1 \[Beta]2),
I0 -> Vi/(R1 + R1 \[Beta]1 + R1 \[Beta]2 + R1 \[Beta]1 \[Beta]2),
I1 -> Vi/R1,
I2 -> (Vi \[Beta]1)/(
R1 + R1 \[Beta]1 + R1 \[Beta]2 + R1 \[Beta]1 \[Beta]2),
I3 -> (Vi \[Beta]2)/(R1 + R1 \[Beta]2), V1 -> VBE1 + VBE2 + Vi,
V2 -> VBE2 + Vi,
V3 -> Vb - (R2 Vi \[Beta]1)/(
R1 + R1 \[Beta]1 + R1 \[Beta]2 + R1 \[Beta]1 \[Beta]2),
V4 -> Vb - (R3 Vi \[Beta]2)/(R1 + R1 \[Beta]2)}}
Now, when \$\beta_2\to\infty\$, we get:
$$\lim_{\beta_2\to\infty}\text{I}_3=\lim_{\beta_2\to\infty}\frac{\text{V}_\text{i}\beta_2}{\text{R}_1\left(1+\beta_2\right)}=\frac{\text{V}_\text{i}}{\text{R}_1}\cdot\lim_{\beta_2\to\infty}\frac{1}{1+\frac{1}{\beta_2}}=\frac{\text{V}_\text{i}}{\text{R}_1}\cdot\frac{1}{1+0}=\frac{\text{V}_\text{i}}{\text{R}_1}\tag{10}$$ |
H: What are the differences between a x1 and a x10 osciloscope probe
I've heard pros of x10 probe a lot.
Now I need to know the cons but I couldn't find a clear explanation.
Some people say x1 probe is for small signal.
How do you decide either x10 or x1.
AI: The pro is that a 10x probe has 10x the input impedance so will interfere with the signal being measured less. The con is that it is reducing the voltage on your signal by 10x before it reaches the scope so it cannot measure signals with very low amplitudes or measure with noise levels as low as a x1 probe will (your scope introduces noise and if your signal is 10x smaller when it reaches the scope, then the noise of the scope will be 10x bigger than it would otherwise relative to the signal).
But a side benefit of stepping down the voltage by 10x before it reaches your scope is that you can measure signals with a maximum amplitude 10x higher.
Use x1 probe to measure very low amplitude signals in low impedance circuits. Use 10x to measure everything else, especially if the circuit being measured is higher impedance. If your circuit is low amplitude but high impedance...well...that's where it gets tricky.
Use probes more than x10 if you need to measure voltages that are higher than what your scope can accept with either a x1 or x10 probe.
I don't like to use a x1 probe with anything I know will be more than 50V, even though a scope input can typically directly accept 300V for oscilloscope preservation purposes. I use a x100 probe for anything larger than 100V for the same reason. You never know what overshoot might exist in a signal you are measuring. |
H: Measuring parallel resistor without current
I am trying to read the temperature sensor in a car with a Raspberry Pi. The temperature sensor's resistance changes as the engine temp increases however the temperature sensor would be in parallel to the voltage divider that runs to the ADC I would read from and since the temperature sensor grounds in the engine block I am unable to read anything after the sensor.
How would I find the resistance of the temperature sensor and read it from the ADC?
simulate this circuit – Schematic created using CircuitLab
AI: Your ADC is monitoring the battery voltage. Your temperature sensor just passes current from the battery to ground. The amount of current will vary with the temperature.
simulate this circuit – Schematic created using CircuitLab
Figure 1. Set R1 approximately equal to R3.
The output voltage will be given by \$ V_{out} = 3.3 \frac {R_3}{R_1 + R_3} \$. |
H: The offset null pins of the LM741CN op amp don't seem to work properly
simulate this circuit – Schematic created using CircuitLab
I can't nullify the output offset voltage of an LM741CN op amp.
I tried the circuit mentioned in
the datasheet, but with no luck.
I connected the V- pin to ground of a 15V power supply and used a 10k pot as mentioned and the output is just stuck at +rail and doesn't even move a bit.
I also tried to use a 9V battery on a potentiometer to just compensate for the input offset voltage with the wiper end on the + pin. It worked and I got 30mv on the output but it also reads a 50 mA on the power supply and the op amp gets really hot.
I edited the circuit to bias the inputs to half of the supply voltage and made it my virtual ground now should be ok that the -v terminal is 7.5V below the inputs which allow for maximum swings on both sides like the circuit below. Are there any other cautions to take into account about this circuit? If there's any suggestions about any modifications or pitfalls in this circuit would be appreciated.
simulate this circuit
AI: Figure 1. The original circuit.
You are running the op-amp from a single supply and have the inputs tied to ground. You can't. The inputs must be a few volts above the negative rail. You need to supply a negative voltage on pin 4.
Edit after question updated.
Figure 2. The modified circuit.
This is better and you should see some ability to modify the output voltage. Note that you have a gain of 1M/1k = 1000 which is very ambitious for a 741. Try a gain of ten or twenty and continue your experimentation. |
H: Light coming from the room influencing TV
Inside the TV Remote we have a LED of infrared light which sends commands to the TV.
Isn't it influenced by the light of the room(if any?).I thought if an electron in the valence band absorbs a photon with energy greater than the band gap the electron goes to the conduction band and a phonon is emitted.
Photons of 'infrared light' have less energy than photons of 'visible light' so even if the LED doesn't emit anything the sensor in TV should still be 'activated'.What am I missing?
AI: Yes, the sensor responds to the room light and it may be brighter than the signal from the remote control.
The signal from the remote control however is modulated with a signal that is typically at 38kHz. The TV is tuned to only respond to light modulation at that frequency. The 38kHz modulation is pulsed to transmit the actual control function.
The signals from room light will typically be at DC for steady light such as sunlight or at 100/120Hz from lights powered by the wall socket (the ripple is at twice the frequency usually because the lights illuminated on both positive and negative half-cycles). Some LED lights may modulate with other frequencies as well because of the way they control their power.
TV Remote Control Formats |
H: Is there a better way to rotate through 3 different states (A, B, A+B)?
I would like to be able to rotate through 3 states (A, B, A+B) with one momentary push button (M) as follows:
starting state: A is high, B is high
after having pressed on M a 1st time : A is high, B is low
after having pressed on M a 2nd time : A is low, B is high
after having pressed on M : back to starting state
I designed a circuit achieving this behavior as a falstad simulation.
It seems to work fine, however it requires 2 flipflops, 2 OR gates, 1 NOR, 1 XOR and 1 AND gate.
Is there any way to simplify it ? Or are you aware of an IC able to achieve this kind of behavior with less parts involved ?
Thank you a lot for your help.
Note: The logic is meant to energize 2 different relays. The starting state can be different as the one above (but at least A or B must be high).
AI: I just deleted all the output gates. and picked the flip-flop terminals that followd your rules. |
H: For an operational amplifier, is the path from input to operational amplifier to output considered a feed forward path?
I actually don't have much knowledge about control systems or anything so based on what I have searched, people use both the terminologies feedforward path and forward path for the path which starts at the input, goes to the operational amplifier and ends at the output. This is to contrast it with the feedback path when a resistor is connected between the input and output terminals.
I just wonder if the term feedforward is appropriate because based on what I have read, the feedforward and feedback concepts are suppose to be like interventions to a certain process. The operational amplifier performs the process that we are talking about and it does go in the forward direction or input to output.
I am aware that feedforward is a term that is almost never used. I just want to get a better idea on what it is so I have something to compare with the concept of feedback.
AI: The concept of feedforward is so oblique to modern thinking that it rarely surfaces.
To compare, feedback uses the output, however non-linear the transfer characteristic of the 'forward path' may be, to modify the signal to correct the output's 'response' to approach linearity.
Feedforward corrects the signal to the forward path in the inverse of it's non-linearity, thus achieving the same goal.
Combining both methods is the 'holy grail' of linear circuit designers. |
H: Can a large charge controller damage or explode a battery?
I have a 12V 200Ah/20Hour battery and a 60A MPPT Charge Controller. Currently, I only have 200W of solar power to charge my system (planning to upgrade to larger system soon when my proof of concept is done). However my concern is whether my charge controller could charge my battery too fast, causing it to explode. I haven't found anywhere online describing how to calculate whether this will happen or not.
As I understand it, the MPPT controller will output a maximum of 60A but it could be lower depending on the current of my solar panels. Is that correct? And how do I know how much charge current my battery can handle?
AI: NO, a 200Ah battery will not explode here
In general, you can assume any battery can handle one-hour rating in Amps from the Ah rating (20h). So 200 Amps no sweat for a 200 Ah bank.
Good batteries of this type are protected internally for explosion from short-circuiting the terminal, if that is a risk, which might be the only risk from H2 generation and a spark. e.g. Lithium.
Think car starter and welder's cables. Search for your battery datasheets.
(BTW what models for MPPT and battery?)
But for 30 seconds if the CCA rating is 5x this amount or 1000A for 30sec max. with 2 min. delays between for cooling. But due to Puekert's Law the Ah Capacity reduces from 20h std value. So if drained in 1h you might lose 20% capacity more or less depending on quality of chemistry. The life expectancy depends on how well balanced each cell is (Quality Control) and the depth of undercharge or overcharge. undercharge causes lead to rust which corrodes and insulates the conductive lead plates.
If charge is need and charge is available, the MPPT will load the PV with the matched impedance Vo/Io which is the same as Voc/Isc.
Yet the output will be limited by this solar input so Pout cannot exceed Pin.
There would be very little storage for only a few cycles so transients if possible would be harmless.
Car batteries with 55Ah capacity routinely get 100A +/50% typ car/trucks
How much it can handle depends on I^2*ESR=Pd power dissipation which a large 200Ah ought to be able to handle lots. This is rated by CCR for 30 seconds where max current is allowed to drop 5V.
This one has CCA =1450 Amps |
H: What is the role of the Op-Amp integrator in this circuit?
Helo dier community! I got a 400 Hz broken Power Inverter and reverse-engineered the circuit just for the simplicity of repairing it.
Then I got deeper in and started to understand the engineering principle of the circuit. But I em stuck on this Op-Amp integrator build in and his role in this circuit. It would be nice if you could help me to understand his role. If you need some Voltage references I can provide it. The circuit is a simulation in Multisim and fully running.
AI: the integrator output on p10 ought to be near 0V if the NPN PNP gains are matched with transients expected on start/stop of loads in order to balance the primary coil from saturation. it does this by balancing the input voltage drop to the transformer input R+impedance. A saturated core presents a very low impedance. This occurs on startup often.
Record all the DC voltages and compare with simulation and paste results on schematic if you cannot debug. |
H: Joining two different-widths PCB traces
I need two join two traces of different widths, I use two different width at first place due to space constrains at some parts of the board. so what is the best method to do it elegantly and with no etching problems?
AI: no etching problems?
If the smaller width works, this will also not be an etching issue. Also, this is a DC line, so you don't have to worry about anything geometrically here.
elegantly
You're asking about æsthetics here. Well, can't help you with that, honestly, different people find different things pretty. It might be prettier to simply not have the thicker line extend this far up, so that the rounding doesn't extend beyond the upper edge of your thinner trace.
But honestly, go with what you layout software does. |
H: yet another burned MOSFET issue in H-bridges
I'm trying to get into how H-bridges could be utilised in a heating/cooling peltier module for a personal fun project;
I designed the circuitry (shown below), which BTW your feedback and suggestions regarding the whole design is much appreciated, the problem is as soon as I'm switching ON the DC source(12V@3A) I'm burning the high-side P-MOSFETs. the DMP3056L could theoretically be able to handle 3A with Id_max of (-4.3/-3.4A for Vgs of -10/-4.5V) according to the datasheet; on the other hand, with Rds of (50/70mOhm for Vgs of -10/-4.5V) and considering the 3A drain current the dissipated power should be: 3^2 * (0.05 or 0.07) = 0.45-0.63 Watts and again according to the datasheet the temp rise should be 91C/W which I doubt that could cause a significant rise in the temperature to be the reason for the burning of MOSFETs.
Am I missing something here?
Datasheets:
https://www.diodes.com/assets/Datasheets/DMP3056L.pdf
https://www.diodes.com/assets/Datasheets/ZXMN3F30FH.pdf
AI: Notice the fine print on DMP3056 datasheet about how RthJA of 91°C/W is measured...
Note 5: Device mounted on FR-4 substrate PC board, 2oz copper, with thermal vias to bottom layer 1inch square copper plate.
The other FET specs 131°C/W but...
(a) For a device surface mounted on 25mm x 25mm FR4 PCB with high coverage of single sided 1oz copper, in still air conditions.
In other words these specs count on having enough copper on the board to act as a heat sink, with heat flowing through the component leads.
Some special packages can have a low Rth because the chip is mounted directly on the metal lead frame which conducts heat to the board through the pins and solder. This is not the case here, this standard SOT-23 can't dissipate half a watt.
Solution: use a FET package that will handle the required power, if this is a one-off prototype, TO220 is ideal because it's much easier to solder on protoboard than SMDs.
Or get a ready-made h-bridge, these are quite cheap.
Or keep SOT23s but pick ones with much lower RdsON.
Note if the power supply current limits at 3A, you need a more powerful supply for a 3A peltier. |
H: Remote's IR signal viewed in my phone's camera is flashing. Shouldn't it look steady with a 38kHz carrier frequency?
I know I'm missing something fundamental here, but you can imagine the Google results I get trying to find this out!
Shouldn't my phone cameras recorded fps/exposure be way way waayy much slower than 38000 flashes every second?
AI: Figure 1. Image source: Adafruit.
The data is modulated on the 38 kHz carrier as shown in the image above. The 38 kHz is transmitted in bursts and it's the bursts your camera is detecting. You are correct that your camera's sensor will integrate many 38 kHz pulses in one video exposure "frame".
Having the carrier frequency makes the system much more robust as the receiver can be set up to look for rapid changes in illumination levels. This is a big help in
making the system work even with high background radiation such as sunlight.
The linked article is worth a read. |
H: Quad SPI series resistors on lines for short circuit protection?
I am designing a circuit where MCU connects to LCD driver IC (FT813) using Quad SPI. Since there is a risk of Both MCU and FT813 pins becoming output at the same time with different values (i.e. one Gnd and the other VCC) and creating a short circuit, I plan on placing 220ohm resistors on the SPI lines for protection.
However, I am worried that these resistors will corrupt the signals. The distance from MCU to Ft813 is about 10cm and I'm aiming for an SPI clock rate of about 3 to 6 Mhz.
Am I taking the right approach? And where is the best position to place the resistors (middle or near closer to one of the ICs)?
thanks
AI: 3.6V Family Logic were typically 22 +/-50% typ Ohm driver impedance so 33R series parts are used for 50 Ohm bus, given tolerances on source.
The FT813 datasheet indicates on p49 of 63, for VccIO=3.3, Rsw = 6 Ω typ, 10 Ω max, thus twice this for differential.
220R is not needed for short cct protection. Rather you choose according to cable type. Std. twisted pair is often 110 or 220 depending on insulation thickness and twists/ft or /m. On PCB Zo depends on track gap/width ratio to gnd plane or trk//trk, so if you don't know assume it is 100 Ohms. (get Saturn PCB ...exe free, don't guess)
12MHz is pretty low clock rate for 12 cm unless your 12 cm is a big ugly jumper wire pair. ( consider 10x BW for margin) |
H: Need help finding flaw in the voltage regulator circuit
I made a discrete voltage regulator circuit and constructed it. There input comes from a bridge rectifier fed by a 15V 10A transformer.
The output current is limited to 3.3 Amperes. Why is that, how can it be corrected?
AI: Your output transistor is a high-voltage part and has exceptionally low hFE, as low as 5 at 5A.
If the hFE is actually, say, 10, at 5A out, the poor BC547 is being called upon to deliver 0.5A with around 13V across it. That's 7.5W in a TO-92.
Reminds me of a problem I had recently (actually it was metalworking rather than electronics, but the principle is the same) that caused a couple of my devices to stop unlocking from the fingerprint sensor for a month or so. |
H: How does a microcontroller "remember" a program?
This is something thats really bugged me since I've graduated. We programmed PIC16f877a micrcontrollers in class but never got into the how it works, just the make it work. So let's say I write a program that makes LEDS flash in a specific order and send this program to the microcontroller through this special adapter to the right pins. What do you know, the LED's begin to flash as instructed. Now, I disconnect the power and remove the PIC from the breadboard. I put the PIC back in its correct spot, plug in the power, and the LED's still flash as previously programmed without having to reprogram it. How is this happening? How does this microcontroller essentially "remember" what I told it to do?
AI: The PIC includes a type of nonvolatile memory called "Flash EEPROM". When you "send your program to the microcontroller", the special adapter is in fact programming your code into this memory. The physical memory is a special kind of transistor with a floating gate that can store a charge more or less indefinitely, even with no power applied. In most devices, "charged" = 0, "no charge" = 1.
Whenever the PIC is reset or powered-up, it begins executing your code, fetching it directly from this memory.
On the PIC, this memory is integrated into the same chip that holds the CPU and the rest of the logic (peripherals, etc.). The same kind of memory is used to hold the BIOS in your desktop/laptop PC, but it's a separate chip from the CPU. The first few screens you see when you switch on your PC come from the BIOS, which then loads your operating system from hard drive or SSD and runs that. |
H: AC PWM noise generator design advice
I already tried to solve my LTspice problems within another thread here on the forum but I guess my design is bad. So for this reason I decided to start a new thread with some more information about my project. I hope somebody can give me some feedback on how to design this thing.
I'm working for a research group and they asked me to manufacture a "noise generator." It will be used by a university research group. At the university, they have a giant setup with 20 electrical cabinets, each cabinet must represent an industrial building. All the cabinets are connected with a low voltage distribution net. The idea is to generate noise within one cabinet and check how the noise will behave within the distribution net and what it will do to the other users.
They asked me to make a switching device for a high power resistor. The idea is to switch a 20 ampere load at 230VAC within a frequency range from 2-500kHz. So I thought to use a PicoScope to generate the PWM signal. With this signal I want to switch 2 MOSFETs so I can control the load and generate some noise.
I would like to have some galvanic isolation between the PicoScope and the noise generator. My first idea was to use a simple optocoupler but they are all too slow within that frequency range. I tried different and more complex devices like a HCPL3140 and a 6N137.
I first need to simulate the design within LTspice before I can start to design the PCB, and this is where things get difficult. I'm struggling to get the LTspice simulation running.
Also the design should be as simple as possible since we want to manually calculate all the voltages and currents so we can verify the LTspice simulation and make a good scientific report on this project. For this reason I can't get too complex with the galvanic isolation since this would be too hard to calculate (like the 6N137 which has internal logic gates etc).
For this reason I think an optocoupler or something similar is not the way to go. I hope somebody can give me some tips so I can get this thing to work with the least amount of components.
Our supervisor suggested to work with an optical fiber connection to send the PWM signal from the PicoScope to the noise generator, but I think this will be too complex and I have no idea how to start with this.
Attached you can find my current LTspice simulation which doesn't work and always results with the same error.
EDIT:
As suggested below i tried out this schematic.
We want to PWM an AC load, not a DC load.
So i tried to rework the schematic. The result is good in one part of the sinus but not in the other part. It has something to do with how the coils couple but i don't have enough experience about this topic to get this to work. Any suggestions?
AI: Considering your requirements, only, you need (as you say) a pulse generator, that is supplied from 230 Vac, and delivers up to 20 Apk, with a variable frequency from 2...500 kHz. You also mention using galvanically isolated output, which makes sense, since you're supplying from the mains. Since you also seem to favour a half-bridge, then a simple concept would be this:
It makes use of a pulse transformer, which can be replaced by some optocoupler, if you insist, but that would imply additional circuitry to provide power to the isolated side. Or you could use readily available dedicated ICs for this, there are even HV options available.
A1, R5, and C4 form an oscillator, A2 provides the inverted pulses, both driving a push-pull stage, driving the power half-bridge. There is no dead-time, no gate resistor for the push-pull or half-bridge, only a bare-bones pulse forming circuit (D1, R1, Q1 for M1, and similar for M2), which is a very fast driver and, because of that, it will contribute to the noise -- which is what you were going for in the first place. The frequency can be easily tuned through R5 (make it a potentiometer). If you don't like gates, use comparators, whatever other solution you see fit. As I said, it's a concept.
Note that switching 20 A results in some 300*20=6 kW peak power, which is not recommended for a half-bridge -- if you plot the dissipated power on the power transistors, you'll see the horror for yourself. You'll need a full bridge, preferably SiCs (fortunately they're more and more available).
In case you want to fiddle with the schematic, here's the code, save it as .asc:
Version 4
SHEET 1 920 1040
WIRE 528 0 304 0
WIRE 624 0 528 0
WIRE 304 48 304 0
WIRE 528 112 528 0
WIRE -16 128 -64 128
WIRE 80 128 -16 128
WIRE 208 128 144 128
WIRE 240 128 208 128
WIRE 256 128 240 128
WIRE 208 144 208 128
WIRE -16 192 -16 128
WIRE 16 192 -16 192
WIRE 144 192 96 192
WIRE 624 192 624 0
WIRE -64 256 -64 208
WIRE 208 256 208 240
WIRE 208 256 -64 256
WIRE 304 256 304 144
WIRE 304 256 208 256
WIRE 336 256 304 256
WIRE 400 256 336 256
WIRE 528 256 528 176
WIRE 528 256 480 256
WIRE 304 304 304 256
WIRE 528 368 528 256
WIRE -16 384 -64 384
WIRE 80 384 -16 384
WIRE 208 384 144 384
WIRE 240 384 208 384
WIRE 256 384 240 384
WIRE 208 400 208 384
WIRE -16 448 -16 384
WIRE 16 448 -16 448
WIRE 144 448 96 448
WIRE -64 512 -64 464
WIRE 208 512 208 496
WIRE 208 512 -64 512
WIRE 304 512 304 400
WIRE 304 512 208 512
WIRE 432 512 304 512
WIRE 528 512 528 432
WIRE 528 512 432 512
WIRE 624 512 624 272
WIRE 624 512 528 512
WIRE 224 592 -48 592
WIRE 368 592 224 592
WIRE 224 640 224 592
WIRE 368 656 368 592
WIRE 224 768 224 720
WIRE -96 848 -128 848
WIRE 32 848 -32 848
WIRE 64 848 32 848
WIRE 176 848 128 848
WIRE 368 880 368 736
WIRE -128 960 -128 848
WIRE -96 960 -128 960
WIRE 32 960 32 848
WIRE 32 960 -16 960
WIRE 320 960 32 960
FLAG 432 512 0
FLAG 336 256 x
FLAG 240 128 g1
FLAG 240 384 g2
FLAG -128 1024 0
FLAG -48 672 0
FLAG 368 976 0
FLAG 224 864 0
SYMBOL nmos 256 48 R0
SYMATTR InstName M1
SYMATTR Value R6020PNJ
SYMBOL ind2 -48 224 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 1m
SYMATTR Type ind
SYMBOL pnp 144 240 M180
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL schottky 80 144 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 112 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 1k
SYMBOL nmos 256 304 R0
SYMATTR InstName M2
SYMATTR Value R6020PNJ
SYMBOL ind2 -48 368 M0
SYMATTR InstName L2
SYMATTR Value 1m
SYMATTR Type ind
SYMBOL pnp 144 496 M180
SYMATTR InstName Q2
SYMATTR Value 2N2907
SYMBOL schottky 80 400 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D2
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 112 432 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R2
SYMATTR Value 1k
SYMBOL res 384 272 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 7.5
SYMBOL cap 512 112 R0
SYMATTR InstName C1
SYMATTR Value 1m
SYMBOL cap 512 368 R0
SYMATTR InstName C2
SYMATTR Value 1m
SYMBOL voltage 624 176 R0
SYMATTR InstName V1
SYMATTR Value 300 rser=10m
SYMBOL res 0 976 M270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 10k
SYMBOL cap -112 960 M0
SYMATTR InstName C4
SYMATTR Value 10n
SYMBOL Digital\\schmtinv -96 784 R0
WINDOW 3 -8 98 Invisible 2
SYMATTR InstName A1
SYMATTR Value vhigh=5 vt=2.5 vh=1 td=50n
SYMBOL voltage -48 576 R0
SYMATTR InstName V2
SYMATTR Value 12 rser=10m
SYMBOL Digital\\schmtinv 64 784 R0
WINDOW 3 -102 93 Invisible 2
SYMATTR InstName A2
SYMATTR Value vhigh=5 vt=2.5 vh=1 td=50n
SYMBOL ind2 208 736 M180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L3
SYMATTR Value 1m
SYMATTR Type ind
SYMBOL ind2 384 640 M0
SYMATTR InstName L4
SYMATTR Value 1m
SYMATTR Type ind
SYMBOL nmos 176 768 R0
SYMATTR InstName M4
SYMATTR Value FDS6612A
SYMBOL nmos 320 880 R0
SYMATTR InstName M3
SYMATTR Value FDS6612A
TEXT 560 632 Left 2 !k l1 l2 l3 l4 1
TEXT 552 712 Left 2 !.tran 1m
Only now I understand what you actually want: a power AC current sink, that is to be connected directly to the mains. The desired current waveform is still a bit fuzzy -- you say noise, but you show PWM, did you actually mean noise (aka continuous bandwidth), or harmonics? If the latter, is the switching frequency meant to be 2 kHz and the harmonics to go up to 500 kHz? It doesn't really make much sense to inject harmonics up to 500 kHz in the mains, but if the latter is true, then a thyristor is the way to go (2 kHz switching frequency). But in the spirit of the new info, here's a reworked version:
I used SPWM, made of V2 and V3, but instead of a sine you can choose any other reference. If you need DC, only, then re-use the circuit from the previous schematic. Here, though, I've added some large dead-time (for better viewing), but also to show that the gate drive circuit needs adjusted to account for cross-conduction. Since I only used whatever I saw in LTspice's database, I'll leave you to choose the transistors for whatever requirements you have. I'd still recommend SiCs over MOSFETs, the ones that you see have relatively large Rds for the load current (also Qg & co). I've also increased the value of the inductance for the pulse transformer because of the 50 Hz SPWM, but that's also a matter of requirements; ajust as needed. Here's the code:
Version 4
SHEET 1 1088 896
WIRE 320 -80 112 -80
WIRE 464 -80 400 -80
WIRE 464 16 464 -80
WIRE 128 96 96 96
WIRE 176 96 128 96
WIRE 352 96 240 96
WIRE 416 96 352 96
WIRE 560 112 464 112
WIRE 816 112 560 112
WIRE 352 128 352 96
WIRE 560 128 560 112
WIRE 128 176 128 96
WIRE 176 176 128 176
WIRE 288 176 256 176
WIRE 656 176 624 176
WIRE 784 176 736 176
WIRE 816 176 816 112
WIRE 96 240 96 176
WIRE 352 240 352 224
WIRE 352 240 96 240
WIRE 464 240 464 112
WIRE 464 240 352 240
WIRE 560 256 560 224
WIRE 560 256 512 256
WIRE 672 256 560 256
WIRE 784 256 784 176
WIRE 784 256 736 256
WIRE 816 256 784 256
WIRE 736 416 448 416
WIRE 816 416 736 416
WIRE 736 432 736 416
WIRE 816 432 816 416
WIRE 736 560 736 512
WIRE 432 640 128 640
WIRE 560 640 496 640
WIRE 688 640 640 640
WIRE 32 656 -160 656
WIRE 128 672 128 640
WIRE 128 672 96 672
WIRE 272 672 128 672
WIRE 384 672 352 672
WIRE 432 672 384 672
WIRE 32 688 -32 688
WIRE 816 704 816 512
WIRE -32 720 -32 688
WIRE 128 784 128 672
WIRE 160 784 128 784
WIRE 240 784 224 784
WIRE 432 784 240 784
WIRE 560 784 496 784
WIRE 768 784 640 784
WIRE 240 816 240 784
WIRE 272 816 240 816
WIRE 384 816 352 816
WIRE 432 816 384 816
FLAG 112 0 0
FLAG -160 736 0
FLAG -32 800 0
FLAG 464 336 0
FLAG 384 736 0
FLAG 384 880 0
FLAG 448 496 0
FLAG 736 656 0
FLAG 816 800 0
SYMBOL voltage 112 -96 R0
WINDOW 0 39 32 Left 2
WINDOW 3 -30 126 Left 2
SYMATTR InstName V1
SYMATTR Value sin 0 325 50 rser=0.1
SYMBOL ind2 800 528 M180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L2
SYMATTR Value 10m
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.1
SYMBOL voltage -160 640 R0
WINDOW 3 -38 130 Left 2
SYMATTR InstName V2
SYMATTR Value sin 0 0.9 50
SYMBOL voltage -32 704 R0
WINDOW 3 -141 136 Left 2
SYMATTR InstName V3
SYMATTR Value pulse -1 1 0 {0.5/f} {0.5/f} 0 {1/f}
SYMBOL nmos 416 16 R0
SYMATTR InstName M1
SYMATTR Value SPA11N60C3
SYMBOL ind2 112 192 R180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L1
SYMATTR Value 10m
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.1
SYMBOL schottky 176 112 R270
WINDOW 0 32 32 VTop 2
WINDOW 3 0 32 VBottom 2
SYMATTR InstName D1
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 272 160 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 270
SYMBOL pnp 288 224 M180
SYMATTR InstName Q1
SYMATTR Value 2N2907
SYMBOL nmos 512 336 R180
SYMATTR InstName M2
SYMATTR Value SPA11N60C3
SYMBOL ind2 800 272 M180
WINDOW 0 36 80 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName L3
SYMATTR Value 10m
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.1
SYMBOL schottky 736 240 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName D2
SYMATTR Value BAT54
SYMATTR Description Diode
SYMATTR Type diode
SYMBOL res 640 192 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R2
SYMATTR Value 270
SYMBOL pnp 624 128 M0
SYMATTR InstName Q2
SYMATTR Value 2N2907
SYMBOL Digital\\and 464 592 R0
WINDOW 3 -40 0 Left 2
SYMATTR InstName A3
SYMATTR Value vhigh=5 ref=0.5
SYMATTR Value2 tau=10n tripdt=10n
SYMBOL res 304 -64 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R4
SYMATTR Value 20
SYMBOL Digital\\diffschmtbuf 32 608 R0
WINDOW 3 -13 -6 Left 2
SYMATTR InstName A1
SYMATTR Value vt=0 vh=0
SYMATTR Value2 tau=10n tripdt=10n
SYMBOL Digital\\inv 160 720 R0
SYMATTR InstName A5
SYMATTR Value2 tau=10n tripdt=10n
SYMBOL Digital\\and 464 736 R0
WINDOW 3 -8 111 Left 2
SYMATTR InstName A2
SYMATTR Value vhigh=5 ref=0.5
SYMATTR Value2 tau=10n tripdt=10n
SYMBOL res 256 688 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R3
SYMATTR Value 1k
SYMBOL cap 368 672 R0
SYMATTR InstName C1
SYMATTR Value 1n ic=0
SYMBOL res 256 832 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R5
SYMATTR Value 1k
SYMBOL cap 368 816 R0
SYMATTR InstName C2
SYMATTR Value 1n ic=0
SYMBOL ind2 720 416 R0
SYMATTR InstName L4
SYMATTR Value 10m
SYMATTR Type ind
SYMATTR SpiceLine Rser=0.1
SYMBOL nmos 688 560 R0
SYMATTR InstName M3
SYMATTR Value Si9410DY
SYMBOL nmos 768 704 R0
SYMATTR InstName M4
SYMATTR Value Si9410DY
SYMBOL res 544 656 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R6
SYMATTR Value 10
SYMBOL res 544 800 R270
WINDOW 0 32 56 VTop 2
WINDOW 3 0 56 VBottom 2
SYMATTR InstName R7
SYMATTR Value 10
SYMBOL voltage 448 400 R0
WINDOW 0 39 32 Left 2
WINDOW 3 34 93 Left 2
SYMATTR InstName V4
SYMATTR Value 12 rser=0.1 cpar=1m
TEXT -48 392 Left 2 !k l1 l2 l3 l4 1
TEXT -56 336 Left 2 !.tran 40m
TEXT -64 448 Left 2 !.parma f=10k |
H: Power supply for a device
I have a device and the datasheet says the power supply must be a 1.5V AC(Max sine) with an operating frequency of 500Hz-2kHz. Does the 1.5V AC(Max sine) mean that supply is a sine wave with peaks of -1.5V to +1.5V? or is the 1.5V value an RMS value?
I Have attached an image of the specifications below, as well as a link to the datasheet.
https://www.elecrow.com/download/HR202%20Humidity%20Sensor.pdf
I want to simulate it and i cuurently have it as 1.5 peak to peak at a frequency of 1000Hz
AI: The specifications say:
Power supply: 1.5 V AC (Max sine)
Operating frequency: 500 Hz - 2 kHz
Rated power: 0.2 mW (Max sine)
Central value: 31 kΩ (at 25 Celsius, 1 kHz ,1 V AC, 60% RH)
I would take the first to be 1.5 V peak and the second to be RMS. Given that a 1 Vrms sine would peak at \$ \sqrt 2\$ times the RMS value that would make sense.
As a second check look at their power rating for the central value - it's 31 kΩ at 1 V (RMS, we assume). From \$ P = \frac {V^2} R = \frac {1^2}{31k} = 30 \ \mu\text {W} \$ all would be fine.
Figure 1. Resistance vs RH.
Worst case will be at minimum resistance. At 90% RH the resistance falls to 2 kΩ. Calculating again we get \$ P = \frac {V^2} R = \frac {1^2}{2k} = 500 \ \mu\text {W} \$. At this point you are 2.5 times the rated power. Not so good.
I'd use the max rated power figure, the resistance for your worst-case %RH and work out your Vrms from that. |
H: Why is the sum of resistances different?
For the following circuit,
I found the total resistance with the following equation:
However, the solution calculated the resistances in the left and right portion of the circuit in summation with the middle resistance:
Why is the resistance added this way, rather than my version?
AI: Slide Rleft across to the far right of the schematic. Now notice that Rleft and Rright are in parallel. Do the maths on those and convert them to one resistor and redraw the circuit.
The answer should now be fairly obvious.
It should also now be obvious that Rmid is not in parallel with Rright as both ends are not directly connected together. |
H: Thermal pads, their thickness and conductivity
I would like fo know how do thermal pads work, more specifically why does their thickness matter so much even more so than their actual conductivity numbers sometimes and how do I choose the proper thickness, or rather how do manufacturers choose it for the various products/applications.
AI: Thermal pads work basically on the basis of the fact that they're more conductive then the material they replace (air).
They don't work too well because they generally need be soft enough to conform to the surface they're trying to mate, which places limits on their composition.
Basically, you want the thinnest thermal pad you can manage. The obvious end-point for this is thermal paste (where the thermal paste can squeeze out allowing the thinnest bond-line possible).
Generally, you design for the thinnest gap possible. You only go thicker due to mechanical constraints.
Thermal pads are basically a compromise that you only take due to mechanical constraints. They're generally never better then a mechanically clamped interface with thermal paste. A thermal pad provides assembly convenience (and substantial gap filling in some cases), but poorer performance.
more specifically why does their thickness matter so much even more so than their actual conductivity numbers
This is pretty apparent if you consider it a bit. If you reduce the thickness of a thermal pad by 1/2, you've effectively cut it's thermal impedance by half, which would require double the thermal conductivity to equal. It's much easier to thin the thermal pad then to improve the thermal conductivity beyond material limits.
Both that and thermal pads for example on top of PCB modules, VRAMs, VRMs etc, but ultimately thermal pads that dissipatiate heat.
In any application I've seen, thermal pads do not dissipate heat. They move heat from a device to a dissipative radiator.
Making a heatsink out of thermal pad material would be silly, because they're really quite crappy in terms of actual thermal conductivity. |
H: Cascaded Non Inverting Amplifier
I'm working on a project that requires at least 40 dB gain at 40kHz. I originally used one non-inverting amp using 10k and 1k resistors for a gain of 11. Using cascading rules for linear systems, I cascaded another non-inverting amp of the same gain.
Below is the simulation and circuit that I am trying to implement.
I implement this system using the LMC662 Dual Op-Amp
Datasheet:
https://www.ti.com/lit/ds/symlink/lmc662.pdf?ts=1602456193412&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FLMC662
When I run each amplifier separately using Analog Discovery 2 and waveforms, I get the expected frequency responses as shown below.
But when I cascade it, I get a funky response like this:
Why does this not work as expected?
Note: The High Pass Filter is only being used to simulated a receiver system whos frequency response mimics and band pass
AI: I have found the issue but can use some explanation. The amplitude of the input wave for the frequency sweep was too high. Does this cause the op-amp internal transistors to saturate which is why there is a random drop in the response? |
H: Is a flyback diode necessary with a relay module for operating a Solenoid valve?
Assuming I have a relay module (I'm not sure about its features) that is connected to a 12 V DC solenoid valve and should be operated by a microcontroller.
Do I need a flyback diode connected with the relay module?
-Do relay modules usually include flyback diodes?
What about the solenoid valve - does it need its own flyback diode or is it unnecessary?
Finally, do I need to make sure that opto-coupling is provided?
AI: the relay module will include a flyback diode, but that diode is only foir the relay itself. you will need another diode for the solenoid. |
H: Unexpected Behavior: i2s L/R clock only works under arbitrary conditions?
I'm new to Verilog (and HDL at all) and working with a Cyclone II EP2C5 Mini Dev Board in Quartus II (version 13sp1 to be compatible with my cheap FPGA).
I use the below two modules (one mostly just a container) to try and generate an extremely basic i2s waveform. The output is a 1411200Hz bit clock signal (with expected jitter) and a rock solid 44.1kHz LRClk / Word select signal. See the below image and compare with the hard-coded sample values I'm using.
module i2sTest(
input CLK50MHZ, //crystal input
output BitClk, //1.411200 MHz, or very close at least
output LrClk, //44.1 kHz aligned with BitClk falling edge
output i2sData
);
i2sOutput i2s(
.CLK50MHZ (CLK50MHZ),
.sampleL (16'b1000000000000000),
.sampleR (16'b1000000000000000),
.LrClk (LrClk),
.i2sData (i2sData),
.BitClk (BitClk)
);
endmodule
module i2sOutput (
input CLK50MHZ,
input [15:0] sampleL,
input [15:0] sampleR,
output wire BitClk,
output wire LrClk,
output reg i2sData
);
//generate the bit clock
reg [7:0] BitClkAccumulator; //counts up to alternating 35/36 master clock cycles
reg BitClkAccToggle; //tracks the alternation
always @(posedge CLK50MHZ) begin
if ((BitClkAccumulator + 1) == (35+BitClkAccToggle)) begin
BitClkAccumulator <= 0;
BitClkAccToggle <= ~BitClkAccToggle;
end
else
BitClkAccumulator <= BitClkAccumulator + 1;
end
assign BitClk = (BitClkAccumulator < 18); //50% duty cycle
//generate the lr clock
reg [7:0] audioClkGenAcc; //counts up to 64
always @(negedge BitClk) begin
if (audioClkGenAcc + 1 == 32)
audioClkGenAcc <= 0;
else
audioClkGenAcc <= audioClkGenAcc + 1;
case (audioClkGenAcc + 1)
32: i2sData <= sampleL[ 0]; //I know this isn't accounting for every bit of the inputs, please ignore this for now
1: i2sData <= sampleR[15];
2: i2sData <= sampleR[14];
16: i2sData <= sampleR[ 0];
17: i2sData <= sampleL[15];
18: i2sData <= sampleL[14];
endcase
end
assign LrClk = (audioClkGenAcc < 16);
endmodule
However, making one of any number of slight adjustments to this code, the LrClk frequency becomes extremely unstable. My favorite example of this is as follows: if I change the i2sTest module to connect this literal to the i2sOutput module:
.sampleR (16'b0000000000000000),
Then I get this output:
Have I discovered a bug in this older version of Quartus? Am I violating a Verilog rule? What's going on here?
AI: BitClk upon which you condition an always block is not a legitimate clock, but a derived signal.
In simple terms, Don't do that that.
Instead, clock your output registers from an actual clock, using a clock enable.
Work out your code such that the I2S data changes based on the source clock, when enabled by a determination that you are at the appropriate phase of division thereof.
It's actually impressively useful that the hardware so beautifully and observably glitched in response to this classic design mistake, as that really focuses attention on the fact that it is a mistake. |
H: Current source resistor values in differential amplifier
In this circuit How measure input impedance this differential amplifier in LTspice? the OP has used a 4ma current source in a differential amplifier. I'm taking it apart to learn how it works. I see that the diodes will give a pretty reliable 1.4v drop, and the transistor will give a 0.7v drop, which allows us to use a single 180 resistor to set the desired current to approx. 4ma. This makes sense to me and checks out in a simulation. Below is that portion of the circuit. Of course, the collector in my schematic would connect to the emitter resistors in the diff. amp.
What I'm wondering about is the choice of a 3.3k resistor at the base. It seems to me - as a novice - a waste of energy, as it sees a rather large current of 4ma. Since the 3.3k resistor will always drop around 13.6v, couldn't its value be increased significantly to reduce how much current it has to handle? As far as I can tell, the base only requires a small fraction of this 4ma, say around 40uA, sending 99% of that current through the diodes.
So my question is, how should one size this resistor biasing the base in a current mirror? Is there a minimum required current to get the diodes to drop 0.7v? Is there some compelling reason to set it at a particular value?
AI: Often I may (at least initially) overdesign biasing circuit, so they become DONT CARE parts of the overall behavior.
Then, later, if power is a big deal, that bias generator may be optimized, while acknowledging I now have a Beta_dependent (and thus randomly_selected device dependent) region in the circuit. |
H: Crystal oscillator - calculation of fparallel
This is the equivalent circuit for a crystal oscillator. The two frequencies are fseries and fparallel, the latter being slightly higher. It is calculated as,
where Ceq is specified as,
The formula given for calculating Ceq is that for series capacitors even though the first image shows Cs and Cp to be closer to being in parallel.
My understanding is that series components all have the same current flowing through them while parallel components all have the same voltage across them. The equivalent circuit fits neither of these definitions perfectly, but seems to come closer to showing parallel capacitances based on the topology.
What am I missing?
AI: You are right, this circuit has two branches connected in parallel and there is no capacitors connected in parallel. Be patient, pay attention to the derivation of resonant frequencies of the XO model. You are missing the point that the textbook or lecture notes, whatever these formulas come from, make in this derivation. It is possible also that your sources never state that the capacitors are connected in parallel.
The RLC branch -- serially connected Rs/Ls/Cs components -- has the impedance
$$
Z_{RLC}(ω) = {R_s+jωL_s+{1\over{jωC_s}}}
$$
the Cp branch has the impedance
$$
Z_{C_p}(ω) = {1\over{jωC_p}}
$$
The total impedance is
$$
Z_tot(ω) = Z_{RLC}(ω)||Z_{Cp}(ω) = {{Z_{RLC}(ω)·Z_{Cp}(ω)}\over{Z_{RLC}(ω)+Z_{Cp}(ω)}}=\\
{{R_s+jωL_s+{1\over{jωC_s}}}\over{jωC_p·(R_s+jωL_s+{1\over{jωC_s}}+{1\over{jωC_p}})}}=\\
{{(R_s/L_s)·jω-ω^2+{1\over{L_sC_s}}}\over{jωC_p·((R_s/L_s)·jω-ω^2+{1\over{L_sC_s}}+{1\over{L_sC_p}})}}=\\
{{(R_s/L_s)·jω-ω^2+{ω_s}^2}\over{jωC_p·((R_s/L_s)·jω-ω^2+{ω_p}^2)}}
$$
where
$$
ω_s = \sqrt{1\over{L_sC_s}}\\
ω_p = \sqrt{{1\over{L_sC_s}}+{1\over{L_sC_p}}}=\sqrt{{1\over{L_s}}{({1\over{C_s}}+{1\over{C_p}}})}
$$
are the series and the parallel resonance frequencies, respectively. The ωp is expressed through the capacitance of the Cs and Cp connected in series, and this is the only place where the impedance formula for capacitors connected in series appears in equations.
The derivation never states that the capacitors are connected in series or in parallel, but your source is responsible for your confusion: the Ceq component is non-existent, unnecessary, and should never appear in the derivation for educational purposes. |
H: s-domain to z-domain conversion in MATLAB
I want to convert a transfer function from s-domain to z-domain. But, by keeping variable i.e without assigning values to variables.
I tried to do it with s2z command but it demands numeric input, not variable
Thanks in advance.
AI: You need to specify the method of conversion.
If you select Bilinear transform as the method, the conversion can be done by substitution.
The substitution required
(from Wikipedia) is
$$
s \mapsto \frac{2}{T} \frac{z-1}{z+1}
$$
e.g. If the transfer function is, \$\frac{k}{s+a}\$, it becomes
$$
\frac{k}{
\frac{2}{T} \frac{z-1}{z+1} + a
}
=
\frac{T\ k\ (z+1)}{(2+a\ T)z + (a\ T -2)}
$$
If you are using symbolic computation, and if the transfer function is available as a symbolic expression, then the subs function in symbolic tool box of Matlab can be used.
% s and z are symbolic variables
% expression_for_tf is a an expression containing (powers) of s
subs(expression_for_tf, s, 2*(z-1)/(T*(z+1)));
Note that there are other methods for converting a continuous time transfer function to discrete time transfer function. Method selection depends on the application. Other methods may not allow for such a conversion by plain substitution. |
H: 'Time step too small' Error when simulating d-flip-flop in LTSpice
Im just looking to simulate a 3 bit counter in LTSpice and im receiving an error during simulation:
Analysis: time step too small; time = 1.1e-009, timestep = 1.125e-019: trouble with d-flop instance a3
so the circuit im simulating looks as so:
and the clock/simulation parameters can be seen here:
where the voltage source parameters are as follows:
could anyone possibly give me some pointers as to why I might be receiving such errors and how it may be fixed? Thanks.
AI: You need to provide a delay for the dflop, through the parameter td. The reason is that the state at the output and at the input coincide without any delay, and (quote from the manual, LTspice > Circuit Elements > A. Special Functions):
The gates and Schmitt trigger devices supply no timestep information to the simulation engine by default. That is, they don't look when they are about to change state and make sure there's a timestep close to either side of the state change.
Which happens is that if the output changes, it must be because the input has changed state. But if the output and the input are tied directly, and there is no delay between the two states, then the solver sees a simultaneous change at the output and at the input, but that can't be since the output can only change if the input has changed.
The solver then tries to reduce the timestep to detect what happened that made both the input and the output change states seemingly at the same time. And it will continue to reduce the timestep, but because both states are reduced to one, due to the direct connection, no matter how much it reduces it, it can't separate the two states. When the timestep has become too small to reduce, it complains.
The solution is very simple: add td=1...100n, td=10n is a good enough value. Don't hesitate to add it to the other gates, too. If a delay is present, then the output will change state only after td seconds, which means the solver has time to see a change happening at both states, but separately, in a way that makes sense. And, if you think about it, in real life there is always some amount of delay, no change happens instantaneously (thank goodness for causality).
Also, there's no need to set the trise/tfall of the source to 1 millionth times smaller than the period; 100...1000 times is enough, unless your requirements are specific (which I doubt).
In addition to td, there are also other temporal parameters that can only help in the long run. Two of them, tau and tripdt are ones that I warmly recommend to anyone. For this case, tau=10n tripdt=10n would help you just fine. What these do is they force the solver to only reduce its timestep if there is a change at the output that happens in less than tripdt seconds. tau forces a 1st order RC time constant of 10 ns, so for tripdt seconds, the engine will slow down, compute the output, then return to a large timestep. This helps preserve sharp edges, but smooth enough to avoid hiccups in the derivative, while also being very fast elsewhere. |
H: How to show that it is not possible to exceed the power rating of a 1/4 watt resistor of resistance greater than 1k?
I am currently studying The Art of Electronics, third edition, by Horowitz and Hill. Exercise 1.5 says the following:
C. Power in resistors
The power dissipated by a resistor (or any other device) is \$P = IV\$. Using Ohm’s law, you can get the equivalent forms \$P = I^2 R\$ and \$P = V^2 / R\$.
Exercise 1.5. Show that it is not possible to exceed the power rating of a 1/4 watt resistor of resistance greater than 1k, no matter how you connect it, in a circuit operating from a 15 volt battery.
I don't understand how I am supposed to do this. I've gone back through the earlier pages, but I cannot tell whether I'm just misunderstanding something, or whether the authors have not introduced sufficient information to complete this exercise. Am I supposed to use \$P = IV\$, \$P = I^2 R\$, or \$P = V^2 / R\$ somehow? There's literally 2 sentences of information here, and none of it describes what is being asked in exercise 1.5.
AI: A few clues:
If \$ P = \frac {V^2} R \$ then which way will P go with increasing R?
Given that, then what is the worst case for R?
What is the worst case for V (the maximum voltage that you can apply to the resistor)?
You now have both V and R so you can calculate P. |
H: How can this circuit be best described?
Here, the green waveform is the input waveform(V1) and the blue waveform is the potential drop across Vc1 and Vc2.
To me it seems like a peak detector getting clamped, but then the first half cycle and the second half cycle messes that up. Can this circuit be described as some basic electronic circuit?
AI: The first half-cycle charges C1 so Vc1 goes positive while C2 is still uncharged.
The second half-cycle charges C2 so that Vc2 goes negative. Since Vc1 is still positive the difference between the two is doubled.
The circuit is called "a voltage doubler".
simulate this circuit – Schematic created using CircuitLab
Figure 1. A more usual way of drawing the circuit may look more familiar. |
H: What would happen if I send 220V to my ethernet port?
I found unused cables at home and I connected them:
This is obviously made as a joke, but I keep wondering what would happen if I were to actually plug both ends in my computer. Is there some safety where I would only toast my network port? Would my computer puff out in an expensive pyrotechnical display? Would the cable melt like butter in the sun? For some reason I am not keen to actually trying it out.
This is in Europe as the plug shows, and in my country the wall outlets can draw up to 16A.
AI: Ethernet ports typically have an isolation transformer inside them that have an isolation rating of a few kV.
Depending on how the cable is wired, it will either do nothing, or it will destroy one side of the transformer wiring.
Other than burning out the transformer, the rest of the computer would likely be unharmed.
The transformer is likely to be the thing that burns out first rather than the actual cable because it probably has smaller gauge wires, and they are all packed together, which is much worse from a thermal perspective. |
H: Differences between the drive algorithms for BLDC, PMSM and IPMSM
In the manual for a Scott Drive motor controller, they have a parameter you can set, called Motor Type. Its description reads
The motor type determines the method used to calculate the reference Id, Iq
currents. The four supported motor types are Brushless DC (BLDC), Permanent Magnet
Synchronous Machine (PMSM), Interior Permanent Magnet Synchronous Machine
(IPMSM), and Induction.
I understand that Induction is the odd one from the group, as its drive algorithm is completely different. However I have a hard time assimilating the difference between the rest (since they are all permanent magnet machines).
Googling around I found:
BLDC is the one with trapezoidal back-emf, meaning simplified driving (it can be an AC square-wave)
PMSM has sinusoidal back-emf, so it needs sine-shaped drive
IPMSM is only different in that the magnets are buried in the rotor (for added strength). The back-emf should be sine (right?). As such I don't get how the drive algorithm differs from PMSM.
How is the drive algorithm different between PMSM and IPMSM? Is it only minor tuning constants?
AI: A perminant magnet synchronous machine (PMSM) must be excited with an AC current for torque to be developed.
A Brush less DC (BLDC) PMSM has a backEMF profile which is trapizoidal in shape to maximise the peak torque but also to simplify the drive algorithm as they can be excited with a simple quasi square wave controller.
A Brush less AC (BLAC) machine has a sinusoidal backEMF profile and thus should be excited with a sinus current waveform
There are three types of BLAC machines
Surface Permanent Magnet (SPM). The rotor magnets are bonded to the rotor
Interior Permanent Magnet synchronous machines (IPMSM) where the magnets are mounted in slots of the rotor
Flux switching Permanent Magnet (FSPM). A cross between an SR and a IPMSM.
Fundamentally they are controlled exactly the same way. However due to the fact there is a reluctance component associated with the IPMSM, the machines requires a slight amount of phase advance to provide a balanced torque profile. The motor also benefits from reluctance torque and thus can be more efficient than a SPM as it can produce slightly higher torque for the same current. Likewise they can operate at higher velocities due to the magnets are encased by the rotor |
H: Understanding specifications with regard to current draw of components NL17SZ08, 6N137 and 74HC165 and other current-related questions
I am trying to calculate how much current some components will draw. However, it is not clear to me from the datasheets. I also have several other questions.
Firstly, the NL17SZ08 AND gate
MAXIMUM RATINGS
DC Input Diode Current -50mA
DC Output Diode Current -50mA
DC Output Source/Sink Current ±50mA
DC Supply Current per Supply Pin or Ground Pin ±100mA
Latchup Performance ±100mA
DC ELECTRICAL CHARACTERISTICS
Input Leakage Current ±1.0μA
Quiescent Supply Current 10μA
DC Supply Current sounds relevant but I don't understand the ± or the per Supply Pin or Ground Pin. 100mA seems like a lot of current for an AND gate, which I would expect to be simple and low power.
Secondly, the 6N137 optocoupler
ABSOLUTE MAXIMUM RATINGS
Average forward current 20mA
Enable input current 5mA
Surge Current 200mA
Output current 50mA
RECOMMENDED OPERATING CONDITIONS
Input current low level 250μA
Input current high level 15mA
ELECTRICAL CHARACTERISTICS
Reverse current 10μA
High level supply current 7mA
Low level supply current 7mA
High level output current 1μA
Input threshold current 5mA
High level enable current -1.6mA
Low level enable current -1.6mA
If the max average forward current is 20mA, then will the max forward current is 40mA? What is the High level supply current. That sounds reasonable for an LED + some other stuff
Lastly, the 74HC165 shift register
Absolute maximum supply current 50mA - is this only relevant if this chip was connected in series with something which draws current? When connected "normally" in parallel with some circuit, would this ever be an issue?
supply current 160 μA + additional supply current approx 2500μA = 2.7mA - is it really this low?
AI: Under normal circumstances, devices are not operated beyond rated conditiond. Under fault conditions, those may be exceeded but immediate damage is avoided if conditions are limited below absolute maximum ratings.
AND gate: consumption is 10uA. More current will flow on supply pins if the chip is driving a load or clamping voltage, and max current it tolerates is 100mA.
Optocoupler: no max current won't be 40mA. It tolerates a surge of 200mA for a short 100us period defined in the datasheet, but long term average absolute max is 20mA. Recommended rated current is max 15mA which means under normal conditions. High level supply max current means how much the supply current is consumed by the coupler at most when data output is high, not driving a load, and it has nothing to do with the LED.
Shift register: When the chip is abused under abnormal conditions again like overvoltage or shortcircuit or too much load, it does not get permanent damage if supply pin current stays below 50mA. The chip really itself consumes max 160 uA under extreme conditions, and will consume the extra current for each input that is held at indeterminate voltage level between logic high and low, which again is not valid input to the chip and should never happen. |
H: What kind of diode is this?
What kind do I replace this with?
AI: This is not a diode, but a tantalum capacitor. When powered up, there should be about 3.3 volts across it.
To build off of what I replied to one of your earlier posts, try removing the capacitor and powering the device up. Decoupling capacitors might not be required for it to function. Replace it with any moderate capacitance cap if it still doesn't work.
It might be a failed component causing a short. I've noticed that switching regulators can make a squeaking noise when they are being overloaded, causing the switching frequency to drop to audible ranges, and becoming sound through piezoelectric effects of capacitors.
Here are images from my known good Zoom H1: |
H: NiMH Battery Indefinite Charging
Can I indefinitely charge NiMH batteries through a current source that limits just below the battery voltage?
More specifically, the battery is a 400mAh 14.4V pack and the supply is 15V but after a small resistance (25 ohms DCR of an inductor), the current source pass transistor and a Schottky diode the current source will stop supplying current when the battery terminal voltage reaches ~14.2V. Meaning the current source will supply about C/11.8 (34mA) until the battery charges enough to where Vbe of the pass transistor decreases such that current settles on something that maintains some voltage (hopefully in the upper 13V range but I'm just doing LTSpice at this point).
So can I leave the battery under the above described condition indefinitely or will the slight positive pressure reduce battery life?
AI: At first, NiMH cells did not have a catalyst to recombine H2 and O2 liberated during even mild overcharging, and seals would rupture from gas pressure. Most NiMH now contain a catalyst to reunite the gases, releasing heat and water (as do catalytic lighters).
As long as the charge rate is low (less than C/40... I use C/100), a NiMH cell with catalyst can be left on maintenance charging indefinitely, so in that case, current limiting is better than voltage limiting. Current limiting also protects a battery from further damage should a cell short: a 14 V battery with one dead cell could not charge above 13 V, but would receive full current from a voltage-limited-only charger. |
H: Can ferrite beads be used on digital PWM output?
I am thinking how to reduce the EMI noise of the large LED indicators driven by tlc5947. This chip has digital outputs that limit/regulate current through light emitting diodes by switching on and off. The internal oscillator runs at about 4 MHZ and it looks like quite a powerful circuitry, 12 V, 600 mA for all assembly.
One of the ideas coming to mind is to use ferrite beads sequentially with LED diodes in the output. The concerns against are that be these inductors, they may generate the voltage spikes when current is turned off. From the other side, some sources say that ferrites do no accumulate as much energy as a coil of relay that would absolutely require a diode.
There are 24 channels per chip, and there are multiple chips, so this means lots of ferrite beads. But they are quite small and rather cheap so probably can be mounted if the bead is enough. With such amount of components, adding extra capacitors, resistors per every channel looks like no fun.
Could anybody with the knowledge say how good is the idea to put ferrite beads on the digital PWM output of the LED control chip running at 4 MHZ? I understand that the best would be to build the two prototypes and measure with near field probe (that would show the difference between the versions but not 'good enough' - 'not good enough') or at least just directly the waveform. There is a job and cost to build however. Maybe there is some generic knowledge on how good the idea is.
The goal is just to reduce the possible EMI noise. The indicators work very well, they do not even thing to flicker or the like.
P.S. Answers of the kind I should not be designing the circuit just because I am asking this question are out of scope.
AI: Big picture: good signal integrity equals less EMI, even at ‘only’ 4MHz. Those harmonics can haunt if you don’t deal with them.
So look at several things in the SI area first.
Signal rise time. The ferrites could actually help here. You could also accomplish the same thing with an RC network.
Impedance matching. Reduce signal reflections by using controlled impedance an appropriate termination strategy.
Loop area. Make sure your signals and returns are as close to each other as they can be. The smaller the loop area, the less antenna effect.
If that isn’t enough, there’s a couple more tricks in the bag to further suppress EMI.
Common-mode filtering. If your signals and returns can be routed together in the same harness, put a ferrite around all of them to suppress common-mode noise.
Shielding. Have an overall shield that does not serve as a ground return. Look at a USB or HDMI cable for example.
Lossy materials (ferrite). Convert the EMI to heat. |
H: LTspice on mac, how to specify value for a dependent voltage source?
I am completely new to LTSpice. I am trying to build this circuit in LTSpice on mac. The first problem I notice is that I can't rotate the components. I googled for a while and only found solutions to rotate components on Windows, so I bent the wires to fix this.
The real problem is that, I'm having trouble to add the dependent voltage source. As shown in the image, I need to have a 3v0 voltage source. So, 1) how to I tell the software which voltage is v0? and 2) how do I set the voltage source as 3v0?
Thank you so much in advance.
This is what I have right now, v0 is the voltage across A & B.
AI: First, I never used LTspice on Mac OS X so I can't 100% confirm, but I watched a video and the rotate command looks to be the same as it is in Windows. To rotate, either while you are first placing the component or while you are in the process of moving it with the move tool, you press CTRL-R to cycle through each of the 90° orientations.
Second, it looks like what you want here is a voltage-controlled-voltage-source (VCVS), or "E-source". The B1 in your circuit right now is a behavioral voltage source or "B-source", which is a type I would try to avoid until you get more familiar in this software. The VCVS is simply listed as "e" in the component library. It has (+) and (-) control nodes, and its value is the "gain". So for your specific circuit, we want (+) going to A, (-) going to B, and the gain set to 3.
Third, you need to put a ground symbol on your circuit before it will let you simulate it. The obvious spot to place it would be on the negative side of V1.
So, if I redraw your circuit with all the above enhancements it should look like this:
Now, when you go to run it (by clicking the little running man icon at the top) it should ask you what type of simulation you would like to do. Since this is a basic DC circuit, I would select "DC op pnt". Then, after it runs it will give you a report of all node voltages (respect to ground) and all branch currents, as shown:
I prefer closing this window and then begin exploring the circuit interactively. You can hover your mouse over a resistor to see its current and power dissipation. I'm not sure on Mac, but on Windows this shows up at the bottom bar of the application window. You can look at node voltages by clicking on nodes to bring up annotated text (blue on Windows) showing their voltages. These text labels can be left on the schematic, then if you change one of the resistor values and re-run the simulation the voltage values will auto-update themselves. Here's an example of a few nodes being monitored. I also took this screenshot while my mouse was hovering over R1 so you can see the current and wattage shown:
One last point I'd like to make is that resistors in SPICE have unique pin numbers (1 & 2) which are normally not visible to the user in "DC op pnt" mode. These will switch around as you rotate them. Basically, what this means is that if a current value shows up as positive it is flowing from 1 -> 2, and negative if it's going from 2 -> 1. If a negative current bothers you in a specific instance, you can either rotate the resistor in question twice with CTRL-R or mirror it once with CTRL-E. However, this isn't ambiguous because the voltages will "drop" across resistors in the direction of the current flow, and you should be able to see this and gather the proper context. |
H: Why does PCB copper surface oxidize when I apply flux on its surface?
I had to create a printed circuit board for a project, using the home method (PCB developer solution, iron chloride.) At first, after the PCB was etched, I cleaned it very well using paper towels and isopropyl alcohol.
The PCB looked like this:
Then, I applied a thin layer of flux, hoping the soldering process will be better and the board will be protected a little. I used a flux dispensing pen because I didn't have any other kind of flux.
Here's the flux dispenser pen type I used:
Here's how the board looked after I applied the thin layer of flux:
I let it dry over night.
The next day, when I wanted to solder the components, I noticed that the soldering material wouldn't stick to copper, so I applied some more flux. Apparently, it worked, but some minutes later, the copper surface where I applied the flux turned green, with a dirty aspect:
Can someone help me with an answer, why did this happen? I assume it's the flux, but I'm not sure why.
Will the board be affected and in the end the traces will be destroyed?
Is there a solution to clean the dirt and protect the existing board?
Later edit:
I tried to fix the damage already done by cleaning the PCB with isopropyl alcohol as well as I could, and it turned out pretty well, in my opinion. Here's a photo of the cleaned PCB:
It's been over a month and the board works well, I had no problem with the connections. The project I used the PCB for is an UV exposure box. I've put the PCB inside a plastic case, and the plastic case is inside a bigger wood case, also protected with extruded polystyrene. I hope this way the PCB will be protected from humidity. Also, the humidity in the laboratory where the PCB is located is controlled, always under 40%.
Thank you for all your help and good advice, I learned a lot from your answers.
AI: If you look at the datasheet, you'll see a few important tips:
This flux must be cleaned after you apply it, since it is corrosive, and shouldn't be used on bits that you're not soldering. The latter is true for most (all?) fluxes.
The reason that water solubility is important for this flux is so that you can clean the PCB with water, and don't have to use other chemicals to clean it.
If you don't want to have to clean the flux, you could try no-clean flux, which is less corrosive and doesn't absolutely need to be removed after soldering (although you still should remove it.) In order to remove this kind of flux, you will typically need chemicals (like isopropyl alcohol).
I'm not sure theres a way to fix the damage already done to the board, but you could try cleaning the corrosion off with alcohol and scrubbing and then protecting the board with some type of conformal coating. |
H: Can I use a single large capacitor rather than multiple small?
I'm designing a PCB to hold an array of WS2812B LEDs. The LEDs are in groups of 4, with roughly 1cm gap between them, 60 total LEDs per PCB.
As per the documentation recommends I add a 0.1uF decoupling capacitor to each LED. Which is what I've done in the attached image.
I'm wondering, as I understand it, the capacitors are there to supply current when the LEDs are turning on really fast, to prevent flickering as the power supply cannot provide the current fast enough. Is there a way I can just use a larger capacitor per group of 4, rather than 4 individual capacitors?
To save PCB space and ease of assembly.
Happy to hear any insights, recommendations or corrections if my assumptions are incorrect, thanks!
AI: Can I use a single large capacitor rather than multiple small?
Yes, you can BUT there is a very high chance that using only one supply decoupling capacitor will generate lots of issues, especially if you use only one capacitor for all 60 LEDs.
So yes you can but it is "asking for trouble" so I would strongly recommend against using only one capacitor when you have 60 LEDs.
What kind of issues?
Issues like LEDs not doing what you program then to do because the data gets corrupted. LEDs not passing the data correctly on to the next LED in the string. Any other unexpected behavior. Also, you might introduce EMI and EMC issues due to the long wires between the LEDs and the supply decoupling capacitor.
I would simply avoid this and make sure that there is at least one supply decoupling
capacitor close to every LED. Instead of having a capacitor for each LED, in my view you could get away with using one capacitor per 4 LEDs so one capacitor on each PCB. Place the capacitor in the middle between all 4 LEDs and make the traces between capacitors and LEDs as short as possible. It is also good practice to make the ground connection not as separate traces but as a ground plane. Look at how this is done on other PCBs. |
H: Which design produces least EMI?
Inspired by the idea to minimize the return path, I am thinking about the two possible improvements of the design, how to connect the signal source to consumer. In short, there are lots of high frequency lines going from the source to consumer and then sharing the return path into the ground. I have produced a separate example because my original circuit is too complex. Let's assume we need the following connectivity:
The source that is an IC chip puts the VCC voltage in pulses at high frequency into consumer. The consumer that is the LED array passes the current through into the ground. I assume, the ground should be the return path for the signals.
Seeking to minimize the length of the loop, the two ideas come to mind:
Put large copper area into the second layer that is now ground only. I have seen multiple recommendations in the literature to do so. However I am not sure about the exact shape of the "return path" of my signals. If they choose to go the shortest way right to the ground pin of the chip, this will not be the smallest area covered by the signal loop.
Provide individual ground routing for the signals in the parallel layer. In this way I hope that the return path would largely match the signal path on the opposite layer. However it cannot go all way together because they still have the different destination.
Here is the routing of the three possible designs (left - the current version, middle - ground plane, right - individual ground that still obviously must join somewhere).
Which of these designs (left, middle, right) would provide the least inference?
AI: lots of high frequency lines going from the source to consumer
Before considering EMI, think about signal integrity. For example the 0.1" headers pictured only have one GND pin which serves both as current return and reference for all signals. This means return current from each signal will create a noise voltage across the GND pin's impedance. Since GND is used as reference for the other signals, this noise voltage also influences the other signals. This is called common impedance coupling. You'll also have some capacitive and inductive coupling between signals on adjacent pins.
If your signals have high noise margin (for example CMOS logic levels) and moderate slew rate (say, arduino-level MCU) this is not very important. But faster signals will require more ground pins.
Another issue with little modules on headers is that the module stands off from the PCB, so if its ground is at a different potential from the PCB the two will act as a dipole antenna and radiate. This is especially true if the module is connected to a cable, which being physically much longer than the module will act as a much better antenna. Ideally you'd want all your cable GNDs and shields to be tied together via a low impedance (ground plane or metal chassis back plate) at the point they enter your enclosure, to avoid inducing HF potential difference between your cables.
Now back to your pcb screenshot...
Left: this has highest loop surface area for all signals and their return, so highest inductance, highest EMI, and the ground trace has much higher impedance than a plane so higher common impedance coupling between signals.
Middle: the return current will follow the path of least impedance, which means under corresponding traces at HF (lowest inductance) and straight line at low frequency. I've drawn the HF path in yellow, note it goes through the GND pin that are closest to the signal, and since there's only one the signals on the right will have extra return path length.
If the ground plane is interrupted by something (blue blob) then the current will go around it and you have a slot antenna.
The plane has very low impedance, so low common impedance coupling and low crosstalk.
On the right, the top right green traces (outlined) are useless since no current flows in them. Besides that the result would probably be between the two previous cases. A ground plane is a lot more convenient than traces though. But keep in mind the drawing on the right, and if you want to put components that make holes in your ground plane, you can put them in the black spaces.
Copper is free! Removing it costs etchant. |
H: Texas Instruments ADC - Input Clock
I have a question regarding the ADCs ADS58B19 inputclock, this ADC can be clocked with LVDS.
The data sheet says that Vpp = 700mV, which is +-350mV. The ADCs Vcm = 1.7V, is this the in and output Vcm?
Is it possible to clock the ADC with a Vpp = 700mV and Vcm = 1V?
Datasheet: https://www.ti.com/lit/ds/symlink/ads58b19.pdf?ts=1602577981307&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FADS58B19
Clock Specifications on page 3.
Thanks
AI: The ADCs Vcm = 1.7V, is this the in and output Vcm?
Vcm is an output voltage and can be used to bias the clock inputs if only a single ended clock is used (see figure 64 below). The clock signal is then fed via a capacitor. For full differential clocks you don't need to bias (figure 65): -
Is it possible to clock the ADC with a Vpp = 700mV and Vcm = 1V?
I don't believe that would work. |
H: How to reduce RFID interference
I am using a MFRC522 RFID reader I have read that it's antenna when in close proximity with metals then interference could be generated. What should be the distance between the antenna and the metal to minimize the interference
reference link first paragraph of this link another link I am also sharing the screenshot of the same
AI: I am using a MFRC522 RFID reader I have read that it's antenna when in
close proximity with metals then interference could be generated.
When the coil is close to a conducting surface (i.e. a metal part) eddy currents are induced in the metal and the coil's magnetic field overall becomes reduced. This is because the eddy currents act like mini-shorted-turns and the overall inductance of the coil reduces which can lead to significant detuning effects and loss of sensitivity. In addition, the eddy currents can also generate heat and that means that the magnetic field you are trying to generate becomes depleted (less effective).
What should be the distance between the antenna and the metal to
minimize the interference
Difficult to say because it's a 3D problem that is best solved using a proper 3D tool. However, you can buy flexible ferrite sheet that masks the effect of close by conducting metals and restores the magnetic field to the right level. In other words, for a given coil placed close to some metal parts you should experiment a bit. You can also use the ferrite sheet to enhance the field that your tag receives. |
H: Two electrolytic filtering capacitors near or far away from each other?
I have a PCB where I placed a 100uF capacitor near the power supply connector, for power filtering. This capacitor is too big so in my next design I want to use two 22uF capacitors.
My question is: should I place them near each other and near the power connector, or place one of them near the power connector and the other one on the oposite side of the PCB, for uniform voltage stabilization?
The PBC is 80mm x 50mm and the power supply connector is near the 50mm left edge.
EDIT: this circuit is a 24V to 3.3V signal converter only using resistors and transistors, no uControllers or ICs. The signals are square waves with max 50Hz.
AI: should I place them near each other and near the power connector, or
place one of them near the power connector and the other one on the
oposite side of the PCB, for uniform voltage stabilization?
Place them where most needed with a view to minimizing circuit-current-loops carrying ripple current or noise current. The ripple/noise might be from the incoming supply or it might be caused by your circuit.
If both phenomena are present then you might wish to apply 100 nF capacitors local to chips or circuits that could generate high frequency noise/ripple and, place the electrolytics close to the incoming supply if there is significant ripple voltage that needs reducing. |
H: How to generate 5 MHz clock with 50% duty cycle?
How to generate a 5 MHz clock with 50 percent duty cycle? I have an application that requires a continuous clock signal to operate. 555 timer is an easy option but it generates only up to 1 MHz frequency. I know that there are various crystal oscillators available but not sure how to connect.
The application is for a printer. The data is loaded into the printer ICs clock signal is high and with a constant frequency of 5MHz.
I need to design a clock generator to load this data into the ICs. The interface connector has 2 input pins, one for data and the other is for clock signal.
AI: A clock oscillator module requires no more than power connections with a bypass capacitor to produce a square wave output at approximately 50% duty cycle (for example, 45-55% guaranteed). You just need to pick one that is suitable for your desired frequency, supply voltage, output type and accuracy/stability. There may be an enable input that needs to be tied to an appropriate logic level.
If that is insufficiently close to 50% duty cycle, you can procure an oscillator that operates at double your desired frequency (10MHz in this case) and divide the output with a flip-flop, such as 74HC74.
For example, the ECS-5032MV-100 which is a 10MHz oscillator which operates from 1.6 to 3.6V Vdd, plus a 74ALVC74. |
H: How to choose and wire a Variable Frequency Drive
I have a 1.5 HP 3PH 240V Leeson motor that I want to drive my lathe, but I want to vary the speed. I asked a question on this site about a month ago about how to do that and the recommendation was a variable frequency drive. I'd ideally like to buy a used VFD on ebay to save me some cost and wire it myself. A few questions about what VFD to choose:
I only have 110V available, but this motor is 208-230V input. When I asked on this site before, I discovered that some VFDs take 110V 1ph in and double it in the output. I'm thinking that any 110V 1PH input, 3ph 220V output is going to work for me, but confirming.
Do I need a VFD that is rated exactly 1.5 HP (same as my motor) or would something rated for more (2HP or 3HP) work?
Any other considerations I should be looking for in a VFD?
When I wire it, would a heavy duty extension cord work for the input or should I get something else? What kind of wire would I want between the VFD and the motor?
AI: I'd ideally like to buy a used VFD on ebay to save me some cost and wire it myself.
That is rather risky. I have see VFDs on eBay that I would have recommended to the owner that they pay someone to dispose of it if necessary. It was a model that I once marketed, but so far obsolete and ultimately problematic that it was not something that anyone should buy.
I'm thinking that any 110V 1PH input, 3ph 220V output is going to work for me, but confirming.
I agree with the advise given previously.
Do I need a VFD that is rated exactly 1.5 HP (same as my motor) or would something rated for more (2HP or 3HP) work?
You can use a 2 Hp and probably a 3 Hp model. I strongly advise you to buy only a model for which that you can download and read the manual prior to purchase. VFDs generally have adjustments to match the VFD to the motor. Find those adjustments and review the range of adjustment. That will confirm what size motor it is suited for.
Any other considerations I should be looking for in a VFD?
As mentioned above, get the manual first. Check the quality of the manual and see if it answers any questions about installing and operating it. If there is a readily available, good quality manual, that is at least some indication of a decent product. For industrial use, I would recommend you determine if the brand is sold by a local dealer. For a hobby use, a less expensive brand will probably be ok. You might check hobby forums for brand recommendations.
When I wire it, would a heavy duty extension cord work for the input or should I get something else? What kind of wire would I want between the VFD and the motor?
A heavy duty extension cord is fine for the input. For the output, you need three current-carrying conductors and a ground. You can get that as a flexible cord, but it may be a bit hard to find. I bought some recently from Amazon and will find the description and add it later. It would be best to put the VFD near the motor. It will be difficult to find a plug and receptacle for that voltage at low current, so consider wiring directly to the motor without a plug.
I bought a short length of 18/4 wire on eBay, not Amazon. The picture below shows what you need in 16/4, but you only need 18. For mechanical durability, and reliable connection to the VFD terminals, I wouldn't use anything smaller than 18 even though smaller would be ok for the current. Because of vibration, I wouldn't use solid wire, but you could wire to a box near the motor with solid wire and put something flexible from the box to the motor.
The voltage doubler VFDs are available only in quite low power ratings. You might not find one for 1.5 Hp. You could probably use a 1 Hp model and limit use of the motor to 1 Hp by VFD adjustments. If you do that, it is possible that higher than expected no-load current could be problematic.
Regarding Input Current
The VFD 120 V input current is likely to be more than 20 amps for a fully loaded 1.5 Hp motor. You can not determine that from the motor current because the VFD compensates for the motor power factor. The WEG VFD that I looked at has 97% efficiency, but it creates its own low power factor by causing harmonic distortion. |
H: Simple and compact Over-Voltage protection with fuse and resistor
I know there are many techniques to protect over-voltage on the power supply. However, it does not apply to my case as it only provides single polarity voltage protection. Additionally, I want to achieve that with as little amount of components with small size as possible. In the other words, I want to design hardware to protect against a kind of harmful device called USB killer in a compact size with a little cost.
The schematic is shown below to demonstrate my idea:
simulate this circuit – Schematic created using CircuitLab
Here HOST is known to provide constant 5V. Device may charge via the 5V power line and discharge to provide a short high voltage pulse: V_u (aka Unknown Voltage) could be 110V or -110V or higher. This is to protect HOST against the high voltage from Device.
Let's assume that HOST can tolerate the maximum voltage from -5V to 15V for a short period of time. I use 1 Ohm resistor to get the current and protect the circuit from the over-current with a 10A fuse.
Will this circuit protect against such a device? How effective is this protection?
AI: Will this circuit protect against such a device? How effective is this protection?
Not at all.
The fuse will blow slower than the traces.
Why would anyone decide to try to blow the power rail (which is definitely easier to protect) instead of the data lines
a fuse blows when a critical current already flows. You can't really have that.
You're not even attempting to fuse the shield
This is a vain attempt – if your attacker has arbitrary much energy at their disposal, there's simply nothing you can do. Think about what happens when someone takes a high-powered electric arc welder to your computer. Will your fuse help? Modern batteries contain huge amounts of energy.
Honestly, what are you even protecting against. As 90% of bad computer security things, this was consideration done without proper threat modelling. If someone wants to incapitate your USB host device, a hammer, a drill, a sharp screwdriver, chewing gum, half a glass of water, a stone, urine will work too, unless you fully encapsulate your device and make the USB plug unavailable. If the USB plug is "optional" functionality, without which you want your system to still function, then don't make it available to begin with. |
H: How to add a MCU signal to turn off this push button mosfet-based latching circuit?
I’m using this circuit to turn on and off an Attiny85 and a led driver with the push of a micro switch.
My circuit is powered by 7.4V battery.
In the “load” part of the circuit there’s a voltage regulator to 5V and then the Attiny.
And also a led driver that get’s powered directly from the 7.4V, without going through the voltage regulator.
It works pretty well, but I’d like to be able to, when the batt is at a low state, to use an output pin of the attiny to turn off the whole circuit.
I already have a voltage divider circuit and code to check the batt levels, but I don’t know how to interface an output of the Attiny with this circuit.
What should I change in this circuit (if possible) to be able to, besides using the micro switch to turn on and off, also to be able to turn off it entirely by a signal from the Attiny?
Thanks!
AI: I would use a bipolar transistor with its collector to the right terminal of the on/off switch.
Emitter to ground. And a resistor to the base that is driven by an output from your MCU.
Set the signal high to turn power off.
Ensure that the transistor does not get turned on during the power-up and initialization of the MCU. |
H: Mechanical Relay "Must Operate/Release Voltage" - Confusion Around Terminology
I have a relay and am confused by its operation.
It is a Potter & Brumfield Relay, model R50-E2-X1-24V
Datasheet: https://www.westfloridacomponents.com/mm5/graphics/ds4/SeriesR50.pdf
My confusion stems from the "Must operate voltage" & "Must release voltage" parameters on the data sheet.
The relay in question has a nominal coil voltage of 24VDC.
The datasheet states this:
Operate Data @ 25°C
Must Operate Voltage: 75% of nominal voltage or less.
Must Release Voltage: 5% of nominal voltage or more.
Based on my interpretation of that block, at 25C, bearing in mind that my relay coil's nominal voltage is 24VDC:
(This does not make sense to me)
the coil will operate at 18DVC or less
the coil will release at 1.2VDC or more
I have been doing some testing with my DC bench power supply, my environment is around 26C.
I am finding that the coil will switch/operate at just below 16VDC, emitting a "small" click noise. (This seems to partially correlate with the "Must Operate Voltage" parameter, 75% of nominal or less 24VDC)
When I turn it up to just above 19VDC, there is a louder click - but nothing appears to change WRT to the coil state, nor resistance of the pole->NO pins (the pole->NC pins as well).
When I have triggered the relay, I have found that the coil will release when I decrease the voltage down to 9VDC; and it will stay released until I bring the input voltage back to above 16VDC.
To me, this does not seem to directly correlate to the "Must Release Voltage" parameter (5% of nominal or more)
My questions/confusion can be summed up in a few points:
What is the significance of the "or [less|more]" in the Operate Data parameters?
For the release voltage, 5% of 24VDC is 1.2VDC, my relay will release consistently at 9VDC. How many grains of salt am I supposed to take with the "5% of nominal voltage or more"?
Based on number 2, "5% or more" would mean, to me, that the coil could release anywhere below 75% (Must operate voltage) - is this a correct interpretation?
For the operate voltage, it says 75% of 24VDC - that is 18VDC, if I am to take the "75% of nominal or less" at face value - the "more|less" seems to be inverted to me. Should I expect it to switch anywhere between 75% or higher? (IE, 18VDC-24VDC) Or should I interpret that as switching anywhere between 5% and 75%+?
Last piece... This may be me misinterpreting the data sheet, but I would like to validate my thinking and verify if I am reading this sheet correctly or not.
I am relatively new to the electronics world, and am picking up knowledge as I go. I've just picked up "The Art of Electronics" by Horowitz & Hill, to try to understand more about this all, but please excuse me if I've misused any terms here.
AI: The numbers are intended to guarantee the operation or non-operation of the relay over variation from unit-to-unit (but not coil temperature). They are intended to guide you in your design, to apply suitable voltages so that their relay will operate reliably.
You can gamble if you like. The manufacturer's guarantee is 1.2VDC at 25°C. At lower temperatures it will not be that high. In practice there is little reason to partially power a coil when it should be off, modern transistors leak negligible current, even at high temperature. Contacts can also get a bit sticky as they wear, so a marginal design can fail in the field, causing immense grief.
You can interpret it that way, however in practice there is a hysteresis between operate and release, as you have observed. They do not specify a "must not operate" voltage, only a "must release" voltage.
You must provide it with at least 18VDC if you want to operate reliably, with the coil temperature 25°C. At higher ambient temperatures you will need more voltage for the same safety margin. That includes self-heating of the coil. At 100°C coil temperature (ambient might be 70°C) you would need to give it about 23.5VDC for the same safety margin, because relays are current-operated and copper has a temperature coefficient of resistivity of about +0.4%/K.
Even if you are sure it will never be operated in a warm environment, it's unwise to operate at the lower end of the range because that sickly "click" you hear means that the contacts are not closing smartly, and unnecessary wear will likely take place. Similarly, the life specs are generally given with no flyback diode and will be degraded by the presence of a simple flyback diode. |
H: How can an electric motor car have a turbo?
I am not familiar with all the different vehicles on the road nowdays but I have read descriptions of electric vehicles. i.e ( EV) that are turbo powered.
How can an EV be "tubo" when turbo refers to increased pressure? The concept of pressure has no meaning for EV. Perhaps the question is off topic and not condidered a question about electricity.
AI: Definitely just marketing jargon to mean "powerful". Sort of like how Tesla calls its high-power charging stations "superchargers".
As you said, it's definitely nothing to do with a turbocharger on an internal combustion engine. There's no similar concept for electric motors. Simply higher current in --> higher torque out. |
H: A 810nm led has a 350mW/sr rating. How do you convert to mW/cm2?
This led:
https://www.digikey.com/en/products/detail/vishay-semiconductor-opto-division/VSMY98145DS/7041914
Has a 350mW/sr rating.
How do I convert this to irradiance in mW/cm2?
Can you achieve a lower irradiance by lessening the input amperage or voltage?
AI: 350 mW/sr means \$(4\pi)(350\ {\rm mW})\$ into the complete sphere around the source (if the source were to be emitting equally in all directions, which of course it isn't).
So at a distance \$r\$ from the source, the peak irradiance is \$\frac{(4\pi)350\ {\rm mW}}{(4\pi)r^2}=\frac{350\ {\rm mW}}{r^2}\$.
As shown in figure 4 of the datasheet, you can indeed reduce the output irradiance by reducing the drive current: |
H: How do I give several classes access to the single RTC on my MCU
I'm writing my first large-ish C++ embedded program on a STM32F413. I've become a reasonably firm believer in object oriented coding but am not particularly knowledgeable. The STM32F413 has one RTC but almost all my classes need to time stamp events. I have a class for each of my sensors like GPS, pressure, pH, humidity and so on. Every time a new piece of data comes in from any sensor, it needs to get time stamped. I'd like to write a RTC class and give many other classes access to the RTC date and time through a single public "getDateTime" method. The only way I know how to do this is with a singleton. Is there a better way?
Thanks in advance
AI: If you decide to use a class paradigm, then your choice is really between having a member (or instance) function of a singleton, vs. having a static (or class) method.
If you feel it makes sense to simply read the RTC hardware each time, and you don't need to track any useful RTC related state in software, then you can simply go with simplicity of a static or class method. Call it from anywhere, it grabs some kind of hardware lock (probably buried in a C-language HAL library), reads the hardware, releases the lock, and returns the value.
But maybe you conclude you do need to track state in an object instance. Or maybe you'd like that mutex to be owned by an instance - in this case, you can legitimately say "hey, there's a single instance of the RTC hardware, there should be a single instance of the class as well" and go with a singleton pattern.
Of course there's a third choice, too... you don't have to use an OOP paradigm for the RTC. Either in C++, or by calling an extern "C" method defined in a C source file it's perfectly legitimate to just have code which interacts with the hardware - if you use a vendor HAL, you're likely to end up with that under the covers, even if you put an OOP wrapper on top.
I believe you'll find that on larger systems, system time is usually either something that breaks the OOP model, or else in a language that is fundamentally object oriented, it tends to be a static or class method. I can't off the top of my head recall a singleton case; though there are examples of IPC based system services (in Android for example) where you access certain resources by first getting a unique instance of a class to do the local end of the IPC. |
H: LC power filter, big L or big C?
I was reading a datasheet for a Murata DC-DC converter Murata DC-DC converter. It has the following LC filter recommendation to reduce output ripple:
As the output voltage of the DC-DC converter goes up, the recommended L value goes goes up and the C value goes down so that the cutoff frequency stays roughly the same at 20kHz.
Why would C be traded for L as the voltage output increases as opposed to keeping the L and C values the same for all voltage outputs (since they all provide the same cutoff frequency)?
AI: All the different output voltage versions of this converter series have the same power, therefore output voltage is inversely proportional to current.
Ceramic capacitors of a given value become more expensive at higher voltage, but inductors of a given value become less expensive at lower current. So it makes sense to decrease C and increase L with increasing voltage.
Higher inductance increases converter output impedance, but the higher voltage versions have lower output current, which compensates this.
Also, capacitance at the output is mostly what existing decoupling caps you'll have on your load, plus one cap right at the output of the LC filter to provide a short low inductance path to ground for HF noise. And higher current load tends to imply higher decoupling capacitance.
So the datasheet tells you, since you probably have that much decoupling capacitance on your load already, you can pick this inductor value. |
H: Hole to trace clearance determination
I am using M3 screws on a PCB, I need to know the considerations needed to specify the minimum clearance between screw hole and traces.
AI: DIN 7985 Phillips pan-head screws have a head diameter of 6.0mm maximum. It will be different if you use a socket-head cap screw or other shape of head, of course.
Standard fit hole size is 3.3mm, so you need to allow for 3.15mm (3mm radius + (3.3-3)/2) off the nominal center of the hole. If you use a larger hole (eg. 3.6mm) you'll need to allow more like 3.3mm.
Add the clearance you need for the voltages etc., probably no less than 0.5mm, so more like 4mm radius.
Also you should keep fragile components away from the mounting hole in case the assembly person slips with the screwdriver. |
H: Is it safe to leave a capacitor between the + and - wires of a circuit, while the rest of the circuit is turned off?
Please bear with me, I am new to electronics so my question may be stupid, but I want to make sure that the system is safe and won't catch fire.
I am trying to use an A4988 driver to power a stepper motor. The system is currently working pretty well, the stepper motor is rotating when I tell it to, but I have a safety concern over the use of a capacitor in the circuit.
This is the A4988 driver https://www.amazon.co.uk/gp/product/B0793K9KF8/ref=ppx_yo_dt_b_search_asin_title?ie=UTF8&psc=1
I've been following tutorials such as this one https://www.makerguides.com/a4988-stepper-motor-driver-arduino-tutorial/ and they all mentioned the capacitor between VMOT and GND.
Here's a diagram
The DC source in this picture is regular 12V adapter plugged into a wall socket.
The stepper motor and the A4988 driver are rarely used in the project and I am hoping to completely turn them off when I am not using them.
My questions are:
If I am not using the motor, is it safe to have the capacitor there while electricity still flows through the wires? Won't it create a short circuit?
When I am not using the motor, won't the capacitor draw power from the adapter? I'd like to minimize power consumption as much as possible. Especially since the motor will only be used 2-4 times a day tops. The answer provided here Is it acceptable to leave a capacitor across batteries even when turned off? makes me think that the capacitor will draw a little bit of power. I would like to eliminate this completely, if possible.
Should I just add a relay to this to cut the flow of electricity completely when I don't need it? If so, does it matter if I put it before the VMOT and the capacitor(point A in the diagram), or after the capacitor and the GND of the A4988 (point B in the diagram)?
AI: Caps are not short-circuits once charged to the DC level of the circuit. It is safe though but caps can have an operational lifetime though it probably doesn't matter here.
Yes, due to leakage always decreasing the cap voltage requiring it to charge up again. It is a small amount though.
Yes because batteries. A factory would probably not go to this trouble though.
A or B technically don't matter in most cases but A is best since B is being used as the reference. It matters more for high voltage when everything is earthed to B so disconnecting B would make everything float and be unsafe. |
H: Long distance required between photodetector and TIA
I have a circuit that incorporates a 40 channel InGaAs (IR) photodetector array (https://www.hamamatsu.com/eu/en/product/type/G8909-01/index.html). I have a TIA design using a LTC6268-10 first stage. However, because I require 40 of these, it is impossible to position all of the op-amps close to the photodetector.
The application potentially delivers quite low light input to the photodetector; I'm estimating ~1uA of photocurrent minimum. Fortunately, InGaAs photodiodes are less noisy than Si, but I'm concerned about noise pick-up on the traces from the wire-bond pads to the amplifier inputs.
As the Photodiode array is common-cathode, I can't connect the anode and cathode across the input terminals of the op-amps, which I believe would aid in reducing common-mode noise.
I'm wondering if I can lay the PCB traces to provide a coax-cable like performance, but I'm not sure how to go about achieving this.
Can anybody suggest some 'expert tips & tricks' that may help to retain my SNR?
AI: 1 - Noise pickup on the leads is not what you need to worry about. If nothing else, you can put your detector in a shielded enclosure, with filtered power in and a hole just large enough for the IR to illuminate the array.
2 - What you do need to worry about is (as Kevin White commented) the effects of those long traces on the input capacitance of the op amp. Unless you properly compensate with a capacitor across the feedback resistor of your TIA, the circuit will oscillate. Fortunately, your frequency requirements (<100 kHz) are fairly modest, and I'd guess you should be able to get a decent signal amplitude.
3 - You may need to go to a multi-stage amplifier chain, with the maximum gain of the TIA (set by the feedback resistor) being limited by the feedback capacitor. Subsequent amplifiers will degrade the SNR of the signal slightly, but that's unavoidable.
4 - 40 LTC6268s in close proximity is, frankly, a disaster waiting to happen unless you are very careful about ground paths and power decoupling. Whenever you have multiple high-frequency op amps you need to take care that a signal on one does not affect a neighbor due to coupling through the power supply lines. And, at 100 MHz open-loop bandwidth, the LTC 6268 is a good example of a high-frequency op amp. You might be well-advised to go with an op amp with a lower bandwidth, such as 10 MHz.
5 - Given the fact that your photodiode array has a reverse bias limit of 6 volts, the example TIA shown on page 1 of the 6282 data sheet is an excellent place to start, keeping in mind the need for an overt feedback cap. 1 uA / 20k will give a signal of 20 mV, and you may (or may not) be able to get away with a larger feedback resistor. You can then boost the signal with a subsequent op amp. Since your bandwidth isn't too great, you should be able to provide enough gain without too much extra noise being introduced. |
H: Gain with load or gain without load?
There is a problem I have been dealing with for hours.
In my Electronic 1 lecture, small signal analysis was like this:
The small signal equivalent of this circuit in my lecture notes was this:
When they calculate the no load voltage gain Av they do not remove the Rc. To me, Rc is the load but they do not accept.
In this semester in Electronic 2 lecture, the topic is feedback of amplifier circuit and this time they accept Rc is load (effective load this time) and when they calculate the no load open-loop gain they remove the Rc.
Why? Which one is correct?
(I am sorry for my bad english)
AI: according to me Rc is load
Rc is not normally considered part of the load, but part of the amplifier circuit itself. The load is whatever is connected on the other side of the output coupling capacitor C2.
It's possible to design a common emitter amplifier where Rc is absent and the load provides the collector bias current, but that isn't what was done here. |
H: MCP6001 op-amp unable to drive LED when configured as inverting buffer?
I built this circuit on breadboard and came across a problem:
I'm using the MCP6001 op-amp with a single supply, configured as an inverting buffer. That's why I connected the non-inverting input to a virtual ground made between R3 and R4. The pot R5 is used to change the input voltage. The LED should get brighter as the input voltage goes down.
It does work in principle, but the LED is less bright than when I connect it to 5V directly. When measuring the voltage at out, it is 0V when the input from R5 is high (5V). But when it's low (0V), the voltage at out will be something like 3.2V. When I disconnect the LED, removing the load from the op-amp output, all is fine and an input of 0V will result in a 5V output.
Does this mean the MCP6001 is unable to properly drive a single LED? I read the datasheet but wasn't able to make sense in such a way that I could determine the maximum output current in my configuration.
simulate this circuit – Schematic created using CircuitLab
AI: The typical output behavior is clearly shown on the datasheet:
If you keep the output current to < 10mA you'll typically see less than 400mV drop (sourcing, the way you have it) or about 350mV (sinking). |
H: How should microphone impedance relate to input impedance?
I have:
a Boya BY-MM1 microphone which has a nominal impedance of 300 ohms
a Steinberg UR-12 with a balanced microphone input that has a nominal impedance of 4 kOhm
I connect the microphone to the audio interface (via a 3.5mm cable and a 3.5mm->XLR adapter, if that's important) and I hear no sound. Another microphone, which is instrumental and for which I don't know the exact impedance or model, works perfectly (it is connected via an XLR cable, if that's important.)
I am suspecting that the impedance ratio is too off. Am I right or have I missed something else? If I'm right, what should the ratio be? I've read it should be about 10, but it doesn't seem like the case here.
AI: The microphone has an electret capsule and needs supply voltage (sometimes called bias voltage) of about 2 to 5 volts to work.
Actual microphone inputs on equipment such as mobile phones, PCs, cameras and audio recorders can provide this bias voltage, and sometimes 3.5mm line inputs can be configured to provide mic bias, but XLR ports on equipment like the audio interface simply do not provide mic bias.
XLR inputs can only usually provide phantom power voltage, which is typically 48V, and it is used for powering condenser mics so it is not compatible with electret mics. The phantom power is not needed by dynamic coil mics.
If the XLR to 3.5mm adapter is an ordinary adapter made for simply connecting a line level audio to XLR input, it will not work with the microphone which needs biasing.
A special XLR to 3.5mm adaptor is needed, which contains circuitry to convert the 48V phantom power down to few volts to be suitable for electret mic biasing. And the phantom power must be turned on for the XLR port. |
H: CR2032 replacement
I'm looking for a part that can be placed into CR2032 housing (instead of the CR2032 battery) and gets the power to the pins (through some external wires/connector).
In other words, I would like to power the device, which is powered by 3V coin cell battery, with AC/DC 110/220V->3V adapter, without the need to solder wires to internal device pins.
Is there such thing?
Update: Thank you for pointing in comments that it is a 3V battery (not 1.5V as I initially put it in the question).
AI: Search for CR2032 dummy battery or CR2032 battery eliminator.
Some have glued a couple cheap-ish custom ENIG PCBs together to make up the 3.2mm thickness. |
H: Multiple nearby ICs require capacitor on power supply, do I need them all?
I am designing a circuit that has a voltage regulator supplying several ICs. The voltage regulator, sensor, and communication module all recommend capacitors from VDD to Ground (1µF, 100nF and 100nF respectively).
My understanding is that these capacitors will all be in parallel. If these devices are all within a few mm of each other, can I roll all the capacitors into one (1.2µF) capacitor from VDD to ground?
AI: For a low-frequency system like you’re working on, the value of the bypass cap is less important. Generally, for non-critical designs some bulk cap at the power supply entry combined with 0.1uF caps at the device pins is enough. The bulk provides input noise rejection for ripple, while the per-pin bypass shunts switching noise locally at the IC. Different tools for different jobs.
Rules of thumb for high-frequency pin bypass:
If you don't know what you're doing, just stick with one value for the pins (0.1uF.)
If you know a little, and you have a higher-performance design, use > 10x decades to avoid anti-resonance (1uF, 0.1uF, 1000pF for example)
Always place the smaller values closest to the pin to minimize inductance and loop area.
Sensitive analog pins can also benefit from a series ferrite.
Bypass Design Resources
I have a few free go-tos that I've found useful for designing power network bypassing.
Here’s a Murata guide to noise suppression that is pretty comprehensive. https://www.murata.com/~/media/webrenewal/support/library/catalog/products/emc/emifil/c39e.ashx It covers caps, ferrites and other suppression types.
Murata's SimSurfing is very useful for showing passives parameters. Try it here: https://ds.murata.co.jp/simsurfing/index.html?lcid=en-us. They don't have a mode that shows combined responses however.
The Kemet KSIM tool does let you try out mixed values. It was pretty buggy, but it's been overhauled recently. Try it here: https://ksim3.kemet.com/capacitor-simulation |
H: Understanding why not to use a resistor for multiple LEDs
I'm researching into using one resistor to control a 7 segment display. Not because I want to do so (could save some time), but just to understand concepts.
Some say that slight differences between each LED can cause very unequal lighting, which make sense, but at the same time they say that this could cause damage.
I don't understand this: On an LED Voltage-Current graph, does the LED "pull" a certain current like it has resistance?
If I have 2 LEDs in a parallel circuit, both parallels have to drop 2V, but one LED is 2V at 5mA, and the other is 2V at 10mA, this does NOT make sense to me. I have a resistor before the circuit, lets say from an Arduino 5V, that drops 3V (to give 2V to the LEDs) at 15mA, so 200 Ohms. This is what I dont understand: Wouldn't the current be shared between the two, giving 7.5mA to each? What is the usage of the 'voltage versus current' graph? My guess is to show what equal lighting takes.
Hopefully someone could explain where my understanding went wrong, am I not factoring in LED resistance, or do they follow strange rules?
AI: I don't understand this: On an LED Voltage-Current graph, does the LED "pull" a certain current like it has resistance?
Yes, to understand intuitively this phenomenon known as "current steering", you can think of the LED of as a resistor... but having nonlinear resistance with the property to keep up the voltage across it constant. It is interesting to see how it does this "magic". Here is a simple but very intuitive explanation.
If the LED was an ordinary (ohmic) resistor, the voltage across it would be V = I.R. But it behaves as a "dynamic" resistor that decreases its resistance R when the current I increases and v.v. so their product - the voltage V, does not change.
When you connect two such voltage stabilizing elements in parallel, they form a dynamic current divider. Each of them tries to set its voltage across this network... and if there is at least a small difference between their voltage thresholds, they vigorously change their resistances to divert the current ("to 'pull' a certain current").
The advantage of this simple explanation is that you can emulate this arrangement by two variable resistors (rheostats) in parallel.
EDIT - answering the OP's questions in the comments below
Not because I want to do so (could save some time), but just to understand concepts.
Exactly... all we need to understand concepts... "to see the forest for the trees". In this way, we can make a connection between seemingly different circuit phenomena.
Do you think you could explain another situation? If I had 5V with a 300 ohm resistor, and after it split into parallel, each side had an LED. One's datasheet showed 1.9V at 12mA, the other 1.9V at 30mA (a large difference). This seems like it would "pull" 42mA, but the resistor would only allow 10.3 mA to come through.
First of all, we have to create a notion about the non-linear resistance. Most people do not feel a need for this; they simply accept that it is what its IV curve represents... they take it for granted. But we are both different from them and we need an even deeper explanation. We want to know not only that the curve is such (nonlinear) but also to somehow imagine how such a shape is obtained in principle.
1. Presenting the red LED1 as a "dynamic resistor". The most natural and intuitive way to answer this question is to imagine LED as a varying resistor (rheostat) that changes its own resistance. This is illustrated by the graphical interpretation in Fig. 1 where the supply voltage varies in the range 0 - 5 V. The resistor R can be considered as internal resistance of this real source. As its voltage increases, its IV curve moves (translates) to the right. At the same time, the IV curve of the static resistance R1 of the nonlinear "resistor" (LED1) does not stay immovable but rotates counterclockwise. As a result, the intersection (operating) point OP1 moves upwards along and pictures the LED1 nonlinear characteristic. So, the idea is to dynamically change the current resistance of the element.
Fig. 1. LEDs as dynamic resistors (graphical representation: top - red LED1; bottom - green LED2
2. Presenting the green LED2 as a "dynamic resistor".
In a similar way, we can explain how the non-linear IV curve of the second "resistor" (the green LED2) is obtained. The only difference is that it is more sloping.
Could it be that both of the LED's I could count as resistance, then solving for the exact current per LED?
Exactly... This is what I will show with the following drawing...
3. Presenting the two LEDs in parallel by an equivalent "dynamic resistor". I fully accept your idea to replace the combination of two nonlinear resistors (red and green LEDs) in parallel with only one "dynamic resistor" (represented by a blue IV curve).
Fig. 2. LEDs in parallel as equivalent resistor: top - nominal R (74 ohm); bottom - higher R (300 ohm)
If we supply the LED network through a resistor R with a nominal value of 74 ohm (3.1V/42 mA) - the upper Fig. 2a, everything will be fine and will correspond to the datasheet. But if you supply it through R = 300 ohm - the lower Fig. 2b, the IV curve of the real voltage source (aka "load line"), will tilt significantly... and both voltage and common current will decrease.
Is there some resistance that I am not thinking about?
No, there are no other resistance; only the LEDs have increased their static resistances. |
H: Why is an inductive load not desirable for a GTO circuit?
I was wondering why is an inductive load not good for a GTO circuit from a power electronics perspective.
AI: The GTO is a controlable switch .Like a scr it is turned on by positive signal on the gate .Unlike the scr it can be turned off with negative volts applied to the gate .This makes the device more useful.But if you turn the device off when significant current is flowing energy stored in circuit inductance can cause a nasty voltage spike destroying the device .The same would happen with a BJT,IGBT or Mosfet.This means that you should take the normal precautions like Snubbing ,clamping etc to ensure reliability. |
H: Calculate current in circuit with a current and voltage source
I need to calculate the current of Is, I'm stuck after getting the voltage across the 4k ohm resistor which is 16V.
AI: You're on the right track. Keep calculating the voltage across and current through each element working your way "across" the circuit from right to left.
If the voltage across the 4k resistor is 16V what is the voltage across the 2k resistor? What is the current through the 2k resistor? What is the current through the 1k resistor and so forth... |
H: What kind of tape is used to hold together electronics during shipping?
Not so fast! This isn't that kind of tape (Kapton).
By holding electronics together, I mean to hold mechanical parts together for shipping such as flaps and other parts that can flop such as printers and scanners.
It's a very thick material that holds firm but always comes off easily. I've seen it in a variety of colors such as green, red, but most often in blue.
What kind of tape is this?
AI: Probably clean-release/clean-removal strapping tape. Polypropylene with a rubber adhesive.
Eg. 3M 8896 |
H: 24 V transistor switch acting strangely
I am working on a project to switch a spring-applied brake (datasheet, page 84, MCNB 2GR) using a Teensy 3.5.
I only have limited electronics knowledge and am struggling with weird behaviour from the transistor. I have previously asked for some help in this post and have applied the help to create the following circuit:
As opposed to my previous question, I have switched to using a Teensy 3.5 which only supplies 3.3 V as an output on the digital pins.
The idea is to use a Sharp PC817 (datasheet) to isolate the Teensy and the 24 V circuit and then use a 2N3904 (datasheet) to turn on off the 24 V for the brake which is symbolised as R1.
The strange behaviour starts after a few seconds of sending a 3.3 V signal to the opto-isolator. At first the circuit works as expected and the brake turns on and off based on the current state of the output pin. However after some time (probably about 5-10 seconds), the brake doesn't turn off anymore (i.e., it still receives enough power to be in its on-state) when the output pin is turned off. The only way to turn it off is to turn off the 24 V DC power supply.
After some investigation, I found that the transistor gets extremely hot, hot enough to cause burn marks when touching it for less than a second. Considering that the circuit works normally after a little while, I think this issue is transistor related and has some relation to its temperature. I have also taken voltage readings on the transistor and have found the following:
When turned off: E: 0 V, B: 0 V, C: 23.96 V
When just turned on: E: 0.125 V, B: 0.84 V, C: 5.76 V
When turned off after being on 5-10 sec: E: 0.075 V, B: 0.493 V, C: 8.6 V
It seems to me as if the transistor does not completely turn off and still letting enough voltage/current through to keep the electromagnet in the brake engaged.
I am not entirely sure if the temperature is the problem. I am guessing that I may have either chosen the wrong resistance values in my circuit or that maybe the transistor is no good for what I want to do.
Is there a way to fix this without changing the transistor?
AI: A brake is an electrogmagnetic component. It has a resistance but is mainly inductive.
When the brake is turned off the current will tend to continue flowing and a spike or back electromotive force will appear which will overheat or destroy the transistor after it is blocked.
Adding a freewheeling or flyback diode will allow current flow in this condition and protect the transistor: |
H: Crystal load capacitance for low power applications
According to Silicon Labs' app note on microcontroller oscillator design, larger load capacitance on crystals increase power consumption and increase startup time.
What are the actual numbers like in terms of power dissipation? Would there be any practical benefits to use a 9 pF crystal over a 20 pF crystal? Are there any drawbacks?
AI: What are the actual numbers like in terms of power dissipation?
Below are a series of diagrams I produced when investigating crystal oscillator power dissipation changes versus external drive resistance (R1) and loading capacitor (CL1 and CL2) changes. The equivalent circuit is a good place to start before jumping into the actual power dissipation: -
Changing values for R1 (250 Ω to 1500 Ω) with CL1 and CL2 fixed at 20 pF produces slightly different oscillation frequencies (phase shift = 180°): -
Images from here.
The crystal is modeled as shown in the top picture. The crystal equivalent circuit has been chosen to produce a theoretical series resonance at precisely 10.000000 MHz. That frequency is determined by the components inside the orange box. The image link gives more details if you need them.
The important thing to note from above is that the oscillation frequency is somewhat "R1" dependent. The oscillation frequency is produced when the phase shift = 180° i.e. adding a "perfect" inverter generates an overall phase shift of 360°. Further down I show how an imperfect inverter can increase power dissipation in the crystal.
Looking at the graph above, the stablest oscillation frequency is the one where the phase shift passes through the 180° point with the least ambiguity. This tells us that a higher drive resistance (R1) produces better crystal stability. A higher drive resistance also produces the least amount of power dissipation in the crystal. However, things look a little different when we vary loading capacitance. The next picture keeps R1 at 500 Ω and varies the loading capacitors: -
The conclusion here is that higher values of loading capacitance produces a more stable frequency (less ambiguity in the frequency that yields 180°) but, the power can be significantly higher compared to using small values of loading capacitor.
But the inverter gate used also can play a big role. If the inverter has stated propagation delays of (say) 10 ns, the required phase shift to be produced by the crystal is somewhat less that 180° i.e. it might be closer to 160°. The effect on power dissipation is shown below: -
The linked article explains that a data sheet propagation delay of 10 ns would strictly erode the required crystal phase shift by 36° but, because the gate is used in its linear region the overall delay might be about 50% of 10 ns leading to the crystal being required to produce a phase shift of about 160°.
Hope this helps. The subject is as deep as you want it to be. More loading capacitance equals better oscillation stability but it also equals higher power dissipation in the crystal that can also lead to oscillator frequency degradation. |
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