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H: How can I read from an accelerometer through i2c/spi for ~1 second at frequency>2kHz with precise distancing between measures
Context
goal
My final goal is to perform an fft on acceleration signals with specs at least:
band between ~10 and ~1000 Hz
spectral resolution ~1Hz
on a portable, cheap, low-power device.
hardware
I'd like to do this with cheap portable low power hardware so I opted for an adxl345 as accelerometer connected via i2c (but also spi would be viable) to an esp32-wrover as micro-controller, powered by a 18650 lipo battery. Of course there is no problem, if necessary, to opt for more expensive hardware staying around ~100 euros/dollars.
software
I know and like python more than I know and like C, so I decided to use micropython on the microcontroller to acquire data from the sensor and push it via wifi to a computer that will actually perform the fft.
Question
My question is very focused on how to pass acceleration signals from the accelerometer to the micro-controller via I2C: I have implemented a loop that lasts for the desired acquisition time (say 1 second) and on each iteration tests how much time has passed since the beginning and if it's a multiple of the desired frequency it read a value from the accelerometer via i2c
start = ticks_ns()
while ticks_ns() - start < acquisition_time * 1000000000:
curr_time = ticks_ns()
if curr_time - start < (n_act_meas * 999999999. / sampling_rate):
continue
buf[n_act_meas * 6:n_act_meas * 6 + 6] = i2c_read_bytes(address, regAddress, length=6) # 6bytes = 2bytes * 3 signals (xyz)
T[n_act_meas] = ticks_ns()
n_act_meas += 1
but this approach is not very precise on the interval between measures (~10% relative error) and has a top frequency of 2kHz in my implementation (below the max frequency of the accelerometer).
I feel like I'm doing something wrong: is it possible to read via i2c the last n measures from the accelerometer (where n~1000 in my case) so that the problem of the timing is relegated to the accelerometer that should have a system that is precise enough to guarantee the nominal max sampling frequency, and a precise distancing between measures?
AI: ADXL345 Datasheet.
The most interesting section is on the FIFO. See page 21:
The ADXL345 contains technology for an embedded memory management system with 32-level FIFO that can be used to minimize host processor burden. This buffer has four modes: bypass, FIFO, stream, and trigger (see FIFO Modes)
It sounds like you should set the FIFO mode to "stream". Set the "watermark" level to something suitable (e.g. half the FIFO depth, 16) and the sample speed (BW_RATE register). Then the device will tell the MCU when it is ready, and you simply repeatedly read the data registers (note that you need to do a multi-byte read to get all the axes properly), until you have 16 values. Those will be the values sampled from the last 16 time periods. |
H: Demo of designing a modern CPU in Verilog/VHDL
Please help me understand how such huge and complex devices like modern CPUs' are designed - would it be possible to see an example of some final circuit with billions of transistors made with Verilog/VHDL? All examples on the Internet show only small ICs. I would like to see how today's engineers manage "ultra-large-scale integration" designs for chips like CPU/GPU/ASIC on regular workstations. I would like to know how such humongous device can be managed effectively and by so many people.
I am aware of FGPAs, but I think that their workflow is much more predefined and doesn't lend itself to the same complexity. I am aware of the Verilog/VHDL pipeline and I haven't seen anywhere a demonstration with BILLIONS of transistors chips.
I would really like to know how teams manage such amount of complexity and how much is it being broken down into IP blocks. For example, how many lines or Verilog/VHDL is being written for one of Intel's i7 CPUs?
RISC-V looks interesting and if nothing was available on the mainstream ICs it would be also helpful to see some good CAD/GDS output from RISC-V.
The reason why I would like to see it, is I worked a lot with CAD software (AutoCAD, McNeel's Rhino) and it's always been very slow. Hope that getting some insight from EDA/ECAD could hint a path to use them more effectively.
AI: I don't think such large ICs are designed directly in Verilog, no more than large software projects are written in assembly. I suspect the big makers, like Intel and AMD, have specialist compiler-like software that generates Verilog from much more high-level descriptions, such as register transfer languages. |
H: Dual (additional) battery E-bike solution
What would be better solution when attemptng to install additional battery on E-bike:
Parallel connection and increasing total Ah (batteries are from different manufacturers).
Idividual usage of each battery and switching after main battery is certain % auto or manually.
Also with second option, what are some good microcontollers or relay modules I can purchase?
As I did some research it seems to me that voltage sensitive relays (VSR) are not applicable in this case.
Bike model: OIO City Bike
Main battery: 36V, 10.4 Ah, Li-ION, downtube integrated, waterproof.
Motor: 350 Watt, brushless, maintenance-free
Charger: DC Out 42V 2A
AI: Parallel connection and increasing total Ah (batteries are from different manufacturers).
That's a really bad thing to do. You should never connect batteries / battery packs in parallel unless you REALLY know what you're doing and then the batteries should be of the same model and preferably of similar age and wear level.
If you ignore this advice and do it anyway then you risk that your batteries will be damaged and/or will start smoking and/or will catch fire. So just don't.
Idividual usage of each battery and switching after main battery is certain % auto or manually.
Manual switching should be OK, make sure that at any time only one + pole of the battery is connected to the bike's electronics. Put fuses in series so that if currents become too high the fuse blows.
Automatic switching will complicate things, if you have to ask how to do this then you probably lack the experience to do this. Then used a ready-made solution: you buy some suitable device, connect the batteries according to the manual and that's it. If that doesn't exist or you cannot find it: use manual switching.
Also with second option, what are some good microcontollers or relay modules I can purchase?
That is a "shopping question" and therefore off topic on this site. |
H: RTC circuit supercapacitor charge/discharge doubts
This is my current RTC circuit...
Supercapacitor = DXJ-5R5V334U (ELNA)...
DXJ-5R5V334U = 0.33F, 5.5V, ESR = 150 Ohms
Resistor = 150 ohms 0603 100mW 1%
If I consider only the resistor, I have a RC constant of 0.33 * 150 = 49.5 (~50) seconds... 50 seconds x 3 = 150 seconds (3x RC = capacitor very well charged, 95%...). That is 150 seconds... divided by 60 = 2,5 minutes...
But if I consider also the ESR of the supercapacitor, I will have 300 Ohms in total, so that the charging time would be 5 minutes, double the time...
What value of resistance should I consider in practice? 150 ohms (2.5 minutes)? Or 300 ohms (5 minutes)?
Another question related to that, is: the VBAT pin consumption is 1.2uA (@ 3.3V)... If the supercapacitor is fully charged (like 95%) and the circuit loss the power supply of 3.3V (shutdown/off), the RTC will continue to operate from the VBAT pin (supercapacitor), so how much time the RTC would stay working from VBAT? (1 month? more?). As I said, consumption is 1.2uA (@ 3.3V) and the capacitor is 0.33F charged with something like 3 to 3.1V, how much time the RTC IC would stay working if the 3.3V rail keeps off "foreve"r? According the the datasheet of RTC chip, the "Backup supply voltage" minimum voltage is 1.3V. Do you know some online calculator where I could estimate that time of operating from VBAT pin after power-off of the board and capacitor being 95% charged? Could you calculate these things to me please? Or maybe an online calculator would be great also...
Thanks and Best Regards...
AI: I use this website all the time to quickly calculate exactly what you're asking.
https://sparks.gogo.co.nz/capacitor-formulae.html |
H: Dali Light Addressing: How to?
As I am trying to create a program that addresses the various luminaires, I wanted to know better theoretically not the commands to give, but why I am giving that specific command.
I've searched for a long time to find also examples about Dali2 addressing light commands.
Then I found an article that told me that I had to enter some kind of command twice, for Dali to understand them.
This is what I've read:
According to IEC 60929, a DALI Master has to repeat several commands within 100ms, so that DALI-Slaves will execute them.
My questions for you are these:
What commands do I need to repeat in my program to be effective?
Which order of commands should I respect?
Would it be better if I used the state automaton process type or buffering?
Why should I repeat the commands?
I am using the Stm32 microprocessor so my code must be the most
light and efficient as possible.
AI: Configuration commands have to be repeated twice within 100ms without any other command in between before the control gear will accept them. This is done as a way to avoid corruption of the signal or spurious messages accidentally changing a configuration. DALI frames are Manchester encoded which prevents single bit flips of the frame causing problematic interpretation but does not have a CRC which is a common form of error detection in serial communication. So it is useful to have another method to ensure that the intended command has been received.
The list of which commands have to be repeated is given in any documentation you have on DALI, including the now superseded IEC 60929 where it states that commands 32-128 have to be repeated, and some of the Special commands like Initialise and Randomise. The new standard is IEC62386 and there is a table (Table 15 in IEC62386-102 Ed 2) which shows which commands are to be repeated; the column is called "Send twice".
The order of the commands depends on the logic of your application and the rules for DALI messages given in the standard. For example, to set a configuration parameter, it has to be first transferred using the DTR (or DTR1, DTR2) data transfer register, then stored - doing this in the opposite order makes no sense. For example, to set the maximum level, the command is 42, opcode byte 0x2A and uses DTR0, so the command set is
Command 257, SET DTR0 [with whatever value you want as a byte]
-any delay you like here-
Command 42, SET MAX LEVEL (DTR0) [addressed to the gear as necessary]
-less than 100ms delay-
Command 42, SET MAX LEVEL (DTR0) [addressed to the gear as necessary]
Command 257 SET DTR0 is not addressed, so it will be applied to every gear that is connected to the bus and powered up. If you want this SET MAX LEVEL to be applied to just one Short Addressed gear, or a Group address, or broadcast, then that affects the address byte that you need to set in the Command 42 SET MAX LEVEL. Only those gear which match that address will then use the DTR to set their own MAX LEVEL parameter.
The repeating of configuration commands does nothing to ensure that the DTR value is correct in the gear. If you have gear which has been short-addressed, or only one gear on the bus, then you can read back the DTR before or after doing the SET command to ensure it was at the right value. (You cannot in general read back values with broadcast or group queries because of collisions between multiple control gear. Unless you are using device type specific queries and only have a single example of that on the bus). |
H: Calculating RAM memory capacity from schematic symbol
Is it possible to calculate the memory capacity of a RAM given its schematic symbol?
I made a first guess from an example but seems to be incorrect:
If the address bus is 15-bit width, there are a total amount of 2^15 = 32768 addresses
If the data bus is 16-bit width, there are two bytes per address
Then, the total amount of bytes would be 32768 x 2 = 65536 = 65 kilobytes
However, the manufacturer states that its capacity is 2 Gigabit = 256 Megabytes
So my first guess is incorrect. How can the capacity be calculated given the schematic symbol?
AI: No, it cannot be calculated from the schematic symbol alone, but only by reading the data sheet corresponding to the part number in that symbol.
You example is a perfect demonstration of why - modern chips used multi-phased addressing, and you have to understand exactly how addressing works before you could know the capacity.
Read the data sheet for the indicated part, and you will see how it achieves this capacity by loading only part of the address at any given instant in time.
Then there's the whole history going nearly back to the dawn of computing of boards that could be populated by different capacity chips having compatible pinouts... |
H: Why are cables rated for current not power?
I was wondering, since resistors are rated for power, not current (so one can blow them with both overcurrent or overvoltage), then why are cables rated only for current? Aren't resistors just stacked up wires? The question could be also asked in reverse- why are resistors rated for power, not current only?
AI: Resistors are all the same size no matter the resistance. It's convenient for the manufacturer to test how much power a certain-sized resistor can take before it burns up. And it's the same for all resistors of that size. Also the power rating is the same regardless of the resistor's exact resistance (within the tolerance).
Cables with different current ratings are different sizes, so there's no such shortcut.
But actually, cables aren't usually rated for current. They're rated for their size, maximum temperature, and resistance, and you have to look up the current for that size, and you'll find a different answer depending on whether the wire is on its own, or in a bundle of other wires, or in a conduit, etc. That's because it's really the temperature that matters, not the current. |
H: Can I produce small signal gate-source voltage by applying small signal source-drain current?
As stated in the title, Can I produce small signal gate-source voltage by applying small signal source-drain current? There is no doubt that I can produce Ids by applying vgs, what about the other way around?
AI: Yes you can.
When Vds changes, drain-gate capacitance Vdg communicates some current to the gate. Then you have a potential divider formed by Cdg, and the parallel combination of Cgs and the source impedance of the gate drive circuit.
simulate this circuit – Schematic created using CircuitLab
Note that this is an AC effect, not observable at DC. More specifically, it is a high frequency effect thanks to the capacitances, and most severe with high speed switching edges, where MOSFETs are commonly used, and increase with increasing voltage.
This can either slow down the switching times, via what is called the Miller effect, or even turn the device on unintentionally when something else modifies Vds at a fast enough rate. |
H: Why is there a low pass filter in a DSBSC demodulator?
In analog communication, DSBSC (double side band suppressed carrier) is way of modulating signal.
In this the carrier is simply multiplied with the message signal.
At the demodulator, the carrier is multiplied back which gives the message signal back.
The first signal is my message signal
The second is the modulated signal
The third is the demodulated signal i.e I can get the msg by simply tracking the peak voltages
Now the demodulation process seems to be complete but the part that I am missing is a low pass filtee at demodulator. Why is it required? I have my signal back. Why should I pass it through a low pass filter? All the books have the filter.
Please explain why the low pass filter is required after the demodulator.
Matlab code
t=0:1e-4:30;
f=5;
y=sind(2*pi*f*t);
subplot(3,1,1)
plot(t,y)
hold on
yline(0)
xline(0.2)
ylim([-2 2])
hold off
subplot(3,1,2)
y1=sind(2*pi*100*t);
y3=y1.*y;
plot(t,y3)
hold on
yline(0)
hold off
subplot(3,1,3)
y4=y3.*sind(2*pi*100*t);
plot(t,y4)
hold on
ylim([-2 2])
plot(t,y);
hold off
AI: The Third is the demodulated signal i.e I can get the msg by simply
tracking the peak voltages
A simple peak detector will rise to the top-most peak and stay there (the maximum voltage peak of the original message will be captured). So you must modify the simple peak detector so that it decays toward zero as time passes, else the original message bottom-most voltage won't be captured....this is starting to look like a low-pass filter. Another problem with peak detectors is their poor performance where the demodulated message includes noise.
Yes, the original message can be reconstructed by sampling the demodulated signal at the moment of each +ve peak. This method requires knowledge of carrier phase, and requires a phase-locked-loop to track 2xcarrier frequency.
OP has used this method, since the demodulator magically has used a re-constructed carrier frequency that is phase-locked to the modulator carrier frequency:
y4=y3.*sind(2*pi*100*t);
This phase-locking method has problems: for example, if the message is at zero, there's no carrier for the phase-locked-loop to track. In stereo FM, this problem is avoided by always transmitting a little bit of 19 kHz subcarrier (by adding a DC offset to the modulator's message signal). But this is no longer pure DSB-SC. And you still have the problem of poor noise performance, if you don't add a low-pass filter. |
H: LTSpice AC analysis and DC analysis don't agree?
I have a simple circuit pi circuit. When I do the math and subsequently run the simulation on LTSpice, I get a similar answer - the resonance occurs at f= 217447Hz (math), 217450(LSpice).
The error log shows the following measurements:
.meas AC maxVout MAX mag(V(vout))
.meas AC resFreq when mag(V(vout))=maxVout*.99999999
.meas AC BW TRIG mag(V(vout))=maxVout/sqrt(2) RISE=1 TARG mag(V(vout))=maxVout/sqrt(2) FALL=last
.meas AC resQ PARAM 10^((resfreq/(bw))/20) **this result is in decimal, but displays as dB in the error log file.
When I run a transient analysis, with the voltage source set up as sine wave as $$ 1\cdot Sin(2\cdot\pi\cdot 217450\cdot t)$$, my expectation is the that output at node vout would be around 8.33V (10^(18.4138/20)volts). However, the output of the transient response, the maximum amplitude of vout is around 2.1V volts:
What's going on? Has anyone else run into something like this?
To check, I used Mathematica to plot the time domain output of my circuit's transfer function (convolved with the input sine wave source -ie, set Vin in my transfer function as a sine wave of frequency 217450 in the laplace domain, and then took the inverse laplace), I get something like I'd expect:
I don't know why LTSpice is not giving me the same answer ---I must be doing something wrong.
AI: When in doubt, if a transient simulation isn't giving expected results, decrease the maximum time step.
I was able to reproduce your results with the default settings.
But when I set the maximum time step to 0.1 us, I get much closer to the expected results:
(n002 is the voltage source output terminal)
When I reduce the maximum timestep to 0.02 us I get very close to the theoretical amplitude: |
H: What is the polarity of this capacitor?
I have a MAL213836109E3 axial capacitor. There's a stripe on one side of the capacitor, but it isn't a tantalum capacitor. Does it indicate + or - in this case?
This is the DigiKey link to it: https://www.digikey.com/en/products/detail/vishay-beyschlag-draloric-bc-components/MAL213836109E3/263338
AI: Here's what it says in the datasheet:
And on page 2 there's |
H: How can I measure a voltage between two conductive surfaces that are completely isolated?
I am in the middle of diagnosing an issue where the case of my battery box (steel) is floating at a potential of 120V relative to the negative terminal of the battery (350V). I've started removing connections but in this process i've been probing a lot.. The battery is completely isolated by several layers from the box. It's modular so i've removed one of the modules and placed it 2 meteres away, on top of two wooden blocks and a towel on a bench.
How is it possible I can measure a solid voltage (In this case, roughly 10V) between a battery terminal and the battery box which is 2 meteres and multiple insulators away? I then started probing random metal surfaces in the area and all showed a voltage, what is happening here? How is the multimeter showing a solid voltage when there is no current path?
AI: Voltage is a measure of how much energy a unit charge would gain/loose if it moved through the electric field between two points. Remember that 1V = 1 Joule per Coulomb.
But its just a measure of how much energy would be lost or gained. That potential exists weather or not you actually move any charges. So voltage can certainly exist without current.
Objects can charge up to all kinds of voltages via static electricity.
Nothing is ever "completely isolated". Insulators including the towel, wood blocks, the bench, and even air don't have infinite resistance. It may be very high but its not limitless. |
H: Why did my transformer explode? Was it faulty?
I purchased a dual-voltage step-down transformer. It had 3 input leads for either 115V or 230V and could output either 12V or 24V on the center-tapped secondary. I taped off one of the input hot wires and connected the other two to a wall plug. I then connected the three outputs to a screw terminal so I could safely test them with my meter, but they were otherwise unconnected.
I went to plug the transformer in (to 120V) and it buzzed loudly for a second and then violently exploded with wisps of some pleasant-smelling magic smoke. On the primary side I could see that it had spewed some copper from the primary winding onto the insulation of the wires (I could scrape it off to see insulation below, so the hot/neutral wires weren't shorted because of cracked insulation). The transformer was hot to the touch even after sitting unplugged for a few minutes. Testing the resistance of the primary now I get an open circuit between one hot and neutral and about 1 Ohm between the other hot and neutral.
Why did my transformer blow up? The first thing I thought of is that it was defective and the primary winding was shorted somewhere. Is there something else that I'm missing? Did I need to connect the primaries in parallel? The wiring diagram on the datasheet is very simplistic but doesn't seem to indicate such - it quite literally has 3 lines coming from the primary side that say 0V, 115V, and 230V.
AI: You connected it backwards. Primary color code Black/Yellow/Red.
In the future, you should read the datasheet and catalog and not make assumptions and also you can double-check by measuring the resistance. The primary for 115/230VAC will have much higher resistance than the secondary.
Also a small fuse in series with the primary would have saved it.
Note: On the primary, leave the unused connection open. If you connect the black and red together to one side of the line and yellow to the other and apply 120VAC you'll burn out the transformer (and the fuse might not even save it!). |
H: Maintaining constant voltage at end of long wire
I have a long 1 mm wire, about 1.5 meters long (and 1.5 m back). At the end of a wire I have a device that requires 3.7 V and can pull anywhere from 0 to 6 A at a time. However, when it pulls a high current I am noticing that the voltage drops and the device shuts down. Is there any way I can maintain a constant voltage at the device, regardless of the current drawn?
Some notes:
Using a thicker wire is not an option.
I cannot move the power supply closer to the device.
So I am looking for something that can regulate the voltage at the device's end.
AI: Given that you cannot use thicker wire or shorter wire, your options are: -
Boost the voltage at the sending end by a couple of volts and regulate down to the required voltage at the receiving end (more likely to work)
Boost and regulate the voltage both at the receiving end (might not work in extremes of load current due to cable resistance)
Boost somewhere in between and regulate at the receiving end.
Use a battery at the receiving end to supplement the load current required and let the battery be charged down the cable at a low average current (needs designing with care to ensure it works under all load/time scenarios). |
H: Circuit analysis with 2 diodes : Constant Voltage model
It's a problem about sketching V_in V_out characteristics(sketching graph with V_in as x axis, V_out as y axis) with constant voltage model in different V_D,on (V_D1,on != V_D2, on)
Starting from V_in = -inf, both D1 and D2 are turned off : (D1, D2) = (off, off) and it's obvious that V_out = V_in until one(or both) of diodes will turn on.
After that, I have to find the condition for one of diode turning on : like (on, off), or (off, on).
But how can I know which of 2 diodes will turn on first as V_in increases from -inf?
Both (on, off) and (off, on) are reasonable I think... I can't decide what's collect :(
AI: But how can I know which of 2 diodes will turn on first as V_in
increases from -inf?
Well there are tools that can help such as a simulator but I guess you might not be that keen on simulation so, ask yourself, what maximum positive voltage can be at the input that doesn't cause current to flow through D1. No current in D1 means you can analyse stuff without it affecting the math.
I say a positive voltage because clearly D1 is reverse biased by \$V_B\$ so, to make it conduct, D2 and R2 must be acting as a partial clamp on the output so that there is a volt drop across R1.... But there's the answer, D2 has to be conducting before D1.
Alternatively you could look at the problem without the presence of D1 and, in your minds-eye, raise the input voltage and tabulate what the voltage is across the nodes of the missing D1 diode. At some point it will become forward biased and, at that point that is the voltage needed at the input to get to the onset of D1 conduction.
But, in short, D2 will be conducting before D1. |
H: Unknown pads on board
I'm analyzing a board for some device (game handheld console). I've found a simple SPI flash on it (W25Q) but there are 2 pads exposed for what I assume is factory testing (there are no other pads exposed on the whole board). The thing is, those pads are the ones for /CS and DO. However, as far as I know you cannot get anything out of the chip without driving both CLK and sending a command through DI, so I just wanted to know if this makes sense from an engineering perspective, or it might be just something that will probably be driven by the main CPU or something.
AI: According to the datasheet (assuming you're right about the W25Q), these are the Chip Select and data out pins.
So, you're right, on their own, probably not useful. Might still be an important test point where the ability of a controller to initialize itself and read identification from the flash might be tested.
Also, note that this might be something that's "dual use", if the controller supports it: for example, on boards where the flash is not soldered on (which exists - otherwise the larger unpopulated footprint makes no sense), this might be testing something completely different. |
H: STM32 enabling clock for port C sets IDR bit 1
Why does enabling the clock for port C set the IDR bit 1?
It's the configuration for a Nucleo-F767ZI.
AI: The default mode of the pin is as an input, as soon as you enable the peripherals clock (well, a few clock cycles later), the pins state is clocked into the IDR.
Something is making that pin high.
As a comment on your code, there are defines for the bit positions in the registers, probably provided in the same include as you're getting the RCC pointer from, RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; is more readable than RCC->AHB1ENR |= 4; |
H: ALD1106/1107 transmission gate "off" state behaviour in LTSpice
I am making a transmission gate using ALD1106 NMOS and ALD1107 PMOS model files. For -5V (to NMOS and +5V to PMOS), with input 5V, the output should come 0 as the transistors would be in off state. But the output is coming 5V.
What is working: When NMOS and PMOS voltages are +5V and -5V respectively, the source voltage is reflected at drain.
What is not working: When NMOS and PMOS voltages are -5V and +5V respectively, the source voltage is reflected at drain. The gate should be in switched off mode.
What I have tried: My target input voltage at source is sine wave of amplitude 1Vpp and frequency 1kHz. Now I know that, condition for switch to be off is Vgs (gate to source)<Vth (threshold). So for my case of sine input and supply voltage(which is + or -5 volts), the condition might not hold true as Vth is state to be around 0.8V in the spice file. So, I changed the sine input to 10Vpp to have a maximum of 5V. But the input is still getting reflected at output even in off condition.
Note about inverter: I have used the default inverter from [digital] in LTSpice component bank. To get +/- 5V, I have added "Vhigh=5 Vlow=-5 Ref=0" to the "value" line in the attributes of the inverter (and by attributes I mean when one right clicks on the inverter and gets a dialog box with some attributes like value, value2, spiceline, spiceline2)
My schematic:
ALD1106/1107 spice file contents:
Model file for ALD1106 and ALD1107
SPICE Level 1
.MODEL ALD1106 NMOS (LEVEL=1 CBD=0.5p CBS=0.5p CGDO=0.1p CGSO=0.1p GAMMA=.85
+ KP=479u L=10E-6 LAMBDA=0.029 PHI=.9 VTO=0.8 W=20E-6)
.MODEL ALD1107 PMOS (LEVEL=1 CBD=0.5p CBS=0.5p CGDO=0.1p CGSO=0.1p GAMMA=.45
+ KP=206u L=10E-6 LAMBDA=0.0304 PHI=.8 VTO=-0.82 W=20E-6)
This is present inside a file named ald.txt that I am including using ".lib ald.txt" statement. Then I am using the default NMOS and PMOS from the LTSpice component bank and I am renaming them to ALD1106 and ALD1107 respectively to behave like the desired transistors.
Output observed (for sine wave of amplitude 10 Vpp):
What I expected: The output voltage to be 0 since switch is off, but output is same as input (as you can see two overlapping traces taken at input and output).
Netlist of my asc file:
* C:\Users\w\Desktop\LTSpice Models\Lab 5\Transmission Gate_Switch\Transmission_Gate.asc
V1 N001 0 -5
A1 N001 0 0 0 0 N004 0 0 BUF Vhigh=5 Vlow=-5 Ref=0
V2 N002 0 SINE(0 5 1000)
M1 N003 N001 N002 N002 ALD1106
M2 N002 N004 N003 N003 ALD1107
.model NMOS NMOS
.model PMOS PMOS
.lib C:\Users\w\Documents\LTspiceXVII\lib\cmp\standard.mos
.tran 0.005
.lib ald.txt
.backanno
.end
Is there something beyond my current knowledge base that I missed or is it something silly that I am overlooking? Why is "off" state not happening.
AI: These transmission gates are built with 4-pin MOSFETs for a reason: the 4th pin must be tied to the lowest (NMOS) or highest (PMOS) voltage potential. With these in mind, here's a reworked version:
Notice where the 4th pin of each MOS is tied up to. Also, there is no need for a loading resistance in this case: R is .stepped between 10k (on) and 1g (off), and the output is virtually the same. In real life, you would have some sort of load, though. |
H: Interference suppression coils for 9V DC adapter for audio equipment
I am about to add voltage regulation to an unregulated 230V AC to 9V 150mA DC adapter, by adding an L7809 voltage regulator and ceramic 0.33µF and 0.1µF capacitors.
I want to use this adapter to power a couple of (digital and analog) guitar effects pedals, but it was originally intended for use with a computer MIDI interface, not (directly) with audio equipment, so I was wondering whether I should take additional precautions against interference, especially in the audio spectrum.
I had a look at 9V adapters made specifically for use with audio equipment, and e.g. the ubiquitous Boss PSA-230S contains what is described as:
High-quality interference suppression coils in extra housing
What type of coils would these be, and how would I choose the right ones to add to my project? Also, how important is it that these are added near the end of the DC cable, and not to the adapter itself?
The unregulated adapter as it is now. (click images to enlarge)
AI: The power supply in the picture is a 9V unregulated linear power supply.
Because it is unregulated, it will output much more than 9V when unloaded, so your measurement of being more than 14V is perfectly fine.
And because it is a linear power supply, there is no high frequency noise you should be worried about.
Switch mode power supplies can have some noise on output, so that's why the other power supply you linked to has just standard noisy switch mode power supply and it needs the extra filtering to get rid of the noise. |
H: Feedback schematic/pcb 16 channel relay wifi module
I have a few questions about a 16 channel relay module I designed, maybe someone can help me. Generally this consists of a ESP-12F, two I2C IO Expander, two darlington array ICs to drive 16x 5V relays.
Here is the whole project page.
Channel 9-16 is equivalente to 1-8. The whole mapping IO expander -> darlington array -> relay makes maybe no sense but this was the most convient for me and will be fixed in software.
Toplayer:
Bottomlayer:
Now my questions:
Will this thing work ? (I am sorry)
How do I calculate the power consumation of a single relay ? The datasheet states that the coil resistance would be 70Ohm. So at 5V this would be 357 mW, is there more to consider ?
How about the decoupling capacitors for both IO expander and the darltingon array ICs ? I just picked 0.1uF because I alreay had one in design and it can't harm but I am not sure if I need them and what size.
I am planning to use a 5V/3A power supply. Since the ESP-12F will use ~500mA worst case, all relays together ~1.1A if turned on and I am not sure about the rest. Does that sound sufficient ?
I used a 1000uF capacitor at the DC plug. I was worried how the timings are with the IO expander and the darlington array. I assumed the worst case where 8 relays turn on at the same time and maybe the power supply is too slow. Does that make sense ?
The ULN2803ADWR datasheet never shows a example where a single relay is driven by one IO. Did I even use the IC correctly ?
Datasheets:
LD1117/A
ESP-12F
ULN2803ADWR
PCF8574T
Relay (5V)
AI: Most likely not. But then again, I tend not to believe something works, until the math shows it must work. There are couple of things you need to calculate to be sure.
That's right, 5V over 70 ohm coil means about 71mA current and is 0.357 watts. Since there are 16 relays, multiple current or consumption by 16 to find total consumption
I don't think you should be worrying about decoupling caps at first. They seem fine, but the regulator does only has large bulk caps on it, but not small bypass caps.
Sound about right.
Might be overkill. Depends on the supply though. As the relays are inductive loads, they will gradually start consuming current based on their inductance, not instantly. The relay coil inductance is not rated though. However, it does not apply when all relays are suddenly turned off. The 1.14 A consumption stops instantly from power supply, which may go out of regulation due to "load dump", so at least there is capacitance to capture the surge so the voltage does not rise too much.
Looks fine.
The problem is that the ULN2803 is meant to be driven from 5V TTL or CMOS output, it may not be compatible with 3.3V output from the PCF8574 output.
And if you read the PCF8574 datasheet carefully, it actually does not have push-pull outputs. It can sink a lot of current when pulling low, but it has a "quasi bi-directional" outputs, so it cannot source a lot of current when pushing high.
So you must calculate if a weak PCF8574 high output can drive enough current into ULN2803 darlington transistor input to turn it reliably on, knowing that the load is a 70-ohm coil taking about 71mA.
Another thing is, as you are using the internal ULN2803 common pin to clamp the inductive kickback, the coil magnetic field does not collapse very fast, so the relay does not turn off very fast. Slowly moving relay contacts may arc and spark and weld if they do not break the current fast enough. It may still work just fine but just so that you are aware of the issue and can search for better relay coil snubbing circuits.
One more thing is that there is no protection for arcs and sparks happening at the relay contacts. These can radiate electromagnetic interference and make the board reboot or something along that lines. I don't mean it is necessarily a problem but if it corrupts your I2C communication or reboots the ESP32, you are aware of the issue, if it works without a load connected but does not work with a load connected.
And then one legal issue might be the clearance and creepage of relay contact traces if the relay is intended to be used for mains switching. There is too little distance between relay contact pins and isolated low voltage side, as the ground plane is right next to the relay contact wiring with only a small gap.
Also check if the PCB copper trace widths are wide enough to carry relay currents and the ground pin of ULN2803 has wide enough trace to carry all the current from all the relays, roughly 0.57 per chip. |
H: Transmitting digital signal long distances, without complex parts
I'm controlling several multiplexers from NI DO modules. The multiplexers channel select inputs, A0-A4, are 5v. The DO modules output 5v TTL. On the bench I have everything working exactly the way I want.
Real world application is going to require 500+ feet of transmission distance. I can't go into specific details, but on the receiving end I can not use 'smart' components due to extreme environment. The muxes are specially made and only complex part. The only parts I can use are passive components, RLC, diodes.
Opamps, optocouplers, etc. fail in this environment (Where the muxes are located. Where the NI equipment is I can use any technology available)
My thoughts are to use FETs, controlled by the DO's, to transmit 48v signals. Then reduce them with a voltage divider in the harsh environment, to bring it down to 5v to control the muxes.
I'm brainstorming any other ideas, or reasons why this will not work reliably? Most likely will be switching in the 10-50kHz range.
AI: You could put a bipolar transistor in emitter follower configuration on each TTL output, to lower the output impedance and boost current capability. Otherwise, I would expect various telecomms line drivers to be available to suit your needs. Presumably you are using signal-return paired connections, as well as an overall 0V line and protective shield/ground.
If the environment is electromagnetically noisy then you might also want to use co-ax or shielded-pair cable to provide individual shielding as well as the line return paths; just make sure there is 100 ohms or so in series in any 0v or ground loop. Some more general EMI filtering might also be appropriate, depending on the nature of the environment. |
H: What design should I use to clean up this pulse wave?
I'm using common voltage controlled oscillator IC - AS3340.
It has some problem with pulse wave output on higher frequencies. The bottom of falling edge looses sharpness the higher I go.
This is how it looks at the limits of audible threshold:
I need some advice on cleaning up this signal so I would get nice and crisp pulse shape all the way.
This is my schematic. I'm measuring it at the PULSE_OUT node, without attaching the amplifier circuit.
AI: As others have said, a Schmitt trigger will clean it up. Reducing the 51k resistor to 10k or so may help as well.
Also consider this waveform distortion is irrelevant for the typical intended electronic music function of the IC. A perfect 18kHz square wave is barely audible under good conditions. The harmonics of the imperfect square are way above audible frequency. The difference between a perfect square and your signal will not be perceptible in the context of electronic music. In an analog synthesizer, achieving perfect waveshape beyond useful audio frequencies isn't necessarily expected, required, practicable, or audible. |
H: Trying to increase resolution of ADC using an op-amp
We currently have a circuit measuring a thermistor in a water tank, passing through a couple of voltage dividers and then plugging into an 12bit ADC which eventually interacts with a microcontroller and solenoid to help regulate a cooler for the water tank temperature.
The problem is that while currently our 12bit ADC operates between 0-5V, the temperature of the thermistor is only fluctuating between 8k-12k (between 20-30degC.) This means we are only really using 1.3-1.6V of the range of our ADC, and missing out on a ton of potential resolution.
I was hoping we could figure out how take that .3V difference in our current range, and using something like an op-amp to magnify it and have a range between 1-4V, but so far I have only been able to increase the resolution by 2-3x or so that way.
Am I way off track here? Is there a better way to accomplish what I am trying for? Still have a lot to learn and could use some insight.
AI: This difference amp circuit should do the trick for you:
I have simulated the thermistor R4 to vary over time from 8k to 12k ohms.
The resistor R1, R3, and R5 were chosen to match the center of the thermistor range. This sets the common mode voltage to 2.5 volts, and amplifies the differential voltage caused by the thermistor varying with gain set by R2, I used 33k.
The blue trace is the resistance of the thermistor using the right axis. The black trace is the voltage going to the ADC. |
H: Protecting ADC Input inrush current
I'm currently using a 5V current transducer that's connecting to an I/O device ADC input. I'm trying to protect my ADC input from going over 5V by using a zener diode . The reason this is coming about, is a current I'm trying to measure has a high inrush current on start up, and I don't want to damage the system. On the zener datasheet, it says \$I_z=5mA\$
Does this mean it will only starts clamping at 5mA or does it mean it will not work after 5mA?
And is it necessary to have a current limiting resistor? What will happened if there's no resistor?
AI: They don't show the I/V curve for the breakdown region in the datasheet, but for a diode in zener mode, it breaks down very fast as the voltage is increased (Vz in diagram below)
Source: https://www.electronics-tutorials.ws/diode/diode_7.html
The Iz point means that they set the current to 5mA and then measured the voltage Vz at that point. The intended application is more for setting a voltage so if you wanted to get a specific Vz (for a specific model) then set the Iz to 5mA, increase the current beyond 5mA and you get a cliff. So use a current limiting resistor before the zener to keep the current below the absolute maximum ratings of the diode.
You don't necessarily need a resistor, if the highest potential current that the zener would ever see was low enough to keep the part from over heating ( like from an opamp that could source up to 80mA on the output) then a 5V diode would dissipate P = 0.08*5V = 0.4W which is just under the max dissipation for the part which is 0.5W |
H: Why do I need to put a low pass filter in front of an analog to digital converter (ADC?)
Is the low pass filter in front of the ADC just to filter higher frequencies or does it serve another purpose?
I am talking about the ADS8320 ADC.
AI: A low pass filter is needed for most analog to digital converters (ADCs.) Without the filter, frequencies above half the sampling frequency of the ADC will "wrap around" into the sampled data. This is called "aliasing."
For example, assume you have an ADC sampling at 20000 samples per second. If you sample a 9000 Hz sine wave and record the data, then sample a 11000 Hz sine wave and record the data, then both sets of data will "look the same" - they will seem to have the same frequency content.
This picture from the Wikipedia aliasing page show how it works:
Both the red and the blue sine waves produce the same sampled result (the black points.)
This effect is usually unwanted. You usually want to capture all of the signal up to half the sampling rate without aliases.
You get rid of aliased signals with a low pass filter.
The low pass filter also removes high frequency noise.
Some ADCs have built in filters, some don't. Even those that do will usually require a moderate low pass filter to reduce signals above some specified multiple of the sampling rate.
Sometimes you can make use of aliasing.
Say you have an ADC with a sampling rate of 2MHz. Normally you would be limited to sampling frequencies below 1MHz.
If you use a band pass filter to pass signals only from 1MHz to 1.5MHz, then you could capture signals between 1MHz and 1.5MHz with your 2MHz ADC.
The frequencies will be mirrored, but that can be accounted for in whatever analysis of the data you do - or mathematically mirrored again so that everything is "right side up."
That kind of thing requires an ADC without a built in filter and some knowledge of the internals of the ADC. Besides the sampling rate, you have to be sure that the analog parts of the ADC will pass the signals that you are interested in. |
H: N-MOSFET Gate to Drain short circuit configuration and Vgs
I notice that in solution manuals to problems like these, when the gate is shorted to the drain on an NMOS, Vds = Vgs. So Vds >= Vds - Vtn, making the MOSFET always in saturation.
I do not understand why this is, and have not been able to find a diagram that I could make sense of. How can we explain this more visually?
Here is the problem this schematic came from. Microelectronic circuit design, 5th edition.
AI: First of all, I'm sure you ment Vds >= Vgs - Vth for a MOSFET in saturation.
Vds is defined as the potential difference between drain and source, Vgs as the potential difference between gate and source.
simulate this circuit – Schematic created using CircuitLab
By shorting gate and drain, they share the same potential. Therefore, Vgs = Vds. That much should be pretty obvios.
Now have a look at the output characteristics of a standard MOSFET below (graphic taken from this answer). Focus on one specific value for Vds. You can see how the drain current increases with increasing Vgs (or rather Vgs - Vth). If Vgsis smaller than Vth, the MOSFET is basically completely blocking. Once Vgs is larger than Vth, all MOSFETs more or less share the shown behavior. That is why plotting Vgs - Vth is more usefull to us than plotting Vgs right now.
The saturation region is the region in the plot, where the drain current is independent of Vds and therefore is just a horizontal line. In the linear region, the drain current is dependent on Vds, and the MOSFET behaves roughly like an ohmic resistor.
Take a closer look at the red line seperating the regions (in reality, this is not a hard transistion but rather a soft change). This line follows the equation Vds = Vgs - Vth. Check it yourself!
At the point where it crosses the blue Vgs - Vth = 4V, Vds is also 4V. The same applies for other values.
If Vds is larger, we are on the right of the red line; in the saturation region. If Vds is smaller, we are on the left, in the linear region.
To be honest, I'm not sure if there is a deeper physical explanation for this formula or if it is just a convenient coincidence. However, keep in mind that it is not a hard boundary and the whole model of underlying theory of how a MOSFET operates just an approximation.
To sum it up, you should
make sure you understand what the voltages Vds and Vgs mean in general and for your circuit
then have a deep look at the output characteristics graph. At least for me, it was the hardest part to wrap my mind around the fact that three quantities are plotted in the same graph. Once you managed that, it becomes an increadibly useful tool while designing and analysing circuits. |
H: Turn on LED if certain voltage range is detected
I'm new to circuits and in a side project I'm trying to design a DC circuit without microcontrollers that will turn on an LED if a certain voltage range is detected. For example the LED turns on if there's a voltage over 1.2V on a certain node. I'm not sure what component or setup will be able to trigger at a threshold. I'm not familiar with most EE components beside the very basic ones (resistors, capacitors, inductors), but I would definitely like to know which ones I would need to look into to make this.
AI: While Reinderien's answer is technically correct, you might want to have more flexibility when defining your voltage window. You might find the following circuit more satisfying:
simulate this circuit – Schematic created using CircuitLab
This contains 2 essential building blocks: comparators, and AND gates. Vref (high) and Vref (low) are defined by potentiometers (R1 and R2). They're essentially knobs you can use to tune voltages.
OPA3 and OPA4 are voltage comparators; OPA3 is essentially a '<' operator and OPA4 is essentially a '>' operator. The component on the right is an AND gate. If both the input voltages coming in are high, the Vout is high. If one or neither is high, Vout is low. The result is the circuit implementation of the following pseudocode: Vout = (Vin > Vref_low && Vin < Vref_high). |
H: How many bits of information does a voltage of 0-5V , with accuracy of ±50mV convey?
In my intro to logical design class, we were shown this simple question as one of the first examples for the exercises we will have. The question was:
An analog voltage is in the range of 0–5 V. If it can be measured with
an accuracy of ±50 mV, at most how many bits of information does it convey?
The answer we were provided stated that:
Accuracy of ±50 mV means that the analog signal is divided every 100mV, so we have 50 discrete measurements from 0 to 5V. Thus $$log_250= 5.64$$ bits.
My questions are:
What does accuracy of 50mV really mean?
How did we come up with a division of every 100mV?
If out analog voltage was in range 0 to 6V, then would we say that 6V = 6000mv, so
$$\frac{6000}{100} = 60 \text{ discrete measurements, thus } log_260 = ... \text{ ?}$$
And lastly, what am I really being asked here? What do 5.64 bits really show us?
I would appreciate any help given!!
AI: What does accuracy of 50mV really mean?
It's an accuracy of +/- 50 mV and that means there is a spread of 100 mV. Put another way, you can't rely on a measurement being absolutely accurate so, if you measured a value of (say) 1 volt, the real voltage will be somewhere between 0.95 volts and 1.05 volts.
How did we come up with a division of every 100mV?
The +/- 50 mV inevitably sub-divides measurements into blocks having a range of 100 mV. That defines the error-free accuracy when converting the analogue voltage to a digital value.
What do 5.64 bits really show us?
It's a number that you can use to make comparisons. Many ADC specifications do this; an ADC may have 16 bit resolution but, at full scale and taking into account quantization and noise, the effective number of bits might only be 15.5. It's not a real number - it's a comparative guide number that tells you how good one ADC is versus another. |
H: Can I fabricate a PCB using this schematic?
I am a newbie to schematic and electric circuit design. This is one of my first schematics and I am thinking of making a PCB out of this one.
I want to ensure my PCB will work after fabrication. It uses an ATmega328P as microcontroller and also has an MLX sensor, an LCD and an ultrasonic sensor.
I have attached the schematic with this post.
Please give me suggestions if you have any. I want to know whether my PCB will work or not if I fabricate it using this schematic.
AI: No one can tell you for sure if it will work. It probably won't.
Too many of your parts don't have model numbers.
VR1 appears to be a 5V regulator. Which one? Without a datasheet or at least a part number, no one can tell you if you have it connected properly and have used the correct input and output capacitor types and values.
You have some unknown LCD in the circuit, and have not connected half of the data lines. Maybe that's correct for your LCD, but I doubt it.
You have a buzzer connected directly to the microprocessor. That probably won't work well since microprocessor pins can only deliver a few milliamperes of current. Maybe your buzzer would work. Nobody knows - no datasheet or model number.
What is U1? No model numbe or anything else. No one can tell you if it is connected correctly.
Which MLX sensor? They make many. No model number, no datasheet.
Which ultrasound sensor? No model, no datasheet, no idea.
You have no decoupling capacitors at all for the microprocessor. Sometimes (when the stars align and the monks in a temple somewhere mutter the proper incantations) that works. Sometimes it works well enough that you think it is fine - until it suddenly doesn't work and you can't see any reason for it to have changed.
If you made a PCB from this circuit, it might do something but it probably won't work as you intended it to. |
H: Equation for square law circuit modulator
For DSBFC AM (double side band full carrier amplitude modulation ) the message signal \$m(t)\$ must be multiplied by carrier maybe $$ A_c\cos(\omega_c(t)) $$
(For modulation)
This modulation is done in reality by using the non-linear characteristics of the diode, where
$$ i(t)=av + bv^2 $$
\$v =\$ applied voltage to diode
Here we apply
$$ v =V_c(t)+V_m(t)$$
$$ i(t)=a(V_c+_Vm)+b(V_c+V_m)^2 $$
$$ i(t)= aV_c +bV_m +bV_c^2+bV_m^2 +2V_cV_m $$
Here $$V_c=A_c\cos(\omega_c(t))$$
Thus
$$i(t)=aA_c\cos(\omega_c(t))+bm(t)+b(A_c\cos(\omega_c(t)))^2 +bm(t)^2 +2m(t)A_c\cos(\omega_c(t))$$
After simplification
$$i(t)=aA_c\cos(\omega_c(t))+bm(t)+\frac{bA_c}{2} +\frac{bA_c\cos(2\omega_c(t))}{2} +bm(t)^2 +2m(t)A_c\cos(\omega_c(t))$$
In frequency domain I can clearly understand following components
$$ f(\text{message frequency}),f_c,f_c+f,f_c-f,2f_c $$
but my book tells me there are additional components at \$2f_m\$.
Can someone help me understand where it is?
AI: 2fm
This frequency comes from the message signal; specifically \$(m_{(t)})^2\$. Multiplication of a signal with another (or itself) in time domain is represented in frequency domain as a convolution.
So the corresponding signal in frequency domain is
$$
M(s) \circledast M(s)
$$
If a signal with frequency contents from 0 to \$f_{max}\$ is convolved with itself, the resulting spectrum will have frequency content from 0 to \$2f_{max}\$.
From Wikipedia |
H: two independent zones from central heating unit
I have a central heating unit (a pellet stove) for a two floor house. I'd like to control it independently from two thermostats.
The stove at the moment is controlled by a single thermostat input and it turns on and off a circulator pump with an internal logic board. Circulator can be on both depending on thermostat input and on internal conditions, in particular if the heater overheats to dissipate some heat by sending water into the radiators.
Now I'd like to add two electro-valves. In the simplest scenario they would be controlled by two independent thermostats that go in OR into the thermostat input of the heater logic board. This way though I lose the safety mechanism. With valves closed the heater cannot dissipate.
Logic would be roughly like this:
each valve opens if their zone thermostat is on
one or both valves must open if both the thermostats are off and the circulator is on
both thermostats in parallel go to the heater input
I believe I need some relay logic but I'm not an engineer and I'm a bit out of my comfort zone. Would you please validate my reasoning?
Let's give some names:
A zone A thermostat
B zone B thermostat
C circulator output from the heater
V electro-valve
T thermostat input to the heater
I'd say that I should have a truth table like:
A B C V1 V2 T
0 0 0 0 0 0
0 0 1 1 1 0
0 1 0 0 1 1
0 1 1 0 1 1
1 0 0 1 0 1
1 0 1 1 0 1
1 1 0 1 1 1
1 1 1 1 1 1
That should lead to:
T = A or B
V1 = A or ((A nor B) and C)
V2 = B or ((B nor A) and C)
Which simplified should be:
T = A or B
V1 = A or (not B and C)
V2 = B or (not A and C)
Now my problem, assuming my reasoning is correct. How do I turn this into a ladder diagram and more importantly connection schematic? what kind of relays do I need? (everything is on 230V AC, if it matters)
UPDATE:
Here's a tentative ladder diagram, as I said it's not my field so it probably sucks :-D
AI: Your logic looks fine.
simulate this circuit – Schematic created using CircuitLab
Figure 1. OP's logic redrawn using changeover contacts. 2-pole relays may be easier to source.
This does exactly the same as your logic but is more difficult to read. |
H: Is it possible to have a 2-in-1 USB device that is a Flash Drive and Power Bank?
I spent over an hour with no luck looking for a device that would provide flash storage and provide charging power to another device at the same time. I would think this would be possible as you can plug a phone into a computer and receive data as well as charging power simultaneously. If a 2-in-1 device is possible, does it already exist for purchase? Maybe it has a different name and I am searching with the wrong terminology.
AI: Power banks typically are USB hosts so they can negotiate about voltage and current requirements with connected devices and e.g. cut power if required. In contrast to this, a USB flash drive (aka "mass storage device") is a USB device, which does not provide a voltage on Vbus.
As far as I know, this contradiction makes it impossible to have both features combined in one device per standard. |
H: How can I fix this LED dimmer circuit?
simulate this circuit – Schematic created using CircuitLab
The circuit reverse-engineered above is a LED dimmer which is driven by 555 timer in astable mode which then drives an op-amp to provide current for the gate of the MOSFET. The circuit dims quite well but it has an issue, when you power it up for a brief moment the LED strip receives non-PWM voltage what results in full brightness and dimming according to the 10K pot position after a while. I was thinking in order to fix this I could remove the 7805 regulator and just replace it with buck converter which powers the PWM circuitry constantly, but I'm asking if there's maybe more elegant solution here.
AI: Presumably the 555's threshold pin is connected to the inverting input of the op amp.
Swap the inputs over on the op amp. 555's threshold pin to the op amp's non-inverting input and the pot to the op amp's inverting input.
And do put a current limiting resistor in series with the LED. |
H: Cause of delay in CAN
I am dealing with a differential drive robot that interacts with several motors and actuators, all through a powerful NVIDIA Jetson Xavier. The Jetson runs Ubuntu and I use Python3 for programming all actions of the robot that go through a microcontroller via CAN bus.
Now, there are multiple parts of the robot that we need to program; chiefly navigation and arm-movement. Right now, the robot does only either of them, i.e., it can either move or perform some arm-movement. All the actions are based on the same 1D LiDAR sensor.
To boost its speed, I thought of performing both these functions in parallel, as they are almost independent of the other. Python provides two wonderful options for this: multi-processing and threading. Both of them seem equally good options with the caveat that threads cannot be killed and prove negligible improvement when compared to multi-processing. So, I am staying with multi-processing for the time-being.
Now, the way I use the sensor or lidar values is, to get them via a thread and continuously dump them as global variables.
t = Thread(target=dump_lidar_data,args=())
t.start()
Various functions defined in the same file, use these values as:
def fun():
global lidar1
print(f'Look, I too can access lidar 1 values: {lidar1}')
The main process or the parent process detects when its show time and spawns two child processes: p_navigation and p_arm. Both these process start together and have their own instance of dump_lidar working in their respective processors. Both terminate on the basis of the same condition. In the meantime, the parent process does nothing.
I notice that there is a considerable delay (upto 1s) between the data procured by the dump_lidar in the parent process as compared to the ones in the child processes. It is also possible that the CAN bus is giving the data after a certain delay.
Is there a possibility that the CAN or the circuit involved in getting the data to the Jetson, cause this delay ?
AI: Transfer of a max. sized CAN frame is roughly ~100µs (at 1MBit/s). Everything else I guess is SW. But Linux + phyton is not a Realtime environment or fast in first place. You need at least a core with FiFo scheduling policy, and get rid of python - use compiled language like C++. But even that might just bring a minor improvement. You might need a real RTOS (beneath Linux) to have control over Sysclock, Interrupts, DMA,... |
H: Why is op-amp output not zero if inputs have the same voltage?
I have started learning about op-amps and have a question. If Vout is the gain times the difference in voltage at the inputs, why is Vout not always zero if we assume the voltages at the inputs are the same due to the golden rule?
AI: I think your confusion is in thinking that the inputs are always at the same voltage. This rule only applies if the circuit has negative feedback, which means that the output voltage changes in a way that tends to make the input voltages the same.
As others have pointed out, the input voltages are never exactly the same, but if the open-loop gain of the op amp is very high then the difference between the input voltages will be very small. Assuming that the input voltages are equal is a useful approximation if you want to quickly determine the general behavior of an op amp circuit. |
H: Using an LM358 as line level buffer
Recently, I've acquired an old SNES, specifically the SNSM-CPU-1CHIP-03 model, with no audio output.
I traced the issue to a dead S-Mix chip, essentially a buffer between the audio DAC and the line output.
While the DAC in question, an LM6379A, is technically capable of driving the line output on its own, I thought I'd try my hand at making a replacement buffer, using an LM358 op amp as a voltage follower and taking advantage of the passive components already in the board. The resulting circuit looks a bit like this, for each stereo channel:
Now, this does seem to work, at least for a little while - but eventually, after a minute or two, the output gradually lowers, before disappearing completely, or being drowned out by power supply noise. Placing my hand next to the amp did occasionally make the problem go away, making me suspect it's some sort of coupling issue, but I am not experienced enough with analog circuitry to pinpoint what exactly might be going wrong.
Is there anything I might be overlooking in this?
AI: DC bias currents must flow into the opamp terminals for it to function since the transistors at the inputs inside the amp need to be biased. It's a tiny current, but it is there.
From LM358 Datasheet
But your 88nF capacitor is a DC-blocking capacitor.
As the bias current flows through the input in the same direction (it is DC after all), the cap slowly charges up towards that DC level. Once the cap charges to that DC voltage, it fully opposes the DC source driving that bias current and no more bias current can flow into the opamp inputs, therefore the opamp stops working. The smaller the bias current is, and the larger the DC block capacitor is, the longer it takes to fully charge up to the point the DC bias currents are completely blocked and the longer it will function for before the problem rears it's ugly head.
Connect the input to GND through a large resistor(s) to mid-supply (say 10K - 100kOhm for the LM358 since it is a BJT input opamp so the currents are higher so the resistance has to be lower than it otherwise would be for a CMOS input opamp) to give the bias current a path to flow. For a bipolar supply this would be a single resistor to GND. For a unipolar supply this would be two equal resistors, across the voltage rail forming a divider with the opamp input sitting in the middle.
simulate this circuit – Schematic created using CircuitLab |
H: What resistor wattage with rectifier and capacitor?
I have tested a classic full bridge rectifier:
simulate this circuit – Schematic created using CircuitLab
I haven't yet connected the load (a relay switch whose coil has 90 ohms).
The result was that the R1 burned.
I guess I need a higher wattage R1, how do I know what it should handle?
Any more caveats I should consider?
The operating voltage of the coil is 12V-15.6V.
AI: First the safety:
Responsible comments on your post are mainly concerned for your safety because to control the hazard you must first identify and evaluate the risk. It takes only 30mA to provoke respiratory paralysis. You can easily shock yourself, there is no galvanic isolation. If you are working on a breadboard (breadboards are not all made to work on such voltage since the distance between contacts depends on the voltage) you may easily touch a high voltage node or even while moving or carrying it you will touch contacts since usualy from the bottom the isolation is too bad it is only an adhesive paper that isolate the contacts.
Then the circuit:
there is nothing to limit the voltage at the output. So it is not only the resistor overheating, the capacitor (25V) will reach a certain voltage and may explode. At least a Zener diode is needed to limit the output voltage.
when you apply the mains AC 220V first the capacitor initially discharched will be shorted and the resistor will be as if directly connected to 220V and will dissipate around 30W.
the solution is not to replace the resistor with a giant powerful one. It is a bad design and consuming energy for nothing, just to drop the volatge from 220v to 12V.
Usually if the power is too low we use a capacitor (we add also a high value resistor in parallel to the capacitor) in series with a resistor of low value just to reduce the transient current on the zener and we add a zener parallel to the load.
In your case the current is a little more than 130mA. But the circuit still not safe. Nothing to isolate the high voltage. You defenitly need assistance in an equipped lab when working on it. |
H: Is there any dedicated IR receiver IC with atleast 5 output pins
I want to know if there is any IC available that can decode an IR remote to its different pinouts or I have only option to program a microcontroller to achieve it.
AI: Seemingly you expect something which has 5 separate outputs which can be activated one at a time by pressing buttons 1...5 on an IR remote controller.
The others have tried to say that this is possible, in theory such IC can exist. But you must have a remote controller designed just for that IC. Generally the codes used in remote control systems are complex and everyone is different. The code contains some identification of "who is sending", the wrong sender is ignored. Then there's the code of the wanted function, maybe only the number of the pressed button and finally some calculated redundancy data to detect and fix transmission errors. Everything can be encrypted to make 3rd party devices more difficult to make. Big entertainment electronics manufacturers such as Sony have licensed their coding systems to others. They can bill say $10000,- for the code details.
You may find an IR receiver which generates computer compatible raw serial data output from the voltage that an IR photodiode catches. But a programmed computer (=microcontroller) is needed to decode the raw data and launch the wanted operations. There's numerous "IR remote decoder" projects presented in the web. Search for them.
Finally some preprogrammed chips to decode some known IR remote coding exists. Here's a link to one story of one chip https://www.voti.nl/ir-3/index_1.html No idea is it really available and does it work. I wouldn't believe such articles if there's no direct manufacture's data available which shows the system is properly constructed.
Also chips for remote controllers exist. Again: No idea of the availability https://www.infraredremote.com/RS117.htm |
H: Using TL071 at 455 kHz
I'm experimenting with op-amps and ceramic filters at 455 kHz. I chose TL071 because it was readily available and the datasheet specified a slew rate of 13 V/μs and a GBW of 3 MHz. But in the datasheet it shows that the large signal differential gain drops dramatically after 100 Hz.
My Ltspice simulation also shows similar effect.
My question is can I use this device for making a 455 kHz signal amplifier in practice as the simulation shows about 18 dB gain at 400 kHz?
AI: My question is can I use this device for making a 455 kHz signal
amplifier in practice as the simulation shows about 18dB gain at
400KHz?
The 18 dB of gain you get roughly tallies with the open loop response from the data sheet so, you can amplify the 455 kHz signal but if you are expecting a clean distortion free output it might not be quite like that because the op-amp is running pretty close to to its top-end of the spectrum and op-amps rely on a lot of "spare" open-loop gain for a "high fidelity" signal amplification. |
H: Which integrated circuit can I use instead of multiple MOSFET?
I have designed a circuit using a combination of NAND, NOT, AND and OR gates:
I know how to build this circuit with MOSFET using CMOS technology but it requires 18 MOSFET. I would like to know how can I build the same circuit using an integrated circuit in order to reduce its size:
I looked at some catalogs of electronics components and I didn't find any integrated circuit that embeds these four gates in one chip.
Does this kind of integrated circuit exists? If yes, how can I easily find them? If no, how can I reduce the size of my circuit?
AI: Does this kind of integrated circuit exists?
No they don't. But notice that your inverter can be made of a second NAND gate by tying the inputs together. That eliminates one gate type.
Now, can you make the whole circuit out of NAND gates? Yes. All logic functions can be done with NAND. Here's an OR gate.
You can find the complete set in Wikipedia's NAND logic.
The result may use more gates than your original but it should use less chips (not "ships"). Look out for opportunities to eliminate gates. Do you need your inverter anymore if the B input of the OR gate also has an inverter? (I'll leave you to work out that puzzle.) |
H: Torroidal transformer design help needed
I have an idea for a simple circuit that I'd like to use to detect current flow in regular (US) AC household 120V, 60 Hz power. All my electronics-making friends told me, of course, that there are numerous current sensing ICs on the market now, and that's true, but I'd like to pierce the veil of magnetics a little more myself.
Advice here on Stack Exchange was to go with a Rogowski coil and feed that to an integrator, which I started, then realized 1) Rogowski coils, when purchased, seem expensive, and 2) there isn't as much data about designing with them compared to torroids.
I would like to see if its possible to feed the line I'd like to monitor through the primary of a torroid, and feed the output of the primary to an op amp integrator. I am at a loggerhead though. So many engineering textbooks simply mention the very basic formulas for transformers, like ratio of turns in the primary to the secondary. Few mention a design process using Al of the core, permeability, diameter, etc. Also, I know an op amp is a very high gain device. So what is a good level of voltage to shoot for to feed it in order to design around? Or is that even the proper place to start?
In any datasheet, there is tons of information, and we find usually 2 or three of those parameters are the heavy hitters that frame the entire design, the rest usually are good for fine tuning. With magnetics, I'm lost. I need a kind of road map and a list of the parameters that are the important ones to start from. I could grab a core, make a number of wraps, and see what I get and tweak from there, but I want do be able to eventually do some real engineering here. Does anyone have any pointers or good books they can recommend?
Thanks for any help.
AI: The thing is with Rogowski Coils is that the design is very easy. If you do not care about high accuracy. The more windings the higher the output the better you can measure it. It will not saturate because there is no iron core. Take a plastic loop in the shape of a donut. It would be best if the donut has a small hole and a large outside diameter. Wire insulated copper around it in windings. The more turns you will make the higher the output signal. The two ends of the wire you hook up to an integrator circuit for integration of the signal and amplification. When complete put the to be measured wire/cable through the donut.
Count the number of turns you make the formula for calculating the current is:
$$
v_{(t)}={\frac{-AN\mu _{0}}{l}}{\frac {dI(t)}{dt}}
$$
found here:
https://en.wikipedia.org/wiki/Rogowski_coil#Formulae
It may be a lot of work and the accuracy is probably low but certainly possible. |
H: Why does the datasheet only has one input bias current value?
There should be two input bias currents, one flowing into or out of the inverting input and the other, the non-inverting input. Their difference is the input offset current. A typical datasheet only states one value for the input bias current. Is that bias current going into the inverting or the non-inverting input? Or is that an average of the two input bias currents? Or perhaps something else no specified on the datasheet?
If I assume \$ I_{B+} = 600 \text{nA} \$ and \$ I_{B-} = 400 \text{nA} \$ then I would get an average value of \$ 500 \text{nA} \$ and a difference value of \$ 200 \text{nA} \$. The calculation matches the values on the specification sheet where input bias current = 500nA and input offset current = 200nA. The leads me to assume that the single input bias current value provided on the datasheet is actually an average.
A similar question was asked here Input bias current in an opamp and its value in a datasheet but I can't find a relevant answer there or elsewhere on the web.
AI: In a voltage feedback opamp1, the two input circuits are identical, at least up until the stage where their difference is taken. This helps with things like low tempco of offset voltage. The specification for bias current is therefore for each input individually.
On the data sheet you've shown, you would expect each bias current to never exceed 1.5uA over the temperature range, and the two be within 500nA of each other over the range. This is not a specification for the average of the two bias currents.
The important thing to bear in mind is that bias and offset current specify two totally different things about the opamp.
Bias current. Smaller is generally good. But it has to be compromised for noise, speed, common mode range etc with any given technology. The clever designer will use high gain transistors, reduce capacitances, use various circuit tricks (including compensating the bias current with an internal bias source) to minimise the external bias current for a given performance specification.
Offset current. Smaller is generally good. This is a measure of how well one input tracks the other, and stays tracking the other with temperature changes, and with power changes. This is important as if the user can match the two input resistances, changes in bias current will cancel out if the offset stays small. The two input circuits cannot occupy the same physical space, so variations of doping density and temperature across the die will unbalance the inputs. The more expensive opamp will actually interleave multiple transistors from the two input circuits, so even with a temperature and doping gradient across the chip, on average they will still track.
1 - a current feedback opamp has very different inverting and non-inverting inputs. |
H: Why is there a LC filter in front of the DC/DC converter?
I have to study this circuit. I understand that Graetz's bridge is there to convert the current to positive, but why is there a LC filter at the entrance of the converter?
AI: why is there a LC filter at the entrance of the converter?
That looks like a noise removal filter. The noise is generated by the 12 volt switching converter (due to high speed switching) on the left and therefore, the LC immediately to its right (its input port) will act as a 2nd order low pass filter and noise/switching artefacts travelling from left to right (left being the input to the inductor) will be significantly attenuated. So, if the whole design needs to comply with some conducted emission testing (as measured at the far right on the 24 volt port), the LC provides assistance in meeting those requirements.
Note - it's quite common to see this circuit addition on many power converters such as "Traco" and "Exar" converter products. And, if you dig down into application notes for the TM 3-2412 (your device) you'll find this general recommendation: - |
H: How is the effective parallel resistance of this resistor network determined?
I have this circuit:
The effective resistance at the reference node of D4801 is given as
Rb = R4802||(R4805+(R4807||(R4806+R4808+44KOhm))) = 9.129KOhm
I am not able to understand how this formula is arrived.
Shouldn't it be, Rb = R4802||(R4805+((R4806+R4807)||R4808+44KOhm)))
Please tell me how the first Rb is correct and the above is incorrect?
How should we factor or consider the R4806 resistor into this formula? I find it confusing on how to include the R4806 and R4807 into the effective resistance formula.
Any tips on how to find a easy way in these type of circuits?
AI: The Rb is the resistance used for calculating the Voltage division of the 5V between R8403 and "Rb". It is derived by looking down from R8403 looking at the impedances. You first see: R4802 || X. When looking at X you see the SCR (which is infinite when switched off so you dont include it) and you see R4805 in series with a certain Y circuit. So you get: R4802 || (R4805 + Y). When following Y you see a split path. Which means parallel R4807 with Z. So you get: R4802 || (R4805 + ( R4807 || Z). When following Z, you see a series path to ground: R4806 + R4808 + RA and RB. The capacitor has infinite resistance so again this parallel branch is left out. The transistor shorts the RB. So Z is R4806 + R4808 + RA. Which In total leads to: Rb = R4802 || (R4805 + ( R4807 || (R4806 + R4808 + RA))) |
H: About smd capacitors values and voltage rating
My Dell 3542 (2014)laptopboard got failed...i tested the board,and i found 4 smd capacitors have fialure...there is no any thing on the board to inform me about the value or voltage rating of them except the the 4 capacitors have the following numbers,c4925,c4926,c4927,c4928..can any one tell me how to know their value and voltage rating...thanks in advance...
AI: Most likely heat damage and/or hot connect surge currents in power supply, get adequate voltage from datasheets for case size and cap value for 19.5V chargers.
Then Learn that Laptop chargers hot inserted burn out connector contacts and caps, same with USB 12W on lightning connectors, even tho no OEM ever tells anyone in public about this.!!!!!
Gold plating (flash) turns to black carbon on my lightning connectors( Apple design fault) and even vaporizes leading edge. so no wonder if your caps are PSU input related why the surge current burns Dell’s faulty design caps. They ought to use soft start protection. |
H: Two separate heatsinks leads to less volume than one?
I am currently designing a heatsink to handle the heat from a diode and a MOSFET. I can pick either two or one heatsink, and my goal is to minimize the volume of the heatsink.
Intuitively I would think that one heatsink for both the MOSFET and the diode would lead to the least amount of volume, but my results show that two separate heatsinks (one for the diode and one for the MOSFET) results in the least amount of total volume, can this make sense? If so, I would appreciate it very much if someone could give an intuitive explanation of it.
To obtain my results I used the following procedure:
To obtain the R_ha=R_heatsink_to_ambient when MOSFET and diode share heatsink the following thermal equivalent circuit was used:
By calculating the heatsink temperature that guaranteed MOSFET and diode junction temperature lower than rated values R_ha was found.
When the diode and MOSFET did not share heatsink, the following thermal equivalent was used:
Then R_ha_diode and R_ha_mosfet was calculated to satisfy rated temperature of the diode and MOSFET. Here is where I think I am doing the procedure wrong, because the heat from the MOSFET does not influence the diode and vice versa.
By using heatsink data sheet I found the volume for different switching frequencies (the minimum feasible volumes were picked from the datasheet):
As you can see from the scatter plot in all cases where two heatsinks were used the total volume of the two heatsinks was smaller than using one heatsink. I am of course not asking if my numbers are correct what I am wondering about is:
Is my result logical, does it make sense that the total volume is smaller with two heatsinks?
Is the thermal modelling correct?
AI: The heat sink doesn't just dissipate heat.
When you connect both devices to the same heat sink, the heat sink will quite effectively carry heat from one device to the other. So, even when one of the devices isn't dissipating much (if any) power, if the other device is dissipating power, it's going to heat up both devices.
For an extreme example, consider two devices. One can run at, say, 120C all day long. The other has a maximum junction temp of 100C. It dissipates a lot while it's on, but has a fairly low duty cycle.
If each has its own heat sink, the low duty cycle part only needs enough heat sink volume to keep its temperature from rising above 100C during the short time it's on. We obviously want a little extra so we normally keep it below, say 85C. Still a fairly small heat sink though, because when the device is off, the sink still cooling the device, so the device has cooled to, say, 50C before the beginning of the next cycle.
But if we connect the two together, we now have to have enough volume to not only keep the lower-temp device from going above 100C in its short spike of usage, but we also have to dissipate enough heat from the constantly-on device to keep it below 100C all the time as well--specifically, far enough below 100C to leave some head room for the short cycle device to add still more while it's on, and still stay below 100C (and again, we undoubtedly really want to leave some cushion, so we probably want a maximum of 85 or so, not 100).
So, if the constantly-on device was connected only to its own heat-sink, it could run at 105C all the time, and still have a decent cushion. But if we connect the two together, we have to dissipate enough to keep it at or below 85C to have the same cushion. |
H: Voltage is 0.05 when switch is closed
I am new to electronics. Iam designing a simple circuit where I have to make a digital switch:
Here is what I have designed in Proteus:
There are 2 issues:
I want it to output 5V when I close the switch but it does opposite. It outputs five when the switch is open.
When switch is closed it gives 0.05 volts but I want 0V.
What changes should I make here?
AI: Swap the resistor and switch
Nothing is perfect. Your switch has resistance. Wanting "0V" is like saying you want something to be exactly one meter long. |
H: Is Lora maximum transmission 1 km in real?
I'm new to wireless communication and Lora.
I'm using Lora Ra-02 and Arduino UNO and small 800 Mhz antenna.
I'm using Arduino website library.
How can I increase that range? What do I need to do to get that 2-3 km urban range?
Does it need line of sight even in short distance communication?
What points should I focus on to have maximum range?
AI: The claimed range for low-cost wireless gadgets often represents a triumph of marketing over engineering. The range may be achievable "in free space" with a clear line sight between two units, but not in the real world with structures, vegetation, interference, and the curvature of the earth intruding.
Since the transmit power and receiver sensitivity of the modules are fixed, and assuming you've already chosen the lowest data rate protocol, your best best is to use better antennas, and antenna siting, on one or both ends. Instead of a short piece of wire protruding from the device, use coaxial cable to connect an antenna that is outside, and mounted higher above the ground if possible. If your devices are at fixed locations, you can even use directional antennas. With 6 - 10 dB of antenna directional gain, you can extend the range by the factor or 2 to 3 that you are seeking. Search for "800 MHz yagi antenna" and you'll find several. |
H: What is the maximum voltage I can set up on the AFG2125 function generator?
So, I'm picking up signals to work on the lab with the AFG2125 function generator. I have this generator on the lab https://www.gwinstek.com/en-global/products/downloadSeriesDownNew/5412/442 and on page2 it says:
AMPLITUDE RANGE <20MHz : 1mVpp~10Vpp(50 ohm); 2mVpp~20Vpp(open-circuit)
My question is, should I care about the 50 ohm termination or the open-circuit generator. What is this 50 ohm termination thing? I need to use the maximum voltage possible, as my circuit will attenuate the signals a lot. But is 10Vpp the maximum I can do, or can I go for 20Vpp?
AI: I just want to clarify something for your understanding. When you use 50 Ohm termination, the function generator is pretty much literally putting a 50 Ohm resistor in series with the signal inside the generator. So the max open circuit voltage will be 20V regardless of whether you use 50 Ohm termination or not.
If your load impedance is much higher than 50 Ohms, the termination will have little effect. For example, if you set the generator to 10Vpp with 50 Ohm termination, then look at the signal with an oscilloscope with high input impedance, it will still be 20Vpp. If you set the scope to 50 Ohm input impedance the signal will drop down to 10Vpp.
Hopefully, knowing this, you will be better able to make the decision about how you want to set up the function generator. |
H: Differentiating Equation containing modulo operation
(DC motor Single Loop setup)
I have the equation for flux containing mod operation of the angle as an independent variable.
the graph:
The textbook then directly derives the derivative of flux for the calculation of emf as follows:
My question is, where did the mod go after differentiation?
AI: They are simply calculating the derivative for \$0<\theta_R<\pi\$, and not giving a solution for the points of discontinuity.
The discontinuity happens because the brushes transfer from one slip ring to the other at that angle. But the real physical system won't have a mathematical discontinuity there. There will be some dead zone where the brushes lose contact with either slip ring, or some more complicated transition if the brushes can contact both slip rings at the same time.
This analysis chooses to ignore this complexity and just give a solution for all the other rotation angles, which will give a useful approximation for the overall behavior of the motor. |
H: DC to DC boost converter low frequency
I am looking for a DC to DC boost converter constant current with very low switching frequency to pass EMC.
Vin- 12V
Vout- 36V, 100mA.
Any suitable device for my above application?
AI: Build a Royer oscillator, the voltage step-up is mostly determined by the turns ratio of the transformer so find a 4:1 trasnformer... |
H: Terminating an audio line-in signal when source is disconnected
I've been trying to DIY a home audio setup. We have a pair of speakers in the ceiling of an upper floor (previously installed), and a new TV on the same floor. We wanted the sound of the TV to come out of the speakers.
The speakers are connected to an amp in the basement, and there are existing CAT5 cables running behind the new TV down to the basement. Rewiring is challenging, so we took advantage of the existing setup and got a cheap pair of audio-to-CAT5 baluns (https://www.amazon.ca/LINESO-3-5mm-Stereo-White-Extender/dp/B01HHO8382), hooked one side to the TV (3.5mm jack) and the other side to the amp in the basement. The TV sends audio to the audio-out port, through the balun, through the CAT5 cable, back through another balun, to the amp, which amplifies the sound and sends it to the speakers.
Now, for the fun part: when the TV is on, everything works great. But, if the TV is turned off and the amp is set to a loud enough volume, there's an audible mains hum (~60Hz) over the speakers. My best guess is that the CAT5 cables are picking up small currents from the mains over their length (not surprising as they run through multiple floors). When the TV is on, the TV's line out presumably sinks these stray currents (if not playing anything) or otherwise produces enough current to drown out the induced currents. When the TV is off, it disconnects its audio output; the amp's 47kΩ input is high enough and has high enough sensitivity to amplify the induced currents into a buzzing noise.
What can I do to reduce or eliminate the unwanted sound, ideally with a passive solution? I have thought about adding a resistor somewhere but I am not sure whether it would be in parallel or in series with the connection, nor what value it should have.
AI: I wonder if that's really a balun or just a straight-through connection?
Anyway, the output impedance of "line out" is apparently in the 100-600 ohm range. So if you want to try a passive solution I would start with a 1k resistor across each line. This will attenuate the output somewhat along with attenuating the noise. If it's too much, add 1k resistors in series with each other; if it's not enough, add one in parallel. |
H: How does moisture get into silicon chips?
Many chips have Moisture Sensirivity Level rating (MSL)
I am trying to understand how exactly moisture can get into a silicon packaged chip. Every document I read just states it can, but doesn't say how. E.g. this one from TI:
Once the dry pack bag is opened, moisture from the ambient air gets
into the device. If the floor life is exceeded and too much moisture
gets into the device during reflow, the moisture can expand and damage
the device.
My guesses are:
there are small holes between pins and silicon package where the water molecules can seep in
pins oxidize too much and make room for water to build up inside the outer edges of the chip
silicon is porous and soaks up water
Does anyone have an insight into any of these?
AI: Silicon is not the problem, the problem is with the plastic packages. Plastic is slightly porous. If the absorbed water turns to steam during reflow soldering, bad things happen. |
H: Voltage of parallel components (RLC circuit)
Say we have the circuit above.
The 6 A current is applied at t=0.
I'm trying to get the voltage across the inductor to get di/dt.
If I run this circuit in LTspice, it will show a voltage of 30mv across all nodes. I'm not really sure how I get the 30mv. I was thinking that since the inductor would be a short circuit at t < 0, the voltage across it will be 0V, hence di/dt would also be 0. But I'm confused about LTspicee's 30mv result.
AI: SPICE, in general, when no special considerations apply to the simulation card, tries to solve the circuit prior to simulation, i.e. it considers that the circuit has been running since the dawn of time, has had time to settle all the transients, and when the user presses "run", all that's left is the steady-state.
This is what happened here: you set the simulation card as .tran 10m, which has no special flags or settings, thus LTspice first tried to determine the steady-state before running the simulation.
Since you are interested in the dynamics of the circuit, then you have to tell that to the simulator, since it can't read minds. One of the conditions you mention is that the current source is switched on at t=0. I'll assume that the voltage source is DC only. You could add the uic flag, but that would force V1 to start from zero, too. It's more useful to modify the current source, only.
With these in mind, this is how you can try to model the circuit:
Notice how I've changed I1 to be a step source: PWL(0 0 1u 6). That means at t=0 it's 0, and in the course of 1 us it switches to a 6 A value. You cannot use a zero rise (or fall) time, since that would be a physical impossibility; no simulator would accept that. Those conditions are mathematical abstractions for the easyness of calculation (like the Dirac pulse). That's why there has to be a value for the rising time. There's also no need to exaggerate and make it 1 ps, partly because the differences in the output will be minimal, and also because all the SPICE engines use machine precision (usually double) to crunch numbers, so using extreme differences (1 ps vs fractions of a second time constants) might cause the matrix to be ill-conditioned.
If you say you need a derivative, you can right-click on V(x) in the waveform window and modify it to d(V(x)). Be careful: the waveform compression (default on) will affect the outcome. To turn off waveform compression add this to your schematic (reminder: press S): .opt plotwinsize=0. It will increase the size of the .raw file, but for this case, it shouldn't matter.
One other thing to know is that LTspice adds a default 1 mOhm series resitance to the inductors. This can be set to zero by right-clicking on the inductor and setting Rser=0 (or in the Control Panel > Hacks! > Supply a min. ..., which would make this setting permanent). One of the reasons for this is that many people added a voltage source straight across the inductors and then got voltage loop errors. There are other parasitics that are added behind the scenes, so if you really want to make the LC elements as ideal as possible, right-click on them and set to zero all the fields (except peak current for L, and voltage rating and RMS current rating for C -- thise are decorative, mostly). |
H: Magnetoresistance from self current
I have done this question on physics forum but for some reason my question didn't receive any attention there(maybe because physics site is for theoretical physicists mostly) and I have this question.
When there is current in a wire, a magnetic field is created around the wire. Will it affect the resistance of the wire at all or do we need an external magnetic field? And cN
AI: Yes, the magnetic field that is created by the current flowing in a wire is no better or worse than the external one (considering its geometry). You may get magnetoresistance as well as probably Hall effect.
The magnitude of these effects is another matter, of course. |
H: MSP430 Timer Interrupt Not Triggering
I'll post my code below.
The problem is that the MSP's ISR_TRAP function (a function that handles ISRs that are not otherwise handled) is triggering and trapping me in its endless loop. This happens after P2.1's ISR has successfully triggered, and before the Timer B ISR does anything.
The problems is that TB0CCR4 (Timer B's Capture and Compare Register #4) should trigger an ISR when TB0R counts up to the value contained in it. That value is TB0R+delay, where delay is currently just a global variable at the top of the code. According to the debugger in CCS, the timer is counting up to and past the value stored in CCR4, but not triggering the interrupt.
If the program worked as intended, the MSP's onboard red led would turn on when the button is pressed for P2.1, and then off when the timer reaches the value stored in CCR4.
I can't figure out what's going on here, and any help would be much appreciated. Especially if the explanation can shed some light on what the timer is doing/not doing.
#include <msp430.h>
//GLOBALS
unsigned int delay = 0x00ff;
//Main
int main(void)
{
WDTCTL = WDTPW | WDTHOLD;
P8OUT &= ~0xff;
P2OUT &= ~0xff;
P1OUT &= ~BIT0;
P2DIR &= ~BIT1;//input
P2REN |= BIT1;//pullup
P2OUT |= BIT1;//sit high
P8DIR |= BIT4;//output
P8OUT &= ~BIT4;//output low
TB0CTL = TBSSEL__ACLK | ID__1 | MC__CONTINUOUS | TBCLR;//enable TB0R and choose its options
TB0CCR4 = 0x0000;//Initialize TB0CCR4, just in case there's garbage in the register
PM5CTL0 &= ~LOCKLPM5;
__enable_interrupt();//enable interrupts
P2IES |= BIT1;//falling edge interrupt on P2.1
P2IFG &= ~0xff;//clear flags
P2IE |= BIT1;//interrupts enabled on P2.1
while(1){}//go forever
return 0;
}
//INTERRUPTS
#pragma vector = PORT2_VECTOR //interrupt vector for port 2
__interrupt void Port_2(void) //interrupt function names can be anything
{
switch(__even_in_range(P2IV,P2IV_P2IFG7))
{
case P2IV_NONE: break;
case P2IV_P2IFG0: break;
case P2IV_P2IFG1: //P2.1 vector
P2IE &= ~BIT1; //disable interrupts
P2IFG &= ~0xff;
TB0CCTL4 |= CCIE; //enable timer interrupts
TB0CCR4 = TB0R + delay; //set next event
P1DIR ^= BIT0; //enable output
P1OUT ^= BIT0; //turn on onboard led
break;
case P2IV_P2IFG2: break;
case P2IV_P2IFG3: break;
case P2IV_P2IFG4: break;
case P2IV_P2IFG5: break;
case P2IV_P2IFG6: break;
case P2IV_P2IFG7: break;
default: break;
}
}
#pragma vector = TIMER0_B0_VECTOR //interrupt vector for timer B
__interrupt void T0B7_ISR(void)
{
switch(__even_in_range(TB0IV,14))
{
case 0: break;
case 2: break;
case 4: break;
case 6: break;
case 8: // ccr4
P1OUT ^= BIT0; //toggle onboard LED
P2IE |= BIT1; //re-enable interrupts after delay
TB0CCTL4 &= ~CCIE; //disable interrupts on CCR4
break;
case 10: break;
case 12: break;
case 14: break;
default: break;
}
}
AI: The manual says:
Timer_B Interrupts
Two interrupt vectors are associated with the 16-bit Timer_B module:
TBxCCR0 interrupt vector for TBxCCR0 CCIFG
TBIV interrupt vector for all other CCIFG flags and TBIFG
TIMER0_B0_VECTOR is for TB0CCR0; TIMER0_B1_VECTOR is for the other CCRs and TBIFG and is handled with TB0IV. Your CCR4 must be handled with the latter.
(And there are symbols for the vector values, something like TB0IV_TBCCR4 or TBIV__TBCCR4.) |
H: Normally open capacitive sensor with MOSFET is closing relay, how can I make it open?
Would love some help here, I know next to nothing about electronics.
I've been asked to fit a normally open (NO) capacitive sensor to a MOSFET to operate a relay.
My problem is it is working backwards to the way I need it to.
I have a 24V supply to the relay +ve, the mosfet source is connected to the relay -ve.
Drain is connected to ground.
Gate is connected to the sensor, and I have a resistor from the sensor/gate to ground.
When the sensor detects an object it goes to 24V, and the MOSFET is then closing the relay which is activating a pump. But I need the opposite result, when it detects an object it needs to open the relay and turn off the pump.
The task was to replace a NPN-NC sensor with a PNP-NO sensor. Knowing nothing about MOSFETs I read that this would require switching from an n-channel one to a p-channel one. I guess I didn't understand that p-channel MOSFETs can be enhancement or depletion. So I think I've got a MOSFET that does the same as the previous one did, hence the logic is now backwards from what I wanted as the sensor is switched.
Unfortunately I do not have time to find another MOSFET, order and test it. This has to be operational today. Is there anything I can do with what I have?
AI: Here's a way, without the mosfet.
The sensor, capable of switching 200 mA, can easily drive the relay's 12.6 mA coil.
The 'NC' contact of the relay is used to turn off the pump. |
H: Why is this relay turning on when booting up/shutting down my Raspberry Pi?
I bought this relay from Amazon.
I'm trying to use it to turn power on/off for a stepper motor I'm using. I've previously used a single channel relay for this which turned on when the signal was HIGH and off when the signal was LOW. It seems like this new relay works in exactly the opposite way. I'm guessing this is because the 4-channel relay is "active low".
It currently works if I just send LOW when I need to turn it on and HIGH when I need to turn it off, even if it seems counter intuitive to do it this way.
My main concern is the relay is almost on when the Raspberry Pi is booting up for the first few seconds. By almost on I mean that the LED signalling me that the relay is in its normally-closed position is on, but not as bright as when I turn it on by sending the LOW signal to it. I don't think current is passing through it in this state.
This almost-on state also appears after I turn off the Pi with sudo shutdown now. As you can imagine, I would prefer the relay to be completely off in this state. Here's a diagram of how things are wired:
I have also tried adding a pull-down resistor, although I'm not sure I'm doing it right, see diagram below. With this wiring, the almost-on state mentioned above is turned into an on state, which is even worse, because current is flowing through the relay from boot until I run the script and send a HIGH signal to the relay.
How should I wire things so that the relay doesn't turn on when the Pi boots up/the script is not running/ Pi shuts down?
Less important: is there a way to turn on the relay by sending HIGH and turn it off by sending LOW?
AI: If the relay module needs pulling high to turn it off, then you need a pull-up resistor to 3.3V, not a pull-down resistor to GND. I'm not sure what the 1K resistor is for.
On most microprocessors, a GPIO pin can be in one of three states:
Output low
Output high
Input, high impedance
(Because it's a GPIO pin, not a GPO pin).
On powering up, the safest option is the third - high impedance. That way, if the pin is intended to be inputting a signal from another system, the processor won't mess things up by pulling the GPIO pin high or low, and damaging either itself or the circuit that's driving it. |
H: How to make one switch control multiple identical subcircuits?
I have an audio circuit with 8 identical subcircuits (one for each voice).
In each subcircuit or voice, a resistor controls one aspect of the sound.
I would like to have a switch which allows me to switch between two different resistor values in that part of the circuit, thus altering the sound.
However I would like this single switch to make the same change simultaneously in all 8 subcircuits. What approach would you recommend?
AI: What approach would you recommend?
A likely candidate is an analogue switch. You can get multiple independent analogue switches in one IC package and each can be "switched" on or off independently or together. They are also called transmission gates and when several are used together to form a multi-pole switch it is called an analogue multiplexer/demultiplexer.
You can get ICs that contain several (as already mentioned) and you some ICs have normally closed and normally open types in the same package. You can choose the on resistance to be from around 1 ohm to several hundred ohm and the off-state leakage current can be a few nano amps.
Usually, the control lines that are used to switch them on or off are digital voltage referenced making life easy if you want to control it from a microprocessor. Switching speed can be many MHz (if you need it).
One constraint - it has to be capable of running from the same power supplies as your circuit and the analogue voltages that are used have to be within those power rails. |
H: Connect crystal to low jitter clock generator
I have this TSX-3225 25MHz crystal. It has two outputs (pin3 and pin1).
I want to connect it to the CDCM61001 low jitter clock generator. The CDCM61001 has one crystal input (XIN).
Should I connect one of the two outputs to XIN and tie the other one to ground?
the TSX-3225 has two unconnected pins (pin2 and pin4) does it matter if I tie them to ground or let float?
Link for the CDCM61001: https://www.ti.com/lit/ds/symlink/cdcm61001.pdf?ts=1603113603064&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FCDCM61001
Link for the TSX-3225 25MHz: https://support.epson.biz/td/api/doc_check.php?dl=brief_TSX-3225&lang=en
AI: Should I connect one of the two outputs to XIN and tie the other one
to ground?
Just take a little time and read the data sheet: -
the TSX-3225 has two unconnected pins (pin2 and pin4) does it matter
if I tie them to ground or let float?
Connect them to ground/0 volts. |
H: Getting the transfer function of a parallel RC circuit. Am I allowed to simplify/remove the component I am trying to solve for?
simulate this circuit – Schematic created using CircuitLab
Say we have that simple parallel rc circuit and we were tasked to get the transfer function of V_c(s)/V_i(s). We were told that it is not advised to remove/simplify the component of what you are trying to solve. But the I cannot seem to find out what to do without combining the capacitor and resistor to get the transfer function. This is my attempt with the solution:
AI: You are allowed to do whatever artifices, they only say it's not "recommended" (why? I don't know). So, one other way is by Kirchoff: solve for the currents or voltages and derive the transfer function from there. Or try differential equations, they'll be 1st order, so it won't be as complicated. There are other methods, FACTS comes to mind (Verbal Kint might have a word or two about it), but if your teachers advised you not to modify the circuit, it might not please them. I thought I'd throw in some MathJax, but it looks like you are good with the equations, so I'll leave the pleasure to you. But, if you think it's necessary, I'll oblige.
@Thriloknath palla bellow showed something similar to what I was talking about. For example, apply mesh equations, considering two (obvious) meshes, with currents \$i_1\$ and \$i_2\$ running clockwise in each:
$$\left\{
\begin{aligned}
v_i&=R_1i_1+\frac{i_1-i_2}{sC} \\
\frac{i_1-i_2}{sC}&=R_2i_2 \\
\end{aligned}
\right. \\
\Rightarrow \\
\left\{
\begin{aligned}
i_1&=\frac{v_i(sR_2C+1)}{sR_1R_2C+R_1+R_2} \\
i_2&=\frac{v_i}{sR_1R_2C+R_1+R_2} \\
\end{aligned}
\right.$$
Since the voltage across \$R_2\$ is the one that's needed, \$i_2\$ is the solution of interest, and \$\frac{v_i}{i_2}=R_2\$, thus the transfer function becomes:
$$H(s)=\frac{R_2}{sR_1R_2C+R_1+R_2}=\frac{\frac{1}{R_1C}}{s+\frac{R_1+R_2}{R_1R_2C}}$$
\$H(0)=\frac{R_2}{R_1+R_2}\$ gives you the attenuation at DC. Which is a rather more convoluted way of solving the way you did. It might pay off for higher orders, though. BTW, you didn't simplify anything, you simply considered a temporary variable holding the result of \$R_2||C\$, that's all (in case your teacher says anything). |
H: Is a transfer function of a hole system BIBO and asymptotically stable, if the poles of the two sub systems shorten each other out?
I have the calculated the transfer function of system one $$
G_{1}(s) = \frac{-(s-2)}{(s+1)^2}
$$
and of system two
$$
G_{2}(s) = \frac{s+2}{s-2}
$$
Now I have to check if the hole system $$
G(s) = G_1(s)\cdot G_2(s)=\frac{-(s-2)}{(s+1)^2}\cdot \frac{(s+2)}{(s-2)} = \frac{-(s+2)}{(s+1)^2}
$$
is BIBO and asymptotically stable. The question is, if a pole is shorten out by the mutiplication with the other system, is it still BIBO and asymptotically stable? If I look at the hole system G(s) it is both, it has it poles with Re < 0 and the final value theorm is proofing a asymptotic stability.
But G2(s) is not asymptotically or BIBO stable. Is G(s) still asymptotically and BIBO stable or can it not be it, because one sub system is not asymptotically/BIBO stable?
AI: Bibo stability is all about systems external stability which is determined by applying the external input with zero initial condition (transfer function in other words) so if you check bibo stability of G(s) ,it would be bibo stable
But
Asymptotic stability is all about systems internal stability which can be determined by applying the non zero initial condition and no external input ,and if two system as in your example are cascaded if any one of them is unstable(or both) then its modes will not decay and reaches up to infinity (in your example) after infinite time ,so G(s) would be asymptotic unstable |
H: Meaning of $ within LTspice netlist
I am trying to further understand the .cir file I have downloaded from Infineon that I am using to model some of their mosfets in LTspice.
In the below example can anyone explain the lines starting with X$M? I can't find this format in any notes elsewhere
(note: Z27 and Z28 are other .subckt functions in the same .cir file)
AI: It could be that it's just an atypical character that's used simply because it's allowed and it stands out. The line starts with X, which is the designator for subcircuit. Whatever characters follow afterwards have to meet one single criterium: they have to be allowed by the parser (i.e. no errors should appear, the circuit should run).
$ and the M afterwards might suggest that it's an artifice simiar to what LTspice does when it substitutes elements, behind the scene. For example using [Misc]/Epoly with the FREQ keyword (bogus example):
E1 out 0 FREQ {V(in)} (0,0,0) (1,1,1) (2,3,4)
makes the expanded netlist to show up this line:
B§E1 out 0 V=V(in) FREQ (0,0,0) (1,1,1) (2,3,4)
So in this case it might be that some MOSFET (which M designates) might be involved, as in there was a schematic which had a subcircuit mimicking an MOSFET (it had the designator M), but LTspice detected it's not a .model and, when the general subcircuit was created, someone replaced the § with the $. The not labels seem to agree. It could be, it could be not. But the end result is that it's an allowed character and can be safely used; nothing to worry about. |
H: RS-485: what happens when bus contention occurs
I'm refering to an half-duplex RS485 application which consists of a master and multiple slaves like in the circuit below (I'm using an ST3485).
simulate this circuit – Schematic created using CircuitLab
From my understanding, the drivers outputs are tri-stated (high impedance when receiving, high/low when transmitting). As RS-485 transmition is done using a common mode signal, I believe that the devices do not neccessarily have to share common ground (is that true?), but in my case, the master provides the slaves with power, so I'm going to have a ground connection.
My question is, what will happen in case of a bus contention, so if e.g. both slaves transmit data at the same time? Sure, the data received by the master will be corrupted, but does this also harm the drivers?
If yes, what measures are typically taken to protect the drivers?
AI: RS-485 does need to share a reference for communication. The allowed maximum difference between grounds of different nodes is +/- 7V, so without providing a common ground reference between nodes, the voltage might be exceeded and nodes could get damaged or at least they would not communicate properly. The common ground reference might be a separate wire between devices, or for example devices could be referenced via mains earth.
When two devices drive a bus to opposing state, a lot of current flows and the voltage level is indeterminate. Fortunately, the datasheet of the driver you have says the outputs have overload protection.
Standard protection procedures include series resistances or self-resetting polyfuses, but in general, the drivers are able to protect themselves from occasional bus contention. |
H: Decoupling capacitors for ADC
I have this ADS6125 adc. In the datasheet it is written that this ADC uses internal decoupling:
"capacitors on-chip eliminates the need for external decoupling" (p.45)
"As ADS612X already includes internal decoupling, minimal external decoupling can be used without loss in performance" (p.55)
It says minimal decoupling is enough. But what is minimal?
In my design I am using 3 decoupling caps for each supply pin. Could I get in trouble for using too many decoupling caps?
ADS6125 datasheet:
https://www.ti.com/lit/ds/symlink/ads6125.pdf?ts=1603138441413&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FADS6125
AI: The ADS6125 has an Evaluation Module (EVM), here: https://www.ti.com/tool/ADS6125EVM
This includes a schematic, including recommended bypassing. TI is good like that. |
H: Making AND and OR gates using the projection gate
Is it possible to make the AND logic gate or the OR logic gate by using only q or p projection gates?
The q projection gate truth table:
P Q R
0 0 0
0 1 1
1 0 0
1 1 1
The p projection gate truth table:
P Q R
0 0 0
0 1 0
1 0 1
1 1 1
AI: Assuming I am reading your notation properly, P and Q are the function inputs and R is the output.
For the q projection gate it looks like P is irrelevant and R = Q. That is to say, for any value of Q, I can change P to any value and it doesn't affect the result.
for the p projection gate it looks like Q is irrelevant and R = P. That is to say, for any value of P, I can change Q to any value and it doesn't affect the result.
So basically you have two gates where the output is just equal to the input. From a logic circuit standpoint you could combine as many of these gates as you wanted, but ultimately the final output would just be equal to one of the inputs. It would not appear that there is any combination of gates that could yield any of the common functions such as AND, OR, NOT, XOR, NOR, NAND. |
H: Do electrons go towards higher voltage or lower voltage?
Can someone clear this up for me once and for all? I feel like Thomas Edison really screwed me when he made everyone believe that current is movement of positive charges.
Do electrons go from high voltage to low voltage or from low voltage to high voltage?
AI: I feel like Thomas Edison really screwed me when he made everyone believe that current is movement of positive charges.
As we're 'clearing things up', let's be very careful in our language.
Current is the movement of charges, both negative and positive.
Current, aka Conventional Current (because its direction is subject to a convention), is defined to flow in the direction the positive charges are moving, and opposite to the direction the negative charges are moving.
In any given medium, there may be several species of particle that carry charge, and are able to move, and so can give rise to a current.
In water, the OH- and H3O+ ions are able to move.
In ice however, only the H+ can move.
In copper sulphate solution, [Cu(H2O)6]2+ and SO42- are mobile
In semiconductors, the holes1, and some of the electrons, are able to move
In metals, some of the electrons are free to move.
In a fully developed plasma, all of the electrons, and the bare nuclei, are free to move.
When you do a mesh analysis of a circuit, you label the mesh with current direction arrows. This can be done arbitrarily, and the solution will tell you whether the currents are negative or positive. In any non-trivial mesh, you will have to add and subtract currents, and this would be true regardless of the convention you use for the direction of conventional current.
Do electrons go from high voltage to low voltage or from low voltage to high voltage?
If by 'high voltage' you mean 'more positive voltage', then a mobile electron would tend to move to a high voltage electrode, as would all other negative charge carriers. Mobile positive charge carriers move to the less positive electrode. So for instance in copper sulphate electrolysis, the copper anode dissolves, as the copper ions move across to the cathode.
1 A hole is just as much of a quantum mechanical particle as an electron, it has mass, velocity, momentum, charge. I'm not saying it is a particle, just if that you model an electron as a particle for conduction purposes, then the same model fits a hole. |
H: How does input voltage ripple affect output voltage of linear regulator?
The problem starts with my 3D printer which is powered by a 12V SMPS. When it drives a heavy load such as heated base and hot end, it causes a ripple on the 12V rail. Also it affects the 5V rail with the same ripple as the image shows.
Note: My printer uses Ramp 1.4 with Arduino Mega2560
Note:
Chanel A is 5V from Arduino Mega, Chanel B is 12V from PSU.
For ramp1.4 , For Arduino Mega 2560
What I want to know is:
How does this happen? As I know, voltage regulator should regulate all above 5V+(dropout voltage), so it should be a flat 5V line.
How to fix or prevent this? (Do I need to add some component filter or change regulator ICs?)
AI: In the datasheet of a linear regulator there should be a parameter called "power supply rejection ratio" (PSRR), which describes how much the ripples on the input voltage get suppressed. In fact this parameter is frequency dependent, wherefore there should be a graph about the course of PSRR over the frequency of the input noise.
Example: Linear regulator with 5 V output voltage and 60 dB PSRR @ 1 kHz. Input voltage around 7V but there is an oscillation of 1 Vp-p and 1 kHz frequency on the input signal. The output voltage will be around 5 V with the oscillation suppressed by 60 dB, so Vp-p of the oscillation would be around 1 mV.
Without further information about your circuit and components I can't really say much about that. A simple point would be to get a linear regulator with a higher PSRR, but I don't know if that is possible for your application. |
H: Why does converter's efficiency degrade with higher V_IN?
Please consider the following efficiency graphs of the exemplary MP2384 buck sync converter:
What I am trying to understand is why is the efficiency at light loads worse for the cases in which the VIN value is a lot higher than the VOUT. In the end, the efficiency difference is negligible for higher loads. This behavior I have observed for different buck converters in the past as well. I would appreciate all feedback regarding this case.
AI: The part of the chip that does the management (the comparator, the voltage reference, the PWM generator and various low-level interface circuits) take some amount of current i.e. they are not self-powering and that's basically the main clue. They require current and that current/power quite often is provided by a low-level LINEAR regulator.
Given that the efficiency of that (or any) linear regulator worsens proportional to input voltage, then that linearly regulated power eats into the overall efficiency of the full converter and, it's more obvious at higher input voltages and lower output load powers.
Here's what the quiescent power required by the converter is at various input voltages: -
So, when Vin = 19 volts, the device is "wasting" 2.2 mW and, given that in your 3.3 volt efficiency diagram (on the right) there is a load power of 33 mW at 10 mA load you can begin to see that the "management stuff" is becoming a significant factor. The actual implied losses when producing 10 mA at 3.3 volts will be from the MOSFETs and inductor. They don't come for free either.
So, if I were to add things up, to make an output power of 33 mW at an efficiency of 84% requires a total power in of 39.3 mW. Given that the management stuff consumes about 2.2 mW that leaves about 4 mW wasted in the MOSFETs and inductor.
On a high load power, the 2.2 mW consumed by the management stuff becomes trivial because most of the losses are being created by the MOSFETs and inductor.
For instance, with a 4 amp load and Vout = 3.3 volts, the output power is 13.2 watts. The graph's stated efficiency is 94% hence, the total power is 14.04 watts. In other words 0.84 watts are wasted by MOSFETs and inductor and, it's just not worth trying to factor in the 2.2 mW of the management stuff. But clearly they are significant when you are talking low output powers. |
H: H Bridge Gate Driver Current Sensing
I want to build my own 120A Electronic Speed Controller and decided to try it with the DRV8305 IC. I am by no means a hardware expert, so go easy on me.
On page 45 of the DRV8305 datasheet: https://www.ti.com/lit/ds/symlink/drv8305.pdf?ts=1603013837741&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FDRV8305
You will see SN1, SP1, SN2, SP2, SN3, SP3 as the connection points for 3 sense resistors. In many other datasheets, I see that all low side sources are connected together in a single shunt resistor. Page 47 describes just using 1 shunt, but I am not sure what the trade-offs are. What information do I get by using 3 instead of 1 and can I just use 1 to drive a sensor-less BLDC motor?
Another question I have is how to choose a shunt resistance value. In many datasheets examples of the rated current are like 10A, but I want a rating of something like 120A (common ESC rating). In the examples, the shunt resistance is something like 5 mOhm, but for 120A, I would need something like 500 uOhm. At that resistance, isn't the resistance so low that the PCB trace resistance dwarfs the sense resistor? If my sense PCB traces are even 1mm different from each other, that could be ~3 mOhm, about 6x the shunt. What is the solution here?
Thank you :P
AI: If you'd take time to read a bit more through the datasheet, you'll find that two pages below, in the Current Sense Amplifiers section, this text appears:
The DRV8305 provides three bidirectional low-side current shunt amplifiers. These can be used to sense the current flowing through each half-bridge. If individual half-bridge sensing is not required, a single current shunt amplifier can be used to measure the sum of the half-bridge current. Use this simple procedure to correctly configure the current shunt amplifiers. [...]
So it's up to you to determine if you want to use three separate sensing resistors, or not.
As for the values for 120 A currents, you may want to look into current transformers for that, or Hall sensors, since the last sentence in that section states that with 5 mOhms resistors:
These values allow the current shunt amplifiers to measure ±33 A across the sense resistor.
Which might suggest that 0.5 mOhm would suffice for your application, if it weren't for the dissipated power: 0.0005*120^2=7.2 W.
In short, if you have reasons to monitor the current through each leg, do so at the expense at three current sensors, oterwise it's just like using one single sensor on the supply. Don't just guide yourself on "what others are showing", because each "other" datasheet has its own applications in mind. It's all about the current requirements. |
H: phono preamp input stage - exotic design
I found a very exotic (at least for me) moving magnet input stage of a phono preamp. It's taken from an old cartridge measurement system from renown brand. I simply can't figure out the logic behind this circuit.
Applying "hot" signal to both inverting and non-inverting output? In what configuration does this op amp work?
Placing a large capacitor between the hot signal and the ground? Does it make any sense?
Any input and thoughts much appreciated.
AI: Applying "hot" signal to both inverting and non-inverting output? In what configuration does this op amp work?
Nope. Look again carefully. Left and Right inputs are applied to the non-inverting inputs of their pre-amplifiers.
In what configuration does this op amp work?
I'll explain over one preamp since both preamps are identical.
The input is closed with a 47k resistor.
Anti-parallel 1N4148 diodes limit the input to the ±0.7Vpp.
1nF-100R pair provides frequency compensation (Today's opamps are internally compensated but this old one requires compensation externally).
The amplifier stage is nothing different from a non-inverting amplifier. The gain of this section is unity at DC thanks to the 150uF capacitor in series with 2k. At AC, this capacitor becomes short, so the net gain becomes Av=1 + 61k9 / 2k = 32. The 8p2 capacitor brings a high-cut in conjunction with 61k9 resistor. Its cut-off frequency is fC = (2 pi 61k9 8p2)-1 = 313kHz. |
H: Why does the voltage drop when powering, then reverse when disconnecting this electromagnet?
I've just bought a 12V 260mA electromagnet and I have some questions about it
I don't know why, but when I connect electromagnet, my 12V power source (9V and 2 1.5V AA batteries in series) drops to 8V. I suspect that this is because of the protection of the 9V battery, because the 9V battery drops to 5V whereas voltage drop of 2 1.5V AA batteries is negligible, and when I try different 9V battery, it keeps and slowly drops to 2V.
When I disconnect the electromagnet, it seems that it sends reverse voltage, Before I disconnect, my multimeter connected in reverse reads around -8V, but when I disconnect it, it reads around 2V. Since I'm gonna switch electromagnet using transistor, would this reverse voltage be harmful? If so, just connecting the diode would prevent this?
My original plan is using 2 9V batteries in series to create 18V and using a voltage divider to divide it into 6V and 12V, and using 6V to power the rest of the circuit. If the voltage drop stated in 1 is actually caused by the protection of 9V batteries, is there any way to bypass it?
AI: Your plan of using 9v "transistor radio" batteries is not workable for this purpose.
Probably the minimum suitable would be a series collection of some number of AA cells. It's better that you use conventional flashlight batteries and not lithium for such a learning process.
A voltage divider is not really suitable either, rather tune the number of cells to fit your need. If you really wanted power adjustment you'd probably use PWM controlled by an MCU.
Your coil is an inductive load so if electronically switching it, you need to put a diode "backwards" across the coil to provide a path for the inductive kick at turnoff.
You may wish to search and read the various questions here on controlling a solenoid or relay coil with a transistor, as that is basically what you are also doing. |
H: Modelling an STM Tip current
As part of a current-to-voltage preamplifier that I'm working on improving, I'm trying to model the current source of an scanning tunneling microscope (STM). The way it works is described below (based on my understanding), with the block diagram shown below. Given a material sample, it is biased at some voltage level. The STM has a special tip, and a current passes through the tip from the biased sample, with the STM using that current measurement as a way to view the surface of the sample. The tip starts at X=0, and it moves up/down until the computer measures a specific current. Once it sees that current, it moves on to X=1 (or whatever the next point is) until it reaches the end. Think of it as scanning in a grid-like motion.
simulate this circuit – Schematic created using CircuitLab
This block diagram may be more complicated than I'm making it, but this shows the rough idea of how it works based on my understanding. That tip current is converted into a voltage for measurement later on. In LTspice, I was simulating the current as an ideal current source, but how do I model the parasitic capacitance between the tip and the sample? Is there a standard value that is used to model the parasitic capacitance, or does it vary?
AI: Capacitance of a parallel_plate capacitor is
C = E0 * Er * Area/Distance
You can insert values for area and distance.
The Er of air is 1, as is vacuum.
Eo is apbut 8.89e-12 farad/meter.
=============================
You might get better accuracy by using formula for round_surface (your needle) to a plane. |
H: How is this circuit a negative resistance oscillator
I found these oscillator configurations(all are similar) at various sites on the web, but here and here the author says its a negative resistance oscillator. It's a popular oscillator among amateur radio enthusiasts due to its ability to oscillate at a wide range of frequencies, its often called emitter coupled oscillator/differential pair oscillator etc. Such one is even briefly touched on the book Experimental Methods in RF Design
Circuit 1
Circuit 2
Circuit 3
Circuit 4
Circuit 5
Circuit 6
My question is that, is these circuits negative resistance oscillators, if so how is negative resistance achieved in these circuits? If not, how does such circuits oscillate?
EDIT: I found another different circuit that is said to be negative oscillator too. I would like to add it to the question too. The page also contains several other circuits similar to the ones shown above.
Circuit 7
AI: Here's just the negative resistance part.
With zero voltage on the base of Q1, there's a current that flows into the base of Q1 and the collector of Q2 (through R2). If the voltage at the base of Q1 is raised, the voltage at the emitter of Q2 is raised. This decreases the amount of current being pulled into the parallel combination of Q1 base and Q2 collector.
So more voltage gets you less current -- that's effectively a negative resistance.
You can find this out more formally by simulating the circuit, or by drawing it out and analyzing it on paper.
simulate this circuit – Schematic created using CircuitLab |
H: How do I combine outputs in Simulink by changing a specific parameter?
I am studying a Cruise control system, and I want to change the coefficient of rolling friction and put them together in one graph keeping the remaining parameters the same. How do I store all the data in one graph?
AI: Combine the signals with a bus creator, then attach them to a scope. Each figure in the scope window can have 1 bus as an input. You can then export all the data to matlab (which will appear as a struct)
Source: https://www.mathworks.com/help/simulink/slref/buscreator.html |
H: What does a transceiver like MAX 483 do, especially when it is connected to RS-485?
I cannot understand the principle that the transceiver uses. Why do we need to connect it to RS-485, and how is the data transmitted? I mean how does it transmit the data and why? It is like I cannot understand the concept.
These are the datasheets, but I am more interested in what they do rather than the technical characteristics.
https://datasheets.maximintegrated.com/en/ds/MAX1487-MAX491.pdf
https://www.st.com/resource/en/datasheet/st485b.pdf
AI: It's almost never a good practice to connect the two MCUs' RX-TX pairs directly for relatively long-range (e.g. >2m) asynchronous serial communication. The possible problems are mostly solved by RS-485.
RS-485 has a differential line (consisting of A and B lines) for relatively long-range asynchronous serial communication. But your MCU does not have the capability of direct communicating through a differential line.
What that xceiver does is to make the bidirectional conversion between the differential line and your MCU's single-ended signaling:
The xceiver takes the data from the differential line and converts it to a single-ended signal so that your MCU can read it directly (through RXD pin),
Tthe xceiver takes the single-ended data from your MCU (through TXD pin) and puts it on the differential line so that any other device on the line can access the data. |
H: Why do we use PQ and PV buses when solving a power flow equation?
It seems like it would be much easier to just use the admittance matrix and measured voltages to find all the currents and then just use that to get all the power flows. Why not this instead of the PV, PQ iterative solution using Newton Raphson?
AI: We do both. Taking measurement data (voltages, flows etc.) from part of the system we run state estimation solvers to find a solution for the system. See if this helps.
Offline load flows are very useful for system planners. |
H: How to handle delta function after finding the impulse response?
I am pretending that laplace does not exist because I am being tested on these concepts separately.
Essentially, I have solved for the step response of a first order circuit and found it to be:
$$v_{c}(t)=\left(\frac{-5}{99}e^{-5t}+\frac{106}{99}e^{\frac{-t}{20}}\right)u(t)$$
I'm only dealing with LTI systems so I know that the impulse is the derivative of the step, but I will be left with some terms attached to the delta function, and some terms attached to the unit step function.
$$h(t)=
\left( \frac{-5}{99}e^{-5t}+\frac{106}{99}e^{\frac{-t}{20}} \right)\delta(t)
+
\left( \frac{25}{99}e^{-5t}+\frac{53}{990}e^{\frac{-t}{20}} \right)u(t)$$
If I want to use the impulse response in the convolution integral, how do I handle these delta terms to make it less... convoluted? Do they reduce to a constant?
AI: You don't have to worry about \$\delta(t)\$ since the integral of it results in \$u(t)\$. Even integrating it alone gives \$\int_0^x{\delta(\pm t)\text{d}t}=2u(x)-1\$. So whatever convolutions you'll have with \$h(t)\$ will include the step function in the result. BTW, the derivative is with \$-\frac{53}{990}\$ in the 2nd term. |
H: input capacitor for buck converter
To calculate the input capacitor for buck converter, I follow TI Application Report SLTA055–FEBRUARY 2006 "Input and Output Capacitor Selection".
It says to determine the input capacitor "75 mVpp is recommended for maximum input voltage ripple. This will yield approximately 22 mVrms of ripple voltage"
The question is how we select this value 75 mVpp?
thanks
AI: From section 1.1
As a general rule of thumb, keeping the peak to peak ripple amplitude
below 75 mV keeps the rms currents in the bulk capacitors within
acceptable limits.
Emphasis mine |
H: Details about driving circuit of mosfet
I want to know the reason behind why this elements are connected in mosfet driver circuit. Basically I want to know the use of this elements .
elements are
(1)R1,R2 and diode in parallel with them
(2)R3,R4
AI: The resistor is there to control the gate charge current and through that the MOSFET off-to-on time. It's important for the whole bunch of reasons. My personal favorite is that MOSFET going on too fast creates current through the miller capacitance (D to G) and makes itself oscillating (sometimes kills the driver and other circuits, if totally out of control). Other reason is EMI. The resistor of course comes at a tradeoff: the MOSFETs gets hotter.
The diode is there to quickly discharge the MOSFET gate and turn it off.
Pull down resistors ensure that when the driver is off, the MOSFET's gate is discharged. Without it it can pick up noises, randomly open, destroy itself and the other one. |
H: Bootstrapping circuit in IR2101
Please explain how the bootstrapping circuit help in driving both the mosfets connected to IR2101 driver.Please explain this by taking an example of any voltage so that I can understand easily.Explain how the capacitor charging and discharging during this procedure and the use of diode and resistor connected.
It will be really helpful for me if someone explain this
AI: Suppose u r going to drive a mosfet bridge (half or full) with all n-channel mosfets. Obviously there's no problem driving the low side mosfet, because its source is connected to GND and u can simply drive the gate pin with a 12v signal. But the challenge is how to drive the high-side mosfet, since its source is not connected to GND and is floating, and u have to apply a 12v on gate-source pins. For example with a bridge voltage of 100v, u need a 112 volt on its gate to drive it. The solution is "bootstrap". In this technique, as can be seen on schematic, a diode with a cap is used. When the low-side mosfet is ON, the cap is charged through diode and the ON mosfet. If Vcc of IR2101 is 12v, the cap is charged up to 11.3v (0.7v drop because of diode). Then the low-side mosfet is turned on and it's time to drive the high-side mosfet. In this case, we have a floating voltage supply of 11.3v stored in the cap which will serve the driver circuitry inside IR2101. So, the voltage on the minus pin of cap is 100v and the voltage on its plus pin is 111.3v (and the diode is in reversed bias). This voltage is used to apply on the gate-source of high-side mosfet.
This "cycle" continues over and over. The bootstrap cap is charged during low half-cycles and serves (and of-course discharges) in high half-cycles. |
H: How to make a current source that supply constant current independent of a voltage power supply?
I want to design the simplest possible circuit that drives an LED. The LED must load the same amount of current whatever the voltage is at the input, between 5 and 9 V. The current could be 10 mA. I assume that must be a certain constant current source? Or maybe a window comparator?
AI: My suggestion would be an Nexperia NCR401T as long as you can accept a maximum Vf of your LED being limited to 5 (minimum input)-1.4 (dropout) = 3.6 V.
A three terminal device but no external components needed.
Datasheet
Another suggestion would be a single JFET, which you need to pick (Perhaps hand-pick if your tolerance is too narrow) for your 10 mA.
Going up to two components, you get a little bit more refined solution if you add a resistor so you can adjust your JFET solution to get your desired current. |
H: How to crimp JST VHR series?
I need to crimp the 18 awg wires into the 3-pin female JST VHR connector, but have no clue as to how to do it. How would the crimp latch onto the JST housing? Can somebody point me to any helpful resources?
Thanks!
AI: You already have an answer apparently pointing out the "proper" tool, which you could also determine from manufacturer guidance.
If you only need to do a few for prototype use however, there are more universal manual solutions, such as the Engineer PA-09 and PA-20. These require some degree of skill and experimentation to produce acceptable results, but are a pragmatic solution when you have more variety than you can justify having unique tools for.
Apparently official removal tools are expensive. A small jeweler's screwdriver makes an unofficial one, be careful not to bend the locking tab too far or you may have to bend it back and/or replace the contact.
You appear to have stripped far too much insulation, typical connectors crimp once on the bare wire and then also just past that over the insulation, but details vary - and vary even more if you end up needing to improvise with an official unsupported wire size.
Ultimately what the best solution is depends on the volume and requirements of your need... |
H: Gray code usage in modulation constellations
When mapping symbols of various modulation constellations, Gray code is used such that - each adjacent symbol only differs by one bit.
Why do we want small physical changes in the signal to correspond to small changes in the symbol ?
Why not use binary mapping ?
AI: Because of noise and channel distortion. Any noise or distortion would result in a change in amplitude and phase of receiving symbols. So for instance in 16-QAM with 4-bit words, if an amount of distortion causes a symbol to place in the adjacent room, we will have only one bit error while other 3 bits are ok. In this case if we use binary sequence, the same amount of distortion could end up more losses, even the all bits of the symbol. |
H: Will the LD3985 will turn on in this circuit?
This is a beginner's question.
In the LD3985 datasheet I found this example:
I made this circuit:
If i put a capacitor between INH pin and GND, will it run correctly or should I remove this capacitor?
AI: The capacitor is between VCC and GND. INH is connected to VCC. That will work as expected. |
H: How drift current is independent of bias voltage in semiconductors?
According to my textbook:
The drift current is relatively insensitive to the height of the potential barrier. The reason for this anomaly is the fact that the drift current s limited not by how fast the carriers are swept down the barrier but rather by how often.
From what I know, the drift current(let's say for holes) is given by, $$\vec J_p=pq\mu_p\vec E$$ where p is hole concentration, q is a charge, \$\vec E\$ is the net electric field and \$\mu_p\$ is hole mobility. The net electric field here is the vector sum of the applied field(due to bias) and the built-in field due to the donor and acceptor ions.
Even when there is no bias and the junction is at equilibrium, the above equation still holds. In fact, at equilibrium, it can be said that \$\vec J_{diffusion}+\vec J_{drift}=0\$ and the expression for \$\vec J_{drift}\$ is derived from the above equation.
So I don't understand how the electric field does not affect the drift current.
PS: It may be that I'm wrong about \$\vec E\$ being the net electric field(while it should be the
built-in electric field). But even then, I don't get how the applied electric field(due to the bias) does not affect the drift current.
AI: The drift current is limited by the available charge carriers arriving at the reverse-biased junction. As a higher field draws more carriers, carrier concentration decreases. The resulting dependence of the current on the height of the potential barrier is weakened by the limited availability of charge carriers. |
H: Run Ltspice netlist using python
I would like to know please if there is a way I can run a LTspice simulation using only python.
In other words, I need a python alternative to this command: subprocess.run(['scad3.exe','-b','netlist.cir']). I know there is an ltspice library but, to my knowledge, it is only used to extract data from the generated .raw file but does not run the simulation.
Looking forward to your suggestions.
AI: I can't answer for Python since I'm not very familiar with it, but I suspect there is some way to run an external program. And if there is, then what you have there is exactly what you need to run a netlist: the -b command line switch. See more about them in the help, under LTspice > Modes of Operation > Command Line Switches.
Extensions do not matter, they may even be missing. All that counts is the contents of the file that must be in SPICE netlist format, with elements that are recognizable by LTspice. That's all.
And if you have an .asc that you want to be run in batch mode, all you need is the -netlist switch, which converts the schematic to a netlist format. |
H: How to understand capacitor reading: 0.1uF + 2x2500pF?
I have an old electrical motor from the 1970s. It does not work as it should, and I suspect the capacitor attached to it. It has two legs and reads: 0.1uF+2x2500pF ~250v. I am not familiar with that "+2x2500pF" way of writing it. What should my multimeter read when measuring and what is the idea of the way to write its capacitance? Currently imy multimeter reads something like 0.177uF when connected to the two legs.
AI: simulate this circuit – Schematic created using CircuitLab
Figure 1. The internal arrangement.
C2 and C3 shunt high frequency noise to ground.
What should my multimeter read when measuring and what is the idea of the way to write its capacitance? Currently my multimeter reads something like 0.177 uF when connected to the two legs.
Your multimeter reading looks about right. Electrolytics have a very wide tolerance on the capacitance value. The motor fault may be something else. |
H: Trying to design a single op-amp oscillator
I am trying to build this single op-amp oscillator in Multisim but I keep getting this flat transient analysis. Is this what I am supposed to get? Am I using the wrong op-amp?
AI: It’s probably simulating the op-amp balanced on a knife-edge, a valid solution mathematically but unstable and a situation that won't occur and can’t persist in real life.
If you remove the initial condition calculation that usually gets rid of the issues .uic
or add a voltage step to nudge the circuit. |
H: Need help designing a hairdryer
I'm designing a hairdryer as project for a university class, but I'm having trouble regarding the choice of the motor. I need it to have two possible speeds. My first idea was to use an AC motor and a diode as in the schematic below, when the current flows through the diode, half of the AC wave gets cut, so the motor runs at half speed. My first question is: Will it work?
I also tried to use a DC motor instead with a rectifier bridge, but using the aforementioned diode to cut the wave in half doesn't seem to change to voltage on the motor very much, how can I make it work with I choose to use a DC motor?
Thanks in advance.
AI: From this question you can see the typical schematic of a two-speed inexpensive hair dryer.
The heater forms a voltage divider to feed the low voltage DC motor (via a bridge rectifier), and you can switch an additional rectifier in series for 'low'. The fuse (FU = 熔断器) and thermostat (ST = 恆溫器) are for obvious safety reasons. If the air flow is obstructed for any reason or the fan fails the heater temperature will rapidly increase so some form of safety cutoff is required. The "FU" is likely a one-time thermal fuse that acts as a backup bricking the appliance if it seriously overheats, and the "ST" is a thermostat that closes once the dryer cools down a bit.
If you want to see a higher end dryer, have a look at tear-down videos of the Dyson hair dryer. It costs about $500 CAD ($400 USD) and uses a high speed (110,000 RPM so the racket is mostly ultrasonic) BLDC motor. |
H: Common emitter amplifier's \$R_C\$ breaks
What happens if the collector resistor breaks (its value goes to infinity) in a textbook example circuit?
I assume that \$ I_C \$ hits zero, \$ U_{CE} \$ decreases until the transistor goes into saturation, but still without collector current.
Does this affect the base current? Or Beta?
Thanks for the answers
AI: I assume that IC hits zero,
yes
UCE decreases until the transistor goes into saturation,
yes
but still without collector current. Does this affect the base current?
yes and no. It doesn't affect it much, through hre. So no, if we're dealing with a simple ideal transistor, in which that parameter is zero.
Or Beta?
Yes. Beta is only measurable when the transistor is in the linear mode. You've already established that the transistor is in saturation. With a very simple ideal transistor, you might say that the underlying 'true' beta is constant, so it's not altered by there happening to be zero collector current. However, when you look at the curves for any real transistor, beta varies with collector current, dropping off at very low and very high currents. |
H: Buck converter input voltage lower than the designed output voltage
I have this buck converter which is designed to produce an output voltage of 9V for an input range of 18V-36V.
The datasheet of the buck converter mentions that the minimum required input voltage is 4.5V.
Assume my buck converter circuit & feedback network resistors and inductors are designed for 9V.
I am curious to know what will happen at the output of the buck converter when I give an input voltage between 5V and 8V.
I understand that the buck converter will step down the voltage if the input voltage is higher than the output voltage.
But what would happen if the input voltage is lower than the required output voltage for which the output circuit section of the buck converter is designed?
Can someone let me know on what would happen and why would that happen in this scenario?
AI: You'll lose regulation, and the output voltage will be slightly less than the input voltage. The buck converter topology can only reduce voltage, not increase it, because it's essentially just filtered PWM on the power supply.
If you want to have an output voltage higher than the input, you'll need a boost converter, and if you want the input to be able to be either higher or lower than the output (while maintaining a regulated output voltage), you'll need a buck-boost converter.
Edit with more information on what happens:
Since the output is basically just filtered PWM, the controller can't boost the voltage to be above the input. Depending on how your specific controller is designed, it will probably output the same voltage as its input or slightly less, or it may shut off the output entirely.
Looking into the specs of your buck converter, this converter doesn't appear to have any way to shut off the output when it loses regulation, so it will just keep outputting the maximum voltage it can. Check page 6 of the datasheet; notice how the max duty cycle is rated to be between 95% and 99.9%. The exact value differs between devices due to manufacturing variance, so let's assume the worst-case scenario of 95%.
This means that, neglecting conduction losses (which depend on load current), your output voltage will be 95% of the input voltage.
However, the converter can't work if it doesn't have enough voltage to run its internal electronics. To avoid having any undesired behavior if given too low a voltage, this chip has an undervoltage lockout (UVLO) feature. Again, looking at page 6, the UVLO is guaranteed to kick in at a voltage no higher than 4.35 V (we'll ignore hysteresis for now), so if the voltage is lower than 4.35 V you should assume the UVLO may cut power to the output.
You can also use the EN pin if you want it to cut out at a user-defined voltage higher than its built-in UVLO voltage; how to do this is explained on page 8 (section "External UVLO setting") of the datasheet. This would let you set the output to zero if the input drops too low to be regulated, for instance, which may protect your equipment from unpredictable behaviour from undervoltage.
So essentially, this device lets you decide what will happen. Do you want it to output as high a voltage as it can manage, if the input goes too low? Then just tie the EN pin to VCC. Or do you want it to just turn off if the input drops below, say, 12 V? Hook EN to a resistor divider as explained in the datasheet, so that it cuts the output when the input drops below 12 V.
Unsure which to do? Generally, you should do whatever most reduces the probability of damage to your user first of all (I would hope that's obvious!), and then whatever is least likely to damage your electronics, in order of whatever's most difficult to replace. |
H: Control voltage to heat resistor using PID
I have a question about PIDs. I have a 2.2 kW heat resistor powered from 220 Vac. I would like to control the resistor using PID.
As I can see the most PID based control systems are using a Solid State Relay (SSR). Therefore, I conclude that these systems produce a smart on/off sequence based on PID parameters.
I would like to ask you if I can control the voltage across the heat resistor with a PID system i.e. not just on/off control. This will control the power and therefore the heat produced. Do you have any proposal?
Excuse me if the question is trivial.
AI: If you want to control a resistive load like a heater in an actual proportional way, you would typical do so with a TRIAC driver.
But while a phase cutting TRIAC "sort of" varies the voltage in the sense that it may prevent the load from ever seeing the peak part of the waveform, in reality what it mostly does is create a form of pulse width modulation, at the AC line frequency rate - you are turning the heater on and off, but at a very rapid rate.
Heaters and whatever they are heating tend to have a substantial thermal time constant. Which is to say, that they take a while to heat up and cool down.
In practice this means that many heater controllers simply implement on/off control at a time scale humans can actual notice by sound or sometimes sight, if not by effect.
But if you want to tightly control temperature in a small range, then something like a TRIAC could be worthwhile. Beware that as the TRIAC itself is implicitly mains connected, this is tricky to do right. If you go down this path in a DIY project, at bare minimum make sure that both your zero cross detection and your TRIAC driver use optoisolators - conventional for the first, probably opto-TRIAC to drive the power TRIAC for the second.
You then have the choice between using a phase-cutting scheme as needed for something with a short time constant like a light or universal motor, or perhaps using a simpler scheme where you either power or do not power the heater for an entire half-period of the AC waveform at a time. The latter is electrically "cleaner" since you switch only at the zero crossing point when a resistive load is drawing no current.
It's not really clear that this kind of fine scale control and all of its complexity is going to be very useful for your goal, vs getting a quality solid state relay and simply commanding it on or off on the timescale of a moderate fraction of a second. |
H: Op amp circuit and input impedance
I am trying to understand this op-amp circuit that came from one of our suppliers. The input on X9 connector is a speed sensor (magnetic pickup sensor.) Its voltage amplitude is proportionnal to a motor speed (up to 7500 Hz.)
From what I understand, the op-amp IC11 plays the role of a differential amplifier circuit. With the voltage dividers made of R282, R306, R283 and R305, there is an offset of 3V on both inputs (probably because it is a single supplied op amp) so the signal coming from X9 is shifted up. I have three questions:
What would be the input impedance of this circuit (seen from the sensor?)
What is the role of D515 and R281 + R318 + R308 ? I assume that D515 is here not to disturb the 5V supply but why are there resistors?)
Is Z1 acting as a voltage limiter? If so, are D516 and D517 not enough?
Thanks!
AI: It’s a Schmitt trigger circuit. All that gobbledygook on the front end is there to protect the input, and to bias the op-amp (actually a comparator) inputs at a working midpoint.
The sensor signal is AC coupled to the (-) input through C786. It's biased at 3/5 VCC by R305/306, to a net impedance of 120K. R307 acts like a voltage divider with R305/306 and reduces the gain a bit, acting as a high-pass RC filter with C786. The actual input impedance is frequency-dependent and is about 195K at the right side of C786.
Going further up the input, R281/R318 and D515 form a biasing network. D515 is reverse polarity / leakage protection. Overall impedance will be a bit less than the divider you add in the downstream stuff: about 1K depending on frequency.
R308 and Z1 are input protection. Z1 limits the voltage swing to +5.1 / -0.6V. R308 limits the current to Z1 so it doesn't take the full brunt of an ESD spike.
D516/D517 further limit the input to VCC +0.3V and -0.3V. Being Schottky types they have faster response than the Zener Z1. Kind of belt-and-suspenders in my opinion.
On the comparator (+) side, there's the biasing network R282/283. Not only does it set the 3/5 VCC operating point, it works with R309 to make the hysteresis snap-action (Schmitt triggering) to square up the signal.
That all said, if the designer were that concerned about transients, they haven't taken care of the ground input. That's a major vulnerability. I would add a common-mode filter between X1 and rest of the signals. |
H: Polarity tester for 1V to 60V circuit
I am making a circuit board to test the polarity of the batteries. The batteries will have different voltages from 1V to 60V. I want to detect the polarity with two LEDs. See below circuit diagram I drew. It works, but when nothing is connected still one LED turns on.
Solution by @Unimportant in comments:
I followed the Unimportant solution and built the circuit and it worked fine.
AI: The output of the 555 is either high or low. If it is high the bottom LED will light, if it is low the top LED will light. So whatever state the 555 is in, there's always one LED on.
There's other problems with this circuit. A 555 cannot handle the mentioned 60V for example.
I'd forgo the 555 altogether and make something discrete:
simulate this circuit – Schematic created using CircuitLab
It uses 2 transistors configured as a Sziklai pair for high gain while avoiding the double B-E junction voltage drop of a regular Darlington, because we cannot afford the voltage drop with the 1V minimum requirement.
Because of this high gain there is still enough base current trough the 22K resistor to light the LED even at the 1V minimum while still not allowing excessive current in the 60V case.
Zener diode D2 prevents the base voltage from going too far negative in case a high voltage battery is under test in the wrong polarity.
R2 makes sure the transistor is off in case nothing is connected to test terminals.
A second circuit with a RED led can be built with the test terminals reversed to work in the opposite polarity. |
H: Adjustable CC/CV supply with voltage and current limiting having no output voltage at low voltage levels?
Im trying to create a power supply with an addjustable output between 0-12V or 0-3A (CV and CC adjustable). To make sure that the components don’t get damaged I'm trying to implement a protection for over current and voltage. When current higher then 3A appears the MAX4172 will act as a current sense amplifier and the MAX9038 as a comperator with a reference voltage (reference itself still needs some work, also I know it has an internal reference). Since the output here is 5V and I want to make it variable I used the two transistors to amplify it to the source voltage (or at least close to). This seems to work nicely as seen in the picture except that the MOSFET doesnt work at low voltages, google told me its the Vto value for the MOSFET that is causing the problem. The application that it will be used for might require a high current and low voltage (0.5V in some cases), but I would like to actually have that output voltage of course! Is there any way to make this possible or any suggestions for good P-channel MOSFETs for this case? (let’s say as low as ~0.3V is required)
Since the actual power supply has to be able to regulate current and voltage I also need overvoltage protection. I've seen crowbar circuits which seem to work but bring the voltage and current to 0 (from testing a while ago at least), is there a way to make this work just like my current limiting, by limiting the output voltage to 12V?
Also, since I normally don't do too much regarding power supplies is there any other obvious problem that I've missed with the circuit thats not gonna work realistically? (also sorry for the horrendous loooking simulation, finally got it working somehow and last time I moved stuff I broke it again :P)
AI: Issues I see with this design:
MAX4172 input voltage range issue. The supply of your MAX4172 is + 5 V while the sense inputs are at +12 V. That is not going to work, you will have to supply the MAX4172 with at least 12 V also.
The circuit around Q1 and Q2 will probably work fine. However I would use a simpler circuit, I'd use one NMOS to make M2 switch on. Then the polarity of the output of the MAX9028 will be incorrect, to solve this, swap the inputs of the MAX9082 so that its output becomes low when there's an overcurrent. |
H: EMC filter in DC-DC converter cascade
I'm designing a power supply stage and I have the cascade of multiple DC-DC converters. Each DC-DC converter has an EMC filter.
The first DC-DC converter requires a capacitor between Vout and GND C1 = 2uF, and the second DC-DC converter requires C2 = 47uF between Vin and GND. Since this is a cascade of DC-DC converters, C1 and C2 will be in parallel so there is an equivalent capacitance Ceq = C1+C2.
The problem is that Ceq is at the output of the first stage and at the input of the second stage, so there is a "conflict". How can I solve this problem?
AI: I've never seen converter chip where required capacitance was specified as an exact number. It is always a range or at least a minimum. This goes for both input and output. So, in your case you have to figure out a number that a) satisfies both requirements from chip datasheets and b) sufficient for the ripple limit you set yourself.
Having said that, those large capacitors at the DC-DC inputs are usually decoupling, not EMC filters. The typical EMC filters for DC-DC converters are either LC or CLC and with much smaller capacitance. |
H: First SMD Design Comments / Input before Manufacture
Just designed my first "real" PCB that I plan to send out for manufacture in the next day or so. I've milled out a few on a 3018 CNC. I wanted to do this one that way as well, but realized it would have been a bear to make DIY and mostly THT wasn't the direction to go. So, this is my first mostly SMD PCB with standalone ATMEGA328P-PU on a PCB at least. I used Diptrace initially, but then switched over to EasyEDA since I plan to send it to JLCPCB for the best cost and all their components from LCSC have the included the PCB footprint. (Side note: I wasn't looking forward to switching at first, but the component selection with included pattern was a real treat with EasyEDA compared to Diptrace).
Purpose:
This should actuate servos to control water flow to "zones" based on the feedback from the sensors of soil wetness.
I am a complete novice to this, but I think that the design is close. I learn by doing and iterations, so here goes. I figured you guys love this stuff and it is second nature to you, so I am all ears for any general feedback, criticism, and design improvements in general that I will take to my future PCB design endeavors and use this one.
The PCB Layout:
the components on the right will be exposed from the enclosure for user feedback, and the JST XH connectors are for the sensors. There is a DC 5.5 x 2.1 plug for a 12V 1A DC adaptor in top left. Key 1 is a "test" button that I plan to use to prime this thing. SW1 is the power switch. The U components connect to sensors for feedback that will be evaluated in the code. The H headers are connected to servos that respond in accordance with the settings provided by R1, R2, R3. H4 is ICSP header for programming. P1 is the motor. I increased the mil trace to 15 mils for the power and ground lines. U2 is the 5V regulator.
Edits: Added ground plane, moved decoupling capacitors for the MCU closer to their point-to-point, added some decoupling capacitors to the adapter feed. Increased trace widths to 24 mils (same as via diameter). Removed interior mounting holes that were too close (shouldn't be needed).
Specific Questions / Schematics:
Is 4 and 5 for SW1 like chassis grounds / PCB grounds? I can just leave them unconnected right?
Do you see U2 having any issues with regulating the 12V 1A supply for the 5V Reg that is provided downstream to all the other applicable components? In breadboard testing, amperage never really exceeded 500mA, but since the supply could provided 1A, I chose a "larger" package regulator. MC7805BDTRKG - Datasheet
Oscillation, Stabilization, and ICSP look correct?
The test button will pull PD7 (Test Net Port) to ground when depressed right and 3, 1 can remain unconnected?
Thanks in advance!
THT Layout:
AI: #1-#8 beware of the autorouter routing traces really close to pads or at awkward angles, if the pcb fab is cheap and the soldermask is a little off, the track that is close to the pad could be uncovered and you get solder bridges. It costs nothing to space your SMDs (#5) a bit more, or push some traces around.
#8 without heat sinking, this 7805 won't be able to dissipate the power you intend. If the 1A load is frequent, I'd use a switching converter for efficiency and convenience of not having to bother with a heat sink. In fact it would probably be much simpler to power the whole thing with a 5V wall wart.
#9 The vertical barrel connector could make plugging connector #10 awkward.
If the three headers on the right go to analog inputs, then they need at least some filter caps. Possibly ESD protection.
When putting mounting holes, use pads instead of holes and make the pad a little bit larger than the size of the head of the screw you'll put in. That way you'll easily see if the screw head collides with something. If you use plastic standoffs that only take space on bottom layer, still a good idea to define a keepout zone to prevent a SMD from ending up in the wrong place.
I don't see any caps on the xtal.
GND routing uses the same thin traces for pots (presumably analog) and servos, could add noise to analog signal.
Image resolution is too low and bottom layer is not readable.
Placement of decoupling caps is no good, again beware of autorouter, it will route GND and VCC all over the place and say "done!" and then you get long inductive traces and therefore problems. The purpose of a decoupling cap is to reduce supply impedance at HF, and long inductive traces do the opposite. If you have a ground plane on the back, connect your decoupling caps to it with vias.
An extra 10 ground vias would remove lots of traces from toplayer, maying routing easier.
...and don't be afraid to put an electrolytic cap like 100µF on the power input... it costs 10 cents... |
H: Longer time between BLE advertisements
Is it ok to increase the time between BLE advertisements to longer than 10.24 seconds? I know 10.24 s is the longest time I can set for the advertisements to automatically repeat, but I can also manually turn advertising on and off.
If I set a timer for 1 minute to enable advertising, send out the advertisement packet, and then disable advertising for another minute, is this violating any BLE rules? Our system is constantly scanning for our beacons so we won't miss any advertisements, I'm just trying to save some power by not having to transmit so often.
AI: The "BLE rules" you refer to would be the "Core Specifications" of the Bluetooth Special Interest Group (Bluetooth SIG). As far as I know, they do not place a limit on how infrequently a device can advertise.
But you may run into problems connecting, if using a smartphone as your central device. Although you might guess otherwise, scanning uses almost as much instantaneous current as transmitting, and since it runs much longer than transmitting, it is a greater consumer of battery energy. As a result, the smartphone OS generally only scans for a limited period after each request. You can, of course, bypass this by repeatedly requesting a scan, but the battery life will suffer.
Focusing back on your peripheral, you should calculate a power budget to determine how much battery energy is consumed by the periodic advertising versus the baseline current draw during sleep. Even though advertising draws several mA, it only lasts a few mSec. Once the advertising interval is longer than a few seconds, you will find the sleep current, even at a few microAmperes, takes a bigger part of the energy budget than advertising.
Also, instead of advertising and scanning, consider maintaining an actual connection, with a long connection interval, and a high value for "slave latency" (number of connection intervals the peripheral is allowed not to respond, without breaking the connection). This tends to optimize battery life for both the peripheral and the central device. |
H: Is the voltage on the resistor always low when the zener diode is not in reverse operating region?
I´ve read that the zener diodes are used for voltage regulation, and the resistor in this circuit limits the current through the diode and drops the excess voltage when the diode is conducting.
Does that mean the voltage across R2 will be very close to 0 when the zener is not in breakdown region with the appropiate load, like in this picture??
If the load conected in parallel with the zener diode is more complex, like on this other circuit, will the combination of the resistor and zener diode behave the same way?
AI: No, because the load current also flows through R2, and that happens all the time — even when VZ is not conducting. |
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