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H: what is the purpose of __weak reference used on Keil MDK ARM?
Got a little messy with a function defined in two files and one with a __weak symbol.
I called the below function to load the settings of UART1 in STM32L476RG from my main file
if(HAL_UART_Init(&UartHandle) != HAL_OK) and this function is defined at
{
Error_Handler();
}
I found that this function calls another funciton named HAL_UART_MspInit(huart);
This is defined at two places ,
1. in stm32l4xx_hal_msp.c as void HAL_UART_MspInit(UART_HandleTypeDef
*huart)
2. in stm32l4xx_hal_uart.c as __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
My problem is that the whenever I load the UART setting the __weak function is called. I did it by referring an example, UART_WakeUpFromStop given in the [STM32F476RG Product page]. where in the example the function in nstm32l4xx_hal_msp.c , void HAL_UART_MspInit(UART_HandleTypeDef *huart) is called. What is going wrong in my code? what is the influence of __weak symbol?
STM32L476RG Reference manual
AI: Soo that The definition and implementation can be overridden with a non weak type, aka user defined one.
Check the manual to bee suit..
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H: Why would I need a low-dropout regulator?
I am creating a device utilizing multiple components, all of which have an acceptable operaating voltage of about 5 V. One component has an operating voltage of about 6 V.
I am looking at relevant schematics online, and noticed that this device utilizes a component* I didn't think I needed (TPS763XX, a low-dropout linear regulator).
This is the first time I've ever heard of this component; I've done brief research on it and don't understand it much. Is it used to regulate input voltages for certain components (i.e. were my device to have a 6 V supply, this particular component would create an output of 5 V to be the voltage supply for those devices requiring it?)?
What is this component used for in general, and why does this particular application (a blood pressure monitor) require it?
*Reference component U1 in Table 2 at the top of p.17.
EDIT: fixed link
AI: Why would I need a low-dropout regulator?
To answer this you start by considering "Why would I need a voltage regulator?. You need a voltage regulator to provide a constant voltage to a circuit. More often than not, a constant voltage supply improves circuit performance and allows you to use components that cannot work on lower or higher voltages. Not all circuits require voltage regulation however.
A voltage regulator isn't perfect - if you put 5.1 volts at the input, most will not produce a reliable 5 volts out under all (or any) load conditions so, manufacturers specify the "drop-out" voltage such as: -
With a 1 V (minimum) drop-out voltage the device can regulate the output from loads requiring 10 mA up to 1 amp.
This is just a made up example. Low drop out regulators are generally classified as working with an input-output voltage lower than 1 volt. Having said that, some manufacturers will call their devices "LDO" if the input-output voltage has to be 2 volts.
Notice also that in the above made-up specification I implied there was a minimum load of 10 mA - watch out for this as it can bite you i.e. you buy an LDO regulator and hook it up but instead of producing 5 volts, it's producing 5.75 volts - the smallprint usually informs that the minimum load is x mA and with no load connected, the output doesn't regulate very well.
why does this particular application (a blood pressure monitor)
require it?
Some designs do, some designs don't. Without going into great detail, as I said above, a voltage regulator can improve circuit performance and this can mean: -
Better stability
Lower noise
More predictable signals i.e. more accuracy
Less drift over time
Using an LDO regulator offers exactly the same but allows the output voltage to remain regulated when the input voltage is quite close to the output voltage value.
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H: Zener diode behaviour at operating limit
I am looking to select an appropriate Zener diode from the ZMM range for MCU input pin protection.
They are specified at a Zener current I_ZT = 5 mA having a maximum impedance of Z_ZT = 90 ohm.
They also specify a maximum impedance (at working current threshold?) Z_ZK = 600 ohm @ I_ZK = 1 mA.
I am assuming absolute maximum input pin voltage of 5V.
My analysis is as follows:
The Zener diode requires at least 1mA to break down: 5V / 1mA = 5kOhm current limiting resistor. Below 1mA the Zener is not guaranteed to break down and my input pin could see the full voltage.
At 1mA the Zener impedance is 600 Ohm leading to a voltage drop of 0.6V.
5V permissible input voltage - 0.6V zener voltage drop: --> require zener diode with a maximum zener voltage of 4.4V.
From the ZMM range, the next best part would be the ZMM3V9 with a V_Z(max) = 4.1V @ I_ZT = 5mA.
My issue is, that steps 1-3 of my analysis were based on I_Z = 1mA but the Zener voltages are specified at 5mA.
Assuming we calculate an 'junction voltage' without the resistance voltage drop:
V_j = V_Z - 90ohm * 5mA
Does V_j vary with respect to the current I_Z?
Is it acceptable to calculate a Zener voltage at lower current as follows?
V_Z @ 1mA = V_j + 600 ohm * 1 mA
I started my analysis at the working threshold current, because a selection at 5mA gives insufficient over-voltage protection:
Assuming 0.25 W current limiting resistors:
V_input_max = 35V with 5kOhm (1mA analysis)
V_input_max = 15V with 1kOhm (equivalent 5mA analysis)
I am looking for protection from sustained voltages of 30V and an expected normal operating voltage of 15V.
AI: You should base your analysis on \$I_{ZT}\$ instead of \$I_{ZK}\$. The 5mA current is the one that guarantees that the voltage is going to be under regulation.
Does the zener voltage depends on the current?
Yes, that's why they give you an impedance (e.g 89 Ohms max @\$I_{ZT}\$) when working as a regulator. So if the current changes, so does the zener voltage.
\$I_{ZK}\$ and \$Z_{ZK}\$ are the current and impedance they get near the breakdown region (the knee in the IV curve).
In order to be certain that the zener will work as a voltage regulator, you have to ensure there is always 5mA (the test current they use) running through it.
Your minimum sustained voltage is 15V, your zener voltage is 5V, and you want 5mA flowing to the zener at all times to keep the voltage regulated.
Then,
$$ R_s = \dfrac{V_s-V_z}{I_t}$$
Where \$I_t\$ is the total current from the power supply (zener current + current drawn by the pin or load). So if the pin draws an additional 10mA for exaple, your total current is 15mA.
$$ R_s = \dfrac{15\text{V}-5\text{V}}{15\text{mA}}=670\Omega$$
\$R_s\$ is a resistor between your source and the zener diode.
If the voltage goes any higher, say 30V as you mentioned, then there will be more current going through the zener, but as long as you don't go over the power dissipation limit of the diode, you should be ok. So if the voltage increases to 30V, the total current will be around 37mA with the chosen \$R_s\$. If you had no load, the zener will dissipate a max power of \$P_z\$=(37mA)(5V) = 0.187Watts, so choose accordingly.
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H: Does Kicad (pcbnew) allow dragging nodes — i.e. junctions between track segments?
I am starting to use Kicad and am used to gEDA suite. The latter allows dragging anything in pcb: tracks, track segment ends, footprints, selected objects... For instance, you can drag the end of a track segment in gEDA pcb by clicking one end with a left click and drag it so only that very end is dragged while the other stays in place.
I just couldn't figure out how to do that in Kicad; all I could do was drag the clicked/selected segment. On the other end I tried myself at grab-and-drag a whole track while conforming to the DRC rules, keeping the net connected, which feature gEDA doesn't have. That said I find this feature very convenient.
So is it possible to drag track segment ends in Kicad or do I have to change paradigm? I didn't find any info on that very topic so either it's too trivial to be mentioned (you can all me dumb) or it's not implemented because something more useful is in place...
AI: Well, I finally found the answer on my own so I'm posting it here in case someone, just like me, happens to wonder. Put Kicad in OpenGL view mode and drag vias, tracks, track corners or whatever you want — provided you set DRC and routing constraints, of course. It is explained in this video on Youtube.
To drag items while in OpenGL view mode, select Add single track on the rightmost toolbar and then press D over the track/node you want to drag (no click required). The router will shove tracks or move the one you're dragging around according to the routing preferences you previously set. Press E while adding a (single) track to set routing preferences.
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H: Help dimensioning resistors in a two NPN transistor current limiter circuit
I'm trying to design the current limiter circuit shown above which I saw on this website:
http://electronicdesign.com/power/current-limiter-offers-circuit-protection-low-voltage-drop
I'm using 18V - 24V supply and 2N2222A transistors. It must limit the current to 0.12A - 0.15A to the load so I have calculated that \$ R_{SENSE} \$ must be 3-4 ohms. I'm just unsure how to determine what the value of \$ R_{1} \$ should be.
I'm relatively new to electronics.
AI: The 2N2222 can dissipate a maximum power of 0.5 watts so your biggest problem is that when the motor is stalled, the transistor is going to be dissipating over 2 watts of power and will rapidly expire.
So, choose a more powerful device for T1 and you will find that the resistor you ask about can be in the range of a few hundred ohms to maybe a kohm.
New section about R1
If you study the NPN BJT as an "emitter follower" (common collector) you will discover that the voltage on the base will be about 0.7 volts above the voltage on the emitter. It can't be much more (maybe a volt max) because there is a forward biased diode between base and emitter. It can't be much less else the transistor isn't being turned on very much so, generally speaking the goldilocks number is 0.7 volts. OK so far...
Now if your supply voltage is 24 volts and you need to provide (say) 23.3 volts at the emitter for the "load", the base has to be at (or about) 24 volts. But herein lies the problem because, to control the base voltage with the 2nd transistor (in order to control current), you need a resistor between 24 volts and base. This creates an extra volt drop because of the base current needed to switch on the BJT. OK so far?
The load is about 120 mA and operating the BJT close to saturation might mean a gain as low as 20 hence, the base current needed is 6 mA. But, T2 doesn't want to control T1 with a small value of R1 because it might have to become a power transistor like T1 so, it's a compromise. R1 is chosen to drop maybe a volt at 6 mA which yields a value of 167 ohms.
The down side of this is that now, the emitter can only be raised as high as 22.3 volts on a 24 volt supply but, if you can live with that then all is good.
MOSFETs have other problems that can make life hard reaching a source voltage as high as the emitter voltage of a BJT but, things are made easier in the gate draws no appreciable static current hence R1 can be 10 kohm. Making it too high can cause problems in that the current limiting takes an appreciable time to kick-in.
It's a simple circuit but full ov subtle surprises.
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H: How to measure output DC impedance of clock oscillator?
I need to accurately measure the DC impedance of a clock oscillator's (single-ended) output buffer. What are some ways I can tackle this in the lab?
If it helps, I have an oscilloscope (but not a VNA). I'm looking for practical test setups, with or without the scope.
AI: I would load it with various resistors in series with a cap to GND and measure output voltage variations in the flat part of the waveform.
Responding to your edit:
If the spec is concerned with output impedance, then it is all about transmission lines and reflections, and what matters is the output impedance of the buffer on both signal levels. You can use the method I suggested to measure it.
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H: Understanding the operation of a grounded gate P-channel MOSFET in a iPhone 6 charger
In the circuit below Q1701 is part of a charging circuit in an iPhone 6.
Since there are no datasheets available for the main components in the circuit I've been trying to figure out the operation.
With a charger disconnected:
S = 0V
G = 0V
D = 0V
Charger connected:
S = 5V
G = 4.29V
D = 5V
So this is where it leaves me confused, if a P-channel MOSFET turns on when it sees 0V at the gate (which I thought was the reason R1710 has it connected to ground) how is it turning on with 4.29V at the gate?
AI: Charger connected:
S = 5v G = 4.29v D = 5v
How do you get G = 4.3 V? The gate is connected directly to ground, and the gate-source diode is reverse biased so it plays no role. The gate will be at 0 V here. (Unless there's something else connected to the REVERSE_GATE node that you haven't shown in the schematics you shared)
if a P-channel mosfet turns on when it sees 0v at the gate
A P-channel (enhancement mode) MOSFET turns on when it sees a gate-source voltage more negative than its threshold voltage.
The voltage relative to the circuit reference (ground) is irrelevant.
From comments,
why even have that mosfet if it's always going to conduct having the gate at ground? What's the benefit
This is a reverse protection circuit.
Note that current will normally flow from drain to source, rather than the usual direction for PMOS of source to drain. This gets the body diode oriented the right way for a reverse protection circuit.
Now if you accidentally reverse the power supply, you'd be connecting the drain to -5 V. Then Vgs will be positive and the FET will not conduct; also the body diode will be reverse biased and will not conduct. This prevents any power being delivered to the rest of the circuit, so it won't be damaged.
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H: Need alternative way to deal with LDOs minimum current requirement
I am designing a circuit that uses an LDO to produce 3.3v from a 10 to 18v input.
I sometimes will need 1.2 amps from this regulator and at other times I only need microamps. When I need even less I can shut down the regulator but there will be times when I need regulation and my circuit will only draw possibly .5 or 1 milliamp. My circuit contains a microcontroller.
My datasheet says my LDO requires 5ma minimum load. It's a Micrel/Microchip MIC29150.
So my question is, other than putting a resistor on one of the GPIO pins of my micrcontroller and burning off electricity at around 5ma when I want to, are there any other techniques I can use that are better?
One of my thoughts were to put a zener in series with a resistor so that if the voltage goes over 3.5 or so that it burned off some milliamps but that seems dangerous to me.
AI: Per the datasheet for the MIC29150:
The MIC2915x–2975x regulators are specified between finite loads. If
the output current is too small, leakage currents dominate and the
output voltage rises. The following minimum load current swamps any
expected leakage current across the operating temperature range...
So it seems the minimum load requirement is determined by the worst case leakage from IN to OUT through the LDO. 5mA seems like a lot - the leakage is probably far less than this in most cases. Also, leakage is a very strong function of temperature, so if your application will not see high temperatures you could get away with less.
A zener at the LDO output might also be an option, as you stated. This will prevent the output of the LDO from exceeding the zener breakdown voltage in the case that the leakage current is greater than the load. In this case you would want to check that your load can survive the zener voltage, and also make sure that there is no overlap between the regulation voltage of the LDO and the breakdown of the zener - that would cause the LDO to dump current into the zener.
Personally, I would recommend looking for a different LDO that doesn't have such an onerous minimum load requirement. There are many with no minimum load requirement at all.
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H: Capacitor of choice for low noise applications
I saw in a schematic a while back that a polypropylene capacitor was used to generate a stable sine wave in an oscillator circuit. I suppose this gave a better 'frequency reference' for the oscillator.
Are some capacitor types better for lower noise applications?
AI: HighK ceramics like X7R, Z5U etc have huge variation of capacitance versus voltage. Using them in filters or any kind of coupling application guarantees humongous distortion. They are piezoelectric: they are both good loudspeakers and microphones. Decoupling a high impedance node with them results in a nice vibration detector. Tolerance on values are not huge, rather they are hyuuuge: expect +20/-50% depending on DC bias. Also, they drift a lot with temperature.
They are truly excellent for power supply decoupling, though, because they are small, have lots of capacitance per volume, low inductance, and are cheap. For decoupling, who cares if it's 1µF +/- 50%?
Now, for filtering applications, or when you run a signal through a cap as in your oscillator application, you want...
A known precise value
Low temperature drift
No capacitance variation with voltage
Low sensitivity to vibration
Dielectric absorption and leakage will not matter for your oscillator, but they will for other applications.
Film caps and NP0 ceramic caps are excellent on this, although:
large thru-hole film caps tend to be microphonic
polyester has worse dC/dV than the other films and NP0
Your first choice should be NP0 ceramics if they are available in the value you need. They are small and cheap, and almost perfect.
NP0 ceramics and High-K ceramics like X7R/Z5U are completely different materials. High-K capacitance varies with DC bias, NP0 does not.
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H: Time domain reflectometry (TDR), initial pulse slope
A ~100kHz square wave through a 100m open end coax (RG-58) produces a slightly sloped shoulder during the time from initial pulse until reflected pulse (A-B), and from initial pulse drops until reflected pulse ends (C-D).
What are the correct explanations for these slopes [not being flat]?
(Scaling: 2.0V/ 2us/)
EDIT:
AI: The slope on a shoulder (first plateau) is defined by interplay of resistive and dielectric losses in the transmission line (cable), see the iconic source, by Howard Johnson. In your case the resistive loss effect seems to dominate.
There are also 13,000 hits on Google for [tdr lossy transmission line], from Tektronix and Agilent and other good places.
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H: Increase Arc Lighter Spark Gap
This is a follow-up to my previous question. I am trying to increase the spark gap distance of an arc lighter without increasing the supply voltage - I'm using a 3.7V li-ion battery to power it. I'm getting a 3.5mm gap at the moment.
I'm using two MOSFETs in parallel to decrease Rds(on). The collector current is about 1A when the secondary of the transformer is sparking. I tried decreasing R1 to increase the collector current. This worked, but didn't make a significant difference in spark gap distance.
I noticed that there's a lot of noise at both sides of the primary. I filtered out the noise at the supply using a 47uF decoupling capacitor. The signal at the collector does not appear to be a square wave - it is very choppy and includes 125V spikes. I tried to filter this out using a revere-biased 3.6V Zener diode with a current limiting resistor (limiting the current to around 20mA). This did not fix the voltage spikes and the choppiness of the primary input. The below picture shows the collector voltage before and after sparking/conduction.
I also tried different frequencies and duty cycles, and this one seemed to be the best. I have considered a DC-DC converter to step up the voltage into the primary, but that would be too bulky based on the currents I'm dealing with.
Any suggestions? I'm open to redesigning the circuit.
AI: The maximum length of a spark is limited by the breakdown voltage of air -- about 3 kV/mm. If you want a longer spark, you'll need to increase the voltage.
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H: Can unpowered radio work without ground connection?
One feature of the Crystal radio is that it needs no other power source but that received solely from the power of radio waves received by a wire antenna.
But it also requires good ground connection to work. This is not easily available for mobile use (except on seafaring ships ).
I wonder if there exists some (possibly more complex, possibly heavier, etc) counterpart that could be used without ground connection, and still work off radio wave power alone - say, on a blimp?
(please excuse the misnomer in the title but radio powered solely from the power of radio waves received by its antenna is a little too long for a title)
AI: Yes, it is possible. Many antenna types are self-contained, in that they don't require a ground or use ground as one of the two connections where the signal appears between. Dipoles, folded dipoles, and loops are just three examples of such antennas.
The reason most crystal radios work with a long line antenna and the other connection ground is because that's a good way to intercept reasonably high RF power, relatively speaking. A dipole the full length of a blimp and hung below it might intercept enough RF power so that you can hear the demodulated signal with the right headphones. The orientation of the blimp would be important. It would pick up signals to the sides, but not directly in front or in back. There are other self-contained antennas that have other radiation patterns, but their shapes wouldn't be as compatible with the stucture of a blimp.
Polarization also matters. One problem with the blimp dipole is that it would pick up horizontally polarized transmissions. Most commercial AM, for example, are vertically polarized.
Of course the available power in the air is important too. Being close to a powerful transmitter helps a lot.
Back in grade school, I had a long line antenna out a window in my room to a shed in the back yard, maybe 60 feet long. I could pick up a 50 kW AM station from about 20 miles away reasonably well with a crystal radio and the right headphones. The orientation of the antenna was about right for the direction to the transmitter, but the polarization was opposite. There was apparently enough scatter and diffraction so that it still worked.
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H: Why do spectrum analyzers generate X-Rays
Most, if not all, old HP spectrum analyzers say
X-Rays generated in this intsr are sufficiently screened
Why do they generate x-rays at all. The HP 8565E I am looking at can only measure up to 50 GHz so I have trouble seeing why it would have such high frequencies in it.
AI: The warning relates to the display, not the instrument itself.
The HP 8565E uses a CRT monitor as its display. CRTs are electron beam devices, and can emit some X-rays if improperly adjusted and/or inadequately shielded. The notice is reassuring you that the hardware limits on brightness, and the leaded glass built into the screen, are sufficient to protect you from exposure.
This sort of notice is normal for devices containing CRTs; You'll probably find similar notices buried in the manuals of old televisions and computer monitors.
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H: How to make a ground plane for relay PCB switching mains?
I am making a PCB board with 4 relays controlled by a PIC microcontroller as shown. The board consists of components that are working on 5V DC and the relays that are connected to 110VAC. I had a few doubts regarding the ground plane:-
Q1. If I make a ground plane that covers the entire PCB, will the AC traces cause any problem in the working of the board?
Q2. Should I make a ground plane on the entire board or just for the DC portion of the board? Which will be better?
AI: Definitely do not extend the ground plane into the mains area.
The relays are providing your safety isolation here. Draw a line (real or imaginary) across the middle of all the relays. Keep all low voltage tracking and components 'this' side of the line, keep all mains stuff 'that' side of the line. That will automatically ensure you maintain adequate clearances between the sides.
It looks like you have an unholy mix of low voltage and high voltage connections side by side in the same terminal block. Easy for channel identification. Perfect for lethal error. Have the control terminals and 24v one side. Have all the mains terminals the other side. Put the relays in the middle, keeping them apart. Line the control and output connectors up in the same order, if you want a nice visual channel identification.
On a board of this type, you do not need a ground plane at all. Far better to just track it.
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H: measure the voltage of electronics component connected on breadboard using own software
I wanted to ask something related to breadboard designing.
Is this possible that we can design own breadboard such that when it interact with software, then if you put the leads between the nodes of any electronic component then it can measure the voltage and show that voltage on software(just like when you put multimeter leads in between any component then it can measure the voltage of that component). I want to replace the multimeter with my software.
Please suggest me.
AI: You can't replace a multimeter with software, but you can replace it with an ADC and software.
Perhaps the 'softest' thing to use is an Arduino, as it connects to a PC easily, and has 6 analogue inputs for measuring voltage. Handy for controlling the breadboard as well.
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H: Why does PIC MCU have (and needs) duplicate registers?
I have Recently been working on PIC16F84. In PIC16F84 the RAM is divided into two bank. I noticed some of the registers have duplicates in bank1 and bank2. Examples are PCL, STATUS etc. Can any one please explain why these duplicates are needed?
Dataset link.
AI: There are a number of reasons for this.
Speed - Registers that need to be accessed frequently are always available whatever bank you have selected, which saves on having to constantly switch banks to get to them.
Necessity - The register that controls which bank you use has to be available all the time. If it was in just one bank you would be unable to access it once you'd switched to another bank, and you'd be stuck there!
Economy - If you don't require all of your address space to hold the memory, you can ignore some of the address lines to save on decoding logic and use the chip space for something else.
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H: Driving LM386 with signal referenced to virtual ground
I'm working with a chip that outputs audio signals to headphones that are referenced to a virtual ground. Since I'm connecting the audio signal to a speaker instead of headphones, I'd like to implement a basic audio amplifier on the same board (sharing the same power source and ground).
I'm thinking of using an LM386 since they're a jellybean part.
However, I'm not sure how I would go about doing this. I've read the data sheet of the LM386 but the application notes don't really go into handling a virtual ground. The virtual ground is roughly 1.2V when referenced to actual ground and can source/sink about 150mA before it goes into short circuit protection mode.
All the circuits I've come across just ground both the inverting input of the amplifier and the input signal ground (why?). Obviously, if I did this, I would short the virtual ground to actual ground.
The schematic I am specifically referencing is the one below (source):
Is it just a simple matter of connecting the virtual signal ground (instead of actual ground) to the inverting input of the amplifier or would I have to look into building in a isolated power supply to power the LM386?
AI: Connect your "virtual ground" (or as I would call it an AC ground) via a capacitor to real ground. This prevents the DC levels on your virtual ground getting upset by a conducting connection. Make sure the capacitor value is reasonably high; in your circuit you are using 1 kohm input resistors so, at 20 Hz, the capacitors impedance should not be higher than 1 kohm. Sounds like 10 uF should do the job. I'd use a non-polarized one although it will probably be OK with an elecrolytic.
You may need to put a 10 uF capacitor in series with each 1 kohm resistor too.
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H: Does this MOSFET datasheet contain missing data?
This is the datasheet of a mosfet and I have two issues:
http://www.ram-e-shop.com/ds/tr/IRFP150.pdf
First, I can not find the pinout diagram. I don't know where drain, source and gate are. Which pin is gate and which is drain?
Second, Drain-to-Source Breakdown Voltage (VDSS) = 100 V.
When I hear the word "Breakdown", I feel like it is OFF characteristic. I think if I applied more than 100V while the transistor is OFF, A damage will occur.
What I mean by "OFF" is when the gate voltage is zero (no gate signal) or when the MOSFET is reverse-biased (i.e. Drain voltage is 0V and source voltage is +100V).
But I don't know the normal drain-source voltage when the MOSFET is on. What is the maximum supply voltage or the maximum operating voltage? Is It 100V too?
Thank you very much,
AI: It might help if you looked at the safe operating area for the MOSFET in question: -
The X axis is voltage and you can see it is limited to 100 volts. The Y axis is current and this is limited to 140 amps i.e. the "Pulsed Drain Current" specified in the "Absolute Maximum Ratings" table on page 1.
What this tells you is that if you could turn on and off the MOSFET in 10 us you could take 140 amps but with a limited voltage of about 60 volts. That's an instantaneous power of 8.4 kW.
Alternatively you could withstand 100 volts but at a reduced current of about 90 amps. That's an instantaneous power of 9 kW.
This is very much defined as a "single pulse" (bottom left corner of graph) i.e. it is a single event of 10 us.
If your pulse was 10 ms then you could withstand 100 volts whilst taking no more than about 2.5 amps. Notice now that the power taken during this much longer pulse is only 250 watts.
Eventually (if the graph showed this detail) you would find that the continuous power rating of 160 watts means a continuous current of 1.6 amps whilst withstanding 100 volts. Or it could mean 10 amps at 16 volts or 16 amps at 10 volts etc..
What I mean by "OFF" is when the gate voltage is zero (no gate signal)
or when the MOSFET is reverse-biased (i.e. Drain voltage is 0V and
source voltage is +100V).
You can't apply anything more than about a volt in reverse. The body diode in the MOSFET will conduct and, if the reverse supply could provide more than 42 amps, the body diode would break and so would the MOSFET. See "Source-Drain Ratings and Characteristics" for numbers on page 2.
See also this on the last page: -
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H: Solenoid Operation for Hours
My boiler is connected to a sun-water-heating system. After the sun goes down this system start to draw heat from my boiler.
Today I'm manually closing the valve connecting my boiler to the system.
I'll like to build system based in Arduino that will operate a solenoid that will open and close the valve.
The solenoid will probable by normally-closed and I'll open it only when sun is up which is a few hours every day.
I remember reading somewhere that solenoid should be operate for short time, is that true?
Can I leave the current on for say 6 hours to keep the solenoid open?
Is there a better way?
AI: There are a couple of solutions to this. The first is to use a specially designed latching solenoid. These typically have a permanent magnet in them so that they can hold in position without power. It's probably the simplest way.
However, you may still be able to use a regular solenoid depending on its design. The force the solenoid exerts is basically proportional to the 1/displacement (though this relationship can be adjusted by shaping the magnetic pole pieces). This means that when the solenoid is disengaged it requires a lot more current to provide the same force to the plunger than when it is fully engaged. Depending on your load and the force-displacement characteristic of the solenoid, you may not need the maximum holding force to keep the solenoid engaged. This means you can reduce the current and hence the amount of heat dissipated in the solenoid coil. If this amount of heat is within a range that can be continuously dissipated by the solenoid then there will be no issue doing this for a long time.
It is quite common in solenoid circuits to have this sort of force/current reduction mechanism, and if you have a well defined load, you can simply reduce the current after a fixed timeout.
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H: PCB design: safe clearance between via and ground or Vcc inner plane
I'm new to PCB design and I'm trying to achieve my first four-layer PCB.
Inner layers are GND and Vcc planes filled entirely with copper.
I need to use a via to wire a USB signal (tx, rx) from the top layer to the bottom layer. My default clearance for trace/spacing is 0.1 mm/0.1 mm, and the drill size is 0.2 mm.
I wanted to know if I could lose the USB signal if I keep a 0.1 mm clearance for Vcc and GND planes copper.
Is there a safe clearance for via wiring a USB signal or any other signals?
AI: As a newbie, you are either doing a advanced board as your first project, or you are using unnecessarily thin trace and space widths. Your 0.1 mm comes out to only 4 mil. Unless you have a reason for that, 8 mil is more universally manufacturable or without additional cost. Unless you're using large BGA packages, there should be little need for your tight minimum width and space.
Another issue is using a whole plane for power. Yes, I know there is a lot of knee-jerk religion out there about doing that, but actually stop and think about it. What exactly are you trying to solve by using a whole plane for power? You've already got a whole plane for ground, so the desirable effects of a ground plane will be there whether you have a power plane or not. The small extra capacitance of power to ground that a PC board provides is relatively small and doesn't guarantee low impedance power except at very high frequencies. Unless this design handles RF at high 100s of MHz or more, there is little reason for a power plane. The design will probably benefit more by allowing routing signals in a third layer than any slight benefit from a power plane.
However, power still needs to be low impedance at each point of use. This is accomplished by proper bypassing as close as possible right where the power enters each chip. A 1 µF ceramic cap to ground provides low impedance up to a few 100 MHz, which is good enough for typical microcontroller designs, for example. At low frequencies, even a modest trace has so little resistance to not matter for most power uses. The copper traces take care of the low frequency impedance, and the bypass caps the high frequency impedance.
Put another way, when you have a good ground plane and use good bypassing, there is little advantage to a power plane.
To answer your questions about the USB signals, don't worry about it. As I said above, I'd want 8 mil gaps to elsewhere instead of 4 mil gaps. But, even a few 4 mil gaps won't matter as long as the traces from the USB connector to the chip that handles the D+ and D- lines is short. If the D+ and D- lines on the board are a inch or less in total length and reasonably straight, a few 4 mil gaps to ground aren't going to matter.
Placing the USB chip close to the USB connector is something that should have gotten fairly high design priority.
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H: Switching coupled inductors in series while one is charged
I am designing a coil gun and would like to dump some energy from each coil into the next coil before (preferably) dumping its remaining energy back into its storage capacitor.
If I have two coupled coils, with current only flowing in one, and then switch the other one in series with it (common mode) will the current rapidly drop to nearly half (since the magnetic field is already partially established through both coils) or will something else happen?
Producing a voltage spike on the MOSFET that cannot be easily supressed would be quite undesirable, I think the capacitor on the MOSFET is still necessary as the magnetic field still needs to shift a fair bit since the coils are not co-wound. If the current can be brought near equal very quickly this will be very beneficial as the magnetic equilibrium point for the slug will be shifted past the first coil very rapidly and without using the capacitor for the second coil at all.
Here is a basic partial diagram of the concept, the diode is just to prevent a current flowing backwards in the second coil while the first coil charges. The MOSFET would be turned off to switch the second coil in. The coils would be two cylindrical coils placed next to each other coaxially.
EDIT: MOSFET replaced with switch for clarity
Ok so I have clarified the circuit a little (sorry I just use eagle since I have it open for another project). So what I would like to know is if the switch is closed and there is a fair magnetic field established in L1 what will happen when you open the switch? Will the current in L2 increase very rapidly and roughly proportionally to a decrease in L1 current, or will L2 charge at a pace similar to as if they were not coupled while L1 tries to push its existing current through the small snubber capacitor and destroy the MOSFET.
I am pretty sure it is the former, and I feel like it would be very rapid, but I would like to know from someone who properly knows these things roughly how two adjacent air core inductors will behave in this situation.
AI: As the first approximation the transformer effect can be ignored due the loose magnetic connection between L1 and L2.
Open the switch -> the current from L1 starts to collect voltage to the C. That voltage makes a gradually growing current to L2. It finally sinks the C empty, but there's still a growing current through L1 and L2 if nothing controls the input voltage. In practice it soon develops to a short circuit. This happens already when the switch is on, if the input voltage is a constant DC without another control somewhere.
If your input voltage comes from a charged capacitor, this circuit is NOT impossible. L2 really can have it's max current at the right moment and the resonance can return a substantial part of the energy.
This circuit is quite easy to simulate if you know the inductances. You can assume max. few % coupling between L1 and L2 and see its effect. The effect of the projectile needs experiments or some ultra high cost software that needs a phd to input all parameters properly.
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H: Confusion with a simple assembly code for AVR
Im using ATmega328P with Atmel Studio.
I have a problem understanding the register manipulation in this code:
#include <avr/io.h>
int main(void)
{
DDRB = 0b00000111;
PORTB = 0b00000111;
while (1)
{
PORTB = 0b00000000;
PORTB = 0b00000111;
}
}
And here is its assembly:
5: {
6: DDRB = 0b00000111;
00000040 87.e0 LDI R24,0x07 Load immediate
00000041 84.b9 OUT 0x04,R24 Out to I/O location
7: PORTB = 0b00000111;
00000042 85.b9 OUT 0x05,R24 Out to I/O location
12: PORTB = 0b00000000;
00000043 15.b8 OUT 0x05,R1 Out to I/O location
00000044 fd.cf RJMP PC-0x0002 Relative jump
And here is the view of I/O registers for PORTB for the last execution:
My question is:
If we go step by step, here 00000111 is moved to R24 cpu register and it is moved DDRB register which is at the address 0x04:
DDRB = 0b00000111;
00000040 87.e0 LDI R24,0x07 Load immediate
00000041 84.b9 OUT 0x04,R24 Out to I/O location
Here the same bit pattern at R24 is applied to the register PORTB
PORTB = 0b00000111;
00000042 85.b9 OUT 0x05,R24 Out to I/O location
But what is happeing in the last two lines here:
00000043 15.b8 OUT 0x05,R1 Out to I/O location
00000044 fd.cf RJMP PC-0x0002 Relative jump
First of all what is R1 which is not declared? And my code has nothing to do with PINB register but how come the PINB's PINB0, PINB1 and PINB2 becomes 1 here? Last two lines are:
AI: First of all what is R1 which is not declared?
r0 ... r31 are the AVR's general purpose registers. r1 is set to 0x00 by the start up code gcc implicitly generates and is then assumed by the compiler to contain 0x00 forever. Hence, wherever 0x00 is needed but a literal cannot be used, gcc simply uses r1. (Similarily, r0 is reserved as temporary storage register and may be used for any purpose in any piece of code because gcc will never use it to store anything across a function call or an inline assembly section.)
See also https://gcc.gnu.org/wiki/avr-gcc#Register_Layout.
And my code has nothing to do with PINB register but how come the PINB's PINB0, PINB1 and PINB2 becomes 1 here?
PINx represents the value (high/low) as seen on the pin. When you output a value via PORTx, that value also is reflected in the PINx (delayed by 1 clock cycle, IIRC). That's also explicitly mentioned in the datasheets.
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H: Dumping TSOP48 flash
I'm trying to understand how to dump a flash device myself without using a universal programmer.
I have this chip S29GL032N90TFI040,
I also have TSOP48 socket
The datasheet specifies the table of the device bus operations (page 17):
In SPI flashes that I dumped before the datasheets of the SPI flashes had its specific and easy to understand command for reading data, for example [0xB] [A1] [A2] [A3] [Dummy byte] [Dummy byte] [Dummy byte], after this command the SPI flash would spit out its contents from address [A1][A2][A3] until CS# was LOW, After looking in the datasheet of S29GL032N90TFI040, I didn't see the commands that are needed to be sent in order to retrieve data from this flash, only the table of device bus operations, which specifies the device bus operations pins but not the command that is needed to be sent or the ordering (there is a read operations timing image in page 65, but it is still not enough information for writing a programmer for this specific chip.)
My questions are:
How can I find out the specific command that is needed to be sent, the order of the command, the number of bytes that will be retrieved from the input address?
What Arduino like board is recommended and have enough pins to program TSOP48 chips?
Note: I know there are Universal Programmers that will make my life easy, But I don't like easy.
Thanks.
AI: It would appear the S29GL032N does not have a (serial) SPI interface. It is access using (parallel) address and data lines. There appears to be 21 (A0 - A20) address lines available on the '32 version of the chip. And 16 (DQ0 - DQ15) data lines. This will be problematic for most Arduinos as most Arduinos do not have 37 GPIO lines.
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H: PCB design: vcc plane and via limitations
I'm newbie in PCB design and I'm trying to achieve my first 4 layer pcb.
Inner layers are gnd and vcc planes filled entirely with copper. My default trace/spacing is 0.1mm/0.1mm and drill size is 0.2mm.
I calculate that a via depending on that specs is limited to 0.5mA. Maybe I'm wrong. But if so, to transfer 2A from front layer to inner vcc plane, do I need to place at least 4 vias in front trace ?
What is the minimum clearance between this vcc via and inner ground plane ?
Thanks in advance for your help.
AI: What is the minimum clearance between this vcc via and inner ground plane ?
This depends on the drill registration capability of your vendor, plus a bit of margin.
A typical figure at a shop capable of 0.1/0.1 space/trace and 0.2 mm drills is 0.25-0.3 mm for clearance from the hole to the plane (assuming no pad on the inner layers).
Another common way to deal with it is just include pads on the inner layers, and let the 0.1 mm copper-to-copper clearance, plus the pad annular ring, set the hole-to-plane clearance. Your fab shop might then ask to remove the inner layer pads to reduce drill wear, which I've always allowed them to do without issues.
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H: How to deal with routing density issues near uController
I am routing a board that I cannot make larger. It is fairly dense with lots of SMD parts. I am trying to route traces to and from a 100 pin uController to various chips on the board.
It is a 4 layer board with GND on layer 2. Mostly power planes on layer 3 so I have layer 1 and 4 for the signal traces. But layer 1 is really dense with parts.
I have routed about 80 percent of the lines but now I'm finding I'm running out of space to route the remainder. I'm finding the need to make long winding traces for the rest of the lines.
On two of the sides of the uController there are some traces going to a 20 mhz crystal and a 32768 khz crystal. There are grounded copper pours oing around those crystals so that takes up some board real-estate there.
In the middle of the chip there are fan-outs of lots of vias and I have run out of room there.
What techniques are there for routing these things short of going to more layers?
I've gotten the trace width and clearances down to the minimum the board manufacturer will allow me (.006)
I've used the smallest vias I can, but I cannot make blind, buried vias nor do I want to put vias inside of the larger pads.
I cannot put parts on the underside of the board. I cannot make the board bigger.
How much of an issue will there be if I use a part of the layer 2 (GND) for this? The highest frequency item on the board is the 20 mhz crystal. Everything else runs at 1/4 that speed. I have a buck converter running at around 1.2 mhz but that's in an area that I'm done routing.
Or would it be best to rip up the lines and try re-routing from the uController chip out? I didn't want to do that since my uController allows a lot of pin re-arrangement in software.
I'm using Diptrace.
AI: You have a few options.
You neglected to mention which PCB house you are using. Change to a PCB house with tighter tolerances, copper filled microvias, and smaller pad to drill size.
You neglected to mention which router you are using. A better router may help.
Look at the density of the routing, most CAD has a density map. Open up the power plane where the density is high.
You could also switch to a hash pattern with the power and ground leaving some area between the traces for signal routing. This could also be done just in the high density areas.
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H: Decoupling capacitors for Multiplexer?
I am using a Board with a Cortex M0 to sample signals from force sensors. The sensors have a resistance that corresponds to the force applied, so I am using voltage dividers and read the voltage with the MCUs ADC.
Since the board only has 6 GPIO/ADC ports but I want to connect 10 sensors, I added a 16:1 multiplexer and use 4 GPIOs to select the channel and 1 GPIO ADC to read the signal.
I am designing a little PCB for the multiplexer and the voltage divider resistor. It will get connected to the sensors and the MCU board with cables.
Will I need decoupling capacitors? I guess I should add one between the multiplexers GND and VIN (see C1 in schematic). What is a reasonable value for it, and do I need additional ones?
Datasheet for multiplexer: CD74HC4067
AI: The answer is maybe, if you think a voltage dip in the Vcc of your chip is acceptable (and potentially having transistors enter a metastable state, which will cause unpredicted results) then don't provide decoupling capacitors.
Here is an idea of what is going on, IC's can be thought of as a variable load that switches rapidly. Sometimes entire groups of transistors switch on and off in micro or nano seconds. This can cause the load to 'source' mA in just a short amount of time. Since PCB traces (and vias) have parasitic inductance and resistance, and even though those values are small, they make a difference in the short term.
This can be modeled as a filter. In the first example (on the left) there is no cap, the chip's load decreases momentarily and the PCB trace's inductance impedes the current from Vcc, this causes a temporary drop in voltage at the load. (Oh, and there is also parasitic inductance and resistance on the ground plane for the return current but these are usually much lower because it is a plane).
In the second example, this is avoided because the cap supplies current when the voltage drops.
simulate this circuit – Schematic created using CircuitLab
I suppose there are digital IC's that may not need a decoupling cap. If the chip was placed close to the Vcc source and a the resistance of the PCB trace and inductance were minimized I suppose a decoupling cap would not be necessary.
It takes more time (and money) to figure out if a chip needs a decoupling capacitor then it would to put it on most designs, error on the side of caution and spend a few tenths of a cent and put a cap on the load.
0.1uf and 0.01uf is reasonable for most applications, microprocessors and higher current loads need multiple capacitors.
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H: Verilog register output: reg or wire?
If I want to model a simple register I would expect to have an internal 'reg' element to hold the value and I would connect this with a 'wire' output. The reg drives an internal output.
However, I've looked up several examples and most use an output of type 'reg'. I don't understand why you would do that. Aren't you storing the value in two places this way? Is there a difference in behavior?
AI: The way to choose how to declare your signal is not by how it will be physically instantiated, but by how you will syntactically assign its value.
If the signal is driven by assignments in a procedural block (a block beginning with always or initial), then it must be declared as reg.
If the signal is driven by continuous assignment (an assign statement) or is the output of a module instance, then it must be declared as wire (or one of its variants like wor or wand), or as an output without the reg qualifier.
A reg signal might be physically the output of either a latch or a flip-flop or of combinatorial logic (for example, there's a very common way of inferring a combinatorial multiplexer using an always block). A wire might be physically the output of a latch or a flip-flop or combinatorial logic (for example if the flip-flop is within a submodule).
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H: Noise in Audio (DFPlayer) when adding LED strip
I'm having a problem with a weird audible noise in my sound player circuit.. It's due to an interference with a LED strip.
I've used this circuit (Arduino + DFplayer + Amplified Mini Speaker) many times but since I decided to add a LED strip to the circuit, a very loud noise (which sounds like high frequency strings) appeared..
I've tried to use a 104 capacitor with 270ohm resistor to create a filter, but it didn't work.
Maybe a diode with a capacitor somewhere??
Could anyone give me some suggestions to fix this?
Many thanks in advance!
Ian
simulate this circuit – Schematic created using CircuitLab
AI: The source of the noise is the PWM controlling of the WS2812 LEDs within the stripe. Their PWM frequency is approx. \$1\,kHz\$ (some say \$400\,Hz\$), what is audible for humans.
The first fix is to add a electrolyte capacitor close to the terminal of the stripe. Chose a \$\ge470\,\mu F\$ cap with a voltage rating from at least \$\ge6\,V\$. You even can use several caps in parallel.
The next step is to filter noise on the player supply lines.
Therefore use a resistor of \$\approx 100 \Omega\$ and again a cap \$\ge100\,\mu F\$ with again \$\ge6\,V\$ voltage rating. If you have inductors available replace the resistor with a solenoid. The suitable equation for determining the values is \$f_{Filter} = \frac{1\,kHz}{10} = \frac{1}{2 \cdot \pi \cdot \sqrt{L \cdot C}}\$
If you do not have inductors and there is still noise, you should consider to supply the DFplayer with a separate USB cable from the USB hub.
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H: How can I have two analogue inputs, control two PWM outputs on PIC16f?
I'm looking to have dual PWM out from a PIC16f1619. This is part of a power supply project that has pots for limiting voltage and current. I'm simulating control of the regulator with just two LEDs at the moment.
In debug mode (on Microchip Curiosity board) the Analog_AN0 never seems to run, yet both RC6 and RC7 output dependent on PORTA0 only (not seperately controlled).
I can't have set the PWM and ADC correctly but I am unsure why.
Any help would be appreciated as I am pulling my hair out over what I am sure is a simple problem.
#define _XTAL_FREQ 16000000 //16mhz
#include <xc.h>
#define RS RC0
#define EN RC1
#define D4 RC2
#define D5 RC3
#define D6 RC4
#define D7 RC5
void Analog_AN0(void)
{
PWM3CON = 0b10000000;//Enable the PWM3 H/W
RC6PPS = 0b00001110; //Sets RC6 to output PWM3
ADCON0 = 0b00000001; //pin RAO is connected to AN0. ADC ON
ADCON1bits.ADCS = 0; //Conversion clk of fosc/2 (time required to convert each bit)
ADCON1bits.ADPREF = 1; //Vref is VDD 3.3V
ADCON1bits.ADFM = 0; // will right-justify the result and store the 10bit value in the16bit register ADRES
ADCON2 = 0;
PWM3DCL = ADRESL;
PWM3DCH = ADRESH;
}
void Analog_AN1(void)
{
PWM4CON = 0b10000000; //Enable PWM4 H/W
RC7PPS = 0b00001111; //Sets RC7 to output PWM4
ADCON0 = 0b00000011; //pin RA1 is connected to AN1. ADC ON
ADCON1bits.ADCS = 0; //Conversion clk of fosc/2 (time required to convert each bit)
ADCON1bits.ADPREF = 1; //Vref is VDD 3.3V
ADCON1bits.ADFM = 0; // will right-justify the result and store the 10bit value in the16bit register ADRES
ADCON2 = 0;
PWM4DCL = ADRESL;
PWM4DCH = ADRESH;
}
void main (void)
{
OSCCON = 0b01011000;//sets clck to 1mhz
ANSELC = 0x00; //Sets PortC as digital
TRISC = 0x00;
ANSELA = 0b11111100; //all pins on A are digital except 0 and1
TRISA = 0b00000011; //all pins on A are output except 0 and 1
INTCONbits.GIE = 0; //No interrupts
CCPTMRSbits.P3TSEL0 = 0; //Associates TMR2 with PWM3
CCPTMRSbits.P4TSEL0 = 0; //Associates TMR4 with PWM4
//Set up Timer 2
T2CON = 0b01110000; //TMR2 OFF, prescaler 128, postscaler 1;
T2CLKCON = 0x00; //fosc/4
PR2 = 19; //10ms NEED TO RECALCULATE
TMR2 = 0x00; //Starting condition
PIR1bits.TMR2IF = 0; //Empties the flag to begin
T2CONbits.T2ON = 1; //init. timer
//Set up Timer 4
T4CON = 0b01110000;//TMR2 off, pre 128, post 16
T4CLKCON = 0x00; //fosc/4
PR4 = 19; //10ms NEED TO RECALCULATE
TMR4 = 0x00; //Starting condition
PIR2bits.TMR4IF = 0; //Empties the flag to begin
T4CONbits.T4ON = 1; //init. timer
while (1)
{
PIR1bits.ADIF=0;//makes sure that the flag is clear
Analog_AN0();
__delay_ms(10);
Analog_AN1();
// ADCON0bits.GO=1; //Conversion now starts
}
}
AI: You don't seem to be setting to GO/nDONE bit. You're just turning the ADC module on (bit 0 of ADCON0/2). Read the examples in the datasheet how do you do ADC conversion. You need to set the GO bit to '1' and then wait for the hardware to turn it back to '0' after the conversion is complete and ADRESL/ADRESH updated.
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H: Antistatic mat instead of antistatic wrist strap?
Just to make sure, before doing something silly: can i place a 2nd antistatic (dissipative) mat on the floor (along the 1st mat on the table) and stand on it with bare feet? Instead of wearing an antistatic wrist strap?
Of course, the mat is connected to mains earth thru a resistor. For safety.
AI: Mats will get dirty, and require periodic cleaning (more often than one might think). They should be tested regularly. They will wear out, and need to be replaced (even if it's just one person). In the long run, mats are more expensive than a wrist-strap setup, as wrist/ankle straps last longer, and are far less expensive to replace.
With that being said, we use mats, straps, and esd shoes.
Please, no bare paws while tossing solder, wires, pins, and electrons around.
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H: How an AC electric magnet works?
I want to know how an AC electric magnet works since the polarity of an AC current changing 100 times in each second (for 50Hz mains supply) so its magnet polarity(N & S) also will changed 100 times in each second. But i see AC solenoid always moved in one direction when the power is connected, why?
AI: A solenoid core isn't a magnet itself but instead a simple iron piece. Such an iron piece "gathers" the magnetic field lines which come from the coil. When the iron core is not centered inside the coil, the magnetic field lines are longer than they could be, which results in a force to change that.
a) coil without core → field lines long and wide. High magnetic resistance.
b) core not entirely in the coil → field lines shorter and "gathered" into the core as the magnetic resistance is lower there.
c) core centered in in the coil → field lines shortest and a bigger part of it running in the core so magnetic resistance is even lower than in b)
That's the reason why the core is moved into the coil. Because when it's centered inside the coil, the field lines are shorter and magnetic resistance
is much lower.
As this doesn't depend on field direction, an iron core is always moved into the coil, making it work with both AC and DC applied to the coil.
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H: Why do we care about matching the input impedance of receiving RF amps?
Lets say we have a receiving antenna that intercepts a certain amount of power \$P_r\$ = \$SA_r\$, where \$S\$ is the power flow density of the incoming EM wave, and \$A_r\$ the effective area of the antenna. This power, \$P_r\$, is also called the available power, and is the maximum power that can be delivered to the attached load (i.e. the first stage of an RF amplifier). Maximum power transfer happens when the antenna output impedance is equal to the RF amp input impedance. Thus, we can also express \$P_r\$ the following way: \$P_r = \frac{V_A^2}{8R_A}\$, where \$V_A\$ is the open circuit voltage at the antenna port, and \$R_A\$ the antenna impedance.
The first stage of an RF amplifier can be a common emitter block, which gives us a small signal equivalent like this (under tuned conditions, assuming no feedback):
simulate this circuit – Schematic created using CircuitLab
I think it is quite obvious now, that if we power match at the input side, setting \$R_{in} = R_A\$, then we won't get maximum power transferred to \$R_L\$, since that requires maximum output current, which in turn is dependent on maximum \$V_{in}\$, which is turn is dependent on \$R_{in}\$ being much bigger than \$R_A\$. Nevertheless, I see in a lot of books that they power match the receiving antenna to the input stage of the RF amp, I just can't see why one would do it, because AFAIK doing it doesn't even imply minimum noise.
AI: The "maximum power transferred to the load" in you example doesn't refer to \$R_L\$ at all. In fact, most of the power delivered to \$R_L\$ has not been transferred to it, but rather added by the power supply of the amplifier. Actually, the load seen by the antenna is the input impedance of the amplifier, \$R_{in}\$
So, why it's so important to maximise the power delivered to \$R_{in}\$, when this power is just a fraction of what will be delivered to \$R_L\$ at the end?
The answer is: it's all down to the internal noise of the amplifier.
The amplifier generates a certain amount of internal noise that comes from many sources within: thermal noise from noisy resistive elements, shot noise from active elements, etc.
We can characterise the noise behaviour of the amplifier with several parameters that are essentially equivalent to each other (Noise Factor, Noise Figure, Equivalent Noise Temperature, Equivalent Input Noise Power, etc.). For simplicity, I'll use the Equivalent Input Noise Power, \$P_{n,\ i}\$: the noise power that should be delivered at the input of a noiseless amplifier with the same gain, in order to generate at the output the same amount of noise power actually generated by the real amplifier.
Now we can see that, in addition to the signal power delivered by the antenna to \$R_{in}\$, we will have this equivalent input noise power \$P_{n,\ i}\$ also "delivered" to \$R_{in}\$ no matter what we do. So the only way we have for mitigating the degradation of SNR caused by \$P_{n,\ i}\$ is to maximise the transference of signal power to \$R_{in}\$.
And that is only achieved when \$R_{in}\$ is matched to the antenna.
ADDED NOTE: actually, impedance matching for truly low noise can differ from matching for maximum power transfer. This answer is just a simplification made for the purpose of illustrating the concept.
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H: Help understanding ESD ratings
I keep running into ESD ratings in datasheets but I have no idea what they mean, for example in LM385 datasheet it says:
What does this mean for an electronic engineer or a hobbyist like me? can someone help me understand these points please:
What is the normal and maximum human body static voltages and what cause it to increase?
What does the value 500V mean? is it safe to touch it with hand for example?
How can I tell what's my ESD voltage at a given time?
AI: What is the normal and maximum human body static voltages and what cause it to increase?
There really isn't a normal maximum, its dependent on the triboelectric charging between the materials your wearing (the source of the charge) and any discharge path (humidity in the air also makes a difference). See this article
What does the value 500V mean? is it safe to touch it with hand for
example?
That means it was tested to 500V, which mainly concerts input terminals of the device that would be connected to the 'outside' world by a cable or something the user of a device could touch. The human body model is: "this standard is intended to simulate a person becoming charged and discharging from a bare finger to
ground through the circuit under test." it involves a set capacitance and resistance and a standardized test setup.
If you want electronics to survive then get a proper ESD setup. There are numerous articles on this site and the internet that describe what is acceptable for hobbyists. An ESD mat and a wriststrap would be a good start.
How can I tell what's my ESD voltage at a given time?
You could build or buy an electrometer and measure your potential between you and ground.
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H: LED circuit stopped working when expanded
I built a small prototype as shown in my diagram with the Si926 n-FET, 250 ohm pull up resistor. In my prototype board I have only 4 channels connected (only two shown). Only one LED is ever turned on at a time. When I set 3 outputs off (ground) and only 1 on, the FET turns on and I am able to supply current close to my max of 100mA for specific LEDs. I can do this for any of 4 channels, one at a time with the other channels off. However, I had a pcb made with 32 channels, 32 FETS and 32 LEDs (only 16 pull ups) and 2 decoder chips. Now my circuit behaves oddly. If I turn on only one channel and others, as described, then slowly turn up the current source, the current supply drops out at 1ma. Drop out, is when the current source detects an open circuit or extremely high impedance and subsequently disables its output.
NOTE: I am not using the PWM of max6964. The brightness of the LEDS is controlled by the current source. The constant current source is part of a design restriction. It is supplied by a constant current supply that is controlled elsewhere. It is a bench top current source. One source for all LEDs.
MAX6964 Data Sheet
Si926dl Data Sheet
Is it possible that having 32 of these output circuits is somehow effecting (lowering) the FET gate voltage with the decoder chip output low (ground) and thus causing the FET to not switch on?
Do I need a different pull up resistor? I wanted to keep it small so the voltage drop would be in the range of Vgs 1 to 2.5v.
Would changing the FET to Toshiba SSM6N43FU with Vgs 0.35v to 1V do the trick?
Toshiba SSM6N43FU
AI: When you have 31 LEDs off, your current draw from the 3.3V rail will be:
$$
I=31\frac{3.3V}{250\Omega}=409.2mA
$$
Whereas with only 3 LEDs off (that's what happened when you only had 4 channels):
$$
I=3\frac{3.3V}{250\Omega}=39.6mA
$$
Because you are pulling up the N-channel MOSFETs with low valued resistors, having to turn off 28 additional LEDs adds 360mA to your current requirements. If your power supply can't do that, it will start pulling down the voltage, and then the MAX6964 won't be able to output 3.3V to drive the gates (because it won't be getting them at its Vcc pin in first place).
This adds up to the fact that Si969 is only marginally capable of switching at 3.3V. The RdsON at VGS=4.5V is 3 Ohm. At 3.3V you can expect it to be higher, but it may still let enough current to light up the LED. However, if the power supply gets pulled down to, let's say 2.5 V, RdsON may be too high (higher that the 10 Ohm resistor of each LED channel, possibly) or it may not be able to switch at all.
What can you do about it?
Redesign your circuit using P-channel MOSFETs and active HIGH outputs from MAX6964. This will reduce the consumptions from your pull-ups no almost zero (only the pull-ups from the channels turned on will draw current). This may be traumatic for you so you can do another thing instead...
Increase the value of your pull-up resistors. 10x, even 100x. 250 Ohm is way too low. Unless you need blazing fast switching, a 4K7, 10K or even 22K pull-up is perfectly fine.
As a last resource, increase the current rating of the power supply (=buy a more capable one). Not recommended!
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H: Circuits Reduction
Im new to electrical circuits and Im trying to understand when resistances are in series and in paralel.
Im studying this diagram
Im I able to join R4 and R5 in series? Is the same idea applicable to R2 and R5? Im doubting about this because both R4 and R2 are connected to R so maybe that might not allow me to apply add the resistances. Can anyone validate my ideas and explain to me this circuit more precisely?
Thanks
AI: R2, R4 and R5 are in series, and that group is in parallel with R. If you re-draw it like so, it may be clearer:
simulate this circuit – Schematic created using CircuitLab
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H: Are electret microphones frequency mixers?
I wonder if common electret microphones are frequency mixers. That is, say, when two signals pass through the diaphragm, will two new signals f1 + f2 and f1 - f2 be produced if the sound pressure is around 70-80dB-spl? If they are, how significant are the two signals - will the power levels be roughly the same as the input?
AI: No, at that SPL, the microphone will be operating linearly, and not producing any significant harmonics or intermodulation products.
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H: In ADS, what's the difference between a Parameter Sweep and Sweep Plan?
I want to plot the transfer function/scattering parameter of a circuit with a varying capacitance.
Which one would I use, and what are their differences?
AI: It's been a while, but nobody else has answered, so,
IIRC, a parameter sweep sweeps a single variable.
A sweep plan can sweep multiple variables in nested loops.
More information.
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H: In ADS, how do I vary capacitance values of a capacitor in my circuit and plot the transfer?
I want to see how the transfer function behaves as the value of a capacitor changes.
I've currently set up some s-parameters and a parameter sweep, but I'm not quite sure how to get it to work. Am I on the right track? Are s-parameters the right technique?
AI: It depends on what you are looking for, you can either do AC or S parameter simulation. To visualize the effect of the capacitors value you can either use "tune" or a parameteric sweep.
To tune click on the tuning fork icon and click on the capacitor. Then you should see the simulation result and how it changes when you change the slide bar with the capacitors value.
The second option is to use the parameter sweep controller. In order to do that you need to declare a variable to hold the capacitors value (var icon). Set the variable with some initial value and then assign it to the capacitors value. It should be something like "C= MyC pF" note that the units are in pF's, you can obviously change that.
After declaring the variable setup the parameteric sweep controller to sweep the variable (you will also need to point the controller to your main simulation controller)
I hope this is clear enough, I typed this from my phone. If it's not clear enough say so in the comments and I'll edit the answer from the pc with screen shots.
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H: Audio Balance Control
I've been trying to create a balance control circuit for two audio channels. I'm finding it extremely difficult. I'm very adamant about a single knob controlling both the left and right balance while the center being even.
I've tried a bunch of voltage dividers using log pots, linear pots, dual dang pots, etc.. But I just can't quite get the behavior I'm looking for. It doesn't have to be perfect, just passable as an actual balance control. I find that it's very easy to get 1 channel to pan quite well from the center, while nearly impossible to get any sort of "near" linear panning from the other channel (this was mainly the case with dual-gang log pots). Another huge problem I have is setting the middle of the potentiates rotation as full amplitude for each channel.
I've recently considered using two MOSFETS/BJT's (one each channel) as some sort of variable attenuater each controlled by a voltage from a potentiometer (or a resistance from a dual gang potentiometer) but I began running into the problem of how to prevent one channel from being amplified while the other channel is attenuated. I cannot amplify the original signal very much (I can, but just a little) due to the fact that the output of this balance control circuit is the input to a class A amplifier circuit thats biased with 5V with a gain of about 13. I'm worried that if I amplify one channel due to balancing and then try to amplify I could exceed my voltage swing and cause distortion.
I asked a much vaguer version of this question earlier which ended up yielding a design that would work with well with the B5 (maybe B4) taper of this potentiometer series: http://www.bourns.com/docs/Product-Datasheets/pdb18.pdf
This works well creating two voltage dividers by connecting the 3rd terminal to ground but I couldn't find either of those models for sale online anywhere. Unfortunately this means I can't actually use this solution to my problem.
Lastly, I'd prefer to not use a microcontroller if at all possible. I want to print my amplifier circuit to a PCB at some point and I wouldn't want to have to interface it with anything.
This is the type of balance control I'm looking for:
Here's my current circuit diagram along with some strange voltage behavior.
The strange distortion as walked through the circuit:
The only thing I've changed in this simulation is that I disconnected Vsig_RIGHT.
I realize there's a fair amount of distortion even in the second graph I posted, but this is only when the volume is maxed by setting Rp1/Rp2 to 0. I'm still tuning the circuit. But obviously there's a serious difference between with the second source connected and disconnected. Any ideas why?
Obviously nothing is perfect, the main thing that I NEED is at 0.5 rotations of the potentiometer, I need the dB loss to be -3 or less. From there on out of course I'd like the "ideal" balance control curve, but I'm really just trying to find something that works well enough that isn't too difficult to implement.
It's also entirely impossible I have no idea what I'm talking about and this is a horrible curve for a balance control, so feel free to call me out if that's the case. I'd rather that than build the thing and have it be.. not so great.
Thanks for any help in advance!
AI: The classic balance control is shown here. This needs to be driven by a relatively low impedance output, and fed into a high impedance input.
simulate this circuit – Schematic created using CircuitLab
R2 and R3 are equal. You choose their ratio to the resistance of the linear control pot R1 to choose the slope of the gain control in the middle region of rotation.
Here is a plot of the dB gain of each channel, for selections of R2 and R3 of 3k, 10k and 30k. Obviously as they get bigger compared to the balance pot, there will be a larger range of control around the balance point, and also more loss at the balance point, also known as gain boost at extreme rotation.
As you can see, with a 100k balance pot, there is less than 1dB loss at balance when 3k is used. There's about 2dB loss using 10k, and about 4dB loss using 30k.
With those 3 curves plotted, it's easy enough to interpolate to intermediate values, and even extrapolate to what would happen with more extreme selections. However, when adjustable balance is needed, most audio users seem happy with a control somewhere between the 2dB and 4dB curves.
If you are not happy with one of that family of curves, then I suggest you sketch out a gain control curve you would be happy with, gain versus rotation, in the format shown above, add the sketch to your post, and we'll see what we can do.
I've used dB in the above graph as most audio engineers use those. 3dB difference sounds the same, whether it's on a loud or quiet signal. Linear units don't behave like that. When you find a software volume control in a media player that goes from too quiet to OK when going from 5 to 10, and then doesn't seem to get much louder going from 20 to 50, you've found a linear control implemented by a programmer with no prior audio experience. There are some products by surprisingly high profile brands that still do this.
It's easy enough to switch between dB and linear units. A dB gain is 20*log10(linear_gain). The linear gain is 10^(dB_gain/20). In very round numbers, -2dB is a gain of about 0.8, and -4dB is about 0.63.
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H: I2C level translation mosfets obtainable to hobbyists
Based on this AN for level translation and overvoltage protection for I2C buses, I am looking for a recommendation for a suitable mosfet that is obtainable for hobbyists.
The recommended BSN20 and its replacement part BSN20BK are impossible to get hold of for me. Are there any common-place alternatives for a 3.3V I2C bus? (I am looking for at least 30V drain-source voltage for overvoltage protection.)
I realise that I am skirting quite close to a "sourcing question" with this but hope somebody will take it in the spirit it is intended and can recommend an equivalent product for what is surely a fairly common problem.
AI: BSS138 maybe?
Vgs below 2V and Vgs max 50V.
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H: Connecting micro-strip line and stub
I am working on impedance matching for one of my projects. After studying different stub matching strategies, I have implemented single and double stub successfully. When I use just a line and a stub (configuration shown in figure 1)
I get very good results. But when I use a T-junction-connector (recommended to use when to connect two micro-strip lines, see figure 2) my results degrade by a significant value. I am using ADS for the design. My questions are:
1) Is it mandatory to use the connector component?
2) If it is mandatory? how to assign dimensions to this component?
Fig1
Fig2
Thank you for the help!
AI: You will often be able to get better results in simulation if you model something simpler than the real world. However, the purpose of using simulation is not to get good simulation results, but as a step to getting good real world results. That means modelling everything as faithfully as you can.
When you join transmission lines of different widths in the real world, there is a discontinuity, which is modelled by that 'Tee' piece that's upsetting your nice simulation results.
The way ADS models lines is that they connect without discontinuity. That means the top picture you have there isn't finished. It's not a good model of anything. If you want a good model, you have to add the Tee.
The reason that we add a Tee manually is that there are different models for Tees, some simple and inaccurate, some more complicated and better, or you might want to use a measure S-parameter file, and all depending on the physical construction of the lines. That's why ADS doesn't assume a discontinuity when you connect dissimilar lines.
Why does it let you draw a circuit without them, like the top one? I don't know, I've never really thought about it, though I have often used ADS in a quick and dirty mode where it didn't matter so much, and I was allowing for the effects. Why shouldn't it let you simulate exactly what you draw? You alone know how well your real world is modeled.
If you leave it out of your simulation, and build what you think you've modeled, you're in for a disappointment.
How to dimension it? Look up the instructions for that component. You usually match line widths, but of course you need to specify them in the right order. You'll probably need an extra MLIN between your TERM and your MTEE.
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H: Circuit for connecting externally power instrument to MCU
I have externally powered instruments that I need connected to the ADC inputs of an MCU. They output 0-5V analog, and the MCU accepts 0-3.33V. There is no guarantee of the voltage difference in grounding, although they should be connected to the same building ground (who knows where).
I'm stumped on the most efficient circuit for this:
Differential voltage measurement (to eliminate many sources of noise)
Voltage divider (5.5 -> 3.3)
Voltage clamp (to prevent overload to the MCU)
Are not connected to the same ground locally
With some tries, this is the best that I've come up with. However, I'm not sure it's even theoretically a good design to accomplish this.
Updated circuit using AD623
AI: This schematic is rather useless :
It has low input impedance: if the source has, say, 50-100R output impedance, which is common, then your input voltage divider will be off by quite a wide margin.
It has unbalanced input impedances, and thus nearly non-existent CMRR
If you don't need balanced, forget about it, use a voltage divider with much higher resistor values, and a follower. Or no follower, if the bandwidth is now.
If you need a balanced/differential receiver, a much better solution would be a real instrumentation amplifier like AD8421. Its CMRR is humongous, and as a bonus, it will tolerate input overvoltage up to 40V above the opposite rail, so your inputs will not blow even if your board is unpowered and connected to a powered source.
However, it will not work on your 3V3 supply.
If you have other supplies on your board, then good. If all you have is 3V3 then you could look for a similar chip which will be compatible with your supply.
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H: LCR circuit with squarewave input: Why does the output take a decreasing amplitude through each cycle?
I understand a square-wave will be made up of a sum of sine waves in the form $$\frac{1}{n}sin(nf_0)$$
So when a squarewave is input to a LCR circut designed to be a bandpass filter, it will attenuate the signals either side of the resonant frequency, eg say $$f_0 = 5000 Hz$$
The signals other than the 5th harmonic will be filtered out (with elements of the 3rd and 7th coming through since it isn't a perfect band-pass filter).
I do not understand the output waveform however.
So there should be 5 peaks between each cycle of the square wave right? Due to it being the 5th harmonic. That's about all I understand, and I'm really struggling to find good sources which discuss the square-wave input to tuned bandpass filters.
The output I have has the 5 peaks between one cycle of the squarewave. When the squarewave is high, the output's first peak is at the peak amplitude, which then decreases until the squarewave switches to low, once it switches to low the output will increase in amplitude (but less than the first peak) and then decrease again until the squarewave switches back to high and the cycle repeats.
What is the cause of the decreasing amplitudes of the output and the relation between the increase in amplitude when the square-wave switches from high to low?
edit:
The LCR is in series.
edit:
scale on channel 1 is 2V, had to resize to decrease the file size to <2MB
AI: Your LCR resonator has losses, so it is a decaying sinusoid wave at 5 MHz.
Before it decays to zero, it is re-excited by the negative-going edge of your 1 MHz square wave. Then re-excited by the next positive-going edge of your 1 MHz square wave....and so on.
If you wish to see more of the exponentially-decaying envelope, try changing the frequency of your generator to 714.3 kHz so that you pick out the 7th harmonic. Or try 555555 Hz to see the 9th harmonic. These will be lower amplitude of course, since the excitation energy for each harmonic is smaller.
Be aware that your oscilloscope frequency display is incorrect. It is a difficult wave to measure because of its complex shape, so perhaps frequency error is understandable. The frequency content is exactly five times your source frequency.
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H: Is this capacitor suitable for boost converter (low ESR)?
I am about to build voltage booster (1.5V battery to 3.3V) with NCP1402.
Datasheet recommends 68μF tantalum or two 22μF capacitors for output.
Schematic looks like this:
Output capacitor should have low ESR (page 16):
The output capacitor is used for sustaining the output
voltage when the internal MOSFET is switched on and
smoothing the ripple voltage. Low ESR capacitor should be
used to reduce output ripple voltage. In general, a 47 μF to
68 μF low ESR (0.15 Ω to 0.30 Ω) Tantalum capacitor
should be appropriate. For applications where space is
a critical factor, two parallel 22 μF low profile SMD ceramic
capacitors can be used.
I have smd ceramic 22μF caps, but I do not know whether they are suitable or not.
I measured ESR of those caps with LCR meter:
8.30Ω @100Hz
0.63Ω @1kHz
0.04Ω @10kHz
0.04Ω @100kHz
ESR is fine for frequencies over 10kHz. But it is larger than recommended value at 1kHz and lower.
Is this capacitor suitable? Is it possible to ignore higher ESR at lower frequencies? Should I buy different/better caps?
AI: First, I doubt that the ESR measurement at low frequency is accurate. Ceramic caps have much lower ESR than Tantalum, which can affect phase margin and transient response since your ESR zero moves way higher in frequency.
Second, ceramics caps can show very large reductions in capacitance with DC bias, so depending on the dielectric you have you may have much lower capacitance than you think.
Third, there is significant current ripple in the output caps of a boost converter. If you do use a tantalum cap use a polymer tantalum and check the ripple current rating. Ordinary tantalum caps are known to short and ignite with excess ripple current (sometimes even within their ripple current rating.)
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H: Why does 'in-circuit emulator' contain the word emulator, if nothing is being emulated?
Doing a quick read up on in-circuit emulator (ICE) hardware, I'm confused as to why the word 'emulator' is included. It sounds like most ICEs are just fancy chips that can control a processor for debug purposes. However, it seems like nothing is being 'emulated'.
Why is this?
Edit: I'm specifically referring to this Analog Devices 'ICE' here.
AI: This is primarily historical, and I'm sure one of the old timers that has been doing this longer than I've been alive will come in with a better answer.
We take for granted the on board debug capabilities and flash ROM in modern microcontrollers, DSPs and ASICs. In the old days, the processor may have either been one time programmable (use once), or require UV erasure before reprogramming (45 minutes under UV was a good rule of thumb). These types of parts do not work well for rapid iteration during development. In comes the emulator. Since most of these parts were DIP or LCC, they were usually socketed. An emulator board would easily plug into the processor socket or a connected header on the application hardware. The emulator emulated the processor that would ultimately end up there, and have full access to the hardware.
Parts that do not have on board debug facilities still exist and are in active production. The PIC18F14K50 comes to mind. If you want to debug it, you need a special debug board. Microchip has a family of them.
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H: How to find Steinmetz parameters from datasheet?
Given a certain core material I would like to know where and how I can extract the Steinmetz parameter from its datasheet. Hope someone can help me out. Thanks.
datasheet:
https://en.tdk.eu/inf/80/db/fer_13/R4180x2620x1250.pdf
https://en.tdk.eu/download/528882/6a0da25e2745be5c13b587b3d4a8de48/pdf-n87.pdf
AI: The core loss equation is in the form \$P_{loss}=a\times B_{pk}^b \times f^c\$.
Where \$P_{loss}\$ is the core loss density, \$B_{pk}\$ is half the AC flux swing, and \$f\$ is the frequency. \$a\$, \$b\$, and \$c\$ are constants for the given material.
The data sheet for the material gives you curves for \$P_{loss}\$ vs. \$B_{pk}\$ and \$P_{loss}\$ vs. frequency at different values of \$B_{pk}\$.
From there you can use a curve fitting routine (Matlab, Mathcad, hand calculation, etc.) to get the constants.
It may be easier to call or email applications support for the product and see if they can help you.
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H: Correct ESC amperage for a small electric motor
I disassembled a drone. I want to re-use two of its motors to build a twin-engine RC model plane.
My motors are best for 3.7v, and according to their reference, draw 0.18A-0.20A of current.
What ESCs would I need, current-wise?
It seems like all ESCs on the market are from 6A and up; What am I missing?
AI: 0.18A and 0.2A are the no-load figures. Expect 2~5 times higher operating current depending on prop size, and ~10 times higher stall current.
It seems like all ESCs on the market are from 6A and up; What am I
missing?
Here's one rated for 3A:-
HobbyKing 3A Single Cell ESC - Brushed Micro Motors
A 2A ESC would probably be fine, but there's little point producing such a small controller when a higher rating can be achieved at minimal extra cost. A 6A controller should be more robust and efficient, if perhaps a little heavier.
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H: Designators in Altium PCB Libraries
I've noticed that some Altium PCB Libraries contain a designator in a Text field using the .Designator parameter. I've duplicated this in my own libraries, however if I attempt to place a component on the PCB, I have two designators displayed (the default, and the one I added to the library). Is there something I'm missing?
The reason why I ask is I've been working on using some smaller components lately, and the default designator is too large. At the very least this would save me some time in the Inspector.
Any ideas?
AI: As far as I know you can't do anything about this in the library, but in the PCB layout, you can open the properties for the component and select the 'Hide' option under the Designator section. That is the default designator properties. Any additional string you add in the PCB library with .Designator as the text will appear as and where you place it in the PCB footprint, even multiples.
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H: Do low-ESR ceramic capacitors in the uF-range exist?
I am designing a power supply for my board and plan to use an isolated, regulated DC-DC converter. This converter from Murata fits the bill, but the datasheet doesn't provide any guidance on input or output caps.
So I looked at competitors and found this one from TI which is a more feature-rich version of what I'm using. The data sheet shows this example circuit:
The note on the input cap says:
\$ C_{IN} = 2.2\mu F \$ for 5-V input devices... Low ESR, ceramic
capacitors are required.
Is there a typo here? On Digi-Key (search URL), the highest-value they have for low-ESR ceramic caps are 3.3nF, and they cost $43 USD each. What gives?
AI: For your purposes, you should read that statement as asserting two things.
Ceramic capacitors have low ESR.
You can use a ceramic capacitor with this regulator because it is stable with low ESR caps.
Due to a lack of historical perspective, you didn't quite understand what this statement meant. It is not your fault. Once upon a time, most regulators used aluminum electrolytic caps or tantalum caps. Both of these have MUCH higher ESR than ceramic.
But aluminum electrolytics are bulky. And then, for a while, tantalum was very difficult to obtain (the great tantalum shortage). And the ceramic caps became much more available in higher capacitances. So everybody (the IC vendors) started designing their regulators so that they could use ceramics. This was a marketing point, and an important consideration.
"Our regulator is stable with low-ESR ceramics! No need to struggle with procuring unobtanium tantalum caps, or simulate a tantalum by adding a resistor in series with your ceramic cap (something that was also done at times)."
Hope this clears things up. I am sure you can use any X7R or X5R ceramic cap. If you are really worried (if you don't believe me), try to find out if the part has an evaluation board available. If it does, there will be a published BOM for the evaluation board. So you can use the exact same cap TI used on their evaluation board in your design.
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H: Drive LEDs in a bar from an amplifier output?
I'm working on a small-scale audio spectrum analyzer. I take an aux cord L/R inputs into two amplifiers that output to a speaker. Say I pass the output that goes into the speaker into 3 bandpass filters for low,mid, and high ranges.
If I then rectify that output to a DC voltage, how would I configure a "bar" of LEDs to light up based on that voltage? Say I had 6 LEDs per bar. When there's little to no bass I want only the first 1-2 LEDs to light up, and when there's a lot of bass all 6 LEDs to light up.
I'm trying to this project with only analog components, as I realize this is a trivial task with a microcontroller.
I'm not sure if it's important or not in this type of circuit, but other than the signal output I have access to a 5V DC source that I've mainly used to bias the amplifier.
I can't quite figure out how to configure the LEDs in such a way that it matches the behavior I desire. I've searched around online and see some circuits use zener diodes to achieve this sort of effect. I think I want to turn the LEDs on through current and not voltage but am unsure how this works. I breadboarded some LEDs and played around and I couldnt get the right behavior.
EDIT:
As duskwuff pointed out below, the LM3914 is a great and pretty easy solution to this problem. But I hate easy. I've been messing around more and here's what I've been trying to do:
1) Rectify my signal output using a full wave rectifier. There's a problem with this though, my amplifier output signal has a minimum p-p of around 200mV. This means that at lower volumes, no signal will be rectified because the diodes will not allow current through. Could I possibly solve with with an amplifier stage between the output and the rectifier input? I have a 5V DC source available.
2) At this point I'm trying to figure out a way to use NPN transistors as switches that turn on at different rectified output levels. My success with this has been, well, very limited. At first I tried using Zener Diode's taking advantage of their zener voltage, but I looked around and I can't find any with a low enough Zener voltage that would work here. I could put an amplifier between the rectifier stage and the NPN stage, but I'm not sure thats the best solution.
I've included a picture of my entire circuit schematic so anyone can see what I'm working with here.
Starting at the far left I have a balance control, followed by a 3-stage amplifier, followed by a rectifier.
Any help would be appreciated.
AI: The standard part for this task is the LM3914 ("Dot/Bar Display Driver"). It functions as a multitap voltage divider, and compares the signal with the value at each tap:
The easiest way to build this will be to simply use a LM3914 for each graph. The pinout of this part is such that you can directly drive a 10-segment bar graph LED from the chip. If this is too easy for you, you can try building an equivalent circuit yourself, but you'll need a lot of comparators to make it work.
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H: Why does VGA have so many ground pins (compared to DVI-I for example)?
If you look at the pinout for VGA, there are several ground pins:
I was curious as to why, and I found this answer. To sum it up, the extra ground pins are so that each pin has its own ground in order to prevent interference in the analog signal.
But here's a DVI-I connector that supports analog signals:
The analog pins are on the right side. The big cross is ground, and the four smaller pins surrounding it are for the red, green, blue, and horizontal sync. What is interesting here is that the ground is shared by all three color channels, unlike VGA where each has its own.
Why are the additional ground pins necessary to prevent signal interference when using VGA but not DVI-I? They're the same pins that send the same data, just with a different physical connector, so it doesn't really make much sense as to why the number of ground connectors are different.
AI: First: What's critical isn't so much that there's a ground pin for each signal as much as that there's a ground pin near each color signal. The cross-shaped ground pin largely satisfies that requirement.
Second: DVI doesn't prioritize high-quality analog video -- it's a Digital Video Interface, after all. The small loss of quality incurred by using a single analog ground pin was probably considered acceptable by the designers.
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H: What is the simplest circuit to measure RELATIVE RF signal strength with multimeter?
I need to use a multimeter to align two low powered dipole antennas which are in the same room. Naturally, I cant hook up the antenna directly to the multimeter. Which is the simplest circuit to get relative measurements of RF signal strength with multimeter?
I found this one online, but I'm not sure if it will get the job done. Would I connect one pole of the dipole to "RF" and the other to "GND"? And how would I interpret the output on the multimeter?
AI: A schottky diode rectifier, the circuit you've posted, is the simplest way to read RF on a multimeter. Build it and see if it works for your power level and frequency, you may be OK.
You would connect the two inputs labelled GND and RF to the two outputs of the dipole. Note that GND is just a label, it doesn't need to be connected to earth, it really means 'the terminal against which the RF signal is measured'.
Read the output voltage without RF present. Any change from that means an RF input, and a larger change means a larger signal.
However, there are two issues.
a) The signal has to be 'big' enough. A simple unbiased diode is quite insensitive for small signals. Biassing it so that it always conducts a trickle of current, and then measuring the change of output voltage with RF, makes it more sensitive. For instance, connecting the +VE output terminal through 100k to -1.5v (a single AA for instance) with respect to ground would pull an adequate biassing current through the diode.
Rather than simply measure the output voltage, which will be sensitive to temperature and bias current, it's a good idea to have two identically biassed diodes, only one fed with RF, and measure the difference between the two outputs. The offset voltage on the reference diode will track changes due to temperature and bias current on the detector diode, making the measurement more stable.
b) The diode has to be 'fast' enough for the frequency you are detecting. Although schottky diodes are inherently very fast, as in they don't have the carrier storage times associated with junction didoes, they still have junction capacitance and package inductance, which attenuate the RF at higher frequencies. You can get diodes in surface mount packages, to reduce inductance. You can get microwave diodes, with much lower junction capacitance.
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H: Why using a IR sensor instead of a IR sensor module (1838B)?
I bought an Arduino kit and it contains two sensors for IR (if I'm correct).
The first is a looking exactly like a LED but black (but heard it is a IR receiver).
The other item looks like this; which is an 1838B.
Why would I use the first LED-looking like part instead of the 1838B?
AI: The black LED is photo transistor. This means the current through this part is controlled by the IR light intensity on a certain wavelength. The output is a real analog signal without any processing and signal forming.
The three pin 1838B is an IC, which is also a IR receiver with integrated pre processing of the analog signal. In this particular case this devices has a \$38\,kHz\$ filter, which corresponds to the IR carrier frequency of some IR remotes. It also demodulates the IR signal and generates a digital output. Perfect for reading data from remotes.
According to your use case, you can pick either of them.
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H: Electronically programmable buck converter module
I need a electronically programmable buck converter module.
Because I do not trust my skills to approach high-frequency circuits, I thought I would modify one of these very cheap pre-built modules as a basis:
From the datasheet of the MP2307DN controller, I suspect their circuit is as follows:
Can I remove R1 & R2 from these modules and:
replace R1 with 100k fixed resistor
replace R2 with a DS2890 1-Wire digital potentiometer?
Is there any downside to having the potentiometer in the lower leg of the voltage divider? Is there anything I am overlooking?
Edit 1: Attempt at implementing Andy aka's answer:
AI: Andy is right about parasitic capacitances.
Changing feedback resistor values will also change stability conditions. The current source solution is nice, but a simple voltage source connected to the feedback node through a resistor of appropriate value will work just as well.
It is also possible to connect the GND pin of R2 to ground via a capacitor, but set its DC voltage with the output of an opamp and another resistor.
If you bought this module pre-made though, you won't know the voltage rating of the output capacitors. If you increase output voltage, caps could need a replacement for properly rated ones.
EDIT:
simulate this circuit – Schematic created using CircuitLab
Using this simple schematic, you can pull the feedback voltage by using the PWM output from a microcontroller, filtered by a cap. You could also use a DAC for lower ripple.
Now, how to obtain resistor values...
Your chip has a 0.925V reference voltage. This means "FB" node is at 0.925V. On your original schematic, R1 and R2 form a simple voltage divider.
Let's suppose we want Vout max=5V. We pick R1=10k and R2=2.222k, and we get FB=0.925V for Vout=5V. This gives us R1.
Now, we're doing a DC calculation, so we forget about the cap. We set PWM=0V. R3 and R4 are in series, and R3+R4 are in parallel with R2.
For Vout=5V at PWM=0V => R2 // (R3+R4) = 2.22k
This does not give resistor values yet! There is still a choice to make. We have to adjust R2 versus R3+R4 to get the sensitivity we want. For example, if our micro has a PWM output which goes to 3.3V, we might want a 3.3V PWM to correspond to a 1V output. Or maybe another value, it's your choice.
I'm too lazy to do the math right now, but I guess you get the idea!...
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H: Current sensing with Rdson?
I'm fooling around with a PMOS, a Fairchild FDD6637, and pondering whether it would be possible to use Rdson as a sort of shunt-resistance for measuring the voltage drop, to get the amount of current flowing through drain and source.
The circuit will be using 2A at most. Here I'm thinking that if there's a short circuit somewhere, and the current rushes, I want to be notified when the current goes above 3A.
With Vgs = -4.5V, Rdson is 20mohm. At 2A, the Vds-drop will be 40mV. At 3A, the drop is 60mV.
So I had this idea: feed the drop into an opamp and pre-amp it to a more feasible level. Exactly how it's supposed to be coupled is unknown at the moment (I'm just playing with the idea), but let's say I couple the opamp to convert 60mV drop to, say, 4V (Vcc is 5V). Then let's say I deliver these 4V to another opamp (comparator) where one of the reference inputs is set to a fixed 3.9V, making it trip when the 4V arrives. That way I'll get a signal telling me there's a current rush.
Question: Am I thinking correct, or am I attacking this problem from the wrong direction?
AI: What you are proposing is a very common practise in DC/DC converters. Many of the driver chips made for P-FET buck conversion have a 100mV current fold-back trippoint, which can be created by a FET's own resistance, or an external resistor.
There are some reasons people might choose to use a resistor, like the turn-on time of a heavy power FET, in which time the apparent resistance may be higher than at steady state, causing false trips. But if you take proper care of such occurrences it can work fine, for example if inrush currents are limited at turn on, or you ignore it for about a ms when you turn on.
You could use a standard comparator to detect 60mV or 100mV directly. There's quite a few with more than enough sensitivity and only 10mV or 20mV hysteresis built in, so that you need only one part.
If you want the current to be measured by a micro-controller as well, your approach may be the best way, and you could Google something like "Using an Op-Amp as differential amplifier", I'm sure that'll result in some interesting reading to get you started on converting the 5V and 4.94V input into a 4V output.
Make sure the input common-mode range of the Op-Amp (or Comparator) is rail-to-rail, as you will be measuring at the VCC Rail with both pins.
Be aware though, that you can't trip at 50mV and expect that to be exactly 2.5A. You need to allow for some error margins.
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H: What is the difference between a buzzer and a speaker and are there any other basic electric/electronic things that output sound?
I am playing with a speaker and a microcontroller and in some documentation the speaker is called buzzer. The assistant told us that is a mistake and we are dealing with a speaker.
I am wondering what exactly is the difference between the two, where can I learn more about these kind of devices and if there are any other similar or not so similar devices that are able to output sound.
EDIT:
What is the difference between a piezo buzzer and why isn't buzzer a tag but piezo-buzzer is a tag ?
AI: A buzzer usually has an oscillating transistor circuit inside - to make the buzzing noise when voltage is applied, so it makes a tone.
Applying voltage to a speaker will not make a tone, so you'd need an external oscillating circuit (e.g. a 555, or transistor oscillator). A speaker can play all kinds of sounds, however due to its built in circuits, a buzzer may not be capable of playing tones other than its oscillator's tone.
Buzzers are usually piezo buzzers - based on a tiny bit of crystal inside. You can usually see a metallic flat surface there, with a larger box/circuit underneath for the built in oscillator circuit.
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H: Calculating voltage drop across part of an AC circuit
I have the question:
"If the supply to a circuit is \$25\sin (628.3 t) ~V\$ and the voltage drop across one of the components is \$18\sin (628.3t - 0.52) ~V\$. Calculate the voltage drop across the remainder of the circuit."
I have never come across a question like this before. The questions I am use to involve using the cosine and sine rule to derive an expression. However, this method does not work for this question.
I am not quite sure how I would solve this question. Can anyone please point me in the right direction?
The solutions says that the answer should be \$12.96 \sin(628.3t + 0.762)~V\$ but I have no idea what method to use to get this answer.
AI: Perhaps a picture would help you see what you have to do.
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H: Pre-biased transistor, what is infinite resistance pull-down resistor
I am trying to select a pre-biased transistor, and I noticed some of them have a what is listed as an infinite resistance base pull-down resistor.
I do not understand how or why an infinite resistance base pull-down resistor works, and if this has an advantage or disadvantage over lets say a normal 10K pull-down resistor.
Thank you for the help.
Screenshot from a datasheet:
AI: This just means that r2 is not installed. Actual infinite resistance is difficult to achieve ;-)
As to why do this instead of 10K? Perhaps there are applications where base current should be restricted but it is not desired to divide the input voltage in half?
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H: How to get a precision stable 4.01v output?
I have an unstable power supply voltage between 4.925v to 5.212 DC. How to get a precision stable 4.01v output?
AI: You could use something like this which is very simple with 1% accuracy, but that's better suited as a voltage reference so you might prefer an LDO. There are many low current adjustable LDO options available. Here is a 2% accuracy LDO which you would need to use a couple of resistors to set the output voltage.
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H: Motorcycle flasher question
I wanted to add LED flashers to my motorcycle (I previously used 10W classical bulbs). After I installed both on the right side (front and rear) I noticed that they won't blink. They will turn on, dim for 1 second, and then stay on forever (without ever dimming again). I thought the problem was a relay, but then I hooked up one of the old flashers on the rear, and now the front led one worked fine too...
Why does this happen?
Would attaching an extra load solve the problem? (I was thinking of a resistor in parallel with the led flasher, so that it would mimic the classic bulb, though dimming the led brightness)
Is this a good idea?
Do I have other alternatives?
AI: They will turn on, dim for 1 second, and then stay on forever
This sounds very much like the new LEDs aren't drawing enough current thru the old mechanical flasher. These things work by having a heating element wrapped around a bi-metalic strip. When cold, the bi-metalic strips bends in a way to open the contact. The heating element across the switch. When the bulbs are off, they have low resistance and most of the applied voltage is across the heater. That heat up the bi-metallic strip, which causes it to bend to close. That turns on the lights fully, but kills the current thru the heater, allowing the strip to cool. The switch opens and the process repeats.
Your flasher is intended for use with incandescent bulbs. These have two properties the LEDs don't. First, they have much less than normal operating resistance when not fully on. Second, they draw a lot more current.
The solution is to replace the flasher with one designed for your relatively low current LED lights. I haven't looked, but with LEDs being common today, there are probably replacement flashers specifically intended for driving LEDs. If not, it wouldn't be hard to make a simple circuit that switches the voltage to the LEDs on/off over time.
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H: Can I use SPI for asynchronous serial input?
I need a second serial async input channel on the MSP430G2553 and would like to use the SPI USCI to do this.
Is the USCI SPI baud rate stable enough to do this at 300 baud, 2400 baud or 9600 baud? I am currently using the 8 MHz clock.
Is there any other option that can save me from bit-banging?
Might it be possible to do asynchronous receive by starting the clock-out when the start-bit is received?
My current thinking for Rx on the SPI at 300 baud is as follows:
start bit interrupt disable
wait for 1/2 bit
do Rx enable
Rx interrupt
start bit interrupt enable
One can use 10 bit receive on some of the other members in the family that contains a SPI.
Please note that this is a similar question to: Can I use SPI for asynchronous serial output? but the answer is much more complex because the SPI clock output must be aligned with the Rx bitstream.
Only half duplex is possible if you want to do Tx the same way.
Thanks.
AI: Some possible solutions:
1. UART by Software: Maybe it's a good time for you to consider this option. In this case the transmission is very simple using a timer. The reception is a bit trickier. However the things get easier with the support of external interrupt on RX pin (to detect the start bit). Always taking into account that the receiver will sample the pin in the middle of the bit period. The solution is limited to small baud rate rates, so that the error is below 5%.
2. MAX3100 SPI compatible UART from MAXIM or MAX14830 (quad Serial UART with 128-Word FIFO).
3. UART through SPI ": Yes, the MSP430G2553 has two independent UCSI modules: USCI_A0 can operate in UART/LIN, IRDA and SPI modes and USCI_B0 in SPI and I2C modes. So, I believe you intend to use USCI_B0 to emulate an additional UART. Similar to the UART by software, the complexity will depend on whether you want only transmission, reception, or both. Also the transmission will be simpler. You should consider what SPI mode (0 to 3) to choose in order to define the UCCKPL (CPOL) and UCCKPH (CPHA) behavior. I remember the definition of UCCKPH is inverted in relation to the traditional definition of CPHA. In many SPI based applications, the MSB is sent first. Otherwise, in UART, D0 bit is transmitted first. That can be configured in UCSI registers.
In any case, they follow references with guidelines for a possible implementation (first is more detailed):
Using the ST626X SPI as a UART, from ST
Using the SPI as an Extra UART Transmitter, from TI
But there will always be a software overhead, because the SPI protocol is as the name says: SPI - not UART, and finally, make sure it's worth.
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H: ESD - Is it safe to connect yourself to an electrical outlet?
Is it safe to connect yourself to an electrical outlet?
Either directly or indirectly.
I would prefer to not connect myself directly to an electrical outlet, via (as I've heard) attaching a wrist strap to the middle screw of an outlet.
Though I am wondering about connecting more indirectly.
I am building a computer, that has a fully painted case. I have heard of a way to ground using the computer's power supply by:
Plug in power supply to wall outlet, turn power supply OFF, partially unscrew one of the four power supply screws (that hold it onto the computer case), then attach the anti-static wrist strap to the threads of the unscrewed screw.
Is that safe, in regards to indirectly connecting yourself to a wall outlet?
I would prefer a standalone ESD setup, that doesn't involve a wall outlet, however I have not yet heard of any ways to do so.
Thank you very much for helping with this.
AI: If your plug has a correctly wired earth pin, then you can use that to ground yourself.
However before you do, it is worth noting that all reputable ESD wrist bands contain an embedded 1MOhm resistor. This is done primarily so that if you accidentally connect yourself to mains voltage (either through what you are handling, or through a wiring fault in the plug) the resistor limits the current that can pass through you, and so protects you from certain death.
I would suggest buying an ESD wrist strap. If you make your own, be sure to include a 1M resistor.
To be fair though even if you don't include the resistor, as long as you are absolutely sure you have connected yourself to the earth pin and nothing else, it will not do anything worse than touching the back panel on your PC (or the case of the PSU) because those are generally tied directly to earth on the outlet anyway. If touching your PC gives you an electric shock, consult an electrician.
As an alternative to the earth pin on an electrical outlet, you can also use things like metal plumbing pipes as these are typically earth bonded to the electrical system earth in the house, or go down physically into the ground.
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H: Does pure silicon conduct electricity?
I understand that silicon has an incredibly important use in microelectronics, as its semi-conductive properties allow us to make transistors. However, this is only possible after introducing other elements such as phosphorus and boron into the lattice. What I'm wondering is if silicon is able to conduct electricity at all without any doping being done?
AI: they all conduct electricity to some degree, some more than others, as a perfect insulator doesn't exist.
the resistivity data for silicon is widely available. on the order of Kohm x m, vs. nohm x m for copper. that should give you some sense of its conductivity.
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H: Level shifter to convert dc voltage
Can anyone help me to design a circuit which outputs 0v dc when the input is 2.6v dc and 5v dc when the input is 5v dc?
AI: After reviewing your earlier circuit and some of the discussion there (you should modify your question to refer directly to it and also extract the important details from the discussion there and re-post it in your question here), I'll propose this circuit:
simulate this circuit – Schematic created using CircuitLab
The above circuit uses two \$10\:\textrm{k}\Omega\$ pull-up resistors for \$V_{OUT}\$. This can be changed if you need a lower impedance output when high (with some implications for the other resistor values.) I didn't gather from you a specific output impedance so I just used those.
The circuit uses \$R_6\$ and \$R_7\$ to inject some current into \$Q_1\$'s base node. Because the circuit includes carefully designed hysteresis, the output will be held low until both inputs transition to \$+5\:\textrm{V}\$. Then it will transition high. Once high, though, the output will stay high until both inputs transition back to \$2.7\:\textrm{V}\$. (The hysteresis is substantial so it should be relatively immune to noise.)
The behavior looks like this:
Here it is with added noise on the two inputs:
As I understand you, there are four LEDs indicating five states for your tank of water. With all four LEDs off, the water in the tank is below the threshold where you then want a motor turned on to fill the tank. With all four LEDs on, the water in the tank is above the threshold where you then want the motor turned off (to stop filling the tank.)
When an LED is on, the voltage on one side of the LED (relative to ground, I'm assuming) is \$2.7\:\textrm{V}\$ (which makes sense, since the LED will drop a certain voltage not unusually in that range.) When the LED is off, the voltage across it is \$5\:\textrm{V}\$ (which also makes sense, if a low-side switching circuit isn't allowing much LED current.)
I think you are then suggesting using the voltage present one two nodes, one node from one side of the lowest-level indicating LED and one node from the highest-level indicating LED as a means to signal when to operate your motor.
I see the table like this:
$$
\begin{array}{r|lccc|l}
\textrm{State} & \textrm{LED}_{low} & \textrm{LED}_{low-mid} & \textrm{LED}_{high-mid} & \textrm{LED}_{high} & \textrm{Action}\\
\hline
\textrm{empty} & 5.0 & 5.0 & 5.0 & 5.0 & \textrm{turn motor ON}\\
\textrm{filling} & 2.7 & 5.0 & 5.0 & 5.0 \\
\textrm{filling} & 2.7 & 2.7 & 5.0 & 5.0 \\
\textrm{filling} & 2.7 & 2.7 & 2.7 & 5.0 \\
\textrm{full} & 2.7 & 2.7 & 2.7 & 2.7 &\textrm{turn motor OFF}\\
\textrm{draining} & 2.7 & 2.7 & 2.7 & 5.0 \\
\textrm{draining} & 2.7 & 2.7 & 5.0 & 5.0 \\
\textrm{draining} & 2.7 & 5.0 & 5.0 & 5.0 \\
\textrm{empty} & 5.0 & 5.0 & 5.0 & 5.0 & \textrm{turn motor ON}\\
\textrm{...}
\end{array}
$$
The very high input impedance of the given circuit should not cause any trouble for your LED displays or the circuits driving them. Use the first and last LED columns shown above as your two nodes for the circuit. It will produce a LOW output when the motor should be OFF and will produce a HIGH when the motor should be ON. Couldn't be simpler.
The output impedance might matter. But it is trivial to reduce the output impedance with a very simple added stage, if you need it.
The circuit is resistant to noise, uses parts that are available anywhere in the world where electronic parts are available, and the parts are widely supplied, too. And they cost next to nothing. Nothing boutique here. Not even close.
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H: What is a safe state machine?
When I implement a "safe" state machine in Quartus, what is the difference between a normal/unsafe state machine?
Edit: And is this the same as:
case state is
...
when others =>
nextState <= idle;
end case;
if you don't take into account that the synthesizer ignores this "when other"?
AI: A safe state machine in Quartus is a state machine that if it reaches an illegal state (for any exceptional reason, such as glitch, metastability, etc.), it will reach the reset state after one clock cycle.
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H: Grounding conductor has a non-zero voltage (i.e. with respect to "true" ground). Why?
We're building a new house and I'm not confident with the skills of the electrician who installed the receptacles. In our country, residential structures are supplied with 240 V, 60 Hz (single phase).
Here's what I currently know:
1. Hot and neutral conductors may have been switched (he used the same color of wires for both so there's really no way of knowing which is which when installing a receptacle)
2. Grounding conductor is connected to a ground rod.
2. Grounding conductor is not yet bonded with the neutral conductor
3. At the receptacle, voltage across the hot and neutral conductors are 240V, as expected.
4. However, voltage across either hot and neutral and ground hovers around half of the line-to-neutral voltage, at about 120V.
What could cause this? It's my understanding that since the neutral conductor is already grounded at the transformer on the utility pole, even if the neutral conductor at the load side is not yet bonded with a grounding conductor, measuring the voltage across neutral and a grounding conductor should read a very small voltage (e.g. < 3V).
AI: One possibility is that your power supply is not single phase as you state, but rather split-phase.
If that is the case, you don't have a hot and a neutral, but two hot wires. The two hot wires are 120V to ground each, and 180° out of phase, resulting in 240V across them.
This would explain your 240V line voltage, your 120V hot-earth and "neutral"-earth measurements, and the identical wire colors for your hot and "neutral" wires.
To confirm or deny this, you could (carefully!) measure the voltage between your hot or "neutral" and a known ground reference such as a stake in moist soil, or a tap water pipe - assuming you have metal piping.
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H: NPN Switch when ON operating in Forward Active or Saturation Region?
When an NPN transistor is used as a switch as shown below, is it operating in the Forward Active Region or the Saturation region when it is turned ON? I believe its working in the Forward Active Region since V_BC = 0V < 0.4V and V_BE = 0.7V. I read somewhere that an NPN is in saturation when operated as a switch in the shown configuration. I'd appreciate if someone can clarify.
AI: A fast calculation: ON-state Ib is about 4.3mA. (= (5V-0.7V)/1kOhm). If the transistor has current gain =50, then the Ic should be 50 * 4.3mA = 215mA.
R2 and +5VDC supply limits the Ic under 5V/100Ohm = 50mA. So there's at least 4x exessive Ib, the transistor is heavily saturated.
Due led's voltage drop (often about 1.5V) the theoretical max current is probably only 35mA. This gives more reason to believe the saturation to be true.
The current gain =50 is only a quess, but be it even as low as 25, the transistor is still heavily saturated.
This was not asked, but maybe it's interesting: The saturation is resulted from exessive Ib. This is done to be sure that different individual transistors of same type surely have enough Ib for proper(= low voltage drop) switching. The saturation makes the return to off-state slow and delayed, but often this is not harmful. High power high frequency pulse circuits suffer much if the action is slow or delayed. It causes exessive heating. Even short circuits are possible if there is a temporary current path through transistors right from +supply to GND or -supply.
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H: Are reverse biased transistors stable?
The usual circuit (found widely across the internet) for a true random number generator's (TRNG) entropy source is a reverse biased transistor like so:
Q1 is typically a 2N3904 as it has been found to be quite noisy the wrong way round running in breakdown mode. +ve is typically in the order of 11V. This topology works well initially.
I came across someone who had built a TRNG and experienced problems whereby "after about 3 months of use the noise signal would drift." I've seen other references to long term degradation of such a topology but can't seem to locate them at present.
I have the sense that continuously shoving electrons the wrong way up a transistor might be detrimental, but have not found any references to prove this one way or another. After all, this is not the principal use case for a transistor.
Could the junction suffer gradual and irreversible damage thereby altering it's noise characteristics? Zener diodes are another situation altogether as breaking down is their modus operandi.
Three references on E.SE discuss reverse biasing, but not long term stability:
Understanding reverse biased PN junction
Does a reverse-biased P-N junction create quantum noise?
Is my avalanche noise “random?”
Is a reverse biased transistor stable in the long term?
AI: No they are not stable.
but stability is improved at lower currents <=10uA from my research. *
The current gain Ic/Ib of bipolar transistors strongly decreases
when the oxide over the emitter-base junction is damaged. The results obtained with different stress conditions lead to point out two degradations processes: the main process consists in the increase of the recombination
in the vicinity of the space-charge region in the emitter-base junction.
Ref DEGRADATION OF JUNCTION PARAMETERS OF AN ELECTRICALLY STRESSED NPN BIPOLAR TRANSISTOR
N. TOUFIK, F. PILANCHON and P. MIALHE*
The above report was based on the 2N2222 which has a lower reverse breakdown threshold than the 2N3904 and also more noise voltage, but perhaps faster degradation. I have yet to find a report on the 2N3904 so an uncontrolled avalanche current is unstable with a small resistor
Transistor I=1μA 10μA 100μA Noise(I=10μA) For I=[5-50]μA noise:
BC107B 9.30V 9.30V 9.28V 200mVpp inc., max=10μA, dec.
BC548A 8.44V 8.46V 8.45V 100mVpp constant
BC547B 8.23V 8.22V 8.23V 100mVpp decreases
BC547C 8.36V 8.35V 8.34V 120mVpp decreases
BC546B 8.19V 8.21V 8.19V 120mVpp inc., max=10μA, dec.
2N3904 10.82V 10.80V 10.76V 400mVpp constant
2N2222A 7.20V 7.25V 7.23V 440mVpp constant
Ref http://holdenc.altervista.org/avalanche/index.html
The above uses a constant current source unlike Paul Campbell's rng2.0 which relies on avalanche current in base * hFE limited by Collector R = 3.3k to 20V so if hFE is only 100, diode can be (20V-1Vsat)/3.3k/100(hfe)= 58uA which would be excessive.
Given the initial question design saturates the noise into a digital signal and noise can vary in current with temperature as well as spectral bandwidth it is not stable and the threshold above 10uA where failure rapidly degrades is unknown, limiting the reverse current to the Mfg's test criteria for Vr would make most sense.
The next question is how stable does it need to be? What is life span criteria and repeatability to NIST scores? What are the test results over ambient range?
Increasing the coupling capacitor size may increase the max number of consecutive 1's, a figure of merit by extending the number of decades of frequency range at the expense of startup delay or sensitivity to supply regulation drift.
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H: How to configure an opamp for differential mode to trip an NPN?
I'm learning op-amps at the moment, so try to bear with me because this text will most likely contain a lots of errors.
I have a chip resistor, 10mohm, that I intend to use as a shunt for measuring current. Vcc = 5V, I = 2A normally. I = 2.5A means things are going wrong, 3A = dead wrong. So, somehow I want to watch the voltage drop of the resistor, and when the current goes to high (I haven't set a limit yet, but let's say 2.5A) I want an NPN to conduct, just for the sake of testing.
So, I've got two measuring points on the resistor: Rs1 and Rs2. 2.5A with 10mohm is 25mV. That is, when the voltage drop over Rs1 and Rs2 > 25mV, trip the NPN. If voltage drop < 25mV, do nothing.
Rs1 and Rs2 goes to an opamp's in+ and in-. Other than that, I'm stuck. I am completely clueless what sort of feedback network I'm supposed to use to achieve what I want. Googling for "opamp differential amplifier" gives me http://www.electronics-tutorials.ws/opamp/opamp_5.html which seems to be basic enough for me to understand, but I've been reading this paragraph five times now and I just don't get it:
Then differential amplifiers amplify the difference between two
voltages making this type of operational amplifier circuit a
Subtractor unlike a summing amplifier which adds or sums together
the input voltages. This type of operational amplifier circuit is
commonly known as a Differential Amplifier configuration and is
shown below
This sounds like it's what I'm trying to achieve, but what does it mean that the circuit is a "Substractor"? If I'm supposed to amplify the difference and letting the 25mV-level trip the NPN-base, what's substracting got to do with it?
I'm clueless, really.
Is differential amplifier the kind of feedback type I'm searching for here, for my testing?
AI: You probably don't need any feedback but you will need a reference to compare the voltage you get from the current sense resistor to. A resistor divider from a stable voltage rail is the most basic, a divider across a zener diode is recommended or there are cheap little voltage reference ICs. I would recommend a comparator rather than an op-amp (they work in much the same way but comparators are better suited to this since they are not trying to be nice and linear).
I'm going to assume that the resistor isn't at a high voltage relative to ground, you don't need to connect one side to ground ('tis preferred though) but it can't be outside of the voltage rating for the comparator unless you have it on an isolated supply (which is kind of what I drew).
If you have a voltage rail that is stable enough you can get rid of the zener and the resistor that feeds it and just use the voltage divider. These values here will be appropriate for a 5.1V zener (a very common value).
simulate this circuit – Schematic created using CircuitLab
Also just a technicality but you don't really 'trip' a bipolar transistor since they conduct proportionally to the gate current, even though the circuit as a whole results in a 'tripping' effect at the current limit.
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H: Is it okay to take \$\beta=I_c/I_b=98/2\$ in this problem?
In an npn power transistor the collector current is 20mA. If 98 percent of
the electrons injected into base region reach collector then the base
current in mA is nearly ?
Here, in this problem is it okay to take \$\beta=I_c/I_b=98/2=49\$ ?
AI: It sounds like they mean 98% of the emitter current, not the base current. That means you're given \$\alpha = 0.98\$. You can use that to calculate \$\beta\$ and find the base current.
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H: P channel FET reverse polarity protection - toggle switch on base
I am trying to add a reverse polarity protection in my circuit using a P channel FET, but I also want to have a SPST toggle switch in series with the gate for the user to turn the circuit on or off.
I just tried this circuit on a breadboard, but it is staying on regardless if the switch is closed or open, but I am not sure why. I am thinking that when the polarity is backwards, the gate receives EMF and that is what's happening, but I am not sure.
Could anyone explain this to me, and if there is another way to do what I want?
Thank you
AI: The Source and the Drain are swapped, so the MOSFET reverse diode is always conducting.
Also, you put a switch at the GATE, not at the base which a Mosfet doesn't have.
EDIT: For polarity protection that is the way to connect but then you cannot expect to turn the FET off since the reverse diode will always conduct. If you want both polarity protection and switching you need two back to back MOSFETs
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H: How to implement serial-to-fiber optic Ethernet with WIZnet W5500?
I'm using W5500 to implement a serial to Ethernet converter, but I need to transmit over fiber optic cables. I will have a TX cable and a RX cable.
How can this be done since the output of W5500 is differential? Can you suggest a schematic?
Thank you!
AI: Since that device includes a PHY for wired ethernet over twisted pair copper, chances are you can't directly attach it to anything but twisted pair copper ethernet. The datasheet lacks any reference to standards, so it's very likely it's been tuned to exactly and exclusively that purpose. Best thing you can do is build it for wired ethernet, than use one of the many "media converter" boxes that translate between twisted pair ethernet and one of the fiberoptical ethernet standards.
So, you mention that you want to build a network-to-serial adapter with a specific networking interface.
That's a pretty normal problem, and that's why there's standard interfaces for connecting processors / microcontrollers to dedicated PHY chips. The standard you're looking for is "Media Independent Interface" (MII) or the "Reduced Media Independent Interface" (RMII). There's many microcontrollers that have that, and whose manufacturers have example implementations of Ethernet and TCP/IP stacks (gut feeling: you don't even need IP, and could probably work on Ethernet frame level just as well). Buy one of those, take an example firmware, connect a (R)MII PHY to the microcontroller's (R)MII pins, and be done. You can probably buy some eval board that does just that.
Another alternative would of course be, assuming your serial port is slow (compared to the Gigabits you can push through optical cable) to not have the network logic on the serial side, but on the other end of fiber – so it'd be
Serial device – "dumb" signal translator – optical cable – "dumb" signal translator – serial-to-Network
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H: Do I need to put a resistor at the collector of this MOSFET driver?
When I look at this schematic, I think of two scenarios but I don't know which one is correct:
Collector resistor does not exist. So, Both the transistor and the Mosfet provide a short circuit. A very high Current flows from the positive terminal of the battery to the collector and then comes out of the emitter and enters the gate of the Mosfet and exits from the source. Therefore, a resistor MUST connected between the positive terminal of the battery and collector to limit that high current.
Collector current is limited by the forward current of the diode which is limited by the resistor (R1). So, There's no need to use a resistor at the collector.
Which one of these scenarios is correct?
Thank you very much,
AI: A very high Current flows from the positive terminal of the battery to
the collector and then comes out of the emitter and enters the gate of
the Mosfet and exits from the source.
A MOSFET's gate-source impedance is tens of Mohm because it is a voltage driven device. However, it may have a sizable GS capacitance up to 10 nF so, theoretically there will be a short impulse of current that flows when the BJT turns on. However, that current is limited to a few tens of milli amps usually.
The current through the LED is limited (to about 10 or 20 mA) and the CTR (current transfer ratio of the opto) is somewhat limited to between 20% and 600% usually. This means that the BJT collector current might be between 2 mA and 120 mA.
There is no need to use a collector resistor.
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H: Low Frequency Response of BJT amplifier(effect of bypass capacitor)
Doubt related to impedance seen by the bypass capacitor:
or
What is the impedance seen by the bypass capacitor \$C_E\$
To calculate the impedance as seen by \$C_E\$, we attach a Thevenin volatge source as shown.
Applying Kirchoff's current law:
$$ \frac{V_T}{\beta r_e+R_S||R1||R_2}-\beta I_B+\frac{V_T}{R_E}=I_T$$
$$\frac{V_T}{\beta r_e+R_S||R1||R_2}+\beta \frac{V_T}{\beta r_e+R_S||R1||R_2} +\frac{V_T}{R_E}=I_T$$
$$V_T[\frac{(1+\beta)}{\beta r_e+R_S||R_1||R_2}+\frac{1}{R_E}]=I_T$$
$$V_T[\frac{1}{\beta r_e+R_S||R1||R_2}+\frac{1}{r_e+\frac{R_S||R_1||R_2}{\beta}}+\frac{1}{R_E}]=I_T$$
From here I get the resistance as
$$\frac{1}{R_e}=\frac{1}{\beta r_e+R_S||R1||R_2}+\frac{1}{r_e+\frac{R_S||R_1||R_2}{\beta}}+\frac{1}{R_E}$$
However in book, the resistance has been given as:
$$R_e=R_E||(\frac{R_s||R1||R2}{\beta}+r_e)$$
It seems the first term in \$\frac{1}{R_e}\$ vanishes!
Where might have I gone wrong?
(I have referred to the following text book: Electronic Devices and Circuit Theory, by Boylestad and Nashelsky.)
AI: Soumee, I cannot identify any error in your calculation.
However, if you replace in the third line of your calculation the term (1+β) by β, your result will be identical to the expression as given in the book. As you know the current gain β is relatively large (mostly > 100), not a constant but dependent on Ic and - more important - equipped with large tolerances.
Therefore, we often simplify (1+β) to β (without expecting not acceptable errors) - and this seems to be the only reason for the discrepancy you have observed.
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H: 2.5ns analogue beamformer (8 to 1 channel)
I’m looking for a chip or system that can receive eight ultrasonic signals from 1 MHz up to 10 MHz, delay each channel with a set delay (minimum of 2,5ns and max 2,5us), combine them (sum or sum/avg) and send the combined (analogue) signal out again. This system should preferably be analogue, but if it must internally be digital the sampling rate should be sufficient to exclude under-sampling.
I would be very thankful if anyone of you knew such a system or a vendor that makes such products.
AI: Are the delays set or variable?
If they are set then you can use analog delay lines and add them together with a resistor network. Here are some examples http://micro.apitech.com/delay_lines.aspx, the switched coaxial delay lines are something that you might even be able to build yourself.
If the sensing arrangement would work and still be linear with the sensors in different positions you may be able to simply change the position of the sensors to introduce delay.
Otherwise you will need some very advanced equipment, something that can sample eight 10MHz signal at say 40MHz at even 8-bit accuracy will generate a data stream of 2.5Gb/s. You would need to program an FPGA unless you can find a bucket brigade type delay chip that can operate at several times your maximum frequency, if it exists it would be insanely expensive.
For combining the signals the easiest way is something like this:
Search op-amp adder for more details.
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H: Controlling a LDO with voltage detector
For one of my project I need to shutdown my system when my Li-ion battery reaches 3V.But I want to know if I can use this type of component : http://www.farnell.com/datasheets/11601.pdfhttp://www.farnell.com/datasheets/76549.pdfhttp://www.farnell.com/datasheets/11603.pdfFor detecting the battery voltage and disabling my LDO? I know they are designed to be used for the Reset of microcontrollers.But it should work just fine by using one of those three no?Thank you in advance !EDIT :I first wanted to use the TC54 from Microchip which is designed for this purpose but it seems to be obsolete...I also need the system to be through hole.. This is why I don't use a battery protection chip, because I could not find one..
AI: You can get a combined charge and discharge protector like this: -
This might be more of an effective solution. If you just want a low discharge current solution that is available in through-hole components then this might be of interest: -
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H: If a SoC is given more memory then it is able to use, how does it deal with that?
Say it can only use 2GB's, and is provided 4, does it only use half, or not use any of the ram?
AI: Say it can only use 2GB's, and is provided 4, does it only use half,
or not use any of the ram?
A "generalized" microprocessor or SoC has typically three buses and the relevant one to this question is the address bus. If it has a 16 bit width (like the 8085) then it can only "talk-to" 65,536 (\$2^{16}\$) memory locations. This means you cannot force it to be connected to more. Buses on an 8085: -
If you have some RAM that is bigger than that implied by an address bus of 16 lines then you should ensure that unused lines (on that memory) are tied to either logical 1 or 0.
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H: Driving multiple Pi GPIO using Arduino GPIO
I am trying to send TTL pulse from single Arduino digital pin to 8 different Raspberry Pi simultaneously. For this I have connected 8 raspberry pi in parallel to arduino digital pin.
Since, Arduino runs at 5V and raspberry Pi at 3.3V, I am using a switching diode (1N4148) connected to 3.3V pin on pi as shown in the figure for droppping voltage levels.
Now here is my question, when I check for output voltage at Arduino it shows 0.2V rather than 5V which means that arduino pin is not able to drive all the pi as they are drawing a lot of current. Also another thing, when I start removing one pi at a time from circuit, the arduino starts working perfectly for 4 pi. As far I can think of this is mostly an issue related to not enough current to drive all pi.
How can I make this ciruit work?? I read up online that a voltage buffer say something like LM110, LM741 can be used to solve this issue. Is this the right direction to work on? Can something else be done?
AI: The diode circuit should work but not safe to parallel multiple loads to single drive. The voltage across the pi inputs will be diode drop plus 3.3 V (VCC of Pi). The current through the diode connected externally will be about 1.3 mA multiplied by 8 will give ~11 mA. Also, the input capacitance of all the Pi's inputs and 8 cables connected will make switching that current at high speed will get trouble with rise time and fall time too.
For your particular application, if you can buy one 74LVC245 buffer IC, please go ahead with below solution.
You can simply connect the Arduino single output to all the 8 inputs and derive 3.3 V level signals from the outputs. the advantage is that it is simple to use (Breadboard friendly) and easy to connect to.
The input voltage can be up to 5.5 V. Hence, it can accept the Arduino's input and drive the Pi's input easily.
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H: Is it allowed / possible to OR two opamp-outputs?
See schematic.
As from what I have been able to read, coupling two outputs together is a Very Bad Idea. I yet lack the knowledge to understand why, though.
But; if one adds a diode in serial with each opamp-output, would it be possible for them to act like an OR-gate (so to speak), controlling the NPN-base? That is, if either U1 or U2 (or both) has a high output, and R1 is chosen properly, will the NPN-base be turned on here?
AI: Yes, what you show should work.
However, consider the stability of the opamps. If they are being run open loop (used as comparators) or the feedback path is before the diodes, then it should be OK. If the diodes are in the feedback path, then things could get unstable.
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H: Transistors are closing slower than opening - will it be problem in H-bridge?
I want to build robot with 2 DC motors to move like a tank. So I need 2 H-bridges (one per motor) to be able reverse the rotation.
I used https://www.pololu.com/product/1117 motors rated for stall 0.8A at 6V, and rated to 3-12V. I also used some H-bridges rated 2A+ and 7.6V LiOn battery, but eventually I burned 3 H-bridges :(
On the last I was able to make some measurment and it showed -30..30V spikes (on DSO138 osciloscope) and sometime about 1.6A (at common mutlimeter - slow).
So I decided to build more robust H-bridge (to not burn at all) and make measurement on that. something like BJH H-bridge going in reverse but not forward, LL transistor overheating with transistors rated 10A, 100V ( TIP142, TIP147 ).
But I found in datasheet, that for Resistive load
Turn-on time is 0.9us while Turn-off time is 4us - this lead me to conclusion, that when swithing eg. left side top/down it would shortcut the rails for 4 - 0.9 = 3.1us
Is that right conclusion? Is that a real problem? And if it can be corrected/used, what is good PWM speed to drive it effectively?
Thank for your help
AI: Is that right conclusion? Is that a real problem? And if it can be
corrected/used, what is good PWM speed to drive it effectively?
Yes this can be a real problem and one solution is this: -
The RC keeps OUT1 and OUT2 from being on at the same time. Make RC equal to a few microseconds to avoid the "clash". See also this stack exchange Q and A.
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H: How to drive a HFBR-1541 optical transmitter?
I want to drive a HFBR-1541 optical transmitter (see page 7; 60mA output current), and I want the driver to have extended operating temperature range (at least starting from -20 degrees Celsius).
The driver recommended in the datasheet, SN75451, does not meet the extended operating temperature range requirement and its corresponding version, SN55451, is not produced any more.
Can somebody suggest a circuit or schematic to drive this transmitter and meet the operating temperature range requirement.
AI: The industrial version of the 74F3037D goes from -40C to +85C and I have used it for driving a very similar device namely the HFBR-1414MZ: -
Three outputs were combined to share the load current. C65 was a speed-up capacitor. This was running at a data rate of tens of Mbps.
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H: Trying to find out the voltage threshold for input of a GPIO pin in an FPGA development board
I need to use a camera module along with De1-SoC development board. Camera requires 3.3V to work and it provides outputs with a 2.5V output pin.
I am trying to find what is the range of voltages that the FPGA will detect. I can not find that information easily anywhere in the specifications or any datasheets. This is the only official help I have found in the DE1-SoC User Manual. If the detection range for '0' is 0V-1.5V, and for '1' is 2.2V-5V I should be able to just plug the camera straight to the FPGA. Otherwise I would need to add additional voltage shifters.
If someone could point me to where I can find information regarding the official input detection characteristics I would be very grateful.
This is the link to the De1-Soc manual, and this is cyclone V manual from which I am too trying to fish out that information.
AI: Cyclone V pins are configurable for numerous different standards. Look into Cyclone V Device Handbook Vol.1 in chapter 5. Specifially, JEDEC Standard JESD8-5 (that is "2.5V low voltage CMOS") is supported.
From the De1-SOC-Schematics (download CD.zip from Terasic) you can see, that all banks have \$VCC_{IO}=3.3V\$ (except the HPS-banks which use \$1.5V\$). Pins on these banks will correctly detect 2.5V CMOS input (see "I/O Standards Voltage Levels"), but they will not be able to generate 2.5V output.
In general, Alteras Device Handbook (at least Vol.1) is a recommended read, if you want to put your board to use.
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H: Why are BLDC motors so expensive?
My general question is why brushless DC motors seem to be much more expensive than similarly sized brushed permanent magnet motors, especially considering that the construction of the latter is more complicated?
In my concrete application, I'm looking for a brushless DC motor with a 10-15W max power rating. I was first looking for an alternator of that range, but this kind of product practically doesn't exist, I believe because a BLDC fills this role pretty well. Using a BLDC as a generator is a very attractive idea - since you're not driving it, you don't need to worry about ESCs, you just throw in a 3-phase rectifier and you're done (also, it's much easier to detect the running speed by detecting the zero crossings on one of the phases. And some BLDCs have Hall sensors as well, which makes it even easier). Comparing an in-runner BLDC to a brushed DC of similar size, you'd expect them to be practically the same in terms of construction, with the latter adding the brushes and the commutator - you'd expect it to be slightly more expensive. My research indicates that the reverse is true: a decent BLDC fetches upwards of $100 in most reputable electronics shops (e.g. Electrocraft in the UK), even in Alibaba they are $30+ (the price break for 100 units), and even RC-craft units optimized for onesies from eBay are $15-$20. Then you can definitely buy s very well machined japanese brushed motor (e.g., Mitsumi) for a few bucks.
Why is that? Are BLDCs still considered a novelty and economies of scale do not yet apply to them? Or am I missing some technical detail?
AI: Brushless DC motors typically use strong permanent magnets on the rotor. This does some nice things, like alleviate the need to get any electrical power across the rotating interface. It also allows for Hall effect sensors to determine the position of the rotor.
However, these strong permanent magnets currently require rare-earth metals, such as neodymium. Being rare but in demand makes them expensive.
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H: 4 by 4 bit Multiplier. Logisim help
I am trying to recreate the following design:
When I create it in Logisim, this is the error I get:
I understand the incompability is due to the number of data bits. When I adjust the data bits, none of the output will work. How can I fix it?
AI: You need to use a splitter component (first item under "Wiring") when combining multiple 1-bit signals into a bus, or when separating them back out. Simply wiring them together, like you've done, doesn't work.
Here's what it should look like:
Note that you'll need to split and recombine the output from each of the adders -- for instance, the input to the second adder is made up of {CO, S3, S2, S1}, not {S3, S2, S1, S0}.
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H: LED's or OLED for creating specfic colors
I'm trying to create specific colors given the RGB values (please not that the RGB values go from (0-255) RGB LEDs use voltage to turn on and the voltage varies from color to color (The red LED in an RGB LED may turn on at 2.7 Volts while the Blue and Green LED in the same RGB LED will turn on at 3.3volts. I was wondering if any one knows of any LEDs / OLEDs that can use the (0-255) RGB color values
Example of a RGB color I'm trying to create?
AI: I design LED grow lights for Horticulture Research at the University of Florida. I have analyzed every top end color LED out there. Not just studied, analyzed.
It is important to understand Radiant vs, Luminous Luminescence. Luminous is adjusted for the color perception of the human eye.
The perceived brightness, or luminous efficacy, of light is technically specified by the International Commission on Illumination (CIE). Each wavelength efficacy is related to a wavelength of 555nm (Lime Green).
LEDs are generally spec'ed in Luminous Flux. Luminous Intensity is a whole different thing.
But that's not all, Intensity is often confused with Illuminance and Luminance.
So we have four methods of measuring the amount of light emitting from an LED.
Luminous Flux
Luminous Intensity
Illuminance
Luminance
No one has asked the question what is the difference between these 4 measurement.
But that's not all. I touched on this in the previous answer.
The above 4 measurements relate only to Photometric units of measure.
The three basic units of light measurement are:
Photometric (photometry)
Radiometric (radiometry)
Photonic (quantum)
Radiometry is the study of optical radiation of light, ultraviolet radiation, and infrared radiation. Radiometric is a measurement of the actual flux emitted from the light source.
Photonics measures light as quantum particles called photons. Photons are elementary particles of light which carry light's electromagnetic force. Photons, travel in straight lines at the speed of light, and carry a fixed amount of energy. Photons have two distinguishing characteristics, direction and wavelength. Photons are a quantum measurement of light particle energy measured in the quantity of photons per second. Typically measured with some sort of photon detector which counts the number of photons that hit the detector's surface within a period of time.
Photometry, is about human optical visual response to light (luminous spectral response). Photometric is a measurement of the flux emitted from the light source and then adjusted for its sensitivity to the human eye. Photometric measurements only includes light visible to humans. The human eye is most sensitive to green at a wavelength of 555nm (Lime Green) as determined by the CIE (International Commission on Illumination). This 555nm wavelength is the international photometric standard to which all other wavelengths are compared.
The following is from a paper I am currently writing titled "Understanding LEDs"
I am somewhat confident these number are relevant. I do need to have someone else verify they are correct before I publish.
I created this table for common LED colors
CIE sets the spectral luminous efficacy of the human eye for each wavelength starting a 555nm. The CIE defines photopic vision as 683 lumens/watt at 555 nm.
This I wrote a PHP script to create an SVG image from the table of CIE table of CIE Photopic Luminous Efficacy.
This sums it up, almost
Then there are the official SI Units of Measure
THE LED DRIVER
LED voltage means nothing with respect to LED brightness. LEDs are current driven with an LED constant current source.
An LED Driver can accurately adjust the current flowing though the LED.
The numerical value for the RGB colors have to be translated to the LED driver. A typical PWM driver will have at least a 1000 intensity increments.
The Radiant Flux of the LED can be adjusted for Luminosity. You want the LED driver's max current set to the luminous flux for the RGB values of 255,255,255. You can then use PWM to Dim the LED for all other values of 0 - 254.
If you were to use the Luxeon Color C line LEDs the Red and Blue Luminous Flux are about 38 lumens and Green is 97 lm. So the driver's max current for the green LED must be reduced by 255% of the Red and Blue max current.
So if the red and blue were set to run at 500mA max then the Green would be set to 195 mA. Then the PWM RGB ratios are the same for all 3 LEDs.
For the driver below the Red and Blue drivers Riadj would be 6.24 ohm and for Green Riadj would be 2.4 ohm
The LM3414 is a very capable yet simple and inexpensive ($1.00) LED driver. It has the least part count of any driver and it is a common anode driver where only one wire and ground is required for connecting the LEDs, rather than two wires for each LED.
THE RIGHT LEDs FOR RGB
For RGB you want LEDs designed for flawless color mixing with consistent radiation patterns. If you want the best, go with the LUXEON C Color Line
These are tiny (2mm 0.08") color LED with a very wide viewing angle, Red 162°, Blue and Green 175°. They come with secondary optic lenses.
Do not be fooled by their size. The Color C pictured can take over an Amp. Do not be fooled by the datasheet. You cannot look at just the Luminous Flux, but if you do, look at the binned ones near the bottom of the datasheet.
This table is a comparison of the top color LEDs. At first glance it appears the Color C are not quite as bright as the Rebel and XPE especially the red.
A closer look the forward voltage is lower, which means less watts, less heat. Temperature is the most important characteristic when comparing LEDs
The Color C are spec'd at 85° C the others 25° C, that would add at least 10% to Green Luminous Flux, and 50% more for Red. See Temperature vs. Normalized Output graph in datasheet.
Thermal Resistance. 2.8 vs 8.0. This means thermal management is more effective. 285% better in this case.
The there is the viewing angle and spectral distribution of light. These are the best color LEDs for RGB available.
I took this picture to show how small they are. On the left is a LUXEON SunPlus Royal Blue 450nm for Horticulture which is the same as a Color C except spec'd out in Photosynthetically Active Radiation rather than Lumens.
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H: Help Identifying a Differential Pair-Like Symbol in a Schematic
I am working on an adapter to connect a Xerox Docutech keyboard to a modern computer. This keyboard used a specialized, keyboard/mouse interface that does not have a modern counterpart. I have a schematic for the interface but I am uncertain about a symbol it depicts. As you can see below, the KbrdData + and - lines connect to what looks like a differential pair that generates a single, "DataFromKbrd" signal. They look a bit like op-amps... but I have no idea how those would help in this situation. What exactly are these components? How would I go about making one out of modern parts?
AI: Based on the vintage, I'd bet an Internet Doughnut that it's a 26LS32 differential receiver. http://www.ti.com/lit/ds/symlink/am26ls32ac.pdf
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H: what sort of switch can I use?
Noob here, with a basic question.
I am looking for a switch to close a circuit not straight to ground. P channel MOSFET seems fitting, but I would like one where to keep the switch open, it does not consume power.
My problem in more detail:
I just redid a battery powered arduino project incorporating a wake on shake from sparkfun. It is a 5V node, used to be on a 6V battery, that I now replaced with a 3.7V and I am regulating to 5V for the node. I had battery level reporting by having two resistors hooked up to an analogue pin to ground pin and raw pin respectively. Now, I would like to do the same for battery (connect the 3.7V positive to the same pin with a different resistor), but not constantly, only switch this circuit on by the arduino at certain intervals.
Please, point me in the right direction, how to best tackle it.
Thanks,
AI: Arduino pins set as INPUT does not eat much current, when you do not read them.
If you are not to go for power-save sleep modes and similar technics, you are probably good just to connect one resistor between 3.7V and analog pin, then other between analog pin and digital (or analog) pin. Set the other pin as INPUT and it would be high resistance and nearly no current will go.
When you want to read voltage, set the digital pin to OUTPUT and LOW and you have ground. Wait for a moment to things to set (I do not know, like delay(5) or so), read the analog pin and sent the digital to INPUT again (and you do not consume power again).
Other solutions may be much harder, need other circuits (like relay) and even if such circuits would not eat power in disconected state, the cost (in power spend) of switching them may be higher, than the minimal power consumed this way. (Especially when you need a pin for managing the switch anyway).
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H: Virtual Earth - Signal Connection
Im creating a guitar effects pedal as a final year university project and I'm running it all from a single supply
I understand the concept of a virtual ground such that the input signal is biased in-between the power rails however Im having a hard time understanding the correct way to connect the input signal to the op amp
Im using OPA2350 op amps with TLE2426CLP rail splitter.
The jack lead connection from the guitar provides a mono signal with the ring being 'ground' and tip being the audio signal
Should I connect the ground of the jack lead to 'real' ground (supply rail) of the op amp then connect the audio signal to both virtual ground and the input of the op amp through a capacitor (biasing at \$\frac{V_{in}}2\$)
Or should I connect the ground from the jack lead to the virtual ground from the rail splitter then connect the audio signal straight to the op amp such that the 'ground' from the guitar would be raised to \$\frac{V_{in}}2\$?
Which way would be correct?
AI: Door two... You connect the virtual ground to the incoming ground. That way the power floats either side of the jack ground, which is what you wanted in the first place.
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H: Can i replace 1n4148 with 1n4007 in this circuit (pic Programmer)
I want to conceive a pic programmer i found this circuit but i didn't find 1n4148 can i remplace it with 1n4001/1n4007 in this circuit It affects the pic or dysfunction of the system in speed ou current
AI: You can use a 4007 here. Orr a shottky diode, or a small signal BJT. Pretty much anything works here, other than high power rectifiers
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H: Screw Terminal Block Amperage Ratings
Does the 15A amperage rating for screw terminal blocks such as the ones shown below refer to each pole or to the entire product?
I have a project that will require 5A on each pole. Would this block work for me?
AI: The 15 A rating is the current capability across each bus connection and on each terminal. So you can't use two terminals to take 30 A in and ferry it to two further-down terminals to take that 30 A out.
Your description sounds like you want to take a single supply in and route out several 5 A supplies out. You can bring in several 15 A supplies, each on its own wire and near three terminals loading with 5 A. Even though these will all be connected to the same common bus-bar, distributing the supplies and loads that way will be fine. (I designed a similar arrangement recently, routing out 40 A to a variety of loads.)
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H: LM139 Comparator question
I am new in the world of electronics and am having trouble understanding an example circuit found in the LM139 data sheet. I created the circuit on a breadboard and it does indeed work, but I am not understanding the current flow and WHY it works.
http://www.ti.com/lit/ds/symlink/lm2901-n.pdf
The circuit in question is figure 28(Limit comparator) on page 16 of the datasheet.
Since the output of the LM139 is an open collector, when both comparators are "HI"(the input signal is in between the non-inverting pin of comp 1 and the inverting pin of comp 2), would that not sink the current to ground by turning on the internal transistor and not allow the voltage source to activate the external transistor? Could someone walk through how this circuit behaves?
Thank you!
AI: When both comparators are "HI", their output transistors are off; you can imagine that their outputs are disconnected. In this case, current flows through the resistor into the base of the 2N2222 and turns that transistor on, allowing current to flow through the lamp.
When either comparator is low, and its output transistor is on, that shorts the base of the 2N2222 to ground, turning it off.
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H: Full-wave rectifier problem
I am studying full-wave rectifier now.
here is the circuit that I made and then I connected oscilloscope between K and L.
As I've learned from the classroom, this circuit has to make full-rectified signal
However, when I measured the voltage between point K and L, I got this result.
I've tried to think what is the problem here, but I can't figure it out.
Is it kind of related to floating ground?
I really don't know what's the problem here.
Can you help me please?
thanks ahead.
and sorry if I sound like rude...I am studying English as well...
AI: As you surmised you can't easily look at the signals on a scope if the AC source is referenced to ground.
You need to get a floating AC source, for example a secondary on a transformer. The your scope ground can connect to point C or D and measure the voltage at the other points such as G and H.
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H: A bit of help understanding an IC
I am using an LM4875 as a pre-amp for an audio circuit. Schematic here. The intended function is to "condition" audio inputs from different sources so they have the same peak-to-peak voltage when passed to the power amps.
My understanding of the circuit is that it applies a variable inverting gain at AMP1 which is set by the DC volume control. Then it inverts it again with a gain of 1 at AMP2 and powers RL.
It has an input called HP Sense which can be used to turn AMP2 off if HP Sense is driven high. This allows the circuit to ignore RL and instead power headphones instead of a generic speaker.
If I do not plan to use this HP Sense function can I simply use the output of AMP2 and break the AMP1 output connection right after it's junction with AMP2 negative input? Basically, can I use Vo2 and leave Vo1 as a NC?
AI: If you're only going to use one output, you should use Vo1 since that's what the chip is designed for. But I'm not sure why you'd want to do that. The chip is designed to drive a speaker with differential ("bridged") outputs. Among other things, this lets you connect the speaker directly to the IC with no decoupling capacitor. It also looks like the amplifier can provide more output power in bridged mode.
Also, if you want to do signal conditioning, a power amplifier IC is probably not the best choice. I would suggest either a proper automatic gain control circuit, or (if you need digital control) something like a PGA2310.
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H: Capacitive current leads, inductive lags, but how does this translate to voltage on an output?
I'm really confused about the capacitive current leads the voltage, inductive current lags the voltage. The reason for this confusion is the graphs I've seen in different sources trying to explain this, the inconsistancy has really made me question everything I know about voltage and current.
One source used $$ V_R ; V_L ; V_C $$ to show that Vc leads i, VL lags i and VR will be in phase. Another source used V_S and showed the currents respectively leading/lagging the input voltage.
This probably sounds stupid, but it has confused me a lot now, is the voltage across the capacitor in phase with the voltage source, but the current through it is out of phase? Or is it something else?
In my scope readin, I have an RL circuit with the output voltage leading the input voltage, but in an RLC series circuit (below resonance when -X_C > X_L right?) I have a similar output with the output voltage leading the input.
When people say I_c leads V, is the V the voltage across the capacitor or the voltage source?
Edit
Firstly I really apprieciate the answers, all have been a lot of help and its helped me to understand the concept a lot more. I have still some doubts, particularly when it is applied to a real example. I made up an LCR circuit in series. I checked out the maths for frequencies at 4100Hz and 5500Hz (resonance was about 4.81kHz. At 4100Hz, the angle of impedance is \$-82^{\circ}\$, this is what I expected since the \$-X_C > X_L\$ giving \$\theta = \arctan(\frac{X_L - X_C}{R})\$ so \$\theta\$ is negative.I got the info from this site, the current/voltage plots are towards the bottom of the page
Similarly for 5500Hz, \$-X_C < X_L\$ and results in a postive angle of impedance ( \$75^{\circ}\$) as expected.
What I do not understand is how I have a negative angle of impedance, but the phase shift is positive and above resonance, a positive angle but negative impedance. Am I misunderstanding or should I indeed have a lag where it is leading and a lead where I have a lag in the readings below?
Or should I be taking this a step further and calculating the voltages across the components, as shown in the first example here? using this method, I get a positive angle of \$86^{\circ}\$, however I the capacitor voltage is greater than V across the inductor, which would surely result in a negative phase angle? Likewise, at 5530Hz, I calculate (using the same method) a phase angle of \$76^{\circ}\$, which \$V_L > V_C\$, which surely means a positive phase shift?
AI: Imagine a capacitor with an existing, stable, unchanging voltage across it. It might be a DC power supply placed across the capacitor, for example, where it's been a long time and the capacitor has "charged up." In this case, there is no current because... well... there's no need for any. The circuit has reached equilibrium. It just sits there.
Now, you turn a knob and the DC power supply changes its voltage. The capacitor must also change, too. (You can't have a power supply with one voltage and a capacitor with a different voltage when they are tied together like this.) But it can't change instantly because the capacitor is a large reservoir of charge, in effect, and to change its voltage you must change that reservoir's "level of charge." To change that, you have to supply (or remove) some charge. But moving charge requires time and together, charge motion and time, you must have current to get there.
So, if you change the voltage then that must stimulate some charge to flow onto, or off of, the capacitor. If you change the voltage slowly, then the rate of change of charge in the capacitor's reservoir over time is less. If you change the voltage rapidly, then the rate of change of charge in the capacitor's reservoir must be more. To achieve a faster rate of change of voltage across the capacitor, you must supply a higher current in order to fill (or drain) the capacitor's storage of charge.
The voltage across a capacitor is: \$V=\frac{Q}{C}\$. So with the capacitance held fixed, to get a higher voltage \$V\$ you need more charge \$Q\$.
Now, when you look at the equation:
$$I = C\cdot \frac{\textrm{d}\:V}{\textrm{d}\:t}$$
You can see all that wonderful hand-waving tied up in a package with nice bow. The current has to be larger if the capacitor has a larger capacitance. Why? Because it is a bigger reservoir and it needs more charge to achieve the same voltage. The current has to be larger also if the rate of change of voltage is more. For reasons just discussed above. That equation puts it all in one place.
Now, what does this mean regarding lagging or leading currents and voltages? Well, take a look at a sine wave centered on \$y=0\$ with voltage on the \$y\$ axis. Then tell me at what value of \$y\$ is the rate of change of the sine wave at its most rapid. It will be when the voltage is itself at zero. In other words, the current into or out of the capacitor will have to be at its maximum value when the voltage across the capacitor is itself at zero (for the sine wave case, anyway.)
The only thing left to worry about is lagging vs leading, and which is which in the case of the capacitor. This is just a matter of sign. In the case of a capacitor, when the voltage is rapidly rising away from zero in the positive going direction, the conventional current into one side of the capacitor is also conventional current away from the other side. You want to look at this as a current "through" the capacitor, even though physical charges don't actually leap through the insulator of the capacitor. So the sign is taken as positive as the above equation suggests.
Now go back and look at those curves you mentioned. You will see that the shape of the current (which obeys all of the above discussion) through the capacitor will "look like" it is \$90^\circ\$ earlier than the voltage curve. You could also claim that it is \$270^\circ\$ later. But to keep things simple everything should be seen as \$-180^\circ \lt \theta \lt 180^\circ\$. (The special case of \$\theta = 180^\circ=-180^\circ\$ is reserved a special term: antiphase.)
So the current is said to "lead" voltage in a capacitor. Or else voltage is said to "lag" current in a capacitor. Either way means the same thing. That it happens to do so by exactly \$90^\circ\$ is only true when you aren't taking into account other "parasitics" such as Ohmic resistance in the wires. Resistors develop a voltage drop across them in strict accordance with the current through them. So when the voltage change attempts to cause a current to flow, the resistor immediately opposes this by developing a voltage drop across it hindering the voltage that is actually then applied to the capacitor. And this fact shifts the lead/lag calculation so that it is no longer \$90^\circ\$, anymore.
There's a lot of algebraic tools of the trade you learn to simplify the work you have to do, just like learning to perform long-hand multiplication is a trick that helps you multiply big numbers without having to perform lots and lots of additions, over and over. These tricks are based upon good theoretical ideas. But if you just learn them and apply them without really understanding where they come from, they will still work for you. Just like you don't need to understand why long-hand multiplication works in order to use it.
The capacitor is easier to describe because it works with attributes that are easier to imagine. We can count them. They are units of charge. An inductor works with equivalent units of charge, but as a matter of magnetism. These units are in Webers, instead of charge. And it's hard to "imagine" a Weber and count them (these are "volt-seconds," or \$\int V_t\:\textrm{d}t\$), for us normal folks. Some people have no problem. Others do. But these are a symmetrical unit for charge.
I'll do a short derivation to explain why, taken from an energy perspective (if there is a founding bedrock principle in physics it is the conservation of energy.) Let's follow here:
$$\begin{split}
W &= \frac{1}{2}\:C\: V^2\\\\
\textrm{d} W &= C\: V\:\textrm{d}V + \frac{1}{2}\: V^2\:\textrm{d}C\\\\
\frac{\textrm{d} W}{V} &= C\: \textrm{d}V + \frac{1}{2}\: V\:\textrm{d}C
\end{split}
\quad\leftrightarrow\quad
\begin{split}
W &= \frac{1}{2}\:L\: I^2\\\\
\textrm{d} W &= L\: I\:\textrm{d}I + \frac{1}{2}\: I^2\:\textrm{d}L\\\\
\frac{\textrm{d} W}{I} &= L\: \textrm{d}I + \frac{1}{2}\: I\:\textrm{d}L
\end{split}$$
noting,
$$\textrm{where } I=\frac{\textrm{d}Q}{\textrm{d}t}\textrm{ and } V=\frac{\textrm{d}W}{\textrm{d}Q}\textrm{ and d}L=0 \textrm{ and d}C=0$$
resulting in,
$$\begin{split}
\frac{\textrm{d} W}{\frac{\textrm{d}W}{\textrm{d}Q}} &= C\: \textrm{d}V \\\\
\frac{\textrm{d} W}{\textrm{d}W}\textrm{d}Q &= C\: \textrm{d}V \\\\
\textrm{d} Q &= C\: \textrm{d}V\\\\
\int\textrm{d} Q &= \int C\: \textrm{d}V\\\\
Q &= C\: V
\end{split}
\quad\leftrightarrow\quad
\begin{split}
\frac{\textrm{d} W}{\frac{\textrm{d}Q}{\textrm{d}t}}&= L\: \textrm{d}I\\\\
\frac{\textrm{d} W}{\textrm{d}Q}\textrm{d}t &= L\: \textrm{d}I\\\\
V\textrm{d}t &= L\: \textrm{d}I\\\\
\int V\textrm{d}t &= \int L\: \textrm{d}I\\\\
V\:t &= L\: I
\end{split}$$
And there you are. Countable things on the left. But weird units on the right. Volt-seconds (Webers) are to inductors as Coulombs of charge are to capacitors.
Another bit of slight of hand from the above can be had, as well:
$$\begin{split}
\textrm{d} Q &= C\: \textrm{d}V\\\\
\frac{\textrm{d} Q}{\textrm{d} t} &= C\: \frac{\textrm{d}V}{\textrm{d} t}\\\\
I &= C\: \frac{\textrm{d}V}{\textrm{d} t}
\end{split}
\quad\leftrightarrow\quad
\begin{split}
V\textrm{d}t &= L\: \textrm{d}I\\\\
\frac{V\textrm{d}t}{\textrm{d} t} &= L\: \frac{\textrm{d}I}{\textrm{d} t}\\\\
V &= L\: \frac{\textrm{d}I}{\textrm{d} t}
\end{split}$$
Sorry about the diversion. But I thought it may help some (and you?)
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H: Linear Regulators & Ripple Rejection
I'm trying to understand the effect of ripple rejection in linear regulators since I'm using 2 LDO's in designing a linear power supply, however I'm unsure about something. A lot of datasheets have values that range from 50dB to 90dB, however they're dependent on the ripple frequency, load current, and other variables.
For example the LT3090 http://cds.linear.com/docs/en/datasheet/3090fa.pdf has the following Ripple Rejection characteristics:
So going by this, my understanding is that the Ripple Rejection capability of an LDO decreases with an increasing ripple frequency, and increasing load current?
Does anyone know how much of a significant impact a 50dB ripple rejection would have on the operation of an LDO? Are there 'common' or 'typical' ripple rejection values that are acceptable? My linear power supply should be able to deliver maximum of ~700mA, so I need to consider the ripple. It's the first time I'm dealing with this so I'm unsure.
For the record, the power supply I'm designing will have a 21.6V Li-Ion battery as input, which will then power a dual rail supply, so I can get anywhere between +/-8V - +/-10V. I'm currently going with the LM337 and LM317 regulators, which both have ripple rejection values of 75/77dB, but they're also rated at 120Hz.
AI: All LDOs, like all opamps have gain that falls with frequency, however in your case I would note that with a Lithium pack feeding the thing, significant ripple is unlikely.
50dB is saying that for an input ripple of 1V you get ~3mV of ripple at the output.
20dB is saying 100mV at the output for 1V at the input, but note that is at 1MHz, this is basically warning you about possible fun when following a switched mode supply with one of these without doing some L/C filtering first...
Only you can decide what ripple is acceptable, it depends hugely on your application, sometimes a hundred mV or even a volt is a 'who cares' thing, sometimes 100uV is too much, it just depends on the application.
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H: MOSFETs and Chokes on Computer Motherboards
There is a lot of conflicting information on the internet about what role these play in CPU power delivery.
A lot of people online say that having more MOSFETs and chokes results in cleaner power delivery to the CPU, thus allowing it to operate better, but looking at examples of many high-end and low end motherboards is showing me that fewer MOSFETs and chokes are present on either lower-end boards or boards that support processors with a lower TDP.
What do they do, and what advantage does an abundance of these components actually offer? Also, am I understanding correctly that lower power processors generally require less of them?
AI: Those components are part of a buck converter, which is used to reduce a 12V supply from the PSU to around 1.2V for the CPU (Vcore).
Most motherboards use a multiphase buck converter, which has multiple buck converters running in a cycle to provide a more stable supply for the CPU. More phases can make for a more stable input, especially for a higher TDP processor; each set of MOSFET and inductor (choke) you see makes up one phase.
What does complicate matters a bit is that some Intel processors (in particular, the Haswell and Broadwell generations) relocated some of the work of voltage regulation to the CPU itself, by integrating tiny inductors into the CPU package. Intel referred to this as the FIVR, or Fully Integrated Voltage Regulator. This caused motherboards for these CPU generations to contain fewer visible power-regulating parts.
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H: resetting Arduino from matlab
I'm using serial communication with Arduino and Matlab, and I need a way to reset Arduno from Matlab once a serial connection is made. I'm using Leonardo, and I understand that it uses a virtual serial interface unlike other boards. How can I achieve that?
Thanks
AI: Connect an IO pin to RESET pin via suitable resistor usually 1kR, then trigger IO pin to achieve reset in case you won't find any reset command in library
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H: Appropriate charging current for parallel 18650 lithium cells
I have 9 18650 cells salvaged from a laptop battery. They have all been tested to work and since they were always used together, I put them in parallel. I'd like to make a power pack, so I got some lithium charging circuits with all the protection bells and whistles, but with just 1A max output current. Now, I've been charging them with the circuit board from another old USB power pack, and it works, it's just super slow. Someone mentioned that the 1A max current simply would not work for 9 parallel cells, but I don't fully understand how it couldn't. As long as I'm charging the batteries with more current than I'm drawing from them, they should charge, right? I'm not super worried about the speed, right now it takes pretty much a full day to charge the pack. My question is, will the pack charge with a 1A total charging current (albeit slowly), or am I missing something?
AI: Someone mentioned that the 1A max current simply would not work for 9 parallel cells
Nonsense !!! it will work but it will take a very long time to charge. One cell of 2000 mAh (=2 Ah) (a typical 18650 is 2 - 2.5 Ah) takes 2 hours to charge so 9 cells take 9 x 2 = 18 hours to charge. Close to a full day indeed, not all the energy ends up in the cells and is lost so in practice 1 day sounds right.
As long as I'm charging the batteries with more current than I'm drawing from them, they should charge, right?
Yes, that is correct.
Next time someone gives an opinion about things always ask why and ignore their advice if they cannot give a good explanation.
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H: Phase shift of shifted impulse response
I have the following frequency response:
$$H(e^{jkw_0}) = \begin{cases}0, & -4\leq k \leq-3\\ 1, &-2 \leq k \leq 2\\ 0, & 3\leq k \leq 4\end{cases}$$
And I have graphed \$h[n]4\$ as the following:
and \$h[n-4]\$ as the following:
I would like to argue that \$H_c (e^{jw}) = e^{-4jw}H(e^{jw}) \$ have the same magnitude about a strong phase shift. Would it be sufficient to say that the have the same magnitude based on "inspection?" And, for the phase shift, I can once again clearly see that it has time shifted by \$ 4 \$. However I am not sure how would I prove that the phase shift is \$ 4w\$.
AI: A time delay T is represented in frequency domain as a multiplicator. That multiplicator is exp(-2*Pi * f * T *j). You have 4 unit interval delay, so your formula is right. But its interpretation falters.
The complex exponential multiplicator is only phase shift, no affect to amplitude. The phase lag (=negative phase shift) caused by that delay is not constant, but increases linearly as the freguency increases. At frequency 1/T the phase lag is full 2*Pi. You see that easily: A sine voltage with period=T is delayed exactly one period. It means phase lag = 2*Pi (or phase shift -2*Pi). Higher frequencies lag more and lower frequencies less.
Actually your expression 4W is ok for the phase lag, if W=2* Pi *f. Frequency f must be given in proportion to the sampling frequency. In the beginning you used frequency indexes k= -10....10, so to be notationally consistent, we must write in this formula f=k/10.
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H: Reading a single byte using 3 wire interface
I am trying to communicate with DS1302 (RTC) using P16f877A MCU. I tried to read a single register (let say Hour-register) of DS1302 and put its value on a certain PORT/LCD. But I am doing something wrong because everytime i get the same value i.e. 0x01 when I read either date,hour,minutes or seconds etc.
Here is how i am doing to read the byte from RTC.
sbit EN at PORTC.B2;
sbit SCLK at PORTC.B3;
sbit SDI at PORTC.B4;
sbit SDO at PORTC.B5;
sbit EN_Direction at TRISC2_bit;
sbit SCLK_Direction at TRISC3_bit;
sbit SDI_Direction at TRISC4_bit;
sbit SDO_Direction at TRISC5_bit;
// SPI Initialization Fucntion
void SPI_init(void){
INTCON |= 0xC0; // GIE and PEIE enable
SSPSTAT.SMP = 0; // Sample at MIDDLE
SSPSTAT.CKE = 1; // Data send on Rising Edge
SSPCON |= 0x21; // Serial Port Enable, Idle state Clk is Low, Clock = Fosc/16 => 31 KBytes/sec
SCLK_Direction=0;
SDO_Direction =0;
EN_Direction =0; // Output Ports
SDI_Direction =1;
EN = 1;
}
// ============== Main function =============
void main(){
SPI_init();
EN=0; // Active low signal
SSPBUF = 0x85; // Hour Address
while(SSPSTAT.BF == 0); // Adress Transmission not complete ? Stay here
value=SSPBUF; // Read to Clear BufferFullStatusBit
while(SSPSTAT.BF == 0); // Recieve byte not complete ? Stay here
value=SSPBUF; // Store the recieved Byte
EN=1; // Fininsh Reading
PORTB=value; // Transfer byte to PORTB
}
The timing diagram of RTC is as follows
AI: Two solutions.
Use software SPI and change the data direction.
Use a resistor to isolate the miso and mosi lines. Miso to sdio directly and mosi to sdio via a resistor.
Notice also CE is active high.
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