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H: Altera DE1 and DE2 - same UART?
I wonder if the Altera DE1 and DE2 have the same UART? I got access to both the DE1 and the DE2 and I see a similar question but the manual isn't specific which FPGA is applicable.
UART core Altera De2
AI: When talking about FPGAs we need to distiguish between "hard cores" and "soft cores".
A "hard" core is a section of the chip dedicated to a particular function. Your design just tells the synthisis tool how to hook it up.
A "soft" core is a core implemented in FPGA logic, it may be supplied by the FPGA vendor, it may be bought from a third party, it may be freely downloaded from somewhere like opencores, it may be written by yourself. Some "soft" cores may be written in generic verilog, others may be specific to a device familily.
I have never seen a FPGA with a hard UART. SO you are going to have to use some kind of soft implementation.
The DE1 and DE2 use the same FPGA family so it shuld be possible to use the same UART cores on both of them.
The problem I have found with alteras cores is they assume you are using altera's avalon bus system. I have found it's often easier to write serial transmit/receive code from scrath than to figure out how to glue the rest of my design to an inappropriate bus system.
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H: Why are Ethernet jack center taps connected to VCC?
Taking this schematic as an example:
EtherTen
Can someone explain to me why the center taps of the transformers (TXCT, RXCT) are connected to VCC? I've seen this connection in many (although not all) schematics on the Internet.
What would happen if they would be connected to GND?
AI: TXCT and RXCT are connected to each other and then to C19. The connection to Vcc (3V3A) is to provide power to the chip outputs TXOP and TXON because these are open collector outputs: -
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H: Antenna: Impedance matching vs. tuning
I always try to tune my pcb antennas in length, so they operate in resonance, by cutting the antenna with a scalpel and then matching the tuned antenna to the transmitter.
But recently an RF engineer told me, that you could sometimes get the same radiated power, by matching the impedance without trimming the antenna to resonance.
I have measured an untuned IFA to have impedance of Zin = 7.7+j90 @ 865MHz.
Should I try to tune this antenna to resonance, or will it (in practice) work just fine to match the untuned antenna to my transmitter ?
AI: I have measured an untuned IFA to have impedance of Zin = 7.7+j90 @
865MHz
The 7.7 ohms "real resistance" measured represents both the radiation resistance AND the antenna losses so, if you can adjust the antenna length to give you a higher value of overall resistance (and therefore a higher figure for radiation resistance) you will get better antenna efficiency and more easily match your output driver (50 ohms maybe) to your electrical radiation resistance.
You should also find (that with a simple dipole or quarter wave monopole) that the reactive component becomes smaller and therefore you more easily can dump power into the antenna. Here's what a monopole impedance looks like: -
At a quarter wavelength (optimum for a monopole) the reactive impedance becomes zero ohms and the resistive part (for an ideal monopole) becomes about 37 ohms. If the antenna is significantly shortened the real resistance rapidly approaches zero so, if there are real antenna losses (as always) any power pushed into the antenna is mainly wasted on heating the antenna and a significantly smaller percentage of power gets radiated.
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H: Which capacitor to choose for ACS709 to filter 50Hz noise?
I am using the ACS709 current sensor together with an Arduino board to measure the charge/discharge current of a large battery connected to an UPS.
I noticed a strange noise pattern in my DC measurements, which seems to be 50 Hz. I guess it must be the UPSs inverter, which draws power in such a way.
My goal is to get rid of that pattern and get reading similar to what my multimeter can measure.
I have read both the documentation for ACS709 and the FAQ on their website, but being a complete newbie in electronics I have a number of questions:
I understand that I probably need to add a capacitor to the FILTER pin of ACS709, but I am not sure which capacitor should I choose.
In the FAQ they provide a formula and an example table for different capacitances, which reduce bandwidth.
What is "bandwidth" in this case? The amount of measurements per second?
I only want to measure the mean current flowing at most once per second.
Which capacitor should I choose?
--- Follow up ---
I found this equation for a low-pass RC filter:
$$
f_c = \frac{1}{2\pi RC}
$$
Solving for C gives:
$$
C = \frac{1}{2\pi Rf_c}
$$
According to the docs the ACS709 already has a built in resistor of 1700 Ohms. Choosing the frequency = 0.5 Hz gives me:C = 0.1872 mF
Is that a correct calculation? The result seems large. In the docs all examples are in the nF range.
I want to choose mono-polar electrolytic capacitors, because the ACS709 output should have polarity in only one direction. Is that the correct choice?
AI: You're thinking along the right lines but you obviously have no experience with mixed analog/digital systems. "amount of measurements per second" has a name : sample rate.
And there is a very well known relationship between analog bandwidth and sample rate called the Shannon (or Nyquist) Sampling Theorem. Searching "sample rate vs bandwidth" should set you on the right path to finding much more information should you need it.
Choose a sample rate - you already have.
Choose a suitable bandwidth to match that sample rate.
I'd keep it simple and choose 0.5Hz for 1 sample/second, giving a sample rate exactly twice the bandwidth.
Choose a capacitor to give that bandwidth.
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H: LM317 with a load of less than 1.5A
The LM317 is rated for "in excess of 1.5A", I have an application that will have a load current of about 300mA. Are there any drawbacks to using this particular IC?
This is my intended setup:
simulate this circuit – Schematic created using CircuitLab
AI: Downsides:
Ancient technology
High drop out (about 1.75V at ambient temp and 300mA) so you need an input voltage at least that much higher than the output voltage.
Relatively high current draw even when not loaded
Advantages:
Ancient technology - there's tips and tricks and schematic examples for it all over the web.
Ancient technology - mounting a TO220 or TO3 part is easy, even for the mechanically challenged.
Can handle high currents and large difference between input and output (if you use a large enough heat sink)
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H: Can I use one voltage divider to bias multiple points in circuit?
I have 4 nodes in my circuit that require virtual ground of half the power supply voltage. 2 of the nodes are just offset for input signal and other 2 are for op-amp biasing to virtual ground.
Can I use one voltage divider to provide offset for all these nodes? This would greatly reduce BOM and save PCB area(eliminating 6 resistors and some capacitors), but I am not sure if this can't cause some kind of issues?
There was similar question, but it was talking about one IC, in my circuit I have two separate input connections and two op-amps(though they are in same package).
Also maybe a better question would be in more generic form - can one use single voltage divider to bias several points(no matter how many) to virtual ground? I understand that in some circuits the resistance on the output of voltage divider will basically make no sense, but if I for example have 16 op amps that need to be biased - will it work?
AI: It all depends on how you make that virtual ground and how you load it.
A virtual ground is just a DC voltage used as a reference voltage for (usually) opamp circuits. This can be used to prevent having to use a symmetrical supply like +5 V and -5 V. Instead we use 10 V and make an internal 5 V as a "virtual ground".
You can bias 16 (or more) opamp circuits from your virtual ground as long as you take care that your virtual ground is not influenced too much by the circuits connected.
If you use inverting opamp circuits and directly connect the virtual ground to the + input of the opamp, no current is drawn from it so you can bias many opamp circuits.
An inverting amplifier, here the + input is grounded but that can be a virtual ground as well:
If you do load the virtual ground with each circuit then you have to make sure the virtual ground can supply all those currents.
To prevent the circuits influencing each other you might want to filter (Resistor in series, capacitor to ground) each virtual ground but that increases your BOM.
Also it is not so much the DC biasing current as it is AC currents resulting from the signal being amplified which can cause problems with a shared virtual ground.
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H: Modelling a capacitor whose dielectric has resistance as a circuit element
Modelling a capacitor whose dielectric has resistance as a circuit element @ Physics Stackexchange
The issue of 'how to model the capacitor' arises if the dielectric of a parallel plate capacitor has a finite resistance.
As the diagram indicates, current can flow through the capacitor. However, this does not mean that the capacitor acts as a closed circuit. The $r$ is quite large and allows very little current through the dielectric. The current through the dielectric won't enough to prevent a charge build up on the plates. Therefore, the capacitor does not lose its capacitor related properties.
Idea #1 (capacitor with resistance = ideal capacitor and ideal resistor in series):
It might seem intuitive to pull the resistor out of the capacitor and assume that they function as an ideal capacitor and an ideal resistor separately.
This model will immediately run into problems because:
If you use a DC source, after very long time, the potential drop across the capacitor will be equal to the E.M.F of the source. This would prevent any current from flowing. The potential difference across the capacitor is caused by the charge separation. However, as the dielectric can conduct electricity, the charge on the plates could move. This would never allow the potential difference across the capacitor to be equal to the E.M.F of the source.
Therefore, this model will fail.
Idea #2 (capacitor with resistance = ideal capacitor and ideal resistor in parallel):
After trying Idea #1, the next attempt would be to analyze if considering the dielectric resistance to function as a resistor in parallel.
This idea has the following problems:
After a sufficiently long time, there would be a constant current in the circuit as the capacitor behaves like an open circuit. There won't be any current passing through the capacitor branch. But with the original capacitor, the charges on the plates of the capacitor can flow through the capacitor. So you cannot have a constant potential difference across the capacitor.
How do you model a capacitor which has a finite resistance?
Would I need to go scrap all the capacitance and resistance concepts and start from the fundamentals?
AI: It seems you are asking how to more simply model a capacitor with "leaky" dielectric. The answer is a ideal capacitor with a resistor in parallel.
Charge up the capacitor to a fixed voltage and wait. The real capacitor will discharge slowly because of the finite resistance of the dielectric. The simplified model exhibits the same discharge due to the resistance across the ideal capacitor.
With a steady voltage applied externally, both also result in the same current, which is the voltage divided by the leakage resistance.
In general, the first order approximation of a capacitor is simply a ideal capacitor. For many uses of real capacitors, this is good enough.
The second approximation has a resistor both in series with a ideal capacitor, and one in parallel with it. The series resistance is referred to as the ESR (equivalent series resistance). This can matter in real circuits, especially when the cap is subjected to high currents.
The parallel resistance models the leakage inherent in the dielectric. This is so little (resistance so high) in ceramic capacitors that it can usually be ignored. However, leakage is more significant in other types, like electrolytic, and must be taken into account in some applications.
Note that both the equivalent series and leakage resistances can vary significantly over temperature. The leakage of electrolytic caps in particular go up significantly with higher temperature.
Of course these are all models with different tradeoffs between simplicity and fidelity. You can get really anal and make a model of a capacitor that takes into account all kinds of third order effects, like series inductance, distributed capacitance between the series inductors, between the multiple distributed series and parallel resistances, their inductance, etc, etc, etc. The more you keep going, the more you model the true behavior of any one capacitor, but the less practical the model is for designing circuits.
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H: Why dc component I must flow entirely through the load resistance R in buck converter?
The excerpt below is from Fundamentals of Power Electronics by by Dragan Maksimović and Robert Warren Erickson.
Can anyone explain the why question in the yellow part below? Why dc component I must flow entirely through the load resistance R?
AI: The key to the question is that they asked about the "DC component". Capacitors and inductors influence the AC properties of a circuit. DC implies steady-state, as in no time-varying components. You can usually think of a circuit as steady-state by replacing inductors with shorts (or low value resistors) and caps as open circuits. In that case you would have I passing simply through R.
Yes, the capacitor charges initially when switching, but that current is not steady-state, it's time-varying, so it's not part of the DC component. The AC component, as the question goes on to explain, divides between the cap and the resistor.
Think of the AC and DC components being added together to provide the final result (called superposition). In the image below you see AC voltage ripple added to DC voltage. This is for voltage but it would be the same principle for current.
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H: How does series feedback pair work? (the art of electronics)
I'm studying AOE but i can't figure out how this circuit even works(also i'm confused if Q1 and Q2 make a sziklai pair). any help with the circuit description will be great.
AI: I'm studying AOE but i can't figure out how this circuit even works
If the 10 volt output rises a little bit then Q1's emitter is also raised a little bit and this has the effect of turning Q1 off a little bit. As Q1 turns off a little bit, its collector voltage rises. This has the effect of slightly shutting-down Q2 and therefore the slightly risen 10 volt output falls back to 10 volts.
It's negative feedback.
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H: led drivers and voltage overhead
More specifically this RF transmitter which has an incorporated led driver: http://www.mouser.com/ds/2/368/Si4012-35123.pdf
It specifies 4 levels of current on the LED output pin but nothing on voltage overhead. This IC is going to be powered from a 3.3V rail. Will a 1.6-1.8 forward Voltage LED be OK to tie directly to the LED output pin as shown in their diagram ?
5.2.3. PROPERTY: LED_INTENSITY Purpose: LED current drive strength Property: 0x11 Default: 0x00 Fields: LedIntensity [1:0]—LED
intensity 00: LED off 01: 0.37 mA 10: 0.60 mA 11: 0.97 mA.
AI: The LED used by SL in their:i4012 pico board 434 MHz P/N 4012-PSC10B434B (zip contains BOM)
is a Lite-On 1.8V 10mA LED RED CLEAR 0603 SMD:
LiteOn Datasheet P/N LTST-C190CKT
So the LED should be a 1.8V 10ma Red LED
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H: Protect lithium battery in parallel
This question is somehow the continuation of this question : Batteries and running time (reed the comments for more information)And my question is, can I protect my lithium battery in parallel like so ?I got this "trick" from this document : http://www.ti.com/lit/an/slva139/slva139.pdf
simulate this circuit – Schematic created using CircuitLab
The PMOS have a very low Rdson.
AI: The only really simple solution to have several parallel batteries supplying the same load is to replace your fets with diodes. The diodes can be low drop schottky types, but you still easily lose 10% of the voltage. Note: no charging is possible through those diodes.
The zener diodes have no place here until you have some complex active circuit.
In theory you could have a multi-input switching regulator and a controller that that takes the next pulse from the battery that has most charge still left. You need only one set of inductive and output circuitry, but the circuit that distributes the intake load properly to the batteries needs to be developed. There exists battery balancing controller ICs for serial batteries. They're a must in modern high power battery systems. Unfortunately I do not know how they could be adapted for this.
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H: Can Solar Panels Be Made From Other Semiconductors?
I have heard that most solar panels use polycrystalline silicon. It seems like a very expensive material. Are there any other materials we can potentially use to capture photons in solar panels?
AI: Yeah, there are many many other materials that could be used. Plastics, organics, perovkites to name a few. All you need is (from solar cell wiki):
The operation of a photovoltaic (PV) cell requires three basic
attributes:
The absorption of light, generating either electron-hole pairs or excitons.
The separation of charge carriers of opposite types.
The separate extraction of those carriers to an external circuit.
The problem is finding a material that is cheap, manufacturerable, holds up over time and is efficent.
Other solar cell technologies such as perovkites could potentially be manufactured very cheaply and are competitive with silicon in efficiency. They are relatively new, and will require more research and commercial development before coming to market. We have decades of experience with silicon, and entire supply chains to support the manufacturing of silicon solar cells.
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H: Understanding PIC32 digital output with open-drain
I'm trying to understand how to operate digital pins configured as open-drain outputs on a pic32. As I've read on other forums, setting TRISx to 0 and ODCx to 1 configures the pin as open-drain output, and writing 1 to LATx will drive the output high-Z (w/pullup resistor) and writing 0 will drive it low.
Source: http://www.microchip.com/forums/FindPost/789946
If you have an actual open drain output, you can keep TRIS low and control the transistor with LAT. LAT=0 => transistor closed to ground and the output will be low, LAT=1 => transistor open and output will be floating or clamped high with a resistor (or pulled low by another signal).
What I'm caught up on is this part of the diagram for the pins:
From the PIC32 IO Port Reference Manual
What does ODCx do if TRISx is set 0? The output of the multiplexer controlled by ODCx will be low no matter what, as its either TRISx or (TRISx AND 'LATx), which will always be 0 when TRISx is 0.
AI: p12-3 from I/O Ports under 12.2.4 Registers for Open-Drain Configuration (ODCx):
n. If the ODCx bit for an I/O pin is a ‘1’, the pin acts as an open-drain output.
and:
The ODCx register setting takes effect in all the I/O modes, allowing the output to behave as an open-drain even if a peripheral is controlling the pin. Although the user could achieve the same effect by manipulating the corresponding LATx and TRISx bits, this procedure will not allow the peripheral to operate in Open-Drain mode
To enable Open-Drain mode, you have to use ODCx.
p12-3 under 12.2:1 Registers for Configuring Tri-state Functions (TRISx)
If data direction bit is ‘0’, the corresponding I/O port pin is an output
and under 12.2.3 Registers for Configuring Latch Functions (LATx)
A write to a LATx register latches data to corresponding port I/O pins. Those I/O port pin(s) configured as outputs are updated.
So ODCx = 1, TRISx = 0. Then output a 0 to LATx and output is driven low. A 1 and output is open-drain with pull-up to a max of \$V_{IH}\$.
Which agrees with your thoughts, web. But it is always better to go to the data sheet.
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H: Is it possible to jam wireless home alarm systems?
Sorry if this is the wrong community for this question but in my mind, it's the best fit. Please close or move to a more appropriate community if it's off topic.
The other day, several home alarm companies came to look at my home to quote an alarm system. They all gave me a wireless option since the wired option they said would be super expensive.
I asked if it was possible for someone to jam the wireless sensors and break in. One representative said no but didn't elaborate why. The other said no because the communication between the sensor and the main panel is encrypted so people can't jam it.
I don't believe this is true but I don't have an EE degree. I think it's not true because I've heard on the news people have built cell phone jammers so it probably isn't hard to jam these sensors too. I think these sensors operated in the 200Mhz range (if I remember correctly), if that matters, although he said there's some encryption going on between the panel and sensor. That confuses me because the encryption is digital but the communication is analog?
AI: A "denial-of-service" wireless attack is very easy. It will disrupt radio communication between sensor and panel. Hopefully, the panel is smart enough to detect that one (or more) of its sensors has failed to report-in. A non-reporting sensor should be assumed under attack. Ask your supplier what protocol is followed if your panel reports that a sensor has failed to report-in.
A much more difficult attack is a "spoof" attack, where the communication between sensor and panel is overpowered by an attacker with a valid message. An "all-OK" signal is very difficult for an attacker to generate because of encryption. Because these signals are regularly sent, it is vulnerable to a determined attacker who is willing to capture signals over a long period.
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H: Which is the right voltage divider formula?
I've come across two variations on the voltage divider formula, when solved for \$x_2\$:
$$R_2={R_1V_{out}\over V_{in}-V_{out}}$$
$$R_2={R_1\over {V_{in} \over V_{out}} - 1}$$
I solved the one equation I can find that most sources agree on for \$R_2\$
$$V_{out}={V_{in}R_2 \over R_1+R_2}$$
and got the first equation. This question seems to agree with that result. However, Wikipedia and this calculator have another version (use a test set of values to check the calculator).
I graphed both, to the best of my ability assigning constants to the voltages, and they are not equal. Which equation is right, and if it's the second how, how do you get there from the base equation?
AI: I'm assuming that the first equation is a typo and is really $$R_2 = \frac{R_1V_{out}}{V_{in} - V_{out}}$$
We can factor out \$V_{out}\$ which yields: $$R_2 =\frac{V_{out}}{V_{out}} \frac{R_1}{\frac{V_{in}}{V_{out}} - 1} = \frac{R_1}{\frac{V_{in}}{V_{out}} - 1}$$
Which is the second equation.
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H: Overcoming a boost converters soft start function
I am using a TPS61235p to boost a 3.7V 18650 battery to 5.1v with a pure-resitive load of 2Ω. I expect it to draw 2.5A, but upon pulling the enable pin high the output current is limited to about ~1.75A due to the soft-start functionality described on page 10 of the datasheet.
I have confirmed this by increasing the load resistance higher than the Fig 8 Minimum Load Resistance at Startup, and then bypassing my increased resistance, confirming I now have the proper output. The booster never comes out of soft-start unless the load resistance is increased first, then reduced after the booster started switching.
The enable pin is controlled by an Arduino, so now I'm wondering how do I decrease the load resistance once I've enabled the booster.
My first thought was to put a resistor in-line like I am now, and then use a N-channel MOSFET to bypass the resistor after the booster has started. But is there a more robust / effecient way to do this?
Forgive my cramped circuit, I'm still learning.
SYS is VCC, battery voltage unless its being charged
VOUT goes
straight to the load
EN and INACT go to the Arduino
AI: Costs a GPIO pin, but simple.
simulate this circuit – Schematic created using CircuitLab
Make sure the MOSFET you choose is rated for the 2.5A continuous,has a logic level gate and a low Rds on. Pull the gate low after Vout stabilizes. If that part had a power good output, you could even tie the power good signal to the gate.
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H: Is routing signal traces under components a good idea
This is my first attempt to route a 4 layer board. But I was curious if routing signal traces under components like this is a good idea? Allowed? Or what?
These are 0603 components.
AI: The answer as always is: it depends.
In general, if the PCB design rules allow it (i.e. you are not violating minimum spacing, etc.), you should be OK. There are a few other reasons to avoid doing so, however:
The signals are high-speed signals that can be sensitive to coupling from any transient current in the components they are routed under. For example, if your trace is a USB 3.0 signal, you don't want to route it under the decoupling capacitor of the output of a switching power regulator.
The traces are high-impedance nodes in your circuit that can easily pick up charge from adjacent nodes through parasitic capacitances between traces. For example, if the trace is the reference voltage used at the input of a comparator, then you probably want as much shielding and isolation from other traces on your PCB.
If you anticipate the need to rework the components you might run into a risk of damaging the trace depending on how good your reworking skills are :). This is more of a practical issue to consider.
But if your signal and the component terminals are not sensitive nodes (i.e. a CMOS digital output under a decoupling capacitor), then you are probably fine.
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H: Why will my led not light up & why does my input voltage fluctuate when I add a wire?
This design is suppose to light up the LED When the sensor is under light, and turn off the LED when the sensor is covered.
I noticed two problems:
My LED won't light up.
When I measure the voltage input difference (expecting
+15- V) without the wire connecting the second prong of my 50k potentiometer (25th node) to the second prong of the op-amp, I measure 15 volts. But when I insert that wire how it is in the picture, my same input voltage measurement starts fluctuating. I assume this is a problem
Of course, I tried changing the values of the potent. and sensor but had no luck.
I also tested my op-amp and it seems to be working correctly.
The LED is also working correctly because it lit up in a different scenario. & Yes, I am also aware there is no voltage input in the photo. These were taken after I unplugged
The input.
Will you please look over my design and help me locate the problem?
EDIT: New circuit based off new understanding
EDIT2: Just talked to my instructor. I indeed originally wired the purple wire wrong, but it should be fixed in the last two photos. I also confirmed that my resistor is not shorted and the photo is just confusing everyone, so I will upload a new one once I get home.
EDIT3: Less confusing photo (made sure you could tell the led is not shorted)
SOLUTION: Thank you @jonk and @TonyStewart!
My circuit was wrong in that I did not realize my potentiometer should not connect to the op-amp's 3pin (basically I didn't understand the schematic).
Later on, @jonk helped me come to the realization that there was something wrong with my op-amp, so I used a new one and it now works.
AI: I think you may have wired it up wrong. It looks to me like you did this:
simulate this circuit – Schematic created using CircuitLab
I think you want this:
simulate this circuit
Pull the end of the purple jumper off of pin 3 and move it to your \$+15\:\textrm{V}\$ rail.
Below is a piece of your schematic and some information I've added. The arrow points to a "cross-over" and NOT to a connection. Just in case that helps.
Your newly added picture does appear to show a shorted LED. However, your first picture does not appear to show a shorted LED. I wouldn't have been able to tell from when I was reading your post, because your last picture wasn't added by then. Now, looking at it it does appear that it could be shorted out. Did you move it between pictures???
Anyway, that is another detail to look at and double-check. I think you already know (knew) that all five holes along a row are all connected together. That's a detail that everyone needs to know just to use a protoboard. So I assume you are aware of that. But anyone can accidentally get a lead in the wrong hole, too. So it's worth checking out just to make sure.
Best wishes here.
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H: Building a pH meter circuit - is it feasible?
Let's say I have a budget of $15-20 to build a pH meter. I will then read the analog values from a microcontroller or such, but I want to first focus on somehow getting a reliable pH value on a shoestring budget.
First of all, is this even possible for an electronics hobbyist? I see existing pH meters out there but they are quite expensive.
There are commercial options running into the hundreds of dollars to cheap ones like these: http://www.sparkyswidgets.com/product/leophi which still require an external probe.
Ideally I want to build a pH meter circuit that has electrodes that simply dip into water to measure its pH.
I also found this: http://overskill.alexshu.com/cheap-ph-meter-hack-for-arduino/ but it's based on hacking an existing pH meter. I'd first like to hear opinions on whether a complete DIY sensor circuit is possible to do.
AI: This is definitely possible. You can start with a cheap pH probe like this (available for $6 on AliExpress): You'll need a female BNC connector to attach the probe to, such as the Molex 0731000105 (available for $1.48 from DigiKey). Finally, you'll need a very-low-input-bias-current op-amp, with the LMC662CN from TI an excellent candidate (available for $1.56 from DigiKey), plus a few passives.
Assuming that the microcontroller board you plan on using has a 5V supply available, you can use it to power the op-amp and generate a reference voltage, which will have to be about 1.2 V because of the common-mode range of the op-amp. The final setup will look something like this:
simulate this circuit – Schematic created using CircuitLab
The resistor divider generates the reference voltage, and the op-amp acts as a unity gain buffer. This means that your output will only be the reference plus or minus about 0.4 volts over the whole pH range, so you'll need to either add some gain or use an ADC with decent resolution.
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H: Voltage Range Mapping/Conversion from [-12V, +12V] to [0V, 4V]
I have a similar problem as javier acha already described here
Convert from a specifc range to another one which is to map a (AC, 100Hz) voltage range from [-12V, +12V] to [0V, 4V]. I am currently trying to solve it using the OpAmp approach.
This is why I have (a very basic) question concerning Spehro Pefhanys suggested circuit (see link):
What do I actually need R6 and R7 for? Can I also just leave them away?
Thanks Cristobal
AI: R6 and R7 are there to compensate for the input bias current. If you had an ideal op-amp it would have an input current of zero and you could connect the pin directly to 0V, but in the real world their inputs do require a very small amount of current. This current flows through the input resistors and therefore produces a small offset voltage at the inverting input.
By connecting the non-inverting input through a resistor as well, you ensure that a similar offset voltage is seen at both inputs and therefore its effect on the op-amp output is massively reduced.
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H: logic OR gate with 2 diodes in series
is it possible to make a logic OR gate with 2 diodes in series like this:
simulate this circuit – Schematic created using CircuitLab
For my project this would be easier to wire than the usual parallel configuration.
AI: No, not as you show.
Even without getting into the logic, clearly this can't be a OR gate. OR gates have two inputs and one output. No inputs are shown at all, and we can at best guess that the LED is intended to be the output.
Getting into the circuit, note that D2 always has a fixed 1.7 V across it. It won't live long that way. Also, whatever the branch of the circuit with the 5 V supply is doing is irrelevant. The top of D3 will always be at 3.3 V by definition of what V2 does.
All this circuit does is unconditionally light a LED and blow up a diode.
Here is the basic idea for a diode-based OR gate:
It can get more complicated from here, and using transistors for some gain is useful, but nonetheless, this is the basic concept.
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H: BJT Transconductance Decrease with Increasing Base Voltage
Hello Everyone!
I am going through transistors and trying to apply it to some RF applications. I am following Sedra and Smith. In the Sine wave generation section (via feedback), it says if the base input amplitude (a in diagram) increases in magnitude, the effective transconductance decreases. I can not figure out why.
The only way I can think of to decrease the transconductance is to reduce the collector current as, $$g_m=\frac{I_c}{V_T}$$But how come increasing the amplitude of input voltage decreases my collector current? Another way I can think of is in terms of from collector-emitter voltage. Say my input voltage is increasing, hence the emitter voltage must increase, hence the emitter current. But then increasing emitter current means increasing collector current. So instead of decreasing collector current I am getting increasing one. What am I missing here??
Thanks in advance.
AI: I agree that the (short) explanation as given in Sedra/Smith is a bit misleading. In the corresponding chapter (sinewave generation) they speak about amplitude control - which means: Output amplitude limiting for rising input amplitudes (to avoid hard-clipping effects).
For this purpose, each oscillator needs a certain non-linearity (amplitude-dependent gain characteristics). In most cases, this is implemented using extra components (diodes, FET, light bulb, NTC, ..). However, when transistor-based oscillators are concerned, we can make use of the inherent non-linearity of BJTs: The output current cannot grow without limitations because - at the same time - the voltage drop across the collector resistor increases - thereby reducing the remaining collector-emitter voltage VCE (the momentary operational point on the load line approaches the limit VCEsat).
As a consequence, the current IC cannot follow anymore the input signal increase - and hence the instantaneous ratio g=IC/VBE reduces. (Note that both values IC and VBE are NOT DC values but momentary values).
This is not a sudden effect but a rather "smooth" effect - and the overall gain reduction (with rising amplitudes) causes acceptable distortions (in most cases, if the excessive gain for small amplitudes was not too large).
Remark: Please note that the expression g=IC/Vt is a small-signal parameter - it is the slope of the exponential curve IC=f(VBE).
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H: Voltage regulator from first principles - why is power dumped in the transistor?
I'm trying to further my understanding of electronics, so I decided to try to design a fixed voltage regulator capable of supplying an amp or so. I put this together from first principles without referring to any kind of reference on how voltage regulators are usually designed.
My thoughts were:
Zener and resistor to provide a fixed voltage reference.
Comparator to detect when the output voltage was above the target threshold.
Transistor to switch the supply on and off.
Capacitor to act as a reservoir.
With that in mind, I designed this fixed 5V regulator, which appears to work:
What I did notice, however, is that it has certain limitations which I can't quite derive the cause of:
The current from V1 (input) roughly equals the current at R2 (output), despite differing voltages. This seems to match the behaviour of linear voltage regulators (is that what I just created?) but I'm not sure why it happens. Why is so much power dissipated from Q2 considering it's just switching on and off?
When V1 is less than about 7.5V, the output voltage never hits the 5V threshold, but instead hovers around 4V. I have tried this with varying loads but it simply does not function below that input voltage. What is the cause of this?
AI: I put this together from first principles without referring to any kind of reference on how voltage regulators are usually designed.
Not a good start, but you've actually ended up with almost the exact design of most linear regulators. But the "first principle" you've forgotten about is the MOSFET linear region. Have you tried this thing in a simulator? The system will settle at a point where the transistor is half-on, dissipating power as a resistor.
When V1 is less than about 7.5V, the output voltage never hits the 5V threshold, but instead hovers around 4V. I have tried this with varying loads but it simply does not function below that input voltage. What is the cause of this?
This is called the "dropout voltage". It's due to limitations in how close to the input rails the opamp is capable of driving; you lose approximately 0.7V in the output transistor of the opamp and another 0.7V because of the threshold voltage of the MOSFET.
You might be able to do better with a better op-amp than the ancient, obsolete 741. Otherwise, you're trying to design what's called an LDO: low-dropout regulator.
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H: TRS female jack symbol in Kicad
There is a device which is powered and also outputs signal by its TRS connector as shown below:
This TRS connector needs a female correspondent for my circuit.
I made a small board and need to add my schematics the female jack of this TRS.
In KiCad there is the following symbol:
But Im not sure if it is a TRS female jack, since 2 and 1 are seems connected.
Is this how it supposed to be?
AI: What you have is "jack_2P", which at first glance seems to be for TRS (Tip-ring-sleeve), except it only shows 2 pins from the cable and 1 extra. The extra pin in the jack is like a switch that disconnects from pin one when the plug is inserted (it bends). Thus it almost looks like your jack is for a 2-pin cable.
Below is an example of what you want; a jack for TRS (a 3-pin cable):
Again you have an extra pin, of which is just there as a switch. But now you have the ring (aka shield/ground), and the other two conductors.
The thing is, my diagram looks pretty much your like your diagram, except the ground has it's own pin.
It's possible that your "jack_2p" is the same thing, and that the ground is just not shown as a pin. You may still be able to connect to it.
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H: How often should the CMPS11 be calibrated?
I have a project with arduino and the magnetometer CMPS11. I wanted to know how often the CMPS11 should be calibrated using this procedure: https://www.robot-electronics.co.uk/htm/cmps11i2c.htm
AI: Calibration of the CMPS11 for horizontal only operation. So it should not have an issue if you do not calibrate it often. As tilt does not need calibration.
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H: 6 Wire Stepper motor with only 1 Center tap
I salvaged a stepper motor from an old computer i had laying around, it has 6 wires. The problem is that when i try and measure the resistance between the wires i only get 1 Center tap where the resistance is halved. All other 5 wires are connected to the same coil. I thought this was weird so i opened the motor and tried measuring the resistance directly from the leads on the board, but i got the same result as before.
Could it be that i have a 6 wire stepper motor with only 1 coil? Because all of the leads are connected in some way i have tried connecting them all (2 at a time) to an led, while turning the motor around, and the did lit up every time/combination i tried. Does anyone know what type of motor i have, because i have never seen one like this before. The yellow wire is the center wire (15 ohm, connected with all other 5 wires) the rest is 29,8 ohm (connected 1 by 1 except the yellow of course):
AI: Interesting, looks like what you have there is a 5-phase STAR, 6 cable model like this one.
DRIVER CHIP HERE
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H: 50 Ohm Oscilloscope Input
I connected a 50 ohm function generator to an oscilloscope set to have an input impedance of 1 MOhm. I set the generator to 0.5Vpp and saw a 1Vpp signal on the oscilloscope. The generator display is set for a 50 ohm load, so this all makes sense so far.
Then, I switched the oscilloscope to 50 ohm impedance, and I was expecting to see a 0.5Vpp signal, but I got no output at all. The scope has 10:1 probes and the input is rated for < 5 Vrms at 50 ohms. The current through the generator would be 10 mApp for a 50 ohm load, which it should be able to handle. There is no external circuitry. Function generator is HP33120A and scope is RTM2034.
So the question is, why does setting the oscilloscope to 50 ohms completely kill my signal?
AI: You're not using the 10X probes are you? When the scope is set to 50 ohm input impedance you should connect the signal generator directly to the input BNC on the scope, you should not use the probes which are designed for a 1M input impedance on the scope.
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H: Long tailed pair little confusion
The first approach :Assuming 0v at both bases, when the base input of Q1 rises, its collector current rises and its collector voltage goes down. When the base input voltage of Q2 rises by the same amount, the same happens and its collector voltage also goes down,so the voltage difference between the two collector voltages will be zero.
The second approach : the same thing happens as the first approach but each emitter of both transistors acts like an input to the other and each transistor acts like a common base amplifier and the collector voltage will be in phase with emitter of the same transistor, and out of phase with the amplified signal from its base so they will cancel and the voltage of any collector to ground will be 0v.
I think i confused you a little but here's a photo from "electronic devices" by floyd to make the second approach clear.
I know i got something wrong -as usual- but i want to know where.
AI: First approach: In principle, correct - however, the voltage decrease at both collector nodes is very small because the resistor RE is selected with a rather large value (sometimes with a 3rd transistor working as a "constant" current source). Hence, we have a very strong feedback effect for such common-mode signals.
Second approach: ....and out of phase with the amplified signal from its base".
I don`t know if you speak about symmetrical or unsymmetrical operation (base of Q2 at ground). In the latter case, it is correct that - as seen from the left - the two transistors work in common-collector-common-base configuration. Hence, the collector of Q1 is in anti-phase and the collector of Q2 is in phase with the input at the base of Q1.
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H: PC Fan PWM signal circuit using 555 timers: Can anyone explain this circuit to me?
I'm looking at building a 4-wire PC fan PWM circuit. The goal of such a circuit is to send a PWM control signal to a 4 wire PC fan, so that the fan can modulate it's speed (NOT to pulse the 12V supply).
One circut for this that is widely cited is the 556 based circuit located far down on this page. The circuit looks like this:
I can't for the life of me see how this circuit can work. My understanding of the goal such a circuit is (per the specs here) to produce a stream of pulses at 25kHz, and to vary the width of each of those pulses.
This circuit has the pot tied into Trig1, so as far as I can tell it'll vary both the width of the pulses as well as the frequency of the pulses? Or do I just not understand it (won't be a shock).
I would have assumed that one should build an astable 555 triggering at 25kHz, and then feed that into a monostable 555 that varies the pulse width?
Side note: If this circuit isn't the best approach for a fan PWM, can anyone recommend a better one?
AI: One of the 555 timers in the 556 is used as a typical PWM generator. The second 555 is used to buffer the output according to that article. You may only need the single 555 circuit detailed in the first part of the article.
The effect of the pot is to vary duty cycle from about 5%-95%. The frequency will be based on the resistor, pot, and cap values, and held fairly constant (although there will be some slight frequency variation as the duty cycle changes). The diodes types (forward drop) will affect frequency also. This article may explain the operation more clearly.
You could set up two 555s (or a 556) as you described to maintain frequency if needed. I think a fan would work fine with the frequency changing over the range produced by the circuit as shown.
There are more elegant solutions to this (a microcontroller would probably be best), but 555 is most likely the simplest solution you would fine, and probably more than sufficient for the application.
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H: How can I determine the signal level needed into a given antenna to produce a given magnetic field at a given distance?
I have an ETS Lindgren 6511 loop antenna that lists a magnetic antenna factor of -2.5 (best I can read the graph) at our frequency of interest.
I've found lots of information on establishing a given electric field, but nothing that speaks specifically to magnetic fields.
AI: If you already have the electric fieldstrength, the rest is easy. The ratio of the electric and magnetic fieldstrength is called the impedance of free space its value is approximately 377 ohms.
So approximately: $$H = { E \over 377 } $$
H and E are the moduli of the respective field vectors.
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H: What is the name of this connector on the end of a serial cable (not DB9)?
I just found that a piece of hardware I would like to connect via a serial port uses a non-standard hardware connection.
One end is a female DB9 the other is what I think is an "old" telephone connector, but I can't seem to find the name of it. Here is the pinout of both the connectors from the manual for the device
What is the name of this 4-wire/4-pin connector?
AI: That is a 6P4P modular plug (6 position 4 pin) often mistakenly referred to as an RJ11. An RJ45 was also mentioned in the answers. RJ45 is often incorrectly used for 8P8P (8 position 8 pin) modular jack. RJ stands for registered jack and each number used after it refers to the wiring scheme originally used. RJ11 and RJ45 have been used incorrectly for so long they are now excepted terms much in the same way "scotch" tape is used for any "cellophane" tape.
You should look at the specs for that piece of hardware and see if they have a wiring scheme for their equipment. It depends on what you are connecting to that serial port and how you plan to use it. Some things to consider; is it DTE or DCE, will you need to used flow control, what is the baud rate going to be, does your cable need to be a "null" for what you are doing such as programming VIA the serial port.
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H: How to limit voltage charge of supercapacitor
For a DIY project, I plan to charge an 100F 2.7V Supercapacitor using a 3.7V Lithium-ion 18650 battery. However, I need it to charge only until 2.25V.
Is there a simple circuit that I can build to limit the voltage\charge?
I basically need the stored energy to be ~250J.
AI: If you have a power PNP Darlington or can make one with a power transistor and driver then get 2 Ultrabright RED LEDs and any old NPN signal transistors. These make good low voltage zener references.
Current sensing is on 330m should be 2 to 3 W. The Upper LED turns on DIM when PNP Darlington is ON and then when output LED turns on DIM it switches off the series regulator and with 2A it takes <120 s.
Java Sim design
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H: What does mean I2C Firmware controlled Master operation, Slave is IDLE
I am trying to learn I2C bus. For learning purpose, I am using PIC 16F72. In PIC 16F72 microchip datasheet, I see if I want to use this microchip as a master it has a mode which is
I2C Firmware controlled Master operation, Slave is IDLE
[p. 48 in the PIC 16F72 datasheet]
I didn't understand what does mean this.
AI: To put it into a better perspective, the line in question is a part of the list of I2C modes that PIC1672 supports. Here's the full list:
"I2C Firmware controlled Master operation" means that the SSP in this PIC can be configured as an I2C bus master. The contents of the I2C transactions in this mode will be defined by firmware (which slave device to talk to and when, what to send, what to receive) .
"Slave is IDLE" means that the PIC doesn't act as an I2C slave in this mode.
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H: How to designate a specific portion of a design in altium
I copy and reuse portions of a design, I'll copy and the designation numbers follow the copy (for example: I'll have U1 and R2, then copying you end up having to U1's and two R2's, I don't want that.). There are sections that I'd like to re-designate (or clear designations to U1->U? for example) or have Altium renumber the designators.
1) Is there a way to make a selection and clear the designators?
2) Is there a way to clear designators in a sheet or redesgintate only a sheet?
I think I remember that you can use a 'special paste' and paste a design without designators labeled. I don't want to know about that way, I'm not a fan. I'm running 15 right now but could update.
AI: You may be looking for the "Reset Parts Designators On Paste" setting available in the DXP Preferences --> Graphical Editing pane:
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H: Ripple when switching on MOSFETs with PWM
I'm currnetly trying to construct an electronic load for testing purposes and experimentation. This is my schematic:
R2 are 7 X 4.7 Ω , 150 W each, resistors in parallel to cope with power up to 1kW needed. PWM is generated from an Arduino Uno, and is seperated from the rest of the circuit with an optocoupler. 12V are used for switching the Mosfets on and off. When the PWM is high 12V are sent to ground through the optocoupler and the Mosfets are off. When the PWM is low the 12V fully open the Mosfets for the duty cycle that we set. This set up is tested with one Mosfet and seems to work. However for safety reasons and not to overheat the Mosfets from the high currents and the use for long periods of time, I want to use more. A test with 5 Mosfets in parallel mounted on a heatsink was made, however resulted in the following strange result when switching on the mosfets:
There is a strange ripple which can be seen on the oscilloscope that I can't understand the cause of it and it occurs only when switching from off to on. Is there a way to smooth things up? Thanks.
AI: Your MOSFET turns on slowly, because it is driven through a resistor. This will increase its losses, but only if switching frequency is high enough. A push-pull driver is worth the hassle only if switching frequency is high enough to make switching losses significant compared to conduction losses. From the scope shot, I'd say switching seems to take about 5% of cycle time, however you didn't say what your switching frequency was.
Turn-off is fast because the opto shorts the gate to ground directly. Once the FET is open, it behaves like a capacitor (Cgd in datasheet). Combined with wiring inductance, this creates a LC resonant tank, which explains the underdamped resonance you see on the scope. More FETs in parallel add more capacitance, therefore more ringing.
One solution is to reduce wiring inductance, but your load resistor is probably huge considering its power, which means its inductance will be difficult to reduce.
Since you use several resistors in parallel, you could use one MOSFET per resistor. This would guarantee perfect current sharing, too.
A simple way to get rid of the ringing is to add dampening to your LC resonant tank, by adding a RC snubber across the FET. C should be a few times larger than the total Cds. As for R, the simplest way to find out is to experiment, try something between 10-100 ohms and check the scope.
You can also add a ferrite bead on the MOSFET source or drain.
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H: What is the advantage of a Sallen-Key filter over a normal second order filter?
Wikipedia links to a Sallen-Key filter as a active low pass, so I tried it out with LTSpice.
The frequency response and phase response are not linear, instead frequency response even gets higher after 10kHz. Why is that, and why would I use a Sallen-Key filter instead of a "normal" low pass filter?
The Sallen-Key is on the blue line.
AI: What you call "normal" is a simple two-stage RC filter with very bad selectivity (two real poles only). In contrast. the Sallen-Key topology is capable of producing a second-order lowpass response with much better selectivity (higher pole Qp) and various possible approximations (Butterworth, Chebyshev, Thomson-Bessel,...).
However, there is one big disadvantage of the Sallen-Key structure - if compared with other active filter topologies (multi-feedback, GIC-filters, state-variable,...): There is a direct path (in your example: C4) from the input network to the opamp output.
That means: For frequencies much larger than the cut-off frequency the output voltage from the opamp is - as desired - very low. However, there is a signal coming directly through the C4 path which creates an output signal at the finite output resistance of the opamp. And this resistance is increasing with frequency!
As a consequence, the damping charactersitics of this filter are not as good as it should/could be. And that`s what you have observed: The magnitude shows a rising characteristic for larger frequencies.
(This unwanted damping degradation is not caused by limitations of the gain-bandwidth product).
Improvement: The situation can be improved by scaling the parts values: Smaller capacitors and larger resistor values.
Comment 1: This undesired property of any opamp circuit with a feedback capacitor (between output and input circuitry) can be observed also for the classical MILLER integrator.
Comment 2: So - are there any advantages the Sallen-Key filters have in comparison to other active filter structures? Yes - there are. Let`s compare the two most frequently used topologies:
(1) Sallen-Key has very low "active sensitivity" figures (sensitivity against opamp non-idealities) and rather high "passive sensitivity" figures (sensitivity against passive tolerances).
(2) Multi-feedback filters (MF): High "active sensitivity" and low "passive sensitivity" figures.
Both sensitivities are rather important properties of all filters because they determine the deviations between desired and actual filter response (under IDEAL conditions all filter types would have identical performance properties).
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H: Picking the right opamp
I've been designing some active bandpass filters and, while in simulations it works great with ideal op amps, I'm not sure how to go about picking an op amp from a distributor.
Obviously there are an uncountable amount of options when it comes to choosing parts, and I can do my best to narrow down to what I need, but even then there's 1000s of options.
I'm not a super technical person so it's difficult for me to look at a datasheet and go "yep that's the one I need." In this case, I'm not trying to amplify the signal in the active bandpass filter but simply maintain it (as best I can) from any attenuation. I've been referring to this (very) simplified guide about active bandpass filters http://www.electronics-tutorials.ws/filter/filter_7.html.
I'm dealing with a 5V DC supply and will be breaking a signal with possible frequencies 20-20kHz into 5 filters (0-250, 250 - 500, 500 -2k, 2k-6k, 6k-20k). I'm not looking to boost the signals but rather preserve their original strength as much as possible through the filter. The filter doesn't need super sharp cutoffs as it won't be doing anything precise but powering a LM3914 Dot/Bar Display Driver (unless that is precise, what do I know).
The five filters are to be in parallel receiving the same signal input which will have an amplitude range of 300mV - 2V. Each output to the filter will drive its own LM3914, for a total of five LM3914s.
So what it boils down to, is what am I actually looking for in an op amp to create active filters? Are there any well known op-amp designs commonly used for filters?
AI: This specific application
Presumably you want to power the op amps with the (single) 5 V DC supply, so your main requirements are:
an op amp that can operate with a 5 V supply or less
an op amp which has a common mode range that extends to the negative rail (these are marketed as "single supply" op amps) so that your signal can swing as low as the ground reference. You may choose an op amp which is "rail to rail input", but that's not necessary since your signal does not reach the positive 5 V rail.
Since you are not amplifying the signal you need an op amp that is unity gain stable (most op amps are, but there are a few that aren't).
You require 5 op amps so you'll probably want an op amp that is offered as a quad (i.e. four op amps in one package) and a single.
Your bandwidth requirement of 20 kHz is easy for almost all modern op amps to meet, especially since you are not requiring any gain.
The op amps are driving a high impedance input (the LM3914) and the filter feedback network so the output current requirement is not high. Almost any modern op amp will work. You'll care more about the input specification of the op amp; 300 mV minimum amplitude of the signal is also easy for modern op amps to meet, but an op amp with low input offset, low noise, etc. would improve performance.
Other than that, just pick an op amp with a good price, convenient package, and good availability. You could also choose one with a low supply current as an additional but less important differentiator.
I like to search for op amps by visiting the online search tools on the websites of the major manufacturers (Texas Instruments, Linear Tech, Analog Devices, etc.). This requires multiple searches (one for each manufacturer) but these tools are often a bit easier to work with than the search tool for a distributor like Digikey (it's harder to filter out the op amps which don't meet the 5 V minimum supply voltage spec, for example). Since the LM3914 is a TI device, here's a search for TI (quad) op amps which meet your needs: http://www.ti.com/lsds/ti/amplifiers/op-amps/op-amps-products.page#p480=4;4&p1261min=0.9;5&p23typ=0.0055;1&p78=In;In%20to%20V-&p1498=Catalog&p1130=0.06;1&p233typ=0.2;25
I've additionally filtered out op amps above $1 (note that's the 1ku price), and I've limited a few other specs which aren't important (e.g. I've filtered out op amps with a gain-bandwidth product > 1 MHz). The result is a manageable 28 parts. Play around with the search a bit to find what you want. The single op amp version of a quad op amp is just a part number change and shares the same datasheet.
General Approach
Start with supply voltage requirements. A lot of op amps are designed to work with relatively wide supplies like \$\pm15\text{ V}\$. Others are designed to work with low voltages. This requirement will eliminate a lot of unsuitable op amps.
Then look at the required input common mode range (i.e. how close to the rails does the input need to swing) and the output swing requirement. These specs tend to give inexperienced circuit designers the most trouble (based on the "why doesn't my op amp circuit work?" questions I've seen here).
Next look at the specifications that you think will be hardest to meet. Depending on the application that's probably something like bandwidth, quiescent current (e.g. if you are running off a battery), input characteristics like input offset and noise, or output drive capability.
By now you should be down to a manageable number of op amps (but hopefully you haven't eliminated all of them). If there are still a lot of op amps left, start eliminating the choices by price, availability, and package (e.g. do you need a small one for space requirements, or do you want a relatively large package for convenience?). By that point it shouldn't matter which op amp you choose.
If you are working with another device (like a sensor, driver, etc.), take a look at the application circuits in its datasheet. Sometimes these circuits recommend a specific op amp. If so, a look at that op amp's specifications can be a great starting point for figuring out the best op amp for your application.
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H: How to design CMOS bridge rectifier?
I designed the bridge rectifier circuit.
I wnat to make a full-wave rectification. so, I made a CMOS circuit.
I refered to other papers. Figure2.
"An ultra-low-voltage self-powered energy harvesting rectifier with digital switch control"
Link:
I think this circuit is full-wave rectification. But the result is a half-wave rectifier circuit. Is the result of this graph correct?
And my theme is Energy Harvesting. So input in mV units. I had input 0.3V but Simulations output is 1V. Why does this result?
Thank you for reading.
AI: You can't ground the voltage source to the same ground as the output. You should remove the bottom ground and you will also need a load resistance.
Here is a schematic and simulation of a circuit that functions as a full wave bridge rectifier. This was done in LTSpice.
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H: How do I create circular polygon pour cutout in Cadsoft EAGLE?
I would like to have a cutout without copper within a polygon pour. I tried to draw a circle on the top layer but to no avail.
AI: You want to draw your primary copper pour on the top (or bottom) layer, and the circular cutout on the appropriate Restrict layer: tRestict (top) or bRestrict (bottom).
The copper polygon will not extend onto the restrict-layer feature.
Make sure the copper pour is a polygon, not just a "rectangle"! The primitive rectangle and circle features are simply static shapes which do not automatically adjust to the design constraints.
Confusingly, there is also a vRestrict layer, which actually forbids vias, not copper features.
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H: Are there risks in connecting the power pins of separate development boards?
I am connecting the SPI bus pins of two development boards:
NVIDIA Jetson TX1
Cypress C8CKIT-030
They are each connected to their own wall-wart power supplies. I have confirmed that the connected pins are all operating at 3.3v. However, I know that "3.3v" is only in reference to their own grounds.
Are there any potential risks to connecting the VDD (3.3v only) and ground pins between the boards to make sure the voltages match up correctly?
AI: If you are connecting two boards (powered from two different wall adapter), make sure you have made ground common. Short the Ground Pins of two boards together. This way, both boards will have common reference.
Unless you are using the 3.3 V from first board to power the second board, you don't have to connect the power lines. Once, common ground is established, the voltage levels definition remain same for both boards. 3.3 V for one board now means 3.3 V for the other board too.
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H: Low frequency response of a BJT amplifier.How is the cutoff frequency equal to \$ \frac{1}{2\pi (R_S+R_{in})C_{in}}\$ in fig 2
In a low frequency region of the single stage BJT amplifier, it is the
RC combinations formed by the capacitors \$ C_{in},C_E,C_{out}
\$ -Electronic Devices and Circuit Theory-Boylestad
Considering the equivalent circuit formed as shown in fig.1
The output voltage and input voltage are related by:
$$\Bbb V_{out}=\frac{\Bbb R}{\Bbb R-j\Bbb X_C}\Bbb V_{in}$$
The magnitude is given by
$$V_{out}=\frac{R}{\left[ R^2+X^2_C \right]^{1/2}}V_{in}$$
$$\text{When } X_C=R$$
$$V_{out}=0.707V_{in}$$
The frequency at which this occur, is given by the equation,
$$R=X_C=\frac{1}{2\pi f_LC}$$
or, 3dB cutoff frequency
$$f_L=\frac{1}{2\pi RC}$$
In case the equivalent circuit formed by the BJT circuit is something like fig 2, which is the case when we are considering the input portion of the BJT circuit, the analysis is something like this:
$$\Bbb V_{in}=\frac{\Bbb R_{in}}{\Bbb R_{in}+\Bbb R_S-j\Bbb X_C}\Bbb V_{in}$$
The magnitude is given by
$$V_{in}=\frac{R_{in}}{\left[ (R_{in}+R_S)^2+X^2_C \right]^{1/2}}V_{in}$$
$$\text{When } X_C=R_S+R_{in}$$
$$=>\frac{1}{2\pi f C_{in}}=R_{in}+R_S$$
$$=>f=\frac{1}{2\pi(R_{in}+R_S)C_{in}}$$
But for \$ X_C=R_S+R_{in} \$
$$V_{in}=0.707 \frac{R_{in}}{(R_S+R_{in})}V_{S}$$
Which is not
$$V_{in}=0.707V_S$$
How is then the cutoff frequency equal to \$ \frac{1}{2\pi (R_S+R_{in})C_{in}}\$ in case of Figure 2
?
Furthur,
For
$$V_{in}=0.707V_S$$
$$\frac{R_{in}}{\left[ (R_{in}+R_S)^2+X^2_C \right]^{1/2}}V_{in}=\frac{1}{2^{1/2}}$$
$$=>\frac{R_{in}}{(R_{in}+R_S)^2+X_C^2}=\frac{1}{2}$$
$$=>2R_{in}^2=(R_{in}+R_S)^2+X_C^2$$
$$=>X_C^2=(R_{in}-R_S)^2$$
$$=>X_c=R_{in}-R_S$$
AI: The answer is simple: The 3dB cut-off (fc) is NOT defined for the frequency fc that gives Vin=0.707*Vs. Instead, it is defined for the frequency fc where the filters output is 3dB BELOW the maximum output.
For a simple R-C lowpass resp. C-R highpass this maximum is unity (for very low resp. very high frequencies). But in Fig.2 this maximum (for infinite frequencies) is Vin=Vs*Rin/(Rin+Rs) .
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H: std_logic minimal example
Regarding different types of std_logic in VHDL, there are little information about the real differences among some types.
TYPE std_ulogic IS ( 'U', -- Uninitialized
'X', -- Forcing Unknown
'0', -- Forcing 0
'1', -- Forcing 1
'Z', -- High Impedance
'W', -- Weak Unknown
'L', -- Weak 0
'H', -- Weak 1
'-' -- Don't care
);
Why there is a need for WEAKs? What is the difference between - (don't care) and U? Is there any example that shows why WEAKs are necessary? In which situations should someone use them (or -)? When does X occur? A minimal example should clear that.
AI: 'U' just means that a signal isn't driven. If you have:
signal sig : std_logic;
and never assign it, then if you look at this signal in a simulator, it will have value 'U'.
'-' is useful if you have a logical function of some kind where you genuinely don't care what the output is in one or more particular conditions. This allows a synthesis tool to optimize the design such that the output in this case is whatever uses the minimum amount of FPGA resource. There are probably other uses for it too.
'L' and 'H' are useful in test benches for modelling external interfaces that rely on pull up/down resistors for part of their operation. A good example of this would be I2C, where to model the bus properly, you would only ever drive the signals from your FPGA low ('0') or High-Z ('Z'), then have the external pull-up modeled as a permanent assignment to 'H' in your test bench. For example:
-- In FPGA:
process (i2c_data)
begin
if (i2c_data = '0') then
i2c_sda_pin <= '0';
else
i2c_sda_pin <= 'Z';
end if;
end process;
-- In test bench, `i2c_sda_pin` is connected to signal `i2c_sda`
i2c_sda <= 'H';
The result will be a signal that toggles between 'H' and '0'; this allows it to be connected to multiple I2C devices in the test bench, while avoiding any possibility of contention ('X').
As a side note, this is an example of where the clk'event and clk = '1' style of edge detection doesn't work; the I2C clock would toggle between '0' and 'H'. rising_edge(clk) works much more intuitively.
'X' is usually the result of two processes trying to drive the same signal with different values in a way that cannot be resolved, i.e. when there is contention on a signal. For example:
p1 : process(sig)
begin
output <= '0';
end process;
p2 : process(sig)
begin
output <= '1';
end process;
The result will be that output takes the value 'X', because there is no way to resolve the two outputs. Think of this as a signal line with two output pins on it. As long as they both drive the same value, the line will look OK. If they both drive different values, there will be contention, and the state of the line cannot be relied on.
If we change the second process to:
p2 : process(sig)
begin
output <= 'L';
end process;
output will take the value '1', because a strong '1' overrides a weak 'L'. Think of this as connecting a logic output pin to a line with a weak pull-down resistor; if the pin drives high, the line will go high.
It can also be useful to drive a signal with 'X', for example to simulate the timing of an external interface.
'W' is the resolved result when a signal is driven with both 'L' and 'H'. I don't know if there is a use case for purposefully setting a signal to 'W', but there's bound to be one somewhere.
The result when driving two std_logic values onto the same signal is determined by the 'resolution function' for this type, and the fact that std_logic is a 'resolved type', i.e. a resolution function exists for it, is what makes it special. There is an existing question here that looks at the particular resolution function for std_logic in more detail.
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H: Which motor driver to use with a DC gear-box motor?
I have this motor (a "PMDC Spur Gear Motor/KGA25RP")
I am not sure if something like L298 will work with it since it is a DC gear-box motor. What kind of driver should I choose?
AI: The L298 H bridge IC has a maximum supply voltage of 50 V and a maximum continous current (per output channel) of 2 A, so it will work with every subtype of your motor: the highest current motor is rated for 0.4 A at 12 V, well in the range of the H bridge, and the highest voltage motors are rated 24 V, half of the maximum voltage of the L298.
The inclusion of gears in the motor assembly is completely irrelevant to the electrical characteristics of the motor.
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H: Equivalent resistance of a set of n resistors?
Is the equivalent resistance across a set of n resistors connected in series greater than the equivalent resistance across them when they are connected in parallel? I want to find the relation between \$R_s\$ and \$R_p\$.
My attempt:
Let the resistance of the resistors be denoted by \$R_1, R_2, R_3,..., R_n\$ and the equivalent resistance across the series and parallel combinations of the resistors by \$R_s\$ and \$R_p\$.
\$R_s=R_1+R_2+R_3+...+R_n\$
and
\$R_p=\frac{1}{\frac{1}{R_1}+\frac{1}{R_2}+\frac{1}{R_3}+...+\frac{1}{R_n}}\$
From first look it may seem that \$R_p\$ is less than \$R_s\$ but then on careful inspection it is not possible to ascertain which one is greater.
AI: Let's try a very simple approach.
The collection of resistors will have a maximum value resistor \$R_{max}\$, and a minimum value resistor \$R_{min}\$. By definition $$R_{min} <= R_{max}$$ the equality is true if all resistors are equal, otherwise the inequality is true
The series connection will contain \$R_{max}\$, plus at least one other series resistor, which will increase its resistance, so $$R_s > R_{max}$$
The parallel connection will contain \$R_{min}\$, plus at least one other parallel resistor which will decrease its resistance, so $$R_p < R_{min}$$
as $$R_p < R_{min} <= R_{max} < R_s$$ therefore $$R_p < R_s$$
Notes
(1) We assume all the resistances are non-negative. This is true if they are all passive. There are active networks that can exhibit a negative resistance, but they are not relevant to this question.
(2) Resistance is voltage/current. The total resistance of any two resistors in series will have a resistance greater than either component. The total resistor will have a voltage equal to the sum of that over each component, with all currents being equal.
(3) The total resistance of any two resistors in parallel will have a resistance lower than either component. The total resistor will have a current equal to the sum of that through each component, with all voltages being equal.
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H: How to test if an IR sensor is broken?
I have a feeling my IR sensor does not work. To make the most 'low level' test possible I want to check if the +5 and GND are working/are on the pins I expect:
On the right pin put +5 (according to pic below)
On the middle pin GND
On the left pin the data signal
Can I assume if I check with a multimeter the continuity between +5 and GND, that the sensor is OK (except for the data signal maybe), and if there is no continuity, it is broken?
Update:
My circuit:
Arduino 5V - IR Sensor, Right pin
Arduino GND - IR Sensor, Middle pin
IR Sensor, Right pin - Resistor 220 Ohm - LED - Arduino Digital pin 11
No (useful) sketch run
Remote tested with telephone camera (visible light when keys pressed)
Result when pressed towards IR sensor: LED off (both with or without pressed remote buttons)
I used a multimeter to check the voltage between the right pin and middle pin which is 5.06 volts (and when I reverse the wires it shows -5.02 volts) so it seems the right pins are used. The left pin always gives 0.00V when checked against the +5V / right pin.
AI: The most low level test of this sensor is to power up the device and check if the data pin goes high (means +5V). You did not give us a certain part number, however comparable devices have an active low output. Thus the Data pin should be high without IR data.
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H: Variable wattage vs temp control in a soldering iron?
Presently, I am looking into soldering irons because I am considering making a purchase. I am considering features in order to find something that is usable and versatile for the value.
One factor I am struggling with a bit has to do with temperature vs. wattage. I have already checked out a number of resources:
https://www.circuitspecialists.com/blog/selecting-a-soldering-iron-temperature-wattage-and-tip/
How does power affect soldering irons? Is 30 Watts enough?
As such, I do get the basic idea about wattage being an issue of the tool's capacity to heat the tip and replace heat that has been lost or sunk. Where it becomes a bit confusing to me, though, is when it comes to varying one or the other. For example, the Vastar Full Set 60W 110V Soldering Iron Kit features adjustable temperature, whereas the Weller WLC100 has a dial for you to vary the power (5 to 40 watts).
So, I guess I am wondering: Is there a reason to prefer adjustable temperature over adjustable power? Or vice versa? Or am I overthinking the matter?
Your input on this is appreciated, so thanks in advance!
AI: Once you try proper temperature regulated soldering gear, you never go back.
Dumb constant power tool:
Takes a while to heat
Temperature is unknown
Either too hot (burns your PCB) or not powerful enough (soldering takes a long time, and you also end up burning your PCB)
You need a 20W one for SMD, a 30W one for thru hole, a 50W one for connectors, a 100W one for big wires...
Dumb variable power tool:
Same drawbacks as above, except you only need one.
Does everything... but does it wrong.
High power regulated tool:
Get more than 80 watts. More power means better reaction time, faster and more accurate soldering, and counter-intuitively, less chance of burning the PCB, because the job is done quickly. Mine heats up in 20 seconds. There is no need to change the settings, whether it's a 0603 capacitor or a big banana plug. It just works.
Now, soldering iron or soldering station?
Stand-alone Iron:
Cheaper
Easy to transport
Wire rated for mains voltage, thus thick and not flexible
No space on a soldering iron for temperature display and knobs
Station advantages:
Smaller, nimbler, lighter iron
Thinner and more flexible wire
Nice temperature display and controls
I have a XYTRONIC 90W station, which cost 90€. Very cheap!
Also, look at the price and availability of tips! Tips can be anywhere between 3€ and 20€ depending on brand, this is important both over the long run, and when you need a special tip to do the job. Although a standard flat tip is adequate for most work.
If you get an obscure brand station which uses special tips which are impossible to find... or you can't find replacement irons or heating elements... you'll regret it later, when you have to throw it away because you can't find the spare parts.
I believe the tips for mine are identical to Weller WES51 tips, so even if the manufacturer goes bankrupt, I won't have problems finding them.
I also have a €9 30W dumb soldering iron, which uses Weller tips. With one soldering iron in each hand, de-soldering SMD resistors and capacitors only takes a second. It is well worth having a cheapo second iron for this reason.
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H: Proper use of pull-up and pull-down resistors
A pull-up or pull-down resistor is used to set a default voltage level somewhere in the circuit. Since in electronics we dislike random behavior, should we overuse these resistors?
When a microcontroller starts up, output voltage level is usually unknown. Are pull-up/down resistors necessary to avoid weird starting behavior?
When are such resistors necessary?
AI: A pull up/down resistor (or an on-chip current source) is used to give a certain "default" value to a node which would otherwise not have a default value but does need it.
Such a value is needed when the node feeds into a CMOS logic input because then undefined erratic behavior can occur as such a CMOS input has an extremely high input impedance so the voltage on the node can be easily disturbed making the gate "flip" randomly. In this case a pull up/down sets a default value and prevents random "flipping".
Is it needed everywhere ?
No because many nodes will be connected to some output which will provide a default value. Only nodes which could be high ohmic at some point and connect to a CMOS input need a pull up/down.
You mention that a microcontroller's output level is unknown at startup. That can be true if the uC starts with the outputs in HighZ (high impedance, Tri-state) mode. Most uCs do this. After initialization the uC should define the output state properly. If the circuit connected to the uC's output cannot handle the HighZ mode properly (even for a short time) then a pull/up down is indeed needed.
A different use for pull up/down resistors is with open collector or open drain outputs. These outputs can only pull the voltage up or down. For example an open collector NPN can only pull the output down.
To be able to make a "high" signal a pull up resistor is needed.
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H: Electronic wearing of a printed circuit board?
I was told that electronic components and printed circuit boards have a limited lifetime. This is backed by several questions and answers:
https://www.quora.com/Do-circuit-boards-have-a-useful-life
https://www.quora.com/How-long-do-circuit-boards-last
It is however unclear to me if this is because of electronic wearing of the components, or environmental influences causing the connections to break, parts to overheat, etc.
So, considering an average printed circuit board with several IC's, a bunch of resistors and some capacitors that is connected and working under ideal circumstances (controlled temperature, humidity, etc). Will this PCB or its components eventually break because of the electrons that are moving though it, or will it fail because of other reasons?
Does the same failure occur if the PCB is running in a less controlled environment like a regular office or is it likely to be something different? And is it in the same time span, or significantly earlier?
AI: If water condenses on your PCB, then salts left over from manufacturing processes will turn it slightly conductive. If the PCB is powered, copper from exposed pads and solder will be corroded by electrolysis. This is what kills your phone if it gets wet and you leave the battery in. It goes a lot faster than you think.
You can replace "water" with sweat, dead bug juice, rodent pee, whatever...
On a very humid day, you may hear a loud bang followed by a puff of smoke: that used to be a chineeese USB charger with 0.5mm mains creepage distance.
Now, under normal circumstances, everything has a finite lifetime...
The first thing to fail is usually a capacitor which dries up. Heat accelerates the process. If the capacitor overheats, bulges, and leaks electrolyte all over your board, this will corrode everything it touches.
Solder joints (and semiconductors) can crack under heavy vibration or due to thermal cycling (the famous XBOX ring of death).
Mechanical shock (ie, dropping the stuff on the floor) will cause heavy components to lift their pads, or just break off the board. Shock, or board flex from an over-eager user sticking a huge CPU cooler in their PC will crack brittle stuff like MLCCs or ferrites... or BGA solder balls.
Connectors which are manipulated often will wear out, or they will break off the board if they're pure SMD.
Vibration will loosen screws. Murphy's law ensures it'll fall off in the worst possible place.
Cable which is flexed too often will break.
Electrical contacts which are secured by screws can eventually loosen, then overheat and burn if high current.
Multi-strand wire will corrode over the years if the air is contaminated.
Fans fail. Air filters clog up with dust.
Software is buggy.
Then...
Semiconductors under high heat/voltage/current stress can fail due to thermal cycling or electromigration.
Eventually, flash memories will forget their contents.
Lead-free solder grows whiskers which will cause shorts.
However, unless you're designing a guidance board for a Minuteman missile, your stuff will probably be obsolete before it fails!...
What I mean is that the most likely causes of failure should be addressed first.
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H: controlling ceiling fan speed to minimal
Currently, the fan is still fast for me on number 1 speed. Is it possible and how to reduce this speed further using any device.
AI: It might be possible to reduce the speed by a limited amount. Ceiling fan speed reduction is done by various means of making the fan weaker so that the load will slow it down. The voltage could be reduced by inserting inductance or resistance in series or using electronic voltage reduction. However, the motor is probably designed to work over a specific speed range with a specific fan design. In trying to reduce the speed more than it is reduced with the original design, the motor may just stall. Theoretically, the frequency could be reduced by reducing the frequency, but that too has limitations when used for a single phase motor and would likely not be worth the expense.
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H: What is this symbol? (assumed compliance mark like CE / FCC)
So Raspberry Pi have a new model out (the Raspberry Pi Zero W). Having taken a look at the photos, I see that on the reverse, where the CE and FCC compliance marks are shown, there is another symbol. It's hard to describe - something like a "T" with a parallel bar over the top enclosed by a three-quarter circle and a horizontal lightning bolt above the "T" but inside the partial circle.
Here's a picture:
and a close-up:
Does anyone know what this symbol represents? My guess would be another compliance mark.
AI: I was wondering this myself, however some fairly extensive image digging revealed that it’s something approximate to the Japanese equivalent of the FCC certification mark, sometimes called Giteki. Japanese law seems to prescribe that radio devices should have this mark to be used in Japan.
http://incompliancemag.com/article/wireless-certification-in-the-land-of-the-rising-sun/
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H: Counter inputs ENT, ENP and output RCO
I am using an IC 74162 (decimal counter) and I know that both enable inputs ENT and ENP must be on so that the counter works, but I am not sure about the difference between them, and their relation with the output RCO.
Thank you!
AI: A 74162 is a decimal counter.
The EN inputs and the RCO outputs work as follows.
In order to respond to a rising clock edge by counting, ENT, ENP, LD and MR must all be high.
If this is true, on a count of 9 the RCO output will go high. Ordinarily, you tie ENP, LD and MR high, then connect the RCO of one counter to the ENT of the next counter in the chain, and so on.
So, for the first counter, at a count of 9 RCO will go high and feed ENT of the next. A rising clock edge will then cause the first counter to go to 0 and the next counter to count 1 step (increment). RCO of the second counter will go high when the output is 99, so this can be used to enable a third counter, which will then count hundreds. And so on.
The difference between ENT and ENP is that ENP enables the counter but does not affect RCO. So it enables the counters but does not affect the transition count.
You'll notice (I hope) that for a chain of 162s all the clocks must be tied together. As opposed to something like a 7490, all counters will switch at exactly the same time, as opposed to a 7490 which switch in a ripple fashion (which is why it is called a ripple counter). This allows, among other things, much easier feedback by decoding the counter outputs, since they all change at the same time and you don't get the "skew delays" which plague ripple counters. So in order to make a counter do something other than simple divide by 10 counting, you can make a counter which will recycle on any count you like.
Let's take a 2-stage counter, and try to make a divide by 79. You can feed back the output to the MR input to do this, but you need to do in on an output of 78, not 79, since the MR will reset the counter to 0 rather than 1. So you use a 4 input NAND gate which looks at Q0, Q1 and Q2 of the second counter (seven, right?) and Q3 of the first counter (8), and connect the NAND to the MR of both counters.
At a count of 78 the output of the NAND will go low, and on the next clock the counter chain will reset to 0, and the cycle will repeat indefinitely. But note that you can only do this with 74162 and 74163, not 74160 and 74161. The difference can be found on the data sheets: the 160 and 161 have asynchronous resets. while the 162 and 163 have synchronous resets. This means that if MR goes low the 160 and 161 will reset immediately (even for a brief spike) while the 162 and 163 will only respond on the clock edge.
Also note that in all 4 chips the LD input is synchronous.
I suggest you look closely at the data sheets for the ICs involved. They will have timing diagrams which explain all this.
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H: FPGA Memory vs Registers
I'm having an issue on an FPGA project I'm working on. I'm unable to write to defined memories within the FPGA, but writing to registers works fine. I was thinking about working around this problem by simply using registers as memory. I only need to store a max of ~1024 bits at a time, and there is plenty of register space available on the FPGA. The FPGA in question is an Altera Cyclone III model if that makes a difference.
Are there any disadvantages to using registers versus memory that I'm overlooking?
AI: The actual storage elements for registers and RAM in an FPGA are the same. What matters is the routing resources available. RAM can be thought of as a dedicated array of registers with with a relatively small number of signal lines controlling a whole lot of registers. This allows you to handle a lot of data without using a whole lot of interconnect resources, which are actually the limiting factor in FPGAs.
So the answer is, yes, you can use registers instead of RAM. And no, using 1024 of them is not a great idea since it is likely to suck up a lot of your FPGA, both in functional cells and in operating speed.
You're much better off figuring out how to use your RAM.
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H: Horn disturbs controller and lcd on common power source
I have a 60V battery which feeds a PCB itself switching down the voltage to a 12V bus and then from 12V to a 5V bus using two consecutive TI TPS54560 switching regulators (5A max current). I have a MCU connected to a LCD powered by the 5V bus. The 12V bus power the front lights, back lights and a horn.
Everything works fine but when I power the horn, for some reason the screen becomes empty or displays random characters. However, the second I input an analog signal into the adc of the MCU then the screen starts displaying the correct data again. The horn is a 12V 1.5A 105dB standard universal horn. Here is a simplified diagram of the circuit:
simulate this circuit – Schematic created using CircuitLab
If you need more information or clarification do not hesitate!
Thank you for your help!
AI: Three main suspects:
Supply decoupling / filtering: use decoupling capacitor in all ICs power supply lines. Follow the datasheet guidelines for each device.
Grounding: your schematic shows somewhat careless grounding. Use a ground plane and/or single point ground.
Piezoelectric effect in ceramics capacitors: If the PCBs are close to the horn, the vibration induced by the 105 dB SPL levels can wreak havoc in ceramic capacitors. As this kind of capacitors are everywhere (coupling, decoupling, filtering, timing...), it's very likely this could be the main cause of the glitches you're observing.
How to mitigate the piezoelectric effect?
Acoustically/mechanically isolate/decouple the PCB from the horn. Don't attach the PCB to a stiff surface that can couple to it the vibrations caused by the horn. Also, use acoustic foam around PCB to reduce SPL levels, put it inside a box, etc.
Replace ceramics with equivalent electrolytic and film capacitor when possible and convenient.
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H: practical Mosfet circuit Y/N?
Hi
im trying to activate non-logic Mosfet using Arduino
as in img. is that ok or the mosfet will still on?
AI: As per my comment here is a simple way of using the 24V supply to switch the MOSFET from the arduino (0 -5V) signal.
When Q1 (NPN) is turned ON (input 5V to R1) it pulls a small current through R2 and R3. This turns on Q2 (PNP). R4 and R5 divide the 24V (at the collector of Q2) to about 10 to 11V at the gate of the MOSFET turning it fully ON.
When Q1 is turned OFF (input 0V ), Q2 is turned OFF and the voltage at the gate of the MOSFET falls to 0V, turning it off.
D1 shorts out the back emf caused by turning the current through the motor OFF and protects the MOSFET from damage.
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H: Self-resonance frequency of MLCC in Buck converter circuit
Let´s assume I use a synchronous buck converter switching at 1MHz and a 47µF MLCC at its output whose self-resonance frequency is right at 1MHz.
For my understanding, using an DC/DC converter output capacitor near or at its self-resonance frequency is not a bad idea. But I am not sure. I think, there should not be instability issues as long as the resonance frequency of the inductor/capacitor combination is well above or below the 1MHz. So, for 47uF and 2.2µH, I have resonance near f = 15kHz, which should be fine.
Is the "loss" or even "turnover" of the phaseshift of the capacitor a problem in that situation? I should note, that the converter uses constant frequency PWM and (as far as I can deduce from the block diagram below) peak-current mode control.
AI: I think, there should not be instability issues as long as the resonance frequency of the inductor/capacitor combination is well above or below the 1MHz.
Stability depends mainly on the behavior of the circuit within the bandwidth of the control loop and slightly above. As another answer says, a key parameter is the phase margin of the control loop. This is measured at the frequency where the open loop gain passes through unity.
This frequency is generally much lower than the switching frequency of the regulator, typically by as much as 10x, so about 100 kHz in your example (but read your datasheet and analyze your design to figure out what it is in your particular circuit).
Edit: I should add, the output capacitor is also important to smooth the ripple from the switching waveform. This is a separate issue from the stability of the control loop. As another answer says, the switching waveform will contain harmonics far above the fundamental frequency, so you will likely want to include some lower value, higher SRF, capacitors in parallel with your 47 uF MLCC to deal with those components.
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H: What is "burnout current" in an AD7730?
There are "Burn Out" bits in the mode register. I don't see a good description in the datasheet.
How can I use these correctly? I don't want to spoil the ADC...
AI: The "burnout currents" are current sources that you can turn on and off for diagnostic purposes. In other words, you can use them to see if your external transducer(s) have burned out :)
The circuit looks like this:
Here, from page 25 of the datasheet: (emphasis mine)
Burnout Currents
The AD7730 contains two 100 nA constant current generators,
one source current from AVDD to AIN(+) and one sink current
from AIN(–) to AGND. The currents are switched to the selected
analog input pair. Both currents are either on or off,
depending on the BO bit of the Mode Register. These currents
can be used in checking that a transducer is still operational
before attempting to take measurements on that channel. If the
currents are turned on, allowed flow in the transducer, a measurement
of the input voltage on the analog input taken and the
voltage measured is full scale, it indicates that the transducer
has gone open-circuit. If the voltage measured is 0 V, it indicates
that the transducer has gone short circuit. For normal operation,
these burnout currents are turned off by writing a 0 to the BO
bit. The current sources work over the normal absolute input
voltage range specifications.
I don't know if this is a common feature, but I know I haven't heard of it before!
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H: Toggling between 3 frequencies
I currently have a program that runs at X frequency, with the clock input generated by a slow clock module that divides the default clock via the counter increment method.
However, I wish to be able to switch between 3 frequencies, X, Y and Z using button presses. I have debounced the buttons with a single pulse signal generator module (using d flip flops). How can I go about doing it using rudimentary concepts only (multiplexer, etc)? Also, should the logic be implemented inside the slow clock module or in the main module?
Thank you.
simulate this circuit – Schematic created using CircuitLab
AI: Since you tagged your question with verilog, I'll assume that you're really looking for an HDL solution targeted at an FPGA. In this case, using a single programmable divider makes a whole lot more sense than having multiple dividers followed by a multiplexer. Something like this:
module clockdiv (
input master_clock,
input reset,
input [1:0] select,
output reg clock_out
)
reg [15:0] divider;
always @* begin
case (select)
2'b00: divider <= X; // defined elsewhere
2'b01: divider <= Y; //
2'b10: divider <= Z; //
2'b11: divider <= W; // ... etc.
endcase
end
reg [15:0] counter;
always @(posedge master_clock) begin
if (reset) begin
counter <= 0;
clock_out <= 0;
end else begin
if (counter >= divider) begin
counter <= 0;
clock_out <= !clock_out;
end else begin
counter <= counter + 1;
end
end
end
endmodule
Define X, Y, Z, etc. to give you the clock division ratios you're looking for, keeping in mind that the output clock is further divided by 2 to produce a square wave.
This solution will never produce a bad clock pulse, even if the select input changes in the middle of an output cycle.
Addressing your secondary problem of controlling the select lines, the key here is to bring the two debounced pushbutton signals into the same clock domain as the rest of the logic. Something like this:
module up_down (
input master_clock,
input reset,
input button_up,
input button_down,
output reg [1:0] count
)
// Synchronizers and edge detectors for asynchronous inputs
reg button_up_a, button_up_b, button_up_c;
reg button_down_a, button_down_b, button_down_c;
always @(posedge master_clock) begin
button_up_a <= button_up;
button_up_b <= button_up_a;
button_up_c <= button_up_b;
button_down_a <= button_down;
button_down_b <= button_down_a;
button_down_c <= button_down_b;
if (reset) begin
count <= 0;
end else begin
if (button_up_b && !button_up_c) begin
//rising edge on button_up detected
count <= count + 1;
end else if (button_down_b && !button_down_c) begin
//rising edge on button_down detected
count <= count - 1;
end
end
end
endmodule
Connect the count output of this module to the select input of the previous module.
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H: How does an outlet know what wattage to put out?
In the UK, if that makes any difference, I was wiring a motor and then I wondered (and kinda needed to know), how does a plug socket know how much power to put out? because all the input ampages on all the plugs sad different things but can all be plugged into the same socket.
How does this madness work?!? XD
AI: The rating of a plug is the maximum current it can provide. The rating of equipment is the current it will actually demand. The plug provides a fixed voltage, and the equipment (the load) decides how much current to draw at that voltage.
If the load tries to draw more current than the plug can handle, then in theory a breaker should trip. In a properly designed system, the trip point of the breakers are set to a bit less than the current capacity of other parts of the system.
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H: Starting Oscillation in Sine Oscillator
Here is a simplified digram of a sine wave oscillator (part of Colpits oscillator arrangement) stressing on the LC circuit. I am concentrating on the event at T = 0 sec.At the beginning, the inductor L2 would act as short and C3 and C4 will charge up to same potential. And here is my question, if the capacitors C3 and C4 charge up to same potential, then how on earth they discharge through the inductor L2.
I am guessing it won't, and let me take a step forward. Say voltage across C3 is fed back to the base of BJT (not shown in diagram). In that case collector current would increase, hence voltage across C4 would decrease, and only then the discharge process starts through the inductor as C3 is maintaining its starting potential. Hence can I state that the feedback is necessary to even start the discharging process through the inductor?
Is the above reasoning of mine correct??
AI: When the power is turned on, the voltage rises from 0V to 1V, however an inductor doesn't allow a current to change instantaneously.
It isn't a short but an open circuit at first, the current through L1 can only rise slowly.
A picture is worth a thousand words:
C4 is charged up
L1 starts to conduct
L1 is pulling current out of C4
C3 is fully charged, the current in L1 reverses
C3 gets discharged and C4 charges again
This is a view of the time domain, which is easy to understand. However frequency domains and state space can be better suited to do mathematical analysis, look at other answers for that.
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H: How low can I make the source impedance of a PIC16F887 ADC?
Microchip recommends 10K for the maximum source impedance of the ADC, but it says nothing about the minimum value. How low can I make the source impedance ? It is possible to damage something if it's to low ?
AI: You cannot damage it provided you don't exceed the pin voltage range, which is in this case from -0.3V to Vdd+0.3V.
You can guarantee that with a Zener diode (connected with cathode to the pin and anode to ground, rated the same as your Vdd is), but as long as the source itself gets the power from the Vdd rail (opamp?), it is not necessary.
The device itself has got clamp diodes at each pin (google CMOS input protection) which clamp the voltage to the supply rails, but better not try that, you could damage the MCU and/or its surroundings easily.
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H: Vhdl Error (10500) near text "when"; expecting ";"
this is the error: Error (10500): VHDL syntax error at Bin7SegDecoder.vhd(15) near text "when"; expecting ";"
It may be simple but I don't know what's the error.
Thanks in advance!
library IEEE;
use IEEE.STD_LOGIC_1164.all;
entity Bin7SegDecoder is
port( enable : in std_logic;
binInput : in std_logic_vector(3 downto 0);
decOut_n : out std_logic_vector(6 downto 0));
end Bin7SegDecoder;
architecture Behavioral of Bin7SegDecoder is
begin
process(binInput, enable)
begin
if (enable = '1') then
decOut_n <= "1111001" when (binInput = "0001") else --1
"0100100" when (binInput = "0010") else --2
"0110000" when (binInput = "0011") else --3
"0011001" when (binInput = "0100") else --4
"0010010" when (binInput = "0101") else --5
"0000010" when (binInput = "0110") else --6
"1111000" when (binInput = "0111") else --7
"0000000" when (binInput = "1000") else --8
"0010000" when (binInput = "1001") else --9
"0001000" when (binInput = "1010") else --A
"0000011" when (binInput = "1011") else --B
"1000110" when (binInput = "1100") else --C
"0100001" when (binInput = "1101") else --D
"0000110" when (binInput = "1110") else --E
"0001110" when (binInput = "1111") else --F
"1000000"; --0
else
decOut_n <= "1111111";
end if;
end process;
end Behavioral;
AI: You are trying to use a concurrent when-else assignment clause in a sequential process.
You can stick with a process and change the when-else clause to a case statement and decode that way.
Or you can move the assignment out of the process and modify the 'when' clause to first test for enable = '0' before all the 'when' tests on binInput. This is shown below and is a clearer expression than the process.
library ieee;
use ieee.std_logic_1164.all;
entity Bin7SegDecoder is
port(
enable : in std_logic;
binInput : in std_logic_vector(3 downto 0);
decOut_n : out std_logic_vector(6 downto 0)
);
end Bin7SegDecoder;
architecture Behavioral of Bin7SegDecoder is
begin
decOut_n <= "1111111" when (enable = '0')
else "1000000" when (binInput = X"0")
else "1111001" when (binInput = X"1")
else "0100100" when (binInput = X"2")
else "0110000" when (binInput = X"3")
else "0011001" when (binInput = X"4")
else "0010010" when (binInput = X"5")
else "0000010" when (binInput = X"6")
else "1111000" when (binInput = X"7")
else "0000000" when (binInput = X"8")
else "0010000" when (binInput = X"9")
else "0001000" when (binInput = X"A")
else "0000011" when (binInput = X"B")
else "1000110" when (binInput = X"C")
else "0100001" when (binInput = X"D")
else "0000110" when (binInput = X"E")
else "0001110"; -- (binInput = X"F")
end Behavioral;
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H: Line of switches on a breadboard
I'm connecting 8 switches on a breadboard, with a common ground (the already-connected line of the breadboard):
Problem: these switches are always on, like if the 2 pins on the common line make them pressed.
I thought that a solution could be to rotate 90° the switches, but then they don't fit on the breadboard anymore (one cannot use the common horizontal line for ground anymore).
I can't believe there isn't a natural solution to connect 8 such switches on a breadboard.
Is there a solution for this?
AI: Simple breadboard solution : Get your pliers out and bend up one of the grounded pins.
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H: Solder paste for stencil
I'm going to solder a small pcb with reflow process and I'd like to use a stencil for that because the components are too tiny for hand soldering iron.
The pcb has a QFN32 (0.5mm pitch and exposed pad), and some passive components, most of them 0402 and few 0603.
I haven't done this before and I wonder if there's some specific solder paste intended for stencil use.
This is the board.
https://github.com/jgabcgr/cc1310
Thanks in advance!
AI: Solder paste is designed for use with stencils. As long as you don't buy a cheap-o low quality paste, you should be fine. I heard a good description somewhere; good paste consistency should be that of smooth creamy peanut butter. For good results with a stencil, you don't want it to be too thin and watery (like when peanut butter separates), or thick and clumpy (like the bottom of the jar).
Clumpy paste will not spread properly over the stencil, and may clog and not remain on your PCB when the stencil is removed.
Thin paste will not hold its form after the stencil is removed, and may spread out, causing bridging.
Also remember; solder paste has a finite shelf-life that will be listed by the manufacturer. Typically this is 6 months to a year, if stored properly. Your results may worsen as your paste ages.
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H: Is it D-Type Flip Flop?
today I'm working on a new chipset named : "8-Bit Shift Register/Latch with 3-STATE Outputs" also referenced as "CD4094BC", and I've got the following logic diagram :
On this picture I know that the gate in the red square is a tri-state output, meaning that the output stay undefined if "output enable" input is false, else the output depend of Q1-8.
But there is some symbol that really looks like D-Type Flip-Flop (blue and green square), before I asked here how to know if it's a D-Type Flip-Flop or not and you answered me that it can be recognize by the letter FF in the square and the clock input and the D input. Here I see something that really looks like the D-Type flip-flop except the fact that some inputs seems to be misplaced and outputs are missing or not what I expected them to be. So, if they're not D-Type Flip-flop, what does this symbols mean exactly ?
Here is the truth table I got from the datasheet :
And I don't really get what the outputs value means...
Hi-Z is one of the problem.
Thanks
AI: Z means high impedance = "disconnected from the wires" This is the 3rd alternative to 0 and 1 in 3-state outputs. It's used to enable several devices to output their data to the same wires in their turns. 3-state outputs are the basis for the data buses in the computers.Output enable =0 disconnects the device. The red blocks are the 3-state capable buffers. They sometimes have enhanced long line drive capability, Standard logic family members do not have that capability unless otherwise stated in the datasheet.
The dual clock input D-like flip-flops (green) are not full D type flip-flops because they need a clock pulse and the same as inverted. The one inverter delay may have some role in its function. Anyway the resulted function is the same as a chain of D -FFs. The symbol is not standard. It follows manufacturers own conventions.
As commented already, one black connection dot is missing from the clock pulse distribution.
The upper row (blue) is a battery of D latches that keep the data stable when the lower battery is shifting its content to the right.
Latches are not triggered at the edge. Their outputs follow the D-inputs as long as the Strobe=1. The outputs freeze when the Strobe is swicthed to 0.
This IC is used to convert serial data to parellel and also to store one byte that is received one bit at a time from the serial input. Several IC:s can be chained.
This IC is still useful to expad the output capability of a microcontroller. Three of these chained give 24 outputs that need only 3 outputs from microcontroller. In many applications it's not harmful that the outputs can be updated quite sparsely, maybe only once in a millisecond.
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H: 1N5821 Schottky diode material
Is the 1N5821 Schottky diode made of silicon? Or is it composed of other materials?
AI: From the datasheet:
This series employs the Schottky Barrier principle in a large area
metal-to-silicon power diode.
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H: Reverse saturation currents of a LED?
What are the typical values of reverse saturation current of a LED? In particular is it possible to have a reverse saturation current of \$10^{-17} A-10^{-18} A\$ for a (red) LED?
For a silicon diode the typical values are \$10^{-9}A-10^{-12} A\$. Do LEDs have much lower reverse saturation currents usually?
AI: The materials used for LEDs have a larger energy gap than silicon so the reverse leakage is usually a few nA or less. The devices are often not tested for that parameter however as it is not important for normal use so the data sheet may show a much higher value
They also typically have a low reverse voltage specification - again this is because in normal use they are only subjected to a few volts of reverse bias (for example in a typical multiplexed arrangement they will see the forward bias of another LED).
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H: Can I just use one end of a differential op-amp ? (ie use differential op-amp as a single ended op-amp)
I found this awesome op-amp I can use which is super cheap and super fast (NE592D).
Unfortunately, it has differential inputs and outputs. I can probably deal with the differential inputs, but how can I convert the differential output into a single ended output?
Can I just put one end to ground? or to ground via a DC blocking cap? or even just not connect one side?
AI: You can just ignore one of the outputs if you only need a single ended output. Leave it open.
It is rather an antique IC, something like 4O years old. What characteristics of the amplifier are so good for your application?
You can't use it as a general purpose amplifier - it's bias current is high; its offset voltage is not very good. You probably won't be able to use feedback without stability issues.
There are probably better ones available now.
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H: Internal thermal limit of LF00 voltage regulators
Reading the datesheet of the LF00 voltage regulator series leads to a basic question to myself.
The basic facts at the beginning of the sheet telling me, there is a logic with an
INTERNAL CURRENT AND THERMAL LIMIT
inside the component. I was very interested in this thermal limit and tried to find out the concrete behaviour of this function. Unfortunately I found only a two relevant information of some temperature behaviour in the whole datasheet.
Operating Junction Temperature Range -40 to 125 °C
None of them helping me to understand the thermal limit of the voltage regulator. I also expected a strong surge of the voltage dropout at higher temperatures - but figure 2 is telling a different story.
So how is this thermal limit defined and how is the expected behaviour? Am I allowed to use the component without any heatsink and without need to worry about overheating (If a accept a shutdown at overheating of the regulator)?
AI: but figure 2 is telling a different story.
That is because figure 2 does not relate to the current limiting nor does it relate to the temperature shutdown.
This figure just shows the minimum dropout voltage you can expect at 500 mA over temperature.
Example 1:
At 80 degrees this dropout voltage is 0.5 V at 500 mA. So if the regulated output voltage of the regulator is 3.0 V then the input voltage needs to be at least 3.5 V when loaded with 500 mA and at 80 C.
Lower temperature will be OK, lower current will be OK as well (the minimum dropout voltage decreases with lower current).
Example 2:
If the regulated output voltage of the regulator is 3.0 V and the minimum input voltage to the regulator is 0.45 V then we can load this LDO with up to 500 mA if we keep it at a maximum temperature of 40 C. Less current will be OK, lower temperature will be OK as well.
Am I allowed to use the component without any heatsink and without need to worry about overheating
In principle yes but this is not a proper way of designing-in an LDO. What you need to do is determine the maximum power the LDO will drop. The maximum power is the largest current the LDO will need to supply times the voltage drop across the LDO.
Page 2 of the datasheet lists the thermal resistances for each package. Without a heatsink you need to take the junction-to-ambient value. For the TO220 case it is 50 C/W meaning that if the regulator dissipates 1 W it will get 50 degrees hotter than its surroundings. If the regulator would therefore become 80 C (the surrounding air is 30 C) that would be OK-ish.
If the regulator will heat up above 80 C I recommend a heatsink.
If you dissipate too much power without a heatsink the output voltage will drop and/or the regulator will shut down. In most designs this is unacceptable so why would your design be OK with that ?
Also if the regulator operates at a too high temperature for a long time you limit its lifetime and it might break sooner than expected.
In general it is not a good idea to not use a heatsink when one is needed. You will need to do the calculation. With a TO 220 case I'd only not use a heatsink when dissipation stays below 0.5 W or thereabout.
Even for 1 W you really should consider a small heatsink. If the product is in a metal case you might be able to use that case as a heatsink.
The thermal and current limiting function work as such:
The current limiting will lower the output voltage when the maximum current is reached. This is like a short-circuit protection.
The thermal limiting only comes into play when the chip gets too hot. Often if kicks in at around 125 degrees Celcius (that's very hot). It also lowers the output voltage which also lower the current and this will lower the dissipation of the regulator making it cool down.
I do not think this regulator shuts off completely when overheating, it is not that clear from the datasheet. What I describe above is typical regulator behavior, the regulator tries to deliver some power without getting hotter than it should. At the cost of a lower output voltage of course.
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H: Eliminating ghost voltage and breaking ground loops in a system
The above illustration is a setup I use where amplifier outputs go to a data acquisition system through BNC cables. The data acquisition system is earth-grounded. Mains system voltage Line to Neutral is 230VAC.
A1, A2, A3. A4 are force-transducer amplifiers(they output 0-10V DC signals) which are powered by an SMPS type 24VDC power supply(PSU in the illustration). As far as I found out there is a ghost voltage(when BNCs are not plugged/ when floating) between the BNC connector tips and the earth(marked as gray in the illustration) due to SMPS Y-capacitor leakage. This ghost voltage is 85VAC when the PSU is ON and 180VAC when it is OFF.
Even though this ghost/phantom voltage is safe due to microampere level currents, It causes a very unpleasant sensation. I want to eliminate or minimize it.
If I wire the DC GND of the PSU output to the earth the issue disappears, but then since the DAQ system is also earth grounded there will be ground loops.
My questions are:
1-) If I replace the SMPS with a linear supply, would the ghost voltage disappear? And if so, how can I be sure if the linear power supply I buy is 100% linear?
2-) In another forum, I read some suggestions which were wiring the DC output GND of the SMPS to the earth through a 100 ohm series resistor or using anti-parallel diodes. It was mentioned, one of these supposed to drain the leakage currents but break ground loops. Any idea about this work around and how to implement it?
AI: That ghost voltage is caused by the switch mode power supply's internal EMI reduction capacitors AND it is likely that the SMPS you have used either doesn't require an earth connection for safety or EMC reasons.
If the SMPS did use earth then it would route EMI reduction capacitors directly to earth instead. This would kill-off the ghost voltage you are seeing.
As an alternative, try earthing the negative SMPS output lead.
You should also consider operating the DAQ with balanced inputs so that any common-mode earth voltage problem is much alleviated. I know this means halving the number of avaliable channels (in some DAQs) but you will get better measurements and in the collection of telemetry information most of the industry I know of goes down the differential route if they can (even if the signals to be measured are single ended).
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H: Can this circuit drive directly a led ( or even supply a BJT )
I've this PIR board:
https://www.mpja.com/download/31227sc.pdf
the chip output has already a 1KOhm resistor in series, so, since the one voltage of the chip is 3.3 V I guess I could connect directly to a led without having to add another resistance. Is this true? I just want to use that layout for testing, then the signal would go to a micro controller I/O. Just for the sake of completeness, since there is the 1K resistor on the out, I should drive even a saturating BJT directly, without adding any other resistor, isn't?
Did try, it works, but barely visible so added the BJT without any addtional resistor on the basis.
AI: As you mentioned, you can directly drive a BJT if you wanted a high brightness LED.
However if you want to connect and LED directly in series with the output this won't be an issue as long as you select the correct LED. For example take this LED (I typed Red LED in Farnell and just grabbed the first one), now what you need to look at is not the tables but the graphs.
If you take the value from the table it says you're looking at a 2V to 2.5V drop across your LED, however this is only true at 20mA. You're going to be operating it at 1/10th of this current.
So let's take a look at the graphs.
At the 1mA to 2mA range we're looking at a 1.6V to 1.7V drop across the LED (much less than our 2V to 2.5V from the tables). If we take the voltage drop at 1.7V then that gives us a current of 1.6mA.
Now that we have a current value let's jump across to the second graph, we can see that at 1.6mA we're going to get roughly 25% of the luminous intensity than if we were running at 10mA.
From the table it says that at 10mA the luminous intensity (lv) is typically 50mcd. So if we use this LED in your setup the equivalent lv is going to be ~12.5mcd. I know that mcd isn't really a good measure of brightness but I don't know the equation to change it into lumens, I can however, say that it will more than likely be clearly visible.
As a side note, whilst this is all good in theory, it would be much quicker to follow FakeMoustache's initial advice of try it and see.
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H: Why ground plane is placed in helical antenna and how to calculate size of this ground plane?
In most of the helical antenna, I have seen a ground plane, what is the role of this plane and is there any size restriction for this plane? I am trying to design a helical antenna with minimum ground plane size.
AI: what is the role of this plane
Like a quarter wave monopole, a helix antenna with a ground plane can be driven unbalanced. Also, all the power transmitted goes mainly in one direction. For instance, if you converted a dipole to a balanced helix you would get transmissions along the centre line of the helix both forward and behind.
If this is something you might need then go for a balanced type helix antenna that doesn't need a ground plane.
If you still want a ground plane then making it too small will not give you the best efficiency and the power projected in the forward direction would reduce to be replaced with power transmissted in the reverse direction (unwanted).
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H: Advantage of using AC generators in cars instead of DC generators
Most cars use an AC generator then convert its voltage to DC via a bridge diode rectifier to charge the 12v battery.
Why wouldn't a DC dynamo be used instead?
Is it because AC dynamo gives better efficiency?
(Even bike and wind energy use AC dynamo/turbine).
AI: No, it's not for efficiency reasons.
DC generators typically have commutators, i.e. contacts with brushes that reverse the polarity of the voltage at the generator clamps every half rotation. In essence, DC generators are just AC generators that have a "mechanical" rectifier.
You can build generators without any electrical contacts between moving parts, but you cannot build commutators without those.
Since such contacts are very likely to fail under constant use, in dirty and vibrating environments, it's very desirable not to use them in cars. I'd also go as far as to say that unless you build a very expensive one, the contact resistance might be higher than what you lose over a bridge rectifier.
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H: DC block using microstrip line
While implementing an RF amplifier circuit, I came across the fact that micro-strip RF chokes are better for narrowband applications and easy to realize than physical inductor.
My question is whether it is possible to implement DC blocks using micro-strip line. If it is possible what are the formulae/relations I can use to implement DC blocks using micro-strip lines?
Thank you!
AI: Generally no, the capacitance you get from small gaps in microstrip lines is too small to be useful as a DC block.
If combined with a (relatively) large frequency selective structure like a coupler, then you can get DC isolation from input to output.
For a narrowband DC block, use a small cheap ceramic capacitor. For a wideband DC block, use an expensive large capacitor specified for the job, as cheap large capacitors tend to have high a frequency resonance that kills their performance.
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H: How does this transistor radio mixer work?
I recently picked up a transistor radio, a Unitra Nova 206. I've been studying the schematic with an interest in the AM operation for now. Most of it makes sense and I've included an annotated snippet below.
Looking at the transistor pair T3 and T4 you can see that the RF signal arrives at the base of T3 with the LO signal applied to the emitter of both T3 and T4. T3 seems to be producing the IF products typical of a super-het, but what about T4?
T4 has a fixed DC bias produced by detection IC UN1211/R11/R12 (about 3V at pin 2). The LO signal gets applied to the emitter, but no RF signal. What then is the purpose of T4?
More extensive schematics, etc. below.
Full schematic (apologies for image quality!)
http://www.elektroda.pl/rtvforum/topic1690084.html
http://www.datasheetcatalog.com/datasheets_pdf/U/L/1/2/UL1211.shtml
AI: T4 looks like a Colpitts oscillator - it's operating as a common-base amplifier, with positive feedback to its emitter from a winding on L9/L10.
That winding also drives the emitter of T3 which is both mixer and RF amplifier with the RF input on its base.
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H: Export Modelsim waveforms as image for printing
I want to export the Modelsim waveforms of my simulated design in a form where they can look decent when printed. To be more specific, without the black background, in a vector format preferably.
Not something like this:
But instead like this:
The schematics are indicative, but I hope you get the point. Is there any way to achieve that?
AI: in a form where they can look decent when printed
is a very subjective statement. Moreover, you can't really customize MSIM wave editor to display things very differently. Considered your question is quite broad, the simplest way I can think of is to import your wave in a waveform viewer you like better.
To export the waveform in a commonly usable vector format you can use the command line tool from vsim (2005 onward):
> wlf2vcd
> Usage: wlf2vcd [<Options>...] [-o <outfile>] <wlffile>
Which will convert your selected *.wlf file into a common value change dump file, holding all the informations you need.
(more on that https://en.wikipedia.org/wiki/Value_change_dump)
The source waveform (.wlf) file is commonly generated by any modelsim simulation and saved, when you exit vsim, under vsim.wlf unless another name was specified.
Once you have your waveform in .vcd format, you can import it in any waveform viewer of choice and style its display according to your preference.
You can check for viewers in https://en.wikipedia.org/wiki/Waveform_viewer , or you can even code your own, provided you understand VCD syntax.
Alternative
Unless you have to deal with plenty of waveforms, objects and processes, and instead make a functional waveform focused on a specific behaviour, I would reccomend using a simple wave editor to display what you need to.
My personal favourite when I have to export waveforms I analyzed to colleagues which wouldn't benefit from MSIM view, I go to http://wavedrom.com/ which is quick enough to make an effective (and -IMHO- pretty) graph.
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H: Can't I make 12V source to feed 12V motor?
I have a system which includes a Raspberry Pi, 2 a L298N module, 12V Battery source(8x1.5V AA) and a motor (a "PMDC Spur Gear Motor/KGA25RP")
When I connect everything right and run a simple program, only thing I see is a very low buzzing sound from motor while program running. Is my battery too low to move motor?
The code :
import RPi.GPIO as GPIO
from time import sleep
GPIO.setmode(GPIO.BOARD)
Motor1A = 38
Motor1B = 40
Motor1E = 7
GPIO.setup(Motor1A,GPIO.OUT)
GPIO.setup(Motor1B,GPIO.OUT)
GPIO.setup(Motor1E,GPIO.OUT)
print "Going forwards"
GPIO.output(Motor1A,GPIO.HIGH)
GPIO.output(Motor1B,GPIO.LOW)
GPIO.output(Motor1E,GPIO.HIGH)
sleep(2)
print "Going backwards"
GPIO.output(Motor1A,GPIO.LOW)
GPIO.output(Motor1B,GPIO.HIGH)
GPIO.output(Motor1E,GPIO.HIGH)
sleep(2)
print "Now stop"
GPIO.output(Motor1E,GPIO.LOW)
GPIO.cleanup()
Photos :
imgur.com/ujjtbIH,Db3ingN,gXR3vjL
I used Raspberry pi's 7(motor 2 enable),38(IN4),40(IN3)pins.
keytosmart.com/wp-content/uploads/2014/07/B_Diagram_large.png (Can't link more than 2 links.)
AI: Make sure your the ground on your RPi is tied to the ground of the driver board.
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H: Concurrency concept in VHDL
Regarding the concurrency of VHDL statements, I want to know how the following code is explained with concurrency.
entity foo is
port( a: out bit;
b: buffer bit;
c, d, e: in bit);
end;
architecture bar of foo is
begin
a <= b xor c;
b <= d and e after 5ns;
end;
Questions are:
Does a take the old value of b?
Is a going to be updated after 5ns due to the change in b?
Aren't these statements sequential?
AI: The short answer :
a will be updated in the delta cycle after either b or c changes.
b will be updated 5 ns after either d or e changes.
(Which triggers an update of a)
The longer answer :
These statements are not sequential, because they appear in the concurrent region.
Formally, each is equivalent to a process sensitive to all of its inputs. Therefore whenever an event occurs on any of its inputs, the process wakes up, performs the operation, and suspends.
The operation results in a "postponed assignment" on its output signal : that is, when this process has suspended, and ALL other active processes have suspended, THEN the assignment happens (or is scheduled to happen at some later time, as in 'after 5 ns`.
When the assignment happens (either in the next delta cycle, or 5 ns later) it causes an "event" on that signal, which schedules all processes sensitive to it to wake up...
So, signals are not just like variables, they are the inter-process communication and scheduling mechanism in VHDL.
More detail here... https://stackoverflow.com/questions/13954193/is-process-in-vhdl-reentrant/13956532#13956532
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H: Does triac used for on/off purposes need RFI suppression?
I noticed that in dimmer circuits using a triac there is a need for chokes to suppress RFI, Do on/off only circuits need the same?.. Please I need a detailed explanation or references to understand (not a yes or no answer)..
AI: Umm..how can I make this simple....
If you have a regular light switch and turn the light on and off, how much RFI does it make.... a bit, but not enough to worry about.
Now toggle the switch 100 to 120 times a second, depending on which part of the planet you live.... get the picture?
Dimmers work by doing exactly that at different points of cycle of the AC mains.
Each of those points in the waveform above where it switches off generate an RFI burst. This probably wont hurt the dimmer, but good luck listening to your AM radio.
As mentioned in the comments. Even using a triac as a switch, you are still better turning it on at the zero crossing point. It will create extremely little RFI, and also improve the TRIACs Life.
There is a suitable circuit here
Hot Line Switching Circuit
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H: Why base current changes with collector emitter voltage?
There are two questions in stack exchange similar to mine, but I though mine was more basic and also more specific.
I tried doing some SPICE simulations in order to understand transistor characteristics described here, but using a real transistor, i.e., 2N2222. I tried two circuits as shown below. As you can see, both circuits are very similar with Vbe, Vcc being exactly the same between the two. The only difference is that the one on the right has 100 ohms more between Vcc and the collector. I expected Ib to have the same waveform between the two circuits - but when I saw the simulated waveform, Ib on the right circuit (blue color) seems to different from the Ib of the left circuit (green hiding behind the blue signal for the most part). The red signal is the Vce of the left circuit and the blue green signal is the Vce of the right circuit.
What I have read in many books, literature online (including the one I have referred here), is that Vce has no effect on Ib. And yet, my observation is different! Can anyone kindly explain this strange behavior of Ib? Many thanks in advance.
AI: When you saturate Vce (down near zero), the transistor's current gain drops greatly. So the base-emitter junction becomes "just a diode". Green curve hasn't quite reached Vce saturation. Blue curve ventures into saturation.
Perhaps you are trying to investigate the "early effect" as G36 has suggested. This effect addresses a linearly-operating transistor. While your circuit is driving this transistor hard, the green-curve drive is at the very upper edge of linearity. The blue-curve drive is over the edge of linearity.
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H: Problem with testing 74ls173AN D flip-flop
I'm building a simple 4-bit computer (a Nibbler) from 74 series ICs on a breadboard. Right now I'm working on 74LS173AN IC registers. I can't make it work. I have connected the input enable (pin 9,10), output control (1,2), and clear (15) to ground and some data inputs to vcc. The output pins (Q1-Q4) are connected to ground via LEDs. I'm simulating the clock signal by swithing a tact-switch on/off (with ground connected by 10k resistor and direct connection to VCC.
I tried different connections and searched web (many hopes with https://www.youtube.com/watch?v=9WE3Obdjtv0&t=14s, but it didn't help). Nothing works. I suspect there might be a problem with clock signal, but I would really appreciate the opinion from an experienced electronic specialist.
AI: A number of tips about dealing with (LS)TTL:
1) Inputs should be either grounded or pulled high with a 1k pullup resistor.
2) Output LEDs should be connected to +5 with a 1k pullup resistor. And yes, this will produce a signal inversion in the sense that a LOW output will turn on the LED.
simulate this circuit – Schematic created using CircuitLab
3) You must decouple the power pin. Connect a 0.1 uF ceramic cap from pin 16 to pin 8, and don't use jumpers - plug the leads directly into the breadboard at the IC.
Make sure you test the LED polarity by unplugging the IC, applying power, and grounding the output contact. If the LED doesn't light up, it's bad or you've got it backwards. When you've checked out the LEDs, turn off power and plug in the IC.
Otherwise your circuit looks OK with one exception. You've missed the part in the Youtube video where it is pointed out that TTL inputs float high if no connection is made, so your circuit really ought to be turning on ALL the LEDs, not just the 2 that are connected to +5. With proper LED connections, leaving the inputs floating or pulled high should result in all LEDs being off.
Finally, using a switch to generate a clock to a flip-flop is fine for what you're doing now, but anything more complicated will require debouncing of the switch.
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H: Is perfboard generally lead-free?
While shopping for perfboard/protoboard, the only products I've found listed as RoHS are brand-name items, costing several times that of the generics.
Is perfboard/protoboard inherently free of lead, etc? Or should I pay up for the name-brand boards? (I work on project with my children, hence my desire to avoid lead.)
AI: If the perfboard is tan colored with copper pads, there shouldn't be any lead there as perfboard is fiberglass and epoxy and if you can see copper pads, that's just copper. That is inherently lead-free.
On the other hand if you see a perfboard that is tan colored and has silver looking contact pads, and it isn't marketed as RoHS, then it likely has lead in it.
Overall, many things are inherently lead-free, they just haven't bothered to go through the RoHS certification process so they may not have a RoHS tag on them.
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H: Is it possible to create a homemade programmer for PIC16F84A?
Is this simple circuit able to program a microcontroller? Or Does it need any other components?
After looking at this question, I can know where D+ and D- of USB cable are, by looking at the colours of wires.
After reading datasheet, I think that D+ and D- should be connected to pins 13 and 14. But I don't know which one I should connect to which. for eg. should I connect pin 13 to D+ or D-? If I connected them in a wrong way by mistake, Does that damage the microcontroller?
What is the best software to communicate with this circuit? I want windows to recognise or add this new hardware without getting in troubles.
simulate this circuit – Schematic created using CircuitLab
AI: The circuit diagram in your question is nonsense. The PIC16F84A does not support USB, so connecting a USB cable to it won't do anything useful.
The connections you've come up with are doubly nonsense. Pin 14 of the PIC16F84A is VDD. Connecting D+ to VDD will tie it to your power supply. If you are using the 5V supply from the USB cable, this may damage the USB host device.
If you want to program a PIC part over USB, you need to buy a USB PIC programmer. This is not negotiable. You cannot build one out of a USB cable; it requires active components.
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H: Define Pins For Use By a Library xc8
I've got some code i'd like to use in multiple projects so i'd like to put it into a library
The library will use no special features of the chip and whichever two pins it uses to do its job only have to be general I/O
As I plan to use this for multiple projects, these projects will have to specify which pins these two pins are on a project-by-project basis
My question is how I can set up my library and code in each project so that I can define which pins I want to use within each project - independent of the library.
Using XC8 compiler for PIC10s and 16s
Any guidance appreciated
AI: I don't know if that changed recently, but a year ago or two I contacted Microchip technical support who confirmed that XC8 doesn't support libraries as such.
What you can do is have the C file in a "shared" folder and include it in the various projects.
The pins can be:
defined by macros (#define) either in compiler options, or in a header of a predefined name e.g. "hardwareconfig.h" which your module would include and the projects supply;
supplied at initialization by pointers to LAT/PORT registers and masks of the bits;
your module could declare functions for the low level pin handling, call those, and the various projects would implement them as they see fit.
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H: How to troubleshoot non-working RS232 to USB connection
I have bought a RS232 inclinometer and a FTDI USB to RS232 cable.
The inclinometer spec sheets states:
RS232 full duplex communiction
Supply voltage 4.9 - 15V
Wires:
Red: +ve
Blue: ground
Yellow: RS232 Tx
Green: RS232 Rx
The USB cable specs:
Supply voltage 5V
Wires:
Black: Ground
Brown: CTS#
Red: Power
Orange: TXD
Yellow: RXD
Green: RTS#
I have connected them as follows:
USB cable Inclinometer
Red < - > Red
Black < - > Blue
Orange < - > Yellow
Yellow < - > Green
When I plug in the USB cable and try to access the inclinometer, I get only a blank screen. I have tried using the terminal (screen /dev/tty.usbserial 9600), I have tried CoolTerm and I have tried the inclinometer software provided by the manufacturer. All methods just show me a blank screen, without data.
How can I troubleshoot this issue?
AI: TX and RX (transmitter and receiver) in UART/RX232 are usually denoted from each device's point of view. It means one needs to connect TX wire to RX at the other side and RX to TX at other side. According to your description, you are connecting both RX together and both TX together, which is wrong.
Usually you can double-check in datasheet/specsheet if particular pin or wire is described as output or input. The FTDI manual mentions that orange (TXD) wire being output and yelow (RXD) input. I do not see any similar explicit info in the inclinometer's datasheet, but in the absolute majority of cases TX wire is output and RX input. And it is usually no good idea to connect two outputs together.
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H: Logic value of a single input pin into a microcontroller
I'm trying to get the logic value from a node in a circuit (it is the output of a comparator that can either be 0V or 5V) into an AT89S51 microcontroller. My program just tries to get the value of pin P0.0 into the accumulator (considering that 5V would be 1).
Assembly code:
org 0x00
mov a, p0.0
end
but it is giving me the error
ERROR #13 test.asm: Expression is wrong type.
I tried searching for a way to do this but couldn't find any reference on why it is not working.
How can I get the value of the input pin P0.1? I thought of getting all of the P0 port and just check if it is #00000001b. But this limits my action since I'm obligated to have all other pins of port P0 to L.
AI: Generally, if the MCU has no mechanism of reading just one bit, you read the whole port and mask off the irrelevant bits you want to ignore to zero and then compare if the remaining bit makes the result zero or non-zero.
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H: What is the purpose of the Zener diode in this relay coil circuit?
It is clear that the ordinary diode is the usual flyback diode that dissipates the energy stored in the coil while it is turned off, but what could be the purpose of the Zener diode?
I think the main effect of it would be that a significant reverse voltage spike occurs at the relay coil during turn-off, but wouldn't this spike be counterproductive for a fast turn-off because the relay has no polarity and will stay magnetized during the spike?
This answer seems somehow related, but there the Zener is at the switching transistor and not in parallel to the coil. Is the function the same (dissipate energy faster at higher voltage?)
AI: what could be the purpose of the Zener diode
With the Zener diode bypassed, the time taken to discharge all the magnetic stored energy from the relay coil via the diode can be several ten of milli-seconds. During most of this period, the relay may stay energized enough to hold the contacts closed.
However, if you insert the Zener, it will burn-off that stored energy in a much quicker time and the relay will deactivate much more quickly.
So, if speed is a big deal you'll probably use a Zener diode as per your diagram.
The down side is that you get a bigger peak back-emf and, if you are switching the relay coil with a transistor, it needs to be rated accordingly.
The function is the same as per the answer you linked.
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H: Interfacing an old spectrometer with PySerial
I asked this question on the Engineering StackExchange and someone said it might be more appropriate here.
I want to interface an old Shimadzu spectrophotometer (Model UV-1601, manual here) through its RS-232C port, which is described in the manual in Fig. 12.2:
I want to use a USB Type C connection on my laptop, so I bought this adapter from StarTech, with the following pinout diagram:
Next, I used PySerial to try and communicate with the instrument. That's when things started to become difficult for me. The manual of the spectrophotometer gives the details of the serial transmission parameters:
The manual also describes an example protocol (although the code is in BASIC) to change the instrument wavelength:
In this protocol:
ENQ is 05 in hexadecimal
ACK is 06 in hexadecimal
EOT is 04 in hexadecimal
NUL is 00 in hexadecimal
w, 6, and 0 are interpreted as ascii caracters (for example 'w' is 77 in hexadecimal
In Python, I have a short program that opens the serial communications:
import serial
device = serial.Serial(port='COM4', baudrate=9600, bytesize=serial.SEVENBITS, parity=serial.PARITY_ODD, stopbits=serial.STOPBITS_ONE, timeout=.1)
Then, I use this line to send the ENQ signal:
device.write(b'\x05')
Now here comes the trouble. If I try to read the ACK byte with:
device.read()
It returns an empty byte:
b''
If I try to send the rest of the command it won't work. If I send the ENQ, and straight after send the command:
device.write(b'\x77\x36\x30\x30\x30\x00')
I hear the device moving the slit to the new position, but the screen of the instrument isn't updated until I send an ACK signal. Also, I cannot send another command until I send that same ACK signal.
My main problem is that I can't output the instrument data.
I want to focus on this small example to make sure everything is right first.
The BASIC program described in the manual is as follows:
100 'UV-1601 PC Control Program
110 DIMBUF$(32)
120 ENQ $ =CHR $ (&H5) : EOT $ =CHR $ (&H4) : ESC $ =CHR $ (&H1B)
130 NUL $ =CHR $ (&H0) : ACK $ =CHR $ (&H6) : NAK $ =CHR $ (&H15)
140 '
150 ' GO TO A
160 OPEN "COM1: 071NN" AS#1
170 FOR 1=0 TO 99: NEXT
180 PRINT #1,ENQ $;
190 IF INPUT $ (1,#1)< >ACK $ THEN 170
200 FOR 1=0 TO 99: NEXT
210 PRINT #l,"w6000" +NUL$;
220 IF INPUT $ (1, #1)< >ACK $ THEN BEEP : PRINT #1, ESC $;: GOTO 250
230 IF INPUTS (1, #1)< >EOT$ THEN BEEP: PRINT#1, ESC $;: GOTO 250
240 PRINT #1, ACK $; -o
250 CLOSE #1 O
260 END
Does anyone know why I can't seem to read the bytes from the instrument? Is it because of my RS-232C to USB C adapter, or is it related to PySerial?
EDIT: this is the cable I ended up making (this is the same wiring as suggested by @jonathanjo but with a female connector on the left-hand side to the USB adaptor and male connector on the right-hand side to the instrument)
With this cable, I could read the data from the spectro, but oddly enough, changing the wavelength still doesn't work as expected, but I guess I will live with that problem.
For those interested, this is a repository where I store my Python code for this instrument.
Thank you all :)
AI: Note that your device has non-standard wiring, as pointed out in comments, and in particular the signal ground. You'll have to ensure you have the three wires connected between your device and your PC as shown. The connections inside the PC connector (DTR to DSR and CTS to DTS) are optional and ideally should omitted if you ensure your program doesn't require them.)
At least one problem, the empty bstring, is caused by the timeout in your open call:
import serial
device = serial.Serial(port='COM4',
baudrate=9600,
bytesize=serial.SEVENBITS,
parity=serial.PARITY_ODD,
stopbits=serial.STOPBITS_ONE,
timeout=.1)
The 0.1 second timeout is evidently shorter than needed, and so read returns an empty string. You could just try making it longer, or putting a loop around.
From the manual for the serial module:
read(size=1)
Parameters: size – Number of bytes to read.
Returns: Bytes read from the port.
Return type: bytes
Read size bytes from the serial port. If a timeout is set it may return less characters as requested. With no timeout it will block until the requested number of bytes is read.
You'll need to have some kind of polling or much longer timeouts in order to get your data. You might find, with a slow-responding mechanical machine, that you can just put appropriate delays in
various places.
You might also have some need of flush to ensure the bytes are sent.
Edit: The following is the minimal cabling requirement as I understand it, and you need to make a little adaptor from two D-type 9-way sockets.
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H: 5V, 50 Ω input single pulse signal to an FPGA
I have a 5 V, 50 Ω input single pulse signal (<1 ms pulse width) going into Trenz TE0711 (operating @3.3 V and 50 MHz clock). Since the input signal is too high of a voltage, I am trying to find a way to reduce the voltage and keep jitter low (<1 ns). I also want it to be dummy proof where if someone puts in a high-voltage signal or an AC signal it doesn't fry the FPGA. I am not familiar with analog electronics, so I apologize if this is a simple question.
Currently, I am thinking of having a 3 V zener diode to act as a regulator and use a current limiting resistor (250 Ω) in front. However, I am not familiar with other components that may be out there that could meet my needs. I am concerned that zener diodes may have high jitter, but I just don't know. I am also worried if the 250 Ω resistor will cause a mismatch with the 50 Ω input signal and cause reflections.
Lastly, what would be the best way to test this? Could I use a delay/pulse generator and generate a 5 V, 50 Ω single shot pulse and just connect it directly onto my circuit that is on a breadboard and hook up an oscilloscope? Or, are there other ways to ensure proper and precise measurements?
AI: You have a 5 V signal that must go into a 50R termination resistance. You can use the below circuit. This reduces the 5 V to approx. 2.7 V, well above the 2.0 V min. for an LVTTL input HIGH and above the 2.3 V min (70% of 3.3 V) for LVCMOS.
Configure your FPGA input pin to be a Schmitt trigger, if it can. That will use an even lower logic HIGH threshold voltage.
simulate this circuit – Schematic created using CircuitLab
D1 protects the FPGA input pin from overvoltages by clamping the input to 0.3 V above the supply rail. D2 protects it against undervoltages by clamping it to 0.3 V below GND. Current limit resistor R3 reduces the overvoltage/undervoltage current to a safe level. You can modify the R3 value to suit the voltages it could be subject to. R2 will already load transients and dissipate them so it's continuous overvoltages that are the concern. When driven by a cable, it's a good idea.
A propagation delay is produced by R3, the capacitance of D1, D2 and the FPGA input pin, along with the tracking impedance. If this threatens your low jitter requirement, you can go without R3, D1 and D2.
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H: Fix for poorly designed class-D amplifier mute circuit
I recently made a PCB for a project with several class-D amplifier channels to drive small speakers for audio feedback. I included a mute switch which connected or disconnected one end of these speakers from ground. However, because all the negative terminals of the speakers are connected to the mute switch, the audio still sees a path to ground through the other speakers and their amplifier circuits. I realized after the fact this was a poor design choice, pretty obviously.
I am now wondering if there's anything I can do as a workaround without getting new boards printed. For this project it's important that the visual quality of the board does not get ruined in the process, so I can only make changes to the back of the board or under the speaker components. Within those constraints I'm open to cutting traces or hot-wiring stuff on the back as needed. Please advise, any help is much appreciated.
I get this is a strange question but felt that it was worth a shot. This was an expensive PCB run and I would prefer not to have to reprint. Please no punching down or criticism of the original design as obviously flawed or saying "there is no solution make a new board" (I realize my original design is bad, that is not my question, and these responses are not helpful).
Here is a picture of my badly designed audio amplifier circuit and the section of the board for reference:
AI: Here's a potential solution that I thought of. I can cut the trace connecting all the negative terminals of the speakers together, then solder two diodes with opposite polarity to each negative terminal, one connecting to the mute rail, and the other to ground:
^This circuit x 10, duplicated for all speakers
I was originally trying with a single diode in series, but this caused the class D amplifier to cease functioning since it disrupted the push-pull nature of the circuitry. With two opposite polarity diodes both going to ground the amplifier worked again, with the only cost being a very slight drop in amplitude. I realized that by grounding or ungrounding all the diodes of a given polarity I could accomplish the functionality of the mute circuit and also block any current from flowing back into the amplifiers.
Can anyone see a problem with this approach other than the slight volume drop? The sound is a square wave so distortion is not a concern.
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H: Altium Designer: Is it possible to detect PCB track router over cut in GND plane using DRC?
It is essential that high speed tracks have continuos ground plane with no cuts. This is essential to ensure signal integrity. That being said, can Altium designer use some sort of user defined design rules to check if a PCB track is being routed over cuts in the GND plane or too close to cuts or edge of the plane?
AI: I recommend looking into the "Return Path" rule, located under the "High Speed" heading. I think this is what you are looking for. This rule will let you know if your trace leaves its reference plane, such as crossing over a split.
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H: High reliability, automatic reset, enable switch
I am currently facing the issue that I am currently working on a subsystem for a high power industrial automation system. The panel of this subsystem consists of a lot of components, however here only a 3-position turn switch as well as a safety switch are relevant.
The desired function is the following:
whenever the 3-state turn switch contacts to its center contact I would like to turn the safety switch back to its off position. This is so that whenever the operator switches the turn switch from position 1 to position 3 or vice-versa the safety switch is reset into its off position and needs to be manually enabled again.
My question is: How would one go about automatically disengaging a safety switch mechanically in a reliable way? Any help would be greatly appreciated.
AI: An electro-mechanical solution is the standard method of achieving this using standard components.
simulate this circuit – Schematic created using CircuitLab
Figure 1. A possible solution.
How it works:
A 3-position, centre-off, 2-pole switch is required along with a START (or RESET) button and a relay (SAFETY) capable of switching the load.
When the switch is turned to POSN1 power is fed to the open START button.
When START is pressed SAFETY relay is energised and power is fed to LAMP1. The SAFETY relay is latched on by its own contact.
If the 3-position switch is switched back to centre position then both POSN1 contacts will open and SAFETY relay will drop out disabling the circuit.
Switching to POSN2 works in a similar fashion.
Note that very fast switching between POSN1 and POSN2 could mean that the relay doesn't have time to drop out.
simulate this circuit
Figure 2. A safer solution.
Figure 2 ensures that the safety circuits drop out when switching from 1 to 2. START(b) is a second contact of the START button.
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H: Same net overlapping pads ok?
I'd like to keep the option between components with slightly different footprints. In this particular case it's tactile switches with either 6.5mm or 8mm distance between legs. It looks ok to me but I'm not sure if there are any contradictions. Are there?
Update, yeah it works.
AI: This is generally fine as long as you obey the manufacturer's minimum hole-to-hole spacing rule. The Design Rule Check (DRC) of your PCB software will tell you whether you've violated those rules anywhere. Note that for this to work, you'll of course have to look up the manufacturer's design rules first and enter them into the software. In the KiCAD PCB editor, which you appear to be using, you can do this with the PCB configuration button in the top left corner of the window:
If DRC passes with the correct ruleset, you're pretty much good to go.
As mentioned in a comment under your question, the leftmost red trace might be a little unhappy being so close to the through-hole pad. (Unless it's on an inner layer.)
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H: What is the purpose of the R-divider in a String DAC?
I'm not sure if this is duplicate but a String DAC model is always shown as follows:
And R-divider is equal to the sum of the DAC resistors below it. And to compensate that a gain of 2 is used at the opmap.
But why not omitting the R-divider completely and use gain of 1? Would that yield the same result? What is the purpose of the R-divider in such String DAC?
AI: Appears a "string DAC" uses a one-of-N decoder and only one switch is 'on' at a time.
One good reason to use a Rdivider and x2 is that the op-amp inputs then need not handle common mode voltage equal to the supply. That makes the op-amp less expensive to build and better (more linear) performance since you don't need to have two front end transistor pairs and transition between them (where Vos tends to vary, affecting linearity and perhaps even monotonicity).
Okay, the TI web page where the OP apparently clipped the image does provide the same explanation as I have.
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H: MOSFET transistor replacement for Proform T7 Treadmill
Treadmill motor turns for a second and immediately stops. After researching issue, looks to be a blown IRFP250M
IOR P039J 20 8J.
My question is, I'm having trouble finding a replacement that includes the numbers after the IRFP250M. Are those numbers important or are they simply related to a specific manufacture. Any recommendations on a replacement?
Best Regards,
Billy
[picture of transistor]
AI: The data sheet indicates that the P means lead free. The rest on that line is a date code The lower line is an assembly lot code. These numbers can be ignored.
You can find IRFP250M on-line although Mouser and Digi-key appear to be out-of-stock.
Infineon makes these now so check their website for sales info.
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H: How to increase a mic output level?
I have an old lapel mic that outputs a signal that is way too small for most applications. In my attempts to learn electronics I started analyzing it and reading about the subjects. Still, I'm left with more questions than answers.
The first surprise to me was the way its circuit is built. I'm including a schematic below. It seems to be reversed in many ways: the output of signal that I've seen usually coming from between the mic and resistors is connected to the sleeve of the plug (shouldn't the sleeve be ground?) and the coupling capacitor couples the tip to ground (?).
One other problem I noticed is that the plug itself presents a high resistance between its wire connectors and tip. This only affects the tip. The resistance between the solder point and the tip is 40Ω (with the best connection to the tip I could make). I find this to be a problem but since nothing is making sense to me in this circuit I'm doubting myself in regards to whether I should replace the plug or not.
I also analyzed the output with an oscilloscope to grab some measurements (I made a connection to the wires since connecting to the plug means a much weaker signal). It works, although I'm puzzled by the negative bias. Shouldn't the mic be completely AC?
Later I plugged it into my computer audio interface. Again — it works, although it needs a lot of amplification. While doing this I noticed the interface affects the bias of the microphone.
Summing it all up (in multiple questions, which I know is not ideal):
Is this circuit designed properly?
Should I replace the plug? My goal is to get a stronger signal.
Is the negative bias normal?
Why does plugging it into the interface affects its bias?
Note about C1: Since it is old, I also considered the possibility of this capacitor being defective. My results after testing on the LCR meter indicate an ESR of 2.9Ω and 8.3µF, @ 1kHz as well as a phase of -81º.
Whistling a tone:
Quiet:
AI: As long as DC current flows the right way through the microphone, it doesn't matter which side you place the biasing resistors. The microphone drops maybe 0.5V, leaving the remaining 1V across the resistors, and that's all that matters.
Due to this being battery powered, the signal leaving this system is completely isolated and single ended. It doesn't matter which side of the signal is carried by core or sleeve, electrically there's no difference.
It would be an important consideration if the output were two differential signals, in which case those signals would be carried on cores of the cable, and the shield/sleeve would be grounded at the receiver. It would also make a big difference if this unit, and the amplifier it's connected to, shared a common ground. Then you'd be daft to use the core as ground, defeating the purpose of the cable's shield.
It is unusual to see the capacitor connected to the battery terminal, but again, in this single ended, isolated system, it is electrically no different from placing it in the path from microphone output. I suspect that the main design consideration here was ease of construction, rather than conformity with convention. It may have been easier for the person building this to connect the capacitor to the battery terminal, rather than the microphone.
Also, since the signal at the junction of R1 and microphone is fluctuating equally with respect to DC on either battery terminal, it doesn't matter which side of that DC source is considered "ground". In fact, you might even say that it's the output that is ground, DC, and that it's the battery terminals that are going up and down. The two perspectives are equivalent in this simple circuit.
The output impedance of this system is \$R_1 + R_2 = 2k\Omega\$. An additional 40Ω of cable/connector impedance is not going to make much difference to output amplitude.
If connecting a load to this output causes the biasing state of the microphone to change, that's due to DC leakage current via the capacitor. As long as the junction between R1 and the microphone stays well within the 0V to +1.5V range, its impact on output fidelity/amplitude will be insignificant. You could use a smaller ceramic capacitor if this bothers you.
If you want to get a larger signal amplitude out of this microphone, then you'll need an active pre-amplifier, low noise of course. The classic TL061 and NE5532 were often used in this role, but you can search for a more modern, better device.
Here's a really basic one, using the TL061, running off a 9V battery, and having +20dB (×10) voltage gain:
simulate this circuit – Schematic created using CircuitLab
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H: White noise percussion resonating capacitor
I'm breadboarding an analog drum module from some 70s schematics. Experimenting with noise filtering, I've achieved a cool "resonating" sound but the result is a bit too noisy for professional recording.
The responsible is the 330nF capacitor to ground just before the pre-amp. Can anyone help me reducing the noise keeping the resonant effect? And, why this passive RC configuration is resonating like in a synth cutoff with resonance filter?
AI: @Andyaka Yes, that's the answer, thank you. A friend suggested me to
add that 100 Ohm resistor in series, and that mitigated a bit the high
freq noise.
Consider the notes I've added to the picture below: -
So, if you ignore the input and the virtual ground, what you are left with is a noise source on the non-inverting input being amplified by 300,000 ÷ 100. That's R63/R60. This is why you get a lot of noise at the output.
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H: \$I_{DS}\$ with constant \$V_{DS}\$ but switching \$V_G\$
How will the IDS graph be when it has constant VDS (increasing to 800 V then being constant) and switching VG (like a square wave 12 V) in a 1200 V 134 A MOSFET?
I am trying to use the MOSFET with 1200 V 134 A in a buck converter (800 V to 400 V). How should my IDS graph be when I am using a square wave (amplitude 12 V) for gate voltage and VDS to be constant 800 V? Should my IDS also look like a square wave that goes to 0 A or should there be spikes?
AI: You can see here how a Buck converter works in CCM:
The MOSFET, if driven correctly, can adjust the voltage output and the current flow of the coil.
In CCM the coil remains energized all the time with a current rippling.
I hope this is enough to solve your question. Feel free to ask more if you need.
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H: Controlling one relay with three LEDs - energize relay if any one of the three LEDs are lit
I have three 12V indicator LEDs which are the simplest way to see if one of the three circuits is 'ON'.
Only ONE of the LEDs can be ON at any given time. They all share GND and a controller sends POS to each, as it's activated.
I need to sink a GPIO pin on an ESP32S3 to GND when any one of the three LEDs are ON.
My thought was to use a 12V relay, with the OUTPUT connected to the GPIO pin and GND, so when the relay is energized it would sink that GPIO pin to GND.
On the relay input side my thought was to use the GND from the three LEDs, which is a common ground for the relay negative, and then connect each of the LEDs' positive through a diode, to the relay positive.
Anytime an LED was lit, it would energize the 12V relay connecting the output pins and effectively sinking the GPIO pin to GND.
Does anyone see any issues with this?
Will the diodes be sufficient to keep the other LEDs from being lit when one is ON?
Is there a better way to do this?
I also have access to a single 120V circuit and a 120V solenoid, that are live when any one of the lights are ON. I tried using a magnetic reed switch to sense the energizing of the solenoid but the reed was too sensitive or something and fluctuates rapidly on/off when the solenoid is activated. I was trying to stay as non-invasive as possible.
UPDATED - SCHEMATIC ADDED
simulate this circuit – Schematic created using CircuitLab
AI: A single 120 V AC relay, with gold-plated contacts, should do.
Here's the schematic.
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H: Question about my small solar panels
I have some small solar panels and I wanna build a project. My project includes the solar panels and a phone power bank that has input of 2 A. Right now I have the solar panels connected to each other but in a circuit that makes more Volts not Amperes. So the big white one has on the back a short circuit current.. Does that mean that if I wire the solar panels in a way to give more Amperes not volts and it generates more power than that Short Circuit Current (Lsc) it will be destroyed? By the way I tried charging the power bank (10000 mAh) with them set up to give more volts, it charged for 7 hours and lasted 2 minutes and 28 seconds.
Also I have another question... if lets say I have a product that needs an input of 1 A and lets say I generate more what will happen?
Power bank specifications are 5 V/2 A on everything.
Also I have connected them in series following the guide on this site:
https://www.alternative-energy-tutorials.com/solar-power/connecting-solar-panels-together.html
AI: So the big white one has on the back a short circuit current.. Does
that mean that if i wire the solar panels in a way to give more
Amperes not volts and it generates more power than that Short Circuit
Current (Lsc) it will be destroyed?
No, the short circuit current specification means the absolute maximum current you can get from that panel when you short-circuit its output, it means nothing more, and the panel will be fine even if you keep it short-circuited.
..i tried charging the power bank (10000mAh) with them setted up to
give more volts, it charged for 7 hours and lasted 2 minutes and 28
seconds.
Depending on the amount of light hitting the panel(s), you may have had 0.5A or less current out of the panels. Also you didn't include all the details (schematic, diagram, pictures) to give us a full picture of what exactly is going on in your case. It could be 10 different issues with your setup.
Also i have another question... if let's say i have a product that
needs an input of 1 ampere and lets say i generate more what will
happen?
As long as you give it the appropriate voltage, the current you can provide can be exactly what it requires or 1000 times more, the product will only take what it needs, and there should be no problems.
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H: Question on "Parts should be used within 5 days after opening." statement on component shipping package
I've been given the task of verifying a batch of ICs from a chinese broker, to see that the chips the company has bought are what the broker claims they are. The package we've received looks like this, and has this statement (amongst others) on it:
"Parts should be used within 5 days after opening".
Why is this recommendation given? The shelf life of the ICs has to be much greater than 5 days right? And how critical is it for me to follow this statement?
AI: The parts can survive well beyond 5 days. However, the component is moisture sensitive. And if you don't store it well (in a well-controlled environment), it could cause SMT assembly issues such as dry soldering.
There are other methods that you can use if you have to use if after a prolonged period post opening the package to reduce such assembly issues. A common method is to do baking where you keep the component in a special oven at a set temperature for a certain duration. Temperature and duration depend on components. This can reduce the number of failures during mass manufacturing.
If you want to use it for prototyping using manual soldering, the impact will be less but if you are planning to use such components for mass manufacturing at an EMS, then better to consume fast once the package has been opened.
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