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H: Power of a controlled voltage source I'm learning a bit about controlled sources and I'm a bit confused about calculating their power. I have this circuit. Link to Falstad Simulation According to the formula for power P = U * I, I get PR1 = 1.033W PR2 = 0.318W PR3 = 0.204W PRSum = 1.555W The voltage source is outputting Psource = -1.607 W The controlled voltage source output / takes? Pcv = (+/-)0.051W? Normally the the sum of all powers equals to 0 But if I assume the controlled voltage source as a power "provider" it just doesn't add up. So the controlled voltage source has to be a power sink just like a resistor? Is this assumption right? If yes why? AI: It is quite possible for an ideal voltage source or an ideal current source to consume power in a circuit. It's very important that you understand what these ideal sources do. You should think of them as constraining a voltage or current to have a certain value. If you think of them as creating voltage or current, or limiting voltage or current, then you will get confused in situations like this. For a simple example, suppose we are charging a battery from a bench power supply. If we drew a rough schematic, both of these would be modeled as ideal voltage sources, even though the battery is consuming power. The battery constrains the voltage at its terminals to be some value because of the particular chemical reactions going on inside of it.
H: Reduction of the harmonic currents in LCC HVDC systems Why there is a reduction of the harmonic currents in the AC side in an LCC HVDC system? Here is represented the AC current in yellow, in red the DC voltage and the sinusoidal waves are the AC voltages. As you can see, the AC current is not a simple step but is smoothed. Why has that behavior? AI: That is incorrect to assume the current is sinusoidal. Current is defined when rectifier conducts when VHDC is less than VHAC ie. when the rectifiers are forward biased. Knowing Ic=Cdv/dt and Resistive damping results in ripple . I do not know the ripple specs but for 10% ripple induced the current crest factor Peak / average is 10x. More rectified phases raises the average so the crest factor ratio and harmonics reduce. The line impedance affects conduction pulses so reactor filtering is required and harmonics are now > 6x line frequency must be controlled. This may include notch filters near the 11th or 12th harmonic. Anecdotal I am not an expert in HVDC yet this observation comes from fundamentals. (I am an expert in PD however on HV transformers and stuff alike) When I was a student in Winnipeg, I used to vacuum the ceiling of the 7 story scaffolding inside Dorsey HVDC station to remove construction dust (very low levels already) with portable battery backpack vacuum machines to do the ceiling. This was to reduce the risk of Partial Discharge(PD). I also operated the wet-vac floor cleaners and applied concrete sealer daily. At that time English Electric was the primary contractor and they used Mercury valves 2m tall to operate as inverters.
H: SinePWM - Modulation Index calculation for a 3phase igbt inverter with ac load For a project I have to create a simulation of a 3 phase IGBT inverter with SinePWM (in Plecs) with a AC load Udc = 650V; cos(phi) = -1; I_ph = 500A; Uun/Uvn/Uwn = 230V; So I calculate my SinePWM modulation index like this 2230Vsqrt(2) / Udc whitch should be like 1.0008 a little bit overmodulation. Is that right? Someone in my group noted that we have to use sqrt(3) aswell as its a 3 phase system and wants to multiply it so we get like 1.73 wich is waaaay to overmodulated. Thanks! AI: The modulation index is something you impose, yourself. What you're calculating is the maximum (peak) value of the sine for a 100% modulation. For example, if m=0.9 (90% modulation) then for your Udc = 650 V the peak sine would be m650 = 585 V. You have a 3-phase application, so the phase to phase (LL) RMS value will be m650/sqrt(2) = 413.7 V, and for the phase to ground (LN) the RMS will be m*650/sqrt(6) = 238.8V.
H: current path into the ground? Considering a monopolar HVDC system, with the ground as the return path. I was wondering if the current path is physically speaking like the red one or the green one in the picture? I think it is like the green one, although if there are living beings in the middle, they can be thunderstruck by the current. The green one considers that the earth has a charge. (It's strange to say that nobody has explained me this thing until now, and I'm a student at Politecnico di Milano, I'm following the Smart grid path and I am in the fourth year. Unluckily, these such things usually are not explained.) Do you know the answer? AI: It's the red one. And actually you can have big potential differences on the ground. In the case for example of very high voltage powerlines fallen in the ground, you can actually get electrocuted by just walking close to them, as the potential difference between your two feet could be high enough to create a path through you. For electric charge to flow you need a close circuit of some sort and a potential differential. The ground being a potential path. One could imagine the ground to be ionized to some extent, as your green drawing, but that would be minimal.
H: Frequency of the standard battery discharge curve What can we say about the frequency of the discharging battery? You know that batteries, for example Li-Po, have a characteristic charge and discharge voltage curve. And under a certain rate of discharge and a certain load, the voltage drops for a time, for example from 4.2 V to 3.7 V in 1 hour. I wonder how can we calculate this frequency? The change can be very slow but imagine a battery goes 4.2 V to 3.7 V in a second and we measure the voltage with an oscilloscope. AI: Imagine as I have demonstrated in prior answers that a Li Ion battery has at least 2 time constants of a main capacitance of around 10kFarads and 50mOhm ESR depending on the C charge max rating. Where C is not capacitance but inverse to the ESR such that the max charge rate in 1hr is C times the Amps for a given Ah spec. Now realize some batteries have more “memory” than others such that a longer time constant ESR2 * C2 = Tau2 is the recovery time from a pulsed short circuit greater than 10kF ESR(=~50mOhm)= 0.5s this can be dangerous if temp rise causes thermal runaway and explosion so don’t try it, yet you know a shorter duration has some memory just like all e-caps (see Maxwell’s specs) and more dominantly on all double-layer electric supercaps, both have some memory to an instant change in current, so the frequency response of impedance from 1kHz to 1 cycle per hour so the impedance will change. (Still with me?). Ultimately it is the internal Temp rise and voltage dependent chemical “corrosion” factors that determine wear-out. Rather than use a very slow sweep generator to measure the “frequency response” use dV/dt = Ic/C to measure the capacitance and watch it rise with ESR as the battery depletes and more rapidly below 10% where any prudent Battery abuser often goes past.(and marketting types who want to boast about their high capacity. So Amp hours with thresholds for CV and cutoff voltage can be directly correlated with this ultra-capacitance and ESR. Also study the dI/dt during CV charging to measure the effective change in C and ESR with pulses. C increases marginally as ESR reduces marginally as stored charge increases only slightly (10%) at 4.1 vs 4.2 vs 4.3 for CV. Cutoff is often designed from 5 to 15% of the CC level to either gain slightly more capacity at the expense of greater loss in life expectancy. WHat is more important than the frequency of recycling rated say 500 cycles as the temperature rises of the cells which degrades lifespan 50% or so for every 10 degrees C rise of the internal junction (Arhennius Law) but that overcharge CV >4.0 and undercharge <xx% SoC also degrades cycle counts for useful life. Reading from Battery University, I recall if you had 2 sets of batteries instead and only used 1/2 of the rated capacity from 90% to 40% SOC you will get 10x the charge cycle life span or 5000 cycles and keep them in a state of 60% for long periods when not in use like Lenova does on the battery power management options when leaving a laptop charger on all the time. (Thus being powered by the charger instead of floating between 95 or more and 100% which might get you <5 yrs if lucky.) Thus the frequency of charging depends on your budget for getting the max Ah performance and the cycle count of life expectancy from temp rise and over/under charging. Also learn how to measure ESR for different currents as this changes due to the double-layer effects from the primary and secondary ESR C equivalent circuit. In reality there are more than 2 parallel RC circuits, but I have digressed long enough.... Sorry if I lost you after the 1st paragraph, (lol) but I am addressing a wider audience.
H: What's the intuition for reading transistor/resistor circuits? The below circuit supposedly provides constant current to an LED. I tested using everycircuit.com and that seems correct (used R = 70 ohm for example). What's a step by step way of thinking about the flow of electrons in such a circuit? How can we tell it would provide constant current for instance? AI: What's a step by step way of thinking about the flow of electrons in such a circuit? How can we tell it would provide constant current for instance? The first step is to forget about flow of electrons. Think about conventional current flow from positive to negative or ground. This is the way we (nearly) all do it and why we draw the positive rail at the top of the schematic. Understanding electron flow has its uses but not for general circuit analysis. Note that the arrows in diode and transistor symbols both show the direction of conventional current. Assume that both transistors are off initially. Now figure out what might get turned on. It's not going to be T1 initially as there is no current to the base. T2 has a feed to its base at (1) via the 2.2 kΩ resistor so it will turn on. As T2 turns on current will flow from the collector and through R. The LED will start to glow. The voltage at (2) will now start to rise. When it gets to about 0.6 or 0.7 V T1 will start to turn on. T1 turning on will start to steal the bias from T2 and the circuit will settle with 0.7 V across R. If the voltage on R goes up T1 will steal more bias. If it goes down T1 will turn off a bit. The current through the LED will be \$ I = \frac V R = \frac {0.7} R \$.
H: I'd like to know if I can push 40 volts at 3 amps through an IRLZ44N MOSFET? I already have the datasheet, it states it can handle 50 volts at 50 amps but I'm worried about spikes since I'm using it to switch the primary side of the transformer at 70 Hz and it will be a square wave signal, so my concern is won't it over heat quickly since I'm near the 50 Vds point? And won't the 3 amps just make things worse? AI: It can't handle 50 volts at 50 amps, that would fry it immediately. It can handle either 50 volts or 50 amps. 50 volts when turned off (Vgs < Vth) and 50 amps (in pulses only, or with extremely good heatsinking!) when turned fully on (Vgs >> Vth). If you're using it at 40 V, it should be perfectly fine. 40 V at 3 A is quite a bit of power, however, and you'll probably need liquid cooling for that much heat--that's 120 watts, more than your average CPU! Most likely, what you mean is 40 V when the FET is off (which is well within its rated 50 volts) and 3 A when it's on, which is (very!) well within its rated 50 A. If turned on hard enough, which for this FET is at a Vgs as low as just 4 volts, the power dissipation will be \$R_{ds,on}·I_D^2 = 315\ \mathrm{mW}\$, using the \$R_{ds,on}\$ at Vgs = 4 V found in this datasheet. This is low enough that you could probably get away with not using a heatsink at all, especially if it's pulsed.
H: Coarse counter giving incorrect pulse length measurements at high frequencies I am using a simple counter to measure pulse length. I have copied the code below, but the counter increments by 1 at each positive edge of the clock. Once the counter is done incrementing for that pulse, the current count is multiplied by the time period to get the pulse length. I assumed that increasing the clock frequency would give a more accurate time measurement since the period is smaller. However, the measured values at high frequencies are becoming less accurate, especially for longer pulses. Any idea why a 400MHz clock would give a worse pulse measurement compared to a 200MHz clock? I thought 400MHz would perform better since it's period, and maximum error, is 2.5ns while the 200MHz clock has a period of 5ns. ///////////////////////HDL counter code for 400MHz clock/////////////////////// module count ( out , // output of the counter in_1 , // input signal clk , // clock input reset // reset input ); input in_1, clk, reset; output out; reg [15:0] out; reg [15:0] counter; always @(posedge clk) if (reset) begin counter <= 16'b0 ; // if reset is high reset the counter to 0 end else if (in_1) counter <= counter + 1; else if (in_1 == 16'b0) begin if (counter !== 16'b0) begin out <= 2.5counter; end counter <= 16'b0; // reset counter once the input signal returns back to zero end endmodule ///////////////////////Testbench with 400MHz clock/////////////////////// `timescale 1ns/100ps module count_tb; //parameter SYSCLK_PERIOD = 20;// 50MHZ reg clk_1; reg in_11; reg reset_1; wire [15:0] out_1; initial begin clk_1 = 1'b0; in_11 = 1'b0; reset_1 = 1'b1; #200; in_11 = 1'b1; reset_1 = 1'b0; #1115.4; in_11 = 1'b0; #200; in_11 = 1'b1; #423.07; in_11 = 1'b0; #200; in_11 = 1'b1; #38.46; in_11 = 1'b0; #200; in_11 = 1'b1; #3076.92; in_11 = 1'b0; #200; $stop; end ////////////////////////////////////////////////////////////////////// // Clock Driver ////////////////////////////////////////////////////////////////////// always #1.25 clk_1 = ~clk_1; ////////////////////////////////////////////////////////////////////// // Instantiate Unit Under Test: counter ////////////////////////////////////////////////////////////////////// count count_0 ( // Inputs .in_1(in_11), .clk(clk_1), .reset(reset_1), // Outputs .out( out_1 ) ); endmodule ModelSim Waveform at 200MHz clock ModelSim Waveform at 400MHz clock Summary of Pulse Measurements at 200 and 400MHz AI: When I run your simulation, I measure the period of the clock as 2.6ns, not 2.5ns. You need to use a smaller time precision value. Change: `timescale 1ns/100ps to: `timescale 1ns/10ps With 100ps precision, the simulator rounds your #1.25 delay to #1.3. Since you really have 2.6 instead of 2.5, you get a large discrepancy because the multiplier in your calculation does not match: out <= 2.5counter; When I make the change, I see out_1 values of 1115, 423, 40 and 3078.
H: Set up STM32f1xx MCU for SPI communication in slave mode I set up an stm32f1xx MCU SPI for slave mode. How can I write in the SPI shift register that whenever the controller starts a full-duplex communication, the data written to the SPI shift register is transferred to the controller? AI: SPI2->DR is related to spi2 shift register, for example SPI2->DR = 36; write 36 in spi shift register and master can fetch this value Whenever it starts to communicate with slave
H: Driving Smart LEDs (integrated IC) at 24V I need the help of someone more competent at deciphering datasheets of obscure components. I am currently building an LED indoor light installation and would like to have hundreds (400-800) of individually addressable LEDs. The most straight forward solution would be to use the common WS2812 RGB LEDs, that however would entail using copper wires as thick as garden hoses to distribute the 5V power. I know there are also 12V LEDs out there, but 24V would be much better. After several weekend nights of research I have finally found a smart LED that might be up to the task and is pretty affordable at the same time, while not drawing incredible amounts of power doing nothing: IN-PI55TBTPRPGPB from Inolux (Datasheet) Now the datasheet is fairly readable to me, but I am missing some critical information here. On page 4 there is a property that is named as "R/G/B port pressure - VDS,MAX" and it states 24V. Does that mean I might be able to attach VCC to a 24V rail? The ratings for VCC are not mentioned anywhere. Every piece of advice is appreciated! AI: "R/G/B port pressure - VDS,MAX" and it states 24V. {actually 26V} Does that mean I might be able to attach VCC to a 24V rail? NO, That is the maximum Vds of the internal FET with open circuit programmed to draw no current or very little , otherwise meltdown. You must use 4.5 to 5.5V. Addition info 36mA max per chip x 5V = 180 mW needs ventilation on both sides or a 3 cm^2 copper substrate, so you may as well get the RGB string and cut into sections and use 48V power to distribute to 5.5v dropping to 4.5V at the end using the LM2956HV PCB’s from Banggood or the 24V to 5V 3A regulators $15cdn/10pc each driving 3A/36mA= Say <80 chips.
H: schematic design I have a demultiplexer and I want to design it. It is 1 in 2. It is not a multiplexer. What I did: Truth table. SW1 SW2 Out1 Out2 Sel In LED4 LED5 --------------------- 0 0 0 0 0 1 0 1 1 0 0 0 1 1 1 0 It is my first trial of design but I don't know if I design it right. SW1 = Sel and SW2=In. Out1=lnSel and Out2=ln~Sel . AI: SW1 SW2 Out1 Out2 Sel In LED4 LED5 --------------------- 0 0 0 0 0 1 0 1 1 0 0 0 1 1 1 0 Out1 = Sel AND In. Out2 = NOT Sel AND In. Figure 1. OP's schematic. You have LED4 = NOT Sel AND In. You have LED5 = Sel AND in. Your circuit is correct if LED4 is Out2 and LED5 is Out1. Lessons: Supply the full question. Draw a truth table. It is much better than words. Label everything consistently. On your schematic we don't know the purpose of the switches. They are not numbered and are not labelled. We don't know which LED is Out1 and Out2. You can simulate your circuit easily using one of the many online logic simulators such as https://logic.ly/demo.
H: Identifying the model of LCD for replacement for temperature sensor I want to replace a broken LCD with a rubber zebra connector in a "cheap" temperature sensor. There is no model or any data on the screen nor on the PCB. I'm looking for a replacement part. How can I identify it? UPDATE So my initial question was beginner and optimistic. I should have asked (myself) if the LCD is custom-made or not. Cuz custom-made is unlikely to be sold. I received two answered, both indicating that such a screen is custom made (the emoji was the best clue for that). So I would like to accept one of the answers. I attached photos of the broken and working one too: Broken display: Operational display: AI: It's 99.8% for sure a custom display with that smiley face, so any replacement would almost surely have to come from a cannibalized unit or from the manufacturer (not likely).
H: ESP32 and moisture sensor transistor switch I'm doing the classic water moisture sensor project with my ESP32, but I want to be able to switch the sensor on and off since that will reduce the amount of corrosion that occurs. Can I use a BC547 transistor as suggested below to achieve turning using GPIO18? I've also wired an LED in series to show when it's reading/not reading. Would I need the resistor if I didn't have this LED? Please be easy on me - I'm a beginner to all of this. CORRECTIONS (and removed the led): AI: Your proposed setup will not work, but the second (corrected) one will. Here are some issues in the first setup: Your NPN transistor is upside down. The emitter needs to be connected to GND and the collector to the GND pin of the sensor (the current path is from the sensor to GND). You can't put the LED and the resistor in the GND supply path of the sensor. They will prevent the sensor from getting the needed supply voltage between the Vcc and GND pins. The solution would be to put the BC547 in the right way, remove the LED and 220 Ohm resistor in the GND path and put a resistor of around 2.2K between D18 and the base of the transistor. The 2.2K resistor is for limiting the base current from the GPIO pin while assuring enough current can flow through the transistor. This way, your transistor can switch the GND current to the sensor on and off freely. If you need an indicator, you can use a different GPIO pin, and LED and a resistor to provide it. simulate this circuit – Schematic created using CircuitLab
H: When looking through a datasheet for a connector how do I find out which pin on the part does what? I was shopping for some aux connectors and when I found one that should suit my purpose I checked the data sheet. Now I am unsure how I can figure out which pin on the part does what. I looked at some other data sheets and was unable to find which pins do what. Here my question, how do I find out which pin on the part is for example used for ground? Here is the data sheet of one of the aux connectors I was looking at. Here is the link to the data sheet: https://www.farnell.com/datasheets/3164267.pdf AI: The data sheet extract you have shown gives pin numbers but no diagram of the pin functions. Examination of the remainder of the datasheet doesn't reveal any further information. Your best option is to insert a 3.5 mm stereo jack into the socket and determine the pinout by continuity test. Figure 1 and 2. From here. Since there are four terminals there may be a mic contact (4-pole connector in Figure 1) or a switch contact that closes to indicate that the plug has been removed (a cut-down version of Figure 2). You can determine this by continuity test also. I think it might be worthwhile to point out to them that their datasheet is lacking some basic information. I was buying their jack plugs and sockets over 40 years ago so they're on the go a long time and have some reputation to maintain.
H: Harmonics produced by LCC converters Considering an LCC HVDC system and that the flow of power is ALWAYS in the direction shown in the figure. I know that converters in general produce harmonics. My questions are: Does this HVDC system produce harmonics only in the DC side in the middle and in the AC side circled in green? Doesn't it produce harmonics in the AC side circled in red too? I think not, but if the converters produce harmonics also in the AC side circled in red, why and how it do so, since that waves enter the converters and not the contrary? Is the aim of the DC filters on the DC side to create a straight behavior of the voltage and current? I know that in LCC systems, the AC harmonics currents are reduced. Since the voltage depends on the current, is there a decrease of the harmonics voltage too? AI: The linked answer should answer it (you say you agree, I won't repeat everything in there). I'll add that there is no such thing as harmonics on the DC side. Harmonics are associated with harmonic signals, and DC is not harmonic. Those are called DC link capacitors and their purpose is to store the energy for the next stage, such that the higher their value, the lesser the voltage fluctuations. There is a limit to the size of them, both in terms of physical realization, and as far as the control loops go (whose purpose is to maintain the voltage at a certain level). The fluctuations need to be kept low because, usually, the AC-DC-AC chain implies the usage of a switching inverter. These use PWM to deliver the AC, and they rely on the power supply to be delivered by the DC link capacitors. Due to the nature of the PWM, a varying supply means a varying amplitude, other than sinusoidal, which acts as an amplitude modulation, introducing not only harmonics, but risking causing sags that can damage the loads (and not only). Note that the DC links are not only capacitors, they can be inductors, too, since they, too, are reactive elements. In this case, the topology of the inverter changes, but the principle remains: having a large storage for the energy to maintain a steady delivery of voltage/current. Point 1) shows what a nonlinear load that has no power factor correction (of any kind) does to the current. Since V=R*I, having those current peaks means greater voltage drops across the source which, in turn, can cause sags (sometimes potentially dangerous, e.g. in a weak grid). Improving the harmonic content of the current means less peaks which, in turn, means less sags, thus the voltage drops less. So, yes, power factor correction does improve voltage, too, though nothing is perfect: the switching regime and the parasitic inductances will cause additional filters, which, in turn, means more voltage drops. But, overall, the results can be much better than without, which is why there is a whole industry dealing with these matters.
H: Circuit Gives DC Current instead of Sine signal (LTspice XVII) I'm a mathematics and physics student. I am trying to simulate the circuit from the paper "Design and implementation of a lightweight high-voltage power converter for electro-aerodynamic propulsion". However, this is my first time using LTspice and I'm struggling with it. What I don't understand is why the signal in the voltage in the primary of the transformer isn't sinusoidal as expected but rather a DC signal of 100V. Consequently the signal isn't being multiplied by the transformer and the output voltage is 0. Picture of the circuit from LTspice: Node n004 is the node linked to the primary of the transformer: Edit: The link to the article was not working so I replaced it with another one. AI: All your PMOS are upside down hence the parasitic diode in each (show by my red lines) is conducting a massive and unfeasible current from the power source: - Given that the four PMOS are identical, the outputs will from a 2:1 potential divider and convert your input supply of 200 volts into an output of 100 volts. I think you need to relook at what the original idea is behind your simulation because 4 MOSFETs wired like this can never properly work. Original idea (oops they got that wrong): Unfortunately, you can't rely on the diagram in the document you cite. It also shows PMOS devices (wrong) and also shows each half bridge gates connected together (also wrong): - Here's a blow-up of Q1: - Clearly and unambiguously, this is incorrectly drawn as a P channel MOSFET when it should be either an N channel MOSFET or a P channel device with source and drain reversed.
H: What does 'not controllable' mean in power electronics? A book says that the power diode is 'not controllable' whereas a 'Thyristor' is semi-controlled and a 'MOSFET' is fully controlled. What do these degrees of controllability mean? Is it somehow related to feedback loops? AI: simulate this circuit – Schematic created using CircuitLab Figure 1. (a) A diode will conduct if it is forward biased. There is no control pin on it. It is not controllable. Figure 2. The upper waveform shows the result of the diode or the thyristor when triggered at the start of the half-cycle. The third waveform shows the result of triggering half-way through the half-cycle. Image source: Electronics Tutorials. (b) A thyristor has a control pin and can be turned on part way through the AC cycle. Once triggered it remains on until the current through it falls to zero. In that regard it is semi-controllable - you can turn it on but will require special circuitry to force it off if you don't want to wait for the next AC zero-cross. (c) A MOSFET's conductivity can be controlled by its gate voltage and can be increased or decreased on command. It is fully controllable. Feedback is used to adjust the actual output to bring it closer to the desired setpoint. It's irrelevant in (a), it might be useful in (b) to control the resultant output voltage or power and it would be most often found in (c) to control the current or voltage in the load.
H: How does ground close the circuit, why isn't the current miniscule? Let's say I have a 230v version of a AA battery resting on a table say, I touch the + terminal, think of me as a resistor of 1 ohm, the circuit needs to close, and can take infinitely many parallel paths, which is a bit confusing, but let's think of it as a single path to the - terminal. The ground acts as a resistor, the resistance of the floor under my feet, up through the table legs through the air and into the - terminal. Think of the floor, table legs etc as another resistor with an enormous resistance, we now have a circuit with 2 resistors, first the me resistor of 1 ohm (say, just for a sense of ratio) and then the ground resistor of 1000000 ohms or some huge number, now the current through the circuit is miniscule and the voltage difference between my hand and the floor should be tiny no? Equally, if I get one of the table legs, and use it to touch the + terminal with instead, I would expect this to be very safe? But what has changed, the resistance in the system hasn't changed much (ok now I force the circuit to mostly go through a table leg, but I don't think this is significant as it was always going to have most of its current through a table leg), so the current should be the same? Equally equally, what's so different if I am levitating instead, now the circuit has to go through the air to reach the floor and air presumably has a really big resistance, several orders of magnitude greater than wood, but I already felt the resistance of the ground should be very big so I don't know I care too much? To clarify, my question is, why isn't the current through me miniscule when touching a live wire as I imagine the resistance of the path to complete the circuit to be very high? In diagrams I often see all the grounds joined together to one vertex, but does this really make sense? to get from one ground point to another ground point you have to go through a lot of resistive material incurring a high resistance, no? AI: Body resistance varies depending on the path and quality of contact (dry or wet, size of contact, etc.) with the voltage. It’s in the multi-kohm range, so not so high that direct contact with 230V won’t possibly be fatal. Ground, by definition, has practically no resistance. In practice electrical systems take great pains to minimize their resistance to ground, including driving large copper spikes into the earth to form a good low-resistance connection. The power panel ground will have a resistance to earth 25 ohms or less if it meets codes. You’re also overlooking a detail: with AC, the current will find its way through any capacitance present as well. This means that, even if you are insulated from ground by say, wearing rubber boots, touching live AC will charge and discharge through your body to the dielectric that’s doing the insulating. So even with those rubber boots you’ll still receive a shock, though not as much as if you were standing on the ground with bare feet. This is why power poles use large stand-off distances for the high-voltage wires. This decreases the capacitance as well as increasing the insulation resistance. This is done for safety as well as reducing line losses. Your ‘levitation’ case is the classic bird on a wire: the bird assumes the potential of the wire with no direct path to ground, and a very large insulation distance, so very little current flows through the bird. Related: Professor said no current flows to ground
H: Difference between simulator and my analysis I have this circuit: I have done circuit analysis and found the total current to be 21mA. Here is what I have done: But when I run the same circuit in multisim it shows me 20.6mA.What could it be?Am I wrong? This is the output of the multimeter XXM1 I know I have done 2 similar questions but I cannot find the error here? And here is my set of equations run on the system equation solver And I know how to change and have changed the model of each virtual diode : Model of D1 diode. x = VA y = I1 z = I2 The resistance of each diode is 0 and the junction potential for D1 is 0.7V , for D2 is 0.3V I use virtual diodes AI: Even those "ideal diodes" have a dynamic resistance and, thus, a variable voltage drop. It's up to you to see how by running a simple .OP or .DC with one of those diodes. You'll see that you need to use the parameters defined in the .model if you want precise numbers. Otherwise, 20.6 mA vs 21 mA is good enough, given the circumstances. I'd call it success at this point. But, again, if you want accuracy then you can't rely on assumptions. You don't seem to understand that it doesn't matter how it's called or labeled, a diode in a simulator obeys some dynamic law that makes its voltage drop to differ as a function of the current through it. Here is the proof, if you're so reluctant to do it yourself: I1 is a current source with a ramp from 0 to 1 A, over 1 sec (I(I2)). Place that across your "virtual diode". You'll see a curve much like V(x), which is the voltage across the diode. That's because what you're showing is, most probably, a standard Berkeley diode who follows the same equation you'll see on Wikipedia: $$\begin{align} I&=I_S\Bigl(\mathrm{e}^{\frac{V_D}{nV_T}}-1\Bigr)\tag{1} \\ &\Rightarrow \\ V_D&=\ln{\Biggl(\dfrac{I}{I_S}+1\Biggr)nV_T} \end{align}$$ Which tells you that V(x) is very much a logarithmic curve, or what you see. This is verified by V(y), which is a behavioural source with the same expression, except \$V_T\$ is approximated to be 26 mV (as opposed to some 25.85 mV). This is why I told you to test the diode; .OP, .DC, .TRAN, it doesn't matter, as long as you test it to see that what people are telling you is not a lie. Testing is up to you. You are supposed to make sure that the models you are using are behaving as expected. And then you'll realize your stubbornness in thinking that, simply because it's labled as a "virtual diode", it doesn't mean that it doesn't have a dynamic characteristic.
H: NPN Transistor Data Sheet, Source vs. Sink Current Even though I'm an EE with 30+ years experience, a simple question asked by a junior colleague really stumped me. Namely, on a data sheet (e.g., for a 2N2222), that transistor can only SINK conventional current so why does the Ic or Ib not have a minus sign on the specs and curves? Same thing for a PNP. AI: For NPN (and N-channel MOS) they defined Ic (or Id) to be current going into the collector (or drain) and Ib going into the base. It is that simple. Often PNP (and P-channel MOSFET) datasheets DO use negative signs for the currents and voltages, remaining consistent with the sign convention for NPN (and N-channel). Image from 2N3906 datasheet. The only point of inconsistency is that some companies report currents for both polarities of transistor as positive, thus using opposite sign conventions for NPN and PNP. While I can't say WHY they do this, I will say that it shouldn't confuse anyone who has at least a tiny bit of experience.
H: Is a spice model unique? i found an SPICE model for a component with diferent parameters than the ones that i found earlier (wich have the same parameters). So i am questioning wether there is a way in wich it is posible (and right) for a component with the same name (identifier code) to have diferent spice models with diferent parameters. In case not, then the first one you stumble with when looking for a spice model on the internet is very likley the rigth and unique one, right? AI: No, they're the furthest thing from being unique unless they're just copied. In general SPICE models reflect typical characteristics, to some degree of accuracy. Datasheets offer 'typical' characteristics, sometimes, but the min/max is usually what we are most interested in. A jellybean transistor eg. 2N3904 from manufacturer A may meet all the min/max JEDEC limits, but have different typical characteristics. Maybe they were actually designed as a somewhat better transistor and now they decided to package them as the lower performance part. Processes vary. Sometimes models are optimized to run quickly at the expense of accuracy, because otherwise it would be difficult to run useful simulations. Sometimes manufacturers have proprietary tricks that they feel might be compromised by revealing the entire model so they encrypt the model and unencrypted models are macromodels or just not available. Sometimes the models are just not very good. Maybe a student or volunteer did it and released it to the wild. Manufacturers have an interest in selling their products, so using a model the manufacturer you are planning on using has on their website is usually a good idea. For example, as you probably know, the most important DC characteristic of a diode at low-ish currents is the forward saturation current Is in the SPICE model. You will find the number for a common part such as 1N4148 varies by 3:1 or more between different manufacturers. Since there is a ln in there, that's only about a +/-5% variation in Vf so it isn't as bad as it sounds. However you'll find also find it specified as eg. 4.352nA, to a silly number of decimal places, or to just one decimal place (eg. 7nA). Depending blindly on the 'typical' characteristics, as described in the datasheet or in a SPICE model is a recipe for disaster. Design first then verify with simulation and prototyping. The typical characteristics can be useful in evaluating the limits and in understanding operation in a multi-dimensional space that is only guaranteed at a few points at best, that's why they're there, but one must take care.
H: Pads in IC's corners One can sometimes observe rectangle pads in the corners of some IC's footprints: What are they for? AI: They are there to allow for wave soldering. As the solder flows on the legs, any excess can end up on those pads, not shorting out the pins of the IC.
H: How close should the diode be to a solenoid? When using a diode to deal with the back EMF from a solenoid, common advice is to put the diode as close to the solenoid as possible. Indeed, in pinball machines, I've seen diodes soldered directly to the solenoid's contacts. I've got a solenoid valve that's sealed (IP 65). Instead of contacts, it comes with wire leads that at are each about 15 inches (almost 40 cm) long. I assume the diode should be closer to the solenoid, and that I should cut the leads much shorter. Is that correct? Or does the distance not matter as long as the diode is closer than the switching circuit that drives it? Is there a reason solenoids aren't manufactured with snubber diodes built in? It seems the solenoid itself generally dictates the diode selection (at least for low-frequency activation that you would expect from valves). (I've found answers to related questions, but not one that directly addresses the distance issue, especially when the solenoid comes with long leads.) AI: In the absence of some means to dissipate the energy stored in a solenoid, when the solenoid is switched off, it can induce high voltage spikes. The free-wheeling diode is there to provide a current path to "snub" these voltage spikes. If the solenoid is switched by a semi-conductor switch, then it is a primary function of the diode to protect that switch. Semi-conductors are not very tolerant to high voltage spikes. If the solenoid is switched by a relay, the voltage spikes might cause arcing and burning (or welding) of relay contacts. Additionally, one end of the solenoid is often connected to a power supply rail. Voltage spikes may travel through the power rail and damage other parts of a circuit, so the diode also has the responsibility to protect those other parts. As fraxinus points out in a comment, high voltage spikes can cause breakdown in the insulation in the solenoid, and damage the solenoid itself, so the diode needs to protect the solenoid. Also, as TonyStewartSunnySkyGuyEE75 points out in comments and in his answer, the collapsing magnetic field may induce voltage in other wires that are not directly connected to the solenoid circuit, i.e. through mutual induction. The leads of the solenoid have inductive properties just as the solenoid does. To reduce the inductive effects of the leads they should be twisted together. In the industrial equipment that I have worked on, the switches for solenoids were always enclosed in metal cabinets, whether the switching device was a relay or transistor. The diodes would be on the circuit board for the transistor, or the mounting socket for the relay. I have also seen a pin-ball machine which had diodes soldered directly to solenoids. One difference between these two cases is that the solenoids in industrial settings were environmentally sealed, whereas the pin-ball machine had open wiring underneath the playing surface, and the solenoids were environmentally exposed within that area. Another difference is that the distance between the switch and the solenoid was much greater with industrial machines. Yet a third difference was that, at the time, mosfets were quite expensive, quite prone to failure, and circuit boards in general were expensive. Far more expensive than a solenoid, even a solenoid activated valve. Thus, protecting the circuit-board was paramount. Although the pinball machine had several circuit boards, it mainly relied on electromechanical switches and relays, the relays being comparable in price to the solenoids. Whether the freewheeling diode should be placed nearer the switching device, or nearer the solenoid, is a design decision whose answer depends upon quite a few factors. If one's main concern is to protect a circuit board, the diode should probably be on the circuit board. Otherwise, factors such as ease of testing, ease of fabrication, ease of access and replacement, concerns about electrical noise etc. may play a significant role in the decision of where to place the free-wheeling diode. A final note, added at the suggestion of TonyStewartSunnySkyGuyEE75. A single diode is not the only method to "snub" a magnetic device. The peak voltage spike occurs immediately upon the opening of the switch. To reduce the amplitude of this spike, a capacitor may be added. A (non-zener) diode may not dissipate energy fast enough for some purposes. So, a resistor may be added to aid in energy dissipation. In short, a variety of topologies are available.
H: MUR460 diodes get extremely hot - what am I missing? I have a 110W solar panel that I use to charge some LiFePO4 battery packs. The panel delivers 18-20V, so I have a DC buck converter between the panels and the batteries to bring the voltage down to 14.8V. To avoid having the batteries feed the buck converter when there is no feed from the solar panel, I put some diodes on the output side of the converter. Initially I had two MUR460 diodes in parallel, but they got so hot that plastic case for the terminal block they were connected to melted. According to the data sheet for the MUR460 diodes, they should be able to withstand a 4A average constant current, so two diodes was within the limits for the ~7A that a 110W panel should be able to deliver when the voltage is bucked down to 14.8V. Due to the heat issue I replaced the two parallel diodes with three parallel, expecting that heat should no longer be an issue. Those three parallel diodes still get very hot, not enough to melt the terminal block insulation, but still too hot to touch. I will of course replace them with other diodes with a higher current rating, but I'm still curious: what am I missing here? Are these diodes perhaps off-spec/bad, or is there something else that would explain why they get extremely hot? Did I just pick* the wrong kind of diodes, these are meant for high frequency switching, so are they perhaps not good for a constant forward DC current? I would have thought that 3x diodes rated for 4A each should easily be able to carry a 6-7A forward current without producing a lot of heat. *= the reason I picked those diodes was just that I happened to have a strip of them lying around in a drawer Update: based on the advice in the answers and comments, I changed to a MBR3045CT schottky diode in TO220 packaging, and attached that to a heat sink. No more heat problems... AI: First of all, paralleling diode doesn't work very well. Unless the Vf are matched current will prefer one of the two. It sort of work, but not expect a 50% load sharing. Fast diodes will work perfectly in DC, simply they are not optimized. Maybe they only have slightly more Vf (and are more expensive). Remember that dissipation in diodes is Vf times I. Schottky diodes also have substantial leakage which often predominates when you use them as switching diodes, but this is not the case. 110W at 18V (assuming the worst case) is slightly more than 6A; a cautious derating would choose an 8A silicon or Schottky rectifier for this application: this is a power oring condition (and I would strongly recommend a MOSFET and an oring controller for this amount of current) so let do some math on some plausible diode. As a Schottky a choice would be for example an SBR1045, a chunky axial diode. Average I=6A, about Vf=0.4V at the operating point, about 25°C/W to ambient. That would dissipate 2.4W with a temperature rise of about 60°C. It could work, if you don't touch an 80°C diode body. Tj max in DC is 200°C so don't worry for the diode. Now for the silicon choice: MUR820, the obvious stepup from your choice: the TO220 offers a 75°C/W free air dissipation, Vf at about 0.85V (at cold). It would dissipate 5.1W so there's no chance it would survive without heatsink (like most TO220 at their intended power). In an oring controller situation, the main power loss would be the RDSon of the switching MOSFET. I'd take as a comparison a TO220 too but this would be in practice done with a DPAK if not with a smaller SOT package. But I'm lazy and I don't want to keep half a day choosing a MOSFET. Take the IRFZ24, I have a bag of these. Survives with 175°C at the junction. Nominal 70milliohm, about 2.5W of dissipation at 6A. Still not completely safe without heat sinking and in fact slightly worse than a Schottky. Well, it actually cost less than that diode, and it's not even a low gate drive MOSFET. However these day steady state optimized MOSFET can go down to about 1 milliohm, so you'd be dissipating only a quarter of Watt.
H: Microcontroller PWM LED strips driver with N-channel MOSFET I'm trying to control 12 V or 24 V LED strip (consumption around 5A) with an STM microcontroller. The outputs of the microcontroller are 3.3V PWM. I'm looking to use the following N-channel MOSFET: PSMN2R8-80BS-1 or FDS6910 I'm a bit worried if the 3.3 V will turn on the MOSFET enough. Because of that, I was thinking to use NPN transistor which will opening the MOSFET with 5 V. Can you share your opinion which MOSFET to use and if it will work without an additional NPN transistor. Thank you for your time. AI: You can forget about the PSMN2R8-80BS without an additional stage, at 3V3 it is high impedance (see Fig. 9). The FDS on the other hand looks promising, it will be in the range of 20 to 30 m\$\Omega\$ (see Fig. 2). At a current of 5 A, the voltage drop will be below 0.15 V.
H: Simple and efficient way to send a 5V square wave to an 8ohm 1W speaker I want to use a 5 V square wave generated by an ATTINY85 to drive a 1 W, 8 ohm speaker at 1 W. The project has to be battery powered. I would like to use a 18650 rechargeable 3.7 V Li-ion battery and a 5 V 600 mA boost converter: With a simple emitter-follower circuit, it doesn't seem possible to me to achieve the required 2.82 V (RMS) swing. I considered using an LM386N amplifier, but from the datasheet it seems that the output voltage would not be enough to achieve the required 1 W maximum power. I am wondering if I have to use more capable boost converter, making the project more complex having other stuff which need to work at 5 V, or if it is possible to do something else. AI: If you need to drive a square wave the usual trick (from the piezo days) is to use an H-bridge do double the applied voltage: On 'forward' you have 5V applied On 'reverse' you have -5V applied … driving thus the speaker with a 10Vpp signal You could use a bridge intended for small DC motors, the load is in fact similar. Just remember to switch off the bridge when you are done otherwise you'll burn the speaker with a DC signal.
H: Determine voltage with which to run COB LEDs I have a few COB LEDs laying around, but unfortunately I don't know the exact model anymore. Hence I can't read their data-sheet. However, I would still like to use them. I own a good multimeter, and figured it might be possible to use it to determine some characteristics of the LEDs, so that I can figure out what driver to power them with. Can you recommend to me a certain procedure to do this, that would allow me to find some "optimum point", where the risk of damaging the LEDs is relatively low, but where I don't have them running way under their potential? When I talk about "risk of damaging", I refer to the risk of damaging them during operation - if I happen to destroy one or two during the initial measurements, that would still be worth it. I found this thread that treats a related question, but there the topic is LED-panels, and I have COB-LEDs, so maybe there are some differences.. I also know the driver which I used to power multiple of them in series - it was the HLG-185H-C700A - but I don't know the exact number of LEDs I used to power with that driver (might have been btw. 6 and 8 I think). However, what we can conclude is that the operating current of the LEDs is 0.7A. The reason I won't use that same driver again is that I don't want to run as many LEDs as I used to. AI: Your current driver is a current control driver, so it will adjust output voltage to produce a 700mA current. If you have a digital multimeter, you can set up a string of the COBs attach them to the driver and measure the voltage across them while they are operating. You can use a smaller string of LEDs with that driver. Only disadvantage is it's more efficient at max load. It's rated to work from 143V to 286V output. Be careful with it. 286VDC is a nasty zap. You can hook up roughly the number of LEDs you remember using, check the voltage per LED while they're running and use that to guage if the minimum 143V will work for whatever number of LEDs you actually want.
H: Unused output of a flyback transformer I have a flyback transformer. It has 2 outputs. I'm going to use one of them on a flyback converter. Should I leave the second output of the transformer unconnected or connect a load to it? AI: should I left the second output of the transformer empty or connect a load to it? If it's no problem, leave it open circuit or, if it's the same voltage as the other secondary, you should be able to parallel them up to reduce \$I^2R\$ losses in the secondary.
H: If I use twisted pair cable for I2C, should I twist SDA with SCL or both with the ground/power? I need to design about 1 meter cable for I2C communication. It contains 4 wires, SDA, SCL, ground and power. I plan to use the shielded cable with the shield grounded at one end only. It looks reasonable to use the twisted pair cable (that has 2 twisted pairs inside.) Which should be twisted with which? I initially assumed that SDA and SCL, the signal wires, should be twisted together (like in USB.) However, I found on the web random posts that the signal wires should be twisted one with the ground, another with the power instead. How much of this is correct? AI: When you twist a pair of wires, it should only ever be signal with its ground, or signal with its complementary signal. If it's well decoupled, twisting a signal with power also works. Twisting two wires together that carry different signals is asking for enhanced crosstalk, and trouble.
H: Where does this white dust come from? I have a PCB from a humidifier which ceased to work. It could be water damage but I am not sure. I sm unsure if it is the transformer or some capacitor. Please advise if I can repair or if it is better to take the good parts and throw away the rest. AI: This white dust is caused by water impurities, often like limestone, that gets vaporized by the ultrasonic thingy and blown around. You can often see it on the floor around humidifiers. It's unlikely to be the cause of the damage though. That board seems to be a basic power supply, you can check the output if you have any voltage out. Visually it seems fine, so it's probably the ultrasonic transducer. You can try to put some vinegar for a few days on the transducer (inside the water compartment) if it's due to limestone clug-up that would dissolve it.
H: Improving transformer voltage regulation / efficiency through construction I am wondering what modifications can be done to a transformer during manufacturing to improve its voltage regulation and efficiency? AI: The best that can be done during manufacturing is to build the equipment according to the design. These characteristics are defined during the design stage. Voltage regulation depends mainly on the leakage impedance, so reducing the stray field reduces the voltage drop. The main way to reduce the stray field is to use fewer turns or to bring the primary and secondary windings closer together. Of course there is trade-offs, a very low impedance creates problems for protection, as in the definition of the circuit breakers and very close windings can cause electrical discharges between them. (in small transformers, such as less than 45kVA, the resistance can considerably influence, in this case, using larger conductors helps). As for efficiency, it is necessary to reduce losses. This can be achieved using better materials (like copper instead of aluminum for conductors or more refined silicon-steel for the core) or more material, increasing the amount of silicon steel (which ends up reducing the magnetic flux density) or the amount of conductor (which reduces loss by Joule effect).
H: Why is the 2.2k resistor needed in an MT3608 module? I am trying to implement an MT3608 module on my PCB. I went through its schematic which clearly describes the module. I see they have used 2.2k ohm resistor in addition to a potentiometer. From what I read in datasheet of MT3608 is that it needs 0.6V on the FB pin. There voltage divider for that. I don't understand why there is an extra 2.2k resistor used in the module. Is it for safety? Does anyone know the reason for that resistor? Also I am planning to use a fixed value resistor (no potentiometer) as my output voltage is fixed to 12V. Do I have to consider this extra resistor ? Does nyone know a locally available resistor combination that gives R1/R2 ratio 19? I need it for 12V output. AI: The 2k2 resistor is there to provide a minimum value of what is adjustable with R2. R2 is a trimpot. If you adjust R2 to the minimum, it will be at least 2k2ohm, which is perhaps a requirement of the chip. It cannot regulate if the feedback is tied to the ground.
H: „Power circle“ - first buck then boost for converter testing I would like to test the efficiency of some buck converters. I am thinking of using two current sensors like INA219 (or similar) connected to an Arduino and using the serial monitor to gather data. Vin: 12V Vout: 5V, 3.3V for now. Iout: 8-10A max. maybe 15-20A in future. Instead of dissipating the output voltage of the buck converter into heat using a lamp or a power resistor, I would like to re-convert the buck output using a boost converter to be reused by the buck. It’s like a “power circle." Can I use the output current limit of the boost converter to create gradual steps to measure efficiency over Iout? How can I control Ilim resistor with my microcontroller or do I have to do that manually with a potetiometer? Lastly, does Vin main act as a supplemental supply while the entire output of the boost ist being used by the buck? AI: Instead of dissipating the output voltage of the buck converter into heat using a lamp or a power resistor, I would like to re-convert the Buck output using a boost converter to be reused by the Buck. That won't work. Once the "feeding back" boost converter is producing sufficient output voltage to "supplement" the main power source, the load on the buck converter drops to that required to keep the boost converter operating in a no-load situation. In other words your idea is flawed.
H: Volume Control - Logarithmic Potentiometer Placement Thanks in advance! I am building an headphone amplifier with PCM1794A, OPA1612, and OPA1622. Where would be the best placement of the logarithmic potentiometer for volume control without decreasing the bandwidth and without introducing a lot of distortion and noise? My best solution was to add a small value potmeter at the output at VF3. Left channel below: AI: In general, putting the volume control as late as possible in the signal chain maximises the resultant signal to noise ratio. As the volume is turned down the noise is too. This works well if the system input signal level is always within limits. In cases where the input signal might exceed the range of the amplifier it would be common to add one at the input to allow attenuation of the incoming signal. Using this as a volume control would result in the unattenuated noise of your circuit being fed to the following stage. VF3 is the place to put it. Check for DC offset at the output. If there is any you should add a DC blocking capacitor or an offset adjust to eliminate the offset.
H: Twisted Pair input routing on PCB I have a twisted pair input to the IN+ and IN- pins of the MAX9278 deserializers. The Parallel data output of the deserializer consists of 4 LVDS data channels and 1 LVDS Clock channel to a 3.1" TFT whose Pixel Clock is calculated to be as 27MHz. So, I guess the twisted pair inputs IN+ and IN- would also be 27MHz. Am I correct is assuming so? In that case, what impedance should be maintained between the IN+ and IN- twisted pair input signals to the deserializer? Should I maintain the 100ohms impedance just like if it was a coax input or what should I do? AI: So, I guess the twisted pair inputs IN+ and IN- would also be 27MHz. Am I correct is assuming so? No, that's not correct. The bandwidth of the transmitted serialized data will be a little over \$N\$ x the bandwidth of each deserialized output. It's a little over \$N\$ times because the serializer adds synchronizing markers into the combined serialized data frame. So, converting the problem to bits per second, if you combined 4 serial data streams of 1 bit per second, the serialized data will be 4 bits per second plus a little bit more (for the sync bits needed to decode the data). Obviously you are not running at 1 bit per second; I am just using that as an example. In that case, what impedance should be maintained between the IN+ and IN- twisted pair input signals to the deserializer? Should I maintain the 100ohms impedance just like if it was a coax input or what should I do? It needs to match the transmission/characteristic impedance of the twisted pair interface cable.
H: How to program MCUs and test PCBs in mass production? I am working on a PCB which includes an microcontroller (STM32), some sensors and a BLE module. Right now it is still a prototype, only 3 units have been produced. To program the microcontroller, I am using the programming probe provided by STMicroelectronics (ST-LINK/V2). To check that the hardware is fine, I send a BLE command to the PCB : the microcontroller verifies that all the sensors are responding and if the test is passed, a green LED is turned on (otherwise a red LED). It is not an exhaustive test procedure but it is convenient for my needs (for example I do not test the red LED nor the values of all the resistors nor the measurements of the sensors). That works for small quantities, but if the prototyping phase is conclusive it might be produced in large quantites (some thousands), so I will have to change the way the MCU is programmed and the PCB tested. I have never done this before, so I have trouble finding what is expected of me and of the EMS. Programming How can the MCUs be mass-programmed ? Let's consider I will not ask STMicroelectronics to deliver the MCUs with my custom firmware (because that solution is "easier"). I suppose I will need to make the programming pins of the MCUs accessible. But can I just send the .bin file to the EMS who will take care of the whole programming procedure ? Do I need to specify the programming procedure ? Or do I need to design another electronical card whose goal will only be to program the MCUs ? Testing I do not have any idea how to industrialize a testing procedure. Once again : can the EMS take care of the whole procedure based on my schematics/layout ? Or do I need to design another electronical card ? AI: First, I'd suggest to use one of these pads (i.e. TC2030) for JTAG/SWD programming as they do not cost a component and they lend themselves very easily to programming jigs. Normally, you can just send the bin or hex file to the EMS. The EMS should be able to identify a gang programmer apt for the MCU, as necessary. You need a dedicated testing jig ("bed of nails") for the actual testing. General ease of test jig development depends on the presence of test pads and how the PCBA mechanically lends itself to testing (i.e. are the test pads reachable by pogo pins and are not hampered by tall components, etc). Note that the programming jig and the testing jig can be the same jig, but again, that depends on the complexity of the PCBA, and the number/complexity of tests. You do need to present them a programming procedure (power up sequences, pin inputs, etc). Its the EMS's job to replicate this on a mass-pro level. Same with the basic test procedure you mentioned. Component-wise, you can opt for the EMS to do ICT test prior to programming/ testing. At least for the first batch, just to be sure that the right component values are mounted on the right places or that BGA components are connected well. You'd have better confidence of proceeding with the programming/ testing (or at least less debug points to look into) knowing that the PCBAs are assembled correctly. At a very basic level, those test jigs are computer-controlled (i.e. PC with LabView hooked to different instruments, the programmer, etc) where an operator/ technician manually loads the PCBA(s), presses down the jig, press a start button on the interface, wait for the programming, and the test results PASS/FAIL message to come out.
H: Wattage of adapter to size my inverter I have a couple of appliances that already have their power specified on them. However A few of them do not. The device is powered from an external power brick adapter. One adapter for instance has the following specifications on it: Input: 100-240V ~ 1.5A (I use 230Vac) Output: 12V – 3.33A My question is therefore which power value calculation do I use, the input (264.5W) of output (39.96W)? In order to know how to size my inverter. I am sure this may be a duplicate question but I cannot search through every post to find that answer and the search field is not narrowing down the options alot. AI: The adapter's current will be largest at 100 V, not 240 V, the 1.5 A doesn't apply at all voltages. Then for a low power device like this, the power factor is probably quite poor, maybe as low as 0.7, I guess. This means the current will be 1.4 x what you'd expect from the power. The inverter still has to supply this current. Then the efficiency of the adapter is probably only 80%. This still leaves a factor of two which can't be explained. At 240 V, you can probably consider the steady state fully loaded current to be under 0.5 A, or 100 VA. The inrush current when it is first connected, could be a lot higher, but inverters usually handle this with a brief voltage drop. By the way, small inverters are notoriously overstated in their power ability. I have a cheap 120 watt inverter which can't power a laptop. You can see it in the price range, you can pay $25 or $250 for a 200 watt inverter, depending on how serious your application is.
H: What happens when I overload an induction generator I am trying to generate power with a small induction generator. The RPM is constant. What will hapen when the rated input torque is exceeded? AI: You cannot maintain constant RPM with an induction machine. More torque means more RPM. Two things may happen: you may burn the generator if you push really hard you may slip over pushover torque and the generator will run away (see the torque-speed curve below; image from here)
H: Substitute for transistor 2N3904 that is a SMD I have the circuit shown below and one of the components (Q2) is a common through-hole transistor. I'd like to replace this through hole device 2N3904 with a common SMD transistor that will do the same job so that my PCB manufacturer can solder these for me. Does anyone have a recommendation? AI: MMBT3904 is the same die. You should verify that the thermal performance is adequate, because it won't be as good as a TO-92. The same part in SMD != doing the same job.
H: Microcap 12 - Import PSpice models I'm trying to do a simulation on Microcap 12 using vendor provided models. The devices I'm trying to use in my schematic are the following: 2SA1312 2SC3324 I add the models via component editor as per this guide suggests. After drawing my circuit, I try starting a transient simulation and this warning appears: Warnings Warning unknown parameter TNOM in model 2SA1312_BJT. Warning unknown parameter TNOM in model 2SC3324_BJT. These warning are easily fixed by opening the model and removing (or commenting) the line related to TNOM. After doing this, transient simulation actually goes through, but a quick check on the voltage nodes shows that these transistors are simply open circuits, since the voltages shown at their terminals are simply the power rails values. Here's a simple example with a built-in model (2n2222): And here's the same circuit but different transistor (for which I imported the model): Notice that the voltage on the emitter is the negative rail. Any advice on how to try to fix this problem? AI: Apologies if "answering my own question" is not the right etiquette. First time ever I actually post a question here. I played a bit more and found the solution myself. I think it's useful to leave the solution here in case someone else is in the same situation. The issue is pin numbering. When importing the model, I used the numbering suggested by datasheet for the physical package: Base Emitter Collector I later noticed that on the model itself, the numbering system is different: Went back into Component Editor and renumbered the part as per model: Running the simulation gives good results now:
H: How to delay astable 555 timer IC by ~1 min My problem: I've reproduced the 555 timer circuit from here: https://www.gadgetronicx.com/door-open-alarm-ic-555/. Because of the specifics of my application I'd like the signal at the speaker to be delayed by 60 seconds. To clarify: Reed switch gets disconnected 60 seconds delay The alarm goes off (like it would normally) Would be nice if someone could give me an easy and concrete tip. I'm a bloody beginner in electronics but I'd imagine there is some easy solution with a capacitor at the output pin of the 555. Thank you in advance! AI: If you add the below 4 common parts you'll get a delay in the 50-70 second range roughly. You can use a ceramic 50V capacitor for C1 (eg. FG14X5R1H475KRT00) simulate this circuit – Schematic created using CircuitLab
H: Using SPI to get higher sampling rate from ADC module vs using ADC on microcontroller I am currently looking at a microcontroller, and I would like to use ADC on Arduino but found out that the Arduino has a limited sampling rate. Is it possible to us SPI communication with a separate ADC module to get higher sampling rate? I don't have any circuitry right but I want to know if it is common to use SPI with a separate ADC module to get high sampling rate. AI: You could use an "Arduino" compatible module such as the STM32F103C8T6-based ones, which have claimed "12-bit" and "1us" ADC peripherals. Read the datasheet with a jaundiced eye to determine the actual performance. You can't expect to match the performance of a fast external ADC from a top-line company. I think it would be more common to use an external ADC to get better performance than the on-board 10-bit ADC. You should think about where the data is going and whether the processor is up to handling it, beside just the raw ADC speed. Also, you can make the ADC in the ATMega328 run 5-10x faster if you don't use the analogRead function, but allow it to free run with interrupts. Perhaps with some loss in performance.
H: SPD I2c Address for DDR4 SODIMM While designing DDR4 SODDIM schematic for a mini-pc motherboard, I understood that I need to set an address to Serial Presence Detect (SPD) EEPROM so the CPU can identify the memory. While looking at a previous design at a project in my company, I noticed that 3 pull down resistors are equal to the address A0. and someone wrote (0x50). (NOP means Not Populated Resistor) I'm trying to understand how to find these addresses and the conversion between (0x50) to A0 and vice versa. looking at this article, I found this table: I'm not sure if this is relevant. personally I didn't get from it any information that I can link to the previous image. but I thought it could help the answer. regarding the last answers, I still don't understand how these addresses correspond with the outside resistors. actually I want to validate that the addresses are right. here is another example which makes the confusion, this image for the second SODDIMM slot in the design: AI: If you refer to the datasheet for an IC which could be used to implement the SPD feature, like a M34E04 from ST, you'll find that its 'base address' on the I2C/SMB bus has been set as 0x50 and that the 3 SAx pins are used to set the 3 least-significant bits of the address. This corresponds to the table you found in the Micron app-note too. When devices are addressed in an I2C/SMB bus, the 7 address bits are sent out first, followed by a single Read(0)/Write(1) bit. So if you take the 1st 7 bits as 0x50 and shift them left 1 bit to add on a Read(0) bit, you get an 8-bit result of 0xA0. If you instead use a Write(1) bit then you'd get 0xA1 instead. Those 'outside resistors' in your schematic are connected to the SPD device's SA pins, so they set the address to which the SPD will respond on the bus. In your 2nd schematic, those resistors feed values of 0, 1, 0 (0x02) to the 3 pins - so the SPD connected there will respond at address 0x52 (0x50 + 0x02), shifted left 1 bit and the Read/Write bit added on - so 0xA4 or 0xA5.
H: What type of battery is used in Oura ring? What type of battery is used in Oura ring, and how many mAh is available? I am not sure how does Oura ring manage to claim up to 7 days of battery life. Should not using an LED and BLE connection in continuous mode drain the battery before 7 days that they claim? AI: Oura website says LiPo battery, either 15mAh or 22mAh depending on the model. They obviously save power by not keeping LED or BLE on the whole time.
H: Mechanical relay circuit schematic and PCB. What is wrong here? I built a relay that closes when a GPIO gives a GND signal. I have tested the circuit with a breadboard and it works with the same components (except breadboard uses THD diode and PCB uses SMD), but for some reason my PCB circuit will not close the relay. I am monitoring the normally open circuit by wiring in a 1000 ohm resistor and LED. When the switch closes I should hear the mechanical relay and the LED should light up. But no luck. I do not see any differences between my schematic and PCB but something is off. I even swapped out core components like optocouplers, transistors, relays to be sure they weren't just dead. There is an LED which turns on when GND signal is given at GPIO, I can turn this on/off without problems so I know this signal is present. I have verified that I am seeing 5V from my MOSFET power supply's drain, which supplies 5V to the circuit. Does anyone know what could be keeping my PCB from working? AI: D6 is backwards on the schematic. It is not clear from the PCB decal which end is the cathode. Consider adding a 10K resistor from Q3 base to GND to assure a rapid and complete turn-off. Based on typical values for the Vf of an LED and an optocoupler, it looks like there is only 1.5 mA of current through the opto primary side. Depending on the minim coil current for the relay, this might not be enough to drive Q3 into firm saturation. Update: To increase the transistor's collector current, decrease R11. A safe starting value is to determine from the datasheet the max continuous sink current for the GPIO pin, and size R11 for 1/2 of that. Next, use the CTR (current transfer ratio) of the optocoupler to find its secondary current.
H: How should DC motor brush capacitors be sized? I have seen capacitors placed near the brush connectors on DC motors. What are these for? How should they be sized? Do they affect PWM behavior? AI: They are for EMC - noise suppression, interference with radio transmissions. 0.1uF disc ceramics are commonly used, in a triangle (delta) - one from each brush to GND (the can) and one between the two brushes. Should have essentially no effect on PWM.
H: Fine-tuning/calibrating DS18b20 thermometer via 1-wire I am trying to enable remote reading of the temperature gauges in my furnace room by adding DS18B20 thermometers. Since I had some Raspberry Pis and DS18B20s, and some networking equipment on hand, I decided to crimp on a couple of RJ45 jacks and chain some RJ45 sockets together, with a final network cable with a 1kΩ resistor between the data and 3v wires. This works fine, except for the fact that the temperatures diverge more than I'd like... Executing cat /sys/bus/w1/devices/28*/w1_slave returns the temperature, but even with the sensors lying next to each other, they diverge by more than 1.5°C I have monitored them over a longer period of time, even covering them with my hand, and keeping them right next to each other. Sample output ad 01 55 05 7f 7e 81 66 16 : crc=16 YES ad 01 55 05 7f 7e 81 66 16 t=26812 b4 01 55 05 7f 7e 81 66 2b : crc=2b YES b4 01 55 05 7f 7e 81 66 2b t=27250 My setup Is there a way to calibrate them to the same temperature? I would hate to have to take individual quirks into account, as even if I was to round to nearest 2°C there is no real way to be sure they would be in the same increment. And replacing sensors would mean recalibrating values in my code. The reason for wanting this is that I want to detect whether the furnace is heating the water at the moment, or the water is at target temperature, or (hopefully not) that the incoming water is warmer than the outgoing water, meaning that my hot water tank is heating the house. If I cannot trust the readings, I may get too many false positives. I have read guides like this instructable, but as far as I can see, this is gathering the calibration data, and not calibrating the actual sensor... EDIT: Conclusion Cheap sensors are not always reliable. I have switched to the real thing and thrown out the fake ones AI: Unfortunately, fake DS18B20 devices are well known to be (a) inaccurate, and (b) have varying readings even in a stable environment. The chances of your devices from eBay being fake, is approximately 100%. This graph, taken from this answer on the earlier question: "Which one of these DS18B20 temperature sensors is fake?" shows the problem. The one genuine device is obviously the stable, top red line. The other 4 unstable and inaccurate readings are from the fake devices. Answers to that earlier question have several useful links, including this GitHub repo: https://github.com/cpetrich/counterfeit_DS18B20 which has two Arduino sketches that can help to identify fakes. Useful search terms include - DS18B20 counterfeit accuracy
H: Could this simple circuit charge li-ions in parallel? My goal is to design a circuit that can reliably charge 3.7V li-ion batteries in parallel for extreme high current applications (think over 100 amps). Normally, I would just buy a cheap li-ion balance board, but I can't find one that can handle the currents in any sort of compact form. So I designed this fairly simple charging circuit: Since each cell caps out at 4.2V, I could just supply them all 4.2V limited to 500mA charging current. Once each battery reaches 4.2V, it stops drawing current. This would ensure that each battery gets to 4.2V without overcharging, right? I've never seen a battery charger designed this way, so I'm assuming it has some sort of fundamental problem. Is there any reason why this wouldn't work? AI: Lithium batteries are dangerous. If you look at the application circuits on the datasheets for Li charge controllers (Linear Technology, Maxim, etc.), their complexity is a direct indication of this. Incorrect charging current can cause the batteries to burst, burst into flame, or both. There is nothing to assure that the charging current is distributed evenly among the cells. If your idea is that as each cell reaches 4.2 V, it stops drawing current so the 500 mA is available to the other cells, know that lithium chemistry does not behave that way The charge scheme you describe is common for lead-acid chargers, with a very simple transition from main to float or trickle charging. Note that those chargers usually do not have a temperature sensor strapped to the side of the battery, whereas in Li systems this is very common. I recently rebuilt a Dustbuster-style hand vacuum. Five Li cells in two groups, 2 and 3 batteries. Each group has its own thermistor, and battery management is handled by a PIC microcontroller.
H: Through node analysis, how do i find the unknown? I have this circuit I have to find \$V_a\$ and \$V_b\$, when I tried to do so, using node analysis I had the Equation \$\frac{V_a}{6} + \frac{V_a-12}{3}+\frac{V_a-V_b}{5} - 6 - 2 = 0\$ and \$\frac{V_b}{22}+\frac{V_b-20}{4}+\frac{V_b-V_a}{5} +2-3=0\$. Solving it simultaneously, I got \$V_a = 23.29 \text{V}\$ and \$V_b=21.51 \text{V}\$. When I simulated it using Circuit simulator applet, the simulation says that \$V_a = 24.4 \text{V}\$ and \$V_b\$ is \$25.4 \text{V}\$. Can someone point out where did I go wrong? Thanks! AI: There are several mistakes. But you still did pretty good. Let's look at the schematic: simulate this circuit – Schematic created using CircuitLab Now all of the important nodes have been labeled and a new unknown current identified. Your first equation should be: $$\begin{align} \frac{V_a}{R_1}+\frac{V_a}{R_2}+\frac{V_a}{R_3}&=\frac{V_1}{R_1}+\frac{0\:\text{V}}{R_2}+\frac{V_b}{R_3}+I_1+I_2\\\\\therefore\\\\\frac{V_a-V_1}{R_1}+\frac{V_a-0\:\text{V}}{R_2}+\frac{V_a-V_b}{R_3}-I_1-I_2&=0\:\text{A} \end{align}$$ And you got that one right! So there's no problem, yet. Your second equation should be: $$\begin{align} \frac{V_b}{R_3}+\frac{V_b}{R_4}+\frac{V_b}{R_5}+I_1&=\frac{V_a}{R_3}+\frac{V_c}{R_4}+\frac{V_c+V_2}{R_5}+I_3\\\\\therefore\\\\\frac{V_b-V_a}{R_3}+\frac{V_b-V_c}{R_4}+\frac{V_b-V_c-V_2}{R_5}+I_1-I_3&=0\:\text{A} \end{align}$$ Note that this is quite different from yours. One of the differences is that you used \$22\:\Omega\$ instead of \$R_4=12\:\Omega\$, I think. But actually there are more serious errors, as you can see. So this is really minor, by comparison. You need two more equations. One of them is very simple: $$\begin{align} \frac{V_c+V_2}{R_5}&=\frac{V_b}{R_5}+I_4\\\\\therefore\\\\\frac{V_c+V_2-V_b}{R_5}-I_4&=0\:\text{A} \end{align}$$ The final one is: $$\begin{align} \frac{V_c}{R_4}+\frac{V_c}{R_6}+I_4&=\frac{V_b}{R_4}+\frac{0\:\text{V}}{R_6}\\\\\therefore\\\\\frac{V_c-V_b}{R_4}+\frac{V_c-0\:\text{V}}{R_6}+I_4&=0\:\text{A} \end{align}$$ That's it. From these four you can work out all of \$V_a\$, \$V_b\$, \$V_c\$, and \$I_4\$. Took me less than 10 minutes to write this out.
H: How to find unknowns when there are current dependent sources? simulate this circuit – Schematic created using CircuitLab There is this circuit, I tried solving it using the equations Va/4 + (Va-10)/5 -2iy -1 = 0, Vb/2 + Va/10 + 1 + 2iy = 0, Vb-Vc = 5ix, (Va-10)/5 = ix, and Vc/10 = iy. Now, I dont know if my equations are correct since there are current dependent sources which im confused about. Are my equations correct? Any help is appreciated. AI: The schematic is: simulate this circuit – Schematic created using CircuitLab The equations are: $$\begin{align} \frac{V_a}{R_1}+\frac{V_a}{R_2}&=\frac{V_1}{R_1}+\frac{0\:\text{V}}{R_2}+I_1+2\cdot I_Y\\\\\frac{V_b}{R_3}+2\cdot I_Y+I_Z&=\frac{0\:\text{V}}{R_3}\\\\\frac{V_c}{R_4}+I_1&=\frac{0\:\text{V}}{R_4}+I_Z\\\\V_c&=V_b+5\:\Omega\cdot I_X\\\\I_Y&=\frac{V_c}{R_4}\\\\I_X&=\frac{V_a-V_1}{R_1} \end{align}$$ You can substitute and reduce the number of equations, if you want. Or you can just solve for all six variables, simultaneously. It's up to you. In standard KCL form, the above are: $$\begin{align} \frac{V_a-V_1}{R_1}+\frac{V_a-0\:\text{V}}{R_2}-I_1-2\cdot \frac{V_c}{R_4}&=0\:\text{A}\\\\\frac{V_b-0\:\text{V}}{R_3}+2\cdot \frac{V_c}{R_4}+I_Z&=0\:\text{A}\\\\\frac{V_c-0\:\text{V}}{R_4}+I_1-I_Z&=0\:\text{A}\\\\\text{where }V_c&=V_b+5\:\Omega\cdot \frac{V_a-V_1}{R_1} \end{align}$$ With substitutions for \$V_c\$, just solve for \$V_a\$, \$V_b\$, and \$I_Z\$. See below for a discussion about how I formulate the equations: KCL Addendum The KCL equations may appear to treat node voltages as if they don't have to be differences, but can be absolute values. However, that's not really the case here. In fact, I'm just using superposition (which is easily seen once you've really had the concepts deepened into you.) This is, in fact, the same technique used within Spice programs (those where I've directly looked over the code used to generate these.) Perhaps the easiest way to imagine is that absolute voltage at a node spills away from that node through the available paths. But also that absolute voltages spill into that node from surrounding nodes through those same paths. So long as you treat them all as absolute values, the result is the application of a simple superposition concept that results in, effectively, the potential differences controlling the result. You can test this, easily, by rearranging the resulting equation(s), moving the right side over to the left side and then combining terms. You'll then see the usual potential differences that you expect. So it really is the same result. The reason I very much prefer this method is that it is simple to visualize and very difficult to make mistakes. You can easily orient yourself to a node and then work out the terms for out-flowing currents for the left side of the equation. Then all you have to do is position yourself at each surrounding node and work out the terms for in-flowing currents for the right side. It's almost impossible to screw that up. Conversely, when you are instead struggling to work out the potential differences in your mind (using the more traditionally taught method) and just write those terms, you often find yourself not entirely sure if you have the sign right as you try and add them up, correctly. I find, time and time again that not only others wind up messing up somewhere and making an uncaught mistake.. but that I also make those mistakes, as well. Even with lots of experience, you just aren't 100% sure and you often find yourself double and triple checking your work, just in case. That doesn't ever happen, once you start using the superposition method. It just works. It just works right. It just works right each and every time. I've never, not once, screwed up. (I make typos. But not sign errors.) It's too easy to use. So voltage spills away from a node via available paths and voltage spills into a node from nearby nodes via the same available paths. The only caveat is that a current source or sink can only flow in, or flow out, but not both directions. It's one way. So it will either appear on the out-flowing side or on the in-flowing side -- but not both sides. This also works perfectly well with capacitors and inductors. It does turn the equation into a differential/integral equation. But that's just a technicality. It's still correct.
H: Programming I2C devices with NV EEPROM Some I²C devices like the MCP4728 DAC have a small EEPROM allow programming the I²C address (and other configuration bits). I know that in high volume can be programmed by the vendor, but for low volume prototyping, how are these typically programmed? Are they programmed on the board? If so, how can you configure just one component if there are more than one on the bus that need to be configured and they all come with the same address? Do they need programmed one at a time with all others powered off? Other best practice suggestions would be appreciated! AI: The chip has a pin, LDACn, that has a second function of selecting a device for writing the address bits. See the datasheet.
H: How do I solve the equivalent resistance of this circuit? How do I determine the equivalent resistance of the circuit looking into terminals A and B? I am quite stuck and the only thing I've figured out is that there are 3 pairs of parallel resistors: 90&12, 18&6, 100&150. The diagonal wires with no resistors kind of throw me off. AI: I am giving the image only. The members may frown. Only 2 nodes are there.
H: Can induction go through metal with holes? I admit that I have already made this question in physics SE, but after a month of no answers, I realized engineering might be better suited to everyday applications. I intend to use (Qi) wireless charging for a project of mine. It uses induction coils to transfer power wirelessly. In my project, between the coils there will be a 1.5mm (0.04 inch) sheet of brass. The first question I had is if this would work. I tried using a 3mm copper sheet that I have, and sure enough the answer is negative, the sheet absorbs the magnetic field. But what if I made holes in the sheet? Would some of the field penetrate then? Would it be proportional to the size and "density" of the holes? Or would the conductor still absorb the fields? AI: It won't. If you have any conductive material between your wireless charger and phone, the magnetic field will take the easiest path and go to the metal sheet. Power will be lost by eddies current (and ultimately heat) within that conductive material. Holes won't help.
H: Why are n-channel MOSFETs at high-side position and p-channel MOSFETs at low-side position on many push-pull circuits? Like in this example Common drain stage/Source follower circuit analysis there are many MOSFET push-pull circuits that show n-channel MOSFET on high-side position and p-channel MOSFET on low-side position being connected through their source connectors. From testing a circuit with p-channel MOSFET on high-side and n-channel on low-side position (gate -> 10K -> GND), connected through their drain connector, my experience was, this would be a more stable and reliable circuit (on 5V VCC and 5V/0V gate voltages). (Example circuit for this complementary MOSFETs (P/N) circuit would be https://en.wikipedia.org/wiki/File:CMOS_inverter.svg) What are difficulties with MOSFET source pins connected first version on biasing and why are drain connected MOSFETs not recommended (https://stackoverflow.com/questions/39116524/why-push-pull-can-not-work-in-this-manner - similar, but no explanation for MOSFET circuit) for power push-pull tasks? AI: Right: common drain, push pull, source follower This simple circuit with a NMOS and a PMOS is quite common. Being a follower, it has gain close to unity. Switching applications: this is almost never used because to make the output swing to both rails, you need the NMOS gate to be driven higher than the power supply, and the PMOS gate to be driven to a negative voltage, which would add extra complication for no benefit. Also, in buck converter applications, when the output voltage is lower than half the input voltage then you want the lower FET with lower RdsON (so it should be NMOS) since it will be on most of the time. Linear application: this is your standard follower output stage. It is easy to bias into classes AB or A or B, has high input impedance, it's pretty good. However if the drive voltage can't go above or below the power supply, then the output can't swing closer to the rails than one FET threshold voltage. If zero threshold voltage FETs are available (or JFETs) then it can be close to rail to rail if the driving stage is. If it is implemented with discretes and components like large capacitors are available, the driver can be bootstrapped to the output and generate voltages above VCC and below GND, so it can be close to "rail to rail". However, capacitance of FETs increases massively when Vds gets close to zero, so while it is very fast when Vout is away from the rails, it gets pretty slow and crummy when Vout is close to VCC or GND. So you must compensate the whole loop for that. Why do I emphasize rail to rail? CMOS opamps are popular at low power supply voltages when a rail to rail output is a very important feature to have, and you won't find this structure in these opamps. Middle: Common source complimentary Switching: This can have both FETs ON continuously (not at the same time of course) without needing any boosted supplies, which is convenient if you want a buck converter or any other switching circuit that can do 100% duty cycle. Also, if the output/input voltage ratio is low, the lower FET will be on most of the time, so a higher RdsON PMOS on top is less of a problem. Linear: This is your typical CMOS opamp output stage. It is rail to rail, and that will work down to a pretty low supply voltage. However it is more complicated to drive than the simple follower on the right, because it has two inputs instead of one. To bias it in Class A-B-AB properly, the sum of both Vgs must be constant and thermally compensated. In the follower configuration this is easy because there is one bias source labeled "V8" connected to both gates. In common source configuration, the sum of V5 and V4 must be held constant. Likewise the follower is easy to drive: it has one input. The common source requires a circuit to split the input signal into two complimentary halves to drive each FET. Left: two NMOS Switching: Since NMOS are faster, have lower capacitance, lower RdsON, etc, than PMOS, this circuit generally gives best performance for switching if you care about speed, RdsON, or cost. However it requires a boosted supply for the top FET. If you don't need it to be on continuously, this means a bootstrap, but if you do it means a charge pump. Since bootstrap requires a "large" cap, it can't be done in an IC without external capacitor. A charge pump can be done in an IC without external cap, but its output current will be tiny, so if you need speed... you'll need a decoupling cap. This is not the case for the NMOS/PMOS common source, which can switch fast without any help. Linear: Basically the same characteristics as the previous one, with the same drive complications, except it's more linear (due to both FETs being identical), the NMOS is faster than the PMOS, and it's not rail to rail unless the top driver has a boosted supply. So this can be used for discrete amps, but not in opamps. Cross-conduction: All of them can have cross-conduction. The common source stages will cross-conduct if the gate drive signals turn both FETs on, or if high dv/dt on the output, through Cds, pulls the gate of the FET that is supposed to be off in the direction that makes it turn on, and whatever circuit is in charge to keep Vgs=0V has too high output impedance. The common drain stage will cross conduct too, when it comes out of clipping, if the gate resistors values are too high and the driver slew rate is too high. If you use bootstrapped drive to turn one FET fully on, it will have a much larger capacitance than the other. When it tries to come out of clipping, this means the FET that was off, which has high Vgs and thus low capacitance, will charge its gate much quicker than the other through the same value gate resistor, and they will both turn on for a brief moment every time it comes out of clipping. If this goes on for enough cycles, the FETs will blow. Note the issue is the same with the other circuits in linear mode if they are used in rail to rail mode: the FET that is fully on turns off slowly, the other turns on quickly. BJTs have the same issue in common emitter if you let them go in saturation, they take forever to come out of it. Other linear considerations: The middle one (common source) is voltage in, current out, which means it is a transconductance stage. The transfer function is not Vout/Vin, but Iout/Vin instead. To get Vout/Vin, you must take into account the load impedance. If it is unknown when designing the circuit, then potential stability issues arise, so something needs to be done to keep the whole loop stable, either compensation or a HF load impedance stabilization (Zobel) network on the output. On top of that, it is inverting, which means at frequency low enough that the FETs still have gain, for constant AC output voltage you get a drive current proportional to frequency due to Miller effect through Cgd. Since Cgd depends heavily on Vds, and gm depends heavily on Id and Vgs, and transconductance when driven from a finite impedance is proportional to gm/Cgd your loop gain will be all over the place. But when the FETs run out of gain due to all the drive current being sunk into Cgs and Cgs, all you have left is Cgd which pumps the drive signal into the output, which means... it stops being an inverter. It's just a cap between gate and drain. So you get a 180° phase shift, at a frequency that depends on which FET is ON and how close to the rail the output is. This absolutely needs to be taken into account for loop stability. The follower is... a follower, so Vout/Vin is close to 1. This makes it simpler to compensate the whole loop. At high frequency, it also becomes a capacitor, but since it was not an inverter at low frequency, you don't get the 180° phase shift. Again, easier compensation. With discrete FETs, lead inductance will also mess it all up. The one on the left will switch between both modes depending on which transistor is on, if you make the mistake to think it is a follower. Note the drive current for all these is the same (ignoring differences between NMOS and PMOS). If you want an output voltage V, the load will want a corresponding current I to reach it, which means the Vgs of both FETs have to be brought to the same value no matter how they are wired, which means the driver will have to provide the same current to charge Cgs and Cgd in all cases.
H: Differential impedance matching Below is a small portion of a schematic which I have seen: It mentions that the transmission lines will have a differential impedance of 100 Ω between them. In case of single-ended it would be 50 Ω between signal and ground. Can someone help me understand how a single-ended 50 Ω impedance would look like a 100 Ω differential impedance, with a diagram? AI: I've drawn a schematic that might help: simulate this circuit – Schematic created using CircuitLab The single 50 Ohms is the impedance of a single-ended transmission line that has a ground connection. If you use two of those and operate them differentially !!! then the characteristic impedance can be treated as a 100 Ohms differential impedance. This 100 Ohm has no ground connection. But there's a ground between R7 and R8! Well spotted, but if the signal is purely differential then the voltage at that node will always be zero. If the Data+ = + 1 V and the Data- = -1 V then that node between R7 and R8 will be at 0 V anyway, the fact that it is connected to ground makes no difference! There is no current flowing into that grounding point, so nothing changes if we remove it resulting in R9 = 100 Ohms. Notes: the resistors show the termination resistors that are needed to properly terminate the transmission lines. Assume that the characteristic impedance of the transmission lines is always 50 Ohms in this example.
H: Logic level conversion between ESP32 and house alarm control panel I am trying to connect to my home alarm panel via it's built in serial port. It is made by Paradox and there is a GitHub project that I want to use to integrate the alarm into a smart home setup such as OpenHab or HomeAssistant. Some things I've learnt/discovered: The alarm panel's serial port uses 5V TTL for it's serial interface The serial port's power and GND is connected to the panel's AUX rail, which is at 12V. The ESP can survive 12V input, but the onboard regulator gets very hot. The ESP needs 3.3V for it's serial ports. The ESP32 I'm using is a NodeMCU32-S clone (link to the actual supplier I used). My initial solution From the same supplier as above, I got an LM2596 voltage regulator breakout board, and a logic level converter that I plan to use to take care of all the level and voltage conversions. My Problem My power source is the 12v rail from the alarm panel - I would like the whole thing to be self contained. I need to convert this 12v to 5v for the serial on the alarm panel's side, and I need a 3.3v source for the ESP32 side of things. My question Can I use the LM2596 to bring down the 12v to 5V and then power both the HV side of the level converter, and the ESP32 with it? Can I then use the ESP32's onboard regulator to further bring that 5V down to 3.3V, that I can then use on the LV input of the level converter? I'm asking before I do anything because the alarm panel is expensive and important for my home security. I don't want to do something that might destroy it. My electronics fu is extremely limited, and I learn as I go along. Proposed circuit See below my suggested circuit for this idea: Your assistance and expertise will be greatly appreciated! AI: Yes, should be fine. You better also connect the GND of the Paradox to the GND of the rest. Check the ESP32 regulator current capabilities if that is enough for the other boards. If you want to be sure, get another buck converter 12V -> 3.3V
H: Practical formula/method to predict the necessity of termination resistor I am not into high frequency much and just know about ringing caused by reflections due to impedance mismatching in transmission lines. So I recently saw some non-engineer researchers in a lab that they were measuring 3MHz signal with 1 meter 50 OhM coax cable and the cable was directly coupled to the scope input. In such electronic instrumentation I am wondering when would a 50 Ohm termination required. Is there a practical way to roughly tell whether 50 Ohm termination is necessary? (Assuming source impedance is negligible, 1 meter 50 Ohm coax cable, and a 3MHz signal, scope input impedance is 100Meg) AI: In such electronic instrumentation I am wondering when would a 50 Ohm termination required. Is there a practical way to roughly tell whether 50 Ohm termination is necessary? If you are transmitting a clock signal i.e. a square wave to a high impedance load at the end of a cable (aka transmission line) AND all you are interested in is receiving a "decent enough" waveform at the end of the cable then we have a rule of thumb: - Terminations are only required if the highest frequency of interest (that we need to keep a decent-looking waveform) has a wavelength that is at least 10x longer than the electrical length of the cable. 1 meter 50 Ohm coax cable, and a 3MHz signal So, with a 3 MHz square wave, we might consider that the 7th harmonic of 3 MHz (21 MHz) is the highest frequency we need to be interested in maintaining. That has a wavelength of 14.28 metres and that is 10x more than the electrical length of the cable. Under these circumstances (clock transmission) we would be OK. However, we can look at it from the perspective of the 1 metre cable and say that the we should not try and transmit a signal (without a proper termination) that has a wavelength of greater than 10 metres. That would be a frequency of 30 MHz. Of course, different applications have different requirements and this rule of thumb won't perfectly suit every application.
H: Is it possible to solder a USB cable directly to a board? I'm working on a design for a PCB carrier for Raspberry Pi Compute Module 4, and I need to connect by USB 3.0 a wire to this carrier board. Is it possible to solder it directly to the PCB in order to save space? AI: Yes, but no. The leads are very thin, so you need to accommodate some form of stress relief, if not they will break if you sneeze in the room next-door. This stress relief will probably need as much, if not more, real-estate on the board as a connector. Secondly most USB leads isolation are made of PVC plastic that will melt as you solder. This will almost guarantee a short-circuit sooner or later. You can get lucky and find some that are made of a more heat resistant plastic, but most of the time this is not listed in datasheets so these are tricky to find. Thirdly you will no longer have the continuous shield around the leads, this will almost certainly degrade the performance.
H: Reverse voltage protection using N channel MOSFET I was looking for a reverse voltage protection for the 100 ohm load in the circuit using an N-channel MOSFET, this is my design. The Zener diode is for gate voltage and of 5.1 volts, assuming the MOSFET wont turn on if the gate voltage is 0.7 volts, is the schematic topologically correct? (actual MOSFET parameters may not match) AI: If you are committed to using an n-channel FET, place it in series with the negative side of the voltage source. With the drain to the - input and the source to the load, this orients the internal body diode correctly for blocking a reverse voltage connection when the FET is off. NOTE: The internal body diode actually is a zener diode, not a simple rectifier. If the reverse voltage is high enough, the diode will conduct. The zener conduction voltage always is greater than the FET's maximum drain-source voltage rating, and should be on the datasheet for the FET. Here is an excerpt from an old project. When the correct voltage is applied. current through the load and the body diode creates a voltage drop across the load, which drives the source away from the + input and the gate, which turns on the FET, which shorts out the body diode for much better efficiency.
H: VHDL: on variable declarations to act as register I am currently a CPE student taking up computer architecture, learning how to model major computer components using VHDL. Currently, I am working on a shift register as a sub component for a top-level design. I have a script written and somehow my outputs are not what I expected it to be and I can't seem to find the answer why. I'm also having a hard time looking for similar queries online so I hope someone could guide me on this one. The .vhdl and testbench scripts are shown below: --- MAIN SCRIPT > library IEEE; > use IEEE.STD_LOGIC_1164.ALL; > use IEEE.STD_LOGIC_UNSIGNED.ALL; > > entity prodreg is > Port ( > clk : in STD_LOGIC; > load : in STD_LOGIC; > shift : in STD_LOGIC; > a_in : in STD_LOGIC_VECTOR (7 downto 0); > q_in : in STD_LOGIC_VECTOR (7 downto 0); > q_out : out STD_LOGIC_VECTOR (7 downto 0); > a_out : out STD_LOGIC_VECTOR (7 downto 0); > q01 : out STD_LOGIC_VECTOR (1 downto 0)); end prodreg; > > architecture Behavioral of prodreg is > > begin > process(clk) > -- registers for q and q > variable p_q : STD_LOGIC_VECTOR (7 downto 0) := q_in; -- q (multiplier) being processed > variable p_a : STD_LOGIC_VECTOR (7 downto 0) := a_in; -- accumulator being processed > begin > if load <= '1' then > p_a := a_in; > end if; > if rising_edge(clk) then > if shift = '1' then -- conduct arithmetic shift right > p_q(6 downto 0) := p_q(7 downto 1); -- do shift right for Q > p_q(7) := p_a(0); -- save LSB of A in MSB of Q > p_a(6 downto 0) := p_a(7 downto 1); -- do shift right for A > end if; > end if; > q01(1) <= p_q(0); -- save LSB of Q in 'x.' of q01 (x is the position of bit) > q01(0) <= p_q(1); -- save LSB of Q in '.x' of q01 (x is the position of bit) > q_out <= p_q; > a_out <= p_a; > end process; > end Behavioral; --- TEST BENCH > library IEEE; > use IEEE.Std_logic_1164.all; > use IEEE.Numeric_Std.all; > > entity prodreg_tb is end; > > architecture bench of prodreg_tb is > > component prodreg > Port ( > clk : in STD_LOGIC; > load : in STD_LOGIC; > shift : in STD_LOGIC; > a_in : in STD_LOGIC_VECTOR (7 downto 0); > q_in: in STD_LOGIC_VECTOR (7 downto 0); > q_out : out STD_LOGIC_VECTOR (7 downto 0); > a_out : out STD_LOGIC_VECTOR (7 downto 0); > q01 : out STD_LOGIC_VECTOR (1 downto 0)); end component; > > signal clk: STD_LOGIC; signal load: STD_LOGIC; signal shift: > STD_LOGIC; signal a_in: STD_LOGIC_VECTOR (7 downto 0); signal > q_in: STD_LOGIC_VECTOR (7 downto 0); signal q_out: STD_LOGIC_VECTOR > (7 downto 0); signal a_out: STD_LOGIC_VECTOR (7 downto 0); signal > q01: STD_LOGIC_VECTOR (1 downto 0); > > constant clock_period: time := 10 ns; signal stop_the_clock: > boolean; > > begin > > uut: prodreg port map ( clk => clk, > load => load, > shift => shift, > a_in => a_in, > q_in => q_in, > q_out => q_out, > a_out => a_out, > q01 => q01 ); > > stimulus: process begin > > load <= '0'; > shift <= '0'; > a_in <= "10001111"; > q_in <= "00000101"; > wait for 5ns; > > load <= '1'; > shift <= '0'; > wait for 5ns; > > load <= '0'; > shift <= '1'; > wait for 15ns; > > load <= '0'; > shift <= '0'; > wait for 5ns; > > load <= '0'; > shift <= '1'; > wait for 10ns; > > load <= '0'; > shift <= '1'; > wait for 10ns; > --stop_the_clock <= true; > wait; end process; > > clocking: process begin > while not stop_the_clock loop > clk <= '0', '1' after clock_period / 2; > wait for clock_period; > end loop; > wait; end process; > > end; The model is designed to act as an arithmetic shift register where it takes two 8-bit numbers, 'a' and 'q', and execute the mentioned shift as a 16-bit respectively. The output should be the mentioned 8-bit numbers and the last two bits of q (q0 and q1, hence, q01). I used variables because I learned that it's suppose to act as a register so that I could save and use data from the previous process. As 'a' and 'q' always shift per cycle, only a changes upon 'load'. Additionally, the model is also suppose to represent an accumulator (hence the loading of 'a', and the need of retaining 'q' and 'a' within the component). But as shown in the test bench, the 'q' throws U values I can't seem to understand why, and as for the q, I expected it to shift normally assuming its taking on the retained q value from the variable declaration. I've modeled another sub-component which was a decrement counter and scripted it the same as this one where the variable declared is 'variable counter : STD_LOGIC_VECTOR (3 downto 0) := "1000"' instead. On that simulation, the results were correct as it was decrementing from 8 to 0. Can anyone tell me advice or my mistake on this one? Help will be very much appreciated. AI: The initial value declaration on p_q loads the port state at initialization time, when it is still undefined, and the load = '1' code does not reload p_q. I'd also omit the initial value declarations or explicitly write (others => 'U') so simulation and synthesis behave the same. Also, these variables can be signals.
H: Correct calibration of reflection (S11) measurement Following situation (apologies for my potential stupidity, I am very new to RF): I am doing a reflection/S11 measurement using a cut-off piece of coaxial cable (no stub, just a straight cut). The idea is to get the reflection response of a circuit to be touched/approached with said cable ("the probe"). Now, my first approach was to do a measurement of the S11 coming from the probe without any sample, so just using air as termination and then to subtract it from whatever I get when attaching the probe to the sample. But this obviously does not take into account that there are standing waves (and plenty thereof) in the piece of cable I am using as a probe which behave differently with the different termination that is the sample and thus will show up in my measurement and look bad. They occur at more frequencies than the fairly broadband behaviour of the circuit, but they still don't look good. Is there a way, ideally by calculation, to eliminate the influence of these standing waves / the probe? AI: Yes what you are planning on doing is very common in RF measurements. You need to follow the well established process of 1 port calibration. You will need 3 calibration standards Open, Short and Load to determine the three error terms involved and eliminate them. See this, page 12 specifically http://emlab.uiuc.edu/ece451/appnotes/Rytting_NAModels.pdf
H: 5V regulator circuit with MOSFET. Will this catch on fire? I have a circuit that takes a 5V output from a USB bank with 10000mAh and supplies MOSFET1, whose drain (5Vgreeni) then goes through a fuse to a 5V regulator circuit. I don't have any heat sinks or fans. The power supply needs a capacity of 2amperes but will most likely regularly consume about 700mA. Based on this I don't think my MOSFET1 (FQP47P06) needs active cooling or a heatsink, but there is another MOSFET in the circuit that is a bit smaller and I am not so sure about it. With the ambient temperature in the box exceeding 100F at times I am concerned that this may be a fire hazard. Should I be concerned about DMG2305UX-7? Edit here is another diagram of the circuit: AI: Ron=52 mOhm @ 4.5V seems appropriate until you compute load current of whatever you are applying. Consider PdRjc \$=\Delta T\$ rise (23’C/W = Rjc) for a SOT-23 as the temp. risk of burning your finger. Compute and then You decide if it exceeds 55’C on the case to your finger. Fire is unlikely. \$\Delta T_{case}= I^2 52 m\Omega * 23 ‘C/W\$ But you chose the wrong FET type instead of a logic level type with Vgs(th)=-0.9V MAX, you chose an old standard threshold TO-220 FET with 4V max threshold @ -250uA So instead of 25mOhms you are not in full conduction yet and it appears from the plots that with a 10% drop in Vds from 5 or 0.5V at some high current like 2.4A or 12W this FET will be drawing constant (ish) current vs Vds meaning 10% of the sourced power is wasted in the FET and 1.2W with a thermal resistance from junction to ambient of almost 100’C (epoxy is an insulator) your junction temp is 120’c above ambient of 25’C or exceeding spec or “burning up electrons of material” thus satisfying the Darwinian Arhennius Law of reduced MTBF. So you need a 2 to 4W heatsink. Next time choose a “Logic Level FET” It won’t burn your finger but the junction is saying ouch at max power right now.
H: What does apostrophe mean for a register description in a datasheet e.g. 4'd5? The datasheet lists something like this: [0x01f] EPRXREG EPRXLock[3:0] = 4'd5; EPRXReLock[3:0] = 4'd5 I understand that it is an 8-bit register at address 0x01f, it contains 2 fields and each of them is 4 bits wide ([3:0] and the 4 in 4'd5). But what is 'd5? Other registers have 4'd12 1'b0 4'h4 4'hF 7'd32 AI: 4'd5 indicates a four-bit value, expressed in decimal as 5. It's the same as 4'b101 (1012 = 510). Likewise, 4'hF is a four-bit value indicating 0xF in hex; octal may also be seen (e.g. 4'hF can also be denoted as 4'o17)
H: How Dual MOSFETs are used in Power Management or Protection circuits? I'm learning the basics of MOSFETs and came upon these common-drain, dual MOSFETs in single package, AFN8205: It seems they are used for some specific applications (e.g. load switch) as noted by manufacturer. one of its common application would be the switch for DW01 battery protection IC. (the left portion of circuit containing the TP4056 charger are not considered in this question): I had some problems understanding why the the 2 MOSFETs are used symmetrically and how they would turn on at all in this specific circuit. I tried to solve the circuit for the case for when the 2 MOSFETs are turned on for normal operation of the load (no overcharge nor over-discharge). Both MOSFETs gates charged by control circuit: In this case the GND of the battery should be connected to GND of the circuit. the current should flow through both MOSFET while they are ON so the internal diodes are not dropping voltage and wasting energy. simulate this circuit – Schematic created using CircuitLab The right MOSFET turns on, because the gate voltage, Vgs (from the control circuit), is bigger than 0V of the source or the battery's negative pole (assuming the gate threshold is reached). The voltage at the common-drain would be ~0, equal to battery's negative pole and a tiny value considering the current flowing through Rds of the MOSFET. the Rds is <50 milli ohm for this particular MOSFET. The load which is turned on by now because of the internal diode of the left MOSFET, and is getting a voltage of ~0+1V because of the forward drop of the left MOSFET's diode. The left MOSFET turns on because of the assumption that the Vgs would be greater than threshold and ~1V of the source. Here comes the problem. why the left MOSFET turns on when its drain-source voltage is "-1V"? the MOSFET only turns on when the drain source voltage is above a limit: So, what's wrong? AI: Here comes the problem. why the left MOSFET turns on when its drain-source voltage is "-1V"? It's not a problem; MOSFETs are 4 quadrant devices in that they can fully turn on even when the drain source voltage is reversed providing the gate voltage is sufficiently more positive (NMOS) than the source voltage: - Image from here. the MOSFET only turns on when the drain source voltage is above a limit Not true.
H: What is a DC block and how can I put this on a PCB? The circuit diagram that I am trying to replicate casually mentions a component called "DC block" but doesn't go into details. I believe this has something to do with RF filtering? Will I be able to solder a component onto a PCB to perform this function? The component is located at the RF_in pin of a GNSS module. page 15 of the document below hardware integration AI: It's just what the symbol shows, a 47pF capacitor (which blocks DC from the bias supply). Use any small SMT part rated for adequate voltage (eg. 0603 NP0 type). Bias is typically something like +5V, so a typical 50V-rated capacitor is more than adequate.
H: Why is the internal resistance of BJTs considered in small signal AC analysis but not in DC analysis of BJT amplifiers? Specifically, I want to know why "r" parameters are considered in AC analysis but not in DC. I am reading from Electronic Devices by Floyd. For example, in the picture below, VBE is calculated by multiplying IE with r'e, but if it were DC analysis, we would consider VBE approximately 0.6-0.7 Volts. I am a newbie in electronics, so probably there is something I missed about the analysis of BJT amplifiers. AI: I'm sure you've encountered the idea of the slope of a curve, before. It's the first thing they teach when learning calculus. Remember this formula? $$f^{'}\!\!\left(x_0\right)=\lim_{h\to 0} \frac{f\left(x_0+h\right)-f\left(x_0\right)}{h}$$ It's just the local slope of the curve at \$x_0\$. The dynamic resistance is like that, except that the curve is related to the Shockley diode equation (as it applies to the BJT): $$I_\text{C}=I_\text{SAT}\cdot\left[\exp\left(\frac{V_\text{BE}}{\eta \:V_T}\right)-1\right]$$ That non-linear curve looks like this: On the right, I've expanded the view of the quiescent Q-point (the operating point) for the BJT amplifier. (You usually select some point on the curve where the circuit operates when there is no input signal to worry about, around which the circuit is supposed to operate when the AC signal is applied.) As you can see, for tiny changes nearby the Q-point you can approximate the curve with a simple line (the line that is tangent to the Q-point on the curve.) In no way is this an actual resistor that works like a resistor with DC applied to it. Real resistors actually are lines and they don't have a voltage across them when there is zero current, for example. Note that this slope intersects the x-axis somewhere to the right of zero? It's just the local slope at the Q-point and for small (AC) changes nearby, you are allowed to assume (for simplification purposes) that it holds for AC changes. Now, if the changes are large enough then this slope fails. But once this dynamic resistance slope is no longer valid you are, by definition, no longer talking about small signal changes (the usual "AC" assumption) and have moved into the domain of large signal changes. Of course, in practice people act as if their input signal is "small" enough that the dynamic resistance is always valid when, in fact, it really isn't. It's not uncommon for amplifiers to be operated in such a way that the operation moves up and down the Shockley curve far enough that the local slope value changes enough to matter. In these cases, it's broadly called distortion. This means that the Q-point dynamic resistance slope that was assumed valid, isn't sufficiently valid over the actual operating range. As a result, the output signal will be distorted somewhat (the non-linear curve interacts with it.) How much that may be acceptable is one of those design decisions that engineers make all the time. So, that's about it. I'll now derive it from the above collector current equation so that you can see how it falls out using derivatives: $$ \newcommand{\dd}[1]{\text{d}\left(#1\right)} \newcommand{\d}[1]{\text{d}\,#1} \begin{align} I_\text{C}&=I_\text{SAT}\left[e^{^\frac{V_\text{BE}}{\eta\,V_T}}-1\right]\\\\ \dd{I_\text{C}}&=\dd{I_\text{SAT}\left[e^{^\frac{V_\text{BE}}{\eta\,V_T}}-1\right]}=I_\text{sat}\cdot\dd{e^{^\frac{V_\text{BE}}{\eta\,V_T}}-1}=I_\text{SAT}\cdot\dd{e^{^\frac{V_\text{BE}}{\eta\,V_T}}}\\\\ &=I_\text{SAT}\cdot e^{^\frac{V_\text{BE}}{\eta\,V_T}}\cdot\frac{\dd{V_\text{BE}}}{\eta\,V_T} \end{align} $$ Since \$I_\text{SAT}\left[e^{^\frac{V_\text{BE}}{\eta\,V_T}}-1\right]\approx I_\text{SAT}\cdot e^{^\frac{V_\text{BE}}{\eta\,V_T}}\$ (the -1 term makes no practical difference), we can conclude: $$ \begin{align} \dd{I_\text{C}}&=I_\text{C}\cdot\frac{\dd{V_\text{BE}}}{\eta\,V_T} \end{align} $$ From which very simple algebraic manipulation produces: $$ \newcommand{\dd}[1]{\text{d}\left(#1\right)} \newcommand{\d}[1]{\text{d}\,#1} \begin{align} \frac{\dd{V_\text{BE}}}{\dd{I_\text{C}}}&=\frac{\d{V_\text{BE}}}{\d{I_\text{C}}}=\frac{\eta\,V_T}{I_\text{C}}=r_e^{'} \end{align} $$ Note: It's perfectly fine to use \$I_\text{E}\$ instead if \$I_\text{C}\$ when computing \$r_e^{'}\$. But in active mode situations where \$r_e^{'}\$ is important for AC analysis, the difference isn't worth worrying about. The actual circumstances for any real parts in a real circuit with wash out any such slight difference, anyway. So don't sweat it.
H: Can I use two arduino output pins to simulate a RS422 trigger? I have measuring wheel encoder like this one, which outputs its position using two RS422-encoded pin pairs, standard quadrature encoding. Note that these are not using the RS422 communication protocol, just the 2-pin differential encoding that RS422 uses. This is connected to a bespoke PCB that includes a microcontroller, which was designed and programmed by some company for us, which basically counts pulses (and does a bit more which isn't relevant here) As the software seems to have some bugs, I'd like to create a reproducible test environment, where I can simulate the wheel encoder turned at a specific rate, translating to a fixed, but configurable, frequency. My idea was an Arduino which I can write a small control program for, use the Arduino's GPIO pins to simulate the encoder's output, and connect that to the encoder input of the bespoke PCB. As I'm not using RS422 to actually transmit bytes, just differential trigger signals, my idea is to set one GPIO pin to 1, another to 0, wait for half the pulse time, revert those signals, wait another half pulse time, and repeat from start. (Actually, I'll need 4 pins, to simulate A and B, and cycle between "set A to 1/0", "set B to 1/0", "set A to 0/1", "set B to 0/1"). A) Will this work? As far as I know, the only thing that's relevant is the differential between the two pins, and the +/- 5V between those pins should work well with the input chip of the PCB, which is a THVD2450. B) Do I have to connect the Arduino's GND to the PCB's GND, or shouldn't I, to avoid any current loops? AI: A) it should work. It should also work with one GPIO pin if correctly biased. You could use Arduino, but you might have an XY problem, if you are looking for ways to test this but have already chosen to do it with Arduino. It could perhaps be simpler to get a waveform generator so you don't have to build or program anything. B) Of course ground must be connected, or you risk exceeding common mode voltage limits. Also do note that RS422 is a standard for electrical interface only, it is not a communication protocol and thus transmitting bytes has nothing to do with RS422 itself.
H: Please review my LED driver circuit I have drawn a schematic for a simple LED-driver. It is nothing special, but how can I try circuit out? Some parts are only available in SMD. So my idea is that some one looks it over before I send it to the manufacturer. With the MOSFETs in SMD, how big must be the thermal pad of each MOSFET be if it must handle 5 amperes? The final MOSFET is an IRLZ44ZSTRLPBF. AI: With the MOSFETs in SMD, how big must be the thermal pad of each MOSFET be if it must handle 5 amperes? The final MOSFET is an IRLZ44ZSTRLPBF. There are too many unknowns to solve this mathematically. But to get you started: irlz44zpbf datasheet bottom of page 1: "62 RθJA Junction-to-Ambient (PCB Mount) = 40°C/W". This means that for the minimum pad shown at the end, the die temperature will rise 40°C for each watt of power dissipated. When the MOSFETs are off, no power is dissipated. When on, they act like (at best) a 13.5mΩ resistor. 5A * 13.5mΩ = 67.5mV. 67.5mV * 5A = 0.3375W. So if continuously on, each will waste 0.34W as heat. Since RθJA = 40°C/W, 0.34W * 40°C/W = 13.5°C rise in die temperature. Totally fine. The trouble happens during the time the MOSFETs are switching on and off. If that could be impossibly fast, then it would not matter. But nothing can switch instantly, so there is a period of each transition where the MOSFET is in it's linear region (acting like a resistor, but with a value greater than 0.0135Ω.) In this period, the MOSFET drops lots of power as heat. The faster the PWM frequency, the more transitions there will be per second, so the more this will matter. When high-speed, fast switching is required, often a MOSFET gate driver IC is used. The ATMega can probably source and sink 20mA from it's pins, which will be the dominating factor in how quickly the MOSFETs can switch. A gate driver IC however, is often designed for an amp or more of drive current, which greatly speeds up switching. If you're not concerned about wasting power as heat due to slow switching, it may be possible to use the existing schematic with large copper pads on the MOSFETs. My gut instinct is that it will get hot though. If you want to conserve power and lower heat, gate driver ICs are the way to go.
H: Raspberry Pi Single-channel relay with 6 pins pinout decipher needed I've got this single-channel relay for my Raspberry Pi. The relay has 6 pins instead of the usual 3, more over out of the box there was a jumper connecting 2nd and 3rd pin (I'm counting pins from top to bottom starting with 1). This is my first ever interaction with both relay and a Raspberry Pi. Why is there a jumper on the relay? And how to use it? I've hooked up 1st pin to 5V PWR GPIO on Raspberry Pi, 4th pin to GPIO4 and 6th pin to GND. In given configuration LED on relay board lights up whenever I send GPIO.LOW output on GPIO4 but relay isn't clicking. AI: This is a 12V relay, so you need a 12V power source to operate it. I'm not sure if your raspberry pi GPIO will be able to operate it even if you provide 12V to VCC. You may want to get 5V relays like this that are designed for the raspberry pi.
H: How much voltage before Zener diode will be physically damaged? I have this 1N4742 Zener diode which is specified to have 12V nominal Zener voltage. What will happen when I apply a 20V as a source voltage for circuit containing the mentioned Zener diode? AI: If you do this, it will go "bang!": simulate this circuit – Schematic created using CircuitLab The Zener diode will act like a short circuit, and try to pass all the current the supply can deliver. If you do this, it will be fine: simulate this circuit The difference between "bang!" and OK is that resistor. It limits the current through the Zener diode and allows it to safely regulate the voltage. In the circuit as shown, the current through the resistor is \$I = \frac {E}{R} = \frac {V_{Supply}-V_{Zener}}{R1} = \frac {20V - 12V}{1000 ohm} = \frac {8V}{1000 ohm} = 8mA\$. Since the resistor and the Zener diode are in series, the current through the diode is the same as the current through the resistor. As long as the Zener current is below the maximum rated current and the product of the current and the Zener voltage is less than the power rating for the diode, then the diode will be fine.
H: Truncate 16-bit number in Verilog Given a [15:0] number (there is no fractional part, only integer). How do I truncate the lower two bits [1:0] and round it off to the closest possible value? Consider a case where no overflow happens. I need to do it in Verilog. input [15:0] A; output [13:0] B; AI: To implement rounding, you'll need an incrementer (add 1) for the round-up case. Let's assume the rounding behavior you want is as follows: lsb's = 0,0: truncate (round down) lsb's = 0,1: truncate (round down) lsb's = 1,0: round up lsb's = 1,1: round up The Verilog would look something like this: wire [15:0] A; wire [13:0] Y; wire [0:0] round_up; assign round_up = A[1:0] >= 2'b10; assign Y = A[15:2] + round_up; The sharp-eyed among you will see that the increment select can be simplified as: assign round_up = A[1]; And you can suppress the wraparound case with one more trick, giving: assign round_up = A[1] && ~(A[15:2] == 14'h3fff); // catch the wrap case assign Y = A[15:2] + round_up; I'm sure there's other ways to code this, but they will all include at least the adder and the overflow range check to prevent wrap (that is, saturation.)
H: Uncertain of 8-bit vs 32-bit alternatives to AVR32 I was browsing a distributor to find options for simple 8-bit and 32-bit RISC uCs and came across AVR32. After some searching on the web, it seems that AVR32 is a bit dated and possibly not a good choice for long term sustainability. (I am unfamiliar with what’s popular in 2021) As someone with limited experience, mostly in C with Arduino development kits, what alternatives exist to AVR for 8-bit and 32-bit that are 1) not near end-of-production life cycle 2) have strong support via communities & examples and 3) do not require an OS? (not looking for a microprocessor) Context: I am eventually looking to design a custom PCB for my project. Also, my project is a simple feedback loop that uses some basic sensors and a motor... I believe a microprocessor is certainly an overkill for my project in terms of infrastructure and cost, so I am specifically seeking microcontrollers. AI: The AVR is popular because of Arduino. The AVR32, considerably less so, and there are variants of it going end-of-life. It would not be a good investment, given better-supported options out there. The most popular 32-bit devices are ARM-based, which would include: STM32 (ST Micro - huge range of choices) i.MX6 / MX8 family (NXP, also very extensive range) BCM2837 (Broadcom, used on Raspberry Pi) Rockchip RK3399 As well as Allwinner, etc. Some of the boards using these adopt Arduino-like footprints to address that mindshare and take advantage of that ecosystem. Others knock off Raspberry Pi (e.g., OrangePi, which uses Rockchip.) Another popular platform is ESP32 from ExpressIF, which uses a Tensilica core. It's very low cost and includes wifi. I'm basing this on the number of questions that seem to come up here. I'm leaving out dozens of others, notably MIPS (very old, but still used in a lot of wifi routers, sorry @jonk) and Risc-V types (still kind of new, not popular outside of China yet.)
H: Two sine wave of 0 to 5V,with a frequency of 500Khz. How do I find the phase difference between the two sine wave I have two sine wave with a frequency of 500Khz, and voltage range of 0 to 5V. I would like to detect phase difference between the two sine wave; especially, when the phase difference between the two sine wave signal is zero. I can think of PPL (Phase Locked Loop) but I am unsure. Any help is appreciated. AI: You need a phase error detector. A classical, because cheap, easy, relatively noise-tolerant and clever way to do that is "slice" these sine waves so that they become bipolar square waves (e.g. by amplifying them very much and clamping them, or comparing them to 0V, or...) XOR the two (e.g. with 74xx logic gate) average the result over time (e.g. with a simple low-pass filter). Since the time that these two square waves don't have the same sign is proportional to the phase between them, and XOR is only high when its two inputs are different, the average of the output is proportional to phase. That's how a lot of PLLs implement their phase error detector.
H: Why is the Irms so different from Isat in different power inductors? I'm looking at power inductors for a DC-DC boost converter clocked in the 500KHz range (but KHz could change if necessary). Here are two examples: Example 1: Irms=55A, Isat=140A, 70nH Example 2: Irms=74A, Isat=65A, 70nH In both cases they are rated at +40°C. Questions: Why does Example 2 have a higher Irms than Isat? What causes Example 2 to be the opposite of Example 1? Other considerations? AI: The two values are measuring different parameters. Irms is just relating to the temperature rise without regard to any magnetic properties changing. If an inductor was wound with heavier wire it would have a higher Irms rating but the heavier wire would not affect the inductance significantly. Isat is the current for the inductance to drop by some specified amount, 20% in these examples. The first inductor could be used with a waveform that peaked at 140A but the RMS value would have to be limited to 55A to avoid greater than 40C temperature rise. The second inductor could only be used with a signal that peaked at 65A. It doesn't seem that it could be used meaningfully with 40C temp rise rating but if you wanted to keep the temperature rise to about 30C the maximum current for saturation and heating would be similar.
H: How sensitive are laptop barrel jack sizes? In particular, is a barrel jack described as 1.35mm x 3.5mm likely to work with a socket made for a 1.3mm x 3.4mm jack? AI: Strictly speaking manufacturing tolerances mean that there is some play between stated sizes and actual product. This applies in both directions too big and too small. When you vary too much from the nominal sizing then insertion and contact will be affected. Too loose or tight. Intermittent connections etc. Specifically your outer diameter is larger which means it may not fit in the hole, or if it does it may stretch out the outer contact. Probably fine enough. Your inner diameter is also larger. As this one tends to be a press fit sizing it may not even touch the inside unless jammed to a side. If you jiggle it it will break and make contact. Or it may be close enough to work. You can test to see. As mentioned in comments, if it gets too hot it may have a poor contact and thus high resistance. This is more important for high current applications. Heat is bad.
H: Verilog - Use integer constant to define signal width I have a module which takes two parameters, ParameterOne and ParameterTwo. I use their ratio a lot, so I gave it a name const integer Ratio = ParameterOne/ParameterTwo. I want to have a signal whose width is this ratio, so I defined a signal logic [Ratio-1:0] wires. However, I get the error message Range must be bounded by constant expressions. This leaves me perplexed, as this range is bounded by a constant expression (I explicitly declare it to be const). Does anyone here know why it's complaining about this code? AI: Although the terminology sounds similar, there are big differences between a constant expression and a const variable. A constant expression is an expression whose operands are made up entirely of parameters and literals. Its value gets resolved as part of the compilation and elaboration process, before time 0. A const variable is a variable that is written once at initialization, and you can never write to it again. The initialization can happen at any time based on the beginning of the variables lifetime, and can include the values of other variables that are not const. The earliest is at time 0 for static variables. You should write this using a parameter or localparam` localparam int Ratio = ParameterOne/ParameterTwo; A localparam is just a parameter that cannot be overridden.
H: What to do with unused open drain pins I have a light sensor IC. I have 2 questions: The I2C Lines is connected between the microcontroller (3.3V domain) and the light sensor IC. The microcontroller is placed on a PCB and the light sensor is placed on a separate PCB. Both PCBs are connected by a cable of length 30cm. In this case, is it correct to place the pull ups of the I2C near the microcontroller on the microcontroller PCB, or should I place it on the light sensor PCB? As far as I have read, the pull-up resistors should be placed close to the master and hence I am thinking it should be placed close to the microcontroller. Please confirm. I am not planning to use the INT pin. INT is an open-drain output pin from the datasheet. I don't want to use that pin because it will help in one connector pin less. So, in order to not use the INT pin, what should I do? The datasheet doesn't recommend what to do with unused pins. So, what should I do? As far as I know, since the INT pin is an open drain pin, can I leave it floating. Please confirm. AI: These are really two different question: How to handle unused open drain pins, and How to properly terminate I2C bus lines For the first part it's easy: you simply do not connect them. Or you can also tie the to ground if it helps (usually for thermal conduction). The internal structure is simply a MOSFET with the source to ground and the drain… open (and some ESD protection structure, usually). Just don't tie it to something else different than a ground. As for the second question, there is a somewhat detailed explanation in the I2C specs (download from NXP) but in short there's and easy rule: pull them up somewhere to the relevant supply with some kiloohm of resistance. I2C is not impedance controlled so it's not really important where or how you do it. It could be argued that more or less on the middle could be slightly better. The bus itself is multimaster (or at least it can be) so there's not a preferred signal generation point. So just place the pullups where convenient. As for the value, that is somewhat important. The pullup resistor create an RC circuit with the parasitic track capacity. In short, a bigger resistor causes a longer rise time which could violate the timing specs. A too small resistor would overload the bus drivers. Unless you have a really long or populated bus or you are doing high speed I2C it really doesn't matter. Popular values are 2k2 or 4k7 ohms. In case of trouble check with a scope and tune them.
H: Which alcohol is bad to use when cleaning computers? I heard there are some alcohols that are prohibited to be used when cleaning a computer or an electric device. Apart from beverages, which ones are these? AI: You would want to use as clean alcohol as you can get hold of. It doesn't really matter if it is ethanol, methanol or isopropanol. As mentioned in the comments low content alcohols may contain additives that will be left behind as impurities. Antisepctics and such are not suitable at all. A nice test is to wipe some of the alcohol on a glass plate. Once the alcohol vaporizes you should see none or almost none impurities left behind. If there is oil present you will get that oily "rainbow" effect. Several users have posted safety concerns on methanol, so don't use that. But: all of these are strong chemicals and should be treated as such. Use gloves, work in a ventilated area, and perhaps stating the obvious: They are all extremely flammable.
H: How is the feedback estimated in the torque mode control of a servo motor? The torque mode control of a servo motor requires the feedback of the current torque generated by the motor in order to compare it against the torque reference signal. Is the product \$K_t I\$ of the torque constant \$K_t\$ with the measured (perhaps filtered to denoise) motor current \$I\$ the only method to estimate the current generated torque in real-time? Additionally, is the position-velocity-current cascade control loop schematic shown on the linked webpage in error, since it does not explicitly illustrate the torque feedback? Finally, if the schematic is indeed accurate, then is it correct to say that a motor can be run in position mode or torque mode at a time and not both at the same time? AI: Is the product KtI of the torque constant Kt with the measured (perhaps filtered to denoise) motor current I the only method to estimate the current generated torque in real-time? You are asking whether the current measurement is the only way to estimate current. The answer is that it is the most straightforward method. Additionally, is the position-velocity-current cascade control loop schematic shown on the linked webpage in error, since it does not explicitly illustrate the torque feedback? This one? It's ok, since the box Drive gets a current command and it outputs current, so this is a torque/current controller. It's usually a PI controller with current feedback. Finally, if the schematic is indeed accurate, then is it correct to say that a motor can be run in position mode or torque mode at a time and not both at the same time? Basically you are correct. But it can also do positioning with reduced torque, if the current command is limited to max/min value. But usually an industrial servo drive is a cascade of at least velocity and current controller, so the input is a velocity command and the encoder feedback is connected to it. It can switch the topology of the cascade, so that if the torque mode is enabled, the velocity controller is disabled but the torque is limited (in both situations: velocity/current or extended: position) for maximum speed \$\omega_{max}\$, maximum inverter power \$P=V\cdot I, \;T_{max}=k_t\dfrac{P_{max}}{V}\$, maximum motor current \$T_{max}=k_t\cdot I_{max}\$, maximum motor power \$T_{max}=\dfrac{P_{max}}{\omega}\$. EDIT: The pre-process of torque/current setpoint, the input is the speed controller output (M=Torque), output goes to current controller input. Speed controller (PI) with feed-forward path for friction, inertia, dead weight.
H: Do lead and lag filters have the behavior of high and low pass filters even if the zero and pole used are complex? Consider the compensation transfer function \$\frac{s+z}{s+p}\$ so that the inequalities \$0<z<p\$ and \$0<p<z\$ correspond to lead and lag compensation respectively. At very low frequencies of input signals \$\|s\|\approx0\$, and at higher frequencies of the input signal \$\|s\|\approx+\infty\$. Therefore, the gain due the lead compensation at very low frequencies is \$\approx \frac{\|z\|}{\|p\|}<1\$ and at very high frequencies is \$\approx 1\$, while the gain due the lead compensation at very low frequencies is \$\approx \frac{\|z\|}{\|p\|}>1\$ and at very high frequencies is \$\approx 1\$. This indicates that lead compensation attenuates lower frequency signals while lag compensation amplifies high frequency signals. In fact, the classical high pass filter (\$\frac{s}{s+p}\$) is recovered from the lead compensator in the limit \$\|z\|\rightarrow 0\$, while the classical low pass filter is mathematically identical to the the lag compensator for high values of \$\|z\|\rightarrow +\infty\$. In general, lead and lag filters have the behavior of high and low pass filters. Is it accurate to say that this similarity with respect to the objective of filters holds true even if (either or both of) the zero and pole used are complex? AI: It's possible you're overthinking this. \$s\$ is the Laplace notation for the complex frequency, \$j2\pi f\$, or \$j\omega\$, and it spans the entire frequency range. When you're saying that \$\|s\|\rightarrow0\$ or \$\|s\|\rightarrow\infty\$, what you're probably referring to is the frequency, itself, as it approaches DC or as it goes to infinity, not \$s\$. The transfer function you're showing is that of a 1st order system, and it can only have simple, real roots. Therefore using the absolute notation, \$\|p\|\$, or \$\|z\|\$, is unnecessary. The lead or lag compensators are also called shelf filters, because of the way their magnitude looks like when plotted. Since you, yourself, said just before that the gains converge towards \$z/p\$ or \$p/z\$, then you know that there is no infinite attenuation towards that frequency. You can't talk about "recovering" some "underlying" filter from it. The topologies for lowpass and highpass are ones, and for lead and lag filters are anothers. You can't mix the two. The only similarity between a lead compensator and a highpass is the part of the spectrum situated at the geometrical mean between the zero and the pole, and until the very end; similar for lowpass. Note: similar, not identical. See below a comparison between \$\dfrac{s+0.1}{s+1}\$ and \$\dfrac{s}{s+1}\$, and notice how the magnitudes have similar slopes until around \$\sqrt{0.1\cdot 1}\$: If you want to talk about how the limit of the pole or the zero approaches zero or infinity, then chances are you are no longer talking about lead/lag compensators, but of low-/highpass filters, instead. Otherwise, the same conclusion could be drawn about Cauer/elliptic filters that converge towards a Butterworth when the ripples are set to zero, and the zeroes to infinity: you may end up with a Butterworth, but it's not one. Fun fact: the same Cauer/elliptic also converges towards both a Chebyshev, or an inverse Chebyshev, with the proper settings; it's still not either of them. Therefore, lead compensators do not have the behaviour of highpass filters, in the same way the same lead compensators do not have the behaviour of lowpass filters -- they have them both and clearly defined. It's what makes them shelf filters. Similar for lag compensator. Similar for xomplex poles/zeroes. I'll add here the responses to your comments, since they might be a bit longer. For your first comment, the table in the linked OP is awfully confusing. As noted in the answer, those are plain high-/lowpass filters, so yes, they are (very much) misnomers. For the second comment, w.r.t. OP's awfully confusing table, you are referring to the case where \$0<z<p\$, which is labeled "lag high-pass", but the answerer is referring to the "lead low-pass", which is the 3rd entry, or \$0<p<z\$ (blue is the compensator, orange the lowpass): So, no, the answerer is right, and I'll venture to say it's most probable that he is not wrong (as his profile on dsp.ee might make it more clear). And since I fully agree that the table is horrible, I'll put this minor mishap on the account of that utterly repulsive monstrosity of a table (did I mention it's awfully confusing?). Unfortunately, you will see in the literature various people trying to impose their names through the usage of "new and improved" ways of re-defining already defined definitions, seemingly not counting the effect that it may have on the readers. As for the topologies, there is no "standard" way to build these things, though some schematics may make more sense than others (i.e. using RC instead or RL), but if the name is not clear, think of the topology as the transfer function, and then all things should become clear. To avoid the information going in the comments, I'll add this to the answer, but diverting too much from the topic means a new question is needed. A pole in the right-half plane would make the system unstable (the real axis is positive). The zero could be there without affecting stability, but you're showing \$s+z\$, not \$s-z\$. In either case, when you say \$z<p\$, I take it to understand the absolute value (what I said earlier still applies, unless comparing strictly values). But even with a RHP zero, the transfer function becomes: $$\dfrac{s-1}{s+2}\;\rightarrow\;\dfrac{j\omega-1}{j\omega+2}\cdot\dfrac{-j\omega+2}{-j\omega+2}\;\rightarrow\;\dfrac{(\omega^2-2)+j3\omega}{\omega^2+4}$$ For completeness, for a LHP zero: $$\dfrac{s+1}{s+2}\;\rightarrow\;\dfrac{j\omega+1}{j\omega+2}\cdot\dfrac{-j\omega+2}{-j\omega+2}\;\rightarrow\;\dfrac{(\omega^2+2)+j\omega}{\omega^2+4}$$ For even more completeness, the phases of the LHP zero (blue), RHP zero (orange), plus a lowpass with a pole at \$-2\$ (red), showing a more positive phase than the lowpass:
H: Regarding transistor RC Phase Shift Oscillator I have been recently studying about the transistor RC phase shift Oscillator. I calculated the attenuation provided by the RC network to be equal to 29. But when we use a transistor to make the circuit the attenuation will not be equal to 29 because the input impedance of transistor is not very high. Correct me if i am wrong. I have been following this website. It mentions that the the gain of the transistor to be around 56 which is way off from 29 but it doesn't tell how to derive the formula. I have searched various but i couldn't find any source which explains it in detail. Since i am very new to electronics this is very confusing to me. Can you please tell me how to derive the formula. AI: Shahroze Shabab, here is my short advice: I assume in the feedback path you are using the C-R highpass chain (3 elements), right? You know that the required gain is -29 (in reality you need something more - perhaps 30..31). Your problem is the influence of the finite input impedance r_in at the base. Hence, the "last" resistor in the chain is R\|\|(r_in). Why not simply remove the last ohmic resistor R ? In this case, the input resistance r_in alone could "do the job". It should not be a big problem to make a good guess for h11=hie (input resistance at the base node) and you can use the voltage divider resistors to adjust the parallel combination to get the desired value of r_in. Of course, a redesign of the whole C-R feedback chain would be necessary because ALL resistors should have the value of r_in. I already have built such a circuit with good success.
H: FT232 Chip as UART to USB freezes windows and and access denied (Posting my own solution here) I was trying to use a FT232 to communicate with my Atmega328p-AU (arduino uno's MCU) and even though I had several times made this connection which worked fine, this time, when I try to connect to it using Tera Term, this error shows up: My connections are: AI: The solution was, I needed to un-select the "Divide by 8" fuse in the FUSES of the Atmega. NOTE/EDIT: Dividing by 8 the clock means all the computing inside the Atmega IC is slower (8 times slower), while when programming it, I "told it" it operates at 8Mhz, while its 1Mhz now. When I programmed the Atmega, I told it it has an clock frequency of 8Mhz, which is false, since this is divided by 8. So the Baud rate (9600) which the Atmega was thinking it was using is wrong (Its 9600/8 now). Thats why the error its caused. But I still Do not understand why this would cause TeraTerm to show up a "Access denied" error
H: What is the purpose of this zener diode from USB Vbus to Vcc? tl;dr: The ESP32 DevkitC v4 has a BAT760-7 diode between the USB VBUS and the EXT_5V. What is the purpose of it? I am planning to make a hobbyist project where I need 4.9-5.1V to an external sensor (a MQ3 gas sensor), and use a ESP32 Devkit (non-branded make, uncertain of which generation it is) to do some data logging. The USB power from my laptop is 5.1V, and I can read that voltage on the Devkit USB connector. That should be fine to power the sensor and the ESP32. However, the voltage on the VIN pin on the Devkit is merely 4.8V. I do get a signal, but since it is out of spec, I don't accept the readings as reliable. The sensor has a heating coil that draws 750mA, but switching my power source to a 2A USB charger did not change the number, so I assume it is not a problem that my powers ource is too weak. Trying to understand this voltage drop, I found the schematis for the DevkitC v4: link. The relevant part are copied below. From these schematics, I see that there is a BAT760-7 diode between the VBUS from the USB connector and the EXT_5V pin, that I try to pull current from. My voltage drop is in practise 300mV, and that is not consistent with the spec for the BAT760-7 see image below, but I guess I have a pirate copy that has used a replacement part... I still have a diode sitting there, so I guess that by learning about the documented version of the ESP32 devkit, I could learn something about my own kit. My question: What is the purpose of the BAT760-7 in this schematic? What risks and problem would I get if I shorted it to get a 5.1V connection straight from the USB? Is there some other way to pull current off the USB witout getting this voltage reduction? AI: It appears as though the diode D3 is to protect the VBUS from "feedback" from the case scenario where you would be connecting an external 5V supply to the EXT_5on connector J2. External supply still will need to share/be referenced to the same Ground GND Supply current from USB devices is "normally" limited to 500mA max but depending on how many devices are hanging on the hub you may have a lower limit. If you have higher current requirements than are available from your host USB connection, you can provide power externally via this pin. Note that the devices on the board are powered via 3V3 behind the regulator U2 which can be powered via VBUS from your USB connection or from externally provided power via EXT_5 If using externally powered devices make sure that the outputs that you connect to the Inputs of the microcontroller are within the voltage range of these inputs. Although not recommended, since you could damage you usb hosts port, iif you are not going to use any external power source, you could bypass the diode with a short.
H: Did I connect the FT232 with the Digital isolator Data wired the other way? I think I connected the Data wires from the FT232RL to the USB Isolator ADUM3160BRWZ upside down. I just want to confirm this, Data - of the one should be connected to Data + of the other ? Datasheet page 7 of the isolator: NOTE: The FT232RL is not the issue here. The wiring from the MCU to the FT232 works fine, I connected them to my computer and communicates. When I added the isolator between them and connected the computer, It could not detect any device on the usb port. I also tried to connect the usb data cables the other way in case I messed the USB cable, but this did not work either. AI: The picture is correct. M means minus (-) and P means plus (+) so this is not the issue. Data+ must be connected to Data+, and Data- must be connected to Data-. It seems that the downstream and upstream ports are the wrong way though.
H: How can capacitors pass AC without or with minimal voltage passing? My question is: How can capacitors pass AC without or with minimal voltage passing? If the current is caused by a voltage (potential) difference and current is just the voltage (or charge) passing per unit time across a cross-sectional area of the wire, then how can just current pass without voltage at high frequencies? What is flowing then? This idea has confused me and I thought about how could it be possible. Another similar idea that I had trouble with is how can an inductor pass voltage and not current at high frequencies? If voltage is passing, then how can current not be flowing across the inductor? How can voltage flow without current? These are the 2 concepts that have been troubling to me. The closest thing I could find on this subject is this: https://www.researchgate.net/post/Does_the_current_flow_through_a_capacitor_and_if_so_why AI: If the current is caused by a voltage (potential) difference and current is just the voltage (or charge) passing per unit time across a cross-sectional area of the wire, then how can just current pass without voltage at high frequencies? What is flowing then? Voltage and charge are not the same thing. They're not even measured in the same units: charge is measured in coulombs. It's also important to recognise that "voltage" does not describe a physical thing. It's a property that can be measured in various circumstances, but it's not an object. Charge carriers (usually, but not always, electrons) can be counted in coulombs. Each individual electron generates an electric field. The electric fields of nearby electrons add up to make a stronger field. All the classic "static electricity" experiments with rubbing balloons on things and hair standing on end? Strong electric fields. The force that causes electrons to move along a wire is the electric field, and we can measure the difference in strength of field between two points in a circuit: that is what we call the voltage. Within a capacitor, there are two plates separated by a dielectric. This passes the electrical field, but not charge carriers. So when a capacitor is charging, the electrons pile up on one side, and cause a change in the electric field, which pushes electrons out of the other side. But real charge does not actually cross the dielectric.
H: No BOOT1 pin on ST MCU I watched this video where ST itself states that BOOT0 and BOOT1 pins are used to select the memmory that MCU starts reading after the boot : ┌───┬───────┬────────────┬────────────────────────────────────┐ │ │ BOOT0 │ BOOT1 │ After reset MCU starts reading │ ├───┼───────┼────────────┼────────────────────────────────────┤ │ A │ 0 │ irrelevant │ FLASH │ │ B │ 1 │ 0 │ bootloader (inside system memmory) │ │ C │ 1 │ 1 │ RAM │ └───┴───────┴────────────┴────────────────────────────────────┘ Also the offical ST's bootloader guide (chapter 4.1, table 2, pattern 1) mentions BOOT0 and BOOT1. I check the documentation for ST's MCU and there is no slightest trace of the BOOT1 pin! WTF? Where is BOOT1 pin?! AI: Not all STM32 MCUs have a pin called BOOT1. Some do, some don't. Either way BOOT1 is usually shared with a GPIO pin so it would not be a separate pin. Even the bootloader guide should indicate that the specfic MCU you are using has no BOOT1 pin. Since you are using F030 chip, bootloader is triggered by Pattern 2, not Pattern 1 like you expect.
H: Can an FPGA/ASIC have an operating system? I know FPGA/ASIC are for a specific task and they are not microprocessors and an OS is needed mainly if multiple processes (tasks) need to be run concurrently. Just wondering if an FPGA/ASIC can have an operating system. Is there any real time need which may require this? AI: Well, you can use without doubt an FPGA without software, in fact many are used to support booting more complex systems (power sequencing, for example). But you can also define some kind of embedded soft processor needing an OS. On the other hand no CPU really requires an operating system, you could probably program a Cortex-A (for example) bare to the metal. The operating system/user software is only a useful distinction in responsabilities. There are also ASIC which are single task but are however microcoded with some mask defined program to do their job (some USB bridge comes to mind). In short anything can go As for the real time issue: there's nothing more real time than a state machine on the FPGA fabric (except maybe a real ASIC), every kind software is slower (since it's by definition interpreted and run on a state machine in the FPGA fabric)
H: High voltage FET or other transistor What is the highest maximum voltage for a high voltage FET or other transistor? I do not need to be able to buy it, just want to know the voltage it can handle. I was searching the internet and found that I couldn't find any real high voltage FETs or other transistors. The highest I could find where between 3000 and 9000 V. Are there actual transistors or MOSFETs for higher voltage out there for example in specialized machinery? The around 9000 V versions were experiments in universities. AI: For highest voltage per device you'll have to look into "vacuum state transistors" (ie, tubes) like Thyratrons, or even not-so-vacuum-filled valves like the Mercury Arc Rectifier, which is basically a thyristor. Voltage is somewhat unlimited since it depends on the length of the arc tube. At high voltage, you will find mostly thyristors and diodes, because the main application is switching and rectifying. An actual amplifier would require something like transistors, or triode/pentode tubes, but few are actually interested in 300kV output amplifiers... What determines breakdown voltage is the length or thickness of the insulator, so for transistors this is limited to what is possible to manufacture and of course to what customers will buy. The whole point of semiconductors is that they're tiny so you can manufacture a lot of them cheaply on a wafer, but this results in insulation/creepage distances that are not compatible with hundreds of kV. Theoretically it should be possible to build almost unlimited voltage triodes for that juicy Class-A sound. After all it's a glass tube, you can make it one meter long for the extra insulation distance. But that would be "special order".
H: Is auto generated projects for embedded system the future? I'm using CubeMX for auto generate projects for the STM32 micro controllers. I really like CubeMX because it's fits both STM8 and STM32 micro controllers. One thing that I'm wondering about is if CubeMX is really good if you want to program micro controllers in general? I mean....if you are used to use CubeMX for STM32...you going to be stuck with STM32. In other hands, is there any reason to change the platform if your current plat form is suitable for you? I have talking a lot with old school micro controller programmers and they spit on CubeMX and call it cheating. I don't know if they have the experience to say so, or if they are jealous because younger generations get it much easier to do the same thing they do, without any hard working hours in the basement every day. So if CubeMX is the future, will not other micro controller manufactures also create software that also auto generate projects for the selected micro controller? As I know, only Silicon Labs and STM have something called auto generate project software. Will other companies follows up? If not? Is register programming the only way to learn program micro controllers? AI: There have been repeated attempts to create various different auto-generating code for the last 20-30 years or so. Each time, it's marketed as something revolutionary, but it never becomes a success. This isn't something new at all. Siemens/Infineon had such tools way back in the late 1990s. Motorola/Freescale also attempted something similar in the early 2000s. Microchip, too, though I never used it. Sure, part of the reason why it never becomes a success might be orthodox programmers who hate everything new. I mean, people still use 8-bit MCUs even today, and the main reason for doing so isn't technical, but "I don't want to learn anything new". There is a valid argument hidden in there, though: once you learn a toolchain well, you get incredibly productive with those parts, so you do reduce time to market significantly if you keep using the same old tools for the same old MCU family. But I suspect that the main reason why auto-generating code never kicks off is this: when things go wrong, you need to be able to troubleshoot your code. If you haven't got a clue about what the registers do and never even read the manual, you will be lost, with no way of recovering the program. Sooner or later, you will actually have to know what you are doing. One real-life anecdote demonstrating this is when I worked at a workshop using a toolchain that I already knew well, and they tried to sell us auto-generating tools. I poked around a bit and asked the guy giving the presentation why the tool needed to compile 130k lines of code to toggle a GPIO pin on and off…he didn't know. This has always been an issue with pre-made libraries or auto code generators made by silicon vendors—they are of incredibly poor quality. The silicon vendors have some sort of internal branch competition over who can produce the most horrible toolchain of all time, or the most horrible open-source library, or the worst written code examples in their application notes. Some of the worst tools, libraries, and code I have ever encountered in my programming career have come from silicon vendors. The various poor Eclipse IDEs by pretty much every silicon vendor stand out in particular. For example, (speaking of Silabs) Simplicity Studio is perhaps the most dysfunctional programming tool ever released, across all categories. Is there a future for some of the worst programming tools ever released? I doubt so, and that has nothing to do with auto code generation and everything to do with non-existing quality. Bugs, bugs and more bugs. Having some manner of reference code, auto-generated or not, is a huge time-saver, however. It's pure madness to have a MCU vendor sell a particular part to a thousand different customers, then each and every one of them has to re-invent the wheel by writing their own drivers for timers, ADC, SPI, UART, and other very common stuff. Also, MCUs only become more and more complicated, with intricate clock set-ups, peripheral routing, DMA, and so on. Looking at pre-made code helps.
H: What is 'metal mask' here? It's common to see 'solder mask' in PCB design. But sometimes, I see 'metal mask', such as in page 5 of this datasheet, does it mean I need to design a pad larger than the solder mask opening? AI: Metal mask in this case I believe refers to the solder paste stencil, given it specifies a thickness.
H: Flywheel/Dynamo behavior under variable load I have a special effects project in mind where I simulate a bellows and coal fire without, you know, actual fire. My vision thusfar involves rigging a flywheel to a short-stroke lever (the upper arm of a modified bellows), and a bicycle dynamo (or low power alternator, if I can find one for free). This question is how the generator will act on the rotor connecting it to the flywheel? Obviously a spinning flywheel without any power being put into it will suffer from two sources of friction loss, the axle's losses to the bearing, and the drag from the surface of the flywheel interacting with the air around it. My expectation is that whatever load the generator is experiencing is also being felt to the rotor as a sort of drag. I see three possible interactions here, but don't know which one I'm likely to end up with (or if it's another I haven't even thought of yet): Any power in the flywheel is being fully tapped by the dynamo, meaning that regardless of load or rpm the flywheel is being 'rapidly' decelerated by the dynamo; as a consequence, someone going ham on the lever means you've got a metric shit-ton of excess power you need to sink somewhere or you're gonna get a real fire anyway. The dynamo only takes power off the flywheel to match the load it's under, meaning that the flywheel will only lose power to friction otherwise, and you can control the deceleration of the flywheel by adding or removing load. The dynamo only lets power out to the load its connected to as needed, but takes power from the flywheel as fast as it can, leading to some kind of thermal failure in the dynamo itself. All of these can be designed around, obviously, but I'm not clear on what problem I'm going to need to be confronting. The load in this case is negligible: an LED array with more strings being switched on as more power is available to run them. The desired behavior of the LED array is that a brief period of manual input to the flywheel results in a rapid ramp-up of light from the 'coal bed' which then tapers off much more slowly. Too slowly is better than too fast: I can always add drag to the flywheel. So, to reiterate the question: what is the behavior of a flywheel/dynamo system in relation to the electrical load being served? What force does the rotor experience as a result of the dynamo's presence? Does that change as the load changes? AI: what is the behaviour of a flywheel/dynamo system in relation to the electrical load being served? Assuming 100% power efficiency in the dynamo, whatever electrical power is being removed from the dynamo to drive an electrical load is seen as a mechanical power burden on the flywheel and that of course will gradually slow down the flywheel. That mechanical power burden equals the electrical power taken from the dynamo and, as the speed slows, if the electrical power take-off remains constant then more load torque is felt by the flywheel and this might rapidly bring it to a halt. What force does the rotor experience as a result of the dynamo's presence? $$\text{Power} = 2\pi n T$$ Where T is torque and n is the revolutions per second of the rotor. So, the force it experiences is a torque proportional to the electrical take off power (plus mechanical losses). Does that change as the load changes? It has to change else you would have free energy for nothing.
H: What kind of electronic component is this? I am trying to repair the flash of a P900 camera, since it gives a burning smell after being used. After disassembling the flash unit, I came across this part for which I need some professional eyes in order to identify what kind of component that is. AI: It is the trigger transformer that provides high voltage to the trigger plate in the bulb. This ionises the gas inside the tube, making it conductive and thereby initiating the flash. A more in depth explanation of the operating principle of such a flash circuit can be found here.
H: FOC performance direction dependent I'm struggling with a FOC setup, which turns the motor better in one direction than the other and I really don't know, what I could do, to solve this problem, since nothing seems to change it. You can see, that one direction has higher Id current spikes (depcited in red). So what I tried so far: My first tought was an encoder alignement problem (magnetic absolute encoder), but this seems not to be the case, I can aligne the encoder on the back of the motor as I want, the good direction stays the same until I manually change the phases of the motor Also the electrical angle is fine, I evaluated in manually with an oscilloscope and the performance of the good direction never gets worse than the bad direction when I adjust the electrical offset, up to extrem values. Also an encoder delay is not the case, I tried also to compensate for the delay, up to extrem values, but the good direction never got worse than the bad direction. From the current measurements, there seems a big difference when the motor is unloaded at +-800rpm. I measured directly the U-phase current and it seems, something goes wrong there, but I cannot see at the moment, what that could cause. Under load, the motor works quit well and the phase current looks the same in both directions. Good direction U-phase current: Bad direction U-phase current: Here is also the SVPWM implementation, maybe here is something wrong: float t1; float t2; /*******************************/ / Check for the correct sector / /******************************/ if(foc.ctrl.vbeta_norm_mV >= 0.0f) { if(foc.ctrl.valpha_norm_mV >= 0.0f) { if(ONE_BY_SQRT3 foc.ctrl.vbeta_norm_mV > foc.ctrl.valpha_norm_mV) { foc.svpwm.sector = 2; } else { foc.svpwm.sector = 1; } } else { if(-ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV > foc.ctrl.valpha_norm_mV) { foc.svpwm.sector = 3; } else { foc.svpwm.sector = 2; } } } else { if(foc.ctrl.valpha_norm_mV >= 0.0f) { if(-ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV > foc.ctrl.valpha_norm_mV) { foc.svpwm.sector = 5; } else { foc.svpwm.sector = 6; } } else { if(ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV > foc.ctrl.valpha_norm_mV) { foc.svpwm.sector = 4; } else { foc.svpwm.sector = 5; } } } /***********************************************/ / Calculate the sector depending SVPWM timings / /**********************************************/ switch (foc.svpwm.sector) { case 1: t1 = foc.ctrl.valpha_norm_mV - ONE_BY_SQRT3 foc.ctrl.vbeta_norm_mV; t2 = TWO_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; /*******************************/ / Calculate the PWM Timings / /******************************/ foc.svpwm.tU_s = (1.0f - t1 - t2) 0.5f; foc.svpwm.tV_s = foc.svpwm.tU_s + t1; foc.svpwm.tW_s = foc.svpwm.tV_s + t2; break; case 2: t1 = foc.ctrl.valpha_norm_mV + ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; t2 = -foc.ctrl.valpha_norm_mV + ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; /*******************************/ / Calculate the PWM Timings / /******************************/ foc.svpwm.tV_s = (1.0f - t1 - t2) 0.5f; foc.svpwm.tU_s = foc.svpwm.tV_s + t2; foc.svpwm.tW_s = foc.svpwm.tU_s + t1; break; case 3: t1 = TWO_BY_SQRT3 foc.ctrl.vbeta_norm_mV; t2 = - foc.ctrl.valpha_norm_mV - ONE_BY_SQRT3 foc.ctrl.vbeta_norm_mV; /*******************************/ / Calculate the PWM Timings / /******************************/ foc.svpwm.tV_s = (1.0f - t1 - t2) 0.5f; foc.svpwm.tW_s = foc.svpwm.tV_s + t1; foc.svpwm.tU_s = foc.svpwm.tW_s + t2; break; case 4: t1 = -foc.ctrl.valpha_norm_mV + ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; t2 = -TWO_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; /*******************************/ / Calculate the PWM Timings / /******************************/ foc.svpwm.tW_s = (1.0f - t1 - t2) 0.5f; foc.svpwm.tV_s = foc.svpwm.tW_s + t2; foc.svpwm.tU_s = foc.svpwm.tV_s + t1; break; case 5: t1 = -foc.ctrl.valpha_norm_mV - ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; t2 = foc.ctrl.valpha_norm_mV - ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; /*******************************/ / Calculate the PWM Timings / /******************************/ foc.svpwm.tW_s = (1.0f - t1 - t2) 0.5f; foc.svpwm.tU_s = foc.svpwm.tW_s + t1; foc.svpwm.tV_s = foc.svpwm.tU_s + t2; break; case 6: t1 = -TWO_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; t2 = foc.ctrl.valpha_norm_mV + ONE_BY_SQRT3 * foc.ctrl.vbeta_norm_mV; /*******************************/ / Calculate the PWM Timings / /******************************/ foc.svpwm.tU_s = (1.0f - t1 - t2) 0.5f; foc.svpwm.tW_s = foc.svpwm.tU_s + t2; foc.svpwm.tV_s = foc.svpwm.tW_s + t1; break; default: return API_MCL_FOC_ERROR_SVPWM_FAILED; break; } AI: TL;DR timing There are 8 6 combinations of 3 phase vector control ABC ACB BCA BAC CAB CBA The correct two vectors must be swapped to match the independent phase reversal for 2 motor phases. Only 1 sequence is correct in each direction. Your bad direction may have the wrong combination. I verified this on a 3ph 100 W fan recently which I modified to be reversible vbl. speed 4600 CFM (powered by 120Vac to 70Vdc). AS luck would have it I found the right connections on the last try, albeit there were Hall sensors. One bad combination reacted just like your plots appear. (with a lack of DC RMS in 1 phase.) Oh well justa guess. To explore further, increase the time resolution on plots and examine acceleration and steady RPM in each direction. Or if you can, plot the 3 phase vectors as a Lissejou plot. (Another guess) Anecdotal Glad you got it working. I've never tried FOC but here is a Webinar Zoom call today 1pm ESTfrom Powersimtech on FOC and high performance PMSM motors. for all who wish to attend free. More Anecdotal FWIW to others 3 Ph motor reversal for attic roof vent remote-controlled forced air ventilation. I've never tried FOC, but I reverse engineered a great Hall sensor design with a non-isolated 100W 4600 CFM fan, with FET cooling of course forced air cooling. Very quiet, smooth low acceleration vbl. speed pot which I intend to remote control and power by a weather sensor to the STM32 chip with a bridge controller to 6 FETs for hot day attic forced air ventilation with a 14" fan under a 12" square roof chimney vent. Photos to follow Host uC= STM32 They sanded off the most interesting IC part numbers, but I was still able to read them. Drivers powered by line 120VAC to 75DC non-isolated to 3 pronged 14" Fan 4600 CFM Pre-driver 3ph 100W fan 425/400 ns 3pH full bridge MOS controller $1 from FORTIOR chips. https://lcsc.com/product-detail/MOS-Drivers_Fortior-Tech-FD6536S_C97682.html (Detailed specs only to volume buyers) My electrical mods to reverse fan direction. STM8S 903K3T6 uC and FORTIER FD6536S MOS bridge controller Typical 3 Ph signals with PWM speed control. and great smooth acceleration so no surge currents controlled from STM32 firmware. Fortier MOS controller nicer than this std. design Nice design tools
H: Capacitor in presence of an external electric field Let's consider a capacitor made of a couple of parallel metal strips (suppose they are made of perfect electric conductor) as shown in the figure, which represents a little capacitor. Suppose an external (time variant) electric field is applied in the space in which the capacitor is placed, as shown in figure. Such an electric field may be for instance that of an incident orthogonal electromagnetic wave, as shown in the following picture. What happens? I don't know which are cause and effects in this situation. I'd say that: The external electric field induces separation of charges in the two strips. So, plus charges on one strip and minus charges on the other. The previous situation is like that happens on a capacitor when supplied by a voltage source. But, in such a case, I'd say that the voltage source provides charges to the capacitor metal plates, and then the resulting charge distribution generates the electric field. In this case, however, the electric field is already existing since it's the external electric field (the incident wave). In other words, is the electric field between the plates the original external incident E field or is it the E field generated by the charges separated by the original incident E field? AI: In other words, is the electric field between the plates the original external incident E field or is it the E field generated by the charges separated by the original incident E field? Using Superposition theorem Electric field between the plates is due to 1.Electric field of electromagnetic wave 2.induce charges of 1st plate 3.induce charges of 2nd plate . Net electric field between the plates $$=\vec(E)+\vec(E_1)+\vec(E_2)+\vec(E_3)+\vec(E_4)$$ But if plates are very very close to each other then we can assume that they will behave as parllel sheet of infinite length and we get net electric field between plates is $$\vec(E)$$ because between plates $$\vec(E_1)+\vec(E_2)+\vec(E_3)+\vec(E_4)=0$$ and final distribution will look like - And from uniqueness theorem this distribution is unique(but function of time ) for a given wave and charges on conductor (=0). But what if plates are not very close to each other ? Then we cannot assume as parllel sheet of infinite length and hence a distorted field will be obtained in between of plates and for that we have to solve Laplace equations with suitable boundary conditions which is too complicated Note-$$\vec(E),\vec(E_1),\vec(E_2),\vec(E_3),\vec(E_4) $$ are electric field due to electromagnetic wave, due to induce charges on 1st plate (2 surface) and due to induce charges on 2nd plates (2surface) respectively.
H: Unknown function generator I've found this Function Generator in the deep of school's Lab: I wasn't able to find an user guide or any similar document. I'm not sure on how to correctly use it. For example, I don't know: Which output to use: Hi, Lo, Gnd ? What are and how may I use Auxiliary Output? Any idea? Thanks in advance. AI: I would assume that the output signal is between the Output HI and LO terminals, with the LO terminal being signal ground. The waveform at that output will be as selected by the Waveform switch, and its level controlled by the Amplitude control. The Auxilliary outputs will always produce their labelled waveforms, and will not be affected by hte Aplitude control. The white Ground terminals will connect to the case which should be connected to the AC Safety Ground. (This is onlyy an educated guess - I've never seen that device.)
H: Is there a resource to look up widely in-use/standard connector styles? I'm working on rebuilding a design that currently uses obsolete parts. I'm taking the opportunity to increase reading accuracy. In doing so, I will have to replace our current connector to go from a 2 wire resistance measurement to a 4 wire resistance measurement for a group of devices under test and increase max DuT capacity to fill the remaining multiplexer card slots. That will takes the design to a 96 pin connection. If I go to digikey and look up a D-sub connector that has 96 pins there's only 3 active parts. That doesn't bode well for longevity of the design, but then again I'm quite new to this so I'm not sure if that's a good indicator. Maybe it's as simple as large pin connectors are uncommon in general, but I'm trying to keep this a 1 connector design to reduce risk of operator error, wear and tear, and time loss. Is there a place I can go to gage the popularity/longevity of a connector? AI: Your approach of using a major distributor like Digi-Key to find common parts is a good one. To determine if the part is "common" look for form-fit-function compatible parts that are... In stock, with a reasonable supply Listed as active Made by multiple manufacturers The manufacturers should be large, rather than small startup companies or similar. Available from multiple distributors In your specific case, what you should do is expand your search a bit. Instead of looking for exactly 96 pins, try to go a few pins higher. 96 was the number of pins your design needs, but it may not be a common number. Also consider that having some spare pins allows room for growth without a complete redesign later on, so in many cases its good practice to have a few spare pins. If you look at 104 pin D-Sub connectors there are 517 options instead of 3. They are made by three vendors (Amphenol, Positronic, and TE), which are all well known names in the connector industry.
H: How to find voltages of a node using commands in lt spice? I am simulating this circuit, how do i find the voltage of the diode through the error log in each step of the the voltage source through a command? I tried using the .meas command but it just shows nothing. AI: I used .meas TRAN Vdiode FIND (V(Va) - V(vn)) AT = 5m where Va and Vn are the node names on either side of the diode.
H: NL17SZ74 D-Flip Flop circuit doesn't work! I've been having trouble with what should be a really simple Momentary-to-Latch D flip flop switch circuit. Basically: I want the momentary switch PUSH to set the CP (Clock Pulse) Pin Low and on toggle SYSPWR pin high and low BMOUT = supply = 5V R107 is to act as a pulldown so there is no undefined behaviour on the pin R106 and C109 are a RC filter so there is no bouncing on the CP pin on low-to-high transition What's Happening, when pressing the PUSH button: D and !Q pin is staying high Q pin is staying low Ideas: need a resistor between D and !Q pin need a pullup on Q pin Can anyone tell me why this isn't working? Here is the datasheet and truth table: AI: You're operating the device outside its RECOMMENDED OPERATING CONDITIONS. Of course you're free to do that but this can lead to unspecified behavior. In your case the "Input Rise and Fall Time" specification is being exceeded. For 5V operation the specification is 5 ns/V MAX. So you need to ensure that your CP input rises from 0 to (0.7 * Vcc) in (0.7 5V) 5 ns/V = 17.5 nS. Your CP rising edge is WAY WAY slower than that. Adjust the R and C values to give you a more reasonable TC (time constant) and you should see it behave better.
H: Tunnel diodes Zener breakdown Do tunnel diodes exhibit Zener breakdown? Since tunnel diodes are more doped than Zener diodes they should, but I am unsure. AI: The typical IV curve of a tunnel diode shows that the breakdown voltage is positive: That's from the RCA Tunnel Diode Manual that I linked to in my answer to one of your earlier questions about tunnel diodes. The solid curve is from a normal diode. A Zener diode breakdown would be similar. The tunnel diode hits breakdown at a positive voltage - tunnel diodes conduct in reverse mode, always.
H: VHDL: port declaration design for a feedback signal I am a Computer Engineering student currently learning computer architecture, and working on modeling a booth's algorithm in VHDL. My design hierarchy contains a datapath and a control unit. The datapath contains primary sub-components (ALU, decrement counter, M register, product register). The control unit is just programmed as FSM. The said components are connected in a datapath module using port mapping. The module is shown below: library IEEE; use IEEE.STD_LOGIC_1164.ALL; entity datapath is Port ( -- INPUTS clk : in STD_LOGIC; load_m : in STD_LOGIC; -- LOAD pin for M (tells unit to load M or not) m_in : in STD_LOGIC_VECTOR (7 downto 0); -- loaded multiplicand M q_in : in STD_LOGIC_VECTOR (7 downto 0); -- multiplier -- REST CONTROL INPUTS k : in STD_LOGIC; -- ALU pin (determines if add or sub operation) alu_enable : in STD_LOGIC; -- enables ALU function c_load : in STD_LOGIC; -- LOAD coming from controller (tells prodreg if it should load the value from ALU to Accumulator) dc : in STD_LOGIC; -- decrement pin (tells counter to decrement counter value) shift : in STD_LOGIC; -- SHIFT pin (tells prodreg to do arithmetic shift operation) --OUTPUTS count_out : out STD_LOGIC_VECTOR (3 downto 0); -- output counter value q01 : out STD_LOGIC_VECTOR (1 downto 0); -- output q01 per clock cycle a_out : out STD_LOGIC_VECTOR (7 downto 0); -- output a per clock cycle q_out : out STD_LOGIC_VECTOR (7 downto 0); -- output q per clock cycle m_out : out STD_LOGIC_VECTOR (7 downto 0) -- output m per clock cycle ); end datapath; architecture Structural of datapath is component mreg Port ( clk : in STD_LOGIC; m_in : in STD_LOGIC_VECTOR (7 downto 0); load : in STD_LOGIC; m_out : out STD_LOGIC_VECTOR (7 downto 0)); end component; component alu Port ( a : in STD_LOGIC_VECTOR (7 downto 0); m : in STD_LOGIC_VECTOR (7 downto 0); k : in STD_LOGIC; alu_enable : in STD_LOGIC; a_out : out STD_LOGIC_VECTOR (7 downto 0)); end component; component prodreg Port ( clk : in STD_LOGIC; load : in STD_LOGIC; shift : in STD_LOGIC; a_in : in STD_LOGIC_VECTOR (7 downto 0); q_in : in STD_LOGIC_VECTOR (7 downto 0); q_out : out STD_LOGIC_VECTOR (7 downto 0); a_out : out STD_LOGIC_VECTOR (7 downto 0); q01 : out STD_LOGIC_VECTOR (1 downto 0)); end component; component counter Port ( clk : in STD_LOGIC; dc : in STD_LOGIC; count_out : out STD_LOGIC_VECTOR (3 downto 0)); end component; -- intialized alu and prodreg signal ports as '0's signal dp_m : STD_LOGIC_VECTOR(7 downto 0); signal alu_a_in : STD_LOGIC_VECTOR(7 downto 0) := (others => '0'); signal alu_a_out : STD_LOGIC_VECTOR(7 downto 0) := (others => '0'); signal pro_a_out : STD_LOGIC_VECTOR(7 downto 0) := (others => '0'); begin port_mreg: mreg port map(clk, m_in, load_m, dp_m); port_alu: alu port map (alu_a_in, dp_m, k, alu_enable, alu_a_out); port_prodreg: prodreg port map (clk, c_load, shift, alu_a_out, q_in, q_out, pro_a_out, q01); port_counter: counter port map (clk, dc, count_out); process(clk) begin if rising_edge(clk) then alu_a_in <= pro_a_out; a_out <= pro_a_out; -- accumulator output m_out <= dp_m; -- m output (multiplicand) end if; end process; end Structural; For clarity, focus on the alu and prodreg ports. ALU operates as a adder/subtractor but ignoring the final carry bit, prodreg operates as '16-bit arithmetic shift right' for signals 'a' and 'q' (8-bit signals), respectively. As observed, 'alu_a_in' is intialized as "0", and is set as input of ALU. The output is a sum/diff that is then wired to prodreg as input. This should provide a shifted output 'pro_a_out'. For every clock cycle, I wanted to see the shifted outputs of pro_a_out (shifted a) and q_out (shifted q). After that, the pro_a_out value is used as input to the alu (feedback) for the next operation. My problem is, as observed in the simulation below, a_out (pro_a_out) is undefined. q_out is also throwing values undefined alternately, but I assume its correctly shifting (this is because q_01 is providing reasonable results, q(0),q(1) respectively). Also, I've test benched every sub-component and they are all providing expected results. My question is, is the modeled datapath scripted correctly to provide outputs 'a_out' and q_out'? Is the way of providing prodreg feedback to ALU modeled correctly? What changes are needed to be done? I can't find the cause of the problem and I am still quite a novice in VHDL scripting. Testbench is also provided below. TESTBENCH library IEEE; use IEEE.Std_logic_1164.all; use IEEE.Numeric_Std.all; entity datapath_tb is end; architecture bench of datapath_tb is component datapath Port ( clk : in STD_LOGIC; load_m : in STD_LOGIC; m_in : in STD_LOGIC_VECTOR (7 downto 0); q_in : in STD_LOGIC_VECTOR (7 downto 0); k : in STD_LOGIC; alu_enable : in STD_LOGIC; c_load : in STD_LOGIC; dc : in STD_LOGIC; shift : in STD_LOGIC; count_out : out STD_LOGIC_VECTOR (3 downto 0); a_out : out STD_LOGIC_VECTOR (7 downto 0); q_out : out STD_LOGIC_VECTOR (7 downto 0); q01 : out STD_LOGIC_VECTOR (1 downto 0); m_out : out STD_LOGIC_VECTOR (7 downto 0) ); end component; signal clk: STD_LOGIC; signal load_m: STD_LOGIC; signal m_in: STD_LOGIC_VECTOR (7 downto 0); signal q_in: STD_LOGIC_VECTOR (7 downto 0); signal k: STD_LOGIC; signal alu_enable: STD_LOGIC; signal c_load: STD_LOGIC; signal dc: STD_LOGIC; signal shift: STD_LOGIC; signal count_out: STD_LOGIC_VECTOR (3 downto 0); signal a_out: STD_LOGIC_VECTOR (7 downto 0); signal q_out: STD_LOGIC_VECTOR (7 downto 0); signal q01: STD_LOGIC_VECTOR (1 downto 0); signal m_out: STD_LOGIC_VECTOR (7 downto 0) ; constant clock_period: time := 10 ns; signal stop_the_clock: boolean; begin uut: datapath port map ( clk => clk, load_m => load_m, m_in => m_in, q_in => q_in, k => k, alu_enable => alu_enable, c_load => c_load, dc => dc, shift => shift, count_out => count_out, a_out => a_out, q_out => q_out, q01 => q01, m_out => m_out ); stimulus: process begin --product should be 30 (00011110) load_m <= '1'; m_in <= "00001111"; q_in <= "00000010"; k <= '0'; alu_enable <= '0'; c_load <= '0'; dc <= '0'; shift <= '0'; wait for 15 ns; load_m <= '0'; k <= '0'; alu_enable <= '1'; c_load <= '0'; dc <= '0'; shift <= '0'; wait for 10 ns; k <= '0'; alu_enable <= '0'; c_load <= '1'; dc <= '0'; shift <= '0'; wait for 10 ns; k <= '0'; alu_enable <= '0'; c_load <= '0'; dc <= '1'; shift <= '1'; wait for 10 ns; k <= '1'; alu_enable <= '1'; c_load <= '0'; dc <= '0'; shift <= '0'; wait for 10 ns; k <= '0'; alu_enable <= '0'; c_load <= '1'; dc <= '0'; shift <= '0'; wait for 10 ns; k <= '0'; alu_enable <= '0'; c_load <= '0'; dc <= '1'; shift <= '1'; wait for 10 ns; k <= '0'; alu_enable <= '1'; c_load <= '0'; dc <= '0'; shift <= '0'; wait for 10 ns; k <= '0'; alu_enable <= '0'; c_load <= '1'; dc <= '0'; shift <= '0'; wait for 10 ns; k <= '0'; alu_enable <= '0'; c_load <= '0'; dc <= '1'; shift <= '1'; wait for 10 ns; --stop_the_clock <= true; wait; end process; clocking: process begin while not stop_the_clock loop clk <= '0', '1' after clock_period / 2; wait for clock_period; end loop; wait; end process; end; EDIT 5 signal dp_m : STD_LOGIC_VECTOR(7 downto 0); signal alu_a_in : STD_LOGIC_VECTOR(7 downto 0) := (others => '0'); signal alu_a_out : STD_LOGIC_VECTOR(7 downto 0) := (others => '0'); signal pro_a_out : STD_LOGIC_VECTOR(7 downto 0) := (others => '0'); begin port_mreg: mreg port map(clk, m_in, load_m, dp_m); port_alu: alu port map (alu_a_in, dp_m, k, alu_enable, alu_a_out); --port_prodreg: prodreg port map (clk, c_load, shift, alu_a_out, q_in, q_out, pro_a_out, q01); --port_counter: counter port map (clk, dc, count_out); process(clk) begin if rising_edge(clk) then a_out <= alu_a_out; -- accumulator output --alu_a_in <= pro_a_out; m_out <= dp_m; -- m output (multiplicand) end if; end process; end Structural; I tested out individual components output on the datapath port for ALU and prodreg (something I should have done a long time ago). The first simulation shows the usage of only mreg and ALU components. As observed, the ALU provides the appropriate signals of the sums and differences from the component. The second simulation uses the same code in the previous one where all components are included (uncomment prodreg, counter). As observed, it also provides the appropriate signals coming from the prodreg as well (shift happens on q_out). The following simulation just uncomments `alu_a_in <= pro_a_out; while a_out is still derived from ALU, but this time, similar results from the original post are shown. Correct me if i'm wrong, but would this narrow down the problem on the way the feedback signal is introduced between the port map components? If so, what other ways should this problem be approached? Just to reiterate the concerns: Problem on introduced feedback signal from prodreg to ALU When introducing the 1, how come a_out (undefined) and q_out (undefined on alternating clock cycles) are what it is? The block diagram below represents the overall system being implemented, hopefully this adds as useful for addressing the concern and for why such design is being implemented AI: To avoid unknowns in the simulation you must ensure that all registers in both the test bench and the unit under test have initial values. Also, make sure that all input ports either have default values or are connected to signals that have a default value, or will effectively have a default value derived from a combination of other signals having a default value. Specifically, your signal a_out is based on combinations of signals a, k, and m, and is latched by alu_enable. For a_out to have a defined value all of the signals it depends on must also have a defined value. Also the use of alu_enable to control updating of a_out makes a_out a register (or at least that seems to have been the intent if it were not broken). If you want a_out to have a defined value prior to the first time alu_enable goes high, then you need to specify the initial value in the port declaration. For example... entity alu is Port ( a : in STD_LOGIC_VECTOR (7 downto 0); m : in STD_LOGIC_VECTOR (7 downto 0); k : in STD_LOGIC; alu_enable : in STD_LOGIC; a_out : out STD_LOGIC_VECTOR (7 downto 0) := (others => '0') ); end alu; Note also that alu_a_out (which is initially undefined) is fed into component prodreg, which would also cause some of its outputs to become undefined (since they depend on alu_a_out). Also... These lines of code... process(alu_enable, a, m) begin if alu_enable='1' then a_out <= s; end if; a_out <= s; end process; Are equivalent to... process(alu_enable, a, m) begin a_out <= s; end process; So your alu_enable is not getting used.

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