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H: Resistor in shunt regulator not following Ohm's law?
I was reverse engineering a power tool battery charger (21V SMPS) that derives its 5V rail from a simple shunt regulator, employing a TL431 programmable precision reference and a NPN transistor, as per my crude sketch (sorry I didn't have time to paint it). The programmable reference runs the gate of the NPN transistor, maintaining a stable 5 volts on the rail that powers the microcontroller, indicator LED. etc. (The reference is programmed to 5V by R1 and R2, but is actually running 0.6V higher, as it needs to overcome the additional Vbe of the transistor, so Vka is really 5.6V) The voltage measurements from the sketch were measured at the same time, in an idle, no load state. A SMPS 21V source feeds R4, dropping 0.577V, which per Ohm's law means about 0.0012A are flowing through R4. The transistor gate is biased by a 4.7kOhm resistor R3. The voltage drop on R3 also corresponds to Vcb, measuring 14.99V. Now I stop understanding things. With this voltage drop, R3 should be passing 0.0032A, but this is impossible since the "inrush limiting" resistor R4 is only passing 0.0012A! I also probed the points with my oscilloscope to make sure there wasn't some kind of weird wave action taking place that would mess up my multimeter reading but no, it showed a stable voltage. I understand that what is probably happening is some borderline open circuit condition, with the transistor just teetering on some kind of almost-off state 'commanded' by the reference, but this feels rather vague in my mind.
Can somebody please explain what is happening, more to the point, what current can R3 be passing if its voltage drop measures 14.99V and Ohm's law would dictate it passing 3.2mA, but the circuit is only being fed a MAXIMUM of 1.2mA?
Many thanks for any explanation! Cheers!
EDIT: as one commenter immediately mentioned, R4 I was reading as 470 Ohm was really 47 Ohm, so the currents all add up and all is good, as 12mA are coming into the circuit, and R3 is only shunting 3mA of those. Many thanks to the keenly eyed!
I would still appreciate if anyone would be so kind as to describe "boundary" operation of the transistor, teetering on dropping 15.6V as maintained by the reference.
Many thanks!
AI: I am guessing that you are looking at an SMT resistor marked "470" and that it is actually 47 ohms.
As to operation-
The TL431 draws as much current as required (up to 100mA+) to reduce the voltage at the sense input to 2.495V nominally. As long as it gets > 1mA to use itself it will function properly (400uA typically). If we assume the circuit draws about 10mA the base current might be of the order of 100uA.
So the 4.7K resistor needs about 5.2V across it to function (so there is 1.1mA+ flowing). Add that to the 5.6V required at the base of the transistor.
So this regulator will work from about 11.5V up to well over 21V, taking into account the drop across the 47 ohm resistor.
As @bobflux rightly points out, this is a series regulator. The NPN transistor is the pass element. |
H: How do you choose a PWM Frequency to drive a DC motor?
I can clock the PWM to drive motors at most any reasonable frequency, but is there a "best" PWM frequency for motor control?
What must be considered when choosing a PWM Hz?
Is there a most efficient Hz per motor?
If so, is there a way to calculate that based on measured motor characteristics such as L, C, and R?
(This is the Lego motor we are using to drive an antenna rotor.)
AI: For a small motor my rule of thumb is to make the maximum pulse width of a given f and d.c. 10% of the L/DCR = Tau time constant. This puts it in continuous conduction mode (CCM) using the motor L as a RL low pass filter.
However aliasing noises in the magnetics on different RPM frequencies of brush noise and switching frequency and if too low fSW then motor jitter occurs. Also sometimes e-caps are used to smoothen ripple and noise as long as it is bipolar. Then the Q of SRF must be examined.... To keep it well damped.
Going too fast at high currents starts to encroach on the SOA limits so this must be reduced as the current is still flowing when the switch voltage increases. Often in the audio band such as for cordless drills.
So you can measure or choose just under or about 20kHz for now or measure L/R and compute Pd in the switch from the turn off decay current pulse.
With BLDC motors PWM might interfere with the Hall sensors electronics such as in variable speed fans, so it gets more complex and this why PWM fans are designed to support this rather than treat all CPU fans as PWM controllable via power. |
H: How to find the best settings for Cyclic voltametery test?
I am trying to conduct a CV TEST (Cyclic Voltammetry). However, I am unable to get the current peaks on my plot. I tried different ranges of Voltage at different scan rates. However, I could not achieve any meaningful full result. can the test be successful if it is still not showing the current peaks?
The material I am testing right now is Agar (culture gel).
My plots look like:
I am scanning at 100mV/s and starting a potential of -0.1.
is there a way for me to find the correct range to locate my peaks or is it normal for some material not show them
AI: I know nothing about Agar or volummetry but higher scan rates ought to increase current dues the dielectric constant and how thin the material layer is without voids between conducting electrodes.
This is essentially a voltage sensitive material with polar hysteresis created by a REDOX cell voltage reaction, much like permeability is to magnetic materials which normally display H field current on the X axis orthogonal to yours.
My suggestion is to change the thickness and
also change the sweep waveform to more of a square wave with slew rate limits.( if this is permitted) If this makes it worse then you are seeing excessive ESR from galvanic resistance.
in event of the above failure, then I would suggest investigating your electrode material for better types. ( gold plated)
Ic = C dV/dt for linear dielectrics and hysteresis depends on saturation of the polar ions without voids or contaminants.
I’ll have to read up on electrochemical impedance spectroscopy. Right now it looks a bit like a 10 Ohm resistor with asymmetric hysteresis.
Here is my simulation of your signals using a buffered bipolar Howland Current Source with a variable sweep current linear slow sweep (faster than real-time) of your signal with ideal diodes and 0.6V bipolar cells with an RC network. |
H: Logic Input Current Definition
I want to control shutdown pin of this IC MAX9920 using digital output of arduino.
https://datasheets.maximintegrated.com/en/ds/MAX9918-MAX9920.pdf
My question regards to this:
In the datasheet page 6 says shutdown input current max 10ua. So if digital output of arduino when is high is 5v, do I have to put a 600k or 800k between this pin and the ic shutdown pin?
I ask this for 2 reasons:
Because I don't want to damage ic when digital output pin of arduino is high.
To understand logic input current definition.
AI: No, you don't need a resistor. That 5 uA input current value is the maximum current the driving device, the Arduino in your case, has to be able to supply to the SHDN pin. This spec holds so long as the voltage on the SHDN pin is within the range specified in the table on page 6, between 0 V and Vcc. |
H: Step down variable high voltage DC input to low voltage DC output
I'm looking to find a system that will help me step down a high voltage DC input to a low voltage output. The problem is that the DC input in question is not very stable in terms of voltage and varies depending a number of situations out of my control.
The DC input could be from anywhere to 150V to 230V but is, for the most case going to be in the range of 200V-230V.
We need a safe way to convert the power to a stable 6V-12V DC, after this we can employ other systems to get a stable low voltage. I've had a look at existing systems but am having trouble finding anything within the correct range.The power requirements are low, no more than 1A at the specified output voltage, so a absolute max of 12 watts but usually much less.
Any recommendations or processes that combine new or existing systems would be helpful. We are currently looking at options so are not set on anything in particular.
AI: Take a look at how off-the-line switch mode power supplies work. The very first thing they do is rectify the AC input to DC, using a bridge rectifier. You could literally use such a supply that's rated for 230V AC and connect it to your DC source, bearing in mind that two out of the four diodes in the bridge will be carrying the load. With your modest current / power requirements this should not be an issue.
Using an existing AC-DC switchmode power supply with DC input not only solves your step-down problem, it also isolates your low-voltage side from the dangerously high DC. |
H: Reading oil pressure switch from motorcycle with Teensy (Arduino)
I'm trying to read a oil pressure switch (I'm actually not sure about the sensor type) from my motorcycle (ZX6R) with a Teensy 4 board (Arduino like).
Here is a picture from the electrical schematic:
Measuring BL/R to ground with a multimeter it looks like it's a closed circuit when the switch is open while it opens once the bike starts up and therefore there is oil pressure.
Hooked it up on a digital pin with pullup and of course I fried the board.
Then I hooked up again the multimeter and (with the bike running) I see an AC voltage with freq and amplitude that changes with RPM.
Then I measured it with an oscilloscope as differential voltage BL/R to ground and I see a voltage that oscillates symmetrically around zero with a varying amplitude between a few mV and 1.5V (I bet if rev up the engine more the amplitude and frequency will continue to rise almost linearly).
The BL/R wire goes straight to the dash that powers an LED. The stock dash will be removed.
2 questions:
any idea of what kind of sensor it is?
how do I safely measure it with a Teensy board? (digital is 3.3V tollerant)
As you can see I don't have much clue of what I'm doing but I have tools and willing to figure this out :)
Thank you
UPDATE:
Adding pressure switch "insights"
AI: It's a switch that connects to ground when there's no oil pressure. Measure it with an ohmmeter with the wire disconnected: should show a low-ohm when the engine is stopped, and open when the engine is running.
If there's no LED connected to it, in theory you could pull the switch up with a resistor to 3.3V.
The safer way would be to use a diode to isolate the Teensy, as follows:
simulate this circuit – Schematic created using CircuitLab
MORE: The lamp on the dash would have pulled the Teensy pin up to 12V or so, which would have killed it.
As for the ESD protection, I deliberately chose components that are easy to find.
How it works:
D2 blocks any current in (any voltage higher than 3.3V)
D3 clamps the input to GND - 0.7V
Any below-ground fault current is limited by R2.
It's simple and should work fine.
If you want to beef this up even more, you have a couple of options:
Use a Schottky diode for D3
Use a Transient Voltage Suppressor (TVS) diode for D3
The Schottky diode has a lower forward voltage (0.3V) and faster response. A TVS is basically fast-acting Zener diode that catch both negative or positive spikes. But, D2 already blocks positive spikes, so that's overkill.
Finally, would a capacitor help? Only if you connect it so that it shunts energy back to the originating source, that is, someplace close to frame ground. If it's to Teensy ground it would actually make things worse as it provides and AC path to the logic ground, then back to the frame. |
H: What is meant by static and dynamic loads in electrical drives?
What is the definition of a static load and a dynamic load when it comes to electrical drives? Can someone give some examples for both types of loads?
AI: Dynamic load is meant a torque required to accelerate/decelerate the mass/inertia. A static load would be some dead weight, for example the torque to suspend a mass of Z-axis. Other than this kind of loads we also have friction, and of course a mechanical load that is doing some work. |
H: 1 voltage regulator for all components or 1 voltage regulator for each component?
Is it a good idea to only put 1 5volts regulator to power all components or 1 5volts regulator for each component? If I only put 1 5volts regulator to power all the components would that affect, reduce or divide the 5 volts to power all the components?
The components that needs 5 volts power are ATMEGA328P, PCF8574P, 2x16 LCD Display, HX711, Load Cell, and 5 push buttons.
AI: Most of the time it's better to have 1 regulator to power the whole board. The regulator should be chosen to be able to provide enough current.
That said, it is sometimes good to have several regulators in particular cases:
You need a lot of currents and it is more cost-effective to have several regulators.
Your board is big and want to segment the different area. This is often the case with computer motherboards.
To separate digital and analog, you want to have a very low ripple filtered converter for the analog side.
For a high uptime system like in medical you may want to have redundancy.
Your board can accept extra modules plugged into it, in case those boards were faulty you still want the mainboard to run.
You want to galvanically isolated some part of the board, for example for external input-output. |
H: Flowing back of current from capacitor filter to full bridge rectifier
Context:
Pg-485 of this pdf
Now we shall discuss the role of
capacitor in filtering. When the voltage
across the capacitor is rising, it gets
charged. If there is no external load, it remains charged to the peak voltage
of the rectified output. When there is a load, it gets discharged through
the load and the voltage across it begins to fall. In the next half-cycle of
rectified output it again gets charged to the peak value (Fig. 14.20). The
rate of fall of the voltage across the capacitor depends upon the inverse
product of capacitor C and the effective resistance RL
used in the circuit
and is called the time constant. To make the time constant large value of
C should be large. So capacitor input filters use large capacitors. The
output voltage obtained by using a capacitor input filter is nearer to the
peak voltage of the rectified voltage. This type of filter is most widely
used in power supplies.
So, as said in the above paragraph, the capacitor after being raised to the peak voltage, discharges to load as rectified voltage supply starts to decrease. The point I am being confused is, if the rectifier's voltage output voltage drops below the capacitor, then wouldn't the capacitor push back current into the rectifier as well? What effect would this have on the rectifier?
Edit: Thank you everyone for the help!
AI: Rectifiers act as one-way or "check" valves. Current only flows in the direction of the diode arrow.
Figure 1. The diode's check-valve analogy. Image source: What is an LED?.
If you look at the check-valve in the figure above, it should be clear that the spring normally keeps the ball in position and prevents back-flow. When “forward-biased” the ball shut-off can be moved against the spring but it will take some initial pressure to move the ball. This results in a pressure drop across the valve: the pressure downstream will be less than the inlet pressure.
In a similar manner the PN junction causes a voltage drop. For silicon it is about 0.7 V. Since there is a PN junction in the base-emitter of your transistor you can expect a 0.7 V drop across it when forward biased. |
H: Mosfet thermal problems in linear applications
Modern power FET's can be unreliable in some linear applications due to thermal instability causing die hotspots and premature failure. This is called the Spirito effect. How do Silicon Carbide devices compare?
AI: Several SiC MOSFETs I've looked at are worse than most regular MOSFETs in terms of thermal runaway (Spirito effect). This occurs in both linear applications and switching applications. For regular MOSFETs, it usually only occurs in linear applications.
If you have a particular SiC MOSFET you are considering, then look in the data sheet for this graph (example taken from a Cree CMF20102D SiC MOSFET): -
Evidence: if you apply a gate source voltage of 8 volts, you might expect to see a drain current of about 1.5 amps at -55°C. As the MOSFET inevitably warms to 25°C, the drain current will rise to about 4 amps and, of course, the SiC MOSFET would start to more rapidly warm.
At 150°C the drain current is about 11 amps and you are going to get rapid device destruction if this isn't curtailed. So, with a gate-source voltage of 8 volts you can say that the drain current increases by 11/1.5 (7.333) times over the allowable temperature range of the device: -
This is a significant clue that the SiC MOSFET I targeted will suffer from thermal runaway if not carefully used. I'm not saying all SiC devices are like this but, several that I've looked at are similar.
On the other hand, at a higher gate source voltage such as 12 volts, the likely range of drain current is from about 7 amps to about 25 amps i.e. a ratio of 3.57. This means the problem gets less as you raise the drive voltage to the gate. But still, regular MOSFETs are more tolerant.
Compare this with an equivalent graph for the IRF3205 (a regular MOSFET): -
With a gate-source voltage above about 6 volts, this MOSFET will self protect by shutting down the drain current should its temperature rise. Note the circle (ZTC); it's the point of zero temperature coefficient and below that voltage the MOSFET is in its linear region and can suffer some degree of thermal runaway.
The SiC MOSFET data sheets I've seen do not converge to a ZTC point and so it should be concluded that switching applications and linear applications are both susceptible to thermal runaway possibilities. |
H: Relay flyback protection
Is this the correct way to put a diode for flyback voltage protection to protect the infrared heater? And do I need to put a flyback protection for the Arduino pin or Vcc?
AI: Flyback diode is there to avoid voltage spikes when an inductive load is turned off.
In your case, only the one on the left side is necessary as you want to protect the arduino against the coil spikes of the relay.
The one on the right side should not be there as it's AC, you will have a short.
You may want to check the Arduino pin can provide enough current to drive your relay, usually, it is better to use a BJT or MOSFET. |
H: MOSFET switch not stable
I used an IRFZ44N MOSFET to build a switching circuit to light up a bulb from a 12V car battery.
It works but it is not stable.
When the bulb is off, after a while it glows and increases.
When the bulb is on, little by little it goes dim.
First I tested it on Proteus and then I did it with real hardware.
Can anyone tell me how to make it stable?
I want the bulb to extinguish when the push button is pressed. It should then stay off.
I have a good heat sink for the MOSFET. Can't we use push button?
AI: You cannot leave the gate of the MOSFET floating, this results in an unstable state and may damage it.
The switch at the bottom should be replaced by a 10k resistor. This will force the gate to go to 0V when the switch is not pressed.
Also, the MOSFET should be on the lower side of the lamp like this, as the gate has to be driven to at least the Vgs threshold. If it's above the lamp, the Vgs voltage will be too low:
simulate this circuit – Schematic created using CircuitLab |
H: Transformer different resulting current and voltage than expected
I am uncertain why the current on the secondary side does not follow the equation:
$$i_2 = \frac{N_1}{N_2} i_1$$
which gives
$$i_2 = \frac{20}{3} i_1$$
To measure the current I use two 1 ohm resistors (one on the primary side, and one on the secondary side) that I measure the voltage drop across using an oscilloscope (Keysight InfiniiVision MSO-X 3012T).
By adjusting the signal generator (inside the oscilloscope) to output a sine wave with an amplitude of 2.5 V, that is, 5 V peak-to-peak, and a frequency anywhere between 10 kHz and 20 MHz, I get that the secondary current is lower than the primary current. From 2 MHz to 10 MHz the amplitude of the secondary current is about 1/3 that of the primary current.
Measuring over the resistance at channel 1 gives a sine with amplitude of 50 mV for most frequencies, that would mean that a sine current of 50 mA is flowing through the resistor and the primary coil. From the equation I would then expect a current of 333 mA at the secondary side, and thus a voltage drop of 333 mV across the resistor on the secondary side. But instead I get currents below 30 mA on the secondary side for all frequencies.
I have the following toroidal core from FERROXCUBE: TN23/14/7-4C65 (link leads to product page at Farnell.com, datasheet is available here).
The image shows how the circuit is wired. Left side is the primary side, and the right side is the secondary side. The reference of the signal generator and all channels are connected directly to ground inside the oscilloscope, that is, the oscilloscope is of the type with common reference.
AI: If you look at the diagram below (a typical power transformer equivalent circuit), you'll see a red arrow that I have marked. That red arrow indicates that a current will flow into the primary winding even when the secondary is unloaded. That current will make the assumption about the secondary current and primary current relationship flawed: -
The magnetization inductance can be found from the data sheet of your toroid: -
Multiply the turns squared by 87 nH to get the magnetization inductance.
If you have 20 turns then \$L_{MAG} = 34.8\text{ } \mu H\$. How much current will this take - you need to factor that into your calculations. However, at the low end of your stated spectrum (10 kHz), the impedance of 34.8 μH is 2.18 ohms and is really dominant. It becomes less dominant at higher frequencies of course.
From 2 MHz to 10 MHz the amplitude of the secondary current is about
1/3 that of the primary current
That's a decent enough frequency to avoid the magnetization inductance problem so then it boils down to leakage inductance and copper loss. For instance, if the net series copper loss (referred to your secondary) is (say) a couple of Ω, then you will lose a significant ability to drive current into the 1 Ω load resistor. You could try using a load resistor that is bigger of course. Then there's leakage inductance (whose impedance rises with frequency) and, at some point this may become quite dominant.
For instance, if the leakage inductance is about 5% of the magnetization inductance it will have a value of around 1.7 μH. At 2 MHz, this has an impedance of 21.4 Ω. Do you see the problem here?
If we referred the load resistance back to the primary is would be seen as a resistance of: -
$$\left(\frac{20}{3}\right)^2 \cdot 1 \text{ }\Omega = 44 \text{ }\Omega$$
And clearly a leakage impedance of 21.4 Ω is going to have some effect at 2 MHz but, at 10 MHz it is going to dwarf the 44 Ω referred load impedance and radically reduce current in the secondary. |
H: What is this part in the image?
I'm fiddling with a toy and I found this part. I think its purpose is give feedback to a microcontroller about the angle of the DC motors.
This is the part:
This is how it's placed with the motors:
This is where it goes on the main PCB:
I hope you know this part. I don't know how to search for it so that's why I'm here.
AI: I hope you know this part. I dont know how to search for it so that's
why im here. Any help would be appreciated.
It's a slotted LED/photodiode (or phototransistor) detector and comes in various size and shapes and is made by several well-known manufacturers.
Omron Through Beam (Fork) Photoelectric Sensor
ROHM, Through Hole Slotted Optical Switch
To name but two. |
H: Transmiting analog signal with lora
I want to transmit an analog signal over Frequency Modulation with a Lora RA 02 module. First thing I need to do is convert the analog signal from the audio source to digital, right?. But I had so problems with it since Lora use Chrip Spread Spectrum (CSS). I can't hear my audio signal using my old FM radio receiver which works in frequency modulations. So, can I do something with it?
AI: The LoRa RA 02 module possibly uses 433 MHz as the main carrier frequency.
I can't hear my audio signal using my old FM radio receiver which is
works in frequency modulations.
Your old radio receiver will be able to tune between 88 MHz and 108 MHz so, it's extremely unlikely that you will be able to pick-up LoRa transmissions.
So, can i do something with it?
Probably not because, apart from the vast difference in carrier frequency, the audio signal is digitized and transmitted whereas for an analogue broadcast radio set-up, the carrier is frequency modulated with an analogue audio signal. |
H: PCB 6-layer stackup problem
I'm currently designing a PCB with double side components and I'm limited to 6 layers max. The project has couple of MCUs at 84 MHz. There are USART, I2C, SPI, some analogue lines and high-power lines in the design but not any high-speed lines. There are also some very short RF lines for antennas.
The problem is due to the high density and limited size of the PCB I can't use this stackup: S-G-S-S-P-S
At some parts of the PCB specially around the high pin count MCUs there's need for signal lines to go through the ground or power plane.
Also all the power electronics and switching components are on the back side.
This is the stackup properties provided by the PCB manufacturer:
So my main concern is if routing some signal lines through the power/ground plane will cause me problems or not?
AI: 3 basic rules
Rule #1: Bandwidth is not the clock speed rather the rise time f-3dB=0.35/Tr (10~90%) so you probably want thinner dielectric than normal for lower impedance tracks
this helps keep track/gap <= 5 mil (127 um) and < matched via impedance which raises L but thinner dielectrics raises C to maintain Z^2=L/C Also 3 mil (64um) track/gap is doable by good shops.
Rule #2 avoid crosstalk with adjacent SS layer parallel tracks.
Rule #3: Use lots of microvias for PS layer connections to other layers grids and appropriate decoupling cap per IC. If a Microvia is 50 Ohms on a power supply that is 50 mOhms, how many do you need? ( not depends on decoupling caps and rise time and ringing tolerance)
If you don't already have , get Saturn PCB Design Toolkit |
H: Can someone give me some insight on how to simplify this problem?
It is hard for me to understand how to start solving this problem. Should I start using the superposition theorem? Can it be simplified before?
AI: Superposition is a good thing to try any time you have multiple sources. In this case, it's mandatory because you have both AC and DC sources. So your overall strategy should be to solve the circuit separately at AC and DC.
If you try drawing the AC and DC equivalent circuits, you'll see what simplifications can be made. Pay careful attention to what happens to the sources in each situation.
EDIT: You can consider each source separately if you'd like. AC or DC equivalent means the circuit with only the AC sources or only the DC sources active. For DC, this means killing \$I_1\$ and \$E_1\$ and replacing the inductor and capacitor with their DC equivalents. For AC, it means killing \$I_2\$ and \$E_2\$. This is useful for looking at the role of inductors and capacitors. For example, the inductor has no effect on the circuit in either case and can be removed.
Remember, your goal is to find the voltage between the two open terminals on the right. With only \$I_1\$ active, you can see that there are only resistors between the two terminals:
simulate this circuit – Schematic created using CircuitLab
Kirchhoff's Current Law says that none of \$I_1\$'s current leaves the loop on the left. So \$I_1\$ has no effect on the voltage between the terminals on the right. That voltage is zero. So \$I_1\$ has no effect (it does not contribute to the Thevenin voltage), which means you can remove it. |
H: Help fixing a power switch
While disassembling a Sega Saturn to clean it, I removed this power switch:
I needed to separate the top grey button (1 in the image) from the rest of the switch.
After verifying with a multimeter that there wasn't any dangerous current on these components, I pulled like an idiot piece 1 with a lot of strength, and I think piece 2 made a sort of clicky noise, only to realized it would have been sufficient to widen the clips underneath the button to remove it easily.
I reassembled the Saturn, all works perfectly except for this switch, which I suppose have been mechanically damaged. When I press the power button 1, the console turns on, but only while I keep the button pressed. As soon as I release it, the Saturn turns off. I tried to tape the button down and it works indefinitely, until I remove the tape.
I would happily buy a replacement, but I can't seem to find it anywhere, and buy a broken console just to replace this seems like a total waste to me.
I have some questions:
what component is the black box (2)? I can solder, so I thought I could replace only that part, but I can't find anything similar. I'm a noob in electronics, is it a relay? I need the keyword to search for this piece. My understanding is that this thing has two states, which are toggled when pressing the button (piece 1), but now the state doesn't toggle and I need to keep it pressed down to have it "on".
Until I find a solution, is keeping the button taped down dangerous for me or the console? Can this cause more damage?
Is there a DIY solution to try to fix this thing given that is broken already? Heating, freezing, shaking, or other arcane methods from forbidden magic?
Bonus question: is the blue round component (piece 3) a capacitor?
AI: Just make sure the device is unplugged while working on it. The switch just serves to pass the hot phase to the device. You probably bent an internal contact in the switch, or deformed some plastic component that holds the switch latched. If you don't mind loosing the on-off switch, I'd just solder together the switch input-output, meaning once plugged in the machines is always on, you'd have to unplug it to turn off. Otherwise you can just replace the switch with any other 2A mains rated switch, might not look original but maintains functionality. The blue capacitor across the contacts really only serves to stop ripple from the mains, and is not indispensable, so if you replaced the switch it wouldn't be mandatory to transfer the capacitor. |
H: What is the distinction between software & firmware?
I've started learning about embedded coding. The words 'firmware' and 'software' are a bit ambiguous to me still. My understanding is that software is high level language tailored for user interaction, loaded into the CPU and modified frequently; whereas firmware is low level language, modified infrequently and loaded into a microcontroller for direct hardware control? What are the differences in terms of speed, timers, memory, peripherals, compiler, debugging etc.?
AI: In my industry, aerospace/defense, code written for a processor of any sort is considered software and has to follow a rigorous SW development process. This is irrespective of the complexity or size of the software product (1,000 SLOC or 1,000,000), and irrespective of what it executes on (uC, uP, SBC, etc).
FPGA/ASIC designs, since they are almost always done with a language such as VHDL or Verilog, are now considered to be firmware. I don't necessarily agree with this, but it is what it is. And as firmware, these designs have to follow many of the same processes that formal deliverable software has to follow. This is true even though as of today all FPGA and ASIC designs are done in our hardware group, and not by our software folks.
Back in the early days of FPGAs, that was not the case. I remember designers using the Xilinx PIP editor to program the early Xilinx devices, and I used schematic based tools to do some FPGA designs way back when. Those designs were never considered firmware, as they were more akin to a board level schematic-based design flow. The morphing of FPGA designs into the firmware lexicon happened over time as language based tools took over design task. |
H: How to parameterize a clock divider?
The best clock divider is a PLL inside a FPGA. But the number of PLLs are limited. And sometimes using of counter to divide a clock is justified:
reg [7:0]counter = 0;
reg divided_clk = 0;
always @(posedge clk) begin
if(counter == DIVIDER - 1) begin
divided_clk <= ~divided_clk;
counter <= 0;
end
else begin
counter <= counter + 1;
end
end
But the condition
if(counter == DIVIDER - 1) begin
use logical elements in non-optimal way.
If we make another condition:
if(counter[DIVIDER_POW]) begin
we use less LEs but lose an accuracy of dividing.
Also we can find an optimal divider, then decremet the divider by one, then convert the divider to binary and make the condition from elements with one. For example the condition based on the divider equal to 50 looks like:
if(counter[5] && counter[4] && counter[0]) begin
The accuracy of this condition is the same as the first method. And it takes less LEs.
But is it possible to parameterize such condition?
AI: You can write this more generally as counter & DIVIDER == DIVIDER. This will check that all the 1 bits in the divider are in the counter, but it won't check the 0 bits, which are not necessary to check. The synthesis tool will certainly optimize out the anything & 0 == 0 part. |
H: How to calculate the \$\mathcal{H}_2\$ norm of a second order transfer function?
I'm having trouble to calculate the \$\mathcal{H}_2\$ norm of a second order transfer function
$$H(s) = \frac{\omega_n^2}{s^2+2\xi\omega_ns+\omega_n^2}$$
where \$\xi>0\$ and \$\omega_n>0\$. I know that the \$\mathcal{H}_2\$ norm is given by
$$||H_2|| = \bigg\{\int_{-\infty}^{\infty}|H(j\omega)|^2d\omega\bigg\}^{1/2}$$
and that the magnitude of the frequency response is given by
$$|H(j\omega)| = \frac{1}{\sqrt{\bigg(\dfrac{2\xi\omega}{\omega_n}\bigg)^2+\bigg(1-\dfrac{\omega^2}{\omega_n^2}\bigg)^2}}$$
Can someone help me with this? Is there another away to calculate it?
Thanks a lot.
AI: From a state-space representation, the \$H_2\$ norm can be computed as \$\sqrt{\text{Trace}\left(b q b^T\right)}\$ or \$\sqrt{\text{Trace}\left(c p c^T\right)}\$, where \$b\$ and \$c\$ are the input and output matrices, and \$q\$ and \$p\$ are the observability and controllability gramians.
I have done the calculations below using Mathematica and the result is \$\frac{1}{2}\sqrt{\frac{\omega _n}{\zeta }}\$. |
H: How to design a square wave inverter circuit without an op amp
I am using an NE555 timer circuit to generate a 0 to 12 volt 10kHz square wave.
I would like to invert that square wave (so inverted signal is 0 when original is 12V and 12V when the original is 0 V.)
I used an NPN transistor that creates a distorted inverted wave.
Is there a simple way to make a clean inverter circuit for this AC signal?
Here are pictures of the circuit and output:
AI: Here is what I get with the 2N3904 driven with a clean 12V square wave (note that the 555 model is not very accurate, but that doesn't matter here). Collector is open except for the 10K resistor to +12:
There is a slight delay in the rise due to charge storage effects but no such waveform.
Is there a hidden capacitor or probe model or something of that ilk not shown? It would take a huge capacitance (~10nF) to cause that effect.
Here is the simple circuit:
Version 4
SHEET 1 880 680
WIRE 400 16 288 16
WIRE 288 128 288 96
WIRE 672 128 288 128
WIRE 288 144 288 128
WIRE 400 144 400 16
WIRE 80 192 64 192
WIRE 128 192 80 192
WIRE 224 192 208 192
WIRE 64 208 64 192
FLAG 288 240 0
FLAG 400 224 0
FLAG 64 288 0
FLAG 288 128 Vcollector
FLAG 80 192 Vin
FLAG 672 192 0
SYMBOL res 224 176 R90
WINDOW 0 0 56 VBottom 2
WINDOW 3 32 56 VTop 2
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL res 272 0 R0
SYMATTR InstName R2
SYMATTR Value 1K
SYMBOL voltage 400 128 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 12
SYMBOL voltage 64 192 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V2
SYMATTR Value PULSE(0 12 10n 10n 10n 50u 100u)
SYMBOL npn 224 144 R0
SYMATTR InstName Q1
SYMATTR Value 2N3904
SYMBOL cap 656 128 R0
SYMATTR InstName C1
SYMATTR Value 10n
TEXT 30 312 Left 2 !.tran 300u |
H: n-channel JFET: importance of gate drain voltage (Vgd) and validity of negative drain source voltage (Vds)
We always consider the gate source voltage as this determines the Vgs,off. But how come the Vgd doesn't have the same effect?
Following from this (and more importantly) why can't we have a negative Vds for an n-channel JFET??
I get that we need to prevent forward biasing between the diode, but that only means that Vgs < 0 and Vgd < 0, it does not mean that Vds < 0!
AI: Most JFETs are symmetrical, and the source of an N-channel is defined by convention as the non-gate terminal with the lowest voltage. You can switch the gate and source terminals and get the same effect.
MOSFETS may be symmetrical, but due to differences in construction meant to improve their performance, most are not. There may be JFETS which are asymmetrical, but I haven't run across them personally. |
H: Device to detect current (for cable including hot, neutral, ground)
I am trying to determine if an electrical device is on in a non-invasive way using an arduino. My understanding is that devices like current transformers and Hall sensors must enclose only the hot or only the neutral wire.
Am wondering how products like the iVac work as it is clamped around both hot and neutral wires. What components could I get to achieve this?
AI: From page 13 of the user manual:
The rear Clamp Cover has three positions for mounting, to accommodate various sizes of
power cord diameter.
Clever!
The Mode Switch is set to OFF. The Sensitivity Control is set to mid point.
The power to the power tool is turned on.
If the ‘Tool Plus’ is detecting the current flow then the Activity LED will turn on.
If the Activity LED does not turn on, then the Sensitivity Control should be adjusted
counter clockwise until the Activity LED turns on.
If the Activity LED does not come on, then the ‘Tool Plus’ should be rotated slowly around
the cable or moved along the cable until the Activity LED comes on.
The last instruction above gives you the clue as to how it works.
Figure 1. Magnetic flux around the live and neutral conductor of a 3-wire mains lead. (Image mine.)
You are correct that a typical current transformer will see zero resultant flux around the cable. The trick in this case is to put a small sensor - probably a Hall sensor - in very close proximity to the cable and rotate it around to a point where it is closer to one of the current carrying wires. In my illustration this would be above the brown or to the right of the blue. Placing it on the top right or beside the earth wire would result in cancellation of the two fields and an inability to sense current.
At this point tighten the clamp to the cable.
You've got it working so clamp it in this position.
The Sensitivity Control should now be set to a fully clockwise position. It should then be
rotated slowly clockwise.
Now set the "on" threshold. |
H: Making a simple calculator with ATMEGA32
I try to create a calculator with ATMEGA32 but it did not work correctly! For example it do operations like this (2/1=0),(5*6=12808),(22+88=12746). I know that something is wrong but I cannot find it so I need your help. Many thinks
while (1)
{
// Fkeypad is a function which read the keypad. Its output is character.
a=Fkeypad();
d=(int) a;
// I do not know the number of digits so try to make a counter (i)
if(a=='1'||'2'||'3'||'4'||'5'||'6'||'7'||'8'||'9')
i++;
switch (i){
case 1:
temp1=d; //uint temp1
break;
case 2:
temp1=temp1*10+(d);
break;
case 3:
temp1=temp1*100+(d);
break;
case 4:
temp1=temp1*1000+(d);
break;
}
switch (a){
//if user push a sign(*/-+) it means that he try to write the second number so I put the first number in temp2 and save the sign in temp3 for when I need to do operation
case '*':
i=0;
temp2=temp1; //uint temp2
temp3=a; //char temp3
break;
case '+':
i=0;
temp2=temp1;
temp3=a;
break;
case '-':
i=0;
temp2=temp1;
temp3=a;
break;
case '/':
i=0;
temp2=temp1;
temp3=a;
break;
case '=':
{
i=0;
if(temp3== '*')
calc=temp1*temp2;
if(temp3=='+')
calc=temp1+temp2;
if(temp3== '-')
calc=temp1-temp2;
if(temp3=='/')
calc= temp1/temp2;
sprintf(f,"%0000d",calc); //uint calc
lcd_puts(f); // char f[5]
break;
}
case 'c':
{
i=0;
lcd_clear();
break;
}
AI: There are several problems with these first few lines.
a=Fkeypad();
d=(int) a;
if(a=='1'||'2'||'3'||'4'||'5'||'6'||'7'||'8'||'9')
I'm assuming that Fkeypad() returns an ASCII character value. If that's not correct then you've got other problems and the rest of this answer is wrong.
First read about operator precedence of == and ||. The if statement that you wrote does not do what you intend because of operator precedence. Also see this question.
The following if statement does what you intend.
if ((a >= '0') && (a <= '9'))
Second, simply casting an ASCII numeric character value to (int) does not convert it to its integer equivalent. Instead you should subtract ASCII '0' from the ASCII numerical character value.
This code will give you the proper integer value d. But you may have additional problems elsewhere in your code.
a=Fkeypad();
if ((a >= '0') && (a <= '9')) // Is this a numerical character?
{
int d = a - '0'; // convert from ASCII to integer
...
} |
H: How can I verify the max power theorem in a buffer opamp?
I was thinking since the buffer makes the output follow the input the power should be the same in a buffer opamp circuit and a resistive load.
There is the next circuit (the expected power was .5W, and besides the wattmeter is bad connected, I dont know why us 250uW)
then with the opamp
I was expecting the opamp does not draw energy (ideally) and then the same power should be the same in either circuits, so why isnt the same power output?
AI: Your first circuit has a 3:1 voltage divider.
Your second circuit doesn't. The op-amp input impedance is so high that the 2k resistor makes no difference. It sees the full 1.5 V of the battery. |
H: How to apply Thevenin's theorem to the equivalent two-port circuit of receiving antenna?
This circuit is adopted from page 633 of the book of "Field and Wave Electromagnetics, 2ed" written by David K. Cheng. According to his description:
The equivalent internal resistance obtained by Thevenin's theorem should be $$Z_{22}-\frac{Z^2_{12}}{Z_{11}}$$. And I have confirmed this equation is right by finding another paper 1 giving the same equation. However, it seems to me, with shorting $$Z_{L}$$, it should be $$\frac{Z_{12}V_1/Z_{11}}{\frac{V_1}{Z_{11}-Z_{12}+\frac{1}{1/Z_{12}+1/({Z_{22}-Z_{12})}}}}=\frac{Z^2_{12}}{Z_{11}Z_{22}}(Z_{22}-Z_{12})+\frac{Z_{12}}{Z_{11}}(Z_{11}-Z_{12})$$, which clearly not leads to equation (11-101). Which part of my derivation is wrong?
1 Collin, R. E. "Limitations of the Thevenin and Norton equivalent circuits for a receiving antenna." IEEE Antennas and Propagation Magazine 45, no. 2 (2003): 119-124.
AI: You are assuming that the current i2 is the same as the current passing through V1 which is not the case. The current passing through V1 is not the same as the one passing through Voc.
You apply the current divider rule to get i2 from i1, when shorting ZL it is multiplying the current by Z12/Z22. That is multiplying the final result by Z22/Z12 and you will get the right answer. |
H: Reason behind the naming convention for the non-gate terminals of JFETs?
Why, for an N-channel JFET, is the source terminal defined by convention as the non-gate terminal with the lowest voltage? Why does this convention swap for P-channel?
AI: For an n channel J-fet it is the voltage between the gate and the lowest non-gate terminal which controls how hard the J-fet is turned on with the J-fet fully turned on when the gate voltage is equal to the voltage at the lowest non-gate terminal. Most J-fets are symmetrical and so, for a n channel j-fet, the lowest voltage non-gate terminal is defined as the source.
For an n channel J-fet the gate must be taken negative with respect to the lowest non-gate terminal to turn the J-fet off (depletion device) and the gate must not be taken much above the voltage at the lowest non-gate terminal or it will forward bias the gate diode.
Everything is reversed for P channel J-fets. It is the voltage between the gate and the highest non-gate terminal which controls how hard the J-fet is turned on with the J-fet fully turned on when the gate voltage is equal to the voltage at the highest non-gate terminal. Most J-fets are symmetrical and so, for a p-type J-fet, the highest voltage non-gate terminal is defined as the source.
For a p channel J-fet the gate must be taken positive with respect to the highest voltage non-gate terminal to turn the J-fet off and the gate must not be taken much below the voltage at the highest non-gate terminal or it will forward bias the gate diode.
The definition of the source as the lowest voltage non-gate terminal can cause distortion problems in ac applications such as wien oscillator gain control where the gate is held at a constant negative voltage with respect to one grounded non-gate terminal and the other non-gate terminal is oscillating about ground. This second oscillating, non-gate terminal will be the drain on positive swings and the source on negative swings and so the J-fet will be turned on more during negative swings (the gate voltage is closer to that of the source, the lowest voltage non-gate terminal) causing output distortion. A couple of high value resistors around the J-fet efficiently circumvents this problem. |
H: Transistor turns off only after a delay
I'm building an IC programmer (for the AS5043 sensor) that requires two voltage levels; 5V and 7.5V. I decided to control those with two PNP transistors. I'm controlling them from a 5V microcontroller.
The programming scheme requires a 2us pulse for each bit.
For the 7.5V line, I made an NPN driver based on the circuit here. Here's the schematic of the switcher:
The C3 capacitor is explicitly required by the manufacturer for the OTP programming process. For development purposes, I have a small (<100R) resistor at PROG to simulate a load and discharge C3 after each pulse.
The circuit works, but exhibits strange, to me, behavior:
Magenta: control signal
Yellow: output
Blue: voltage after resistor R3, just at the Q3 base.
It seems that there's a delay to the transistor turning off. This delay is constant and doesn't change if I make the impulse longer.
For reference, the IC I'm trying to program is described here; the datasheet contains programming information as well as the simplified schematic of the reference programming board.
I'm not very well-versed at analog electronics, so I might need a good basics refresher and/or might be making a fundamental error.
AI: Bipolar transistors exhibit a behaviour called charge-storage.
When the transistor is turned on charge builds up in the base region of the transistor. To turn the transistor off it is required that that charge is removed.
One way to do that is to force a reverse current into the base by adding a capacitor across the base driving resistor (as you have discovered).
Understanding Charge Storage |
H: How to remove huge spikes in current
I am making an DC to AC converter circuit in LTSpice. The schematic is posted below.
When I plot the current across the transistors, I get huge spikes in the current, as seen in the diagrams below.
We want to get rid of these spikes in the current.
When we built this circuit in the lab we saw that these large currents were messing with the power supply's output voltage. The power supply can only handle 5 amperes. The current (without the spikes) decreases exponentially with time and soon becomes less than 5 A, but the spikes remain unchanged.
Is there any way to get rid of these spikes?
If so how?
AI: That's called shoot-through. It happens because you are using the same signal to control your both high and low side transistors of each half-bridge. Since the tendency is that it takes longer to turn off than to turn on, there is a point in time where they are both MOSFETs are on creating a short-circuit.
Either use independent control for the MOSFET so you can have a small time delay between turning a MOSFET OFF and a MOSFET in the same half-bridge ON, to give the MOSFET turning off enough time to completely turn off before the other MOSFET starts turning on, or add gate circuitry to make turning on happening more slowly than turning off. A larger series gate resistor will slow down the turn on and turn off time. You can use diodes so that charging uses a different resistor than discharging to independently tune the turn on and turn off times.
Also, you are switching an inductive load which will produce voltage spikes when interrupting a current as the inductance tries to use the energy in the collapsing magnetic field to keep current at the same level via V = I(dL/dt). Since this is an H-bridge configuration, you should have flyback diodes anti-parallel to the MOSFETs to provide the inductive flyback current a path to flow to gracefully decay so a large voltage spike does not need to be produced. Or, you need to place a bidirectional TVS diode in parallel with your inductance which will do something similar (a unidirectional TVS diode, or any unidirectional diode will not work here since your inductance experienced current in both directions).
NOTE: A half-bridge is different than an H-bridge. An H-bridge is formed from two half-bridges. |
H: are all 18650 batteries interchangeable with one another?
I recently bought a PowerTac E9R-G4 flashlight that uses 18650 batteries. Replacements can be bought on amazon.com fairly cheaply.
The box the flashlight comes in and the manual, however, both say "ONLY USE PowerTac 18650-3200mAh High Drain batteries".
The battery that the flashlight came with says "11A max continuous discharge - 15A max pulse discharge". Maybe regular 18650 batteries don't support pulse discharges at that amperage? Altho then again idk why pulse discharge would matter unless I was using the strobe mode that the flashlight has?
What would / could happen if I used other 18650 batteries? More generally, are all 18650 batteries interchangeable with one another?
AI: Even though they are not interchangeable, most likely you could use a wide variety of 18650 batteries with that light. The manual is BS as far as I am concerned. I notice that the spec sheet says even in turbo mode the 3.2 Ah battery will last for over 2 hours. This means it is actually not a high discharge application. The cell is only running at 0.5C or less.
So you can use any quality 18650 cell. Unfortunately there are a lot of junky cells out there so buyer beware. For sure anything that claims more than around 3.5 Ah is fake or junky.
I would suggest getting a protected cell rather than a raw/bare cell. |
H: What are some reasons for hand painted dots on chips?
I've seen lots of products with hand painted dots or markings on chips, what do they often mean? Obviously I understand everybody has their own reasons but could it be an industry common practice for QA or programming?
For example, this picture of an Xilinx CPLD has two painted dots. I've also seen ones where it's a sloppy line on the middle of the chip.
(Image source Wikipedia)
AI: These are put there during assembly and test of the PCB and can mean anything the manufacturer wants to mark.
Often such a dot is put on a microcontroller, when the firmware is successfully programmed into memory. It can also mean, that the device passed all the tests during production.
Whatever the dot means: It is a sign for the manufacturer, that certain steps are done. This makes it easily visible if a board is ready to be processed further, or packaged, or ... |
H: Altium Shortcut to cycle through all PCB layers one by one
I wonder if there is any shortcut in Altium to cycle through all layers of a multilayered PCB one-by-one? That is to say that when the shortcut is first entered 'Single layer mode' is selected and only one layer is displayed first and then when the shortcut is entered again then the next layed is displayed in 'Single layer mode'.. and so on.
AI: From the Altium documentation:
There are two approaches to interactively change layers during
routing:
Press the * key on the numeric keypad. Each press of that key will move you down to the next available signal layer.
Use the Ctrl+Shift+Wheel Scroll shortcut combination. Hold Ctrl+Shift, then scroll the mouse wheel forwards to move down through
the available signal layers, scroll the mouse wheel backwards to move
up through the available signal layers. Note that this shortcut can be
used at any time to change layers, if you are not currently routing
then this shortcut combination will step through all enabled layers.
This does not only work during routing, but you can use these methods any time.
While * brings you one layer down, Shift + * goes one layer up. |
H: Single Value range is not allowed in packed dimension
I have been reading about packed and unpacked dimensions in systemverilog from https://www.chipverify.com/systemverilog/systemverilog-arrays, in the following code I just want to use a memory array of 64 bits width and 256 depth. This will be used in a testbench in vivado simulator.
So far, I have used many combinations on how to define the memory but always I get the same syntax error: single value range is not allowed in packed dimension, displayed is my final attempt. could you please tell me what is the issue here?
bit [63:0] tab [256];
tab[0] = 64'h30000000000000FF; //RX
tab[1] = 64'h80000000000000FF; //TX
tab[2] = 64'h00000000000000FF; //SW
tab[3] = 64'hC0000000000000FF; //LP
...
AI: With this:
bit [63:0] tab [256];
Your second dimension is not a range, so if the syntax were valid, it would be trying to declare a single 64-bit value called tab.
The correct syntax is:
bit [63:0] tab [255:0];
Which is an array of 256 x 64-bit values |
H: Why do European motorized appliances draw less inrush current than their American counterparts?
I have been trying to tease apart the history and evolution of arc fault circuit interrupter requirements, and in the process, came across a curious historical sidenote early in its genesis, namely that the use of a 5x-or-so (IEC "B" curve) magnetic trip on general branch circuit breakers is said to serve as a highly effective fire prevention means. This was followed up on by EIA with a proposal in the 1996 NEC, but according to a UL whitepaper, the proposal was rejected due to concerns about inrush from tungsten and motor loads. However, according to this article, said IEC "B" curve breakers are considered "generally suitable for domestic applications" in at least some countries utilizing IEC-derived wiring standards, with "C" curve breakers (8x-10x magnetic trip) reserved for dedicated motor loads or other high-inrush situations (such as magnetic LV lighting transformers) in the domestic context.
This raises a question, though: why is it that the North American market seems unable to utilize magnetic trip thresholds below 7x-10x (roughly "C" curve, and generally equivalent to a QO's magnetic trip, at least on 15/20A single pole breakers)? Is it simply a matter of "half the voltage = twice the motor inrush," or is there some deeper reason that domestic motorized appliances made for the rest of the planet have a lower inrush current than their North American counterparts?
AI: Is it simply a matter of "half the voltage = twice the motor inrush"
Yes it is. For a given load power, the current taken by a load in the US will be about 2.1x higher than an equivalent load in the UK.
This not only applies to continuous load current but inrush current too. |
H: How are these layers like LCD added in Altium Designer?
How are these layers like "LCD" added in Altium Designer?
My Altium version is 21.
AI: They might be new layers added and then given names to suit their application. Or they might have had other names and got renamed like this: - |
H: CP2102 bypass capacitors
I'm using planning to use CP2102 as an USB/UART transceiver. Datasheet (can be found here: https://www.silabs.com/documents/public/data-sheets/CP2102-9.pdf) on page 21 shows example of self-powered schematic, and that's exactly my scenario: external 3.3V LDO regulator which feeds several ICs on the board, including CP2102. In this case divider circuit is needed in order CP2102 could safely detect USB Vbus presence. However, same picture shows that in total 4 decoupling capacitors are required, 2 on Vdd pin, and 2 on REGIN input to internal 3.3V regulator.
But these two pins are physically adjacent to each other, see picture below:
Do I really need to use 4 caps? Or I can connect these two pins by a trace, and use 2 capacitors for decoupling?
My schematic for this part of the board so far is below:
Also, can I omit resistor from 3.3V to RESET pin? It would be very convenient to connect them directly by short trace underneath the chip.
AI: SMD ceramics of the same package size have the same inductance, therefore adding 100nF in parallel with 1µF will only provide better HF performance (ie, lower inductance) if the 100nF cap is in a smaller package than the 1µF cap, say a 0603 1µF cap and a 0201 100nF cap. If you use two caps of the same size, it will perform worse than one 1µF cap due to antiresonance.
So, if you use all 0603 caps, the simplest solution is to use only one 1µF ceramic, but take care in placing and routing it correctly.
With 4 layer the optimum is: a small copper pour for the VDD/REGIN, then two vias to ground plane on layer2 to link to the chip's ground powerpad.
If you are extra paranoid, you can put one cap per pin. In this case put the one for 5V IN on the left of the one I drew, with a little bit of trace. Since an internal regulator can tolerate more voltage drop than the internal chip VCC, it makes sense to put Vcore cap closer and the LDO input cap further.
Note that a 2mm bit of 0.5mm wide trace between the pin and the cap will have 1nH inductance, which is about the same as a properly mounted cap. So if you insist on putting 2 caps in parallel "because 100nF is better at HF" but you must use longer traces because it doesn't fit, then it's pointless. Hence the bit of copper pour, which is much less inductive.
If you use 2-layer board, then ground plane will be 1.6mm away instead of 0.1-0.2mm, in this case it makes no difference which side of the board the cap is on since the current loop will go through the whole board thickness anyway, so if you put components on both sides, you can also put the cap on the back. In this case it would be better to use one via per power pin (or 2 caps) ; after all the manufacturer bothered to use two power pins, probably to prevent the current from one from coupling into the other.
If you already have a 3V3 LDO then there is probably enough capacitance on the output already that it would make double duty with the 4.7µF cap, so see what caps you have on your board already. Note 4.7µF tantalum caps with huge ESR are mostly for decoration and damping resonances... |
H: How to see the solder mask layer in Altium PCB?
Is there a way to see the solder mask layer (green coating layer) of a PCB in Altium? Is it a mechanical layer?
AI: It's called "T-Solder" (top) and "B-Solder" (bottom) by default, and you can toggle visibility like any other layer. They're not mechanical layers, they're signal layer pairs, so when you flip a component to the opposite side the solder mask follows.
Here's the top solder mask for a TO-252 in single-layer mode:
And the same part with all layers displayed, but with T-Solder as selected layer. |
H: What is the name of the translucent substance on the PCB?
PCB on photo is from the Kinesis Advantage keyboard. I need a similar substance to remount the PCB. What substance should I use?
AI: That looks like hot melt adhesive, i.e. glue. |
H: Why don't transformers burn?
I don't know how transformers work but the primary coil has a closed circuit. If there is 0 load on the transformer it would short circuit
AI: If there is 0 load on the transformer it would short circuit
This would only be true if you connected the transformer to DC source (and the coil would consist of an ideal conductor with zero resistance).
But normally a transformer will be connected to AC source and then you have to take in mind the reactive resistance of the coil which is \$X_L = 2π·f·L = L·ω\$.
With voltage V you get a current of \$I = \frac{V}{X_L}\$.
Voltage and current are out of phase by 90 degrees, so this (ideal) transfomer doesn't dissipate any energy. |
H: Why do we have a limited bandwidth in electronics?
I've been looking around a bit on optical communications and it is said that the main advantage in using optical communications, namely optical fibers, lies in the gigantic bandwidth available, when compared to the few GHz that electronics can manage. My question is: what is the physical phenomena that is limiting the electronics bandwidth? In light I can see it to be the optical properties of the waveguides such as absortion, and dispersive mediums, but what about in electronics? Specially in current nanoscale electronics like transistors.
AI: I feel like there are almost two questions here
What limits the bandwidth of electronics? (Let's focus on solid-state electronics)
Why do optical waveguides provide such large bandwidth?
Side Note: Comparing the bandwidth of electronics and that of optical fiber is somewhat odd to me. I say this because electronics, such as LEDs and LASER Diodes, are frequently used to send signals down optical fibers. It would be more common to compare optical fiber to other options for carrying electromagnetic waves such as Coaxial cable, twisted pair, metallic waveguide, free-space etc. I touch on this somewhat in point 2 below.
For 1. you can spend a long time reading up on the semiconductor physics behind this but switching on and off a transistor, LED or LASER diode is not an instantaneous process. These structures have capacitance which means there are voltages that cannot change instantaneously. This limits the rise and fall time of signals. The slower the envelope of a signal changes, the smaller its bandwidth is.
You correctly noted that dispersion will limit the bandwidth in an optical fiber. Chromatic dispersion for instance means that you can not use too broad a range of wavelengths as the components will travel at different speeds and you will get Inter-symbol interference on your channel. It's similar with say a transistor driving a length of coax, the capacitance and inductance of the circuit will result in different phase shifts for different frequency components, and therefore transmitted symbols will broaden in time and interfere with one another.
For 2. Ultimately, it is all electromagnetic waves and governed by the same fundamental equations. However, there is substantially more bandwidth available at optical frequencies than say microwave frequencies. A given device structure may support a 10% 3db-bandwidth, but 10% of 1000THz is far larger than 10% of 10GHz. |
H: DIAC datasheet's circuit is not in series with TRIAC's Gate
Being my first time to use a Triac and a Diac to control an AC signal, I read many questions/answers in this forum related to DIACs controlling TRIACs, all being very helpful.
Now, I see in a MOC302 DIAC's datasheet page 8, something that I dont understand:
Won't the Triac conduct if the R1 is low enough? I do not understand the reason to use R1 there, it should be an open circuit in R1, so that the DIAC could be in series with Triac's Gate.
And I saw the same conficuration at this question:
But no one commented why his R6 is there.
EDIT:
Regarding mainly @Spehro Pefhany's answer, since the R1 makes the Base less sensitive,
I guess R1 has to be high enough so that It wont cause the Triac to conduct when the photo Diac is off and AC voltage is on this stage:
So if Triac conducts at Holding current= 20mA, we need the Resistor to be at least (more than) R=100/0.002=50kOhms, Right?
(As long as the voltage on its gate does not exceed (lets say) 1.3V where it conducts, the 50Kohms will do the job, but still, I do not know how to calculate if the Voltage at the gate will surpass 1.3V on the above schematic with R1=50K)
AI: That's not a "diac", it's a photo triac.
The gate-MT1 resistor is to deal with leakage and bias current in the photo triac and/or zero crossing circuit. It effectively lowers the sensitivity of the triac a bit by conducting some of the current that would otherwise go to the gate.
Many triacs are insensitive enough that it won't make any difference.
Worst case will usually be at high ambient temperature (for both the triac and the opto-isolator). So you want to pick a value that is low enough that the triac cannot trigger when it is supposed to be off, but does not conduct so much current that the circuitry cannot drive it. If you make the resistor too low, then R2/R3 (1st schematic) or R13 (2nd schematic) will burn up because the triac won't trigger at all. |
H: Why is the light emitted by the LED not of a single wavelength but consists of a narrow range of wavelength instead? Spectral linewidth change?
I do understand that the wavelength of the lights depends on the energy gap of the semiconductor, but why does it consist of a narrow range instead of a fixed value? is it because during recombination the photons have random phases?
Also, how does the spectral linewidth change if I increase the temperature? If I increase the temperature, the electron distribution in the conduction band will increase as more electrons jump from VB to CB. How does that exactly change my spectral linewidth?
AI: Each photon emitted from an LED is the product of an electron-hole pair recombination. Charge carriers (electrons/holes) in a semiconductor have an energy distribution which is a function of dopant concentration, density of states of the semiconductor and the Fermi distribution. At elevated temperature the Fermi distribution is stretched out and results in a wider range of electron and hole energies. These are all still concentrated near the bandgap, but increases the probability of a slightly more energetic electron combining with a slightly more energetic hole to emit a photon of higher energy (shorter wavelength). At higher temperatures there are also more phonons available that enable transitions that would otherwise be forbidden. This also broadens the emitted spectrum and allow for slightly sub-bandgap emission.
But temperature also affects the bandgap energy. As the temperature increases, the bandgap energy decreases. This will shift your peak to longer wavelengths at higher temperature. |
H: MBI5026 led driver datasheet question
I've bought many MBI5026GF driver ICs.
based on the datasheet, the IC set up with MCU and other components is very similar to 74HC595 (Serial to parallel procedure) but with 16 bits of data per IC.
but I don't understand how the LE pin works. (it's supposed to make the latching happen.)
the pin description is not clear to me. (when it gets low data is latched to output pins ? or when it's low?)
which way is correct to code my mCU ?
set LE low. send serial data. set LE high.
set LE high. send serial data. set LE low.
should OE be always low when all these happens ?
Datasheet Link
AI: When Latch Enable (LE) is high, the data in the shift register will immediately appear on the LEDs. So, you don't want it high while you are loading the shift register or the LEDs might flicker.
#1 is better than #2, but I would do it this way.
Start with LE low. Load the shift register, then set LE high momentarily. Keep it low until after you have loaded data again. |
H: Are these inductors or resistors and what function do they serve?
Some context: I'm trying to learn about ways to reduce EMI's effects on microcontrollers. I've got a Telemecanique logic module and decided to open it up to investigate.
I found myself with these:
Are those inductors or resistors rated for higher power consuption? When I measure them with the multimeter they turn up 5.6kOhm, but that's with them soldered to the board so the measurement is not very useful. they're paired with SMD capacitors and resistors.
They are in series with the input terminals.
What function do they serve?
AI: These look like MELF package resistors as others have said.
It's hard to tell the exact colour of the rings from the photos. To me they all appear to have five coloured rings, brown black black red (slightly wider gap) brown, although some are fitted "back to front". This would make them 10K with 1% tolerance. Other evidence supports this:
Note that some of the other components (like the small surface mount resistors next to these) don't have their orientation controlled either. Uncontrolled orientation seems a far more likely explanation than that there are two different values used here that just happen to have the same band colours but in reverse.
When measuring these in place on the board you are measuring the resistance in parallel with "something". As you measure 5.6K, these resistors must be larger than 5.6K. They can't be 10 or 12 ohms as stated in another answer, or 120 ohms (which is what they would be if I got the band colours right but the direction wrong i.e. brown red black black brown).
These are also unlikely to be 12K as stated in another answer. 12K would read brown red black red X or brown red orange X.
Finally, these are unlikely to be inductors if you are reading a resistance across them as high as 5.6K - you might see a few ohms from a small inductor but not kilo-ohms.
Edit:
Following the tracks in the photos, I think this is the circuit diagram for the input. The mystery components are the two resistors at the left, R1 and R2.
I think these resistors are designed to handle voltage spikes in the input signal. MELF packages can usually handle about 1W of power and are usually good with short surges above that. A 10K resistor with 100V across it will dissipate about 1W. These are probably capable of handling short spikes up to 200V or so.
This will be why the MELFs were chosen instead of using the same ceramic 10K resistors used elsewhere on the board (marked 103) which can usually only handle about a tenth to a quarter of a watt.
A high voltage spike at the input will take two routes. Half the current will go through R1 to ground. The other half will go through R2 and start charging up the capacitor C1. The values will have been chosen so that even the longest spike expected won't be able to charge C1 to higher than about 5V which is the maximum the ATMEGA128 can handle.
It's hard to see exactly what value R3 has (they're the little black ceramic resistors between the MELFs on the top side and the little brown capacitors) but it will be there to set a maximum frequency that can pass through this input filter i.e. to cut out high frequency noise in the input signal.
R4 is just to limit the maximum current that can flow into the microcontroller in the event a spike changes the voltage at C1 quickly.
After R4 the signal goes to a via under the Atmega128 microcontroller, so it probably goes straight to one of the microcontroller's input pins. |
H: Capacitor charging curve when using a voltage regulator with current limiting?
Most voltage regulators have output impedance in the low mOhm range, some also have internal current limiting circuits.
I want to know what the charging curve of a large capacitor might look like when connected to a voltage regulator output with current limiting, if that makes sense.
The inrush current would likely trigger the current limit in reg for a spilt second, as if the capacitor was being fed from higher impedance source, as cap's current draw tapers off and falls below the current limit the remaining charge would be filled up quickly because of the regulators low output impedance.
Seems to me that the charging curve of the cap if measured in this instance would be very different to the typical RC curve.
Is this correct?
AI: Yes, the capacitor charging curve would at first have a linear voltage-versus-time section if the charging was initially current limited. Easy to simulate:
simulate this circuit – Schematic created using CircuitLab
Running a sweep over IMAX at different current limits yields the following plot:
The lower the current limit, the longer the charging is current-limited.
But to answer your question directly, yes, the shape of the curve is distinctly different from the normal RC charging curve. |
H: What are the connectors CN11 and CN12 on STM32 Nucleo-F103RB used for?
On the STM32 Nucleo-F103RB board, there are two connectors on the upper part named CN11 and CN12 respectively. Next to them there's a text that says GND, but if they are grounded why do they have jumpers on them? I couldn't find any relevant info on the manual, other than the fact that these jumpers can be removed to be used in other cases.
AI: A quote from product manual:
Two unused jumpers are available on CN11 and CN12 (bottom side of the
board).
In the board schematics, all four pins are connected to GND.
In short, they are four ground pins, and you can store two jumpers on them.
On boards that have more of them, one on each corner, they also function as stand-offs. |
H: Understanding how this bi-directional logic level shift works
I'm having a bit of trouble understanding how this logic level shift circuit works exactly. The design is from Sparkfun.
Hhere is the schematic:
For my application, the LV and HV are the 3.3V and 5V bus respectively. The LV1 and HV1 are the respective logic pins. I have a confident idea on how it works when LV1 is the input and HV1 is the output. However I can't seem to figure out how it works the other way around when HV1 is the input and LV1 is the output.
Here is what I know so far on how the circuit works. If LV1 is high, the voltage potential between LV1 and LV (gate of the N-MOSFET) aka Vgs is zero. Thus the MOSFET is off (open circuit) and HV1 only gets the 5V signal from HV through R4. When LV1 is low, there is a Vgs of 3.3V and the MOSFET turns on. From it, HV1 is at the same voltage potential as LV1 thus it's low.
Is my explanation correct on how the LV1 being the input works? How does the circuit work the other way around when HV1 is the input?
AI: I can't seem to figure out how it works the other way around when HV1
is the input and LV1 is the output.
For my application, the LV and HV are the 3.3V and 5V bus
respectively.
When HV1 is 5 volts, R3 dominates the LV1 terminal pulls it up to 3.3 volts. Q1 is off.
When HV1 is low it drags LV1 low via the bulk diode inside Q1. The action of doing that also turns on Q1 so that LV1 is close to 0 volts rather than 0.7 volts above it. |
H: Split wires for the purpose of measuring high currents
According to I need an amp meter that requires no splitting of the wires there is an accessory that splits wires for the purposes of measuring current.
From the looks of the device it's limited to 110V/15A circuits (or maybe 110V 30A at most). I need something like that but for higher amperages.
I would like to do the same thing but for the following types of circuits
30 to 50A 208V attached with twistlock adapter
20 to 50A 208V to 480V permanently installed by qualified electrician but safely accessible by anyone to clamp onto with amp meter
Is there a plug-in solution at these higher currents? Or better yet for case 2) could this be improvised asking the electrician to split the wires by means of a junction box?
AI: Figure 1. The Amprobe ELS2A has a mains plug at the top and a socket at the bottom. A clamp-on ammeter can be attached to either side of either hole with the clamp faces closing in the hole.
That device is just a plug and socket connected with, I presume, the live wire running down one side and the neutral and earth running down the other. Clamping on either side should give a reading of the current being drawn by the device plugged into the socket.
simulate this circuit – Schematic created using CircuitLab
Figure 2. A home-made version.
A similarly functioning device could be made by using plastic junction boxes at the top and bottom connected by two plastic conduits. The input and output cables would use gland fittings where they enter and leave the box. |
H: PCB designing consideration of high speed (0.5 Hz) relay load switching
Can this design cause any problems? I'm planning on switching 75W (220V) loads with this relays. I'm using 10 such relays and terminals (HB9500M). Note that it's highly unlikely all of the relays to be active at the same, even if they do, it won't last more than 2 seconds. I'm also planning on soldering wires with the PCB traces to improve current capabilities. PCB is using 1oz traces. As you can see, small red trace is controlling the relay, which is controlled by ULN2803. Can this switching induce unnecessary noises in the MCU? BTW all relay loads are resistive.
AI: When switching the mains (230 VAC) to a load your most important concern is:
How long will the relay's contact last?
Each time you switch the mains, the energized contact of the relay will create a small electric arc in the air that goes to the non-energized contact. That arc shortens contacts' life.
To prolong relay life you might want to buy relays with silver plated contacts:
https://eu.mouser.com/Electromechanical/Relays/General-Purpose-Relays/_/N-5g36?P=1z0x3vzZ1yvsbagZ1yf6b2w
There's another and I think more interesting idea to prolong contacts life. It's called "zero crossing relay switching"
Switch the mains when the 230 V voltage crosses the time axis. Take a look at this Microchip application note:
http://ww1.microchip.com/downloads/en/appnotes/90003099a.pdf |
H: Battery charging with boost converter topology
I'm designing a circuit for battery charging, which will make use of boost converter topology. I have determined the input/output voltage and current parameters for the circuit. If I put a resistor at the output with value of V_out/I_out, the simulation works just fine. My question is; how can I set the current, so that if I put a battery at the output when the circuit is built, the current would be same as the pre-defined output current value. Also, does the output current depend on the characteristic of the source? Like if the power value of source is constant but input current and voltage changable with PWM at the switch (like a pv panel), what would the output current depend on? Many thanks.
AI: "does the output current depend on the characteristic of the source?"
If the current required by the load does not exceed the max current of the source, the answer is NO.
The voltage source in this case will work as an almost ideal source and the current will depend solely on the output request. |
H: 320x240 dot matrix LCD power connection
I'm interested in buying some LCD for my amateur Z80 retrocomputer, and I'm searching for 320x240 dot matrix screen with 8-bit parallel bus.
What is common for them all, they need 3 independent power connections: for logic, LCD itself and backlight... and for LCD the voltage is quite high - 23V (why is it so high?). I would like to ensure how to properly connect it without burning.
Pls see this example and that table:
https://www.aliexpress.com/item/1320170071.html
As I understand:
connection for logic is between VSS and VDD: 5V
connection for backlight is between BLK and BLA: 5V
connection for LCD: it needs 23V, but I'm not sure where exactly. There's written VDD-VO=23V. Does it mean I have to connect independent supply of 23V, where (-) to VO and (+) to VDD? There is also another pin: VEE, which is "output voltage for LCD" - this one is totally confusing.
Or maybe using such LCDs is dead end for amateur project?
AI: These displays use a negative supply of something like -25V for the LCD. There is a pot from that supply to Vss (10K or 20K) to adjust the contrast. Typically Vdd-Vo is 23V at 25°C so the voltage at the pot wiper would be about -18V. The pot is used to adjust the contrast to compensate for variations from glass to glass variations and with temperature and voltages and viewing angle.
As @jonk says, this one appears to have a DC-DC converter to generate the negative voltage, so you should only need to supply +5 and the backlight current, which is quite nice compared to some competitive panels.
See below. The green arrow and circle show you the controller which you must also track down in order to work out the details of communicating with the LCD display. (See link to controller below picture here.) The red arrow points to where you can spot the potentiometer being used for contrast control. Take note that it appears that \$V_\text{EE}\$ is an output of their power module, so it's providing a convenient negative voltage source for your use with the potentiometer. Another red ellipse circles \$V_\text{EE}\$ on the pinout.
Most of the information you need to use them is in the datasheet for the controller.
You can also find libraries that support the controller (which is a Taiwan clone of the Epson SED1335), so you don't have to write all that code yourself.
I don't think it would be a huge deal to get this going, subject to the usual risk in dealing with Aliexpress sellers. |
H: Overdischarged 18650s and a TP4056 module
I disassembled an old laptop battery and found 6 Sanyo K29B 18650s.
All of them have a voltage of <= 2.5V.
When I tried to charge them with a TP4056 module, while measuring the current, the module provided 500-700 mA and got the battery to 3V in under 15 seconds.
Are these batteries still good to use?
AI: Charge them up fully to 4.1v or 4.2v and see if they hold the voltage. Or you could put them in a charge cycle if you have a charger that'll do that (quality RC car chargers work quite excellent for this) for a few rotations and see how they handle that. if there is no issues with the power cycling then I'd say they are just fine.
I've taken some 18650's down to 1.5v (accidently, but also kinda on purpose) but running through a few power cycles they work fine and never had an issue with them. |
H: Simple CPU with lots of RAM
Chips like the ESP8266 or ESP32 typically only have a couple of hundred kB of RAM. Alternatively, you can buy boards with chips like the NXP i.MX 6, with which you can have gigabytes, but suddenly you're at the level of "embedded Linux" in terms of complexity, and it also looks fairly hopeless to solder such a board together yourself.
Is there a middle ground which...
is still simple to program (... think "ESP"; maybe a simple RTOS but no MMU and processes and drivers etc etc)
... it also doesn't need high performance (probably not clocked a lot more than 100 MHz
has access to a couple of hundred megabytes of RAM
which doesn't need to be extremely fast, but at least a couple megabytes per second would be nice (... think "streaming out a couple uncompressed audio streams")?
AI: Sure, there's middle grounds, such as cortex-M4 MCUs with memory controllers for SDRAM.
They make sense in only select applications: once you have loads of memory, you either yearn for something that's very number-crunching, like an actual DSP as CPU, or even things that aren't microprocessors, especially FPGAs. Or, you need that much RAM to run multiple processes with isolated jobs, in which case, yes, maybe you're crossing over into lands where a memory-managing/segmenting OS on an application processor is what you actually need.
is still simple to program (maybe a simple RTOS but no MMU and processes and drivers )
I think you're forgetting that MMUs make writing software easy, not harder! If you think programming your MMU is hard, then you're probably not actually doing things with a lot of RAM in different processes, or your appreciation of "complexity" is skewed from what the rest of us consider hard to do right :)
Any embedded developer I've ever talked to will tell you that writing a service to run under Linux or Vxworks is way easier than writing a safe, reliable, self-recovering task on a microcontroller that handles a lot of data. An OS job is to make the developer's life easier. That developer being you.
... it also doesn't need high performance (probably not clocked a lot more than 100 MHz
I wonder why you need much RAM if you can't go through it performantly? Maybe a "small" microcontroller with a SPI RAM is sufficient for what you need. Or flash? who knows your actual use case...
at least a couple megabytes per second
That does sound like you want a CPU in the 100 MHz range or more, or you'll have little use for that much data. More than half a century of system design has yielded that for basically all microprocessor applications, you only need RAM that's significantly slower than the CPU is at processing data. (This looks different for dataplane applications, where a CPU the job of only controlling data flow, not ever touching the data itself, but I guess you're not building a network switch" |
H: Bridge rectifier: What is the purpose of these two elements?
I found the following circuit in a random video (don't know what it's worth) and have two questions about it. I get that it's a full wave rectifier, and I think I have a decent idea on how it works. However:
What is the 220k resistor for?
Why put the 105JF capacitor in there? This looks to me like a high-pass filter, and I don't see the point at all of doing this.
AI: That is a de facto circuit for cheap generic mains powered LED lamps.
The capacitor is an essential part, the circuit is called a "capacitive dropper" which is used to bring down the voltage at modest current level to power the LEDs.
The 220k resistor is necessary to keep the LEDs turned off, so that they do not glow faintly due to capacitive coupling in the mains wiring powering up the LEDs ever so slightly. |
H: Is this component in falstad a tl431
I'm self studying electronics, I am now familiarizing myself with the tl431, which is pretty much a "variable zener" aparently.
I was shown the following symbol.
I would like to simulate some circuits with it on falsad, I found this component, that looks pretty much alike and is called "SCR", after trying some circuits, I'm no longer sure it's the same component.
The question:
Is that a tl431?
If it is not, can I sumulate Tl431 in falstad?
AI: No, it's nothing like the same part. One is (more or less) an op-amp + reference, the other is a thyristor.
As far as I know there is no support in Falstad for adding SPICE models as in full-featured circuit simulators such as PSpice or LTspice. |
H: Multiplication of two binary numbers in fixed point arithmetic
I'm performing some operations with fractional numbers in a 16-bit FIXED-POINT processor.
I have to multiply the numbers \$ x=-6.35 \$, represented in \$ Q_{11} \$, and \$ y=-0.1 \$, represented in \$ Q_{14}\$.
First I represent the numbers in the respective notation in binary. The MSB is the sign bit.
So \$ x=11001.10100110011 \$ and \$ y=11.11100110011001 \$. I know the binary point is just in our mind and the processor treats this numbers as integers.
Ok then we multiply the numbers and get \$ x*y=11001000000100010011111001111011 \$. We eliminate the repeated sign bit and save the 16 MSB and represent the result in the appropriate format \$ Q_{10}\$: \$ x*y=100100.0000100010\$. This number corresponds to \$ - 27.966796875\$. But this doesn't make any sense, the result should be \$ 0.635\$.
What is going on here? Why is the result different? Am I missing something?
EDIT:
So I realized that it was pointed out that I was performing unsigned multiplication. Taking what was said now I'm doing signed multiplication:
$$1100110100110011$$
$$1111100110011001$$
$$----------------$$
$$\color{blue}{1111111111111111}1100110100110011$$
$$\color{blue}{000000000000000}0000000000000000\text{_}$$
$$\color{blue}{00000000000000}0000000000000000\text{__}$$
$$\color{blue}{1111111111111}1100110100110011\text{___}$$
$$\color{blue}{111111111111}1100110100110011\text{____}$$
$$\color{blue}{00000000000}0000000000000000\text{_____}$$
$$\color{blue}{0000000000}0000000000000000\text{______}$$
$$\color{blue}{111111111}1100110100110011\text{_______}$$
$$\color{blue}{11111111}1100110100110011\text{________}$$
$$\color{blue}{0000000}0000000000000000\text{_________}$$
$$\color{blue}{000000}0000000000000000\text{__________}$$
$$\color{blue}{11111}1100110100110011\text{___________}$$
$$\color{blue}{1111}1100110100110011\text{____________}$$
$$\color{blue}{111}1100110100110011\text{_____________}$$
$$\color{blue}{11}1100110100110011\text{______________}$$
$$\color{blue}{0}0011001011001101\text{_______________}$$
$$----------------$$
$$\color{red}{1}\color{green}{0}{0010001000111111010101001111011}$$
The last carry (red) is eliminated. Then the repeated sign bit (green) is also shifted to the left, adding an extra 0 bit at the end. Finally we save the 16 most significant bit and represent the result in \$ Q_{10}\$:
$${0010001000111111}$$
But this is \$ 8.5615234375 \$, not \$ 0.635 \$... So we are getting closer but the result is still off. Any ideas?
AI: I have to multiply the numbers \$ x=-6.35 \$, represented in \$ Q_{11} \$, and \$ y=-0.1 \$, represented in \$ Q_{14}\$. So \$ x=11001.10100110011 \$ and \$ y=11.11100110011001 \$
I have just calculated the corresponding values for \$x\$ and \$y\$ using scaling values \$2^{11} \$ and \$2^{14}\$ respectively, and found them to be correct in 2's complement signed notation. So there is nothing wrong in your starting point.
I know the binary point is just in our mind and the processor treats this numbers as integers. Ok then we multiply the numbers and get \$ x*y=11001000000100010011111001111011 \$
This is where things went wrong. You would have been absolutely correct if you were multiplying two unsigned numbers (unsigned arithmetic). It is straight forward. But if one of the numbers is signed, then you have to do signed arithmetic, which is a little different.
There are two points I would like to highlight:
When you multiply two signed numbers \$x\$ and \$y\$, each partial product has to be treated as signed and you have to properly sign-extend each partial product.
If the multiplier(\$y\$) is a negative number, the last partial product has to be computed differently. It should be computed as the 2's complement of the sign-extended multiplicant (\$x\$).
Based on the two above points I will illustrate a simple example \$x* y\$ for \$x=-3\$ and \$y = -2\$, in 3-bit 2's complement notation (pardon my naive formatting):
$$x=-3=101_2$$
$$y=-2=110_2$$
So \$x * y\$ in signed arithmetic will go like:
$$101$$
$$110$$
$$---$$
$$\color{blue}{000}000$$
$$\color{blue}{11}101\text{_}$$
$$\color{blue}{0011}\text{__}$$
$$-------$$
$$\color{red}{1}{000110}$$
Notice how partial products are sign-extended (blue color).
Notice that since \$y\$ is negative, the last partial product was calculated as 2's complement of sign-extended \$x\$ which is \$ = 0011_2\$.
The 7th bit can be disregarded (red color), because the answer is only 6 bits when two 3-bit numbers are multiplied. The rest 6 bits hence form the signed result (product). Therefore, the answer is \$x*y = 000110_2=\color{green}{+6_{10}}\$.
For the same \$ x\$ and \$y\$, if you do unsigned arithmetic, you will get \$x*y= 011110_2=\color{red}{+30_{10}}\$ !!
Conclusion
In your example, while multiplying two signed binary numbers, you probably did (if hand-derived/calculator) unsigned arithmetic, not signed arithmetic, hence the wrong results. |
H: CSMA/CA - What happens if a faulty WiFi station does not silence itself when an RTS/CTS is received?
In a WiFi network, assume a WiFi station does not silence itself for an RTS/CTS reception from other stations and it keeps on transmitting. I have few questions related to this scenario,
1.Will that affect the whole network?
2.How this kind of an issue is handled?
3.CSMA/CA is applicable only for the connected stations or all WiFi stations in the vicinty of the stations and APs?
AI: Will that affect the whole network?
All stations that now lose packets are affected. I.e. every station at which your malfunctioning's station is strong enough to damage received packets.
How this kind of an issue is handled?
Well, since that bad station won't always have something to send, it will probably not be handled at all: packets that collided will simply be re-sent, which the user only notices through increased latency and reduced throughput.
If that bad station continuously transmits, the its WiFi channel is simply blocked, which means the other stations notice that none of what they send ever gets acknowledged, and they'll leave that network eventually. An access point might use that knowledge and change channels, but that would assume it's configured to do that.
CSMA/CA is applicable only for the connected stations or all WiFi stations in the vicinty of the stations and APs?
Think about this logically: if you only forced connected stations to adhere to the rules of cooperation, everyone would suffer when a new station enters an area.
So, it doesn't only apply to connected stations. It also applies to unconnected stations. And even non-WiFi devices: in many countries (most) any ISM-band device with a maximum duty cycle above 1‰ typically needs to do "listen before talk". |
H: Can I use this power cord with my charger?
my original power cord I got with my laptop charger stopped working recently.
It had a power adapter rating of 10A/250V, and the part which plugs into my charger had a rating of 2.5A/250V.
I just got a new power cord and just noticed the ratings:
Here's my charger power rating and details:
Can I safely use this power cord with the adapter, or will it cause issues and cause my laptop/charger to fry?
Edit: I was researching and as I read online, it said it is important to match the voltage ratings. I'm moore concerned about the 300 V rating which will be plugged into the charging brick even though the charger specifies an input of 100-240V.
AI: From the comments:
I'm assuming it means it means how much voltage it can transmit to the appliance depending on the power coming in from the power socket. I understand there will be some resistance built into the charging brick itself for safety purposes, but would it be enough to handle the 50V difference in the worst case?
Close. The 300 V is the maximum voltage the insulation between the wires in the cable and the pins and sockets in the connectors can withstand. That means it is rated for use at any voltage up to 300 V. Your supply is probably 230 V so the cable is more than adequately rated. (The cable doesn't generate a higher voltage. It's just copper wire.)
I was researching and as I read online, it said it is important to match the voltage ratings.
You need to match the adaptor to the mains voltage, not the cable maximum voltage rating.
I'm more concerned about the 300 V rating which will be plugged into the charging brick even though the charger specifies an input of 100-240V.
Hopefully it's clear that this is not an issue. |
H: Convert 60V AC 50Hz to 60V AC 25Hz
The setup is a 240V 50Hz AC transformer outputting 60V 50Hz AC. Connect this power supply (with a push button) to an old telephone and it rings the bell on command, but unrealistically fast.
I need to take this 60V output and reduce the AC frequency to 25Hz so the phone sounds more realistic. As per what I've read about the signals for making phones ring (here in Australia anyway).
Any advice on what I can put inline between power supply and phone to achieve this?
Thanks.
AI: Any advice on what I can put inline between power supply and phone to
achieve this?
Convert to a DC voltage and use an audio amplifier and a sinewave oscillator circuit to produce the new frequency.
Similar story: I had to design a modern magneto phone that ran from a 6 volt battery. I needed to replace the equivalent of this part (the magneto generator): -
Picture from here
So I used a TO-220 power amp (can't remember which one because it was back in the 1990s) and fed it from a low pass filtered 25 Hz square wave oscillator. I then stepped up the output voltage using a smallish mains transformer to 70 volts RMS. |
H: Circuit for Atmel (now Microchip) Single Wire Interface (SWI) using actual TTL UART?
Atmel defines a Single Wire Interface (not to be confused with 1-Wire) for their ATSHA204 chip.
AVR274 describes how to use a UART for SWI. But how to wire a generic TTL UART for this?(for example from a Raspberry Pi) Is it really as simple as connecting TXD and RXD together?
AI: No, standard TXD and RXD cannot be connected together as TXD is always an output from Raspberry Pi or other TTL UART. It would push data line high while the Atmel chip needs to pull the data line low to communicate back to RXD pin.
If it is possible to make the TXD output as open-drain then it is possible to connect TXD and RXD together. Otherwise you need an open-drain buffer to handle that. |
H: ABCD parameters
I am trying to get the ABCD parameters of these circuit but I have no idea about how to solve the circuit. All I know is
V1=AV2+BI2
I1=CV2+DI2
But here no impedance is connected. If I short the output,V2=0 then what is B? Please help me out.
AI: Generally, in matrix form, for a two port network we have these formulas: -
And that reduces to two formula: -
$$V_{IN} = A\cdot I_{IN} + B\cdot I_{OUT}$$
and
$$V_{OUT} = C\cdot I_{IN} + D\cdot I_{OUT}$$
So, it's just a case of figuring out how these two formulas match the circuit in your question and what the ABCD parameters are.
So, look at your formulas (a variant of the above) and figure out what A and B are first: -
$$V_1 = A\cdot V_2 + B\cdot I_2$$
One of those parameters is 0 and one of them is -1. That's all I can reasonably help you with given this site's rules about homework type questions that don't show any effort. |
H: Is the antenna gain time dependent?
Premise
The antenna gain of a transmitting antenna relates its radiation intensity U(θ,ϕ) to its input power as shown in the following formula:
$$G(θ,ϕ)=\frac{U(θ,ϕ)}{P_{IN}/4\pi}$$
Where the radiation intensity in far field zone is related to the frequency domain poynting vector $$\vec{S}(r,θ,ϕ) = \frac{1}{2}\cdot \vec{E} \times \vec{H}^*$$
by the equation:
$$U(θ,ϕ)=|\vec{S}(r,θ,ϕ)|\cdot r^2$$
The radiation intensity does not depend on the distance because of the inverse square behaviour of the Poynting vector, so it is only a representation of how the antenna distributes the power in the different directions (θ,ϕ).
Observation
The Poynting vector is not only defined in the frequency domain, but also in the time domain. Its definition is this:
$$\vec{S(t)}(r,θ,ϕ) = \frac{1}{2}\cdot \vec{E(t)} \times \vec{H(t)}^*$$
It represents the instantaneous power flowing out from the antenna.
Instead, the frequency domain Poynting vector is a vector whose real part is the average power transmitted by the antenna. In the case of harmonic (sine wave) fields, there is the factor 1/2 that comes from the averaging operator. This explains the reason why the frequency domain Poynting vector is defined with such a factor.
Question
The antenna gain is defined from radiation intensity which is defined from the frequency domain Poynting vector. So, it seems to me that the antenna gain means how an antenna "amplifies" (or "attenuates", depending on if it's + dBi or -dB) the average input power along a direction (θ,ϕ).
But physically (not from the definition convention), is this concept of antenna gain a function of time?
The time dependence of the transmitting power (due to the time dependence of the time domain Poynting vector) represents the electromagnetic power flowing out from the antenna, like shown in the following picture (see here to watch the animation):
So, is physically the antenna gain animated? Is it a time varying quantity?
The antenna gain is by definition time - independent (since it involves a frequency domain quantity,) but is the antenna ratio between instant transmitted power and instantaneous input power time dependent?
AI: If you had an amplifier with a gain of 5 and fed to its input a sinewave of 1 volt RMS, you would expect to see on the output a 5 volts RMS sinewave. The fact that a 1 volt RMS sinewave has instantaneous values ranging from -1.4142 volts to +1.4142 does not alter the fact that the amplifier gain remains constant and produces an output sinewave that ranges between -7.071 volts and +7.071 volts.
Is it a time varying quantity?
No. |
H: selecting the footprint size of ceramic capacitor for MCUs
I have noticed there are different sized(SMT foot print size) ceramics capacitor with same voltage and capacitance ratings. I have been told that smaller the footprint, smaller the parasitic inductance and parasitic resistance a capacitor would have.. does this means I should select the smallest possible capacitor available?
I'm gonna use this capacitors as bypass capacitors for MCUs.
Available foot print sizes {C0402, C0603, C0805, C1206, C1812}
capacitance needed - 100nf, 27pf.
and also, should I use a 1uf ceramic cap, parallel to 100nf bypass capacitors, just in case?
AI: The difference in inductance between a 0402 and 0603 is miniscule. Your layout is probably contributing an order or magnitude more inductance than the difference between 0402 and 0603
If you are comfortable with rework of a 0402, then by all means go for it, but there are no technical reason to do so.
A slight note is that 0402 is more likley to tombstone during assembly, but as long as you use a PCBA manufacturer that is not really an issue anymore. (Assuming you don't use a cheap backalley manufacturer with outdated equipment) |
H: Two layer FR4 PCB: should you place GND pour on signal layer?
Talking about two layer PCB's FR4 due to lower cost:
I always poured ground on both layers of the PCB, I believed "the more the ground the better", but Recently I started watching altium live presentations, and I came across this video gem to 40:23,. In short, Eric Bogatin talks about pouring GND on signal layers, he says that this is bad (note that he talks about high speed signal lines PCBs). And he says it is not a good technique, because adding copper pour on signal layers makes the gap between traces conductive, and results in cross-talk (signal bouncing), and only if you add vias everywhere between tracks you will reduce dross talk.
At the end he presents all the data in one graph:
Blue: cross-talk with GND pour full of vias (best scenario)
Red: No GND pour on the signal layer (the optimal he suggests)
Purple: GND pour on signal layer with two vias on each end (what I see eveyone suggests, Eric shows that it makes cross talking worse).
Black: Pour that is floating (No one does that ok)
But he does not talk for slow signals, he only uses examples of <4ns rise time signals.
My question is: On two-signal layer pcb design, where I do not design any ridiculously fast signals (like DDR memories, CPU signals with fast rise edges),I also take care to put signals on the top, not splitting the GND on the bottom and at the worse scenario I use Buck/Boost converters, which I place far away from my signal layers, and my atmega to drive a stepper or servo motor.
So question is: should I pour copper on my signal layer on FR4 2-layer pcb? What is your experience with two-layer pcbs on GND pour everywhere?
And here is my approach, which I think will be the best thing to do:
I had to trace that big power trace on the left on the bottom, it interrupted my GND plane, so I put some GND on the top, so the current can go over this obstacle, not around it.
I also try to place GND Vias close to tracks whenever they change layer. So when a signal goes from bot to top or vise versa, it will have two vias. One for the trace to change layer, and one GND via close to it.
AI: If you have no high speed/slope signals, then you should not care too much about that recommendation from the altium live session.
On a 2 layer PCB it's an old debate if you should also fill top with GND plane chunks. Pro: Better GND conductivity, Con: Patch antennas and/or GND loops (through vias).
But it's never a good thing to have a split bottom GND plane like you have. If this is not avoidable, then your suggestion seems to be the next best solution for your PCB. |
H: Forcing a Buck Converter IC to behave like a Boost Converter
I recently thought of a way to force the LM2596-ADJ buck converter IC to behave like a boost converter, just as a fun experiment. Let me explain the idea (I would like to get your opinions before I actually build it.)
This is the schematic block diagram of the LM2596:
Typically, Vin is connected to a fixed input voltage and an LC filter is connected to the switch emitter. If you look at the block diagram, you will see that the switch collector is connected to Vin. By connecting an inductor to Vin, the output to ground and a diode between Vin and an output capacitor, the buck converter should behave like a boost converter, right?
I went ahead with this idea and simulated it on LTspice. I fed 9V to the circuit and configured the feedback resistors to get 15V:
And sure enough, it worked:
(Blue waveform: voltage across C2, green waveform: voltage across C4)
Then, I realized something about a boost converter and took a look at the voltage at Vin:
As you can see, the voltage at Vin periodically changes between 0V and close to 15V. This this because the switching action of the internal BJT connects one end of the inductor to ground when the switch is on. This also means that Vin, which is not only connected to the switch collector, but is also the input to power the chip itself, is periodically connected to ground. Logically, this should cause the IC to shutdown. In fact, the chip should shut down even before the BJT manages to pull the Vin pin all the way to ground, but that doesn't seem to happen in the simulation. It is as though there is a diode and capacitor at the input that keeps the control circuit powered during the on time of the switch and recharges during the off time.
Please let me know what's going on and what you think would happen if I built it on the breadboard. Will the chip keep cycling? Will it function as a boost converter? Will the chip fail?
AI: The above method has a flaw: when the internal switching transistor turns on, the IC looses power due to the fact that the collector is connected to the same power rail as the control circuit of the IC. This results in a very unpredictable behavior of the chip.
However, there is a solution to the above problem. Simply connect Vin to the input voltage source, as one would normally do with a buck converter IC, but use the output pin of the IC to drive an external transistor. Here is what I'm talking about:
The solution seems like a simple one, but is it? The answer is no. There is a very critical component in the above circuit which determines whether the circuit will work or not. Can you guess what it is?
The very critical component is the 1uF soft-start capacitor C3. Its absence will cause the whole circuit to fail. Also, choosing a very small value for C3 will also cause the circuit to fail. Why? Let's see.
The thing is that buck converter ICs can have a max duty cycle of 100%, which means that the switch can be permanently on. This is because such a condition causes no problem whatsoever to the circuit. However, in a boost converter, a duty cycle of 100% means that the inductor is permanently connected in parallel to the input voltage source, which shorts the voltage source, as you can see in the picture below:
Before I explain how C3 helps avoid this problem, let me just explain how the LM2596 attains and regulates the output voltage (when used as intended) as set by the feedback resistors R1 and R2.
A fraction of the output voltage is fed back to the error amp in the IC through R1 and R2. This is compared with an internal voltage reference to check if the output voltage is equal to, lower than or higher than the reference voltage. Initially, this feedback voltage is lower than the reference voltage. This results in the error amp telling the IC to increase the duty cycle all the way up to 100%. This cause the output voltage to rapidly rise up (happens during the on time of the switching transistor). As the output voltage approaches the desired value, the error amp tell the IC to slowly decrease the duty cycle and eventually, it reaches a steady-state value (0 < D < 100). This is how a buck converter controller works.
In a boost converter, on the other hand, the output voltage increases during the OFF time of the switch, and not the ON time. So what happens during the ON time? The inductor is charged up. It is during the OFF time of the switch when the inductor discharges into the output capacitors, which causes the output voltage to rise up. Due to this, it becomes critical to implement switch current limiting to ensure that the switch opens after the boost inductor is charged to a certain extent, or limit the duty cycle to 90-95% at most by some other method. In essence, the switching transistor in a boost converter MUST turn off within one clock cycle in order to allow the output voltage to rise and to prevent shoring the input through the inductor.
Now its time to explain how C3 helps achieve that. As you all know, initially, for a short period of time during the startup, C3 is almost like a short circuit. This causes the feedback pin to get effectively connected to the output momentarily. Since, initially, the output voltage of a boost converter is almost equal to the input voltage, the feedback pin sees a very large voltage and thinks that the output is much higher than necessary, and keeps the switch off. As time progresses, the capacitor C3 slowly charges up, with allows the voltage on the feedback pin to slowly fall. This results in the duty cycle increasing slowly. In case of this circuit, the soft-start must be very 'strong' in order to prevent the dutycycle from reaching the full 100%. This is why C3 must be very large. It must be large enough to ensure that the voltage on the feedback pin doesn't fall so rapidly that the feedback voltage falls below the reference voltage much before the output attains its desired voltage.
(Green: Voltage at f/b pin, Blue: Output voltage)
Inductor current (note the difference in the inductor current between this case and the previous one)
Duty cycle of the switch (blue) and output voltage (green)
Inductor current (red) and switch PWM (green)
Output Voltage:
But remember, this is a very dodgy solution with instability written all over it.
Edit: Adding a diode between GND and Feedback (as shown) will help 'reset' the soft-start mechanism by rapidly discharging C3 if the output voltage suddenly drops due to load transience or a short circuit |
H: Can't get ADC chip to work
I am connecting a 10k potentiometer to an ADC chip (LTC1273BCN) that has a 12-bit parallel output, like in the diagram at the end of the post. The 12-bits will be connected to an FPGA input bus after I can get it to work correctly. The ADC chip circuit is powered off a stable 5V from a lab benchtop power supply.
I have tied the CS and RD inputs low as I thought this will continuously run the conversion but maybe this is my problem, I am unsure.
When I measure the voltage of the 12 output pins, only pin 14 (D2) seems to be high, the rest are 0V. The Ain voltage is perfect between 0 and 4.99V from the potentiometer, and I have tied the HBEN input to 5V as I want to use all 12-bits in one conversion.
Any advice as to how to use this chip correctly? Will I have to pulse the CS and RD inputs low to get the chip to behave as I would like? I don't really want to use signals from the FPGA to control the analog to digital conversion.
EDIT
Below is my reasoning behind the pin connections:
Pin 1 : 0V to 5V from potentiometer, to be converted to 0 to 4095 by ADC chip.
Pin 2 : I haven't used this pin but have attached capacitors to pin 3 according to datasheet.
Pin 3 : Tied to analog ground which is the same ground as chip supply.
Pins 4 to 11 : D11 to D4 output bits are left unconnected.
Pin 12 : Tied to ground of power supply.
Pins 13 to 16 : D3 to D0 output bits are left unconnected.
Pins 17 and 18 : Left unconnected as in datasheet.
Pin 19 : Tied to 5V to use the full 12 bits in one conversion instead of splitting into 2 conversions in one byte.
Pin 20 : Tied to ground for continuous conversion ( if this is possible).
Pin 21 : Tied to ground to allow for continuous conversion ( if this is possible).
Pin 22 : Left unconnected as I am not using it.
Pin 23 : NC
Pin 24 : +5V from power supply to power up ADC chip.
Thanks everyone.
AI: Justme gave the answer, you have to clock it.
continuous conversion without having to initialise and command the conversion?
That would mean the ADC would change the level of its output pins every time it does a new conversion. Counting uneven propagation delays, skew, etc, if the device that reads these pins reads them at the wrong time, it will get some bits from the previous value, some bits from the new value, and some bits in transition which will be garbage.
That's why synchronous logic uses clock to synchronize things and ensure signals are sampled when they are valid.
If an ADC does continuous conversion, it must have an output with an edge to indicate when the data is valid and can be sampled by the next device. You will need to apply proper clock domain crossing to that in your FPGA. It is simpler to just generate the timing signal from the FPGA, plus you will get a stable sample frequency instead of whatever RC internal oscillator the ADC uses.
Note for 300ksps you don't need a flash ADC, a SAR will do just fine, and it's cheaper.
EDIT:
Mainly because I have to use opto-couplers between the FPGA and the ADC bits, so I will have to also isolate the CS and RD signals from the FPGA too.
OK, so you want an isolated reading on a potentiometer. I really wonder why, but there are much simpler solutions for that.
SPI ADC. Pretty cheap, less opto couplers. It will be fast enough.
Isolated ADC (check mouser/digikey). Should be expensive.
Cheap micro as the ADC, output the data on a UART, isolate that, and instantiate a UART receiver in your FPGA.
Or turn the pot signal into PWM, or variable frequency, or pulse density modulation (many ways of doing this, 555, opamps, etc), isolate it with one opto, and read the duty cycle, period, etc with a timer/counter in your FPGA. |
H: TVS with low Vclamp margin
Thanks for your support in this forum.
Currently I have a couple of PCB that I need to provide a double input power supply and transient protection.
The specs for this couple of PCB are Vin= 9 to 17.5V. (12V nominal), consumption is about 18-24W/each (working mode dependent).
Long cable runs and hot plugging could induce transient voltage spikes which may exceed the input voltage limit and I need to protect it.
The system will have 2 VDC inputs, and will be capable to have a hot-swap between them. As you can see in the attach schematic, the 2 Schottky diodes allow to do this, besides reverse polarity protection.
The input battery used could provide up to 16.8V max (10-16.8V range).
I am looking for a TVS Diode (see it in the attach file).The problem I am facing is about the specs in TVS diodes. As far as I understand, Vclamp should be 17.5V, but then, Vr and Vbr are too low.(should be 17V minimum)
Any idea how to solve this short margin between Vr/Vbr and Vclamp? Could I place a Zener to clamp it to 17.5V?
Any tip will be welcome. Thanks a lot.
AI: Any tip will be welcome.
The only way I see to solve this is to identify the specific parts in the PCB (currently not shown in the question) that are most likely to be victims to the over-voltage and, assess what protection is really needed to prevent those devices failing. Having a continuous specification of 17.5 volts maximum will almost certainly mean that a transient limit of several volts higher than this is likely for well-designed equipment.
So, at the moment, there is too little headroom in your requirements even for a zener to be a solution let alone a TVS. I suggest you analyse the PCB to see at what point a higher voltage (transient) might become a problem.
Long cable runs and hot plugging could induce transient voltage spikes
which may exceed the input voltage limit and I need to protect it.
It's generally accepted that the worst case scenario will be when you activate the power supply at the source end of the cable. Due to transmission line effects, you might see a peak (at the PCB) of up to double the applied source voltage.
You also need to calculate the transient energy that can flow from the source too so that you can pick a TVS diode that can handle the transient energy without failure.
It's all about threats and victim analysis. |
H: Serial port from PC not reaching the MCU
I'm trying to send some data from the PC to my STM32L432KC Nucleo board using UART.
Transmitting data to the PC works just fine, I'm receiving data through the STLink Virtual COM Port which I can see using any Serial Monitor like TeraTerm or others.
The problem is with RECEIVING the data from the PC. I've tried sending data using TeraTerm and Hercules and I also checked with Serial Data Monitor if the data is being sent and it looks like it is. But nothing shows up on the UART RX pin (checked with an oscilloscope)
For clarity - I'm not posting any code because the signal doesn't even reach the RX pin so it's not a problem with processing that data.
My process:
Connect the board to PC:
Board configuration in CubeMX:
Sending data through COM3 using TeraTerm or Hercules software:
As I click "send" I'm checking with an oscilloscope if anything shows up on pin A2(PA3) (which is the UART RX pin) - nothing shows up there
Additional info: Sending data from the board to the board works just fine. The problem is with PC->Board
AI: You are using the wrong pin.
The manual for Nucleo with L432KC says UART RX is PA15. |
H: Capacitor voltage equation (partially charged initial state)
Assuming we have a RC circuit:
simulate this circuit – Schematic created using CircuitLab
We don't know the voltage of the capacitor but we know its voltage isn't greater than the battery voltage.
If the capacitor is completely discharged when we close the switch \$ V_C = V_1(1 - e^{\frac {-t}{R_1 C_1}} )\$
If the capacitor is partially discharged (or charged if you see the cup half-full) can we derive a equation just like we did when it was discharged?
If this is the graph of charging a fully discharged capacitor and discharging a fully charged capacitor:
Is this the diagram of charging a partially charged capacitor and discharging a partially discharge capacitor?
Images from: Electronics Tutorials - RC Charging Circuit Curves
AI: Without teasing people with differential equations that can be seen in 1000 tutorials I suggest a practical method.
Let's assume the circuit is the same as in the question except there's already voltage Vo in the capacitor at t=0.
Think 1) the original charge decays to zero through R obeying Vo*exp(-t/RC) and at the same time 2) The capacitor is charged from zero charge towards V1 obeying your formula for V1
Present the total Vc as the sum of the parts:
Vc = Vo*exp(-t/RC) + V1(1-exp(-t/RC))
This can be marginally simplified by separating factor exp(-t/RC) but that's nothing remarkable except it gives another way to remember the result:
Vc = V1 - (V1-Vo)exp(-t/RC)
That Vc can be thought as "V1 - shortage". The shortage is the full difference V1-Vo at t=0 but dies off with time constant RC.
The next image shows an example. Vc (= the green curve) starts from Vo = 3 volts and approaches V1 = 10 volts. The time constant RC is 5 seconds :
The dotted lines show a practical drawing help. A line which continues with the initial growth rate reaches the final value in one time constant. |
H: What is this component? 1970s electronics
I broke it while trying to repair a nearby component on a 1970s board. It has two wires at one end that look like they are going to a coil and two axial wires. One of the axial wires came out with some pieces of glass.
The only markings are "P/F" which mostly likely means Philco/Ford.
The "silkscreen" was marked with "S1" and nothing else.
The end with the two coil wires is angled at 45 degrees I presume to indicate polarity.
I also need a way of working out what value it is so I can get a modern replacement.
Thanks!
AI: What Is This Component?
It's the outer magnetic coil of a reed relay. The two axial connections connected into the glass body are for the reed contact: -
The picture above shows the coil (bottom) and a couple of reed contact options with the top being a SPNO. The lower one looks like a 4PNO device But they could easily be NC types.
Here's an article that shows this explanatory picture: -
Good luck. |
H: Anything wrong with connecting L298Ns in parallel?
Although L298Ns are very inefficient, they're very cheap. I have two motors that require 4A+ current at load combined. Can I connect multiple L298Ns in parallel in this way to increase the overall current output? Am I going to run into any problems?
AI: I am not endorsing wiring the L298Ns in parallel, but simply discussing the issues involved, and how it might be accomplished. As others have pointed out, an easier solution is to purchase a more robust driver.
Simply wiring the L298Ns in parallel will cause problems.
A partial schematic of one of the motors, and one of the drivers, driven in one direction looks like this:
simulate this circuit – Schematic created using CircuitLab
With multiple drivers connected in parallel, a partial circuit would look like this:
simulate this circuit
A big problem with this arrangement is that the currents through the transistors may be unbalanced. Suppose Q2A is slightly warmer than Q2B or Q2C. It is likely to conduct more than 1/3 of the current. Conducting more current means that it will get hotter than Q2B and Q2C. Which will cause it conduct more of the current, etc.
If you are willing to trade some motor speed (voltage) for torque (current), you can balance the transistors to some extent by adding small value resistors between the transistors and the tie-points to the motor, like so:
simulate this circuit
The larger the resistors, the more voltage you will lose, and hence the lower the maximum rpm of your motor. However, the larger the resistor, the greater the current balance you can achieve. Sufficient balance, and you can safely connect multiple drivers to drive your motor, thus increasing your torque. However, this only works to a point. Obviously too large a value for the resistors, and you will lose more power in the resistors than you gain by having extra transistors.
You say that the two motors will require 4A combined. You don't say whether the motors will ever require more than 2A individually. (It could be that only one motor operates at a time, and when it does it requires 4A). I will assume that you only need 2A. (BTW the L298 is advertised as
capable of 4A total (for 2 drivers), so if the modules actually behaved as advertised, you could get the 4A out of a single module, but that is another story).
Assuming each transistor needs to conduct, say 0.7A, and you want, say 0.3V across each resistor, the resistor values should be 0.3/0.7 = 427m\$\Omega\$ or something in that vicinity. Although they should only dissipate 210mW, I would use 1/2 watt rated resistors. The resistors need to be matched. Tight tolerance 0.5\$\Omega\$, 0.5W resistors are commercially available.
That takes care of the issue of transistor balancing.
There is another issue that must be addressed. Shoot-through. If both transistors in a half-bridge are on simultaneously, shoot-through will occur. A large current will flow through the transistors without encountering the impedance of the motor. This is bad, so you want to ensure that shoot-through doesn't occur. By connecting the modules in parallel, you increase the possibility that a high side transistor in some module is on, while a low side transistor on the same side of the motor, but perhaps in a different module, is also on. It is important when changing voltage directions, that there is sufficient "dead-time", so that all of the transistors are off, before any new transistor is turned on. It is your responsibility to ensure that.
Once again, I am only explaining how wiring the modules in parallel might be accomplished, but I am not endorsing this as a solution to the higher level problem of how to drive the motors. |
H: Theory: Can power cables induce AC voltage in human body?
In a demo video (which I unfortunately can't share) a man makes the following setup:
Multimeter on 200 V AC settings with one pin in the ground socket of a conventional mains power socket.
Right hand holding the other pin
Left hand free to hover over or touch a conventional extension cord (insulated) which is connected to a device with the mains power on.
Then he varies a few things and observes measurements:
Wearing shoes: hovering left hand over the extension cord gives 2~3 V readout. Gripping the cord gives 10 V readout.
Barefoot: hovering left hand over the extension cord gives 0.5 V readout. Gripping the cord gives 3 V readout.
I've been working on an idea for why this happens and I'll propose it here. The point of the question is to understand the theory by either getting your thoughts on my proposal, or your own proposal.
So my thoughts are as follows:
Wearing shoes
Left hand and cable are acting as two plates of a capacitor.
The human body is not a perfect conductor, therefore there is time for charge to "pool up" in the left hand in a 50 Hz cycle. Therefore when measuring the right hand relative to ground, we see an AC voltage readout.
To explain what I mean, I've modelled the human as 3 charge reservoirs interconnected by resistors. The middle reservoir is the body, the left reservoir is the left hand, the right reservoir is the right hand.
I also show the flow of charge with a double ended arrow (indicating that it's AC, but slow at 50 Hz)
Barefoot
Now there is a larger reservoir to draw from, that is the floor. So the main current flow is between the left hand and feet.
Therefore less charge from the right hand reservoir is needed to equilibriate.
Therefore the readout is lower.
Perhaps the current induced is larger than in the case where he is wearing shoes?
AI: I would forget the pooling theory and model with normal circuit elements. You are mixing static electricity models with discrete circuit models.
With shoes, R4 is nearly infinite.
Barefoot, R4 is smaller, how much depends on the floor type. C2 is larger. Either of these will cause the voltage divider to reduce the voltage on the right hand. It is difficult to determine which is the primary effect.
If you repeated the experiment barefoot standing on a thin layer of mylar you could learn more.
Note that internally, bodies conduct electricity much better than your skin resistance.
simulate this circuit – Schematic created using CircuitLab |
H: Calculating resistance in theory
I'm studying about calculating the Equivelant Resistance in some circuits and I haven't figure out how to calculate this one
I thought the way to go was to do 4k + 6k + (Req(R2, R3, R4) in parallel with 20k), I guess I was wrong since the answer is 22k Ohm for the total resistance measured between A and B
Can someone try to explain me what's the process thought behind a circuit like this?
I got this circuit derivative from here:
EDIT:
Sorry for bothering I tried to cut corners and when calculating the Equivalent resistance I did 1/63k + 1/18k = 81k/1134k and was supposed to be 81k/1134M
Did the same on the other resistance in parallel, sorry to bother you with this silly mistake
AI: R4 is 10k not 10 so your initial schematic has an error. Otherwise, your thought process is correct. |
H: LTSpice "Error:undefined symbol in:" problem
Below is my schematic for a relay SPDT symbol I’m creating. I've posted this question in the Digikey forums, but I am not sure they actually answer LTSpice questions
You may notice I’m not yet very proficient with LTSpice. Getting past that, You’ll notice the spice directive on the top right corner. What I’m trying to do is this:
Regardless of what voltage POS is, V4 = 5 unless POS=<0
:: Here I thought the expression u(POS) * 5 would work because u() returns 0 or 1 depending if the parameter is 0 or > 0
Since it is SPDT both electronic switches (ADG1201) have the same input COM1 but each has a different Output. The switch turns on when Mom = 5. So U1[In] =0 and U2[In]=5 when Mom = 5. Also, U1[In]=5 and U2[In]=0 when Mom=0
:: Here I tried to modify the expressions with the .func statement along with If statements.
In my test Circuit, the Spice Error log reads:
Questionable use of curly braces in “v4 n004 0 {z}”
Error: undefined symbol in: “[z]”
Questionable use of curly braces in “v5 n006 0 {y}”
Error: undefined symbol in: “[y]”
Questionable use of curly braces in “v6 n005 0 {x}”
Error: undefined symbol in: “”
Questionable use of curly braces in “v4 0 {fnvoltmod(v(pos))}”
Error: undefined symbol in: “(if((v)>0,z=u((v(pos)))*5))”
Questionable use of curly braces in “v5 0 {fndecy(mom)}”
Error: undefined symbol in: “(if(([mom])>0,y=0,y=5))”
Questionable use of curly braces in “v6 0 {fndecx(mom)}”
Error: undefined symbol in: “(if(([mom])>0,x=5,x=0))”
Fatal Error: Multiple instances of “V:x1:4”
How do I accomplish what I am doing using Spice directives?
I wouldn’t ask this question if I hadn’t already searched the web for an answer. I think I don’t understand how to use Spice Directives on a schematic properly. I’ve read the LTSpice help and expanded help on the wiki site - but I can’t seem to find schematic rules with spice directives.
In short, please help me understand.
AI: I'm sure there is better way to achieve your goal of modeling switching behavior, but here is an example of using behavioral voltage, "bv", with output dependent on the voltage of another node and dependent on custom function. |
H: What is the difference between 2N7000 and 2N7002 MOSFETs?
Is there any difference between 2N7000 and 2N7002? Can I replace them without changing pre-existing circuits, beside physical/package sizes? Normally for a 2N7000 I use a 100Ohm gate resistor and 1.2MOhm gate to drain resistor. Is it the same for a 2N7002?
edit - here is a electrical characteristic comparison between 2N7000 vs 2N7002
AI: Question
What is the difference between 2N7000 and 2N7002?
Answer
One critical difference for me is that 2N7002 is definitely logic level trigger, 2N7000 is not so sure.
References
(1) 2N7000 / 2N7002 / NDS7002A N-Channel Enhancement Mode Field Effect Transistor - FairChild/On
(2) 2N7002 N-channel Logic Level MOSFET - Components 101 2019jan07
(3) 2N7002 (Vgs(th) min 1V, typ 2V, max 2.5V) Datasheet - NXP 2011sep08
(4) 2N7000/2N7002, VQ1000J/P, BS170 N-Channel 60-V (D-S) MOSFET - Vishay
(5) What is the meaning of “Logic-Level Gate Drive” for the MOSFET? - Toshiba
(6) Logic Level MOS Field Effect Transistor - NTE
(7) OptiMOS 5 and IR MOSFET 60V/80V/100V Logic Level - Infinion
(8) Power MOSFET Driving Big Motor Problem - tlfong01 RpiSE 2019feb09
Appendices
Appendix A - Why Logical Level Vgs(th) is critical to me hobbyist?
In my old 5V Arduino days playing with N-Channel power MOSFET such as IRF540N, I found that its Vgs(th) is well above my 5V Vcc, of the order of 7V. The EE guys then invented clever things called "charge pump" to pump up a cap to 7V to trigger the power MOSFET switch.
I was too lazy to DIY any charge pump and so I gave up, leaving my batch of IRF540N lying in the junk bin to collect dust. My IRF540Ns did stay in the junk bin for 10 years or so, then I heard the good news that new generation power MOSFET's are "logical level" which means Vgs(th) is approx 3V or lower.
And so I threw away my IRF540Ns and got IRL540Ns. I found my Rpi 3V3 logical level GPIO pins can now directly switch them, at least for 500mA of the max rating of some 50+A, with very low Rds(on).
Appendix B - Logical Level Power MOSFET Characteristics
I mainly use N-Channel Power MOSFER such as IRL540N for low current swtiching. For Rpi 3V3 logical GPIO pins, I can already switch up to 6A, so I am happy to use it. I know other users hope to use 1V8 logical level trigger, and there are more and more such MOSFETs coming out. I am showing two cases below. |
H: How are irrational numbers best represented and processed by computers?
My question is closely related to this one: How do computers understand decimal numbers?
However, that question deals with rational numbers only. I was wondering if irrational numbers can be represented by computers.
Irrational numbers are numbers with non-repeating and non-terminating decimal expansion. They have an infinite non-repeating sequence of numbers after the decimal point.
A common example where irrational numbers are seen is when calculating the area of a circle. The area of a circle will be an irrational number in most cases.
If the decimal expansion of an irrational number is shortened then the accuracy would reduce. As a simple example, the natural logarithm of e is 1, while the natural log of 2.72 or any approximation of e, is not 1 but a number a close to 1. If I'm writing a program using floating point arithmetic and the computer uses this approximation of e it will lead to errors.
Is it possible to avoid such errors and error propagation? Computations in science and engineering often involve irrational numbers. If this error propagates the final result will be very far from the correct one.
AI: There’s nothing special about computers in this context. An infinite number of nonrepeating decimal places cannot be stored or manipulated on a computer, on paper, or in a human brain.
Irrational numbers can be represented in a few different ways:
A symbol that names the number, such as e or π. A computer can use symbolic computation to work with such symbols.
An algorithm that describes how to compute the number. The algorithm can only be run if it can be terminated early to produce an approximation. If the algorithm is a symbolic computation (such as sqrt(2)), it may be manipulated in that form.
A rational approximation of the number, which can be stored using any normal method such as floating point or BCD.
EDIT: Crasic points out in a comment that "...system epsilon is usually well defined for computers. That is, from the perspective of future computation or manipulation within the computer system using standard built in numerical types, you should be able to state what is the smallest unit of numerical precision is for your computer system and can therefore terminate algorithm when your estimated remaining error is less than this known value."
Technically, you can do this by hand as well, but hand calculations are too slow to make it worthwhile. |
H: Issues with kitchen fan - how to salvage?
In my kitchen there is a fan to extract air in case it smells during cooking to not make the whole appartment stink like food. When I turn it on, it looks like it is working. But after a bit of time, the sounds it makes change - which seems unexpected.
So I took the blower unit out of its housing. This is what it looks like on its own:
The schematics look like the following (this is what I was able to figure out without opening the fan itself):
I connected it to the mains and let it run for a bit. And sadly it behaved a exactly like in its housing in the kitchen. When the unit starts up being cold, you can feel a strong air flow out of it. After a while the air flow drops to a gentle breeze. This is where I disconnected it from the mains again. I did 2 measurements: First I measured the voltage accross the capacitor: It starts at 280 V AC and slowly drops down. Around 180 V AC there was not much air flow left. What bothered me was that the capacitor heated up. I'm bad at guessing temperatures but it was well above comfortable temperature.
Since I don't have a power analyzer socket, I let it cool down and measured the current it draws. The unit starts at around 200mA. The current exponentially rises. At 350mA you could hear that the motor was spinning slower and at 400mA I disconnected power again.
The label on the fan says 36W which would translate into roughly 160mA. The label on the capacitor says 1,5 uA +/- 10% @ 320V AC.
My multi-meter did not want to measure the capacitor in situ. And since the connectors are crimped and I don't have replacements at hand, I did not want to destroy them, yet.
As the current draw is well above what the unit should have drawn and also the capacitor is getting too hot for my councious, the unit is not getting back into the kitchen anytime soon.
Question: Is this fan salvagable? And if so which component should I replace?
Date of manufacture: 10/1982
Location is Germany, so the mains voltage is 230 V
Edit:
I measured the capacitor on its own. Also made a technician at a local electronics store measure it. Both measurements came up fine. But that does not mean anything. The fan started blowing fine at first.
I bought a new capacitor and wired everything up. After 5 minutes the capacitor stayed cool and there was no audible changes in fan speed. Also the voltage across the capacitor stayed between 275V and 280V AC.
Will put everything together tonight and reinstall it. Thanks for the help.
AI: There's a chance the capacitor has simply failed and you can replace it. You'll have to cut one of the wires to measure it. If it has failed it will likely measure much lower than the 1.5uF capacitance marked on it or it may have large leakage due to internal damage. If it has caused the motor to overheat too much, the motor may have been damaged. The capacitor should not be getting hot at all.
In the case of a similar type of draft inducer fan used in our high-efficiency furnace the motor had to be replaced. |
H: Solar load sharing for an MCU
I understand P Channel MOSFET operation and was reading this question which shows this circuit:
but I wasn't sure whether this can be used to load share with an MCU such as Arduino or ESP32 which have a System Load of 5V/3.3V respectively. With a solar panel outputting 6V, the MOSFET will never be on as Vgs will always be positive (Vg - Vs = 1V or 2.7V).
Is the PMOS only used for higher power system loads, e.g. above the 6V output of a solar panel? If so, how best to load share an MCU. e.g. power the MCU (and independently charge the battery) from the solar panel when the sun is out otherwise power the MCU from the battery?
I assume there will be a voltage regulator at the system end to drop Vbat/Vin to the required MCU voltage.
EDIT
after thinking about it, as Vin tends to 0V, i.e the sun goes in, Vgs tends towards Vgs(th) (-tve) and eventually switches the MOSFET on, which allows Vbat to power the MCU via MOSFET D/S. As Vin rises, the MOSFET will turn off, removing Vbat from the MCU and powering it from whatever Vin is when Vgs(th) is no longer met. That suggests the MCU will be receiving power from Vbat and Vin at the same time until Vgs(th) turns the MOSFET off.
EDIT
after reading this question, using a logic level MOSFET (NDP6020P) with Vgs(th) = -0.2V, that would mean at some point Vbat(3.7V) + Vin(3.1V) = 6.8V max going to an ESP32 (until Vin turns MOSFET off). The ESP32 requires 3.3V so an LDO voltage regulator would be required on the MOSFET Source side but when the MOSFET turns off (and Vbat goes away), Vin is < 3.3V so the ESP32 will turn off until Vin rises to 3.3V.
AI: with Vgs(th) = -0.2V, that would mean at some point Vbat(3.7V) +
Vin(3.1V) = 6.8V max going to an ESP32 (until Vin turns MOSFET off)
Two things here: -
Parallel voltage sources are not in series hence the net voltage does not add. There is only one winner when diodes are involved...
Each voltage source (battery and Vin) are coupled to the system load via diodes. That's D1 for Vin and the internal MOSFET bulk diode for Vbat hence only one supply serves up current to the load (apart from leakage current and when both voltage sources are close to identical).
Is the PMOS only used for higher power system loads, e.g. above the 6V
output of a solar panel?
No, it will work at lower voltages provided the \$V_{GS(TH)}\$ of the PMOS is low enough to adequately turn it on when Vin drops below Vbat. But I think you kind of knew that from EDIT #2 in your question.
I assume there will be a voltage regulator at the system end to drop
Vbat/Vin to the required MCU voltage.
There needn't be if the MCU can operate over a reasonable range of supply voltages. |
H: Voltage reference output impedance calculation
I'm using AD7190 to sample 4ch single-ended signal. The datasheet suggests ADR431 or ADR421 as voltage reference for AD7190. However, an article on Analog Dialogue gives a way to calculate whether an additional output buffer is needed for voltage reference.
The article gives an example:
So, I did calculation myself for ADR435 and AD7190.
The output impedance of ADR435 is calculated in the article above.
The AD7190 is 24bit ADC and the Iref is 7uA/V, which gives its Ro_max=(5V/2^25)/(7uA*5)=0.00425 Ohm.
The Ro_max(AD7190) < Ro(ADR435).
Is that means a output buffer is needed or my calculation is wrong?
Thanks.
The link of the article is down below.
https://www.analog.com/en/analog-dialogue/articles/precision-successive-approximation-adcs.html
AI: The ref has 3.5µVpp noise (on 2.5V that's 19.5 bits).
This noise is higher than voltage drop due to ADC current (7uA*5)*0.075R = 2.62µV.
However, note your ADC is a sigma delta, so it doesn't draw current pulses from the reference voltage, unlike the SAR ADC mentioned in your article. So the article doesn't apply for this ADC.
Also the ADC datasheet says:
Average Reference Input Current 7 μA/V typ
Average Reference Input Current Drift ±0.03 nA/V/°C typ
This implies the reference current is constant, which makes sense for a sigma delta ADC, it's just going to end up on a comparator input.
So your reference current is just going to cause a constant DC offset which will be negligible compared to the tolerance on your reference voltage. |
H: A DC current through a inductor does not create electric fields
While studying about electric fields and magnetic fields I came across this picture:
and this:
from this website and it indicates that there is an electromagnetic field around the loop of wire, while it gets powered from a battery.
Now correct me if I am wrong but:
As far as I know, since the current is DC, there is a magnetic field (since current is moving), but there is no electric field around the wire (since current is constant, and all the atoms are neutral while electrons/holes move along the wire loop).
There would be a electric field along with the magnetic field in two cases:
if the current was not DC, (if it was either AC or voltage pulses).
When the battery first powers the coil, until the voltage on the coil reaches from 0V to X volts, there is a electric field since the current is changing.
In addition, Wikipedia's electromagnet page does not state anything about electric fields or electromagnetic field. It only talks about magnetic field.
Am I right?
EDIT:
This question and replies here also helps understand how an electric field is created on a coil, if you think of it as a resistor.
AI: An electromagnetic field is created when a current passes through a wire
This is entirely correct.
As far as I know, since the current is DC, there is a magnetic field (since current is moving), but there is no electric field
It is true in a certain sense, and under certain conditions, that a DC current through a wire creates a magnetic component of a electromagnetic field, but no electric component(*) of an electromagnetic field.
Let's parse this. In the 1830's Faraday published the results of experiments he had performed with magnets and coils of wire. What he discovered is that the relative motion of a magnet and a coil of wire induced a current in the wire. I want to emphasize relative, because the story eventually involves Einstein and the Special Theory of Relativity.
In the 1870's Maxwell published a theory of electricity and magnetism that could either be described as theory of a single field, an electromagnetic field, having two components, an electric field component, and a magnetic field component. Or, could be described as two separate fields that influence each other in clearly defined ways.
There was a problem with Maxwell's account, however. Faraday had pointed out that it was relative motion between the magnet and the coil that induced the current. However, according to Maxwell's theory, a stationary magnet induces no electric field, yet a movement of the coil, causes current to flow. (Think of a generator with stationary permanent magnets, and a moving coil).
Lorentz saw the need to add an additional equation to the ones formulated by Maxwell, (which were recast as we know them today by Heaviside). Lorentz added a "Lorentz force" equation, that allowed a current to be induced in a coil moving through a stationary magnetic field.
While this accurately predicted what would happen, Einstein was not happy with this state of affairs. What had been a unitary phenomenon for Faraday, the relative motion of a magnet and coil inducing a current, had become with the electric and magnetic field theory, two separate phenomena. Either induction of an electric field by a changing magnetic field, or a Lorentz force, depending upon one's frame of reference.
Einstein changed this by asserting a single electromagnetic field, which could be divided into electrical and magnetic components in different ways depending upon one's frame of reference. What is "magnetic" in one frame of reference is "electric" in another, and vice versa. Within a frame of reference in which the coil is stationary and the magnet moving, the electric field component can be seen. Within a frame of reference in which the magnet is stationary and the coil is moving, the electric field component is absent. But, as they say, it's all relative.
Your question does not involve a moving magnet. But the principle is the same. In one frame of reference, there is no electric field component, but in another frame of reference there is.
So, it is entirely correct that:
An electromagnetic field is created when a current passes through a wire
And, in the frame of reference where the wire is stationary, but only in that frame:
since the current is DC, ... there is no electric field
or more properly
Since the current is DC, there is no electric field component(*) of the electromagnetic field.
*[minor point. All of the above goes on the assumption that the voltage drop through a wire is negligible.] |
H: Why is the collector region doped?
As long as within the active region the collector-emitter junction is reverse biased, is there a purpose for which the collector must be doped? Moreover, not only that it is doped, but it is moderately doped, thus more than slightly doped like the base region.
AI: The essence of transistor behavior in the active region is as follows.
The base-collector pn junction is reverse biased
majority carriers have a difficult time crossing a reverse biased pn junction
minority carriers easily cross a reverse biased pn junction
unless the emitter injects minority carriers into the base, there are few minority carriers in the base
when the base-emitter pn junction is forward biased, majority carriers from the emitter cross the base-emitter junction into the base, where they become minority carriers, (where they easily cross over the reverse biased base-collector junction).
Now:
As long as within the active region the collector-emitter junction is reverse biased, is there a purpose for which the collector must be doped?
The conductivity of the collector depends upon doping. Undoped silicon is a poor conductor.
Moreover, not only that it is doped, but it is moderately doped, thus more than slightly doped like the base region.
The base is lightly doped to reduce the number of majority carriers in the base. The concentration of majority carriers is directly related to the doping concentration. The higher the concentration of majority carriers, the greater the chance of the minority carriers recombine in the base with majority carriers. This increases base current, and decreases collector current.
The collector is doped less than the emitter to make the transistor asymmetric. The more symmetrical a transistor, the poorer it performs in the forward active region (but the better it performs in the reverse active region).
Those are the reasons why the base and collector are both doped less strongly than the emitter. Why the base might be doped even less than the collector I do not currently know. Perhaps someone with more expertise in transistor design can answer. |
H: Do the high / low levels of an I²C slave's response have to be of identical voltage as the levels of the I²C master's message?
I've got an IC (a TDA7318) with an operating voltage of +9 V. It's gonna be controlled by a Raspberry Pi 3B (output signal voltage: V_high = 3.3 V). Now I'd like to make sure that the responses sent by the TDA to the Pi do not exceed 3.3 V, as otherwise it might get fried.
So here is the "general" version of my question: When the master sends signals at V_high = 3.3 V into the I²C bus, does the I²C spec require all slaves to send their responses to the master at the same V_high level?
In this special case, my question reads as follows: Will my IC use a V_high = 3.3 V for the responses it sends into the I²C bus even if its V_cc is 9 V? Or should I rather use a level shifter for safety?
AI: I2C bus levels for the TDA7318 are on page 5 of the datasheet.
It accepts 3V as the minimum logic high voltage.
And besides the I2C bus is open-drain, so it is not the chips that determine the bus high voltage, it is the pull-up resistors that set the voltage, and on the Raspberry Pi the resistors are to 3.3V. There won't be 9V on the bus. |
H: Water detector with a BC547 and help understanding transistors
I have set up a basic water detection sensor using a BC547 transistor to switch on an LED if there is current between two electrodes (which are spaced about 1 cm apart):
I'm trying to understand more about how transistors work. I have some questions which I would appreciate help with:
The 4.7k resistor is a failsafe in case the electrodes touch each other and send too much current through the transistor and destroying it. I've made this mistake already. If the electrodes touch, with the 4.7k resistor in place, only 1.9 mA will pass to the base. How do I know how much current is too much for the base? I've looked at this spec but I don't see a specification for this. Is it the same as the max collector current (100 mA)?
If I replace the 4.7k resistor with 1M ohm then the LED burns very dim. How is this happening? Surely the switch is only on and off.
It seems that my tap water provides a resistance of roughly 500k ohms. This means that as little as 18 uA of current is going to the transistor's base, which does indeed switch it on. What current would be too small to work and how would I calculate this number?
The BC547 spec says the max emitter-base voltage is 6 V. Does this mean I need to drop the voltage along this line? Should I plug in a couple of diodes?
Any other points or suggestions would be appreciated!
AI: 1.The 4.7k resistor is a failsafe in case the electrodes touch each other and send too much current through the transistor and destroying it. I've made this mistake already. If the electrodes touch, with the 4.7k resistor in place, only 1.9 mA will pass to the base. How do I know how much current is too much for the base? I've looked at this spec but I don't see a specification for this. Is it the same as the max collector current (100 mA)?
There isn't a good answer to your question. The manufacturer has not addressed the issue of driving so much base current through the transistor that it kills the transistor. At a guess, 100 ma would seem a reasonable starting point, although reducing that wouldn't be a bad idea.
2. If I replace the 4.7k resistor with 1M ohm then the LED burns very dim. How is this happening? Surely the switch is only on and off.
Surely not. As long as the collector-emitter voltage is greater than about 1 volt (and the emitter current is within bounds) a transistor acts as a current amplifier, with the collector current being more-or-less proportional to the base current. Look at the data sheet and see "current gain". Also keep in mind that gain varies with current, and in particular drops as current increases past the specified values. It also decreases with decreasing current, too.
Once you get into the situation that Vce is less than about a volt, the gain of the transistor is fairly low. Note that the rating for Vce(sat), the saturation voltage, is specified at a gain of 20. Once you get into this range, small changes in base current have almost no effect on output voltage, and you can use the transistor as a switch.
3. It seems that my tap water provides a resistance of roughly 500k ohms. This means that as little as 18 uA of current is going to the transistor's base, which does indeed switch it on. What current would be too small to work and how would I calculate this number?
That requires a little thought in defining exactly what you mean. What, exactly, does "switch it on" mean? Let's assume that "on" means 2 mA through the LED, AND that it's a white LED. Then it will have voltage drop of about 3 volts. 2 mA through the 1k resistor will produce a 2 volt drop. So Vce on the transistor will be 9 - 2 - 3 volts, or 4 volts.
2 mA of collector current and 4 V of collector current are almost exactly where the gain of the transistor is specified, and you'll notice that the minimum value is listed as 110. So the base current to do this will be 2 mA / 110, or about 18 uA.
Of course, as I mentioned, you need to think carefully about exactly what "switch on" means. If the LED gets 1 mA, and is a little dimmer, is that "on"?
4. The BC547 spec says the max emitter-base voltage is 6 V. Does this mean I need to drop the voltage along this line? Should I plug in a couple of diodes?
Nope, you need to think about exactly what the spec is saying. Note that it is the emitter-base voltage, not the base-emitter voltage. It's referring to the reverse voltage you can apply to the emitter-base pair, rather than the forward voltage, which will be limited to about 0.7 volts by the diode action of the junction. Unless you plan to reverse the power leads on your circuit, you don't need to worry about it. |
H: Old Variac -- chassis ground? is it safe?
I've got an old (vintage!) GenRad Variac (below) that has two prong plug and two prong socket. I want to modify it to add a safety earth pin to both input and output. In doing so, I opened it up and have realized the circuit runs through the metal chassis itself, and I'm confused about what I'm looking at and would love to get a bit more clarity.
Have done a bunch of googling about chassis ground and hot chassis radios and such and I suspect this is just an old design, but I'm confused about why it appears in a Variac. Photos below showing the internal configuration, but the circuit is simple and as expected-- a 2PDT on-off switch connects both incoming lines to the transformer taps, and the other side of that is the output socket with a circuit breaker. The transformer mounting core and wiper mechanism is not isolated from the chassis (they are in contact at the front panel), so there's (multimeter-verified) continuity between the outer chassis and all taps of the transformer, the outputs and (when switched on) the inputs. (Pic showing continuity measurement added below.)
When I set the output to e.g. 50V, the potential between the outputs is 50V-- ie the Variac seems to work. When I measure the potential between each output and the chassis screws, one is ~50V and one is ~110V.
When I measure the potential from the chassis screws to real earth (wall socket), it's very low, < 1V, and when I touch the switch/case it doesn't shock me.
This isn't a radio or TV, so there should be no RF interference concern here, so why isn't the circuit totally isolated from the chassis in the first place? Is this a form of safety intent? IS this design safe?
I can replace the plug and socket with 3 prongs and connect the earth pins directly. I obviously would like to "ground" the chassis properly but I obviously can't here since that will allow current to flow to earth in normal operation and trip the GFCI-- right?
I'm trying to make sure I (a) understand what I'm looking at (b) it's working as designed and is, in fact, safe and (c) that I shouldn't mess with the chassis grounding when adding the third pin connection.
Thanks for insight or pointers.
AI: I don't see any connections to the case. There should not be any connections to the case.
Assuming there isn't, you should run the ground wire to the case and to the output receptacle. You can drill a hole in the case and attach both to the a screw with a lockwasher and nut.
Measurements made with a multimeter on a voltage range are not reliable since the multimeter is very high impedance and will pick up voltage from capacitive coupling. On a resistance range you can measure between input/output and case and there should be no continuity even on the highest range. Obviously you would do this with power off and unplugged.
You should not connect to either side of the output. A variac is an autotransformer and does not provide isolation. It looks like they are switching both sides of the mains. I think that's acceptable practice today (someone will correct me if not) but you should keep the neutral side (white wire) to the neutral side of the new socket. Modern receptacles usually have brass for the hot and silver color (eg. nickel plate) for the neutral screws. And green for the ground.
Edit: Well that ohmmeter photo you added is fairly convincing. I have to assume that the plug is polarized with the neutral pin wider- that would be a death trap of a product if not, and even so not all outlets are wired correctly
Okay, looking at some old data (this thing is perhaps 70+ years old) the diagrams actually show earth connected to one side of the line. This was sometimes done in radios of the all-American-five vacuum tube vintage but usually there was little exposed metal on them.
I would be inclined to find that connection and remove it, and ground the case. |
H: Are SiC Mosfets better than Si Mosfets for Solar Charger in max 550V Range
The charger needs to handle the solar array's output of max 550V, but also efficiently handle lower voltages as weather/etc conditions degrade -- down to roughly 150V. It needs to handle between 15 - 50A. Thats quite the wide range of voltages and current, but is the nature of this particular solar setup. Efficient power conversion is of prime importance. I'll be using an MPPT type algorithm at the MCU with 5V output to the gate driver. PWM frequency will likely depend on the Fet used -- I'm assuming >50KHz. Output power to the batteries will be approx. 120V. Price isn't too much of a concern, hard costs need to come in at under $100USD per unit (but much less is preferable).
One of the options I'm currently looking at is Wolfspeed's 650V SiC Mosfet.
And, on the Si Mosfet side: OnSemi's Super Junction Mosfet.
From what I've read, SiC Mosfets really outperform Si in high power applications and in high frequency PWM drivers. It seems their current market value is in converting much higher voltages, up to 1200V. Those power levels are above the scope of my lowly project of only 550V.
My question is: Are SiC Mosfets an appropriate technology to incorporate into <=550V power switching? Will I gain power conversion efficiencies with them compared to other more standard Si Fets in that power range? Or, do those efficiencies deteriorate at lower voltages -- where Si Mosfets would do just as well?
AI: My question is: Are SiC Mosfets an appropriate technology to
incorporate into <=550V power switching? Will I gain power conversion
efficiencies with them compared to other more standard Si Fets in that
power range? Or, do those efficiencies deteriorate at lower voltages
-- where Si Mosfets would do just as well?
Comparing two devices in the links (Si = FCP125N65S3 and the Cree C3M0120065K), they both have about the same on resistance, max voltage and max current. However, the MOSFET will be slightly more efficient at around 50 kHz but, at speeds probably in excess of 200 kHz the SiC will probably be better due to its lower gate-source capacitance.
The Cree (SiC) will require a more sophisticated protection regime to avoid thermal runaway compared to the regular Si device because most SiCs don't avoid this even in switching applications. Si MOSFETs do avoid this problem rather well.
The gate drive voltages for SiC are about 150% higher than regular Si too. This both causes losses and slows things down a little bit and, designing a SiC gate driver needs a little more thought compared to Si. However, there's still a good chance that SiC will be significantly faster than Si and should be operated at a higher speed.
If the bulk diode is at all utilized for any form of flyback management then the SiC will be better because it has a faster reverse recovery time of 15 ns compared to 339 ns for the silicon but, the diode power losses are far more significant in the SiC compared to the Si.
Remember, this is a quick data sheet-to-data sheet side by side comparison. A true comparison only ever happens when you compare a circuit against another circuit because some parameters will be more important than others. |
H: Is there something wrong with this irregular clock line (SCL) on I2C? ( Arduino board)
I am trying to get this ADXL357 eval board to work, in connection with either Arduino Uno or Due via I2C. Sometimes I get a connection and can read out data, however often there are problems with setting up the device and I cannot read out data.
I am now using a logic analyser with sigrok/pulseview to take a closer look at what is happening on the I2C bus. I noticed that
a) the clock line seems very irregular, the width of the pulses changes, see print screen (n.b. this happens on both the Due and Uno)
b) the values that are being transferred are not what I'd expect.
Does the SCL line look normal to you? Or is there maybe something wrong with the wiring or Arduino wire.h library?
See script I am using from Seeed (n.b., the library I am using is for a different breakout board, but does work sometimes).
#include "Seeed_adxl357b.h"
#if defined(ARDUINO_ARCH_AVR)
#pragma message("Defined architecture for ARDUINO_ARCH_AVR.")
#define SERIAL Serial
#elif defined(ARDUINO_ARCH_SAM)
#pragma message("Defined architecture for ARDUINO_ARCH_SAM.")
#define SERIAL SerialUSB
#elif defined(ARDUINO_ARCH_SAMD)
#pragma message("Defined architecture for ARDUINO_ARCH_SAMD.")
#define SERIAL SerialUSB
#elif defined(ARDUINO_ARCH_STM32F4)
#pragma message("Defined architecture for ARDUINO_ARCH_STM32F4.")
#define SERIAL SerialUSB
#else
#pragma message("Not found any architecture.")
#define SERIAL Serial
#endif
#define CALI_BUF_LEN 15
#define CALI_INTERVAL_TIME 250
int32_t cali_buf[3][CALI_BUF_LEN];
int32_t cali_data[3];
float factory;
Adxl357b adxl357b;
int32_t deal_cali_buf(int32_t* buf) {
int32_t cali_val = 0;
for (int i = 0; i < CALI_BUF_LEN; i++) {
cali_val += buf[i];
}
cali_val = cali_val / CALI_BUF_LEN;
return (int32_t)cali_val;
}
void calibration(void) {
int32_t x;
SERIAL.println("Please Place the module horizontally!");
delay(1000);
SERIAL.println("Start calibration........");
for (int i = 0; i < CALI_BUF_LEN; i++) {
if (adxl357b.checkDataReady()) {
if (adxl357b.readXYZAxisResultData(cali_buf[0][i], cali_buf[1][i], cali_buf[2][i])) {
}
}
delay(CALI_INTERVAL_TIME);
// SERIAL.print('.');
}
// SERIAL.println('.');
for (int i = 0; i < 3; i++) {
cali_data[i] = deal_cali_buf(cali_buf[i]);
SERIAL.println(cali_data[i]);
}
x = (((cali_data[2] - cali_data[0]) + (cali_data[2] - cali_data[1])) / 2);
factory = 1.0 / (float)x;
// SERIAL.println(x);
SERIAL.println("Calibration OK!!");
}
void setup(void) {
uint8_t value = 0;
float t;
SERIAL.begin(115200);
if (adxl357b.begin()) {
SERIAL.println("Can't detect ADXL357B device .");
while (1);
}
SERIAL.println("Init OK!");
/*Set full scale range to ±40g*/
adxl357b.setAdxlRange(FOURTY_G);
/*Switch standby mode to measurement mode.*/
adxl357b.setPowerCtr(0);
delay(100);
/*Read Uncalibration temperature.*/
adxl357b.readTemperature(t);
SERIAL.print("Uncalibration temp = ");
SERIAL.println(t);
/**/
calibration();
}
void loop(void) {
int32_t x, y, z;
uint8_t entry = 0;
if (adxl357b.checkDataReady()) {
if (adxl357b.readXYZAxisResultData(x, y, z)) {
SERIAL.println("Get data failed!");
}
SERIAL.print("X axis = ");
SERIAL.print(x * factory);
SERIAL.println('g');
SERIAL.print("Y axis = ");
SERIAL.print(y * factory);
SERIAL.println('g');
SERIAL.print("Z axis = ");
SERIAL.print(z * factory);
SERIAL.println('g');
}
delay(100);
}
=======================================================
EDIT: Turns out I didn't have the driver for the logic analyser installed correctly. Changed it (using this instruction) and now the clock signal does look 'normal'.
AI: I²C doesn't care whether it has a steady clock or not; it can't even tell. All it cares is that there's a clock pulse that tells it when to send (or receive) the next bit of data. So this may be unusual, but I don't think it's necessarily a problem in itself. It may be symptomatic of a problem with your arduino or your code, however. |
H: Clean/reduce static in electret microphone caused by "dirty" Raspberry Pi pin output voltage
I'm currently trying to wire up an electret microphone to a Raspberry Pi. I just figured out how to wire it up to a button cell battery after a couple of days of struggling. Still learning electronics so bear with me.
simulate this circuit – Schematic created using CircuitLab
I want to remove the button cell, and replace it with the +3.3V to GRND pins on the Raspberry Pi 3B+, but the problem I'm encountering is when connecting ground to the ground pin on the Pi, I get a lot of audible static in my voice recordings.
I'm assuming that this is because the ground pin isn't limited to -3.3V like with my button cell.
Is there a way to limit the negative voltage potential of the ground pin?
My instincts tell me that using a capacitor can accomplish this somehow, but I'm not sure of the approach.
AI: Expanding on KD9PDP's answer.
If the 3.3V from the RPi is noisy, you can improve the filter by adding a series resistor, electret mics don't draw much current. You may need to experiment with the resistor values.
If you have noise on the ground wires, that is harder to fix. If you can float your RPi, connect the mic circuit ground to one point at the RPi.
simulate this circuit – Schematic created using CircuitLab |
H: Need help with identifying transformer ratio
Does the transformer ratio 240:15 or 240:30? It's a bit confusing
AI: It's 240:30 with secondary centre-tap.
You might find it specified as "primary 240 V, secondary 15-0-15 V" which gives a clearer idea of how the secondary is configured. |
H: Can I connect 24V direct to optocoupler?
I would like to check sensor signal on MCU. Sensor signal is 24V. Therefore, i want to use optocoupler as an interface between MCU and sensor. NC1 is going to MCU pin. My question is if i can connect 24V direct like this. There are total 4 inputs exactly same.(24V to 5V)
I have simulated this on tinkercad and it shows 11mA current flows over diode and it works without any problem. However, i don't think it is reliable to connect it like this so i want to ask how should i connect this for proper and reliable operation?
AI: No. As indicated by the symbol, the opto-transmitter is an infrared LED with a typical forward voltage, Vf, of 1.4 V. Like any LED in a similar situation a series resistor is required to limit the current. In your case you probably want 10 mA through the LED so \$ R = \frac V I = \frac {22.6} {10m} = 2k2 \$.
A few tips:
Draw your schematics so that higher voltages are at the top of the page and current flows from top to bottom. i.e. Invert your opto-isolator.
Generally signal flow should be from left to right. i.e. LED (the input) on the left, output transistor on the right.
GND symbols should point down to ground.
If you are interested, Rules and guidelines for drawing good schematics is well worth a read. |
H: Is a bit error rate close to 1 just as desirable as one that is close to 0?
Let me explain the premise. If you have a communication system, and you know with a very good confidence margin what the bit error rate is, would you be able to exploit the properties of high bit error rate by simply flipping the bits? For example, imagine:
0 1 0 1 0 1 1 1
Is sent as a package to a satellite, which reads:
1 0 1 0 1 0 0 1
Where the bit error rate is .875. If we know that this is the error, we could randomly select a bit that is incorrect and in the worst case, this would result in a bit error rate of now 1 (we assumed that the last bit was the culprit):
1 0 1 0 1 0 0 0 <- Bit flipped (estimated to be the one that is incorrect)
Then, we flip the bits completely to reveal the real bits we first transmitted.
This situation sounds too good to be true, so in the real world, what is preventing us from doing this procedure and is this actually applicable in some scenarios?
EDIT: Appreciate immensely the responses, I will try to respond to each one.
AI: A bit error rate of 1, if you know there is an error rate of 1, is perfect as you can simply invert all the bits and get the original data.
If you don't know the bit error rate is 1, and therefore don't correct for it, then it is not good.
As a real world example, PCIe during it's link training phase can happily detect polarity inversion of its data lines (positive and negative pins reversed). This produces a BER of ~1, which it will detect and then correct for by inverting the data stream. |
H: Why recommend tantalum over ceramic capacitor for voltage regulator?
The LM1117 voltage regulator datasheet recommends using tantalum capacitors on the input and output. What is the reason for this? What advantage does tantalum have over a ceramic capacitor?
A 10μF tantalum capacitor costs about 21 cents, while a 10μF ceramic capacitor costs about 3 cents. The ceramic capacitor is also a bit smaller physically. Plus, you don't have to worry about getting the polarity wrong on a ceramic capacitor. I believe there is also less concern about conflict minerals with ceramic capacitors.
What advantage does the tantalum capacitor offer, and why does the datasheet recommend tantalum for the input and output capacitors of the voltage regulator? What exactly would happen if a ceramic capacitor was used instead?
Note: To everyone who's claiming this is a duplicate of Why does the LM1117 data sheet specifically specify tantalum capacitors?, that question is about tantalum versus electrolytic capacitors, while my question is about tantalum versus ceramic capacitors. Related, but not the same.
AI: The important part of the data sheet to read is this: -
So, if you choose a ceramic capacitor for the output, you might create instability in the LM1117 because a ceramic capacitor will likely have an ESR that is below 0.3 Ω.
This doesn't mean you can't use a ceramic capacitor - providing you are prepared to add a small value series resistor it will be fine. Generally, this "rule" applies on light loading scenarios. On medium to heavy loading, the load itself will "damp" the potential of the LM1117 to go unstable. |
H: Bidirectional TVS supressor instead of Snubber for Triac
I am planning on building my own smart home socket and I want to mainly control LED lamps. But of course I can't make sure that someone is not plugging in let's say a toaster into the socket. (Yes I know that I could warn everyone since it is only for private use but this seems to be not the right approach).
Of course I know that dimming capabilities using phase cutting is not suitable for most LED bulbs but it suffices to just turn them on and off at this point.
Now my problem is that by using a snubber circuit I can protect the Triac from voltage spikes caused by the cut-off of an inductive load but this is also mostly a problem when switching LED Lamps since the capacitor charge is often enough to let the lamp flicker once in a while (depending on the lamp circuit).
Therefore I would like to know if it possible to use a bidirectional TVS Diode instead of a snubber and if it still offers enough protection.
Here are some of my circuit parameters:
Voltage (Load) 230 VAC
Triac BT136 600E
MOC 3021
TVS Diode 1,5KE250CA
AI: TVS Diode 1,5KE250CA
The TVS Diode type 1,5KE250CA has a breakdown voltage of between 237 volts and 263 volts. This isn't an RMS rating; it's a peak voltage rating - take note.
Voltage (Load) 230 VAC
220 volts (diagram) or maybe you mean 230 volts as per the above statement has a peak voltage of \$\sqrt2\times 230\$ = 325 volts and will instantly fry the TVS you chose. The TVS will clamp somewhere between a peak voltage of 263 volts and 344 volts and you cannot determine where this will happen so, no that TVS isn't suitable.
And, unfortunately, none of the TVS diodes in the data sheet will really be any good for you because most countries will have specifications on indirect lightning surge protection for households of around the 1500 peak volt limit so, it's unlikely that any TVS is going to be able to be used at all effectively.
Therefore I would like to know if it possible to use a bidirectional
TVS Diode instead of a snubber and if it still offers enough
protection.
No, it won't be at all suitable - stick with snubbers - they don't hard clamp and therefore they won't try to take a massive current peak should indirect lightning surges affect your neighbourhood. |
H: Is there a standard way to probe SPI without causing data corruption?
When I connect my oscilloscope probes to my SPI lines, the line voltages get affected a lot and so my SPI comms fail.
I am using a breadboard as an intermediary between the two devices and adding cables to the breadboard to scope from.
Is there a better way to probe SPI? I'm currently looking to snip my wires to expose the metal and probe that way to reduce the length of the SPI connections.
Any better ideas would be appreciated.
Running SPI at 10 MHz
AI: Your problem isn't so much the scope probes as the breadboard.
The breadboard adds series inductance (as though you had installed coils in series with the SPI signals) and parallel capacitance (as though you had put small capacitors from the SPI signals to ground.) This will slow the rising and falling edges, making it more difficult to detect level changes. The inductance can also cause ringing - there can be false level transitions from the ringing.
Attach your probes directly to the SPI signals, right at the point where the wires connect to one of your boards.
Use 10X probes if you have them - they are less of a load on the signal lines.
SPI uses relatively fast signals, and isn't intended to be used between circuit boards.
It is intended for use on a single board with short connections.
The wires between the boards are probably making your SPI signals "unhappy," never mind the breadboard and the additional load of the oscilloscope.
Use short wires.
Keep the circuit neat.
Use straight wires rather than letting things twist around and get tangled.
Put the breadboard down and back away slowly. Nobody has to be injured here. |
H: Daisy Chain USB Devices with USB2422
I'm designing a keyboard and I want to be able to daisy chain another USB device through it. I have a Drop ALT that does this and I really like it. It has two USB C ports and you can connect either one to the computer and use the other as a pass through. It uses a USB2422 as the hub and I've read the data sheet several times but I can't figure out how it's working. The USB2422 has one upstream port and two downstream. I thought the upstream would go to the computer but then why doesn't it matter which port you use?
Edit to add pictures.
AI: My guess (or how I would do it) is that there are multiplexers on the data lines of both USB ports, and then check which port is being connected to the computer using power sensing in order to switch the multiplexers from each USB port to the correct pins on the USB2422.
Those look like they could be multiplexers: |
H: Single pole triple throw analog passthrough
I have a circuit that will simulate a device.
The device in question normally communicates by adding/removing resistance from a generated signal, the source of the signal will then measure the voltage difference and interpret that as a message.
In order to simulate it, I need to be able to route the incoming analog signal (1kHz square wave, V1 in below schematic) to different points in the circuit or make it NC.
I tried looking for multiplexers, but those I found weren't able to pass the analog signal through.
I couldn't find any single-pole triple-throw relays anywhere.
What type of component can I use in place of U1 below to achieve this behavior?
simulate this circuit – Schematic created using CircuitLab
V1 is a PWM signal with a +/- 12V amplitude. It's a control signal which won't be carrying a lot of current (maximum 5nA).
I would like to be able to control U1 with a 5V control signal (an arduino or something to that effect)
This is what the "mechanical" counterpart would be:
AI: There are many 4:1 analog mux parts that will meet your requirement, in both the CD4xxx series and DGxxx series. Analog Devices, Vishay, TI, etc.
There are two addressing options:
The CD4066 has multiple, independent switches, and any of them can be on/off in any combination because there is one enable input per switch with no internal decoding. Three possible output states require three address lines.
The CD4052 has an address decoder and two sections, each with 4 switches. The switches are mutually exclusive - only one can be on at a time (per 4:1 section). Three output states require two address lines . |
H: Monostable circuit with 1 hour high output
I want to build a monostable circuit (a circuit with one input as a pushbutton), that will output logic '1' when the pushbutton is pressed for one hour (with the least error possible) then go back to its original state of outputting logic '0' until the pushbutton is pressed again.
I know about the 555 timer, but I also know that it does not behave good with very high time periods like one hour, some have suggested using a TLC555 which is a CMOS version, but I am not sure if this is going to work.
What I found on the internet are circuits using 4060 with an astable 555 timer, if you could suggest a way to convert this into a monostable circuit I would really appreciate it, if not please suggest another circuit.
I prefer suggestions with discrete hardware components over the microcontroller suggestions in general, but if it is the most suitable solution, please share with me.
Thank you all in advance.
AI: Use a CD4060 instead by itself - it has a built-in oscillator so you don’t need the 555. Then gate the circuit to get the one-shot behavior you’re looking for.
MORE: To get an accurate time, use two CD4060s.
use a 'watch crystal' with the first one to make a 2Hz signal
use the second one to count down from 8Hz (more on why, below.)
Here's the first part to make the reference:
From this Q: Calculating Rs Value for 32kHz Pierce-Gate Crystal Oscillator Circuit
Now comes the second part. Take the 8Hz output (Q11) and feed it to a second 4060. Then that device has outputs that toggle as follows:
Now, you can decode count = 3600s, that is, one hour, as (2048 + 1024 + 512 + 16) off the second device when we see Q13, Q12, Q11 and Q6 = high.
Now, I explain why I chose 8Hz to the second stage: because I wanted to decode counts 2048, 1024, 512 and 16, and you'll see that Q10 isn't pinned out, so I scaled the counter bits so I didn't need to look at Q10.
This will give a 100's of PPM accuracy due to the watch crystal. I'll leave the rest of the design up to you, but I suggest using flip-flop with async set/reset to control MR and your device:
push button: set flop, Q=1=device on; Qn=0=MR, counter runs
decode count = 3600: reset flop, Q=0=device stops; Qn=0=MR, count stops |
H: How to find the voltage at the circled node
I have this circuit. The voltage source is 4V and the current source is 2A with the 2ohm resistance.
I got the node voltage at the circled node to be +8V from a circuit simulator.
Can someone help me on how to arrive at that +8V on that node intuitively and mathematically please?
AI: There is 2A flowing counter-clockwise in your circuit, due to the constant current source. Starting at the circle there is a 4V voltage drop through the 2 \$\Omega\$ resistor. The more positive side is at the circle. Continuing counter-clockwise, the battery also has 4V across it. Again, the more positive side is the top, and the more negative on the bottom side of the battery. Since both the resistor and battery are more positive in the same direction, their voltages sum. So the circle is 8V higher than the bottom side of the battery. |
H: Amplify difference between two photodiodes
I have two adjacent photodiodes in photovoltaic mode, with two transimpedance amplifiers. Unfortunately, my MCU (nRF52840) is one meter away, and I expect a fair amount of noise to enter the system. For my application, the only relevant data is the difference in luminosity between these photodiodes.
It seems the right solution would be to perform true differential signaling for each photodiode, but I can't do it in my case for very specific reasons.
By routing each signal next to each other, I hope that most of the noise would affect both signals roughly equally. My goal is to reject common-mode noise, interference, and maximize the dynamic range at the MCU location.
I am considering the following solutions:
directly route each signal to the nRF52840 ADC in differential mode
use a differential opamp and use the nRF52840 ADC in single-ended mode
use a fully differential amplifier to drive the nRF52840 ADC in differential mode
The first solution would be simple, but I am not sure to get enough dynamic range. I am not familiar with fully differential amplifiers and I am not sure about their usage with non single ended signals.
What solution would be the most appropriate? Can you think of a better alternative?
AI: For my application, the only relevant data is the difference in
luminosity between these photodiodes.
If both photodiodes are the same, wire them antiparallel to a single TIA. Wiring them antiparallel means that the only current feeding the TIA will be the difference current. Now, the problem of noise is halved. Use a balanced transmission system like this: -
Replace the sensor on the left with a single ended op-amp driver and use balanced cable such as shielded twisted pair. Ground the shield at the receiver end. Clearly you need to use a differential receiver amplifier too. Schematic from here.
The two resistors marked with a blue X represent equal impedance resistors so that a balanced impedance drive to the cable is facilitated and any interference (red lightning symbol) has to affect both inner transmission wires equally. That is what is meant by "balanced" in this context. Of course, with the spare components from the unneeded TIA you can drive the line differentially and increase SNR by another 6 dB. |
H: Why is NMI commonly pulled high on many ARM SoC schematics?
I've noticed that "AP-NMI" is pulled high on several ARM SoC schematics, and it is pulled high by the real-time clock (RTC) voltage, which is an always-on power domain (battery backup). Why is this?
I've also noticed that without NMI being pulled high (no RTC battery), a given SoC (A64) might not wake up from a watchdog-initiated reset. Are they related?
Also, how beneficial is the external NMI permanently being held high?
Here are some example schematics:
NanoPi A64 (ref)
Banana Pi (ref)
A31 PAD (ref)
My best guess is that NMI always being high wakes up the ARISC / AR100 / R_INTC systems, but the actual process escapes me.
AI: The Non-Maskable Interrupt (NMI) being low (=active) means that the CPU takes an exception immediately. If you don't need that functionality, you tie it high so that doesn't happen.
The CPU will likely wake up fine if the NMI is active, but takes an NMI exception while it is still processing the wakeup (which also shows up as an exception), so the NMI handler runs before the wakeup has properly reinitialized the system.
The other interrupts are disabled ("masked") until the wakeup code enables them, but the NMI cannot be masked.
Unless there is a silicon error, you can probably write an NMI function that works, but it would need a lot of extra care, so external hardware that needs the CPU to wake up and handle an NMI immediately needs to sequence that correctly.
That is an unusual use case though, most people use NMIs only for hardware errors that are detected while the CPU is running. |
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