lmms-lab/CSBench_MCQ · Datasets at Hugging Face

ID int64 1 1.96k	Split stringclasses 1 value	Domain stringclasses 4 values	SubDomain stringclasses 24 values	Format stringclasses 1 value	Tag stringclasses 2 values	Language stringclasses 1 value	Question stringlengths 15 717	A stringlengths 1 292	B stringlengths 1 232	C stringlengths 1 217	D stringlengths 1 192	Answer stringclasses 4 values	Explanation stringlengths 21 1.43k ⌀
557	Test	Computer Organization	Overview	Multiple-choice	Knowledge	English	The following statement is incorrect ( ).	The word length of a computer refers to the basic unit length of data operations.	Registers are composed of flip-flops.	The word length in a computer is 32 bits.	Disks can permanently store data and programs.	C	null
558	Test	Computer Organization	Overview	Multiple-choice	Knowledge	English	In computers used for scientific computing, the most useful parameter for indicating system performance is ( ).	Master Clock Frequency	Main memory capacity	MFLOPS	MIPS	C	null
559	Test	Computer Organization	Overview	Multiple-choice	Knowledge	English	If a computer has a word length of 4 bytes, it indicates that the machine ( )	The maximum numerical value that can be processed is a 4-digit decimal number.	The maximum number of digits that can be processed is a 4-bit binary number.	In the CPU, it is capable of processing 32-bit binary code as a whole.	The maximum result of a calculation in the CPU is 2^32.	C	null
560	Test	Computer Organization	Overview	Multiple-choice	Knowledge	English	The smallest unit of time for computer operations is ( ).	Clock cycle	Instruction Cycle	CPU cycle	Interrupt Cycle	A	null
561	Test	Computer Organization	Overview	Multiple-choice	Knowledge	English	In computers, the CPU's CPI is unrelated to the following ( ) factors.	Clock frequency	System Architecture	Instruction Set	Computer Organization	A	null
562	Test	Computer Organization	Overview	Multiple-choice	Knowledge	English	The following statement about "compatibility" is correct ()	It refers to the compatibility between computer software and hardware, which usually exists among different models within the same series of computers.	Refers to the universality of computer software or hardware, meaning they can be used interchangeably among any computers.	Refers to the generality of computer software or hardware, which is commonly interchangeable among different models within the same series.	Software is compatible across different series of computers, whereas hardware is not.	C	null
563	Test	Computer Organization	Overview	Multiple-choice	Reasoning	English	Regarding compilers and interpreters, the following statement is incorrect ( ).	The function of both compilers and interpreters is to convert high-level language programs into machine language programs.	The compilation time of the compiler is long, but the execution speed is fast.	The interpretive programming approach is relatively simple and also executes faster.	The interpreter translates the source program into machine language and executes the statement immediately after translating it.	C	A compiled program is one that is fully compiled before execution, such as C, C++, etc.; an interpreted program is one that translates and executes line by line, such as JavaScript, Python, etc. Since an interpreted program translates into machine language while executing, it is generally slower than a compiled program.
564	Test	Computer Organization	Overview	Multiple-choice	Reasoning	English	The program that translates the source program into machine language only when it is executed, and translates one line of statement at a time while executing, is an () program. The process of converting an assembly language source program into a machine language program is (). Ⅰ. Compilation Ⅱ. Object Ⅲ. Assembly Ⅳ. Interpretation	Ⅰ、Ⅱ	Ⅳ、Ⅱ	Ⅳ、Ⅰ	Ⅳ、Ⅲ	D	The characteristic of an interpreted program is that it translates and executes one statement at a time, performing both actions concurrently; the process of converting a high-level language into assembly language is called compilation, while the process of translating an assembly language source program into a machine language program is referred to as assembly.
565	Test	Computer Organization	Overview	Multiple-choice	Reasoning	English	Among the following statements, the correct one is ( ) Ⅰ. The test results of actual applications can fully represent the performance of a computer Ⅱ. The fundamental characteristic of a series of machines is backward compatibility of the instruction set Ⅲ. Software and hardware are logically equivalent	Ⅱ	Ⅲ	Ⅱ and Ⅲ	Ⅰ、Ⅱ and Ⅲ	C	The actual running condition of software comprehensively represents the performance of a computer. Backward compatibility refers to compatibility with the instruction system of previous machines on newer ones. Software and hardware are logically equivalent; for instance, floating-point operations can be performed either by a dedicated floating-point unit or by writing a subroutine.
566	Test	Computer Organization	Overview	Multiple-choice	Reasoning	English	Regarding CPU clock speed, CPI, MIPS, and MFLOPS, the correct statement is ( ).	The CPU clock speed refers to the frequency at which the CPU system executes instructions, while CPI represents the average frequency used to execute a single instruction.	CPI represents the average number of CPU clock cycles used to execute an instruction, while MIPS describes the average number of CPU instructions executed per CPU clock cycle.	MIPS describes the frequency at which a CPU executes instructions, while MFLOPS measures the floating-point instructions of a computer system.	CPU clock speed refers to the frequency of the clock pulses used by the CPU, while CPI represents the average number of CPU clock cycles required to execute one instruction.	D	CPI is the average number of CPU clock cycles used to execute an instruction, while MIPS describes the average number of CPU instructions executed per CPU clock cycle.
567	Test	Computer Organization	Overview	Multiple-choice	Reasoning	English	Among the following statements about machine word length, instruction word length, and storage word length, the correct one(s) is (are) ( )Ⅰ. The three are always numerically equal Ⅱ. The three may not be numerically equal Ⅲ. Storage word length is the number of binary code bits stored in a storage cell Ⅳ. Data word length is the number of bits in the MDR.	Ⅰ、Ⅲ	Ⅰ、Ⅳ	Ⅱ、Ⅲ	Ⅱ、Ⅳ	C	The machine word length, instruction word length, and storage word length can be numerically equal or unequal. The storage word length is equal to the number of bits in the MDR (Memory Data Register), while the data word length is the number of bits that the data bus can transfer in parallel at one time, which may not be equal to the number of bits in the MDR.
568	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In odd parity, what should the parity bit be if the information bits are 1100101?()	0	1	2	3	B	null
569	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	If the exponent of a floating-point number is represented in excess notation, and the machine word length is 8 bits, what is the maximum positive exponent that can be represented?()	127	128	-127	-128	A	null
570	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In the addition and subtraction of two's complement fixed-point numbers, if the carry from the sign bit is different from the carry from the most significant bit, what does this indicate?()	Only underflow	Overflow	No overflow	Error	B	null
571	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	What is the expression for the carry propagate function Pi in a parallel adder?()	AiBi	Ai+Bi	Ai+Bi+Ci	Ai-Bi	B	null
572	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In Cyclic Redundancy Check (CRC), if the message code is 8 bits and the check code is 4 bits, what is the total length of the code in bits?()	8-bit	12-bit	16-bit	4-bit	B	null
573	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	If an 8-bit binary machine number represents a negative number, what is its most significant bit?()	0	1	2	3	B	null
574	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	What is the representation of the number 5 in modulo 3 code?()	1000	1001	1010	1011	A	null
575	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In data representation, what does Little-endian refer to?()	Store the high-order byte first	Store the lower byte first	Random Access Memory (RAM)	Alternating Byte Storage	B	null
576	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	What is the correct representation of the number 7 in the 2421 code?()	111	1111	1011	1101	D	null
577	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In the Arithmetic Logic Unit (ALU), what is the sum expression for a one-bit full adder?()	Ai + Bi	Ai ⊕ Bi	Ai ⊕ Bi ⊕ Ci-1	AiBi + (Ai XOR Bi)Ci-1	D	null
578	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In data representation, which of the following is correct regarding the representation of the sign bit with offset binary (excess notation)?()	In offset representation, the representation of zero is not unique.	The complement is obtained by inverting the sign bit of the biased representation.	When the offset code is all ones, the corresponding true maximum value.	When the offset code is all zeros, it corresponds to the minimum true value.	B	null
579	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In the IEEE 754 standard, how many bits are used to represent the mantissa part of a normalized long floating-point number?()	11-digit	23-bit	52-bit	64-bit	C	null
580	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	What is the true value representation of a denormalized short floating-point number in the IEEE754 standard?()	(-1)^S × 1.M × 2^(E-127)	(-1)^S × 1.M × 2^(E-1023)	(-1)^S × 0.M × 2^(-126)	(-1)^S × 0.M × 2^(-1022)	C	null
581	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	For cyclic shift, when rotating one bit to the right, where will the original least significant bit be moved to?()	Most significant bit (MSB)	Discard	Sub-high digit	Subleast Significant Bit (SLSB)	A	null
582	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In data representation, what does Big-endian refer to?()	Store the high-order byte first	Store the lower byte first	Random Access Memory (RAM)	Alternating storage of bytes	A	null
583	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In logical shift operations, what is the result of a logical left shift by one bit?()	Shift out high-order bits, fill low-order bits with 1s	Shift out high-order bits, fill in low-order bits with 0s.	Shift right with sign extension (fill with 1s at the high end).	Shift right with zero fill.	B	null
584	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In the operation of the Arithmetic Logic Unit (ALU), what is the correct expression for the carry expression Ci?()	Ai + Bi	Ai ⊕ Bi	Ai ⊕ Bi ⊕ Ci-1	AiBi + (Ai XOR Bi)Ci-1	D	null
585	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	The machine number with a unique representation for the true value 0 is ( ).	Sign-magnitude representation	Two's Complement and Offset Binary Code	Ones' complement	None of the above is correct.	B	null
586	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	For the following 8-bit excess code machine number [x], when calculating [-x], ( ) will cause an overflow.	11111111	00000000	10000000	01111111	B	null
587	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	In the representation of floating-point numbers, the ( ) is implicit and does not appear in the machine number.	Exponent	Symbol	Mantissa	Cardinality	D	null
588	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Knowledge	English	The primary reason for using normalized floating-point numbers is to ( ).	Increase the representation range of data	Facilitate floating-point operations	Prevent data overflow during operations	Increase the precision of data representation.	D	null
589	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	Among the following numbers in different numeral systems, the smallest number is ( ).	(101001)_2	(101001)_{BCD}	(52)_8	(233)_16	B	A is 29H, B is 29D, and C written in binary is 101010, which is 2AH. Clearly, the smallest is 29D. Note that unless otherwise specified, it can be assumed that the BCD code refers to the 8421 code.
590	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The following statement is incorrect ( )	Any binary integer can be represented in decimal form.	Every binary fraction can be represented in decimal form.	Every decimal integer can be represented in binary form.	Every decimal fraction can be represented in binary form.	D	Options A, B, and C are clearly correct, as binary integers and decimal integers can be converted to each other, with the only difference being the positional value of each digit. However, binary fractional digits can only represent 1/2, 1/4, 1/8,..., 1/2^n, thus not all decimal fractions can be represented, making option D incorrect.
591	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	Fixed-point numbers inside computers are mostly represented in two's complement. The following are some characteristics of two's complement:<br>I. Zero has a unique representation<br>II. The sign bit can participate in arithmetic operations along with the numeric part<br>III. The relationship with its true value is simple and intuitive<br>IV. Subtraction can be implemented using addition.<br>Among the above statements, () are characteristics of two's complement representation.	I and II	I and III	I and II and III	I, II, and IV	D	The complement of [0] and the complement of [-0] are the same, so I is correct. When performing addition and subtraction operations with two's complement fixed-point numbers, the sign is included as part of the number in the calculation, so II is correct. [A] complement - [B] complement = [A] complement + [-B] complement, which means subtraction is implemented using addition, so IV is correct. In fact, the correspondence between the two's complement and its true value is not as simple and intuitive as that between the sign-magnitude representation and its true value, so III is incorrect.
592	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In a parallel adder, the formation of each full sum is related not only to the value bits of the two numbers being added at that position but also to what?	Low-order numerical magnitude	Sum of low-order digits	High-order numerical magnitude	The carry from the lower digit	D	In binary addition, the result of the operation at a given position depends on the value of the bits of the two numbers involved in the operation, as well as the carry-in from the lower position.
593	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	What are the key factors that affect the operation speed of a serial carry parallel adder?	Gate circuit level delay	Component speed	Carry propagation delay	The varying speeds of the adders	C	Carry propagation delay is a key factor affecting the results of parallel adder operations, although other factors may also have an impact.
594	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	What is the value of the two's complement fixed-point integer 01010101 after it is shifted left by two positions?	0100 0111	0101 0100	0100 0110	0101 0101	B	When performing a left shift on a two's complement number, the most significant bit is shifted out and a 0 is added to the least significant bits. Therefore, the value of 01010101 after shifting left by two positions is 01010100.
595	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	What is the value after the two's complement fixed-point integer 10010101 is shifted right by one bit?	1100 1010	0100 1010	1001 0101	1100 1010	D	When performing a right shift on a two's complement number, a 1 is added to the most significant bit, while the sign bit on the lower end remains unchanged. Therefore, after shifting the value 10010101 one bit to the right, the result is 11001010.
596	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The value in an 8-bit register is 11001010, and the carry flag register C is 0. If this 8-bit register is rotated left (without the carry bit) by 1 bit, what are the values in the 8-bit register and the flag register, respectively?	10010100 1	10010101 0	10010101 1	10010100 0	C	Rotate left through carry without carrying the most significant bit, which enters the least significant bit, while the Carry flag (C) in the status register remains unchanged.
597	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	Assuming an 8-bit machine number (including 1 sign bit), if the machine number BAH is in true form, what are the results of an arithmetic left shift by 1 bit and an arithmetic right shift by 1 bit, respectively?	F4H, EDH	B4H, 6DH	F4H, 9DH	B5H, EDH	C	The original code is shifted left and right with zeros filled in, and the sign bit remains unchanged. An arithmetic left shift by 1 bit results in F4H, and an arithmetic right shift by 1 bit results in 9DH.
598	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	Assuming an 8-bit machine number (including 1 sign bit), if the machine number BAH is in two's complement, what are the results of an arithmetic left shift by 1 bit and an arithmetic right shift by 1 bit, respectively?	F4H, EDH	B4H, 6DH	F4H, 9DH	B5H, EDH	A	When shifting a two's complement negative number, shift left with 0 padding, and shift right with 1 padding. An arithmetic left shift by 1 bit yields F4H, and an arithmetic right shift by 1 bit yields EDH.
599	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The 16-bit two's complement 0x8FA0 extended to 32 bits should be ( ).	0x0000 8FA0	0XFFFF 8FA0	0xFFFF FFA0	0x8000 8FA0	B	The 16-bit value is extended to 32 bits, with the sign bit remaining unchanged. The additional bits are an extension of the sign bit. Since the number is negative, the additional bits should be filled with 1s.
600	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In a fixed-point arithmetic unit, whether using double sign bits or a single sign bit, there must be ( ).	Decoding circuit, which is generally implemented using "NAND" gates.	Encoding circuit, which is generally implemented using "NOR" gates.	Overflow detection circuit, which is generally implemented using an "XOR" gate.	Shift circuit, which is generally implemented using "AND-OR-NOT" gates.	C	Three overflow detection methods, all of which require an overflow detection circuit, can be implemented using an "XOR" gate.
601	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	True form multiplication is ().	First, multiply the absolute values of the operands, and handle the sign bit separately.	Use the original code to represent the operands, and then multiply directly.	The multiplicand is represented in true form, while the multiplier is taken as its absolute value, and then they are multiplied.	The multiplier is represented in true form, and the multiplicand is taken as its absolute value before multiplication.	A	In one-bit multiplication of true form, the sign bit and the value bits are operated on separately. The value part of the result is the product of the value bits of the multiplier and the multiplicand, while the sign is the XOR of the sign bits of the multiplier and the multiplicand.
602	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	x and y are fixed-point integers, formatted with 1 sign bit and n value bits. If two's complement single-bit multiplication is used to implement the multiplication operation, then at most ( ) addition operations are needed.	n-1	n	n+1	n+2	C	In one-bit multiplication using two's complement, at most n shifts and n+1 additions are required.
603	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In sign-magnitude one-bit multiplication, ( ).	The sign bit is involved in the operation.	The sign bit does not participate in the operation.	The sign bit participates in the operation and changes the sign bit in the result according to the outcome of the operation.	The sign bit does not participate in the operation, and the sign of the result is determined based on the outcome of the operation.	B	In one-bit multiplication with sign-magnitude representation, the sign bit does not participate in the operation. The sign bit is processed separately, with like signs yielding a positive result and unlike signs yielding a negative result.
604	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In true form multiplication, the method of handling the product's sign bit separately is ( ).	The two operands are combined with an "AND" operation.	The two operands are "or" connected.	The two operands undergo an "exclusive or" (XOR) operation.	The sign of the number with the greater absolute value among the two operands.	C	In true form multiplication, the sign bit is processed separately. The sign of the product is the "exclusive or" of the signs of the two operands, with like signs yielding a positive result and unlike signs yielding a negative result.
605	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In the algorithm of non-restoring division using signed-magnitude representation (also known as the signed-magnitude addition and subtraction alternation method), ( )	After each step, if there is not enough to subtract, then the remainder must be restored.	If it is a negative quotient, then restore the remainder.	Throughout the algorithm process, the remainder is never restored.	Only restore the remainder once if the last step is insufficiently subtracted.	D	The original code non-restoring remainder method, also known as the alternate add-subtract method, only requires the restoration of the remainder when the final remainder is negative.
606	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The following statement about two's complement division is correct ( )	In non-restoring division, if subtraction is sufficient, the quotient is 0; if not, the quotient is 1.	In the non-restoring division of two's complement, when dividing numbers with different signs, the quotient is 0 if subtraction is possible, and 1 if not.	In non-restoring division using two's complement, if subtraction is possible, the quotient is 1; if not, the quotient is 0.	None of the above is correct.	B	Two's complement division (non-restoring division method), when dividing numbers with different signs, it is determined whether the subtraction is sufficient, and then the quotient is set; if sufficient, the quotient is 0, if not, the quotient is 1.
607	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The correct statements about various shifts are ( ) I. Assuming that the machine number is represented in one's complement, when the machine number is negative, an error occurs due to the most significant bit being discarded during a left shift; during a right shift, discarding the least significant bit as 0 affects precision. II. In the case of arithmetic shifting, the precondition for left shifting a two's complement number is that the original most significant bit must be the same as the original sign bit. III. In the case of arithmetic shifting, for double sign bit shifting operations, only the lower sign bit needs to participate in the shifting process.	I、III	Only II	Only III	I、II、III	D	I, the one's complement of a negative number has all bits inverted except for the sign bit. It is not difficult to deduce that I is correct. For example, the one's complement representation 10010 stands for -13; shifting it right by 1 bit results in 11001, which is -6, affecting precision. Shifting it left by 1 bit results in 10101, which is -10, leading to data loss. In two's complement representation, the sign bit for positive numbers is 0, and when the leftmost bit shifted out is 0, there is no data loss; the sign bit for negative numbers is 1, and when the leftmost bit shifted out is 1, there is no data loss. Therefore, the most significant bit shifted out must be the same as the sign bit. II. In double sign bit representation, the highest sign bit represents the true sign, while the lower sign bit is used to participate in the shifting operation to determine if overflow occurs, for example, 01 indicates positive overflow, and 10 indicates negative overflow. I, II, and III are all correct.
608	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In a byte-addressable computer, if data is stored in memory using the little-endian scheme. Assuming the address of the int variable i is 08000000H, and the machine number of i is 01234567H, the content of the cell at address 08000000H is ().	01H	23H	45H	67H	D	The little-endian scheme stores the least significant byte at the smallest address. In the number 01234567H, the least significant byte is 67H.
609	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	For a computer with a word length of 8 bits and a CPU containing an 8-bit adder, given the unsigned numbers x = 69 and y = 38, if the calculation x - y is performed in the adder, the information at the two input ends of the adder and the input carry information for the lower bit are ().	0100 0101, 0010 0110, 0	0100 0101, 1101 1001, 1	0100 0101, 1101 1010, 0	0100 0101, 1101 1010, 1	B	Whether it is two's complement subtraction or unsigned number subtraction, it is implemented by adding the minuend to the two's complement of the subtrahend's negative. According to the complement formula, the two's complement of the negative of the subtrahend is [-y]_complement = Y + 1. Therefore, an inverter is used at the Y' input of the adder, and a control terminal Sub controls whether the bits of y are inverted before being input to the Y'' terminal, while Sub is also sent as the low-order carry into the adder. When Sub is 1, subtraction is performed; when Sub is 0, addition is performed. The binary number for 69 is 0100 0101; for subtraction with 38, the low-order carry is Sub, which is 1, and the binary number is 0010 0110, with all bits inverted to 1101 1001.
610	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In a computer with an 8-bit adder, the machine numbers of signed integers X and y are represented in two's complement, with [x]_complement = F5H and [y]_complement = 7EH. If the calculation X - y is performed in this adder, the carry-in information for the lower bit and the overflow flag OF after the operation are respectively ().	1、1	1. 0	0, 1	0, 0	C	For two's complement subtraction, the control signal Sub is set to 1, thus the lower bit carry input is Sub = 1. [x]_complement = 11110101, [y]_complement = 01111110, [-y]_complement = 10000001 + 1, [x]_complement - [-y]_complement = [x]_complement + [-y]_complement = 11110101 + 10000010 = 01110111, discarding the carry-over, both numbers involved in the operation are 1, and the sign bit of the result is 0, therefore the overflow flag OF is set to 1.
611	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In an 8-bit computer, x and y are two signed integers represented in two's complement, with [x]₂'s complement = 44H and [y]₂'s complement = DCH, then the machine code for x/2 + 2y and the corresponding overflow flag OF are ( ).	CAH、0	CAH、1	DAH、0	DAH、1	C	The complement of [x/2+2y] is the complement of [x] right-shifted by 1 plus the complement of [y] left-shifted by 1, which equals 0100 0100 right-shifted by 1 plus 1101 1100 left-shifted by 1, resulting in 0010 0010 + 1011 1000, which equals 1101 1010 or DAH. From the final addition operation, it is clear that a positive number is being added to a negative number, which definitely will not cause an overflow.
612	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In mixed-type arithmetic operations in C language, it is necessary to convert to the same type before performing the calculation. If an expression contains variables and data of int, long, char, and double types, the final result of the expression will be (double), and the conversion rule for these four types of data is ( ).	long，int→char→double→long	long，char→int→long→double	double，char→int→long→double	double，char→int→double→long	C	When performing mixed operations with different types of data, the principle followed is "type promotion," which means converting a lower type to a higher type, with the final result being of double type. The conversion rule for the four types of data is char int long double.
613	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The range and precision of two floating-point numbers of the same length but different formats, assuming the former has a longer exponent and a shorter significand, while the latter has a shorter exponent and a longer significand, with all other specifications being the same, are ( ).	Both can represent numbers within the same range and with the same precision.	The former can represent a larger range of numbers but with lower precision.	The latter can represent a larger range of numbers with higher precision.	The former can represent numbers with a large range and high precision.	B	With the total number of bits in a floating-point number remaining constant, the more bits allocated to the exponent, the fewer bits there are for the significand; this means that the representable range of numbers is larger, but the precision is lower (numbers become more sparse).
614	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The correct statement among the following is ( ).	Only fixed-point arithmetic can cause overflow; floating-point arithmetic does not produce overflow.	Using biased complement for addition and subtraction operations can avoid overflow.	Fixed-point and floating-point operations can both result in overflow.	Adding two positive numbers will definitely result in an overflow.	C	Deformed complement, which uses two binary bits to represent the sign bit of a number, with the rest being the same as the complement, thus cannot avoid overflow, so A is incorrect. Both fixed-point and floating-point operations can cause overflow, but the overflow judgment is different, hence B is incorrect and C is correct. In fixed-point operations, overflow occurs when the result exceeds the representational range of the number; in floating-point operations, overflow does not necessarily occur when the result exceeds the mantissa's representational range, but only when the exponent exceeds its representational range after normalization, so D is incorrect.
615	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In normalized floating-point arithmetic, if a floating-point number is 2^{5}x1.10101, where the mantissa is represented in two's complement, then the number is ().	No need for normalization	Need to shift right to normalize	Normalize by shifting the mantissa one place to the left.	Normalize by shifting the mantissa left by two places.	C	The examination of the normalization of floating-point numbers requires that when the mantissa is represented in two's complement and is in the form of 1.0××, it is considered a normalized number. Therefore, the mantissa should be shifted one bit to the left, and the exponent should be decremented by 1 to achieve normalization.
616	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In a certain floating-point system that uses normalized floating-point representation, the exponent is represented in biased notation (with the most significant bit representing the sign), and the mantissa is represented in true form. The following ( ) representation is not a normalized floating-point number.	11111111,1.1000···00	0011111,1.0111···01	1000001.0.1111···01	0111111,0.1000···10	B	In the sign-magnitude representation, the normalized form for positive numbers is 0.1×····x, while for negative numbers it is 1.1×····x, therefore option B is incorrect.
617	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The correct statement about the order operation is ().	In the order operation of floating-point addition and subtraction, if the order code decreases, the tail is shifted to the left	None of the above is correct.	In the alignment operation of floating-point addition and subtraction, if the exponent increases, the significand is shifted to the right.	In the order operation of floating-point addition and subtraction, if the order code increases, the tail is shifted to the right; If the order code decreases, the tail shifts to the left	C	Exponent alignment is the process of adjusting the smaller exponent to match the larger one, hence there is no situation where the exponent decreases and the significand shifts left, therefore options A and B are incorrect.
618	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In the 64-bit floating-point number format defined by the IEEE 754 standard, with 1 bit for the sign, 11 bits for the exponent, and 52 bits for the mantissa, the smallest normalized negative number it can represent is ( ).	-(2 - 2^{52})x2^{-1023}	-(2- 2-^{-52})x2{+1023}	-1x2^{-1024}	-(1- 2^{-52})x2^{+2047}	B	Long floating-point numbers, with an 11-bit exponent and a 52-bit mantissa, adopt the hidden bit strategy. Therefore, its smallest normalized negative number has the exponent at its maximum value of 2^1023 (1023 = 2^11 - 1 - 1) and the mantissa at its maximum of 2^-2^-2 (note the implicit leading 1, with the sign bit being negative).
619	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	If a certain single-precision floating-point number, a certain true form, a certain two's complement, and a certain offset binary all have a 32-bit machine representation of 0xF0000000, the order of these numbers from largest to smallest is ( ).	Floating point, true form, Complement Code, Offset binary	Floating-point,Offset binary,Complement Code, true form	Offset binary, true form, Complement Code, Floating point	Offset binary, Complement Code, true form, Floating-point	D	The highest bit of this machine number is 1, which indicates a negative number for sign-magnitude, two's complement, and single-precision floating-point representation, but a positive number for offset binary representation. Therefore, the offset binary has the largest value, while the two's complement is -2^28, the sign-magnitude is -(2^30+2^29+2^28), and the single-precision floating-point number is -1.0x2^97, with the values decreasing in that order.
620	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	In floating-point arithmetic, underflow refers to ( ).	The absolute value of the calculation result is less than the smallest absolute value that can be represented by the machine.	The result of the operation is less than the smallest negative number representable by the machine.	The result of the operation is less than the smallest number that can be represented by the machine.	Error generated by the least significant bit of the calculation result	A	When the result of a calculation falls between 0 and the smallest normalized positive number, it is called positive underflow. When the result is between 0 and the largest normalized negative number, it is called negative underflow. Positive underflow and negative underflow are collectively referred to as underflow.
621	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	Assuming a floating-point number has a total of 12 bits, with 1 bit for the sign of the exponent and 3 bits for the exponent itself, represented in base 2 using two's complement; and the mantissa includes 1 bit for the sign and 7 bits for the value, also in two's complement, normalized. Then the largest positive number that can be represented by this floating-point number is ( ).	2^7	2^8	2^8 - 1	2^7-1	D	To maximize a positive floating-point number, the mantissa should be the largest positive number, and the exponent should be the largest positive number. The mantissa is an 8-bit two's complement (including the sign bit), with the largest positive value being 0.1111111, which is 1 - 2^{-7}. The exponent is a 4-bit two's complement (including the sign bit), with the largest positive value being 0111, which is 7. Therefore, the largest positive number is (1-2^{-7})x2^7 = 2^7-1.
622	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	Before performing addition or subtraction on floating-point numbers, computers first carry out an alignment of exponents. If the exponent of x is greater than that of y, then ().	The exponent of x is reduced to match the exponent of y, and the mantissa of x is subjected to an arithmetic left shift.	The exponent of x is reduced to match the exponent of y, and the mantissa part of x is subjected to an arithmetic right shift.	The exponent of y is expanded to match that of x, and the mantissa of y is subjected to an arithmetic left shift.	The exponent of y is expanded to match the exponent of X, and the mantissa of y is subjected to an arithmetic right shift.	D	When performing addition and subtraction operations on floating-point numbers, it is first necessary to align the exponents. According to the rules of exponent alignment, the exponent and mantissa will undergo corresponding operations. The rule of exponent alignment is to align the smaller exponent to the larger one. That is, the mantissa of the number with the smaller exponent is arithmetically right-shifted, and with each right shift, the exponent is incremented by 1 until the exponents of both numbers are equal.
623	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	If the mantissa of a floating-point number is represented in two's complement, then the mantissa in the following ( ) is in normalized form.	1.11	0.0111	0.0101	1.00010	D	The normalized representation of two's complement has the first digit after the decimal point different from the sign bit, therefore the choice is D.
624	Test	Computer Organization	Data Representation and Operation	Multiple-choice	Reasoning	English	The correct statement(s) about rounding is (are) ( ). I. Not only floating-point numbers require rounding, fixed-point numbers may also need to be rounded during operations II. In floating-point number rounding, rounding is only possible during left normalization III. In floating-point number rounding, rounding is only possible during right normalization IV. In floating-point number rounding, both left and right normalization may require rounding. V. Rounding does not necessarily result in error.	I, II, V	II, III	I, III, IV	V	D	Rounding is a concept associated with floating-point numbers; fixed-point numbers do not have the concept of rounding, so I is incorrect. There are two situations in which floating-point numbers are rounded: exponent alignment and right normalization, so II, III, and IV are incorrect. Rounding does not necessarily result in an error; for example, rounding down from 11.00 to 11.0 does introduce an error, so V is correct.
625	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	How is the storage capacity of a memory calculated?()	Storage capacity = Number of storage words × Word length	Storage Capacity = Storage Cycle × Data Width	Storage capacity = Number of storage words / Storage cycle	Storage capacity = Access time × Storage cycle	A	null
626	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	The characteristics of Dynamic Random Access Memory (DRAM) do not include:()	Utilize the charge on the gate capacitor in the memory cell circuit to store information.	Regular refresh is required.	Use a bistable flip-flop to store information.	Generally used to compose large-capacity main memory systems.	C	null
627	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What are the characteristics of Erasable Programmable Read-Only Memory (EPROM)?()	Once written, the content cannot be changed.	The content can be rewritten multiple times after being written.	Used only for temporary storage, the contents disappear after the power is turned off.	Unable to perform electronic erasure and rewriting	B	null
628	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	Which of the following is not a method of connecting main memory and the CPU?()	Data Bus	Address Bus	Control Bus	Power cord	D	null
629	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	Dual-port RAM allows two independent controllers to access the memory cells simultaneously and asynchronously, but issues can arise when:()	Two ports write data to the same address unit simultaneously.	Concurrent data access to the same address unit by two ports is not allowed.	Both ports simultaneously read data from the same address unit.	Perform read and write operations on two ports for different address units.	A	null
630	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What are the characteristics of low-order interleaving in multi-bank memory systems?()	The high-order address represents the block number, while the low-order address is the intra-block address.	The lower address bits represent the bank number, while the higher address bits represent the intra-bank address.	All physical numbers and internal addresses are arranged in sequence.	Each module can only be accessed sequentially.	B	null
631	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	Which of the following is not a mapping method for the high-speed cache memory (Cache)?()	Direct Mapping	Fully associative mapping	Group associative mapping	Sequential mapping	D	null
632	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	In the write policies of high-speed cache memory, what does "write-no-allocate" refer to in the case of a write miss?()	Write-only to main memory, no block loading.	Load the block from main memory into the Cache, then update this Cache block.	Data must be written to both the Cache and main memory simultaneously.	Only modify the contents of the Cache without immediately writing back to the main memory.	A	null
633	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is the relationship between cache hit rate and average access time?()	The higher the cache hit rate, the longer the average access time.	Cache hit rate is independent of average access time.	The lower the cache hit rate, the shorter the average access time.	The higher the cache hit rate, the shorter the average access time.	D	null
634	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is the primary use of Static Random Access Memory (SRAM)?()	Composing Large Capacity Main Memory Systems	As a high-speed cache memory	For external storage devices	As read-only memory	B	null
635	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What are the main components of a Solid State Drive (SSD)?()	Disk and Magnetic Head	Control unit and storage unit (Flash chip)	Optical disc and laser head	Magnetic tape and read-write head	B	null
636	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is the definition of the main memory bandwidth Bm?()	The maximum amount of information that can be transferred in and out of the main memory per second	Data transfer rate of cyclic memory during the storage period	Data transfer rate of memory during access cycle	The communication rate between main memory and CPU	A	null
637	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What does the memory access cycle Tm refer to?()	The minimum time interval required between two consecutive storage operations	The time it takes from initiating a storage operation to its completion.	The total time required for a complete read-write operation	The time required for data to be transferred from memory to the CPU	A	null
638	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	Which of the following is not a classification method for memory?()	Classified by Access Method	Classified by Storage Medium	Categorized by operating system compatibility	Classified by function (hierarchy) in a computer	C	null
639	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is the role of decode drivers in semiconductor random access memory (RAM)?()	Determine which storage chip is selected.	Determine the address line for unidirectional input.	Control the read and write operations of data	Convert the input address to a memory address.	D	null
640	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is the function of the control bus in the connection between the main memory and the CPU?()	Transmitting data	Definition of the maximum addressable memory space	Indicate the type of bus cycle and the moment when this input/output operation is completed.	Provide power supply.	C	null
641	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	In a paged virtual memory system, what are the two components that make up a virtual address?()	Virtual page number and offset within page	Segment number and offset within segment	Body number and intra-body address	Block number and block internal address	A	null
642	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is the main function of auxiliary storage in a storage system?()	Increase data processing speed	Expand the main memory capacity	Temporary data storage	Addressing the mismatch between main memory and CPU speeds.	B	null
643	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What are the characteristics of Flash Memory?()	Regular refresh is required.	Cannot retain information without power.	Capable of long-term information storage and allows for rapid erasure and rewriting.	Write-once, non-erasable content	C	null
644	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is an example of non-volatile memory?()	Dynamic RAM	Static RAM	Optical memory	Magnetic core memory	C	null
645	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What are the main types of magnetic surface storage?()	Static RAM and Dynamic RAM	Disk and Tape	Optical Disc and Solid State Drive	Read-Only Memory and Random Access Memory	B	null
646	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What are the characteristics of bit extension method in the capacity expansion technology of main memory?()	Increase the number of storage units	Increase the storage bit size of each memory cell.	Increase both the number of storage units and the number of storage bits.	Reduce the access speed of the storage unit	B	null
647	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What are the characteristics of high-order interleaved addressing in multi-bank memory systems?()	The lower address bits represent the block number, while the higher address bits represent the intra-block address.	The high-order address represents the block number, while the low-order address is the intra-block address.	All addresses are arranged in order.	All physical memory addresses are identical.	B	null
648	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is the primary function of the TLB (Translation Lookaside Buffer) in a virtual memory system?()	Storing long-term data	Improve the speed of address translation	Expand physical storage capacity	Caching the mapping from virtual addresses to physical addresses	B	null
649	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	What is the main disadvantage of segmented virtual memory?()	Fixed page size leads to memory waste.	The length of the segment is variable, making it inconvenient to allocate space.	The address translation process requires table lookup.	Inconvenient for compilation, management, modification, and protection.	B	null
650	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	Disk belongs to the () type of storage.	Random Access Memory (RAM)	Read-Only Memory (ROM)	Sequential Access Memory (SAM)	Direct Access Memory (DAM)	D	null
651	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	Associative memory is a type of storage that is addressed by ().	Direct Addressing Mode	Stack storage method	Combined content addressing and stack storage method	Combined content addressing and address addressing	D	null
652	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	Among the following types of memory, the one that the CPU cannot directly access is ( )	Hard Disk Drive (HDD)	Memory	Cache	Register	A	null
653	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	Assuming a machine word size of 64 bits and a storage capacity of 128MB, the number of addressable units it can access when using word addressing is ( ).	16MB	16M	32M	32MB	B	null
654	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	The hierarchical approach to computer memory is adopted in order to ( ).	Convenient for programming	Resolve the contradiction among capacity, speed, and price.	Storing large amounts of data is convenient.	Convenient to operate	B	null
655	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	If a memory has a capacity of 32Kx16 bits, then ( ).	The address bus has 16 lines, and the data bus has 32 lines.	The address bus has 32 lines, and the data bus has 16 lines.	The address bus has 15 lines, and the data bus has 16 lines.	The address bus has 15 lines, and the data bus also has 32 lines.	C	null
656	Test	Computer Organization	Storage System	Multiple-choice	Knowledge	English	If each storage unit in RAM is 16 bits, then the correct description below is ( )	The address line is 16-bit.	The data line is 16-bit.	The instruction length is 16 bits.	None of the above statements are correct.	B	null

557

Test

Computer Organization

Overview

Multiple-choice

Knowledge

English

The following statement is incorrect ( ).

The word length of a computer refers to the basic unit length of data operations.

Registers are composed of flip-flops.

The word length in a computer is 32 bits.

Disks can permanently store data and programs.

C

null

558

Test

Computer Organization

Overview

Multiple-choice

Knowledge

English

In computers used for scientific computing, the most useful parameter for indicating system performance is ( ).

Master Clock Frequency

Main memory capacity

MFLOPS

MIPS

C

null

559

Test

Computer Organization

Overview

Multiple-choice

Knowledge

English

If a computer has a word length of 4 bytes, it indicates that the machine ( )

The maximum numerical value that can be processed is a 4-digit decimal number.

The maximum number of digits that can be processed is a 4-bit binary number.

In the CPU, it is capable of processing 32-bit binary code as a whole.

The maximum result of a calculation in the CPU is 2^32.

C

null

560

Test

Computer Organization

Overview

Multiple-choice

Knowledge

English

The smallest unit of time for computer operations is ( ).

Clock cycle

Instruction Cycle

CPU cycle

Interrupt Cycle

A

null

561

Test

Computer Organization

Overview

Multiple-choice

Knowledge

English

In computers, the CPU's CPI is unrelated to the following ( ) factors.

Clock frequency

System Architecture

Instruction Set

Computer Organization

A

null

562

Test

Computer Organization

Overview

Multiple-choice

Knowledge

English

The following statement about "compatibility" is correct ()

It refers to the compatibility between computer software and hardware, which usually exists among different models within the same series of computers.

Refers to the universality of computer software or hardware, meaning they can be used interchangeably among any computers.

Refers to the generality of computer software or hardware, which is commonly interchangeable among different models within the same series.

Software is compatible across different series of computers, whereas hardware is not.

C

null

563

Test

Computer Organization

Overview

Multiple-choice

Reasoning

English

Regarding compilers and interpreters, the following statement is incorrect ( ).

The function of both compilers and interpreters is to convert high-level language programs into machine language programs.

The compilation time of the compiler is long, but the execution speed is fast.

The interpretive programming approach is relatively simple and also executes faster.

The interpreter translates the source program into machine language and executes the statement immediately after translating it.

C

A compiled program is one that is fully compiled before execution, such as C, C++, etc.; an interpreted program is one that translates and executes line by line, such as JavaScript, Python, etc. Since an interpreted program translates into machine language while executing, it is generally slower than a compiled program.

564

Test

Computer Organization

Overview

Multiple-choice

Reasoning

English

The program that translates the source program into machine language only when it is executed, and translates one line of statement at a time while executing, is an () program. The process of converting an assembly language source program into a machine language program is (). Ⅰ. Compilation Ⅱ. Object Ⅲ. Assembly Ⅳ. Interpretation

Ⅰ、Ⅱ

Ⅳ、Ⅱ

Ⅳ、Ⅰ

Ⅳ、Ⅲ

D

The characteristic of an interpreted program is that it translates and executes one statement at a time, performing both actions concurrently; the process of converting a high-level language into assembly language is called compilation, while the process of translating an assembly language source program into a machine language program is referred to as assembly.

565

Test

Computer Organization

Overview

Multiple-choice

Reasoning

English

Among the following statements, the correct one is ( ) Ⅰ. The test results of actual applications can fully represent the performance of a computer Ⅱ. The fundamental characteristic of a series of machines is backward compatibility of the instruction set Ⅲ. Software and hardware are logically equivalent

Ⅱ

Ⅲ

Ⅱ and Ⅲ

Ⅰ、Ⅱ and Ⅲ

C

The actual running condition of software comprehensively represents the performance of a computer. Backward compatibility refers to compatibility with the instruction system of previous machines on newer ones. Software and hardware are logically equivalent; for instance, floating-point operations can be performed either by a dedicated floating-point unit or by writing a subroutine.

566

Test

Computer Organization

Overview

Multiple-choice

Reasoning

English

Regarding CPU clock speed, CPI, MIPS, and MFLOPS, the correct statement is ( ).

The CPU clock speed refers to the frequency at which the CPU system executes instructions, while CPI represents the average frequency used to execute a single instruction.

CPI represents the average number of CPU clock cycles used to execute an instruction, while MIPS describes the average number of CPU instructions executed per CPU clock cycle.

MIPS describes the frequency at which a CPU executes instructions, while MFLOPS measures the floating-point instructions of a computer system.

CPU clock speed refers to the frequency of the clock pulses used by the CPU, while CPI represents the average number of CPU clock cycles required to execute one instruction.

D

CPI is the average number of CPU clock cycles used to execute an instruction, while MIPS describes the average number of CPU instructions executed per CPU clock cycle.

567

Test

Computer Organization

Overview

Multiple-choice

Reasoning

English

Among the following statements about machine word length, instruction word length, and storage word length, the correct one(s) is (are) ( )Ⅰ. The three are always numerically equal Ⅱ. The three may not be numerically equal Ⅲ. Storage word length is the number of binary code bits stored in a storage cell Ⅳ. Data word length is the number of bits in the MDR.

Ⅰ、Ⅲ

Ⅰ、Ⅳ

Ⅱ、Ⅲ

Ⅱ、Ⅳ

C

The machine word length, instruction word length, and storage word length can be numerically equal or unequal. The storage word length is equal to the number of bits in the MDR (Memory Data Register), while the data word length is the number of bits that the data bus can transfer in parallel at one time, which may not be equal to the number of bits in the MDR.

568

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In odd parity, what should the parity bit be if the information bits are 1100101?()

0

1

2

3

B

null

569

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

If the exponent of a floating-point number is represented in excess notation, and the machine word length is 8 bits, what is the maximum positive exponent that can be represented?()

127

128

-127

-128

A

null

570

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In the addition and subtraction of two's complement fixed-point numbers, if the carry from the sign bit is different from the carry from the most significant bit, what does this indicate?()

Only underflow

Overflow

No overflow

Error

B

null

571

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

What is the expression for the carry propagate function Pi in a parallel adder?()

AiBi

Ai+Bi

Ai+Bi+Ci

Ai-Bi

B

null

572

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In Cyclic Redundancy Check (CRC), if the message code is 8 bits and the check code is 4 bits, what is the total length of the code in bits?()

8-bit

12-bit

16-bit

4-bit

B

null

573

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

If an 8-bit binary machine number represents a negative number, what is its most significant bit?()

0

1

2

3

B

null

574

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

What is the representation of the number 5 in modulo 3 code?()

1000

1001

1010

1011

A

null

575

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In data representation, what does Little-endian refer to?()

Store the high-order byte first

Store the lower byte first

Random Access Memory (RAM)

Alternating Byte Storage

B

null

576

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

What is the correct representation of the number 7 in the 2421 code?()

111

1111

1011

1101

D

null

577

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In the Arithmetic Logic Unit (ALU), what is the sum expression for a one-bit full adder?()

Ai + Bi

Ai ⊕ Bi

Ai ⊕ Bi ⊕ Ci-1

AiBi + (Ai XOR Bi)Ci-1

D

null

578

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In data representation, which of the following is correct regarding the representation of the sign bit with offset binary (excess notation)?()

In offset representation, the representation of zero is not unique.

The complement is obtained by inverting the sign bit of the biased representation.

When the offset code is all ones, the corresponding true maximum value.

When the offset code is all zeros, it corresponds to the minimum true value.

B

null

579

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In the IEEE 754 standard, how many bits are used to represent the mantissa part of a normalized long floating-point number?()

11-digit

23-bit

52-bit

64-bit

C

null

580

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

What is the true value representation of a denormalized short floating-point number in the IEEE754 standard?()

(-1)^S × 1.M × 2^(E-127)

(-1)^S × 1.M × 2^(E-1023)

(-1)^S × 0.M × 2^(-126)

(-1)^S × 0.M × 2^(-1022)

C

null

581

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

For cyclic shift, when rotating one bit to the right, where will the original least significant bit be moved to?()

Most significant bit (MSB)

Discard

Sub-high digit

Subleast Significant Bit (SLSB)

A

null

582

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In data representation, what does Big-endian refer to?()

Store the high-order byte first

Store the lower byte first

Random Access Memory (RAM)

Alternating storage of bytes

A

null

583

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In logical shift operations, what is the result of a logical left shift by one bit?()

Shift out high-order bits, fill low-order bits with 1s

Shift out high-order bits, fill in low-order bits with 0s.

Shift right with sign extension (fill with 1s at the high end).

Shift right with zero fill.

B

null

584

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In the operation of the Arithmetic Logic Unit (ALU), what is the correct expression for the carry expression Ci?()

Ai + Bi

Ai ⊕ Bi

Ai ⊕ Bi ⊕ Ci-1

AiBi + (Ai XOR Bi)Ci-1

D

null

585

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

The machine number with a unique representation for the true value 0 is ( ).

Sign-magnitude representation

Two's Complement and Offset Binary Code

Ones' complement

None of the above is correct.

B

null

586

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

For the following 8-bit excess code machine number [x], when calculating [-x], ( ) will cause an overflow.

11111111

00000000

10000000

01111111

B

null

587

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

In the representation of floating-point numbers, the ( ) is implicit and does not appear in the machine number.

Exponent

Symbol

Mantissa

Cardinality

D

null

588

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Knowledge

English

The primary reason for using normalized floating-point numbers is to ( ).

Increase the representation range of data

Facilitate floating-point operations

Prevent data overflow during operations

Increase the precision of data representation.

D

null

589

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

Among the following numbers in different numeral systems, the smallest number is ( ).

(101001)_2

(101001)_{BCD}

(52)_8

(233)_16

B

A is 29H, B is 29D, and C written in binary is 101010, which is 2AH. Clearly, the smallest is 29D. Note that unless otherwise specified, it can be assumed that the BCD code refers to the 8421 code.

590

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The following statement is incorrect ( )

Any binary integer can be represented in decimal form.

Every binary fraction can be represented in decimal form.

Every decimal integer can be represented in binary form.

Every decimal fraction can be represented in binary form.

D

Options A, B, and C are clearly correct, as binary integers and decimal integers can be converted to each other, with the only difference being the positional value of each digit. However, binary fractional digits can only represent 1/2, 1/4, 1/8,..., 1/2^n, thus not all decimal fractions can be represented, making option D incorrect.

591

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

Fixed-point numbers inside computers are mostly represented in two's complement. The following are some characteristics of two's complement: I. Zero has a unique representation II. The sign bit can participate in arithmetic operations along with the numeric part III. The relationship with its true value is simple and intuitive IV. Subtraction can be implemented using addition. Among the above statements, () are characteristics of two's complement representation.

I and II

I and III

I and II and III

I, II, and IV

D

The complement of [0] and the complement of [-0] are the same, so I is correct. When performing addition and subtraction operations with two's complement fixed-point numbers, the sign is included as part of the number in the calculation, so II is correct. [A] complement - [B] complement = [A] complement + [-B] complement, which means subtraction is implemented using addition, so IV is correct. In fact, the correspondence between the two's complement and its true value is not as simple and intuitive as that between the sign-magnitude representation and its true value, so III is incorrect.

592

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In a parallel adder, the formation of each full sum is related not only to the value bits of the two numbers being added at that position but also to what?

Low-order numerical magnitude

Sum of low-order digits

High-order numerical magnitude

The carry from the lower digit

D

In binary addition, the result of the operation at a given position depends on the value of the bits of the two numbers involved in the operation, as well as the carry-in from the lower position.

593

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

What are the key factors that affect the operation speed of a serial carry parallel adder?

Gate circuit level delay

Component speed

Carry propagation delay

The varying speeds of the adders

C

Carry propagation delay is a key factor affecting the results of parallel adder operations, although other factors may also have an impact.

594

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

What is the value of the two's complement fixed-point integer 01010101 after it is shifted left by two positions?

0100 0111

0101 0100

0100 0110

0101 0101

B

When performing a left shift on a two's complement number, the most significant bit is shifted out and a 0 is added to the least significant bits. Therefore, the value of 01010101 after shifting left by two positions is 01010100.

595

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

What is the value after the two's complement fixed-point integer 10010101 is shifted right by one bit?

1100 1010

0100 1010

1001 0101

1100 1010

D

When performing a right shift on a two's complement number, a 1 is added to the most significant bit, while the sign bit on the lower end remains unchanged. Therefore, after shifting the value 10010101 one bit to the right, the result is 11001010.

596

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The value in an 8-bit register is 11001010, and the carry flag register C is 0. If this 8-bit register is rotated left (without the carry bit) by 1 bit, what are the values in the 8-bit register and the flag register, respectively?

10010100 1

10010101 0

10010101 1

10010100 0

C

Rotate left through carry without carrying the most significant bit, which enters the least significant bit, while the Carry flag (C) in the status register remains unchanged.

597

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

Assuming an 8-bit machine number (including 1 sign bit), if the machine number BAH is in true form, what are the results of an arithmetic left shift by 1 bit and an arithmetic right shift by 1 bit, respectively?

F4H, EDH

B4H, 6DH

F4H, 9DH

B5H, EDH

C

The original code is shifted left and right with zeros filled in, and the sign bit remains unchanged. An arithmetic left shift by 1 bit results in F4H, and an arithmetic right shift by 1 bit results in 9DH.

598

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

Assuming an 8-bit machine number (including 1 sign bit), if the machine number BAH is in two's complement, what are the results of an arithmetic left shift by 1 bit and an arithmetic right shift by 1 bit, respectively?

F4H, EDH

B4H, 6DH

F4H, 9DH

B5H, EDH

A

When shifting a two's complement negative number, shift left with 0 padding, and shift right with 1 padding. An arithmetic left shift by 1 bit yields F4H, and an arithmetic right shift by 1 bit yields EDH.

599

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The 16-bit two's complement 0x8FA0 extended to 32 bits should be ( ).

0x0000 8FA0

0XFFFF 8FA0

0xFFFF FFA0

0x8000 8FA0

B

The 16-bit value is extended to 32 bits, with the sign bit remaining unchanged. The additional bits are an extension of the sign bit. Since the number is negative, the additional bits should be filled with 1s.

600

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In a fixed-point arithmetic unit, whether using double sign bits or a single sign bit, there must be ( ).

Decoding circuit, which is generally implemented using "NAND" gates.

Encoding circuit, which is generally implemented using "NOR" gates.

Overflow detection circuit, which is generally implemented using an "XOR" gate.

Shift circuit, which is generally implemented using "AND-OR-NOT" gates.

C

Three overflow detection methods, all of which require an overflow detection circuit, can be implemented using an "XOR" gate.

601

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

True form multiplication is ().

First, multiply the absolute values of the operands, and handle the sign bit separately.

Use the original code to represent the operands, and then multiply directly.

The multiplicand is represented in true form, while the multiplier is taken as its absolute value, and then they are multiplied.

The multiplier is represented in true form, and the multiplicand is taken as its absolute value before multiplication.

A

In one-bit multiplication of true form, the sign bit and the value bits are operated on separately. The value part of the result is the product of the value bits of the multiplier and the multiplicand, while the sign is the XOR of the sign bits of the multiplier and the multiplicand.

602

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

x and y are fixed-point integers, formatted with 1 sign bit and n value bits. If two's complement single-bit multiplication is used to implement the multiplication operation, then at most ( ) addition operations are needed.

n-1

n

n+1

n+2

C

In one-bit multiplication using two's complement, at most n shifts and n+1 additions are required.

603

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In sign-magnitude one-bit multiplication, ( ).

The sign bit is involved in the operation.

The sign bit does not participate in the operation.

The sign bit participates in the operation and changes the sign bit in the result according to the outcome of the operation.

The sign bit does not participate in the operation, and the sign of the result is determined based on the outcome of the operation.

B

In one-bit multiplication with sign-magnitude representation, the sign bit does not participate in the operation. The sign bit is processed separately, with like signs yielding a positive result and unlike signs yielding a negative result.

604

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In true form multiplication, the method of handling the product's sign bit separately is ( ).

The two operands are combined with an "AND" operation.

The two operands are "or" connected.

The two operands undergo an "exclusive or" (XOR) operation.

The sign of the number with the greater absolute value among the two operands.

C

In true form multiplication, the sign bit is processed separately. The sign of the product is the "exclusive or" of the signs of the two operands, with like signs yielding a positive result and unlike signs yielding a negative result.

605

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In the algorithm of non-restoring division using signed-magnitude representation (also known as the signed-magnitude addition and subtraction alternation method), ( )

After each step, if there is not enough to subtract, then the remainder must be restored.

If it is a negative quotient, then restore the remainder.

Throughout the algorithm process, the remainder is never restored.

Only restore the remainder once if the last step is insufficiently subtracted.

D

The original code non-restoring remainder method, also known as the alternate add-subtract method, only requires the restoration of the remainder when the final remainder is negative.

606

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The following statement about two's complement division is correct ( )

In non-restoring division, if subtraction is sufficient, the quotient is 0; if not, the quotient is 1.

In the non-restoring division of two's complement, when dividing numbers with different signs, the quotient is 0 if subtraction is possible, and 1 if not.

In non-restoring division using two's complement, if subtraction is possible, the quotient is 1; if not, the quotient is 0.

None of the above is correct.

B

Two's complement division (non-restoring division method), when dividing numbers with different signs, it is determined whether the subtraction is sufficient, and then the quotient is set; if sufficient, the quotient is 0, if not, the quotient is 1.

607

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The correct statements about various shifts are ( ) I. Assuming that the machine number is represented in one's complement, when the machine number is negative, an error occurs due to the most significant bit being discarded during a left shift; during a right shift, discarding the least significant bit as 0 affects precision. II. In the case of arithmetic shifting, the precondition for left shifting a two's complement number is that the original most significant bit must be the same as the original sign bit. III. In the case of arithmetic shifting, for double sign bit shifting operations, only the lower sign bit needs to participate in the shifting process.

I、III

Only II

Only III

I、II、III

D

I, the one's complement of a negative number has all bits inverted except for the sign bit. It is not difficult to deduce that I is correct. For example, the one's complement representation 10010 stands for -13; shifting it right by 1 bit results in 11001, which is -6, affecting precision. Shifting it left by 1 bit results in 10101, which is -10, leading to data loss. In two's complement representation, the sign bit for positive numbers is 0, and when the leftmost bit shifted out is 0, there is no data loss; the sign bit for negative numbers is 1, and when the leftmost bit shifted out is 1, there is no data loss. Therefore, the most significant bit shifted out must be the same as the sign bit. II. In double sign bit representation, the highest sign bit represents the true sign, while the lower sign bit is used to participate in the shifting operation to determine if overflow occurs, for example, 01 indicates positive overflow, and 10 indicates negative overflow. I, II, and III are all correct.

608

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In a byte-addressable computer, if data is stored in memory using the little-endian scheme. Assuming the address of the int variable i is 08000000H, and the machine number of i is 01234567H, the content of the cell at address 08000000H is ().

01H

23H

45H

67H

D

The little-endian scheme stores the least significant byte at the smallest address. In the number 01234567H, the least significant byte is 67H.

609

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

For a computer with a word length of 8 bits and a CPU containing an 8-bit adder, given the unsigned numbers x = 69 and y = 38, if the calculation x - y is performed in the adder, the information at the two input ends of the adder and the input carry information for the lower bit are ().

0100 0101, 0010 0110, 0

0100 0101, 1101 1001, 1

0100 0101, 1101 1010, 0

0100 0101, 1101 1010, 1

B

Whether it is two's complement subtraction or unsigned number subtraction, it is implemented by adding the minuend to the two's complement of the subtrahend's negative. According to the complement formula, the two's complement of the negative of the subtrahend is [-y]_complement = Y + 1. Therefore, an inverter is used at the Y' input of the adder, and a control terminal Sub controls whether the bits of y are inverted before being input to the Y'' terminal, while Sub is also sent as the low-order carry into the adder. When Sub is 1, subtraction is performed; when Sub is 0, addition is performed. The binary number for 69 is 0100 0101; for subtraction with 38, the low-order carry is Sub, which is 1, and the binary number is 0010 0110, with all bits inverted to 1101 1001.

610

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In a computer with an 8-bit adder, the machine numbers of signed integers X and y are represented in two's complement, with [x]_complement = F5H and [y]_complement = 7EH. If the calculation X - y is performed in this adder, the carry-in information for the lower bit and the overflow flag OF after the operation are respectively ().

1、1

1. 0

0, 1

0, 0

C

For two's complement subtraction, the control signal Sub is set to 1, thus the lower bit carry input is Sub = 1. [x]_complement = 11110101, [y]_complement = 01111110, [-y]_complement = 10000001 + 1, [x]_complement - [-y]_complement = [x]_complement + [-y]_complement = 11110101 + 10000010 = 01110111, discarding the carry-over, both numbers involved in the operation are 1, and the sign bit of the result is 0, therefore the overflow flag OF is set to 1.

611

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In an 8-bit computer, x and y are two signed integers represented in two's complement, with [x]₂'s complement = 44H and [y]₂'s complement = DCH, then the machine code for x/2 + 2y and the corresponding overflow flag OF are ( ).

CAH、0

CAH、1

DAH、0

DAH、1

C

The complement of [x/2+2y] is the complement of [x] right-shifted by 1 plus the complement of [y] left-shifted by 1, which equals 0100 0100 right-shifted by 1 plus 1101 1100 left-shifted by 1, resulting in 0010 0010 + 1011 1000, which equals 1101 1010 or DAH. From the final addition operation, it is clear that a positive number is being added to a negative number, which definitely will not cause an overflow.

612

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In mixed-type arithmetic operations in C language, it is necessary to convert to the same type before performing the calculation. If an expression contains variables and data of int, long, char, and double types, the final result of the expression will be (double), and the conversion rule for these four types of data is ( ).

long，int→char→double→long

long，char→int→long→double

double，char→int→long→double

double，char→int→double→long

C

When performing mixed operations with different types of data, the principle followed is "type promotion," which means converting a lower type to a higher type, with the final result being of double type. The conversion rule for the four types of data is char int long double.

613

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The range and precision of two floating-point numbers of the same length but different formats, assuming the former has a longer exponent and a shorter significand, while the latter has a shorter exponent and a longer significand, with all other specifications being the same, are ( ).

Both can represent numbers within the same range and with the same precision.

The former can represent a larger range of numbers but with lower precision.

The latter can represent a larger range of numbers with higher precision.

The former can represent numbers with a large range and high precision.

B

With the total number of bits in a floating-point number remaining constant, the more bits allocated to the exponent, the fewer bits there are for the significand; this means that the representable range of numbers is larger, but the precision is lower (numbers become more sparse).

614

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The correct statement among the following is ( ).

Only fixed-point arithmetic can cause overflow; floating-point arithmetic does not produce overflow.

Using biased complement for addition and subtraction operations can avoid overflow.

Fixed-point and floating-point operations can both result in overflow.

Adding two positive numbers will definitely result in an overflow.

C

Deformed complement, which uses two binary bits to represent the sign bit of a number, with the rest being the same as the complement, thus cannot avoid overflow, so A is incorrect. Both fixed-point and floating-point operations can cause overflow, but the overflow judgment is different, hence B is incorrect and C is correct. In fixed-point operations, overflow occurs when the result exceeds the representational range of the number; in floating-point operations, overflow does not necessarily occur when the result exceeds the mantissa's representational range, but only when the exponent exceeds its representational range after normalization, so D is incorrect.

615

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In normalized floating-point arithmetic, if a floating-point number is 2^{5}x1.10101, where the mantissa is represented in two's complement, then the number is ().

No need for normalization

Need to shift right to normalize

Normalize by shifting the mantissa one place to the left.

Normalize by shifting the mantissa left by two places.

C

The examination of the normalization of floating-point numbers requires that when the mantissa is represented in two's complement and is in the form of 1.0××, it is considered a normalized number. Therefore, the mantissa should be shifted one bit to the left, and the exponent should be decremented by 1 to achieve normalization.

616

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In a certain floating-point system that uses normalized floating-point representation, the exponent is represented in biased notation (with the most significant bit representing the sign), and the mantissa is represented in true form. The following ( ) representation is not a normalized floating-point number.

11111111,1.1000···00

0011111,1.0111···01

1000001.0.1111···01

0111111,0.1000···10

B

In the sign-magnitude representation, the normalized form for positive numbers is 0.1×····x, while for negative numbers it is 1.1×····x, therefore option B is incorrect.

617

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The correct statement about the order operation is ().

In the order operation of floating-point addition and subtraction, if the order code decreases, the tail is shifted to the left

None of the above is correct.

In the alignment operation of floating-point addition and subtraction, if the exponent increases, the significand is shifted to the right.

In the order operation of floating-point addition and subtraction, if the order code increases, the tail is shifted to the right; If the order code decreases, the tail shifts to the left

C

Exponent alignment is the process of adjusting the smaller exponent to match the larger one, hence there is no situation where the exponent decreases and the significand shifts left, therefore options A and B are incorrect.

618

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In the 64-bit floating-point number format defined by the IEEE 754 standard, with 1 bit for the sign, 11 bits for the exponent, and 52 bits for the mantissa, the smallest normalized negative number it can represent is ( ).

-(2 - 2^{52})x2^{-1023}

-(2- 2-^{-52})x2{+1023}

-1x2^{-1024}

-(1- 2^{-52})x2^{+2047}

B

Long floating-point numbers, with an 11-bit exponent and a 52-bit mantissa, adopt the hidden bit strategy. Therefore, its smallest normalized negative number has the exponent at its maximum value of 2^1023 (1023 = 2^11 - 1 - 1) and the mantissa at its maximum of 2^-2^-2 (note the implicit leading 1, with the sign bit being negative).

619

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

If a certain single-precision floating-point number, a certain true form, a certain two's complement, and a certain offset binary all have a 32-bit machine representation of 0xF0000000, the order of these numbers from largest to smallest is ( ).

Floating point, true form, Complement Code, Offset binary

Floating-point,Offset binary,Complement Code, true form

Offset binary, true form, Complement Code, Floating point

Offset binary, Complement Code, true form, Floating-point

D

The highest bit of this machine number is 1, which indicates a negative number for sign-magnitude, two's complement, and single-precision floating-point representation, but a positive number for offset binary representation. Therefore, the offset binary has the largest value, while the two's complement is -2^28, the sign-magnitude is -(2^30+2^29+2^28), and the single-precision floating-point number is -1.0x2^97, with the values decreasing in that order.

620

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

In floating-point arithmetic, underflow refers to ( ).

The absolute value of the calculation result is less than the smallest absolute value that can be represented by the machine.

The result of the operation is less than the smallest negative number representable by the machine.

The result of the operation is less than the smallest number that can be represented by the machine.

Error generated by the least significant bit of the calculation result

A

When the result of a calculation falls between 0 and the smallest normalized positive number, it is called positive underflow. When the result is between 0 and the largest normalized negative number, it is called negative underflow. Positive underflow and negative underflow are collectively referred to as underflow.

621

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

Assuming a floating-point number has a total of 12 bits, with 1 bit for the sign of the exponent and 3 bits for the exponent itself, represented in base 2 using two's complement; and the mantissa includes 1 bit for the sign and 7 bits for the value, also in two's complement, normalized. Then the largest positive number that can be represented by this floating-point number is ( ).

2^7

2^8

2^8 - 1

2^7-1

D

To maximize a positive floating-point number, the mantissa should be the largest positive number, and the exponent should be the largest positive number. The mantissa is an 8-bit two's complement (including the sign bit), with the largest positive value being 0.1111111, which is 1 - 2^{-7}. The exponent is a 4-bit two's complement (including the sign bit), with the largest positive value being 0111, which is 7. Therefore, the largest positive number is (1-2^{-7})x2^7 = 2^7-1.

622

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

Before performing addition or subtraction on floating-point numbers, computers first carry out an alignment of exponents. If the exponent of x is greater than that of y, then ().

The exponent of x is reduced to match the exponent of y, and the mantissa of x is subjected to an arithmetic left shift.

The exponent of x is reduced to match the exponent of y, and the mantissa part of x is subjected to an arithmetic right shift.

The exponent of y is expanded to match that of x, and the mantissa of y is subjected to an arithmetic left shift.

The exponent of y is expanded to match the exponent of X, and the mantissa of y is subjected to an arithmetic right shift.

D

When performing addition and subtraction operations on floating-point numbers, it is first necessary to align the exponents. According to the rules of exponent alignment, the exponent and mantissa will undergo corresponding operations. The rule of exponent alignment is to align the smaller exponent to the larger one. That is, the mantissa of the number with the smaller exponent is arithmetically right-shifted, and with each right shift, the exponent is incremented by 1 until the exponents of both numbers are equal.

623

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

If the mantissa of a floating-point number is represented in two's complement, then the mantissa in the following ( ) is in normalized form.

1.11

0.0111

0.0101

1.00010

D

The normalized representation of two's complement has the first digit after the decimal point different from the sign bit, therefore the choice is D.

624

Test

Computer Organization

Data Representation and Operation

Multiple-choice

Reasoning

English

The correct statement(s) about rounding is (are) ( ). I. Not only floating-point numbers require rounding, fixed-point numbers may also need to be rounded during operations II. In floating-point number rounding, rounding is only possible during left normalization III. In floating-point number rounding, rounding is only possible during right normalization IV. In floating-point number rounding, both left and right normalization may require rounding. V. Rounding does not necessarily result in error.

I, II, V

II, III

I, III, IV

V

D

Rounding is a concept associated with floating-point numbers; fixed-point numbers do not have the concept of rounding, so I is incorrect. There are two situations in which floating-point numbers are rounded: exponent alignment and right normalization, so II, III, and IV are incorrect. Rounding does not necessarily result in an error; for example, rounding down from 11.00 to 11.0 does introduce an error, so V is correct.

625

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

How is the storage capacity of a memory calculated?()

Storage capacity = Number of storage words × Word length

Storage Capacity = Storage Cycle × Data Width

Storage capacity = Number of storage words / Storage cycle

Storage capacity = Access time × Storage cycle

A

null

626

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

The characteristics of Dynamic Random Access Memory (DRAM) do not include:()

Utilize the charge on the gate capacitor in the memory cell circuit to store information.

Regular refresh is required.

Use a bistable flip-flop to store information.

Generally used to compose large-capacity main memory systems.

C

null

627

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What are the characteristics of Erasable Programmable Read-Only Memory (EPROM)?()

Once written, the content cannot be changed.

The content can be rewritten multiple times after being written.

Used only for temporary storage, the contents disappear after the power is turned off.

Unable to perform electronic erasure and rewriting

B

null

628

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

Which of the following is not a method of connecting main memory and the CPU?()

Data Bus

Address Bus

Control Bus

Power cord

D

null

629

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

Dual-port RAM allows two independent controllers to access the memory cells simultaneously and asynchronously, but issues can arise when:()

Two ports write data to the same address unit simultaneously.

Concurrent data access to the same address unit by two ports is not allowed.

Both ports simultaneously read data from the same address unit.

Perform read and write operations on two ports for different address units.

A

null

630

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What are the characteristics of low-order interleaving in multi-bank memory systems?()

The high-order address represents the block number, while the low-order address is the intra-block address.

The lower address bits represent the bank number, while the higher address bits represent the intra-bank address.

All physical numbers and internal addresses are arranged in sequence.

Each module can only be accessed sequentially.

B

null

631

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

Which of the following is not a mapping method for the high-speed cache memory (Cache)?()

Direct Mapping

Fully associative mapping

Group associative mapping

Sequential mapping

D

null

632

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

In the write policies of high-speed cache memory, what does "write-no-allocate" refer to in the case of a write miss?()

Write-only to main memory, no block loading.

Load the block from main memory into the Cache, then update this Cache block.

Data must be written to both the Cache and main memory simultaneously.

Only modify the contents of the Cache without immediately writing back to the main memory.

A

null

633

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is the relationship between cache hit rate and average access time?()

The higher the cache hit rate, the longer the average access time.

Cache hit rate is independent of average access time.

The lower the cache hit rate, the shorter the average access time.

The higher the cache hit rate, the shorter the average access time.

D

null

634

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is the primary use of Static Random Access Memory (SRAM)?()

Composing Large Capacity Main Memory Systems

As a high-speed cache memory

For external storage devices

As read-only memory

B

null

635

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What are the main components of a Solid State Drive (SSD)?()

Disk and Magnetic Head

Control unit and storage unit (Flash chip)

Optical disc and laser head

Magnetic tape and read-write head

B

null

636

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is the definition of the main memory bandwidth Bm?()

The maximum amount of information that can be transferred in and out of the main memory per second

Data transfer rate of cyclic memory during the storage period

Data transfer rate of memory during access cycle

The communication rate between main memory and CPU

A

null

637

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What does the memory access cycle Tm refer to?()

The minimum time interval required between two consecutive storage operations

The time it takes from initiating a storage operation to its completion.

The total time required for a complete read-write operation

The time required for data to be transferred from memory to the CPU

A

null

638

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

Which of the following is not a classification method for memory?()

Classified by Access Method

Classified by Storage Medium

Categorized by operating system compatibility

Classified by function (hierarchy) in a computer

C

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639

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is the role of decode drivers in semiconductor random access memory (RAM)?()

Determine which storage chip is selected.

Determine the address line for unidirectional input.

Control the read and write operations of data

Convert the input address to a memory address.

D

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640

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is the function of the control bus in the connection between the main memory and the CPU?()

Transmitting data

Definition of the maximum addressable memory space

Indicate the type of bus cycle and the moment when this input/output operation is completed.

Provide power supply.

C

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641

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

In a paged virtual memory system, what are the two components that make up a virtual address?()

Virtual page number and offset within page

Segment number and offset within segment

Body number and intra-body address

Block number and block internal address

A

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642

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is the main function of auxiliary storage in a storage system?()

Increase data processing speed

Expand the main memory capacity

Temporary data storage

Addressing the mismatch between main memory and CPU speeds.

B

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643

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What are the characteristics of Flash Memory?()

Regular refresh is required.

Cannot retain information without power.

Capable of long-term information storage and allows for rapid erasure and rewriting.

Write-once, non-erasable content

C

null

644

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is an example of non-volatile memory?()

Dynamic RAM

Static RAM

Optical memory

Magnetic core memory

C

null

645

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What are the main types of magnetic surface storage?()

Static RAM and Dynamic RAM

Disk and Tape

Optical Disc and Solid State Drive

Read-Only Memory and Random Access Memory

B

null

646

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What are the characteristics of bit extension method in the capacity expansion technology of main memory?()

Increase the number of storage units

Increase the storage bit size of each memory cell.

Increase both the number of storage units and the number of storage bits.

Reduce the access speed of the storage unit

B

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647

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What are the characteristics of high-order interleaved addressing in multi-bank memory systems?()

The lower address bits represent the block number, while the higher address bits represent the intra-block address.

The high-order address represents the block number, while the low-order address is the intra-block address.

All addresses are arranged in order.

All physical memory addresses are identical.

B

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648

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is the primary function of the TLB (Translation Lookaside Buffer) in a virtual memory system?()

Storing long-term data

Improve the speed of address translation

Expand physical storage capacity

Caching the mapping from virtual addresses to physical addresses

B

null

649

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

What is the main disadvantage of segmented virtual memory?()

Fixed page size leads to memory waste.

The length of the segment is variable, making it inconvenient to allocate space.

The address translation process requires table lookup.

Inconvenient for compilation, management, modification, and protection.

B

null

650

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

Disk belongs to the () type of storage.

Random Access Memory (RAM)

Read-Only Memory (ROM)

Sequential Access Memory (SAM)

Direct Access Memory (DAM)

D

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651

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

Associative memory is a type of storage that is addressed by ().

Direct Addressing Mode

Stack storage method

Combined content addressing and stack storage method

Combined content addressing and address addressing

D

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652

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

Among the following types of memory, the one that the CPU cannot directly access is ( )

Hard Disk Drive (HDD)

Memory

Cache

Register

A

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653

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

Assuming a machine word size of 64 bits and a storage capacity of 128MB, the number of addressable units it can access when using word addressing is ( ).

16MB

16M

32M

32MB

B

null

654

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

The hierarchical approach to computer memory is adopted in order to ( ).

Convenient for programming

Resolve the contradiction among capacity, speed, and price.

Storing large amounts of data is convenient.

Convenient to operate

B

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655

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

If a memory has a capacity of 32Kx16 bits, then ( ).

The address bus has 16 lines, and the data bus has 32 lines.

The address bus has 32 lines, and the data bus has 16 lines.

The address bus has 15 lines, and the data bus has 16 lines.

The address bus has 15 lines, and the data bus also has 32 lines.

C

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656

Test

Computer Organization

Storage System

Multiple-choice

Knowledge

English

If each storage unit in RAM is 16 bits, then the correct description below is ( )

The address line is 16-bit.

The data line is 16-bit.

The instruction length is 16 bits.

None of the above statements are correct.

B

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