label
int64
0
1
func1
stringlengths
23
97k
id
int64
0
27.3k
1
void qemu_spice_destroy_host_primary(SimpleSpiceDisplay *ssd) { dprint(1, "%s:\n", __FUNCTION__); qemu_mutex_unlock_iothread(); ssd->worker->destroy_primary_surface(ssd->worker, 0); qemu_mutex_lock_iothread(); }
13,470
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static void copy_context_reset(AVCodecContext *avctx) { av_opt_free(avctx); av_freep(&avctx->rc_override); av_freep(&avctx->intra_matrix); av_freep(&avctx->inter_matrix); av_freep(&avctx->extradata); av_freep(&avctx->subtitle_header); av_buffer_unref(&avctx->hw_frames_ctx); avctx->subtitle_header_size = 0; avctx->extradata_size = 0; }
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int ff_audio_mix_init(AVAudioResampleContext *avr) { int ret; if (avr->internal_sample_fmt != AV_SAMPLE_FMT_S16P && avr->internal_sample_fmt != AV_SAMPLE_FMT_FLTP) { av_log(avr, AV_LOG_ERROR, "Unsupported internal format for " "mixing: %s\n", av_get_sample_fmt_name(avr->internal_sample_fmt)); return AVERROR(EINVAL); } /* build matrix if the user did not already set one */ if (!avr->am->matrix) { int i, j; char in_layout_name[128]; char out_layout_name[128]; double *matrix_dbl = av_mallocz(avr->out_channels * avr->in_channels * sizeof(*matrix_dbl)); if (!matrix_dbl) return AVERROR(ENOMEM); ret = avresample_build_matrix(avr->in_channel_layout, avr->out_channel_layout, avr->center_mix_level, avr->surround_mix_level, avr->lfe_mix_level, 1, matrix_dbl, avr->in_channels, avr->matrix_encoding); if (ret < 0) { av_free(matrix_dbl); return ret; } av_get_channel_layout_string(in_layout_name, sizeof(in_layout_name), avr->in_channels, avr->in_channel_layout); av_get_channel_layout_string(out_layout_name, sizeof(out_layout_name), avr->out_channels, avr->out_channel_layout); av_log(avr, AV_LOG_DEBUG, "audio_mix: %s to %s\n", in_layout_name, out_layout_name); for (i = 0; i < avr->out_channels; i++) { for (j = 0; j < avr->in_channels; j++) { av_log(avr, AV_LOG_DEBUG, " %0.3f ", matrix_dbl[i * avr->in_channels + j]); } av_log(avr, AV_LOG_DEBUG, "\n"); } ret = avresample_set_matrix(avr, matrix_dbl, avr->in_channels); if (ret < 0) { av_free(matrix_dbl); return ret; } av_free(matrix_dbl); } avr->am->fmt = avr->internal_sample_fmt; avr->am->coeff_type = avr->mix_coeff_type; avr->am->in_layout = avr->in_channel_layout; avr->am->out_layout = avr->out_channel_layout; avr->am->in_channels = avr->in_channels; avr->am->out_channels = avr->out_channels; ret = mix_function_init(avr->am); if (ret < 0) return ret; return 0; }
13,472
1
static inline void RENAME(rgb16ToY)(uint8_t *dst, uint8_t *src, int width) { int i; for(i=0; i<width; i++) { int d= ((uint16_t*)src)[i]; int r= d&0x1F; int g= (d>>5)&0x3F; int b= (d>>11)&0x1F; dst[i]= ((2*RY*r + GY*g + 2*BY*b)>>(RGB2YUV_SHIFT-2)) + 16; } }
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static void aux_slave_dev_print(Monitor *mon, DeviceState *dev, int indent) { AUXBus *bus = AUX_BUS(qdev_get_parent_bus(dev)); AUXSlave *s; /* Don't print anything if the device is I2C "bridge". */ if (aux_bus_is_bridge(bus, dev)) { return; } s = AUX_SLAVE(dev); monitor_printf(mon, "%*smemory " TARGET_FMT_plx "/" TARGET_FMT_plx "\n", indent, "", object_property_get_int(OBJECT(s->mmio), "addr", NULL), memory_region_size(s->mmio)); }
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void palette8tobgr16(const uint8_t *src, uint8_t *dst, unsigned num_pixels, const uint8_t *palette) { unsigned i; for(i=0; i<num_pixels; i++) ((uint16_t *)dst)[i] = bswap_16(((uint16_t *)palette)[ src[i] ]); }
13,475
0
static int vda_h264_decode_slice(AVCodecContext *avctx, const uint8_t *buffer, uint32_t size) { VDAContext *vda = avctx->internal->hwaccel_priv_data; struct vda_context *vda_ctx = avctx->hwaccel_context; void *tmp; if (!vda_ctx->decoder) return -1; tmp = av_fast_realloc(vda->bitstream, &vda->allocated_size, vda->bitstream_size + size + 4); if (!tmp) return AVERROR(ENOMEM); vda->bitstream = tmp; AV_WB32(vda->bitstream + vda->bitstream_size, size); memcpy(vda->bitstream + vda->bitstream_size + 4, buffer, size); vda->bitstream_size += size + 4; return 0; }
13,476
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static void print_tag(const char *str, unsigned int tag, int size) { dprintf(NULL, "%s: tag=%c%c%c%c size=0x%x\n", str, tag & 0xff, (tag >> 8) & 0xff, (tag >> 16) & 0xff, (tag >> 24) & 0xff, size); }
13,477
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static void h264_loop_filter_strength_mmx2( int16_t bS[2][4][4], uint8_t nnz[40], int8_t ref[2][40], int16_t mv[2][40][2], int bidir, int edges, int step, int mask_mv0, int mask_mv1, int field ) { __asm__ volatile( "movq %0, %%mm7 \n" "movq %1, %%mm6 \n" ::"m"(ff_pb_1), "m"(ff_pb_3) ); if(field) __asm__ volatile( "movq %0, %%mm6 \n" ::"m"(ff_pb_3_1) ); __asm__ volatile( "movq %%mm6, %%mm5 \n" "paddb %%mm5, %%mm5 \n" :); // could do a special case for dir==0 && edges==1, but it only reduces the // average filter time by 1.2% step <<= 3; edges <<= 3; h264_loop_filter_strength_iteration_mmx2(bS, nnz, ref, mv, bidir, edges, step, mask_mv1, 1, -8, 0); h264_loop_filter_strength_iteration_mmx2(bS, nnz, ref, mv, bidir, 32, 8, mask_mv0, 0, -1, -1); __asm__ volatile( "movq (%0), %%mm0 \n\t" "movq 8(%0), %%mm1 \n\t" "movq 16(%0), %%mm2 \n\t" "movq 24(%0), %%mm3 \n\t" TRANSPOSE4(%%mm0, %%mm1, %%mm2, %%mm3, %%mm4) "movq %%mm0, (%0) \n\t" "movq %%mm3, 8(%0) \n\t" "movq %%mm4, 16(%0) \n\t" "movq %%mm2, 24(%0) \n\t" ::"r"(bS[0]) :"memory" ); }
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void float_to_int16_vfp(int16_t *dst, const float *src, int len) { asm volatile( "fldmias %[src]!, {s16-s23}\n\t" "ftosis s0, s16\n\t" "ftosis s1, s17\n\t" "ftosis s2, s18\n\t" "ftosis s3, s19\n\t" "ftosis s4, s20\n\t" "ftosis s5, s21\n\t" "ftosis s6, s22\n\t" "ftosis s7, s23\n\t" "1:\n\t" "subs %[len], %[len], #8\n\t" "fmrrs r3, r4, {s0, s1}\n\t" "fmrrs r5, r6, {s2, s3}\n\t" "fmrrs r7, r8, {s4, s5}\n\t" "fmrrs ip, lr, {s6, s7}\n\t" "fldmiasgt %[src]!, {s16-s23}\n\t" "ssat r4, #16, r4\n\t" "ssat r3, #16, r3\n\t" "ssat r6, #16, r6\n\t" "ssat r5, #16, r5\n\t" "pkhbt r3, r3, r4, lsl #16\n\t" "pkhbt r4, r5, r6, lsl #16\n\t" "ftosisgt s0, s16\n\t" "ftosisgt s1, s17\n\t" "ftosisgt s2, s18\n\t" "ftosisgt s3, s19\n\t" "ftosisgt s4, s20\n\t" "ftosisgt s5, s21\n\t" "ftosisgt s6, s22\n\t" "ftosisgt s7, s23\n\t" "ssat r8, #16, r8\n\t" "ssat r7, #16, r7\n\t" "ssat lr, #16, lr\n\t" "ssat ip, #16, ip\n\t" "pkhbt r5, r7, r8, lsl #16\n\t" "pkhbt r6, ip, lr, lsl #16\n\t" "stmia %[dst]!, {r3-r6}\n\t" "bgt 1b\n\t" : [dst] "+&r" (dst), [src] "+&r" (src), [len] "+&r" (len) : : "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", "r3", "r4", "r5", "r6", "r7", "r8", "ip", "lr", "cc", "memory"); }
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int avfilter_copy_frame_props(AVFilterBufferRef *dst, const AVFrame *src) { dst->pts = src->pts; dst->pos = av_frame_get_pkt_pos(src); dst->format = src->format; switch (dst->type) { case AVMEDIA_TYPE_VIDEO: dst->video->w = src->width; dst->video->h = src->height; dst->video->sample_aspect_ratio = src->sample_aspect_ratio; dst->video->interlaced = src->interlaced_frame; dst->video->top_field_first = src->top_field_first; dst->video->key_frame = src->key_frame; dst->video->pict_type = src->pict_type; av_freep(&dst->video->qp_table); dst->video->qp_table_linesize = 0; if (src->qscale_table) { int qsize = src->qstride ? src->qstride * ((src->height+15)/16) : (src->width+15)/16; dst->video->qp_table = av_malloc(qsize); if(!dst->video->qp_table) return AVERROR(ENOMEM); dst->video->qp_table_linesize = src->qstride; memcpy(dst->video->qp_table, src->qscale_table, qsize); } break; case AVMEDIA_TYPE_AUDIO: dst->audio->sample_rate = src->sample_rate; dst->audio->channel_layout = src->channel_layout; break; default: return AVERROR(EINVAL); } return 0; }
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void coroutine_fn qemu_coroutine_yield(void) { Coroutine *self = qemu_coroutine_self(); Coroutine *to = self->caller; trace_qemu_coroutine_yield(self, to); if (!to) { fprintf(stderr, "Co-routine is yielding to no one\n"); abort(); } self->caller = NULL; coroutine_swap(self, to); }
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int ff_probe_input_buffer(ByteIOContext **pb, AVInputFormat **fmt, const char *filename, void *logctx, unsigned int offset, unsigned int max_probe_size) { AVProbeData pd = { filename ? filename : "", NULL, -offset }; unsigned char *buf = NULL; int probe_size; if (!max_probe_size) { max_probe_size = PROBE_BUF_MAX; } else if (max_probe_size > PROBE_BUF_MAX) { max_probe_size = PROBE_BUF_MAX; } else if (max_probe_size < PROBE_BUF_MIN) { return AVERROR(EINVAL); } if (offset >= max_probe_size) { return AVERROR(EINVAL); } for(probe_size= PROBE_BUF_MIN; probe_size<=max_probe_size && !*fmt; probe_size<<=1){ int ret, score = probe_size < max_probe_size ? AVPROBE_SCORE_MAX/4 : 0; int buf_offset = (probe_size == PROBE_BUF_MIN) ? 0 : probe_size>>1; if (probe_size < offset) { continue; } /* read probe data */ buf = av_realloc(buf, probe_size + AVPROBE_PADDING_SIZE); if ((ret = get_buffer(*pb, buf + buf_offset, probe_size - buf_offset)) < 0) { av_free(buf); return ret; } pd.buf_size += ret; pd.buf = &buf[offset]; memset(pd.buf + pd.buf_size, 0, AVPROBE_PADDING_SIZE); /* guess file format */ *fmt = av_probe_input_format2(&pd, 1, &score); if(*fmt){ if(score <= AVPROBE_SCORE_MAX/4){ //this can only be true in the last iteration av_log(logctx, AV_LOG_WARNING, "Format detected only with low score of %d, misdetection possible!\n", score); }else av_log(logctx, AV_LOG_DEBUG, "Probed with size=%d and score=%d\n", probe_size, score); } } av_free(buf); if (url_fseek(*pb, 0, SEEK_SET) < 0) { url_fclose(*pb); if (url_fopen(pb, filename, URL_RDONLY) < 0) return AVERROR(EIO); } return 0; }
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void hmp_sendkey(Monitor *mon, const QDict *qdict) { const char *keys = qdict_get_str(qdict, "keys"); KeyValueList *keylist, *head = NULL, *tmp = NULL; int has_hold_time = qdict_haskey(qdict, "hold-time"); int hold_time = qdict_get_try_int(qdict, "hold-time", -1); Error *err = NULL; char keyname_buf[16]; char *separator; int keyname_len; while (1) { separator = strchr(keys, '-'); keyname_len = separator ? separator - keys : strlen(keys); pstrcpy(keyname_buf, sizeof(keyname_buf), keys); /* Be compatible with old interface, convert user inputted "<" */ if (!strncmp(keyname_buf, "<", 1) && keyname_len == 1) { pstrcpy(keyname_buf, sizeof(keyname_buf), "less"); keyname_len = 4; } keyname_buf[keyname_len] = 0; keylist = g_malloc0(sizeof(*keylist)); keylist->value = g_malloc0(sizeof(*keylist->value)); if (!head) { head = keylist; } if (tmp) { tmp->next = keylist; } tmp = keylist; if (strstart(keyname_buf, "0x", NULL)) { char *endp; int value = strtoul(keyname_buf, &endp, 0); if (*endp != '\0') { goto err_out; } keylist->value->type = KEY_VALUE_KIND_NUMBER; keylist->value->u.number = value; } else { int idx = index_from_key(keyname_buf); if (idx == Q_KEY_CODE__MAX) { goto err_out; } keylist->value->type = KEY_VALUE_KIND_QCODE; keylist->value->u.qcode = idx; } if (!separator) { break; } keys = separator + 1; } qmp_send_key(head, has_hold_time, hold_time, &err); hmp_handle_error(mon, &err); out: qapi_free_KeyValueList(head); return; err_out: monitor_printf(mon, "invalid parameter: %s\n", keyname_buf); goto out; }
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static void s390_cpu_class_init(ObjectClass *oc, void *data) { S390CPUClass *scc = S390_CPU_CLASS(oc); CPUClass *cc = CPU_CLASS(scc); DeviceClass *dc = DEVICE_CLASS(oc); scc->parent_realize = dc->realize; dc->realize = s390_cpu_realizefn; scc->parent_reset = cc->reset; cc->reset = s390_cpu_reset; cc->do_interrupt = s390_cpu_do_interrupt; cc->dump_state = s390_cpu_dump_state; cc->set_pc = s390_cpu_set_pc; cc->gdb_read_register = s390_cpu_gdb_read_register; cc->gdb_write_register = s390_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; #endif dc->vmsd = &vmstate_s390_cpu; cc->gdb_num_core_regs = S390_NUM_REGS; }
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static void hpet_device_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = hpet_realize; dc->reset = hpet_reset; dc->vmsd = &vmstate_hpet; dc->props = hpet_device_properties; }
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static void vp8_filter_mb_row(AVCodecContext *avctx, void *tdata, int jobnr, int threadnr) { VP8Context *s = avctx->priv_data; VP8ThreadData *td = &s->thread_data[threadnr]; int mb_x, mb_y = td->thread_mb_pos >> 16, num_jobs = s->num_jobs; AVFrame *curframe = s->curframe->tf.f; VP8Macroblock *mb; VP8ThreadData *prev_td, *next_td; uint8_t *dst[3] = { curframe->data[0] + 16 * mb_y * s->linesize, curframe->data[1] + 8 * mb_y * s->uvlinesize, curframe->data[2] + 8 * mb_y * s->uvlinesize }; if (s->mb_layout == 1) mb = s->macroblocks_base + ((s->mb_width + 1) * (mb_y + 1) + 1); else mb = s->macroblocks + (s->mb_height - mb_y - 1) * 2; if (mb_y == 0) prev_td = td; else prev_td = &s->thread_data[(jobnr + num_jobs - 1) % num_jobs]; if (mb_y == s->mb_height - 1) next_td = td; else next_td = &s->thread_data[(jobnr + 1) % num_jobs]; for (mb_x = 0; mb_x < s->mb_width; mb_x++, mb++) { VP8FilterStrength *f = &td->filter_strength[mb_x]; if (prev_td != td) check_thread_pos(td, prev_td, (mb_x + 1) + (s->mb_width + 3), mb_y - 1); if (next_td != td) if (next_td != &s->thread_data[0]) check_thread_pos(td, next_td, mb_x + 1, mb_y + 1); if (num_jobs == 1) { if (s->filter.simple) backup_mb_border(s->top_border[mb_x + 1], dst[0], NULL, NULL, s->linesize, 0, 1); else backup_mb_border(s->top_border[mb_x + 1], dst[0], dst[1], dst[2], s->linesize, s->uvlinesize, 0); } if (s->filter.simple) filter_mb_simple(s, dst[0], f, mb_x, mb_y); else filter_mb(s, dst, f, mb_x, mb_y); dst[0] += 16; dst[1] += 8; dst[2] += 8; update_pos(td, mb_y, (s->mb_width + 3) + mb_x); } }
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static int cllc_decode_frame(AVCodecContext *avctx, void *data, int *got_picture_ptr, AVPacket *avpkt) { CLLCContext *ctx = avctx->priv_data; AVFrame *pic = data; uint8_t *src = avpkt->data; uint32_t info_tag, info_offset; int data_size; GetBitContext gb; int coding_type, ret; /* Skip the INFO header if present */ info_offset = 0; info_tag = AV_RL32(src); if (info_tag == MKTAG('I', 'N', 'F', 'O')) { info_offset = AV_RL32(src + 4); if (info_offset > UINT32_MAX - 8 || info_offset + 8 > avpkt->size) { av_log(avctx, AV_LOG_ERROR, "Invalid INFO header offset: 0x%08"PRIX32" is too large.\n", info_offset); return AVERROR_INVALIDDATA; } info_offset += 8; src += info_offset; av_log(avctx, AV_LOG_DEBUG, "Skipping INFO chunk.\n"); } data_size = (avpkt->size - info_offset) & ~1; /* Make sure our bswap16'd buffer is big enough */ av_fast_padded_malloc(&ctx->swapped_buf, &ctx->swapped_buf_size, data_size); if (!ctx->swapped_buf) { av_log(avctx, AV_LOG_ERROR, "Could not allocate swapped buffer.\n"); return AVERROR(ENOMEM); } /* bswap16 the buffer since CLLC's bitreader works in 16-bit words */ ctx->bdsp.bswap16_buf((uint16_t *) ctx->swapped_buf, (uint16_t *) src, data_size / 2); init_get_bits(&gb, ctx->swapped_buf, data_size * 8); /* * Read in coding type. The types are as follows: * * 0 - YUY2 * 1 - BGR24 (Triples) * 2 - BGR24 (Quads) * 3 - BGRA */ coding_type = (AV_RL32(src) >> 8) & 0xFF; av_log(avctx, AV_LOG_DEBUG, "Frame coding type: %d\n", coding_type); switch (coding_type) { case 0: avctx->pix_fmt = AV_PIX_FMT_YUV422P; avctx->bits_per_raw_sample = 8; ret = ff_get_buffer(avctx, pic, 0); if (ret < 0) { av_log(avctx, AV_LOG_ERROR, "Could not allocate buffer.\n"); return ret; } ret = decode_yuv_frame(ctx, &gb, pic); if (ret < 0) return ret; break; case 1: case 2: avctx->pix_fmt = AV_PIX_FMT_RGB24; avctx->bits_per_raw_sample = 8; ret = ff_get_buffer(avctx, pic, 0); if (ret < 0) { av_log(avctx, AV_LOG_ERROR, "Could not allocate buffer.\n"); return ret; } ret = decode_rgb24_frame(ctx, &gb, pic); if (ret < 0) return ret; break; case 3: avctx->pix_fmt = AV_PIX_FMT_ARGB; avctx->bits_per_raw_sample = 8; ret = ff_get_buffer(avctx, pic, 0); if (ret < 0) { av_log(avctx, AV_LOG_ERROR, "Could not allocate buffer.\n"); return ret; } ret = decode_argb_frame(ctx, &gb, pic); if (ret < 0) return ret; break; default: av_log(avctx, AV_LOG_ERROR, "Unknown coding type: %d.\n", coding_type); return AVERROR_INVALIDDATA; } pic->key_frame = 1; pic->pict_type = AV_PICTURE_TYPE_I; *got_picture_ptr = 1; return avpkt->size; }
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static void test_event_c(TestEventData *data, const void *unused) { QDict *d, *d_data, *d_b; UserDefOne b; UserDefZero z; z.integer = 2; b.base = &z; b.string = g_strdup("test1"); b.has_enum1 = false; d_b = qdict_new(); qdict_put(d_b, "integer", qint_from_int(2)); qdict_put(d_b, "string", qstring_from_str("test1")); d_data = qdict_new(); qdict_put(d_data, "a", qint_from_int(1)); qdict_put(d_data, "b", d_b); qdict_put(d_data, "c", qstring_from_str("test2")); d = data->expect; qdict_put(d, "event", qstring_from_str("EVENT_C")); qdict_put(d, "data", d_data); qapi_event_send_event_c(true, 1, true, &b, "test2", &error_abort); g_free(b.string); }
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static void enable_logging(void) { ga_enable_logging(ga_state); }
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static void h264_v_loop_filter_luma_c(uint8_t *pix, int stride, int alpha, int beta, int8_t *tc0) { h264_loop_filter_luma_c(pix, stride, 1, alpha, beta, tc0); }
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static void qemu_aio_wait_nonblocking(void) { qemu_notify_event(); qemu_aio_wait(); }
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void qmp_block_job_set_speed(const char *device, int64_t value, Error **errp) { BlockJob *job = find_block_job(device); if (!job) { error_set(errp, QERR_DEVICE_NOT_ACTIVE, device); return; } if (block_job_set_speed(job, value) < 0) { error_set(errp, QERR_NOT_SUPPORTED); } }
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int virtqueue_pop(VirtQueue *vq, VirtQueueElement *elem) { unsigned int i, head, max; hwaddr desc_pa = vq->vring.desc; VirtIODevice *vdev = vq->vdev; if (!virtqueue_num_heads(vq, vq->last_avail_idx)) return 0; /* When we start there are none of either input nor output. */ elem->out_num = elem->in_num = 0; max = vq->vring.num; i = head = virtqueue_get_head(vq, vq->last_avail_idx++); if (virtio_vdev_has_feature(vdev, VIRTIO_RING_F_EVENT_IDX)) { vring_set_avail_event(vq, vq->last_avail_idx); } if (vring_desc_flags(vdev, desc_pa, i) & VRING_DESC_F_INDIRECT) { if (vring_desc_len(vdev, desc_pa, i) % sizeof(VRingDesc)) { error_report("Invalid size for indirect buffer table"); exit(1); } /* loop over the indirect descriptor table */ max = vring_desc_len(vdev, desc_pa, i) / sizeof(VRingDesc); desc_pa = vring_desc_addr(vdev, desc_pa, i); i = 0; } /* Collect all the descriptors */ do { struct iovec *sg; if (vring_desc_flags(vdev, desc_pa, i) & VRING_DESC_F_WRITE) { if (elem->in_num >= ARRAY_SIZE(elem->in_sg)) { error_report("Too many write descriptors in indirect table"); exit(1); } elem->in_addr[elem->in_num] = vring_desc_addr(vdev, desc_pa, i); sg = &elem->in_sg[elem->in_num++]; } else { if (elem->out_num >= ARRAY_SIZE(elem->out_sg)) { error_report("Too many read descriptors in indirect table"); exit(1); } elem->out_addr[elem->out_num] = vring_desc_addr(vdev, desc_pa, i); sg = &elem->out_sg[elem->out_num++]; } sg->iov_len = vring_desc_len(vdev, desc_pa, i); /* If we've got too many, that implies a descriptor loop. */ if ((elem->in_num + elem->out_num) > max) { error_report("Looped descriptor"); exit(1); } } while ((i = virtqueue_next_desc(vdev, desc_pa, i, max)) != max); /* Now map what we have collected */ virtqueue_map(elem); elem->index = head; vq->inuse++; trace_virtqueue_pop(vq, elem, elem->in_num, elem->out_num); return elem->in_num + elem->out_num; }
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void qemu_main_loop_start(void) { qemu_system_ready = 1; qemu_cond_broadcast(&qemu_system_cond); }
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static void spr_read_tbl (DisasContext *ctx, int gprn, int sprn) { if (use_icount) { gen_io_start(); } gen_helper_load_tbl(cpu_gpr[gprn], cpu_env); if (use_icount) { gen_io_end(); gen_stop_exception(ctx); } }
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0
static void arm_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); ARMCPU *cpu = ARM_CPU(obj); static bool inited; cs->env_ptr = &cpu->env; cpu_exec_init(&cpu->env); cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal, g_free, g_free); #ifndef CONFIG_USER_ONLY /* Our inbound IRQ and FIQ lines */ if (kvm_enabled()) { /* VIRQ and VFIQ are unused with KVM but we add them to maintain * the same interface as non-KVM CPUs. */ qdev_init_gpio_in(DEVICE(cpu), arm_cpu_kvm_set_irq, 4); } else { qdev_init_gpio_in(DEVICE(cpu), arm_cpu_set_irq, 4); } cpu->gt_timer[GTIMER_PHYS] = timer_new(QEMU_CLOCK_VIRTUAL, GTIMER_SCALE, arm_gt_ptimer_cb, cpu); cpu->gt_timer[GTIMER_VIRT] = timer_new(QEMU_CLOCK_VIRTUAL, GTIMER_SCALE, arm_gt_vtimer_cb, cpu); qdev_init_gpio_out(DEVICE(cpu), cpu->gt_timer_outputs, ARRAY_SIZE(cpu->gt_timer_outputs)); #endif /* DTB consumers generally don't in fact care what the 'compatible' * string is, so always provide some string and trust that a hypothetical * picky DTB consumer will also provide a helpful error message. */ cpu->dtb_compatible = "qemu,unknown"; cpu->psci_version = 1; /* By default assume PSCI v0.1 */ cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE; if (tcg_enabled() && !inited) { inited = true; arm_translate_init(); } }
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uint32_t ide_status_read(void *opaque, uint32_t addr) { IDEBus *bus = opaque; IDEState *s = idebus_active_if(bus); int ret; if ((!bus->ifs[0].bs && !bus->ifs[1].bs) || (s != bus->ifs && !s->bs)) ret = 0; else ret = s->status; #ifdef DEBUG_IDE printf("ide: read status addr=0x%x val=%02x\n", addr, ret); #endif return ret; }
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static int net_slirp_init(Monitor *mon, VLANState *vlan, const char *model, const char *name, int restricted, const char *vnetwork, const char *vhost, const char *vhostname, const char *tftp_export, const char *bootfile, const char *vdhcp_start, const char *vnameserver, const char *smb_export, const char *vsmbserver) { /* default settings according to historic slirp */ struct in_addr net = { .s_addr = htonl(0x0a000200) }; /* 10.0.2.0 */ struct in_addr mask = { .s_addr = htonl(0xffffff00) }; /* 255.255.255.0 */ struct in_addr host = { .s_addr = htonl(0x0a000202) }; /* 10.0.2.2 */ struct in_addr dhcp = { .s_addr = htonl(0x0a00020f) }; /* 10.0.2.15 */ struct in_addr dns = { .s_addr = htonl(0x0a000203) }; /* 10.0.2.3 */ #ifndef _WIN32 struct in_addr smbsrv = { .s_addr = 0 }; #endif SlirpState *s; char buf[20]; uint32_t addr; int shift; char *end; if (!tftp_export) { tftp_export = legacy_tftp_prefix; } if (!bootfile) { bootfile = legacy_bootp_filename; } if (vnetwork) { if (get_str_sep(buf, sizeof(buf), &vnetwork, '/') < 0) { if (!inet_aton(vnetwork, &net)) { return -1; } addr = ntohl(net.s_addr); if (!(addr & 0x80000000)) { mask.s_addr = htonl(0xff000000); /* class A */ } else if ((addr & 0xfff00000) == 0xac100000) { mask.s_addr = htonl(0xfff00000); /* priv. 172.16.0.0/12 */ } else if ((addr & 0xc0000000) == 0x80000000) { mask.s_addr = htonl(0xffff0000); /* class B */ } else if ((addr & 0xffff0000) == 0xc0a80000) { mask.s_addr = htonl(0xffff0000); /* priv. 192.168.0.0/16 */ } else if ((addr & 0xffff0000) == 0xc6120000) { mask.s_addr = htonl(0xfffe0000); /* tests 198.18.0.0/15 */ } else if ((addr & 0xe0000000) == 0xe0000000) { mask.s_addr = htonl(0xffffff00); /* class C */ } else { mask.s_addr = htonl(0xfffffff0); /* multicast/reserved */ } } else { if (!inet_aton(buf, &net)) { return -1; } shift = strtol(vnetwork, &end, 10); if (*end != '\0') { if (!inet_aton(vnetwork, &mask)) { return -1; } } else if (shift < 4 || shift > 32) { return -1; } else { mask.s_addr = htonl(0xffffffff << (32 - shift)); } } net.s_addr &= mask.s_addr; host.s_addr = net.s_addr | (htonl(0x0202) & ~mask.s_addr); dhcp.s_addr = net.s_addr | (htonl(0x020f) & ~mask.s_addr); dns.s_addr = net.s_addr | (htonl(0x0203) & ~mask.s_addr); } if (vhost && !inet_aton(vhost, &host)) { return -1; } if ((host.s_addr & mask.s_addr) != net.s_addr) { return -1; } if (vdhcp_start && !inet_aton(vdhcp_start, &dhcp)) { return -1; } if ((dhcp.s_addr & mask.s_addr) != net.s_addr || dhcp.s_addr == host.s_addr || dhcp.s_addr == dns.s_addr) { return -1; } if (vnameserver && !inet_aton(vnameserver, &dns)) { return -1; } if ((dns.s_addr & mask.s_addr) != net.s_addr || dns.s_addr == host.s_addr) { return -1; } #ifndef _WIN32 if (vsmbserver && !inet_aton(vsmbserver, &smbsrv)) { return -1; } #endif s = qemu_mallocz(sizeof(SlirpState)); s->slirp = slirp_init(restricted, net, mask, host, vhostname, tftp_export, bootfile, dhcp, dns, s); TAILQ_INSERT_TAIL(&slirp_stacks, s, entry); while (slirp_configs) { struct slirp_config_str *config = slirp_configs; if (config->flags & SLIRP_CFG_HOSTFWD) { slirp_hostfwd(s, mon, config->str, config->flags & SLIRP_CFG_LEGACY); } else { slirp_guestfwd(s, mon, config->str, config->flags & SLIRP_CFG_LEGACY); } slirp_configs = config->next; qemu_free(config); } #ifndef _WIN32 if (!smb_export) { smb_export = legacy_smb_export; } if (smb_export) { slirp_smb(s, mon, smb_export, smbsrv); } #endif s->vc = qemu_new_vlan_client(vlan, model, name, NULL, slirp_receive, NULL, net_slirp_cleanup, s); snprintf(s->vc->info_str, sizeof(s->vc->info_str), "net=%s, restricted=%c", inet_ntoa(net), restricted ? 'y' : 'n'); return 0; }
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int av_opt_set_pixel_fmt(void *obj, const char *name, enum AVPixelFormat fmt, int search_flags) { return set_format(obj, name, fmt, search_flags, AV_OPT_TYPE_PIXEL_FMT, "pixel", AV_PIX_FMT_NB-1); }
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static void eval_cond_jmp(DisasContext *dc, TCGv pc_true, TCGv pc_false) { int l1; l1 = gen_new_label(); /* Conditional jmp. */ tcg_gen_mov_tl(cpu_SR[SR_PC], pc_false); tcg_gen_brcondi_tl(TCG_COND_EQ, env_btaken, 0, l1); tcg_gen_mov_tl(cpu_SR[SR_PC], pc_true); gen_set_label(l1); }
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void parse_numa_opts(MachineState *ms) { int i; const CPUArchIdList *possible_cpus; MachineClass *mc = MACHINE_GET_CLASS(ms); for (i = 0; i < MAX_NODES; i++) { numa_info[i].node_cpu = bitmap_new(max_cpus); } if (qemu_opts_foreach(qemu_find_opts("numa"), parse_numa, ms, NULL)) { exit(1); } assert(max_numa_nodeid <= MAX_NODES); /* No support for sparse NUMA node IDs yet: */ for (i = max_numa_nodeid - 1; i >= 0; i--) { /* Report large node IDs first, to make mistakes easier to spot */ if (!numa_info[i].present) { error_report("numa: Node ID missing: %d", i); exit(1); } } /* This must be always true if all nodes are present: */ assert(nb_numa_nodes == max_numa_nodeid); if (nb_numa_nodes > 0) { uint64_t numa_total; if (nb_numa_nodes > MAX_NODES) { nb_numa_nodes = MAX_NODES; } /* If no memory size is given for any node, assume the default case * and distribute the available memory equally across all nodes */ for (i = 0; i < nb_numa_nodes; i++) { if (numa_info[i].node_mem != 0) { break; } } if (i == nb_numa_nodes) { assert(mc->numa_auto_assign_ram); mc->numa_auto_assign_ram(mc, numa_info, nb_numa_nodes, ram_size); } numa_total = 0; for (i = 0; i < nb_numa_nodes; i++) { numa_total += numa_info[i].node_mem; } if (numa_total != ram_size) { error_report("total memory for NUMA nodes (0x%" PRIx64 ")" " should equal RAM size (0x" RAM_ADDR_FMT ")", numa_total, ram_size); exit(1); } for (i = 0; i < nb_numa_nodes; i++) { QLIST_INIT(&numa_info[i].addr); } numa_set_mem_ranges(); /* assign CPUs to nodes using board provided default mapping */ if (!mc->cpu_index_to_instance_props || !mc->possible_cpu_arch_ids) { error_report("default CPUs to NUMA node mapping isn't supported"); exit(1); } possible_cpus = mc->possible_cpu_arch_ids(ms); for (i = 0; i < possible_cpus->len; i++) { if (possible_cpus->cpus[i].props.has_node_id) { break; } } /* no CPUs are assigned to NUMA nodes */ if (i == possible_cpus->len) { for (i = 0; i < max_cpus; i++) { CpuInstanceProperties props; /* fetch default mapping from board and enable it */ props = mc->cpu_index_to_instance_props(ms, i); props.has_node_id = true; set_bit(i, numa_info[props.node_id].node_cpu); machine_set_cpu_numa_node(ms, &props, &error_fatal); } } validate_numa_cpus(); /* QEMU needs at least all unique node pair distances to build * the whole NUMA distance table. QEMU treats the distance table * as symmetric by default, i.e. distance A->B == distance B->A. * Thus, QEMU is able to complete the distance table * initialization even though only distance A->B is provided and * distance B->A is not. QEMU knows the distance of a node to * itself is always 10, so A->A distances may be omitted. When * the distances of two nodes of a pair differ, i.e. distance * A->B != distance B->A, then that means the distance table is * asymmetric. In this case, the distances for both directions * of all node pairs are required. */ if (have_numa_distance) { /* Validate enough NUMA distance information was provided. */ validate_numa_distance(); /* Validation succeeded, now fill in any missing distances. */ complete_init_numa_distance(); } } else { numa_set_mem_node_id(0, ram_size, 0); } }
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void tcg_dump_ops(TCGContext *s) { char buf[128]; TCGOp *op; int oi; for (oi = s->gen_first_op_idx; oi >= 0; oi = op->next) { int i, k, nb_oargs, nb_iargs, nb_cargs; const TCGOpDef *def; const TCGArg *args; TCGOpcode c; op = &s->gen_op_buf[oi]; c = op->opc; def = &tcg_op_defs[c]; args = &s->gen_opparam_buf[op->args]; if (c == INDEX_op_insn_start) { qemu_log("%s ----", oi != s->gen_first_op_idx ? "\n" : ""); for (i = 0; i < TARGET_INSN_START_WORDS; ++i) { target_ulong a; #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS a = ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2]; #else a = args[i]; #endif qemu_log(" " TARGET_FMT_lx, a); } } else if (c == INDEX_op_call) { /* variable number of arguments */ nb_oargs = op->callo; nb_iargs = op->calli; nb_cargs = def->nb_cargs; /* function name, flags, out args */ qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name, tcg_find_helper(s, args[nb_oargs + nb_iargs]), args[nb_oargs + nb_iargs + 1], nb_oargs); for (i = 0; i < nb_oargs; i++) { qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), args[i])); } for (i = 0; i < nb_iargs; i++) { TCGArg arg = args[nb_oargs + i]; const char *t = "<dummy>"; if (arg != TCG_CALL_DUMMY_ARG) { t = tcg_get_arg_str_idx(s, buf, sizeof(buf), arg); } qemu_log(",%s", t); } } else { qemu_log(" %s ", def->name); nb_oargs = def->nb_oargs; nb_iargs = def->nb_iargs; nb_cargs = def->nb_cargs; k = 0; for (i = 0; i < nb_oargs; i++) { if (k != 0) { qemu_log(","); } qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++])); } for (i = 0; i < nb_iargs; i++) { if (k != 0) { qemu_log(","); } qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++])); } switch (c) { case INDEX_op_brcond_i32: case INDEX_op_setcond_i32: case INDEX_op_movcond_i32: case INDEX_op_brcond2_i32: case INDEX_op_setcond2_i32: case INDEX_op_brcond_i64: case INDEX_op_setcond_i64: case INDEX_op_movcond_i64: if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]]) { qemu_log(",%s", cond_name[args[k++]]); } else { qemu_log(",$0x%" TCG_PRIlx, args[k++]); } i = 1; break; case INDEX_op_qemu_ld_i32: case INDEX_op_qemu_st_i32: case INDEX_op_qemu_ld_i64: case INDEX_op_qemu_st_i64: { TCGMemOpIdx oi = args[k++]; TCGMemOp op = get_memop(oi); unsigned ix = get_mmuidx(oi); if (op & ~(MO_AMASK | MO_BSWAP | MO_SSIZE)) { qemu_log(",$0x%x,%u", op, ix); } else { const char *s_al = "", *s_op; if (op & MO_AMASK) { if ((op & MO_AMASK) == MO_ALIGN) { s_al = "al+"; } else { s_al = "un+"; } } s_op = ldst_name[op & (MO_BSWAP | MO_SSIZE)]; qemu_log(",%s%s,%u", s_al, s_op, ix); } i = 1; } break; default: i = 0; break; } switch (c) { case INDEX_op_set_label: case INDEX_op_br: case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: case INDEX_op_brcond2_i32: qemu_log("%s$L%d", k ? "," : "", arg_label(args[k])->id); i++, k++; break; default: break; } for (; i < nb_cargs; i++, k++) { qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k]); } } qemu_log("\n"); } }
13,507
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static void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp) { CPUPPCState *env = &cpu->env; /* Set time-base frequency to 512 MHz */ cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ); /* Enable PAPR mode in TCG or KVM */ cpu_ppc_set_papr(cpu, PPC_VIRTUAL_HYPERVISOR(spapr)); if (spapr->max_compat_pvr) { Error *local_err = NULL; ppc_set_compat(cpu, spapr->max_compat_pvr, &local_err); if (local_err) { error_propagate(errp, local_err); return; } } qemu_register_reset(spapr_cpu_reset, cpu); spapr_cpu_reset(cpu); }
13,508
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uint32_t HELPER(lcdbr)(CPUS390XState *env, uint32_t f1, uint32_t f2) { env->fregs[f1].d = float64_chs(env->fregs[f2].d); return set_cc_nz_f64(env->fregs[f1].d); }
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static int no_run_out (HWVoiceOut *hw, int live) { NoVoiceOut *no = (NoVoiceOut *) hw; int decr, samples; int64_t now; int64_t ticks; int64_t bytes; now = qemu_get_clock (vm_clock); ticks = now - no->old_ticks; bytes = muldiv64 (ticks, hw->info.bytes_per_second, get_ticks_per_sec ()); bytes = audio_MIN (bytes, INT_MAX); samples = bytes >> hw->info.shift; no->old_ticks = now; decr = audio_MIN (live, samples); hw->rpos = (hw->rpos + decr) % hw->samples; return decr; }
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void do_interrupt(int intno, int is_int, int error_code, unsigned int next_eip, int is_hw) { #ifdef DEBUG_PCALL if (loglevel) { static int count; fprintf(logfile, "%d: interrupt: vector=%02x error_code=%04x int=%d\n", count, intno, error_code, is_int); cpu_x86_dump_state(env, logfile, X86_DUMP_CCOP); #if 0 { int i; uint8_t *ptr; printf(" code="); ptr = env->segs[R_CS].base + env->eip; for(i = 0; i < 16; i++) { printf(" %02x", ldub(ptr + i)); } printf("\n"); } #endif count++; } #endif if (env->cr[0] & CR0_PE_MASK) { do_interrupt_protected(intno, is_int, error_code, next_eip, is_hw); } else { do_interrupt_real(intno, is_int, error_code, next_eip); } }
13,511
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static void coroutine_fn wait_for_overlapping_requests(BlockDriverState *bs, int64_t offset, unsigned int bytes) { BdrvTrackedRequest *req; int64_t cluster_offset; unsigned int cluster_bytes; bool retry; /* If we touch the same cluster it counts as an overlap. This guarantees * that allocating writes will be serialized and not race with each other * for the same cluster. For example, in copy-on-read it ensures that the * CoR read and write operations are atomic and guest writes cannot * interleave between them. */ round_bytes_to_clusters(bs, offset, bytes, &cluster_offset, &cluster_bytes); do { retry = false; QLIST_FOREACH(req, &bs->tracked_requests, list) { if (tracked_request_overlaps(req, cluster_offset, cluster_bytes)) { /* Hitting this means there was a reentrant request, for * example, a block driver issuing nested requests. This must * never happen since it means deadlock. */ assert(qemu_coroutine_self() != req->co); qemu_co_queue_wait(&req->wait_queue); retry = true; break; } } } while (retry); }
13,512
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static int parse_source_parameters(AVCodecContext *avctx, GetBitContext *gb, dirac_source_params *source) { AVRational frame_rate = {0,0}; unsigned luma_depth = 8, luma_offset = 16; int idx; int chroma_x_shift, chroma_y_shift; /* [DIRAC_STD] 10.3.2 Frame size. frame_size(video_params) */ /* [DIRAC_STD] custom_dimensions_flag */ if (get_bits1(gb)) { source->width = svq3_get_ue_golomb(gb); /* [DIRAC_STD] FRAME_WIDTH */ source->height = svq3_get_ue_golomb(gb); /* [DIRAC_STD] FRAME_HEIGHT */ } /* [DIRAC_STD] 10.3.3 Chroma Sampling Format. * chroma_sampling_format(video_params) */ /* [DIRAC_STD] custom_chroma_format_flag */ if (get_bits1(gb)) /* [DIRAC_STD] CHROMA_FORMAT_INDEX */ source->chroma_format = svq3_get_ue_golomb(gb); if (source->chroma_format > 2U) { av_log(avctx, AV_LOG_ERROR, "Unknown chroma format %d\n", source->chroma_format); return AVERROR_INVALIDDATA; } /* [DIRAC_STD] 10.3.4 Scan Format. scan_format(video_params) */ /* [DIRAC_STD] custom_scan_format_flag */ if (get_bits1(gb)) /* [DIRAC_STD] SOURCE_SAMPLING */ source->interlaced = svq3_get_ue_golomb(gb); if (source->interlaced > 1U) return AVERROR_INVALIDDATA; /* [DIRAC_STD] 10.3.5 Frame Rate. frame_rate(video_params) */ if (get_bits1(gb)) { /* [DIRAC_STD] custom_frame_rate_flag */ source->frame_rate_index = svq3_get_ue_golomb(gb); if (source->frame_rate_index > 10U) return AVERROR_INVALIDDATA; if (!source->frame_rate_index) { /* [DIRAC_STD] FRAME_RATE_NUMER */ frame_rate.num = svq3_get_ue_golomb(gb); /* [DIRAC_STD] FRAME_RATE_DENOM */ frame_rate.den = svq3_get_ue_golomb(gb); } } /* [DIRAC_STD] preset_frame_rate(video_params, index) */ if (source->frame_rate_index > 0) { if (source->frame_rate_index <= 8) frame_rate = ff_mpeg12_frame_rate_tab[source->frame_rate_index]; else /* [DIRAC_STD] Table 10.3 values 9-10 */ frame_rate = dirac_frame_rate[source->frame_rate_index-9]; } av_reduce(&avctx->time_base.num, &avctx->time_base.den, frame_rate.den, frame_rate.num, 1<<30); /* [DIRAC_STD] 10.3.6 Pixel Aspect Ratio. * pixel_aspect_ratio(video_params) */ if (get_bits1(gb)) { /* [DIRAC_STD] custom_pixel_aspect_ratio_flag */ /* [DIRAC_STD] index */ source->aspect_ratio_index = svq3_get_ue_golomb(gb); if (source->aspect_ratio_index > 6U) return AVERROR_INVALIDDATA; if (!source->aspect_ratio_index) { avctx->sample_aspect_ratio.num = svq3_get_ue_golomb(gb); avctx->sample_aspect_ratio.den = svq3_get_ue_golomb(gb); } } /* [DIRAC_STD] Take value from Table 10.4 Available preset pixel * aspect ratio values */ if (source->aspect_ratio_index > 0) avctx->sample_aspect_ratio = dirac_preset_aspect_ratios[source->aspect_ratio_index-1]; /* [DIRAC_STD] 10.3.7 Clean area. clean_area(video_params) */ if (get_bits1(gb)) { /* [DIRAC_STD] custom_clean_area_flag */ /* [DIRAC_STD] CLEAN_WIDTH */ source->clean_width = svq3_get_ue_golomb(gb); /* [DIRAC_STD] CLEAN_HEIGHT */ source->clean_height = svq3_get_ue_golomb(gb); /* [DIRAC_STD] CLEAN_LEFT_OFFSET */ source->clean_left_offset = svq3_get_ue_golomb(gb); /* [DIRAC_STD] CLEAN_RIGHT_OFFSET */ source->clean_right_offset = svq3_get_ue_golomb(gb); } /* [DIRAC_STD] 10.3.8 Signal range. signal_range(video_params) * WARNING: Some adaptation seems to be done using the * AVCOL_RANGE_MPEG/JPEG values */ if (get_bits1(gb)) { /* [DIRAC_STD] custom_signal_range_flag */ /* [DIRAC_STD] index */ source->pixel_range_index = svq3_get_ue_golomb(gb); if (source->pixel_range_index > 4U) return AVERROR_INVALIDDATA; /* This assumes either fullrange or MPEG levels only */ if (!source->pixel_range_index) { luma_offset = svq3_get_ue_golomb(gb); luma_depth = av_log2(svq3_get_ue_golomb(gb))+1; svq3_get_ue_golomb(gb); /* chroma offset */ svq3_get_ue_golomb(gb); /* chroma excursion */ avctx->color_range = luma_offset ? AVCOL_RANGE_MPEG : AVCOL_RANGE_JPEG; } } /* [DIRAC_STD] Table 10.5 * Available signal range presets <--> pixel_range_presets */ if (source->pixel_range_index > 0) { idx = source->pixel_range_index-1; luma_depth = pixel_range_presets[idx].bitdepth; avctx->color_range = pixel_range_presets[idx].color_range; } if (luma_depth > 8) av_log(avctx, AV_LOG_WARNING, "Bitdepth greater than 8\n"); avctx->pix_fmt = dirac_pix_fmt[!luma_offset][source->chroma_format]; avcodec_get_chroma_sub_sample(avctx->pix_fmt, &chroma_x_shift, &chroma_y_shift); if (!(source->width % (1<<chroma_x_shift)) || !(source->height % (1<<chroma_y_shift))) { av_log(avctx, AV_LOG_ERROR, "Dimensions must be a integer multiply of the chroma subsampling\n"); return AVERROR_INVALIDDATA; } /* [DIRAC_STD] 10.3.9 Colour specification. colour_spec(video_params) */ if (get_bits1(gb)) { /* [DIRAC_STD] custom_colour_spec_flag */ /* [DIRAC_STD] index */ idx = source->color_spec_index = svq3_get_ue_golomb(gb); if (source->color_spec_index > 4U) return AVERROR_INVALIDDATA; avctx->color_primaries = dirac_color_presets[idx].color_primaries; avctx->colorspace = dirac_color_presets[idx].colorspace; avctx->color_trc = dirac_color_presets[idx].color_trc; if (!source->color_spec_index) { /* [DIRAC_STD] 10.3.9.1 Colour primaries */ if (get_bits1(gb)) { idx = svq3_get_ue_golomb(gb); if (idx < 3U) avctx->color_primaries = dirac_primaries[idx]; } /* [DIRAC_STD] 10.3.9.2 Colour matrix */ if (get_bits1(gb)) { idx = svq3_get_ue_golomb(gb); if (!idx) avctx->colorspace = AVCOL_SPC_BT709; else if (idx == 1) avctx->colorspace = AVCOL_SPC_BT470BG; } /* [DIRAC_STD] 10.3.9.3 Transfer function */ if (get_bits1(gb) && !svq3_get_ue_golomb(gb)) avctx->color_trc = AVCOL_TRC_BT709; } } else { idx = source->color_spec_index; avctx->color_primaries = dirac_color_presets[idx].color_primaries; avctx->colorspace = dirac_color_presets[idx].colorspace; avctx->color_trc = dirac_color_presets[idx].color_trc; } return 0; }
13,514
0
static void grlib_gptimer_write(void *opaque, target_phys_addr_t addr, uint64_t value, unsigned size) { GPTimerUnit *unit = opaque; target_phys_addr_t timer_addr; int id; addr &= 0xff; /* Unit registers */ switch (addr) { case SCALER_OFFSET: value &= 0xFFFF; /* clean up the value */ unit->scaler = value; trace_grlib_gptimer_writel(-1, addr, unit->scaler); return; case SCALER_RELOAD_OFFSET: value &= 0xFFFF; /* clean up the value */ unit->reload = value; trace_grlib_gptimer_writel(-1, addr, unit->reload); grlib_gptimer_set_scaler(unit, value); return; case CONFIG_OFFSET: /* Read Only (disable timer freeze not supported) */ trace_grlib_gptimer_writel(-1, addr, 0); return; default: break; } timer_addr = (addr % TIMER_BASE); id = (addr - TIMER_BASE) / TIMER_BASE; if (id >= 0 && id < unit->nr_timers) { /* GPTimer registers */ switch (timer_addr) { case COUNTER_OFFSET: trace_grlib_gptimer_writel(id, addr, value); unit->timers[id].counter = value; grlib_gptimer_enable(&unit->timers[id]); return; case COUNTER_RELOAD_OFFSET: trace_grlib_gptimer_writel(id, addr, value); unit->timers[id].reload = value; return; case CONFIG_OFFSET: trace_grlib_gptimer_writel(id, addr, value); if (value & GPTIMER_INT_PENDING) { /* clear pending bit */ value &= ~GPTIMER_INT_PENDING; } else { /* keep pending bit */ value |= unit->timers[id].config & GPTIMER_INT_PENDING; } unit->timers[id].config = value; /* gptimer_restart calls gptimer_enable, so if "enable" and "load" bits are present, we just have to call restart. */ if (value & GPTIMER_LOAD) { grlib_gptimer_restart(&unit->timers[id]); } else if (value & GPTIMER_ENABLE) { grlib_gptimer_enable(&unit->timers[id]); } /* These fields must always be read as 0 */ value &= ~(GPTIMER_LOAD & GPTIMER_DEBUG_HALT); unit->timers[id].config = value; return; default: break; } } trace_grlib_gptimer_writel(-1, addr, value); }
13,516
0
static bool cmd_write_multiple(IDEState *s, uint8_t cmd) { bool lba48 = (cmd == WIN_MULTWRITE_EXT); int n; if (!s->bs || !s->mult_sectors) { ide_abort_command(s); return true; } ide_cmd_lba48_transform(s, lba48); s->req_nb_sectors = s->mult_sectors; n = MIN(s->nsector, s->req_nb_sectors); s->status = SEEK_STAT | READY_STAT; ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write); s->media_changed = 1; return false; }
13,518
0
static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin) { PCIDevice *pxb = pci_dev->bus->parent_dev; /* * The bios does not index the pxb slot number when * it computes the IRQ because it resides on bus 0 * and not on the current bus. * However QEMU routes the irq through bus 0 and adds * the pxb slot to the IRQ computation of the PXB * device. * * Synchronize between bios and QEMU by canceling * pxb's effect. */ return pin - PCI_SLOT(pxb->devfn); }
13,519
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static int flac_read_header(AVFormatContext *s, AVFormatParameters *ap) { int ret, metadata_last=0, metadata_type, metadata_size, found_streaminfo=0; uint8_t header[4]; uint8_t *buffer=NULL; AVStream *st = avformat_new_stream(s, NULL); if (!st) return AVERROR(ENOMEM); st->codec->codec_type = AVMEDIA_TYPE_AUDIO; st->codec->codec_id = CODEC_ID_FLAC; st->need_parsing = AVSTREAM_PARSE_FULL; /* the parameters will be extracted from the compressed bitstream */ /* if fLaC marker is not found, assume there is no header */ if (avio_rl32(s->pb) != MKTAG('f','L','a','C')) { avio_seek(s->pb, -4, SEEK_CUR); return 0; } /* process metadata blocks */ while (!s->pb->eof_reached && !metadata_last) { avio_read(s->pb, header, 4); avpriv_flac_parse_block_header(header, &metadata_last, &metadata_type, &metadata_size); switch (metadata_type) { /* allocate and read metadata block for supported types */ case FLAC_METADATA_TYPE_STREAMINFO: case FLAC_METADATA_TYPE_CUESHEET: case FLAC_METADATA_TYPE_VORBIS_COMMENT: buffer = av_mallocz(metadata_size + FF_INPUT_BUFFER_PADDING_SIZE); if (!buffer) { return AVERROR(ENOMEM); } if (avio_read(s->pb, buffer, metadata_size) != metadata_size) { av_freep(&buffer); return AVERROR(EIO); } break; /* skip metadata block for unsupported types */ default: ret = avio_skip(s->pb, metadata_size); if (ret < 0) return ret; } if (metadata_type == FLAC_METADATA_TYPE_STREAMINFO) { FLACStreaminfo si; /* STREAMINFO can only occur once */ if (found_streaminfo) { av_freep(&buffer); return AVERROR_INVALIDDATA; } if (metadata_size != FLAC_STREAMINFO_SIZE) { av_freep(&buffer); return AVERROR_INVALIDDATA; } found_streaminfo = 1; st->codec->extradata = buffer; st->codec->extradata_size = metadata_size; buffer = NULL; /* get codec params from STREAMINFO header */ avpriv_flac_parse_streaminfo(st->codec, &si, st->codec->extradata); /* set time base and duration */ if (si.samplerate > 0) { avpriv_set_pts_info(st, 64, 1, si.samplerate); if (si.samples > 0) st->duration = si.samples; } } else if (metadata_type == FLAC_METADATA_TYPE_CUESHEET) { uint8_t isrc[13]; uint64_t start; const uint8_t *offset; int i, j, chapters, track, ti; if (metadata_size < 431) return AVERROR_INVALIDDATA; offset = buffer + 395; chapters = bytestream_get_byte(&offset) - 1; if (chapters <= 0) return AVERROR_INVALIDDATA; for (i = 0; i < chapters; i++) { if (offset + 36 - buffer > metadata_size) return AVERROR_INVALIDDATA; start = bytestream_get_be64(&offset); track = bytestream_get_byte(&offset); bytestream_get_buffer(&offset, isrc, 12); isrc[12] = 0; offset += 14; ti = bytestream_get_byte(&offset); if (ti <= 0) return AVERROR_INVALIDDATA; for (j = 0; j < ti; j++) offset += 12; avpriv_new_chapter(s, track, st->time_base, start, AV_NOPTS_VALUE, isrc); } } else { /* STREAMINFO must be the first block */ if (!found_streaminfo) { av_freep(&buffer); return AVERROR_INVALIDDATA; } /* process supported blocks other than STREAMINFO */ if (metadata_type == FLAC_METADATA_TYPE_VORBIS_COMMENT) { if (ff_vorbis_comment(s, &s->metadata, buffer, metadata_size)) { av_log(s, AV_LOG_WARNING, "error parsing VorbisComment metadata\n"); } } av_freep(&buffer); } } return 0; }
13,520
0
static void vc1_loop_filter(uint8_t* src, int step, int stride, int len, int pq) { int i; int filt3; for(i = 0; i < len; i += 4){ filt3 = vc1_filter_line(src + 2*step, stride, pq); if(filt3){ vc1_filter_line(src + 0*step, stride, pq); vc1_filter_line(src + 1*step, stride, pq); vc1_filter_line(src + 3*step, stride, pq); } src += step * 4; } }
13,522
0
static av_cold int nvenc_open_session(AVCodecContext *avctx) { NvencContext *ctx = avctx->priv_data; NvencDynLoadFunctions *dl_fn = &ctx->nvenc_dload_funcs; NV_ENCODE_API_FUNCTION_LIST *p_nvenc = &dl_fn->nvenc_funcs; NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS encode_session_params = { 0 }; NVENCSTATUS nv_status; encode_session_params.version = NV_ENC_OPEN_ENCODE_SESSION_EX_PARAMS_VER; encode_session_params.apiVersion = NVENCAPI_VERSION; encode_session_params.device = ctx->cu_context; encode_session_params.deviceType = NV_ENC_DEVICE_TYPE_CUDA; nv_status = p_nvenc->nvEncOpenEncodeSessionEx(&encode_session_params, &ctx->nvencoder); if (nv_status != NV_ENC_SUCCESS) { ctx->nvencoder = NULL; return nvenc_print_error(avctx, nv_status, "OpenEncodeSessionEx failed"); } return 0; }
13,523
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static int parse_playlist(HLSContext *c, const char *url, struct variant *var, AVIOContext *in) { int ret = 0, is_segment = 0, is_variant = 0, bandwidth = 0; int64_t duration = 0; enum KeyType key_type = KEY_NONE; uint8_t iv[16] = ""; int has_iv = 0; char key[MAX_URL_SIZE] = ""; char line[1024]; const char *ptr; int close_in = 0; uint8_t *new_url = NULL; if (!in) { close_in = 1; if ((ret = avio_open2(&in, url, AVIO_FLAG_READ, c->interrupt_callback, NULL)) < 0) return ret; } if (av_opt_get(in, "location", AV_OPT_SEARCH_CHILDREN, &new_url) >= 0) url = new_url; read_chomp_line(in, line, sizeof(line)); if (strcmp(line, "#EXTM3U")) { ret = AVERROR_INVALIDDATA; goto fail; } if (var) { free_segment_list(var); var->finished = 0; } while (!in->eof_reached) { read_chomp_line(in, line, sizeof(line)); if (av_strstart(line, "#EXT-X-STREAM-INF:", &ptr)) { struct variant_info info = {{0}}; is_variant = 1; ff_parse_key_value(ptr, (ff_parse_key_val_cb) handle_variant_args, &info); bandwidth = atoi(info.bandwidth); } else if (av_strstart(line, "#EXT-X-KEY:", &ptr)) { struct key_info info = {{0}}; ff_parse_key_value(ptr, (ff_parse_key_val_cb) handle_key_args, &info); key_type = KEY_NONE; has_iv = 0; if (!strcmp(info.method, "AES-128")) key_type = KEY_AES_128; if (!strncmp(info.iv, "0x", 2) || !strncmp(info.iv, "0X", 2)) { ff_hex_to_data(iv, info.iv + 2); has_iv = 1; } av_strlcpy(key, info.uri, sizeof(key)); } else if (av_strstart(line, "#EXT-X-TARGETDURATION:", &ptr)) { if (!var) { var = new_variant(c, 0, url, NULL); if (!var) { ret = AVERROR(ENOMEM); goto fail; } } var->target_duration = atoi(ptr) * AV_TIME_BASE; } else if (av_strstart(line, "#EXT-X-MEDIA-SEQUENCE:", &ptr)) { if (!var) { var = new_variant(c, 0, url, NULL); if (!var) { ret = AVERROR(ENOMEM); goto fail; } } var->start_seq_no = atoi(ptr); } else if (av_strstart(line, "#EXT-X-ENDLIST", &ptr)) { if (var) var->finished = 1; } else if (av_strstart(line, "#EXTINF:", &ptr)) { is_segment = 1; duration = atof(ptr) * AV_TIME_BASE; } else if (av_strstart(line, "#", NULL)) { continue; } else if (line[0]) { if (is_variant) { if (!new_variant(c, bandwidth, line, url)) { ret = AVERROR(ENOMEM); goto fail; } is_variant = 0; bandwidth = 0; } if (is_segment) { struct segment *seg; if (!var) { var = new_variant(c, 0, url, NULL); if (!var) { ret = AVERROR(ENOMEM); goto fail; } } seg = av_malloc(sizeof(struct segment)); if (!seg) { ret = AVERROR(ENOMEM); goto fail; } seg->duration = duration; seg->key_type = key_type; if (has_iv) { memcpy(seg->iv, iv, sizeof(iv)); } else { int seq = var->start_seq_no + var->n_segments; memset(seg->iv, 0, sizeof(seg->iv)); AV_WB32(seg->iv + 12, seq); } ff_make_absolute_url(seg->key, sizeof(seg->key), url, key); ff_make_absolute_url(seg->url, sizeof(seg->url), url, line); dynarray_add(&var->segments, &var->n_segments, seg); is_segment = 0; } } } if (var) var->last_load_time = av_gettime_relative(); fail: av_free(new_url); if (close_in) avio_close(in); return ret; }
13,525
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static int decode_mb_i(AVSContext *h, int cbp_code) { GetBitContext *gb = &h->s.gb; int block, pred_mode_uv; uint8_t top[18]; uint8_t *left = NULL; uint8_t *d; ff_cavs_init_mb(h); /* get intra prediction modes from stream */ for(block=0;block<4;block++) { int nA,nB,predpred; int pos = ff_cavs_scan3x3[block]; nA = h->pred_mode_Y[pos-1]; nB = h->pred_mode_Y[pos-3]; predpred = FFMIN(nA,nB); if(predpred == NOT_AVAIL) // if either is not available predpred = INTRA_L_LP; if(!get_bits1(gb)){ int rem_mode= get_bits(gb, 2); predpred = rem_mode + (rem_mode >= predpred); } h->pred_mode_Y[pos] = predpred; } pred_mode_uv = get_ue_golomb(gb); if(pred_mode_uv > 6) { av_log(h->s.avctx, AV_LOG_ERROR, "illegal intra chroma pred mode\n"); return -1; } ff_cavs_modify_mb_i(h, &pred_mode_uv); /* get coded block pattern */ if(h->pic_type == AV_PICTURE_TYPE_I) cbp_code = get_ue_golomb(gb); if(cbp_code > 63){ av_log(h->s.avctx, AV_LOG_ERROR, "illegal intra cbp\n"); return -1; } h->cbp = cbp_tab[cbp_code][0]; if(h->cbp && !h->qp_fixed) h->qp = (h->qp + get_se_golomb(gb)) & 63; //qp_delta /* luma intra prediction interleaved with residual decode/transform/add */ for(block=0;block<4;block++) { d = h->cy + h->luma_scan[block]; ff_cavs_load_intra_pred_luma(h, top, &left, block); h->intra_pred_l[h->pred_mode_Y[ff_cavs_scan3x3[block]]] (d, top, left, h->l_stride); if(h->cbp & (1<<block)) decode_residual_block(h,gb,ff_cavs_intra_dec,1,h->qp,d,h->l_stride); } /* chroma intra prediction */ ff_cavs_load_intra_pred_chroma(h); h->intra_pred_c[pred_mode_uv](h->cu, &h->top_border_u[h->mbx*10], h->left_border_u, h->c_stride); h->intra_pred_c[pred_mode_uv](h->cv, &h->top_border_v[h->mbx*10], h->left_border_v, h->c_stride); decode_residual_chroma(h); ff_cavs_filter(h,I_8X8); set_mv_intra(h); return 0; }
13,526
1
static void test_visitor_in_alternate(TestInputVisitorData *data, const void *unused) { Visitor *v; Error *err = NULL; UserDefAlternate *tmp; v = visitor_input_test_init(data, "42"); visit_type_UserDefAlternate(v, &tmp, NULL, &error_abort); g_assert_cmpint(tmp->type, ==, USER_DEF_ALTERNATE_KIND_I); g_assert_cmpint(tmp->u.i, ==, 42); qapi_free_UserDefAlternate(tmp); v = visitor_input_test_init(data, "'string'"); visit_type_UserDefAlternate(v, &tmp, NULL, &error_abort); g_assert_cmpint(tmp->type, ==, USER_DEF_ALTERNATE_KIND_S); g_assert_cmpstr(tmp->u.s, ==, "string"); qapi_free_UserDefAlternate(tmp); v = visitor_input_test_init(data, "false"); visit_type_UserDefAlternate(v, &tmp, NULL, &err); g_assert(err); error_free(err); err = NULL; qapi_free_UserDefAlternate(tmp); }
13,527
1
void qht_statistics_init(struct qht *ht, struct qht_stats *stats) { struct qht_map *map; int i; map = atomic_rcu_read(&ht->map); stats->head_buckets = map->n_buckets; stats->used_head_buckets = 0; stats->entries = 0; qdist_init(&stats->chain); qdist_init(&stats->occupancy); for (i = 0; i < map->n_buckets; i++) { struct qht_bucket *head = &map->buckets[i]; struct qht_bucket *b; unsigned int version; size_t buckets; size_t entries; int j; do { version = seqlock_read_begin(&head->sequence); buckets = 0; entries = 0; b = head; do { for (j = 0; j < QHT_BUCKET_ENTRIES; j++) { if (atomic_read(&b->pointers[j]) == NULL) { break; } entries++; } buckets++; b = atomic_rcu_read(&b->next); } while (b); } while (seqlock_read_retry(&head->sequence, version)); if (entries) { qdist_inc(&stats->chain, buckets); qdist_inc(&stats->occupancy, (double)entries / QHT_BUCKET_ENTRIES / buckets); stats->used_head_buckets++; stats->entries += entries; } else { qdist_inc(&stats->occupancy, 0); } } }
13,528
1
void qemu_system_vmstop_request(RunState state) { vmstop_requested = state; qemu_notify_event(); }
13,530
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static int decode_bmv_frame(const uint8_t *source, int src_len, uint8_t *frame, int frame_off) { unsigned val, saved_val = 0; int tmplen = src_len; const uint8_t *src, *source_end = source + src_len; uint8_t *frame_end = frame + SCREEN_WIDE * SCREEN_HIGH; uint8_t *dst, *dst_end; int len, mask; int forward = (frame_off <= -SCREEN_WIDE) || (frame_off >= 0); int read_two_nibbles, flag; int advance_mode; int mode = 0; int i; if (src_len <= 0) return AVERROR_INVALIDDATA; if (forward) { src = source; dst = frame; dst_end = frame_end; } else { src = source + src_len - 1; dst = frame_end - 1; dst_end = frame - 1; } for (;;) { int shift = 0; flag = 0; /* The mode/len decoding is a bit strange: * values are coded as variable-length codes with nibble units, * code end is signalled by two top bits in the nibble being nonzero. * And since data is bytepacked and we read two nibbles at a time, * we may get a nibble belonging to the next code. * Hence this convoluted loop. */ if (!mode || (tmplen == 4)) { if (src < source || src >= source_end) return AVERROR_INVALIDDATA; val = *src; read_two_nibbles = 1; } else { val = saved_val; read_two_nibbles = 0; } if (!(val & 0xC)) { for (;;) { if(shift>22) return -1; if (!read_two_nibbles) { if (src < source || src >= source_end) return AVERROR_INVALIDDATA; shift += 2; val |= *src << shift; if (*src & 0xC) break; } // two upper bits of the nibble is zero, // so shift top nibble value down into their place read_two_nibbles = 0; shift += 2; mask = (1 << shift) - 1; val = ((val >> 2) & ~mask) | (val & mask); NEXT_BYTE(src); if ((val & (0xC << shift))) { flag = 1; break; } } } else if (mode) { flag = tmplen != 4; } if (flag) { tmplen = 4; } else { saved_val = val >> (4 + shift); tmplen = 0; val &= (1 << (shift + 4)) - 1; NEXT_BYTE(src); } advance_mode = val & 1; len = (val >> 1) - 1; av_assert0(len>0); mode += 1 + advance_mode; if (mode >= 4) mode -= 3; if (len <= 0 || FFABS(dst_end - dst) < len) return AVERROR_INVALIDDATA; switch (mode) { case 1: if (forward) { if (dst - frame + SCREEN_WIDE < frame_off || dst - frame + SCREEN_WIDE + frame_off < 0 || frame_end - dst < frame_off + len || frame_end - dst < len) return AVERROR_INVALIDDATA; for (i = 0; i < len; i++) dst[i] = dst[frame_off + i]; dst += len; } else { dst -= len; if (dst - frame + SCREEN_WIDE < frame_off || dst - frame + SCREEN_WIDE + frame_off < 0 || frame_end - dst < frame_off + len || frame_end - dst < len) return AVERROR_INVALIDDATA; for (i = len - 1; i >= 0; i--) dst[i] = dst[frame_off + i]; } break; case 2: if (forward) { if (source + src_len - src < len) return AVERROR_INVALIDDATA; memcpy(dst, src, len); dst += len; src += len; } else { if (src - source < len) return AVERROR_INVALIDDATA; dst -= len; src -= len; memcpy(dst, src, len); } break; case 3: val = forward ? dst[-1] : dst[1]; if (forward) { memset(dst, val, len); dst += len; } else { dst -= len; memset(dst, val, len); } break; } if (dst == dst_end) return 0; } }
13,531
1
static size_t save_page_header(RAMState *rs, RAMBlock *block, ram_addr_t offset) { size_t size, len; if (block == rs->last_sent_block) { offset |= RAM_SAVE_FLAG_CONTINUE; } qemu_put_be64(rs->f, offset); size = 8; if (!(offset & RAM_SAVE_FLAG_CONTINUE)) { len = strlen(block->idstr); qemu_put_byte(rs->f, len); qemu_put_buffer(rs->f, (uint8_t *)block->idstr, len); size += 1 + len; rs->last_sent_block = block; } return size; }
13,532
1
static void ebus_mmio_mapfunc(PCIDevice *pci_dev, int region_num, pcibus_t addr, pcibus_t size, int type) { EBUS_DPRINTF("Mapping region %d registers at %" FMT_PCIBUS "\n", region_num, addr); switch (region_num) { case 0: isa_mmio_init(addr, 0x1000000); break; case 1: isa_mmio_init(addr, 0x800000); break; } }
13,533
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int ff_wma_end(AVCodecContext *avctx) { WMACodecContext *s = avctx->priv_data; int i; for(i = 0; i < s->nb_block_sizes; i++) ff_mdct_end(&s->mdct_ctx[i]); for(i = 0; i < s->nb_block_sizes; i++) av_free(s->windows[i]); if (s->use_exp_vlc) { free_vlc(&s->exp_vlc); } if (s->use_noise_coding) { free_vlc(&s->hgain_vlc); } for(i = 0;i < 2; i++) { free_vlc(&s->coef_vlc[i]); av_free(s->run_table[i]); av_free(s->level_table[i]); } return 0; }
13,534
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int ff_h264_ref_picture(H264Context *h, H264Picture *dst, H264Picture *src) { int ret, i; av_assert0(!dst->f->buf[0]); av_assert0(src->f->buf[0]); av_assert0(src->tf.f == src->f); dst->tf.f = dst->f; ret = ff_thread_ref_frame(&dst->tf, &src->tf); if (ret < 0) goto fail; dst->qscale_table_buf = av_buffer_ref(src->qscale_table_buf); dst->mb_type_buf = av_buffer_ref(src->mb_type_buf); if (!dst->qscale_table_buf || !dst->mb_type_buf) goto fail; dst->qscale_table = src->qscale_table; dst->mb_type = src->mb_type; for (i = 0; i < 2; i++) { dst->motion_val_buf[i] = av_buffer_ref(src->motion_val_buf[i]); dst->ref_index_buf[i] = av_buffer_ref(src->ref_index_buf[i]); if (!dst->motion_val_buf[i] || !dst->ref_index_buf[i]) goto fail; dst->motion_val[i] = src->motion_val[i]; dst->ref_index[i] = src->ref_index[i]; } if (src->hwaccel_picture_private) { dst->hwaccel_priv_buf = av_buffer_ref(src->hwaccel_priv_buf); if (!dst->hwaccel_priv_buf) goto fail; dst->hwaccel_picture_private = dst->hwaccel_priv_buf->data; } for (i = 0; i < 2; i++) dst->field_poc[i] = src->field_poc[i]; memcpy(dst->ref_poc, src->ref_poc, sizeof(src->ref_poc)); memcpy(dst->ref_count, src->ref_count, sizeof(src->ref_count)); dst->poc = src->poc; dst->frame_num = src->frame_num; dst->mmco_reset = src->mmco_reset; dst->long_ref = src->long_ref; dst->mbaff = src->mbaff; dst->field_picture = src->field_picture; dst->reference = src->reference; dst->recovered = src->recovered; dst->invalid_gap = src->invalid_gap; dst->sei_recovery_frame_cnt = src->sei_recovery_frame_cnt; return 0; fail: ff_h264_unref_picture(h, dst); return ret; }
13,535
1
static void arm926_initfn(Object *obj) { ARMCPU *cpu = ARM_CPU(obj); cpu->dtb_compatible = "arm,arm926"; set_feature(&cpu->env, ARM_FEATURE_V5); set_feature(&cpu->env, ARM_FEATURE_VFP); set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS); set_feature(&cpu->env, ARM_FEATURE_CACHE_TEST_CLEAN); cpu->midr = 0x41069265; cpu->reset_fpsid = 0x41011090; cpu->ctr = 0x1dd20d2; cpu->reset_sctlr = 0x00090078; }
13,536
1
static int get_cluster_offset(BlockDriverState *bs, VmdkExtent *extent, VmdkMetaData *m_data, uint64_t offset, bool allocate, uint64_t *cluster_offset, uint64_t skip_start_sector, uint64_t skip_end_sector) { unsigned int l1_index, l2_offset, l2_index; int min_index, i, j; uint32_t min_count, *l2_table; bool zeroed = false; int64_t ret; int32_t cluster_sector; if (m_data) { m_data->valid = 0; } if (extent->flat) { *cluster_offset = extent->flat_start_offset; return VMDK_OK; } offset -= (extent->end_sector - extent->sectors) * SECTOR_SIZE; l1_index = (offset >> 9) / extent->l1_entry_sectors; if (l1_index >= extent->l1_size) { return VMDK_ERROR; } l2_offset = extent->l1_table[l1_index]; if (!l2_offset) { return VMDK_UNALLOC; } for (i = 0; i < L2_CACHE_SIZE; i++) { if (l2_offset == extent->l2_cache_offsets[i]) { /* increment the hit count */ if (++extent->l2_cache_counts[i] == 0xffffffff) { for (j = 0; j < L2_CACHE_SIZE; j++) { extent->l2_cache_counts[j] >>= 1; } } l2_table = extent->l2_cache + (i * extent->l2_size); goto found; } } /* not found: load a new entry in the least used one */ min_index = 0; min_count = 0xffffffff; for (i = 0; i < L2_CACHE_SIZE; i++) { if (extent->l2_cache_counts[i] < min_count) { min_count = extent->l2_cache_counts[i]; min_index = i; } } l2_table = extent->l2_cache + (min_index * extent->l2_size); if (bdrv_pread( extent->file, (int64_t)l2_offset * 512, l2_table, extent->l2_size * sizeof(uint32_t) ) != extent->l2_size * sizeof(uint32_t)) { return VMDK_ERROR; } extent->l2_cache_offsets[min_index] = l2_offset; extent->l2_cache_counts[min_index] = 1; found: l2_index = ((offset >> 9) / extent->cluster_sectors) % extent->l2_size; cluster_sector = le32_to_cpu(l2_table[l2_index]); if (m_data) { m_data->valid = 1; m_data->l1_index = l1_index; m_data->l2_index = l2_index; m_data->l2_offset = l2_offset; m_data->l2_cache_entry = &l2_table[l2_index]; } if (extent->has_zero_grain && cluster_sector == VMDK_GTE_ZEROED) { zeroed = true; } if (!cluster_sector || zeroed) { if (!allocate) { return zeroed ? VMDK_ZEROED : VMDK_UNALLOC; } cluster_sector = extent->next_cluster_sector; extent->next_cluster_sector += extent->cluster_sectors; /* First of all we write grain itself, to avoid race condition * that may to corrupt the image. * This problem may occur because of insufficient space on host disk * or inappropriate VM shutdown. */ ret = get_whole_cluster(bs, extent, cluster_sector, offset >> BDRV_SECTOR_BITS, skip_start_sector, skip_end_sector); if (ret) { return ret; } } *cluster_offset = cluster_sector << BDRV_SECTOR_BITS; return VMDK_OK; }
13,537
1
static int check(AVIOContext *pb, int64_t pos, uint32_t *ret_header) { int64_t ret = avio_seek(pb, pos, SEEK_SET); uint8_t header_buf[4]; unsigned header; MPADecodeHeader sd; if (ret < 0) return CHECK_SEEK_FAILED; ret = avio_read(pb, &header_buf[0], 4); if (ret < 0) return CHECK_SEEK_FAILED; header = AV_RB32(&header_buf[0]); if (ff_mpa_check_header(header) < 0) return CHECK_WRONG_HEADER; if (avpriv_mpegaudio_decode_header(&sd, header) == 1) return CHECK_WRONG_HEADER; if (ret_header) *ret_header = header; return sd.frame_size; }
13,538
1
static uint64_t icp_pit_read(void *opaque, hwaddr offset, unsigned size) { icp_pit_state *s = (icp_pit_state *)opaque; int n; /* ??? Don't know the PrimeCell ID for this device. */ n = offset >> 8; if (n > 2) { qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad timer %d\n", __func__, n); } return arm_timer_read(s->timer[n], offset & 0xff); }
13,539
0
static void get_aac_sample_rates(AVFormatContext *s, AVCodecContext *codec, int *sample_rate, int *output_sample_rate) { MPEG4AudioConfig mp4ac; if (avpriv_mpeg4audio_get_config(&mp4ac, codec->extradata, codec->extradata_size * 8, 1) < 0) { av_log(s, AV_LOG_WARNING, "Error parsing AAC extradata, unable to determine samplerate.\n"); return; } *sample_rate = mp4ac.sample_rate; *output_sample_rate = mp4ac.ext_sample_rate; }
13,540
1
static void inter_recon(AVCodecContext *ctx) { static const uint8_t bwlog_tab[2][N_BS_SIZES] = { { 0, 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4 }, { 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 4, 4 }, }; VP9Context *s = ctx->priv_data; VP9Block *b = s->b; int row = s->row, col = s->col; ThreadFrame *tref1 = &s->refs[s->refidx[b->ref[0]]]; AVFrame *ref1 = tref1->f; ThreadFrame *tref2 = b->comp ? &s->refs[s->refidx[b->ref[1]]] : NULL; AVFrame *ref2 = b->comp ? tref2->f : NULL; int w = ctx->width, h = ctx->height; ptrdiff_t ls_y = s->y_stride, ls_uv = s->uv_stride; // y inter pred if (b->bs > BS_8x8) { if (b->bs == BS_8x4) { mc_luma_dir(s, s->dsp.mc[3][b->filter][0], s->dst[0], ls_y, ref1->data[0], ref1->linesize[0], tref1, row << 3, col << 3, &b->mv[0][0], 8, 4, w, h); mc_luma_dir(s, s->dsp.mc[3][b->filter][0], s->dst[0] + 4 * ls_y, ls_y, ref1->data[0], ref1->linesize[0], tref1, (row << 3) + 4, col << 3, &b->mv[2][0], 8, 4, w, h); if (b->comp) { mc_luma_dir(s, s->dsp.mc[3][b->filter][1], s->dst[0], ls_y, ref2->data[0], ref2->linesize[0], tref2, row << 3, col << 3, &b->mv[0][1], 8, 4, w, h); mc_luma_dir(s, s->dsp.mc[3][b->filter][1], s->dst[0] + 4 * ls_y, ls_y, ref2->data[0], ref2->linesize[0], tref2, (row << 3) + 4, col << 3, &b->mv[2][1], 8, 4, w, h); } } else if (b->bs == BS_4x8) { mc_luma_dir(s, s->dsp.mc[4][b->filter][0], s->dst[0], ls_y, ref1->data[0], ref1->linesize[0], tref1, row << 3, col << 3, &b->mv[0][0], 4, 8, w, h); mc_luma_dir(s, s->dsp.mc[4][b->filter][0], s->dst[0] + 4, ls_y, ref1->data[0], ref1->linesize[0], tref1, row << 3, (col << 3) + 4, &b->mv[1][0], 4, 8, w, h); if (b->comp) { mc_luma_dir(s, s->dsp.mc[4][b->filter][1], s->dst[0], ls_y, ref2->data[0], ref2->linesize[0], tref2, row << 3, col << 3, &b->mv[0][1], 4, 8, w, h); mc_luma_dir(s, s->dsp.mc[4][b->filter][1], s->dst[0] + 4, ls_y, ref2->data[0], ref2->linesize[0], tref2, row << 3, (col << 3) + 4, &b->mv[1][1], 4, 8, w, h); } } else { av_assert2(b->bs == BS_4x4); // FIXME if two horizontally adjacent blocks have the same MV, // do a w8 instead of a w4 call mc_luma_dir(s, s->dsp.mc[4][b->filter][0], s->dst[0], ls_y, ref1->data[0], ref1->linesize[0], tref1, row << 3, col << 3, &b->mv[0][0], 4, 4, w, h); mc_luma_dir(s, s->dsp.mc[4][b->filter][0], s->dst[0] + 4, ls_y, ref1->data[0], ref1->linesize[0], tref1, row << 3, (col << 3) + 4, &b->mv[1][0], 4, 4, w, h); mc_luma_dir(s, s->dsp.mc[4][b->filter][0], s->dst[0] + 4 * ls_y, ls_y, ref1->data[0], ref1->linesize[0], tref1, (row << 3) + 4, col << 3, &b->mv[2][0], 4, 4, w, h); mc_luma_dir(s, s->dsp.mc[4][b->filter][0], s->dst[0] + 4 * ls_y + 4, ls_y, ref1->data[0], ref1->linesize[0], tref1, (row << 3) + 4, (col << 3) + 4, &b->mv[3][0], 4, 4, w, h); if (b->comp) { mc_luma_dir(s, s->dsp.mc[4][b->filter][1], s->dst[0], ls_y, ref2->data[0], ref2->linesize[0], tref2, row << 3, col << 3, &b->mv[0][1], 4, 4, w, h); mc_luma_dir(s, s->dsp.mc[4][b->filter][1], s->dst[0] + 4, ls_y, ref2->data[0], ref2->linesize[0], tref2, row << 3, (col << 3) + 4, &b->mv[1][1], 4, 4, w, h); mc_luma_dir(s, s->dsp.mc[4][b->filter][1], s->dst[0] + 4 * ls_y, ls_y, ref2->data[0], ref2->linesize[0], tref2, (row << 3) + 4, col << 3, &b->mv[2][1], 4, 4, w, h); mc_luma_dir(s, s->dsp.mc[4][b->filter][1], s->dst[0] + 4 * ls_y + 4, ls_y, ref2->data[0], ref2->linesize[0], tref2, (row << 3) + 4, (col << 3) + 4, &b->mv[3][1], 4, 4, w, h); } } } else { int bwl = bwlog_tab[0][b->bs]; int bw = bwh_tab[0][b->bs][0] * 4, bh = bwh_tab[0][b->bs][1] * 4; mc_luma_dir(s, s->dsp.mc[bwl][b->filter][0], s->dst[0], ls_y, ref1->data[0], ref1->linesize[0], tref1, row << 3, col << 3, &b->mv[0][0],bw, bh, w, h); if (b->comp) mc_luma_dir(s, s->dsp.mc[bwl][b->filter][1], s->dst[0], ls_y, ref2->data[0], ref2->linesize[0], tref2, row << 3, col << 3, &b->mv[0][1], bw, bh, w, h); } // uv inter pred { int bwl = bwlog_tab[1][b->bs]; int bw = bwh_tab[1][b->bs][0] * 4, bh = bwh_tab[1][b->bs][1] * 4; VP56mv mvuv; w = (w + 1) >> 1; h = (h + 1) >> 1; if (b->bs > BS_8x8) { mvuv.x = ROUNDED_DIV(b->mv[0][0].x + b->mv[1][0].x + b->mv[2][0].x + b->mv[3][0].x, 4); mvuv.y = ROUNDED_DIV(b->mv[0][0].y + b->mv[1][0].y + b->mv[2][0].y + b->mv[3][0].y, 4); } else { mvuv = b->mv[0][0]; } mc_chroma_dir(s, s->dsp.mc[bwl][b->filter][0], s->dst[1], s->dst[2], ls_uv, ref1->data[1], ref1->linesize[1], ref1->data[2], ref1->linesize[2], tref1, row << 2, col << 2, &mvuv, bw, bh, w, h); if (b->comp) { if (b->bs > BS_8x8) { mvuv.x = ROUNDED_DIV(b->mv[0][1].x + b->mv[1][1].x + b->mv[2][1].x + b->mv[3][1].x, 4); mvuv.y = ROUNDED_DIV(b->mv[0][1].y + b->mv[1][1].y + b->mv[2][1].y + b->mv[3][1].y, 4); } else { mvuv = b->mv[0][1]; } mc_chroma_dir(s, s->dsp.mc[bwl][b->filter][1], s->dst[1], s->dst[2], ls_uv, ref2->data[1], ref2->linesize[1], ref2->data[2], ref2->linesize[2], tref2, row << 2, col << 2, &mvuv, bw, bh, w, h); } } if (!b->skip) { /* mostly copied intra_reconn() */ int w4 = bwh_tab[1][b->bs][0] << 1, step1d = 1 << b->tx, n; int h4 = bwh_tab[1][b->bs][1] << 1, x, y, step = 1 << (b->tx * 2); int end_x = FFMIN(2 * (s->cols - col), w4); int end_y = FFMIN(2 * (s->rows - row), h4); int tx = 4 * s->lossless + b->tx, uvtx = b->uvtx + 4 * s->lossless; int uvstep1d = 1 << b->uvtx, p; uint8_t *dst = s->dst[0]; // y itxfm add for (n = 0, y = 0; y < end_y; y += step1d) { uint8_t *ptr = dst; for (x = 0; x < end_x; x += step1d, ptr += 4 * step1d, n += step) { int eob = b->tx > TX_8X8 ? AV_RN16A(&s->eob[n]) : s->eob[n]; if (eob) s->dsp.itxfm_add[tx][DCT_DCT](ptr, s->y_stride, s->block + 16 * n, eob); } dst += 4 * s->y_stride * step1d; } // uv itxfm add h4 >>= 1; w4 >>= 1; end_x >>= 1; end_y >>= 1; step = 1 << (b->uvtx * 2); for (p = 0; p < 2; p++) { dst = s->dst[p + 1]; for (n = 0, y = 0; y < end_y; y += uvstep1d) { uint8_t *ptr = dst; for (x = 0; x < end_x; x += uvstep1d, ptr += 4 * uvstep1d, n += step) { int eob = b->uvtx > TX_8X8 ? AV_RN16A(&s->uveob[p][n]) : s->uveob[p][n]; if (eob) s->dsp.itxfm_add[uvtx][DCT_DCT](ptr, s->uv_stride, s->uvblock[p] + 16 * n, eob); } dst += 4 * uvstep1d * s->uv_stride; } } } }
13,541
1
static void matroska_merge_packets(AVPacket *out, AVPacket *in) { out->data = av_realloc(out->data, out->size+in->size); memcpy(out->data+out->size, in->data, in->size); out->size += in->size; av_destruct_packet(in); av_free(in); }
13,542
1
static int decode_pal(MSS12Context *ctx, ArithCoder *acoder) { int i, ncol, r, g, b; uint32_t *pal = ctx->pal + 256 - ctx->free_colours; if (!ctx->free_colours) return 0; ncol = arith_get_number(acoder, ctx->free_colours + 1); for (i = 0; i < ncol; i++) { r = arith_get_bits(acoder, 8); g = arith_get_bits(acoder, 8); b = arith_get_bits(acoder, 8); *pal++ = (0xFF << 24) | (r << 16) | (g << 8) | b; } return !!ncol; }
13,543
1
int ff_mpeg4_decode_video_packet_header(MpegEncContext *s) { int mb_num_bits= av_log2(s->mb_num - 1) + 1; int header_extension=0, mb_num, len; /* is there enough space left for a video packet + header */ if( get_bits_count(&s->gb) > s->gb.size_in_bits-20) return -1; for(len=0; len<32; len++){ if(get_bits1(&s->gb)) break; } if(len!=ff_mpeg4_get_video_packet_prefix_length(s)){ av_log(s->avctx, AV_LOG_ERROR, "marker does not match f_code\n"); return -1; } if(s->shape != RECT_SHAPE){ header_extension= get_bits1(&s->gb); //FIXME more stuff here } mb_num= get_bits(&s->gb, mb_num_bits); if(mb_num>=s->mb_num){ av_log(s->avctx, AV_LOG_ERROR, "illegal mb_num in video packet (%d %d) \n", mb_num, s->mb_num); return -1; } if(s->pict_type == AV_PICTURE_TYPE_B){ int mb_x = 0, mb_y = 0; while (s->next_picture.mbskip_table[s->mb_index2xy[mb_num]]) { if (!mb_x) ff_thread_await_progress(&s->next_picture_ptr->tf, mb_y++, 0); mb_num++; if (++mb_x == s->mb_width) mb_x = 0; } if(mb_num >= s->mb_num) return -1; // slice contains just skipped MBs which where already decoded } s->mb_x= mb_num % s->mb_width; s->mb_y= mb_num / s->mb_width; if(s->shape != BIN_ONLY_SHAPE){ int qscale= get_bits(&s->gb, s->quant_precision); if(qscale) s->chroma_qscale=s->qscale= qscale; } if(s->shape == RECT_SHAPE){ header_extension= get_bits1(&s->gb); } if(header_extension){ int time_incr=0; while (get_bits1(&s->gb) != 0) time_incr++; check_marker(&s->gb, "before time_increment in video packed header"); skip_bits(&s->gb, s->time_increment_bits); /* time_increment */ check_marker(&s->gb, "before vop_coding_type in video packed header"); skip_bits(&s->gb, 2); /* vop coding type */ //FIXME not rect stuff here if(s->shape != BIN_ONLY_SHAPE){ skip_bits(&s->gb, 3); /* intra dc vlc threshold */ //FIXME don't just ignore everything if(s->pict_type == AV_PICTURE_TYPE_S && s->vol_sprite_usage==GMC_SPRITE){ mpeg4_decode_sprite_trajectory(s, &s->gb); av_log(s->avctx, AV_LOG_ERROR, "untested\n"); } //FIXME reduced res stuff here if (s->pict_type != AV_PICTURE_TYPE_I) { int f_code = get_bits(&s->gb, 3); /* fcode_for */ if(f_code==0){ av_log(s->avctx, AV_LOG_ERROR, "Error, video packet header damaged (f_code=0)\n"); } } if (s->pict_type == AV_PICTURE_TYPE_B) { int b_code = get_bits(&s->gb, 3); if(b_code==0){ av_log(s->avctx, AV_LOG_ERROR, "Error, video packet header damaged (b_code=0)\n"); } } } } //FIXME new-pred stuff return 0; }
13,544
1
static inline void gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb, int search_pc) { DisasContext dc1, *dc = &dc1; CPUBreakpoint *bp; uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; uint32_t next_page_start; int num_insns; int max_insns; /* generate intermediate code */ num_temps = 0; pc_start = tb->pc; dc->tb = tb; gen_opc_end = gen_opc_buf + OPC_MAX_SIZE; dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = env->singlestep_enabled; dc->condjmp = 0; dc->thumb = ARM_TBFLAG_THUMB(tb->flags); dc->condexec_mask = (ARM_TBFLAG_CONDEXEC(tb->flags) & 0xf) << 1; dc->condexec_cond = ARM_TBFLAG_CONDEXEC(tb->flags) >> 4; #if !defined(CONFIG_USER_ONLY) dc->user = (ARM_TBFLAG_PRIV(tb->flags) == 0); #endif dc->vfp_enabled = ARM_TBFLAG_VFPEN(tb->flags); dc->vec_len = ARM_TBFLAG_VECLEN(tb->flags); dc->vec_stride = ARM_TBFLAG_VECSTRIDE(tb->flags); cpu_F0s = tcg_temp_new_i32(); cpu_F1s = tcg_temp_new_i32(); cpu_F0d = tcg_temp_new_i64(); cpu_F1d = tcg_temp_new_i64(); cpu_V0 = cpu_F0d; cpu_V1 = cpu_F1d; /* FIXME: cpu_M0 can probably be the same as cpu_V0. */ cpu_M0 = tcg_temp_new_i64(); next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; lj = -1; num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK; if (max_insns == 0) max_insns = CF_COUNT_MASK; gen_icount_start(); /* A note on handling of the condexec (IT) bits: * * We want to avoid the overhead of having to write the updated condexec * bits back to the CPUState for every instruction in an IT block. So: * (1) if the condexec bits are not already zero then we write * zero back into the CPUState now. This avoids complications trying * to do it at the end of the block. (For example if we don't do this * it's hard to identify whether we can safely skip writing condexec * at the end of the TB, which we definitely want to do for the case * where a TB doesn't do anything with the IT state at all.) * (2) if we are going to leave the TB then we call gen_set_condexec() * which will write the correct value into CPUState if zero is wrong. * This is done both for leaving the TB at the end, and for leaving * it because of an exception we know will happen, which is done in * gen_exception_insn(). The latter is necessary because we need to * leave the TB with the PC/IT state just prior to execution of the * instruction which caused the exception. * (3) if we leave the TB unexpectedly (eg a data abort on a load) * then the CPUState will be wrong and we need to reset it. * This is handled in the same way as restoration of the * PC in these situations: we will be called again with search_pc=1 * and generate a mapping of the condexec bits for each PC in * gen_opc_condexec_bits[]. gen_pc_load[] then uses this to restore * the condexec bits. * * Note that there are no instructions which can read the condexec * bits, and none which can write non-static values to them, so * we don't need to care about whether CPUState is correct in the * middle of a TB. */ /* Reset the conditional execution bits immediately. This avoids complications trying to do it at the end of the block. */ if (dc->condexec_mask || dc->condexec_cond) { TCGv tmp = new_tmp(); tcg_gen_movi_i32(tmp, 0); store_cpu_field(tmp, condexec_bits); } do { #ifdef CONFIG_USER_ONLY /* Intercept jump to the magic kernel page. */ if (dc->pc >= 0xffff0000) { /* We always get here via a jump, so know we are not in a conditional execution block. */ gen_exception(EXCP_KERNEL_TRAP); dc->is_jmp = DISAS_UPDATE; break; } #else if (dc->pc >= 0xfffffff0 && IS_M(env)) { /* We always get here via a jump, so know we are not in a conditional execution block. */ gen_exception(EXCP_EXCEPTION_EXIT); dc->is_jmp = DISAS_UPDATE; break; } #endif if (unlikely(!QTAILQ_EMPTY(&env->breakpoints))) { QTAILQ_FOREACH(bp, &env->breakpoints, entry) { if (bp->pc == dc->pc) { gen_exception_insn(dc, 0, EXCP_DEBUG); /* Advance PC so that clearing the breakpoint will invalidate this TB. */ dc->pc += 2; goto done_generating; break; } } } if (search_pc) { j = gen_opc_ptr - gen_opc_buf; if (lj < j) { lj++; while (lj < j) gen_opc_instr_start[lj++] = 0; } gen_opc_pc[lj] = dc->pc; gen_opc_condexec_bits[lj] = (dc->condexec_cond << 4) | (dc->condexec_mask >> 1); gen_opc_instr_start[lj] = 1; gen_opc_icount[lj] = num_insns; } if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) gen_io_start(); if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) { tcg_gen_debug_insn_start(dc->pc); } if (dc->thumb) { disas_thumb_insn(env, dc); if (dc->condexec_mask) { dc->condexec_cond = (dc->condexec_cond & 0xe) | ((dc->condexec_mask >> 4) & 1); dc->condexec_mask = (dc->condexec_mask << 1) & 0x1f; if (dc->condexec_mask == 0) { dc->condexec_cond = 0; } } } else { disas_arm_insn(env, dc); } if (num_temps) { fprintf(stderr, "Internal resource leak before %08x\n", dc->pc); num_temps = 0; } if (dc->condjmp && !dc->is_jmp) { gen_set_label(dc->condlabel); dc->condjmp = 0; } /* Translation stops when a conditional branch is encountered. * Otherwise the subsequent code could get translated several times. * Also stop translation when a page boundary is reached. This * ensures prefetch aborts occur at the right place. */ num_insns ++; } while (!dc->is_jmp && gen_opc_ptr < gen_opc_end && !env->singlestep_enabled && !singlestep && dc->pc < next_page_start && num_insns < max_insns); if (tb->cflags & CF_LAST_IO) { if (dc->condjmp) { /* FIXME: This can theoretically happen with self-modifying code. */ cpu_abort(env, "IO on conditional branch instruction"); } gen_io_end(); } /* At this stage dc->condjmp will only be set when the skipped instruction was a conditional branch or trap, and the PC has already been written. */ if (unlikely(env->singlestep_enabled)) { /* Make sure the pc is updated, and raise a debug exception. */ if (dc->condjmp) { gen_set_condexec(dc); if (dc->is_jmp == DISAS_SWI) { gen_exception(EXCP_SWI); } else { gen_exception(EXCP_DEBUG); } gen_set_label(dc->condlabel); } if (dc->condjmp || !dc->is_jmp) { gen_set_pc_im(dc->pc); dc->condjmp = 0; } gen_set_condexec(dc); if (dc->is_jmp == DISAS_SWI && !dc->condjmp) { gen_exception(EXCP_SWI); } else { /* FIXME: Single stepping a WFI insn will not halt the CPU. */ gen_exception(EXCP_DEBUG); } } else { /* While branches must always occur at the end of an IT block, there are a few other things that can cause us to terminate the TB in the middel of an IT block: - Exception generating instructions (bkpt, swi, undefined). - Page boundaries. - Hardware watchpoints. Hardware breakpoints have already been handled and skip this code. */ gen_set_condexec(dc); switch(dc->is_jmp) { case DISAS_NEXT: gen_goto_tb(dc, 1, dc->pc); break; default: case DISAS_JUMP: case DISAS_UPDATE: /* indicate that the hash table must be used to find the next TB */ tcg_gen_exit_tb(0); break; case DISAS_TB_JUMP: /* nothing more to generate */ break; case DISAS_WFI: gen_helper_wfi(); break; case DISAS_SWI: gen_exception(EXCP_SWI); break; } if (dc->condjmp) { gen_set_label(dc->condlabel); gen_set_condexec(dc); gen_goto_tb(dc, 1, dc->pc); dc->condjmp = 0; } } done_generating: gen_icount_end(tb, num_insns); *gen_opc_ptr = INDEX_op_end; #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); log_target_disas(pc_start, dc->pc - pc_start, dc->thumb); qemu_log("\n"); } #endif if (search_pc) { j = gen_opc_ptr - gen_opc_buf; lj++; while (lj <= j) gen_opc_instr_start[lj++] = 0; } else { tb->size = dc->pc - pc_start; tb->icount = num_insns; } }
13,545
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static int write_representation(AVFormatContext *s, AVStream *stream, int id, int output_width, int output_height, int output_sample_rate) { AVDictionaryEntry *irange = av_dict_get(stream->metadata, INITIALIZATION_RANGE, NULL, 0); AVDictionaryEntry *cues_start = av_dict_get(stream->metadata, CUES_START, NULL, 0); AVDictionaryEntry *cues_end = av_dict_get(stream->metadata, CUES_END, NULL, 0); AVDictionaryEntry *filename = av_dict_get(stream->metadata, FILENAME, NULL, 0); AVDictionaryEntry *bandwidth = av_dict_get(stream->metadata, BANDWIDTH, NULL, 0); if (!irange || cues_start == NULL || cues_end == NULL || filename == NULL || !bandwidth) { return -1; } avio_printf(s->pb, "<Representation id=\"%d\"", id); avio_printf(s->pb, " bandwidth=\"%s\"", bandwidth->value); if (stream->codec->codec_type == AVMEDIA_TYPE_VIDEO && output_width) avio_printf(s->pb, " width=\"%d\"", stream->codec->width); if (stream->codec->codec_type == AVMEDIA_TYPE_VIDEO && output_height) avio_printf(s->pb, " height=\"%d\"", stream->codec->height); if (stream->codec->codec_type = AVMEDIA_TYPE_AUDIO && output_sample_rate) avio_printf(s->pb, " audioSamplingRate=\"%d\"", stream->codec->sample_rate); avio_printf(s->pb, ">\n"); avio_printf(s->pb, "<BaseURL>%s</BaseURL>\n", filename->value); avio_printf(s->pb, "<SegmentBase\n"); avio_printf(s->pb, " indexRange=\"%s-%s\">\n", cues_start->value, cues_end->value); avio_printf(s->pb, "<Initialization\n"); avio_printf(s->pb, " range=\"0-%s\" />\n", irange->value); avio_printf(s->pb, "</SegmentBase>\n"); avio_printf(s->pb, "</Representation>\n"); return 0; }
13,547
0
static int thp_read_header(AVFormatContext *s, AVFormatParameters *ap) { ThpDemuxContext *thp = s->priv_data; AVStream *st; AVIOContext *pb = s->pb; int64_t fsize= avio_size(pb); int i; /* Read the file header. */ avio_rb32(pb); /* Skip Magic. */ thp->version = avio_rb32(pb); avio_rb32(pb); /* Max buf size. */ avio_rb32(pb); /* Max samples. */ thp->fps = av_d2q(av_int2float(avio_rb32(pb)), INT_MAX); thp->framecnt = avio_rb32(pb); thp->first_framesz = avio_rb32(pb); thp->data_size = avio_rb32(pb); if(fsize>0 && (!thp->data_size || fsize < thp->data_size)) thp->data_size= fsize; thp->compoff = avio_rb32(pb); avio_rb32(pb); /* offsetDataOffset. */ thp->first_frame = avio_rb32(pb); thp->last_frame = avio_rb32(pb); thp->next_framesz = thp->first_framesz; thp->next_frame = thp->first_frame; /* Read the component structure. */ avio_seek (pb, thp->compoff, SEEK_SET); thp->compcount = avio_rb32(pb); /* Read the list of component types. */ avio_read(pb, thp->components, 16); for (i = 0; i < thp->compcount; i++) { if (thp->components[i] == 0) { if (thp->vst != 0) break; /* Video component. */ st = avformat_new_stream(s, NULL); if (!st) return AVERROR(ENOMEM); /* The denominator and numerator are switched because 1/fps is required. */ avpriv_set_pts_info(st, 64, thp->fps.den, thp->fps.num); st->codec->codec_type = AVMEDIA_TYPE_VIDEO; st->codec->codec_id = CODEC_ID_THP; st->codec->codec_tag = 0; /* no fourcc */ st->codec->width = avio_rb32(pb); st->codec->height = avio_rb32(pb); st->codec->sample_rate = av_q2d(thp->fps); thp->vst = st; thp->video_stream_index = st->index; if (thp->version == 0x11000) avio_rb32(pb); /* Unknown. */ } else if (thp->components[i] == 1) { if (thp->has_audio != 0) break; /* Audio component. */ st = avformat_new_stream(s, NULL); if (!st) return AVERROR(ENOMEM); st->codec->codec_type = AVMEDIA_TYPE_AUDIO; st->codec->codec_id = CODEC_ID_ADPCM_THP; st->codec->codec_tag = 0; /* no fourcc */ st->codec->channels = avio_rb32(pb); /* numChannels. */ st->codec->sample_rate = avio_rb32(pb); /* Frequency. */ avpriv_set_pts_info(st, 64, 1, st->codec->sample_rate); thp->audio_stream_index = st->index; thp->has_audio = 1; } } return 0; }
13,549
0
void av_free(void *ptr) { #if CONFIG_MEMALIGN_HACK if (ptr) free((char *)ptr - ((char *)ptr)[-1]); #elif HAVE_ALIGNED_MALLOC _aligned_free(ptr); #else free(ptr); #endif }
13,550
0
static inline int check_bidir_mv(MpegEncContext * s, int motion_fx, int motion_fy, int motion_bx, int motion_by, int pred_fx, int pred_fy, int pred_bx, int pred_by, int size, int h) { //FIXME optimize? //FIXME better f_code prediction (max mv & distance) //FIXME pointers MotionEstContext * const c= &s->me; uint8_t * const mv_penalty_f= c->mv_penalty[s->f_code] + MAX_MV; // f_code of the prev frame uint8_t * const mv_penalty_b= c->mv_penalty[s->b_code] + MAX_MV; // f_code of the prev frame int stride= c->stride; uint8_t *dest_y = c->scratchpad; uint8_t *ptr; int dxy; int src_x, src_y; int fbmin; uint8_t **src_data= c->src[0]; uint8_t **ref_data= c->ref[0]; uint8_t **ref2_data= c->ref[2]; if(s->quarter_sample){ dxy = ((motion_fy & 3) << 2) | (motion_fx & 3); src_x = motion_fx >> 2; src_y = motion_fy >> 2; ptr = ref_data[0] + (src_y * stride) + src_x; s->qdsp.put_qpel_pixels_tab[0][dxy](dest_y, ptr, stride); dxy = ((motion_by & 3) << 2) | (motion_bx & 3); src_x = motion_bx >> 2; src_y = motion_by >> 2; ptr = ref2_data[0] + (src_y * stride) + src_x; s->qdsp.avg_qpel_pixels_tab[size][dxy](dest_y, ptr, stride); }else{ dxy = ((motion_fy & 1) << 1) | (motion_fx & 1); src_x = motion_fx >> 1; src_y = motion_fy >> 1; ptr = ref_data[0] + (src_y * stride) + src_x; s->hdsp.put_pixels_tab[size][dxy](dest_y , ptr , stride, h); dxy = ((motion_by & 1) << 1) | (motion_bx & 1); src_x = motion_bx >> 1; src_y = motion_by >> 1; ptr = ref2_data[0] + (src_y * stride) + src_x; s->hdsp.avg_pixels_tab[size][dxy](dest_y , ptr , stride, h); } fbmin = (mv_penalty_f[motion_fx-pred_fx] + mv_penalty_f[motion_fy-pred_fy])*c->mb_penalty_factor +(mv_penalty_b[motion_bx-pred_bx] + mv_penalty_b[motion_by-pred_by])*c->mb_penalty_factor + s->mecc.mb_cmp[size](s, src_data[0], dest_y, stride, h); // FIXME new_pic if(c->avctx->mb_cmp&FF_CMP_CHROMA){ } //FIXME CHROMA !!! return fbmin; }
13,551
1
static int init_prec(Jpeg2000Band *band, Jpeg2000ResLevel *reslevel, Jpeg2000Component *comp, int precno, int bandno, int reslevelno, int log2_band_prec_width, int log2_band_prec_height) { Jpeg2000Prec *prec = band->prec + precno; int nb_codeblocks, cblkno; prec->decoded_layers = 0; /* TODO: Explain formula for JPEG200 DCINEMA. */ /* TODO: Verify with previous count of codeblocks per band */ /* Compute P_x0 */ prec->coord[0][0] = ((band->coord[0][0] >> log2_band_prec_width) + precno % reslevel->num_precincts_x) * (1 << log2_band_prec_width); /* Compute P_y0 */ prec->coord[1][0] = ((band->coord[1][0] >> log2_band_prec_height) + precno / reslevel->num_precincts_x) * (1 << log2_band_prec_height); /* Compute P_x1 */ prec->coord[0][1] = prec->coord[0][0] + (1 << log2_band_prec_width); prec->coord[0][0] = FFMAX(prec->coord[0][0], band->coord[0][0]); prec->coord[0][1] = FFMIN(prec->coord[0][1], band->coord[0][1]); /* Compute P_y1 */ prec->coord[1][1] = prec->coord[1][0] + (1 << log2_band_prec_height); prec->coord[1][0] = FFMAX(prec->coord[1][0], band->coord[1][0]); prec->coord[1][1] = FFMIN(prec->coord[1][1], band->coord[1][1]); prec->nb_codeblocks_width = ff_jpeg2000_ceildivpow2(prec->coord[0][1], band->log2_cblk_width) - (prec->coord[0][0] >> band->log2_cblk_width); prec->nb_codeblocks_height = ff_jpeg2000_ceildivpow2(prec->coord[1][1], band->log2_cblk_height) - (prec->coord[1][0] >> band->log2_cblk_height); /* Tag trees initialization */ prec->cblkincl = ff_jpeg2000_tag_tree_init(prec->nb_codeblocks_width, prec->nb_codeblocks_height); if (!prec->cblkincl) return AVERROR(ENOMEM); prec->zerobits = ff_jpeg2000_tag_tree_init(prec->nb_codeblocks_width, prec->nb_codeblocks_height); if (!prec->zerobits) return AVERROR(ENOMEM); if (prec->nb_codeblocks_width * (uint64_t)prec->nb_codeblocks_height > INT_MAX) { prec->cblk = NULL; return AVERROR(ENOMEM); } nb_codeblocks = prec->nb_codeblocks_width * prec->nb_codeblocks_height; prec->cblk = av_mallocz_array(nb_codeblocks, sizeof(*prec->cblk)); if (!prec->cblk) return AVERROR(ENOMEM); for (cblkno = 0; cblkno < nb_codeblocks; cblkno++) { Jpeg2000Cblk *cblk = prec->cblk + cblkno; int Cx0, Cy0; /* Compute coordinates of codeblocks */ /* Compute Cx0*/ Cx0 = ((prec->coord[0][0]) >> band->log2_cblk_width) << band->log2_cblk_width; Cx0 = Cx0 + ((cblkno % prec->nb_codeblocks_width) << band->log2_cblk_width); cblk->coord[0][0] = FFMAX(Cx0, prec->coord[0][0]); /* Compute Cy0*/ Cy0 = ((prec->coord[1][0]) >> band->log2_cblk_height) << band->log2_cblk_height; Cy0 = Cy0 + ((cblkno / prec->nb_codeblocks_width) << band->log2_cblk_height); cblk->coord[1][0] = FFMAX(Cy0, prec->coord[1][0]); /* Compute Cx1 */ cblk->coord[0][1] = FFMIN(Cx0 + (1 << band->log2_cblk_width), prec->coord[0][1]); /* Compute Cy1 */ cblk->coord[1][1] = FFMIN(Cy0 + (1 << band->log2_cblk_height), prec->coord[1][1]); /* Update code-blocks coordinates according sub-band position */ if ((bandno + !!reslevelno) & 1) { cblk->coord[0][0] += comp->reslevel[reslevelno-1].coord[0][1] - comp->reslevel[reslevelno-1].coord[0][0]; cblk->coord[0][1] += comp->reslevel[reslevelno-1].coord[0][1] - comp->reslevel[reslevelno-1].coord[0][0]; } if ((bandno + !!reslevelno) & 2) { cblk->coord[1][0] += comp->reslevel[reslevelno-1].coord[1][1] - comp->reslevel[reslevelno-1].coord[1][0]; cblk->coord[1][1] += comp->reslevel[reslevelno-1].coord[1][1] - comp->reslevel[reslevelno-1].coord[1][0]; } cblk->zero = 0; cblk->lblock = 3; cblk->length = 0; memset(cblk->lengthinc, 0, sizeof(cblk->lengthinc)); cblk->npasses = 0; } return 0; }
13,553
1
static int qcow2_write_compressed(BlockDriverState *bs, int64_t sector_num, const uint8_t *buf, int nb_sectors) { BDRVQcowState *s = bs->opaque; z_stream strm; int ret, out_len; uint8_t *out_buf; uint64_t cluster_offset; if (nb_sectors == 0) { /* align end of file to a sector boundary to ease reading with sector based I/Os */ cluster_offset = bdrv_getlength(bs->file); cluster_offset = (cluster_offset + 511) & ~511; bdrv_truncate(bs->file, cluster_offset); return 0; } if (nb_sectors != s->cluster_sectors) { ret = -EINVAL; /* Zero-pad last write if image size is not cluster aligned */ if (sector_num + nb_sectors == bs->total_sectors && nb_sectors < s->cluster_sectors) { uint8_t *pad_buf = qemu_blockalign(bs, s->cluster_size); memset(pad_buf, 0, s->cluster_size); memcpy(pad_buf, buf, nb_sectors * BDRV_SECTOR_SIZE); ret = qcow2_write_compressed(bs, sector_num, pad_buf, s->cluster_sectors); qemu_vfree(pad_buf); } return ret; } out_buf = g_malloc(s->cluster_size + (s->cluster_size / 1000) + 128); /* best compression, small window, no zlib header */ memset(&strm, 0, sizeof(strm)); ret = deflateInit2(&strm, Z_DEFAULT_COMPRESSION, Z_DEFLATED, -12, 9, Z_DEFAULT_STRATEGY); if (ret != 0) { ret = -EINVAL; goto fail; } strm.avail_in = s->cluster_size; strm.next_in = (uint8_t *)buf; strm.avail_out = s->cluster_size; strm.next_out = out_buf; ret = deflate(&strm, Z_FINISH); if (ret != Z_STREAM_END && ret != Z_OK) { deflateEnd(&strm); ret = -EINVAL; goto fail; } out_len = strm.next_out - out_buf; deflateEnd(&strm); if (ret != Z_STREAM_END || out_len >= s->cluster_size) { /* could not compress: write normal cluster */ ret = qcow2_pre_write_overlap_check(bs, QCOW2_OL_DEFAULT, sector_num * BDRV_SECTOR_SIZE, s->cluster_sectors * BDRV_SECTOR_SIZE); if (ret < 0) { goto fail; } ret = bdrv_write(bs, sector_num, buf, s->cluster_sectors); if (ret < 0) { goto fail; } } else { cluster_offset = qcow2_alloc_compressed_cluster_offset(bs, sector_num << 9, out_len); if (!cluster_offset) { ret = -EIO; goto fail; } cluster_offset &= s->cluster_offset_mask; ret = qcow2_pre_write_overlap_check(bs, QCOW2_OL_DEFAULT, cluster_offset, out_len); if (ret < 0) { goto fail; } BLKDBG_EVENT(bs->file, BLKDBG_WRITE_COMPRESSED); ret = bdrv_pwrite(bs->file, cluster_offset, out_buf, out_len); if (ret < 0) { goto fail; } } ret = 0; fail: g_free(out_buf); return ret; }
13,557
1
static void test_init(void) { uint64_t barsize; dev = get_device(); dev_base = qpci_iomap(dev, 0, &barsize); g_assert(dev_base != NULL); qpci_device_enable(dev); test_timer(); }
13,558
1
void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb) { PowerPCCPU *cpu = ppc_env_get_cpu(env); CPUState *cs = CPU(cpu); DisasContext ctx, *ctxp = &ctx; opc_handler_t **table, *handler; target_ulong pc_start; int num_insns; int max_insns; pc_start = tb->pc; ctx.nip = pc_start; ctx.tb = tb; ctx.exception = POWERPC_EXCP_NONE; ctx.spr_cb = env->spr_cb; ctx.pr = msr_pr; ctx.mem_idx = env->dmmu_idx; ctx.dr = msr_dr; #if !defined(CONFIG_USER_ONLY) ctx.hv = msr_hv || !env->has_hv_mode; #endif ctx.insns_flags = env->insns_flags; ctx.insns_flags2 = env->insns_flags2; ctx.access_type = -1; ctx.le_mode = !!(env->hflags & (1 << MSR_LE)); ctx.default_tcg_memop_mask = ctx.le_mode ? MO_LE : MO_BE; #if defined(TARGET_PPC64) ctx.sf_mode = msr_is_64bit(env, env->msr); ctx.has_cfar = !!(env->flags & POWERPC_FLAG_CFAR); #endif if (env->mmu_model == POWERPC_MMU_32B || env->mmu_model == POWERPC_MMU_601 || (env->mmu_model & POWERPC_MMU_64B)) ctx.lazy_tlb_flush = true; ctx.fpu_enabled = !!msr_fp; if ((env->flags & POWERPC_FLAG_SPE) && msr_spe) ctx.spe_enabled = !!msr_spe; else ctx.spe_enabled = false; if ((env->flags & POWERPC_FLAG_VRE) && msr_vr) ctx.altivec_enabled = !!msr_vr; else ctx.altivec_enabled = false; if ((env->flags & POWERPC_FLAG_VSX) && msr_vsx) { ctx.vsx_enabled = !!msr_vsx; } else { ctx.vsx_enabled = false; } #if defined(TARGET_PPC64) if ((env->flags & POWERPC_FLAG_TM) && msr_tm) { ctx.tm_enabled = !!msr_tm; } else { ctx.tm_enabled = false; } #endif if ((env->flags & POWERPC_FLAG_SE) && msr_se) ctx.singlestep_enabled = CPU_SINGLE_STEP; else ctx.singlestep_enabled = 0; if ((env->flags & POWERPC_FLAG_BE) && msr_be) ctx.singlestep_enabled |= CPU_BRANCH_STEP; if (unlikely(cs->singlestep_enabled)) { ctx.singlestep_enabled |= GDBSTUB_SINGLE_STEP; } #if defined (DO_SINGLE_STEP) && 0 /* Single step trace mode */ msr_se = 1; #endif num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK; if (max_insns == 0) { max_insns = CF_COUNT_MASK; } if (max_insns > TCG_MAX_INSNS) { max_insns = TCG_MAX_INSNS; } gen_tb_start(tb); tcg_clear_temp_count(); /* Set env in case of segfault during code fetch */ while (ctx.exception == POWERPC_EXCP_NONE && !tcg_op_buf_full()) { tcg_gen_insn_start(ctx.nip); num_insns++; if (unlikely(cpu_breakpoint_test(cs, ctx.nip, BP_ANY))) { gen_debug_exception(ctxp); /* The address covered by the breakpoint must be included in [tb->pc, tb->pc + tb->size) in order to for it to be properly cleared -- thus we increment the PC here so that the logic setting tb->size below does the right thing. */ ctx.nip += 4; break; } LOG_DISAS("----------------\n"); LOG_DISAS("nip=" TARGET_FMT_lx " super=%d ir=%d\n", ctx.nip, ctx.mem_idx, (int)msr_ir); if (num_insns == max_insns && (tb->cflags & CF_LAST_IO)) gen_io_start(); if (unlikely(need_byteswap(&ctx))) { ctx.opcode = bswap32(cpu_ldl_code(env, ctx.nip)); } else { ctx.opcode = cpu_ldl_code(env, ctx.nip); } LOG_DISAS("translate opcode %08x (%02x %02x %02x) (%s)\n", ctx.opcode, opc1(ctx.opcode), opc2(ctx.opcode), opc3(ctx.opcode), ctx.le_mode ? "little" : "big"); ctx.nip += 4; table = env->opcodes; handler = table[opc1(ctx.opcode)]; if (is_indirect_opcode(handler)) { table = ind_table(handler); handler = table[opc2(ctx.opcode)]; if (is_indirect_opcode(handler)) { table = ind_table(handler); handler = table[opc3(ctx.opcode)]; } } /* Is opcode *REALLY* valid ? */ if (unlikely(handler->handler == &gen_invalid)) { qemu_log_mask(LOG_GUEST_ERROR, "invalid/unsupported opcode: " "%02x - %02x - %02x (%08x) " TARGET_FMT_lx " %d\n", opc1(ctx.opcode), opc2(ctx.opcode), opc3(ctx.opcode), ctx.opcode, ctx.nip - 4, (int)msr_ir); } else { uint32_t inval; if (unlikely(handler->type & (PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE) && Rc(ctx.opcode))) { inval = handler->inval2; } else { inval = handler->inval1; } if (unlikely((ctx.opcode & inval) != 0)) { qemu_log_mask(LOG_GUEST_ERROR, "invalid bits: %08x for opcode: " "%02x - %02x - %02x (%08x) " TARGET_FMT_lx "\n", ctx.opcode & inval, opc1(ctx.opcode), opc2(ctx.opcode), opc3(ctx.opcode), ctx.opcode, ctx.nip - 4); gen_inval_exception(ctxp, POWERPC_EXCP_INVAL_INVAL); break; } } (*(handler->handler))(&ctx); #if defined(DO_PPC_STATISTICS) handler->count++; #endif /* Check trace mode exceptions */ if (unlikely(ctx.singlestep_enabled & CPU_SINGLE_STEP && (ctx.nip <= 0x100 || ctx.nip > 0xF00) && ctx.exception != POWERPC_SYSCALL && ctx.exception != POWERPC_EXCP_TRAP && ctx.exception != POWERPC_EXCP_BRANCH)) { gen_exception(ctxp, POWERPC_EXCP_TRACE); } else if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) || (cs->singlestep_enabled) || singlestep || num_insns >= max_insns)) { /* if we reach a page boundary or are single stepping, stop * generation */ break; } if (tcg_check_temp_count()) { fprintf(stderr, "Opcode %02x %02x %02x (%08x) leaked temporaries\n", opc1(ctx.opcode), opc2(ctx.opcode), opc3(ctx.opcode), ctx.opcode); exit(1); } } if (tb->cflags & CF_LAST_IO) gen_io_end(); if (ctx.exception == POWERPC_EXCP_NONE) { gen_goto_tb(&ctx, 0, ctx.nip); } else if (ctx.exception != POWERPC_EXCP_BRANCH) { if (unlikely(cs->singlestep_enabled)) { gen_debug_exception(ctxp); } /* Generate the return instruction */ tcg_gen_exit_tb(0); } gen_tb_end(tb, num_insns); tb->size = ctx.nip - pc_start; tb->icount = num_insns; #if defined(DEBUG_DISAS) if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) && qemu_log_in_addr_range(pc_start)) { int flags; flags = env->bfd_mach; flags |= ctx.le_mode << 16; qemu_log("IN: %s\n", lookup_symbol(pc_start)); log_target_disas(cs, pc_start, ctx.nip - pc_start, flags); qemu_log("\n"); } #endif }
13,559
1
static void smptebars_fill_picture(AVFilterContext *ctx, AVFrame *picref) { TestSourceContext *test = ctx->priv; FFDrawColor color; int r_w, r_h, w_h, p_w, p_h, i, tmp, x = 0; const AVPixFmtDescriptor *pixdesc = av_pix_fmt_desc_get(picref->format); r_w = FFALIGN((test->w + 6) / 7, 1 << pixdesc->log2_chroma_w); r_h = FFALIGN(test->h * 2 / 3, 1 << pixdesc->log2_chroma_h); w_h = FFALIGN(test->h * 3 / 4 - r_h, 1 << pixdesc->log2_chroma_h); p_w = FFALIGN(r_w * 5 / 4, 1 << pixdesc->log2_chroma_w); p_h = test->h - w_h - r_h; #define DRAW_COLOR(rgba, x, y, w, h) \ ff_draw_color(&test->draw, &color, rgba); \ ff_fill_rectangle(&test->draw, &color, \ picref->data, picref->linesize, x, y, w, h) \ for (i = 0; i < 7; i++) { DRAW_COLOR(rainbow[i], x, 0, FFMIN(r_w, test->w - x), r_h); DRAW_COLOR(wobnair[i], x, r_h, FFMIN(r_w, test->w - x), w_h); x += r_w; } x = 0; DRAW_COLOR(i_pixel, x, r_h + w_h, p_w, p_h); x += p_w; DRAW_COLOR(white, x, r_h + w_h, p_w, p_h); x += p_w; DRAW_COLOR(q_pixel, x, r_h + w_h, p_w, p_h); x += p_w; tmp = FFALIGN(5 * r_w - x, 1 << pixdesc->log2_chroma_w); DRAW_COLOR(black, x, r_h + w_h, tmp, p_h); x += tmp; tmp = FFALIGN(r_w / 3, 1 << pixdesc->log2_chroma_w); DRAW_COLOR(neg4ire, x, r_h + w_h, tmp, p_h); x += tmp; DRAW_COLOR(black, x, r_h + w_h, tmp, p_h); x += tmp; DRAW_COLOR(pos4ire, x, r_h + w_h, tmp, p_h); x += tmp; DRAW_COLOR(black, x, r_h + w_h, test->w - x, p_h); }
13,560
0
static coroutine_fn void nbd_read_reply_entry(void *opaque) { NBDClientSession *s = opaque; uint64_t i; int ret; for (;;) { assert(s->reply.handle == 0); ret = nbd_receive_reply(s->ioc, &s->reply); if (ret < 0) { break; } /* There's no need for a mutex on the receive side, because the * handler acts as a synchronization point and ensures that only * one coroutine is called until the reply finishes. */ i = HANDLE_TO_INDEX(s, s->reply.handle); if (i >= MAX_NBD_REQUESTS || !s->recv_coroutine[i]) { break; } /* We're woken up by the recv_coroutine itself. Note that there * is no race between yielding and reentering read_reply_co. This * is because: * * - if recv_coroutine[i] runs on the same AioContext, it is only * entered after we yield * * - if recv_coroutine[i] runs on a different AioContext, reentering * read_reply_co happens through a bottom half, which can only * run after we yield. */ aio_co_wake(s->recv_coroutine[i]); qemu_coroutine_yield(); } s->read_reply_co = NULL; }
13,561
0
static int mp_pacl_removexattr(FsContext *ctx, const char *path, const char *name) { int ret; char buffer[PATH_MAX]; ret = lremovexattr(rpath(ctx, path, buffer), MAP_ACL_ACCESS); if (ret == -1 && errno == ENODATA) { /* * We don't get ENODATA error when trying to remove a * posix acl that is not present. So don't throw the error * even in case of mapped security model */ errno = 0; ret = 0; } return ret; }
13,562
0
float32 HELPER(ucf64_adds)(float32 a, float32 b, CPUUniCore32State *env) { return float32_add(a, b, &env->ucf64.fp_status); }
13,563
0
static void test_validate_fail_struct(TestInputVisitorData *data, const void *unused) { TestStruct *p = NULL; Error *err = NULL; Visitor *v; v = validate_test_init(data, "{ 'integer': -42, 'boolean': true, 'string': 'foo', 'extra': 42 }"); visit_type_TestStruct(v, NULL, &p, &err); error_free_or_abort(&err); g_assert(!p); }
13,564
0
static int ram_load_postcopy(QEMUFile *f) { int flags = 0, ret = 0; bool place_needed = false; bool matching_page_sizes = qemu_host_page_size == TARGET_PAGE_SIZE; MigrationIncomingState *mis = migration_incoming_get_current(); /* Temporary page that is later 'placed' */ void *postcopy_host_page = postcopy_get_tmp_page(mis); void *last_host = NULL; bool all_zero = false; while (!ret && !(flags & RAM_SAVE_FLAG_EOS)) { ram_addr_t addr; void *host = NULL; void *page_buffer = NULL; void *place_source = NULL; uint8_t ch; addr = qemu_get_be64(f); flags = addr & ~TARGET_PAGE_MASK; addr &= TARGET_PAGE_MASK; trace_ram_load_postcopy_loop((uint64_t)addr, flags); place_needed = false; if (flags & (RAM_SAVE_FLAG_COMPRESS | RAM_SAVE_FLAG_PAGE)) { host = host_from_stream_offset(f, addr, flags); if (!host) { error_report("Illegal RAM offset " RAM_ADDR_FMT, addr); ret = -EINVAL; break; } page_buffer = host; /* * Postcopy requires that we place whole host pages atomically. * To make it atomic, the data is read into a temporary page * that's moved into place later. * The migration protocol uses, possibly smaller, target-pages * however the source ensures it always sends all the components * of a host page in order. */ page_buffer = postcopy_host_page + ((uintptr_t)host & ~qemu_host_page_mask); /* If all TP are zero then we can optimise the place */ if (!((uintptr_t)host & ~qemu_host_page_mask)) { all_zero = true; } else { /* not the 1st TP within the HP */ if (host != (last_host + TARGET_PAGE_SIZE)) { error_report("Non-sequential target page %p/%p", host, last_host); ret = -EINVAL; break; } } /* * If it's the last part of a host page then we place the host * page */ place_needed = (((uintptr_t)host + TARGET_PAGE_SIZE) & ~qemu_host_page_mask) == 0; place_source = postcopy_host_page; } last_host = host; switch (flags & ~RAM_SAVE_FLAG_CONTINUE) { case RAM_SAVE_FLAG_COMPRESS: ch = qemu_get_byte(f); memset(page_buffer, ch, TARGET_PAGE_SIZE); if (ch) { all_zero = false; } break; case RAM_SAVE_FLAG_PAGE: all_zero = false; if (!place_needed || !matching_page_sizes) { qemu_get_buffer(f, page_buffer, TARGET_PAGE_SIZE); } else { /* Avoids the qemu_file copy during postcopy, which is * going to do a copy later; can only do it when we * do this read in one go (matching page sizes) */ qemu_get_buffer_in_place(f, (uint8_t **)&place_source, TARGET_PAGE_SIZE); } break; case RAM_SAVE_FLAG_EOS: /* normal exit */ break; default: error_report("Unknown combination of migration flags: %#x" " (postcopy mode)", flags); ret = -EINVAL; } if (place_needed) { /* This gets called at the last target page in the host page */ if (all_zero) { ret = postcopy_place_page_zero(mis, host + TARGET_PAGE_SIZE - qemu_host_page_size); } else { ret = postcopy_place_page(mis, host + TARGET_PAGE_SIZE - qemu_host_page_size, place_source); } } if (!ret) { ret = qemu_file_get_error(f); } } return ret; }
13,566
0
static uint64_t pmsav7_read(CPUARMState *env, const ARMCPRegInfo *ri) { uint32_t *u32p = *(uint32_t **)raw_ptr(env, ri); if (!u32p) { return 0; } u32p += env->pmsav7.rnr; return *u32p; }
13,567
0
static int gt64120_pci_init(PCIDevice *d) { /* FIXME: Malta specific hw assumptions ahead */ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MARVELL); pci_config_set_device_id(d->config, PCI_DEVICE_ID_MARVELL_GT6412X); pci_set_word(d->config + PCI_COMMAND, 0); pci_set_word(d->config + PCI_STATUS, PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM); pci_set_byte(d->config + PCI_CLASS_REVISION, 0x10); pci_config_set_prog_interface(d->config, 0); pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); pci_set_long(d->config + PCI_BASE_ADDRESS_0, 0x00000008); pci_set_long(d->config + PCI_BASE_ADDRESS_1, 0x01000008); pci_set_long(d->config + PCI_BASE_ADDRESS_2, 0x1c000000); pci_set_long(d->config + PCI_BASE_ADDRESS_3, 0x1f000000); pci_set_long(d->config + PCI_BASE_ADDRESS_4, 0x14000000); pci_set_long(d->config + PCI_BASE_ADDRESS_5, 0x14000001); pci_set_byte(d->config + 0x3d, 0x01); return 0; }
13,568
0
static int vtd_page_walk(VTDContextEntry *ce, uint64_t start, uint64_t end, vtd_page_walk_hook hook_fn, void *private, bool notify_unmap) { dma_addr_t addr = vtd_ce_get_slpt_base(ce); uint32_t level = vtd_ce_get_level(ce); if (!vtd_iova_range_check(start, ce)) { return -VTD_FR_ADDR_BEYOND_MGAW; } if (!vtd_iova_range_check(end, ce)) { /* Fix end so that it reaches the maximum */ end = vtd_iova_limit(ce); } return vtd_page_walk_level(addr, start, end, hook_fn, private, level, true, true, notify_unmap); }
13,570
0
static int omx_encode_frame(AVCodecContext *avctx, AVPacket *pkt, const AVFrame *frame, int *got_packet) { OMXCodecContext *s = avctx->priv_data; int ret = 0; OMX_BUFFERHEADERTYPE* buffer; OMX_ERRORTYPE err; if (frame) { uint8_t *dst[4]; int linesize[4]; int need_copy; buffer = get_buffer(&s->input_mutex, &s->input_cond, &s->num_free_in_buffers, s->free_in_buffers, 1); buffer->nFilledLen = av_image_fill_arrays(dst, linesize, buffer->pBuffer, avctx->pix_fmt, s->stride, s->plane_size, 1); if (s->input_zerocopy) { uint8_t *src[4] = { NULL }; int src_linesize[4]; av_image_fill_arrays(src, src_linesize, frame->data[0], avctx->pix_fmt, s->stride, s->plane_size, 1); if (frame->linesize[0] == src_linesize[0] && frame->linesize[1] == src_linesize[1] && frame->linesize[2] == src_linesize[2] && frame->data[1] == src[1] && frame->data[2] == src[2]) { // If the input frame happens to have all planes stored contiguously, // with the right strides, just clone the frame and set the OMX // buffer header to point to it AVFrame *local = av_frame_clone(frame); if (!local) { // Return the buffer to the queue so it's not lost append_buffer(&s->input_mutex, &s->input_cond, &s->num_free_in_buffers, s->free_in_buffers, buffer); return AVERROR(ENOMEM); } else { buffer->pAppPrivate = local; buffer->pOutputPortPrivate = NULL; buffer->pBuffer = local->data[0]; need_copy = 0; } } else { // If not, we need to allocate a new buffer with the right // size and copy the input frame into it. uint8_t *buf = av_malloc(av_image_get_buffer_size(avctx->pix_fmt, s->stride, s->plane_size, 1)); if (!buf) { // Return the buffer to the queue so it's not lost append_buffer(&s->input_mutex, &s->input_cond, &s->num_free_in_buffers, s->free_in_buffers, buffer); return AVERROR(ENOMEM); } else { buffer->pAppPrivate = buf; // Mark that pAppPrivate is an av_malloc'ed buffer, not an AVFrame buffer->pOutputPortPrivate = (void*) 1; buffer->pBuffer = buf; need_copy = 1; buffer->nFilledLen = av_image_fill_arrays(dst, linesize, buffer->pBuffer, avctx->pix_fmt, s->stride, s->plane_size, 1); } } } else { need_copy = 1; } if (need_copy) av_image_copy(dst, linesize, (const uint8_t**) frame->data, frame->linesize, avctx->pix_fmt, avctx->width, avctx->height); buffer->nFlags = OMX_BUFFERFLAG_ENDOFFRAME; buffer->nOffset = 0; // Convert the timestamps to microseconds; some encoders can ignore // the framerate and do VFR bit allocation based on timestamps. buffer->nTimeStamp = to_omx_ticks(av_rescale_q(frame->pts, avctx->time_base, AV_TIME_BASE_Q)); err = OMX_EmptyThisBuffer(s->handle, buffer); if (err != OMX_ErrorNone) { append_buffer(&s->input_mutex, &s->input_cond, &s->num_free_in_buffers, s->free_in_buffers, buffer); av_log(avctx, AV_LOG_ERROR, "OMX_EmptyThisBuffer failed: %x\n", err); return AVERROR_UNKNOWN; } s->num_in_frames++; } while (!*got_packet && ret == 0) { // Only wait for output if flushing and not all frames have been output buffer = get_buffer(&s->output_mutex, &s->output_cond, &s->num_done_out_buffers, s->done_out_buffers, !frame && s->num_out_frames < s->num_in_frames); if (!buffer) break; if (buffer->nFlags & OMX_BUFFERFLAG_CODECCONFIG && avctx->flags & AV_CODEC_FLAG_GLOBAL_HEADER) { if ((ret = av_reallocp(&avctx->extradata, avctx->extradata_size + buffer->nFilledLen + AV_INPUT_BUFFER_PADDING_SIZE)) < 0) { avctx->extradata_size = 0; goto end; } memcpy(avctx->extradata + avctx->extradata_size, buffer->pBuffer + buffer->nOffset, buffer->nFilledLen); avctx->extradata_size += buffer->nFilledLen; memset(avctx->extradata + avctx->extradata_size, 0, AV_INPUT_BUFFER_PADDING_SIZE); } else { if (buffer->nFlags & OMX_BUFFERFLAG_ENDOFFRAME) s->num_out_frames++; if (!(buffer->nFlags & OMX_BUFFERFLAG_ENDOFFRAME) || !pkt->data) { // If the output packet isn't preallocated, just concatenate everything in our // own buffer int newsize = s->output_buf_size + buffer->nFilledLen + AV_INPUT_BUFFER_PADDING_SIZE; if ((ret = av_reallocp(&s->output_buf, newsize)) < 0) { s->output_buf_size = 0; goto end; } memcpy(s->output_buf + s->output_buf_size, buffer->pBuffer + buffer->nOffset, buffer->nFilledLen); s->output_buf_size += buffer->nFilledLen; if (buffer->nFlags & OMX_BUFFERFLAG_ENDOFFRAME) { if ((ret = av_packet_from_data(pkt, s->output_buf, s->output_buf_size)) < 0) { av_freep(&s->output_buf); s->output_buf_size = 0; goto end; } s->output_buf = NULL; s->output_buf_size = 0; } } else { // End of frame, and the caller provided a preallocated frame if ((ret = ff_alloc_packet2(avctx, pkt, s->output_buf_size + buffer->nFilledLen, 0)) < 0) { av_log(avctx, AV_LOG_ERROR, "Error getting output packet of size %d.\n", (int)(s->output_buf_size + buffer->nFilledLen)); goto end; } memcpy(pkt->data, s->output_buf, s->output_buf_size); memcpy(pkt->data + s->output_buf_size, buffer->pBuffer + buffer->nOffset, buffer->nFilledLen); av_freep(&s->output_buf); s->output_buf_size = 0; } if (buffer->nFlags & OMX_BUFFERFLAG_ENDOFFRAME) { pkt->pts = av_rescale_q(from_omx_ticks(buffer->nTimeStamp), AV_TIME_BASE_Q, avctx->time_base); // We don't currently enable B-frames for the encoders, so set // pkt->dts = pkt->pts. (The calling code behaves worse if the encoder // doesn't set the dts). pkt->dts = pkt->pts; if (buffer->nFlags & OMX_BUFFERFLAG_SYNCFRAME) pkt->flags |= AV_PKT_FLAG_KEY; *got_packet = 1; } } end: err = OMX_FillThisBuffer(s->handle, buffer); if (err != OMX_ErrorNone) { append_buffer(&s->output_mutex, &s->output_cond, &s->num_done_out_buffers, s->done_out_buffers, buffer); av_log(avctx, AV_LOG_ERROR, "OMX_FillThisBuffer failed: %x\n", err); ret = AVERROR_UNKNOWN; } } return ret; }
13,572
0
void kvm_arm_reset_vcpu(ARMCPU *cpu) { /* Feed the kernel back its initial register state */ memmove(cpu->cpreg_values, cpu->cpreg_reset_values, cpu->cpreg_array_len * sizeof(cpu->cpreg_values[0])); if (!write_list_to_kvmstate(cpu)) { abort(); } }
13,573
0
static void vmsvga_update_display(void *opaque) { struct vmsvga_state_s *s = opaque; DisplaySurface *surface; bool dirty = false; if (!s->enable) { s->vga.hw_ops->gfx_update(&s->vga); return; } vmsvga_check_size(s); surface = qemu_console_surface(s->vga.con); vmsvga_fifo_run(s); vmsvga_update_rect_flush(s); /* * Is it more efficient to look at vram VGA-dirty bits or wait * for the driver to issue SVGA_CMD_UPDATE? */ if (memory_region_is_logging(&s->vga.vram)) { vga_sync_dirty_bitmap(&s->vga); dirty = memory_region_get_dirty(&s->vga.vram, 0, surface_stride(surface) * surface_height(surface), DIRTY_MEMORY_VGA); } if (s->invalidated || dirty) { s->invalidated = 0; dpy_gfx_update(s->vga.con, 0, 0, surface_width(surface), surface_height(surface)); } if (dirty) { memory_region_reset_dirty(&s->vga.vram, 0, surface_stride(surface) * surface_height(surface), DIRTY_MEMORY_VGA); } }
13,574
0
static void bdrv_io_limits_intercept(BlockDriverState *bs, int nb_sectors, bool is_write) { /* does this io must wait */ bool must_wait = throttle_schedule_timer(&bs->throttle_state, is_write); /* if must wait or any request of this type throttled queue the IO */ if (must_wait || !qemu_co_queue_empty(&bs->throttled_reqs[is_write])) { qemu_co_queue_wait(&bs->throttled_reqs[is_write]); } /* the IO will be executed, do the accounting */ throttle_account(&bs->throttle_state, is_write, nb_sectors * BDRV_SECTOR_SIZE); /* if the next request must wait -> do nothing */ if (throttle_schedule_timer(&bs->throttle_state, is_write)) { return; } /* else queue next request for execution */ qemu_co_queue_next(&bs->throttled_reqs[is_write]); }
13,575
0
static void ide_cfata_identify(IDEState *s) { uint16_t *p; uint32_t cur_sec; p = (uint16_t *) s->identify_data; if (s->identify_set) goto fill_buffer; memset(p, 0, sizeof(s->identify_data)); cur_sec = s->cylinders * s->heads * s->sectors; put_le16(p + 0, 0x848a); /* CF Storage Card signature */ put_le16(p + 1, s->cylinders); /* Default cylinders */ put_le16(p + 3, s->heads); /* Default heads */ put_le16(p + 6, s->sectors); /* Default sectors per track */ put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */ put_le16(p + 8, s->nb_sectors); /* Sectors per card */ padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */ put_le16(p + 22, 0x0004); /* ECC bytes */ padstr((char *) (p + 23), s->version, 8); /* Firmware Revision */ padstr((char *) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */ #if MAX_MULT_SECTORS > 1 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS); #else put_le16(p + 47, 0x0000); #endif put_le16(p + 49, 0x0f00); /* Capabilities */ put_le16(p + 51, 0x0002); /* PIO cycle timing mode */ put_le16(p + 52, 0x0001); /* DMA cycle timing mode */ put_le16(p + 53, 0x0003); /* Translation params valid */ put_le16(p + 54, s->cylinders); /* Current cylinders */ put_le16(p + 55, s->heads); /* Current heads */ put_le16(p + 56, s->sectors); /* Current sectors */ put_le16(p + 57, cur_sec); /* Current capacity */ put_le16(p + 58, cur_sec >> 16); /* Current capacity */ if (s->mult_sectors) /* Multiple sector setting */ put_le16(p + 59, 0x100 | s->mult_sectors); put_le16(p + 60, s->nb_sectors); /* Total LBA sectors */ put_le16(p + 61, s->nb_sectors >> 16); /* Total LBA sectors */ put_le16(p + 63, 0x0203); /* Multiword DMA capability */ put_le16(p + 64, 0x0001); /* Flow Control PIO support */ put_le16(p + 65, 0x0096); /* Min. Multiword DMA cycle */ put_le16(p + 66, 0x0096); /* Rec. Multiword DMA cycle */ put_le16(p + 68, 0x00b4); /* Min. PIO cycle time */ put_le16(p + 82, 0x400c); /* Command Set supported */ put_le16(p + 83, 0x7068); /* Command Set supported */ put_le16(p + 84, 0x4000); /* Features supported */ put_le16(p + 85, 0x000c); /* Command Set enabled */ put_le16(p + 86, 0x7044); /* Command Set enabled */ put_le16(p + 87, 0x4000); /* Features enabled */ put_le16(p + 91, 0x4060); /* Current APM level */ put_le16(p + 129, 0x0002); /* Current features option */ put_le16(p + 130, 0x0005); /* Reassigned sectors */ put_le16(p + 131, 0x0001); /* Initial power mode */ put_le16(p + 132, 0x0000); /* User signature */ put_le16(p + 160, 0x8100); /* Power requirement */ put_le16(p + 161, 0x8001); /* CF command set */ s->identify_set = 1; fill_buffer: memcpy(s->io_buffer, p, sizeof(s->identify_data)); }
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0
static void test_qga_file_ops(gconstpointer fix) { const TestFixture *fixture = fix; const unsigned char helloworld[] = "Hello World!\n"; const char *b64; gchar *cmd, *path, *enc; unsigned char *dec; QDict *ret, *val; int64_t id, eof; gsize count; FILE *f; char tmp[100]; /* open */ ret = qmp_fd(fixture->fd, "{'execute': 'guest-file-open'," " 'arguments': { 'path': 'foo', 'mode': 'w+' } }"); g_assert_nonnull(ret); qmp_assert_no_error(ret); id = qdict_get_int(ret, "return"); QDECREF(ret); enc = g_base64_encode(helloworld, sizeof(helloworld)); /* write */ cmd = g_strdup_printf("{'execute': 'guest-file-write'," " 'arguments': { 'handle': %" PRId64 "," " 'buf-b64': '%s' } }", id, enc); ret = qmp_fd(fixture->fd, cmd); g_assert_nonnull(ret); qmp_assert_no_error(ret); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "count"); eof = qdict_get_bool(val, "eof"); g_assert_cmpint(count, ==, sizeof(helloworld)); g_assert_cmpint(eof, ==, 0); QDECREF(ret); g_free(cmd); /* flush */ cmd = g_strdup_printf("{'execute': 'guest-file-flush'," " 'arguments': {'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); QDECREF(ret); g_free(cmd); /* close */ cmd = g_strdup_printf("{'execute': 'guest-file-close'," " 'arguments': {'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); QDECREF(ret); g_free(cmd); /* check content */ path = g_build_filename(fixture->test_dir, "foo", NULL); f = fopen(path, "r"); g_assert_nonnull(f); count = fread(tmp, 1, sizeof(tmp), f); g_assert_cmpint(count, ==, sizeof(helloworld)); tmp[count] = 0; g_assert_cmpstr(tmp, ==, (char *)helloworld); fclose(f); /* open */ ret = qmp_fd(fixture->fd, "{'execute': 'guest-file-open'," " 'arguments': { 'path': 'foo', 'mode': 'r' } }"); g_assert_nonnull(ret); qmp_assert_no_error(ret); id = qdict_get_int(ret, "return"); QDECREF(ret); /* read */ cmd = g_strdup_printf("{'execute': 'guest-file-read'," " 'arguments': { 'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "count"); eof = qdict_get_bool(val, "eof"); b64 = qdict_get_str(val, "buf-b64"); g_assert_cmpint(count, ==, sizeof(helloworld)); g_assert(eof); g_assert_cmpstr(b64, ==, enc); QDECREF(ret); g_free(cmd); g_free(enc); /* read eof */ cmd = g_strdup_printf("{'execute': 'guest-file-read'," " 'arguments': { 'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "count"); eof = qdict_get_bool(val, "eof"); b64 = qdict_get_str(val, "buf-b64"); g_assert_cmpint(count, ==, 0); g_assert(eof); g_assert_cmpstr(b64, ==, ""); QDECREF(ret); g_free(cmd); /* seek */ cmd = g_strdup_printf("{'execute': 'guest-file-seek'," " 'arguments': { 'handle': %" PRId64 ", " " 'offset': %d, 'whence': %d } }", id, 6, SEEK_SET); ret = qmp_fd(fixture->fd, cmd); qmp_assert_no_error(ret); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "position"); eof = qdict_get_bool(val, "eof"); g_assert_cmpint(count, ==, 6); g_assert(!eof); QDECREF(ret); g_free(cmd); /* partial read */ cmd = g_strdup_printf("{'execute': 'guest-file-read'," " 'arguments': { 'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); val = qdict_get_qdict(ret, "return"); count = qdict_get_int(val, "count"); eof = qdict_get_bool(val, "eof"); b64 = qdict_get_str(val, "buf-b64"); g_assert_cmpint(count, ==, sizeof(helloworld) - 6); g_assert(eof); dec = g_base64_decode(b64, &count); g_assert_cmpint(count, ==, sizeof(helloworld) - 6); g_assert_cmpmem(dec, count, helloworld + 6, sizeof(helloworld) - 6); g_free(dec); QDECREF(ret); g_free(cmd); /* close */ cmd = g_strdup_printf("{'execute': 'guest-file-close'," " 'arguments': {'handle': %" PRId64 "} }", id); ret = qmp_fd(fixture->fd, cmd); QDECREF(ret); g_free(cmd); }
13,577
0
static inline uint64_t tcg_opc_movi_a(int qp, TCGReg dst, int64_t src) { assert(src == sextract64(src, 0, 22)); return tcg_opc_a5(qp, OPC_ADDL_A5, dst, src, TCG_REG_R0); }
13,578
0
bool qemu_clock_run_timers(QEMUClockType type) { return timerlist_run_timers(main_loop_tlg.tl[type]); }
13,579
0
static int net_slirp_init(VLANState *vlan, const char *model, const char *name) { if (!slirp_inited) { slirp_inited = 1; slirp_init(slirp_restrict, slirp_ip); } slirp_vc = qemu_new_vlan_client(vlan, model, name, slirp_receive, NULL, NULL, NULL); slirp_vc->info_str[0] = '\0'; return 0; }
13,580
0
static int assigned_device_pci_cap_init(PCIDevice *pci_dev, Error **errp) { AssignedDevice *dev = PCI_ASSIGN(pci_dev); PCIRegion *pci_region = dev->real_device.regions; int ret, pos; /* Clear initial capabilities pointer and status copied from hw */ pci_set_byte(pci_dev->config + PCI_CAPABILITY_LIST, 0); pci_set_word(pci_dev->config + PCI_STATUS, pci_get_word(pci_dev->config + PCI_STATUS) & ~PCI_STATUS_CAP_LIST); /* Expose MSI capability * MSI capability is the 1st capability in capability config */ pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_MSI, 0); if (pos != 0 && kvm_check_extension(kvm_state, KVM_CAP_ASSIGN_DEV_IRQ)) { if (verify_irqchip_in_kernel(errp) < 0) { return -ENOTSUP; } dev->dev.cap_present |= QEMU_PCI_CAP_MSI; dev->cap.available |= ASSIGNED_DEVICE_CAP_MSI; /* Only 32-bit/no-mask currently supported */ ret = pci_add_capability(pci_dev, PCI_CAP_ID_MSI, pos, 10, errp); if (ret < 0) { return ret; } pci_dev->msi_cap = pos; pci_set_word(pci_dev->config + pos + PCI_MSI_FLAGS, pci_get_word(pci_dev->config + pos + PCI_MSI_FLAGS) & PCI_MSI_FLAGS_QMASK); pci_set_long(pci_dev->config + pos + PCI_MSI_ADDRESS_LO, 0); pci_set_word(pci_dev->config + pos + PCI_MSI_DATA_32, 0); /* Set writable fields */ pci_set_word(pci_dev->wmask + pos + PCI_MSI_FLAGS, PCI_MSI_FLAGS_QSIZE | PCI_MSI_FLAGS_ENABLE); pci_set_long(pci_dev->wmask + pos + PCI_MSI_ADDRESS_LO, 0xfffffffc); pci_set_word(pci_dev->wmask + pos + PCI_MSI_DATA_32, 0xffff); } /* Expose MSI-X capability */ pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_MSIX, 0); if (pos != 0 && kvm_device_msix_supported(kvm_state)) { int bar_nr; uint32_t msix_table_entry; uint16_t msix_max; if (verify_irqchip_in_kernel(errp) < 0) { return -ENOTSUP; } dev->dev.cap_present |= QEMU_PCI_CAP_MSIX; dev->cap.available |= ASSIGNED_DEVICE_CAP_MSIX; ret = pci_add_capability(pci_dev, PCI_CAP_ID_MSIX, pos, 12, errp); if (ret < 0) { return ret; } pci_dev->msix_cap = pos; msix_max = (pci_get_word(pci_dev->config + pos + PCI_MSIX_FLAGS) & PCI_MSIX_FLAGS_QSIZE) + 1; msix_max = MIN(msix_max, KVM_MAX_MSIX_PER_DEV); pci_set_word(pci_dev->config + pos + PCI_MSIX_FLAGS, msix_max - 1); /* Only enable and function mask bits are writable */ pci_set_word(pci_dev->wmask + pos + PCI_MSIX_FLAGS, PCI_MSIX_FLAGS_ENABLE | PCI_MSIX_FLAGS_MASKALL); msix_table_entry = pci_get_long(pci_dev->config + pos + PCI_MSIX_TABLE); bar_nr = msix_table_entry & PCI_MSIX_FLAGS_BIRMASK; msix_table_entry &= ~PCI_MSIX_FLAGS_BIRMASK; dev->msix_table_addr = pci_region[bar_nr].base_addr + msix_table_entry; dev->msix_table_size = msix_max * sizeof(MSIXTableEntry); dev->msix_max = msix_max; } /* Minimal PM support, nothing writable, device appears to NAK changes */ pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_PM, 0); if (pos) { uint16_t pmc; ret = pci_add_capability(pci_dev, PCI_CAP_ID_PM, pos, PCI_PM_SIZEOF, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, PCI_PM_SIZEOF); pmc = pci_get_word(pci_dev->config + pos + PCI_CAP_FLAGS); pmc &= (PCI_PM_CAP_VER_MASK | PCI_PM_CAP_DSI); pci_set_word(pci_dev->config + pos + PCI_CAP_FLAGS, pmc); /* assign_device will bring the device up to D0, so we don't need * to worry about doing that ourselves here. */ pci_set_word(pci_dev->config + pos + PCI_PM_CTRL, PCI_PM_CTRL_NO_SOFT_RESET); pci_set_byte(pci_dev->config + pos + PCI_PM_PPB_EXTENSIONS, 0); pci_set_byte(pci_dev->config + pos + PCI_PM_DATA_REGISTER, 0); } pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_EXP, 0); if (pos) { uint8_t version, size = 0; uint16_t type, devctl, lnksta; uint32_t devcap, lnkcap; version = pci_get_byte(pci_dev->config + pos + PCI_EXP_FLAGS); version &= PCI_EXP_FLAGS_VERS; if (version == 1) { size = 0x14; } else if (version == 2) { /* * Check for non-std size, accept reduced size to 0x34, * which is what bcm5761 implemented, violating the * PCIe v3.0 spec that regs should exist and be read as 0, * not optionally provided and shorten the struct size. */ size = MIN(0x3c, PCI_CONFIG_SPACE_SIZE - pos); if (size < 0x34) { error_setg(errp, "Invalid size PCIe cap-id 0x%x", PCI_CAP_ID_EXP); return -EINVAL; } else if (size != 0x3c) { error_report("WARNING, %s: PCIe cap-id 0x%x has " "non-standard size 0x%x; std size should be 0x3c", __func__, PCI_CAP_ID_EXP, size); } } else if (version == 0) { uint16_t vid, did; vid = pci_get_word(pci_dev->config + PCI_VENDOR_ID); did = pci_get_word(pci_dev->config + PCI_DEVICE_ID); if (vid == PCI_VENDOR_ID_INTEL && did == 0x10ed) { /* * quirk for Intel 82599 VF with invalid PCIe capability * version, should really be version 2 (same as PF) */ size = 0x3c; } } if (size == 0) { error_setg(errp, "Unsupported PCI express capability version %d", version); return -EINVAL; } ret = pci_add_capability(pci_dev, PCI_CAP_ID_EXP, pos, size, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, size); type = pci_get_word(pci_dev->config + pos + PCI_EXP_FLAGS); type = (type & PCI_EXP_FLAGS_TYPE) >> 4; if (type != PCI_EXP_TYPE_ENDPOINT && type != PCI_EXP_TYPE_LEG_END && type != PCI_EXP_TYPE_RC_END) { error_setg(errp, "Device assignment only supports endpoint " "assignment, device type %d", type); return -EINVAL; } /* capabilities, pass existing read-only copy * PCI_EXP_FLAGS_IRQ: updated by hardware, should be direct read */ /* device capabilities: hide FLR */ devcap = pci_get_long(pci_dev->config + pos + PCI_EXP_DEVCAP); devcap &= ~PCI_EXP_DEVCAP_FLR; pci_set_long(pci_dev->config + pos + PCI_EXP_DEVCAP, devcap); /* device control: clear all error reporting enable bits, leaving * only a few host values. Note, these are * all writable, but not passed to hw. */ devctl = pci_get_word(pci_dev->config + pos + PCI_EXP_DEVCTL); devctl = (devctl & (PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_PAYLOAD)) | PCI_EXP_DEVCTL_RELAX_EN | PCI_EXP_DEVCTL_NOSNOOP_EN; pci_set_word(pci_dev->config + pos + PCI_EXP_DEVCTL, devctl); devctl = PCI_EXP_DEVCTL_BCR_FLR | PCI_EXP_DEVCTL_AUX_PME; pci_set_word(pci_dev->wmask + pos + PCI_EXP_DEVCTL, ~devctl); /* Clear device status */ pci_set_word(pci_dev->config + pos + PCI_EXP_DEVSTA, 0); /* Link capabilities, expose links and latencues, clear reporting */ lnkcap = pci_get_long(pci_dev->config + pos + PCI_EXP_LNKCAP); lnkcap &= (PCI_EXP_LNKCAP_SLS | PCI_EXP_LNKCAP_MLW | PCI_EXP_LNKCAP_ASPMS | PCI_EXP_LNKCAP_L0SEL | PCI_EXP_LNKCAP_L1EL); pci_set_long(pci_dev->config + pos + PCI_EXP_LNKCAP, lnkcap); /* Link control, pass existing read-only copy. Should be writable? */ /* Link status, only expose current speed and width */ lnksta = pci_get_word(pci_dev->config + pos + PCI_EXP_LNKSTA); lnksta &= (PCI_EXP_LNKSTA_CLS | PCI_EXP_LNKSTA_NLW); pci_set_word(pci_dev->config + pos + PCI_EXP_LNKSTA, lnksta); if (version >= 2) { /* Slot capabilities, control, status - not needed for endpoints */ pci_set_long(pci_dev->config + pos + PCI_EXP_SLTCAP, 0); pci_set_word(pci_dev->config + pos + PCI_EXP_SLTCTL, 0); pci_set_word(pci_dev->config + pos + PCI_EXP_SLTSTA, 0); /* Root control, capabilities, status - not needed for endpoints */ pci_set_word(pci_dev->config + pos + PCI_EXP_RTCTL, 0); pci_set_word(pci_dev->config + pos + PCI_EXP_RTCAP, 0); pci_set_long(pci_dev->config + pos + PCI_EXP_RTSTA, 0); /* Device capabilities/control 2, pass existing read-only copy */ /* Link control 2, pass existing read-only copy */ } } pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_PCIX, 0); if (pos) { uint16_t cmd; uint32_t status; /* Only expose the minimum, 8 byte capability */ ret = pci_add_capability(pci_dev, PCI_CAP_ID_PCIX, pos, 8, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, 8); /* Command register, clear upper bits, including extended modes */ cmd = pci_get_word(pci_dev->config + pos + PCI_X_CMD); cmd &= (PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO | PCI_X_CMD_MAX_READ | PCI_X_CMD_MAX_SPLIT); pci_set_word(pci_dev->config + pos + PCI_X_CMD, cmd); /* Status register, update with emulated PCI bus location, clear * error bits, leave the rest. */ status = pci_get_long(pci_dev->config + pos + PCI_X_STATUS); status &= ~(PCI_X_STATUS_BUS | PCI_X_STATUS_DEVFN); status |= pci_get_bdf(pci_dev); status &= ~(PCI_X_STATUS_SPL_DISC | PCI_X_STATUS_UNX_SPL | PCI_X_STATUS_SPL_ERR); pci_set_long(pci_dev->config + pos + PCI_X_STATUS, status); } pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_VPD, 0); if (pos) { /* Direct R/W passthrough */ ret = pci_add_capability(pci_dev, PCI_CAP_ID_VPD, pos, 8, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, 8); /* direct write for cap content */ assigned_dev_direct_config_write(dev, pos + 2, 6); } /* Devices can have multiple vendor capabilities, get them all */ for (pos = 0; (pos = pci_find_cap_offset(pci_dev, PCI_CAP_ID_VNDR, pos)); pos += PCI_CAP_LIST_NEXT) { uint8_t len = pci_get_byte(pci_dev->config + pos + PCI_CAP_FLAGS); /* Direct R/W passthrough */ ret = pci_add_capability(pci_dev, PCI_CAP_ID_VNDR, pos, len, errp); if (ret < 0) { return ret; } assigned_dev_setup_cap_read(dev, pos, len); /* direct write for cap content */ assigned_dev_direct_config_write(dev, pos + 2, len - 2); } /* If real and virtual capability list status bits differ, virtualize the * access. */ if ((pci_get_word(pci_dev->config + PCI_STATUS) & PCI_STATUS_CAP_LIST) != (assigned_dev_pci_read_byte(pci_dev, PCI_STATUS) & PCI_STATUS_CAP_LIST)) { dev->emulate_config_read[PCI_STATUS] |= PCI_STATUS_CAP_LIST; } return 0; }
13,581
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static inline void gen_intermediate_code_internal(UniCore32CPU *cpu, TranslationBlock *tb, bool search_pc) { CPUState *cs = CPU(cpu); CPUUniCore32State *env = &cpu->env; DisasContext dc1, *dc = &dc1; CPUBreakpoint *bp; uint16_t *gen_opc_end; int j, lj; target_ulong pc_start; uint32_t next_page_start; int num_insns; int max_insns; /* generate intermediate code */ num_temps = 0; pc_start = tb->pc; dc->tb = tb; gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; dc->is_jmp = DISAS_NEXT; dc->pc = pc_start; dc->singlestep_enabled = cs->singlestep_enabled; dc->condjmp = 0; cpu_F0s = tcg_temp_new_i32(); cpu_F1s = tcg_temp_new_i32(); cpu_F0d = tcg_temp_new_i64(); cpu_F1d = tcg_temp_new_i64(); next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; lj = -1; num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK; if (max_insns == 0) { max_insns = CF_COUNT_MASK; } #ifndef CONFIG_USER_ONLY if ((env->uncached_asr & ASR_M) == ASR_MODE_USER) { dc->user = 1; } else { dc->user = 0; } #endif gen_tb_start(); do { if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { if (bp->pc == dc->pc) { gen_set_pc_im(dc->pc); gen_exception(EXCP_DEBUG); dc->is_jmp = DISAS_JUMP; /* Advance PC so that clearing the breakpoint will invalidate this TB. */ dc->pc += 2; /* FIXME */ goto done_generating; } } } if (search_pc) { j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; if (lj < j) { lj++; while (lj < j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; } } tcg_ctx.gen_opc_pc[lj] = dc->pc; tcg_ctx.gen_opc_instr_start[lj] = 1; tcg_ctx.gen_opc_icount[lj] = num_insns; } if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); } disas_uc32_insn(env, dc); if (num_temps) { fprintf(stderr, "Internal resource leak before %08x\n", dc->pc); num_temps = 0; } if (dc->condjmp && !dc->is_jmp) { gen_set_label(dc->condlabel); dc->condjmp = 0; } /* Translation stops when a conditional branch is encountered. * Otherwise the subsequent code could get translated several times. * Also stop translation when a page boundary is reached. This * ensures prefetch aborts occur at the right place. */ num_insns++; } while (!dc->is_jmp && tcg_ctx.gen_opc_ptr < gen_opc_end && !cs->singlestep_enabled && !singlestep && dc->pc < next_page_start && num_insns < max_insns); if (tb->cflags & CF_LAST_IO) { if (dc->condjmp) { /* FIXME: This can theoretically happen with self-modifying code. */ cpu_abort(cs, "IO on conditional branch instruction"); } gen_io_end(); } /* At this stage dc->condjmp will only be set when the skipped instruction was a conditional branch or trap, and the PC has already been written. */ if (unlikely(cs->singlestep_enabled)) { /* Make sure the pc is updated, and raise a debug exception. */ if (dc->condjmp) { if (dc->is_jmp == DISAS_SYSCALL) { gen_exception(UC32_EXCP_PRIV); } else { gen_exception(EXCP_DEBUG); } gen_set_label(dc->condlabel); } if (dc->condjmp || !dc->is_jmp) { gen_set_pc_im(dc->pc); dc->condjmp = 0; } if (dc->is_jmp == DISAS_SYSCALL && !dc->condjmp) { gen_exception(UC32_EXCP_PRIV); } else { gen_exception(EXCP_DEBUG); } } else { /* While branches must always occur at the end of an IT block, there are a few other things that can cause us to terminate the TB in the middel of an IT block: - Exception generating instructions (bkpt, swi, undefined). - Page boundaries. - Hardware watchpoints. Hardware breakpoints have already been handled and skip this code. */ switch (dc->is_jmp) { case DISAS_NEXT: gen_goto_tb(dc, 1, dc->pc); break; default: case DISAS_JUMP: case DISAS_UPDATE: /* indicate that the hash table must be used to find the next TB */ tcg_gen_exit_tb(0); break; case DISAS_TB_JUMP: /* nothing more to generate */ break; case DISAS_SYSCALL: gen_exception(UC32_EXCP_PRIV); break; } if (dc->condjmp) { gen_set_label(dc->condlabel); gen_goto_tb(dc, 1, dc->pc); dc->condjmp = 0; } } done_generating: gen_tb_end(tb, num_insns); *tcg_ctx.gen_opc_ptr = INDEX_op_end; #ifdef DEBUG_DISAS if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); log_target_disas(env, pc_start, dc->pc - pc_start, 0); qemu_log("\n"); } #endif if (search_pc) { j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; lj++; while (lj <= j) { tcg_ctx.gen_opc_instr_start[lj++] = 0; } } else { tb->size = dc->pc - pc_start; tb->icount = num_insns; } }
13,582
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static int commit_bitstream_and_slice_buffer(AVCodecContext *avctx, DECODER_BUFFER_DESC *bs, DECODER_BUFFER_DESC *sc) { const struct MpegEncContext *s = avctx->priv_data; AVDXVAContext *ctx = avctx->hwaccel_context; struct dxva2_picture_context *ctx_pic = s->current_picture_ptr->hwaccel_picture_private; const int is_field = s->picture_structure != PICT_FRAME; const unsigned mb_count = s->mb_width * (s->mb_height >> is_field); void *dxva_data_ptr; uint8_t *dxva_data, *current, *end; unsigned dxva_size; unsigned i; unsigned type; #if CONFIG_D3D11VA if (avctx->pix_fmt == AV_PIX_FMT_D3D11VA_VLD) { type = D3D11_VIDEO_DECODER_BUFFER_BITSTREAM; if (FAILED(ID3D11VideoContext_GetDecoderBuffer(D3D11VA_CONTEXT(ctx)->video_context, D3D11VA_CONTEXT(ctx)->decoder, type, &dxva_size, &dxva_data_ptr))) return -1; } #endif #if CONFIG_DXVA2 if (avctx->pix_fmt == AV_PIX_FMT_DXVA2_VLD) { type = DXVA2_BitStreamDateBufferType; if (FAILED(IDirectXVideoDecoder_GetBuffer(DXVA2_CONTEXT(ctx)->decoder, type, &dxva_data_ptr, &dxva_size))) return -1; } #endif dxva_data = dxva_data_ptr; current = dxva_data; end = dxva_data + dxva_size; for (i = 0; i < ctx_pic->slice_count; i++) { DXVA_SliceInfo *slice = &ctx_pic->slice[i]; unsigned position = slice->dwSliceDataLocation; unsigned size = slice->dwSliceBitsInBuffer / 8; if (size > end - current) { av_log(avctx, AV_LOG_ERROR, "Failed to build bitstream"); break; } slice->dwSliceDataLocation = current - dxva_data; if (i < ctx_pic->slice_count - 1) slice->wNumberMBsInSlice = slice[1].wNumberMBsInSlice - slice[0].wNumberMBsInSlice; else slice->wNumberMBsInSlice = mb_count - slice[0].wNumberMBsInSlice; memcpy(current, &ctx_pic->bitstream[position], size); current += size; } #if CONFIG_D3D11VA if (avctx->pix_fmt == AV_PIX_FMT_D3D11VA_VLD) if (FAILED(ID3D11VideoContext_ReleaseDecoderBuffer(D3D11VA_CONTEXT(ctx)->video_context, D3D11VA_CONTEXT(ctx)->decoder, type))) return -1; #endif #if CONFIG_DXVA2 if (avctx->pix_fmt == AV_PIX_FMT_DXVA2_VLD) if (FAILED(IDirectXVideoDecoder_ReleaseBuffer(DXVA2_CONTEXT(ctx)->decoder, type))) return -1; #endif if (i < ctx_pic->slice_count) return -1; #if CONFIG_D3D11VA if (avctx->pix_fmt == AV_PIX_FMT_D3D11VA_VLD) { D3D11_VIDEO_DECODER_BUFFER_DESC *dsc11 = bs; memset(dsc11, 0, sizeof(*dsc11)); dsc11->BufferType = type; dsc11->DataSize = current - dxva_data; dsc11->NumMBsInBuffer = mb_count; type = D3D11_VIDEO_DECODER_BUFFER_SLICE_CONTROL; } #endif #if CONFIG_DXVA2 if (avctx->pix_fmt == AV_PIX_FMT_DXVA2_VLD) { DXVA2_DecodeBufferDesc *dsc2 = bs; memset(dsc2, 0, sizeof(*dsc2)); dsc2->CompressedBufferType = type; dsc2->DataSize = current - dxva_data; dsc2->NumMBsInBuffer = mb_count; type = DXVA2_SliceControlBufferType; } #endif return ff_dxva2_commit_buffer(avctx, ctx, sc, type, ctx_pic->slice, ctx_pic->slice_count * sizeof(*ctx_pic->slice), mb_count); }
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static void piix4_reset(void *opaque) { PIIX4PMState *s = opaque; uint8_t *pci_conf = s->dev.config; pci_conf[0x58] = 0; pci_conf[0x59] = 0; pci_conf[0x5a] = 0; pci_conf[0x5b] = 0; }
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static void vgafb_write(void *opaque, target_phys_addr_t addr, uint64_t value, unsigned size) { MilkymistVgafbState *s = opaque; trace_milkymist_vgafb_memory_write(addr, value); addr >>= 2; switch (addr) { case R_CTRL: s->regs[addr] = value; vgafb_resize(s); break; case R_HSYNC_START: case R_HSYNC_END: case R_HSCAN: case R_VSYNC_START: case R_VSYNC_END: case R_VSCAN: case R_BURST_COUNT: case R_DDC: case R_SOURCE_CLOCK: s->regs[addr] = value; break; case R_BASEADDRESS: if (value & 0x1f) { error_report("milkymist_vgafb: framebuffer base address have to " "be 32 byte aligned"); break; } s->regs[addr] = value & s->fb_mask; s->invalidate = 1; break; case R_HRES: case R_VRES: s->regs[addr] = value; vgafb_resize(s); break; case R_BASEADDRESS_ACT: error_report("milkymist_vgafb: write to read-only register 0x" TARGET_FMT_plx, addr << 2); break; default: error_report("milkymist_vgafb: write access to unknown register 0x" TARGET_FMT_plx, addr << 2); break; } }
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0
static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type, ARMMMUIdx mmu_idx, hwaddr *phys_ptr, int *prot, target_ulong *page_size) { CPUState *cs = CPU(arm_env_get_cpu(env)); int code; uint32_t table; uint32_t desc; int type; int ap; int domain = 0; int domain_prot; hwaddr phys_addr; uint32_t dacr; /* Pagetable walk. */ /* Lookup l1 descriptor. */ if (!get_level1_table_address(env, mmu_idx, &table, address)) { /* Section translation fault if page walk is disabled by PD0 or PD1 */ code = 5; goto do_fault; } desc = ldl_phys(cs->as, table); type = (desc & 3); domain = (desc >> 5) & 0x0f; if (regime_el(env, mmu_idx) == 1) { dacr = env->cp15.dacr_ns; } else { dacr = env->cp15.dacr_s; } domain_prot = (dacr >> (domain * 2)) & 3; if (type == 0) { /* Section translation fault. */ code = 5; goto do_fault; } if (domain_prot == 0 || domain_prot == 2) { if (type == 2) code = 9; /* Section domain fault. */ else code = 11; /* Page domain fault. */ goto do_fault; } if (type == 2) { /* 1Mb section. */ phys_addr = (desc & 0xfff00000) | (address & 0x000fffff); ap = (desc >> 10) & 3; code = 13; *page_size = 1024 * 1024; } else { /* Lookup l2 entry. */ if (type == 1) { /* Coarse pagetable. */ table = (desc & 0xfffffc00) | ((address >> 10) & 0x3fc); } else { /* Fine pagetable. */ table = (desc & 0xfffff000) | ((address >> 8) & 0xffc); } desc = ldl_phys(cs->as, table); switch (desc & 3) { case 0: /* Page translation fault. */ code = 7; goto do_fault; case 1: /* 64k page. */ phys_addr = (desc & 0xffff0000) | (address & 0xffff); ap = (desc >> (4 + ((address >> 13) & 6))) & 3; *page_size = 0x10000; break; case 2: /* 4k page. */ phys_addr = (desc & 0xfffff000) | (address & 0xfff); ap = (desc >> (4 + ((address >> 9) & 6))) & 3; *page_size = 0x1000; break; case 3: /* 1k page. */ if (type == 1) { if (arm_feature(env, ARM_FEATURE_XSCALE)) { phys_addr = (desc & 0xfffff000) | (address & 0xfff); } else { /* Page translation fault. */ code = 7; goto do_fault; } } else { phys_addr = (desc & 0xfffffc00) | (address & 0x3ff); } ap = (desc >> 4) & 3; *page_size = 0x400; break; default: /* Never happens, but compiler isn't smart enough to tell. */ abort(); } code = 15; } *prot = check_ap(env, mmu_idx, ap, domain_prot, access_type); if (!*prot) { /* Access permission fault. */ goto do_fault; } *prot |= PAGE_EXEC; *phys_ptr = phys_addr; return 0; do_fault: return code | (domain << 4); }
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static void qjson_initfn(Object *obj) { QJSON *json = QJSON(obj); json->str = qstring_from_str("{ "); json->omit_comma = true; }
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0
cac_applet_pki_reset(VCard *card, int channel) { VCardAppletPrivate *applet_private = NULL; CACPKIAppletData *pki_applet = NULL; applet_private = vcard_get_current_applet_private(card, channel); assert(applet_private); pki_applet = &(applet_private->u.pki_data); pki_applet->cert_buffer = NULL; if (pki_applet->sign_buffer) { g_free(pki_applet->sign_buffer); pki_applet->sign_buffer = NULL; } pki_applet->cert_buffer_len = 0; pki_applet->sign_buffer_len = 0; return VCARD_DONE; }
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static void coroutine_fn bdrv_rw_co_entry(void *opaque) { RwCo *rwco = opaque; if (!rwco->is_write) { rwco->ret = bdrv_co_do_preadv(rwco->bs, rwco->offset, rwco->qiov->size, rwco->qiov, rwco->flags); } else { rwco->ret = bdrv_co_do_pwritev(rwco->bs, rwco->offset, rwco->qiov->size, rwco->qiov, rwco->flags); } }
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